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Commit | Line | Data |
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31ef9134 CL |
1 | /* |
2 | * Audio and Music Data Transmission Protocol (IEC 61883-6) streams | |
3 | * with Common Isochronous Packet (IEC 61883-1) headers | |
4 | * | |
5 | * Copyright (c) Clemens Ladisch <clemens@ladisch.de> | |
6 | * Licensed under the terms of the GNU General Public License, version 2. | |
7 | */ | |
8 | ||
9 | #include <linux/device.h> | |
10 | #include <linux/err.h> | |
11 | #include <linux/firewire.h> | |
12 | #include <linux/module.h> | |
13 | #include <linux/slab.h> | |
14 | #include <sound/pcm.h> | |
83d8d72d | 15 | #include <sound/rawmidi.h> |
31ef9134 CL |
16 | #include "amdtp.h" |
17 | ||
18 | #define TICKS_PER_CYCLE 3072 | |
19 | #define CYCLES_PER_SECOND 8000 | |
20 | #define TICKS_PER_SECOND (TICKS_PER_CYCLE * CYCLES_PER_SECOND) | |
21 | ||
22 | #define TRANSFER_DELAY_TICKS 0x2e00 /* 479.17 µs */ | |
23 | ||
b445db44 TS |
24 | /* isochronous header parameters */ |
25 | #define ISO_DATA_LENGTH_SHIFT 16 | |
31ef9134 CL |
26 | #define TAG_CIP 1 |
27 | ||
b445db44 | 28 | /* common isochronous packet header parameters */ |
31ef9134 | 29 | #define CIP_EOH (1u << 31) |
b445db44 | 30 | #define CIP_EOH_MASK 0x80000000 |
31ef9134 | 31 | #define CIP_FMT_AM (0x10 << 24) |
b445db44 TS |
32 | #define CIP_FMT_MASK 0x3f000000 |
33 | #define CIP_SYT_MASK 0x0000ffff | |
34 | #define CIP_SYT_NO_INFO 0xffff | |
35 | #define CIP_FDF_MASK 0x00ff0000 | |
36 | #define CIP_FDF_SFC_SHIFT 16 | |
37 | ||
38 | /* | |
39 | * Audio and Music transfer protocol specific parameters | |
40 | * only "Clock-based rate control mode" is supported | |
41 | */ | |
42 | #define AMDTP_FDF_AM824 (0 << (CIP_FDF_SFC_SHIFT + 3)) | |
2b3fc456 | 43 | #define AMDTP_FDF_NO_DATA 0xff |
b445db44 TS |
44 | #define AMDTP_DBS_MASK 0x00ff0000 |
45 | #define AMDTP_DBS_SHIFT 16 | |
46 | #define AMDTP_DBC_MASK 0x000000ff | |
31ef9134 CL |
47 | |
48 | /* TODO: make these configurable */ | |
49 | #define INTERRUPT_INTERVAL 16 | |
50 | #define QUEUE_LENGTH 48 | |
51 | ||
2b3fc456 | 52 | #define IN_PACKET_HEADER_SIZE 4 |
4b7da117 TS |
53 | #define OUT_PACKET_HEADER_SIZE 0 |
54 | ||
76fb8789 CL |
55 | static void pcm_period_tasklet(unsigned long data); |
56 | ||
31ef9134 | 57 | /** |
be4a2894 TS |
58 | * amdtp_stream_init - initialize an AMDTP stream structure |
59 | * @s: the AMDTP stream to initialize | |
31ef9134 | 60 | * @unit: the target of the stream |
3ff7e8f0 | 61 | * @dir: the direction of stream |
31ef9134 CL |
62 | * @flags: the packet transmission method to use |
63 | */ | |
be4a2894 | 64 | int amdtp_stream_init(struct amdtp_stream *s, struct fw_unit *unit, |
3ff7e8f0 | 65 | enum amdtp_stream_direction dir, enum cip_flags flags) |
31ef9134 | 66 | { |
31ef9134 | 67 | s->unit = fw_unit_get(unit); |
3ff7e8f0 | 68 | s->direction = dir; |
31ef9134 CL |
69 | s->flags = flags; |
70 | s->context = ERR_PTR(-1); | |
71 | mutex_init(&s->mutex); | |
76fb8789 | 72 | tasklet_init(&s->period_tasklet, pcm_period_tasklet, (unsigned long)s); |
ec00f5e4 | 73 | s->packet_index = 0; |
31ef9134 CL |
74 | |
75 | return 0; | |
76 | } | |
be4a2894 | 77 | EXPORT_SYMBOL(amdtp_stream_init); |
31ef9134 CL |
78 | |
79 | /** | |
be4a2894 TS |
80 | * amdtp_stream_destroy - free stream resources |
81 | * @s: the AMDTP stream to destroy | |
31ef9134 | 82 | */ |
be4a2894 | 83 | void amdtp_stream_destroy(struct amdtp_stream *s) |
31ef9134 | 84 | { |
be4a2894 | 85 | WARN_ON(amdtp_stream_running(s)); |
31ef9134 CL |
86 | mutex_destroy(&s->mutex); |
87 | fw_unit_put(s->unit); | |
88 | } | |
be4a2894 | 89 | EXPORT_SYMBOL(amdtp_stream_destroy); |
31ef9134 | 90 | |
c5280e99 | 91 | const unsigned int amdtp_syt_intervals[CIP_SFC_COUNT] = { |
a7304e3b CL |
92 | [CIP_SFC_32000] = 8, |
93 | [CIP_SFC_44100] = 8, | |
94 | [CIP_SFC_48000] = 8, | |
95 | [CIP_SFC_88200] = 16, | |
96 | [CIP_SFC_96000] = 16, | |
97 | [CIP_SFC_176400] = 32, | |
98 | [CIP_SFC_192000] = 32, | |
99 | }; | |
100 | EXPORT_SYMBOL(amdtp_syt_intervals); | |
101 | ||
31ef9134 | 102 | /** |
be4a2894 TS |
103 | * amdtp_stream_set_parameters - set stream parameters |
104 | * @s: the AMDTP stream to configure | |
31ef9134 | 105 | * @rate: the sample rate |
a7304e3b CL |
106 | * @pcm_channels: the number of PCM samples in each data block, to be encoded |
107 | * as AM824 multi-bit linear audio | |
108 | * @midi_ports: the number of MIDI ports (i.e., MPX-MIDI Data Channels) | |
31ef9134 | 109 | * |
a7304e3b | 110 | * The parameters must be set before the stream is started, and must not be |
31ef9134 CL |
111 | * changed while the stream is running. |
112 | */ | |
be4a2894 TS |
113 | void amdtp_stream_set_parameters(struct amdtp_stream *s, |
114 | unsigned int rate, | |
115 | unsigned int pcm_channels, | |
116 | unsigned int midi_ports) | |
31ef9134 | 117 | { |
a7304e3b CL |
118 | static const unsigned int rates[] = { |
119 | [CIP_SFC_32000] = 32000, | |
120 | [CIP_SFC_44100] = 44100, | |
121 | [CIP_SFC_48000] = 48000, | |
122 | [CIP_SFC_88200] = 88200, | |
123 | [CIP_SFC_96000] = 96000, | |
124 | [CIP_SFC_176400] = 176400, | |
125 | [CIP_SFC_192000] = 192000, | |
31ef9134 | 126 | }; |
83d8d72d | 127 | unsigned int sfc, midi_channels; |
31ef9134 | 128 | |
83d8d72d TS |
129 | midi_channels = DIV_ROUND_UP(midi_ports, 8); |
130 | ||
131 | if (WARN_ON(amdtp_stream_running(s)) || | |
132 | WARN_ON(midi_channels > AMDTP_MAX_CHANNELS_FOR_MIDI)) | |
31ef9134 CL |
133 | return; |
134 | ||
a7304e3b CL |
135 | for (sfc = 0; sfc < CIP_SFC_COUNT; ++sfc) |
136 | if (rates[sfc] == rate) | |
e84d15f6 | 137 | goto sfc_found; |
31ef9134 | 138 | WARN_ON(1); |
e84d15f6 CL |
139 | return; |
140 | ||
141 | sfc_found: | |
a7304e3b CL |
142 | s->dual_wire = (s->flags & CIP_HI_DUALWIRE) && sfc > CIP_SFC_96000; |
143 | if (s->dual_wire) { | |
144 | sfc -= 2; | |
145 | rate /= 2; | |
146 | pcm_channels *= 2; | |
147 | } | |
e84d15f6 | 148 | s->sfc = sfc; |
83d8d72d | 149 | s->data_block_quadlets = pcm_channels + midi_channels; |
a7304e3b CL |
150 | s->pcm_channels = pcm_channels; |
151 | s->midi_ports = midi_ports; | |
152 | ||
153 | s->syt_interval = amdtp_syt_intervals[sfc]; | |
e84d15f6 CL |
154 | |
155 | /* default buffering in the device */ | |
156 | s->transfer_delay = TRANSFER_DELAY_TICKS - TICKS_PER_CYCLE; | |
157 | if (s->flags & CIP_BLOCKING) | |
158 | /* additional buffering needed to adjust for no-data packets */ | |
159 | s->transfer_delay += TICKS_PER_SECOND * s->syt_interval / rate; | |
31ef9134 | 160 | } |
be4a2894 | 161 | EXPORT_SYMBOL(amdtp_stream_set_parameters); |
31ef9134 CL |
162 | |
163 | /** | |
be4a2894 TS |
164 | * amdtp_stream_get_max_payload - get the stream's packet size |
165 | * @s: the AMDTP stream | |
31ef9134 CL |
166 | * |
167 | * This function must not be called before the stream has been configured | |
be4a2894 | 168 | * with amdtp_stream_set_parameters(). |
31ef9134 | 169 | */ |
be4a2894 | 170 | unsigned int amdtp_stream_get_max_payload(struct amdtp_stream *s) |
31ef9134 | 171 | { |
e84d15f6 | 172 | return 8 + s->syt_interval * s->data_block_quadlets * 4; |
31ef9134 | 173 | } |
be4a2894 | 174 | EXPORT_SYMBOL(amdtp_stream_get_max_payload); |
31ef9134 | 175 | |
be4a2894 | 176 | static void amdtp_write_s16(struct amdtp_stream *s, |
31ef9134 CL |
177 | struct snd_pcm_substream *pcm, |
178 | __be32 *buffer, unsigned int frames); | |
be4a2894 | 179 | static void amdtp_write_s32(struct amdtp_stream *s, |
31ef9134 CL |
180 | struct snd_pcm_substream *pcm, |
181 | __be32 *buffer, unsigned int frames); | |
be4a2894 | 182 | static void amdtp_write_s16_dualwire(struct amdtp_stream *s, |
a7304e3b CL |
183 | struct snd_pcm_substream *pcm, |
184 | __be32 *buffer, unsigned int frames); | |
be4a2894 | 185 | static void amdtp_write_s32_dualwire(struct amdtp_stream *s, |
a7304e3b CL |
186 | struct snd_pcm_substream *pcm, |
187 | __be32 *buffer, unsigned int frames); | |
2b3fc456 TS |
188 | static void amdtp_read_s32(struct amdtp_stream *s, |
189 | struct snd_pcm_substream *pcm, | |
190 | __be32 *buffer, unsigned int frames); | |
191 | static void amdtp_read_s32_dualwire(struct amdtp_stream *s, | |
192 | struct snd_pcm_substream *pcm, | |
193 | __be32 *buffer, unsigned int frames); | |
31ef9134 CL |
194 | |
195 | /** | |
be4a2894 TS |
196 | * amdtp_stream_set_pcm_format - set the PCM format |
197 | * @s: the AMDTP stream to configure | |
31ef9134 CL |
198 | * @format: the format of the ALSA PCM device |
199 | * | |
a7304e3b CL |
200 | * The sample format must be set after the other paramters (rate/PCM channels/ |
201 | * MIDI) and before the stream is started, and must not be changed while the | |
202 | * stream is running. | |
31ef9134 | 203 | */ |
be4a2894 TS |
204 | void amdtp_stream_set_pcm_format(struct amdtp_stream *s, |
205 | snd_pcm_format_t format) | |
31ef9134 | 206 | { |
83d8d72d | 207 | if (WARN_ON(amdtp_stream_pcm_running(s))) |
31ef9134 CL |
208 | return; |
209 | ||
210 | switch (format) { | |
211 | default: | |
212 | WARN_ON(1); | |
213 | /* fall through */ | |
214 | case SNDRV_PCM_FORMAT_S16: | |
2b3fc456 TS |
215 | if (s->direction == AMDTP_OUT_STREAM) { |
216 | if (s->dual_wire) | |
217 | s->transfer_samples = amdtp_write_s16_dualwire; | |
218 | else | |
219 | s->transfer_samples = amdtp_write_s16; | |
220 | break; | |
221 | } | |
222 | WARN_ON(1); | |
223 | /* fall through */ | |
31ef9134 | 224 | case SNDRV_PCM_FORMAT_S32: |
2b3fc456 TS |
225 | if (s->direction == AMDTP_OUT_STREAM) { |
226 | if (s->dual_wire) | |
227 | s->transfer_samples = amdtp_write_s32_dualwire; | |
228 | else | |
229 | s->transfer_samples = amdtp_write_s32; | |
230 | } else { | |
231 | if (s->dual_wire) | |
232 | s->transfer_samples = amdtp_read_s32_dualwire; | |
233 | else | |
234 | s->transfer_samples = amdtp_read_s32; | |
235 | } | |
31ef9134 CL |
236 | break; |
237 | } | |
238 | } | |
be4a2894 | 239 | EXPORT_SYMBOL(amdtp_stream_set_pcm_format); |
31ef9134 | 240 | |
76fb8789 | 241 | /** |
be4a2894 TS |
242 | * amdtp_stream_pcm_prepare - prepare PCM device for running |
243 | * @s: the AMDTP stream | |
76fb8789 CL |
244 | * |
245 | * This function should be called from the PCM device's .prepare callback. | |
246 | */ | |
be4a2894 | 247 | void amdtp_stream_pcm_prepare(struct amdtp_stream *s) |
76fb8789 CL |
248 | { |
249 | tasklet_kill(&s->period_tasklet); | |
250 | s->pcm_buffer_pointer = 0; | |
251 | s->pcm_period_pointer = 0; | |
92b862c7 | 252 | s->pointer_flush = true; |
76fb8789 | 253 | } |
be4a2894 | 254 | EXPORT_SYMBOL(amdtp_stream_pcm_prepare); |
76fb8789 | 255 | |
be4a2894 | 256 | static unsigned int calculate_data_blocks(struct amdtp_stream *s) |
31ef9134 CL |
257 | { |
258 | unsigned int phase, data_blocks; | |
259 | ||
ccccad86 TS |
260 | if (s->flags & CIP_BLOCKING) |
261 | data_blocks = s->syt_interval; | |
262 | else if (!cip_sfc_is_base_44100(s->sfc)) { | |
31ef9134 CL |
263 | /* Sample_rate / 8000 is an integer, and precomputed. */ |
264 | data_blocks = s->data_block_state; | |
265 | } else { | |
266 | phase = s->data_block_state; | |
267 | ||
268 | /* | |
269 | * This calculates the number of data blocks per packet so that | |
270 | * 1) the overall rate is correct and exactly synchronized to | |
271 | * the bus clock, and | |
272 | * 2) packets with a rounded-up number of blocks occur as early | |
273 | * as possible in the sequence (to prevent underruns of the | |
274 | * device's buffer). | |
275 | */ | |
276 | if (s->sfc == CIP_SFC_44100) | |
277 | /* 6 6 5 6 5 6 5 ... */ | |
278 | data_blocks = 5 + ((phase & 1) ^ | |
279 | (phase == 0 || phase >= 40)); | |
280 | else | |
281 | /* 12 11 11 11 11 ... or 23 22 22 22 22 ... */ | |
282 | data_blocks = 11 * (s->sfc >> 1) + (phase == 0); | |
283 | if (++phase >= (80 >> (s->sfc >> 1))) | |
284 | phase = 0; | |
285 | s->data_block_state = phase; | |
286 | } | |
287 | ||
288 | return data_blocks; | |
289 | } | |
290 | ||
be4a2894 | 291 | static unsigned int calculate_syt(struct amdtp_stream *s, |
31ef9134 CL |
292 | unsigned int cycle) |
293 | { | |
294 | unsigned int syt_offset, phase, index, syt; | |
295 | ||
296 | if (s->last_syt_offset < TICKS_PER_CYCLE) { | |
297 | if (!cip_sfc_is_base_44100(s->sfc)) | |
298 | syt_offset = s->last_syt_offset + s->syt_offset_state; | |
299 | else { | |
300 | /* | |
301 | * The time, in ticks, of the n'th SYT_INTERVAL sample is: | |
302 | * n * SYT_INTERVAL * 24576000 / sample_rate | |
303 | * Modulo TICKS_PER_CYCLE, the difference between successive | |
304 | * elements is about 1386.23. Rounding the results of this | |
305 | * formula to the SYT precision results in a sequence of | |
306 | * differences that begins with: | |
307 | * 1386 1386 1387 1386 1386 1386 1387 1386 1386 1386 1387 ... | |
308 | * This code generates _exactly_ the same sequence. | |
309 | */ | |
310 | phase = s->syt_offset_state; | |
311 | index = phase % 13; | |
312 | syt_offset = s->last_syt_offset; | |
313 | syt_offset += 1386 + ((index && !(index & 3)) || | |
314 | phase == 146); | |
315 | if (++phase >= 147) | |
316 | phase = 0; | |
317 | s->syt_offset_state = phase; | |
318 | } | |
319 | } else | |
320 | syt_offset = s->last_syt_offset - TICKS_PER_CYCLE; | |
321 | s->last_syt_offset = syt_offset; | |
322 | ||
be454366 | 323 | if (syt_offset < TICKS_PER_CYCLE) { |
e84d15f6 | 324 | syt_offset += s->transfer_delay; |
be454366 CL |
325 | syt = (cycle + syt_offset / TICKS_PER_CYCLE) << 12; |
326 | syt += syt_offset % TICKS_PER_CYCLE; | |
31ef9134 | 327 | |
b445db44 | 328 | return syt & CIP_SYT_MASK; |
be454366 | 329 | } else { |
b445db44 | 330 | return CIP_SYT_NO_INFO; |
be454366 | 331 | } |
31ef9134 CL |
332 | } |
333 | ||
be4a2894 | 334 | static void amdtp_write_s32(struct amdtp_stream *s, |
31ef9134 CL |
335 | struct snd_pcm_substream *pcm, |
336 | __be32 *buffer, unsigned int frames) | |
337 | { | |
338 | struct snd_pcm_runtime *runtime = pcm->runtime; | |
339 | unsigned int channels, remaining_frames, frame_step, i, c; | |
340 | const u32 *src; | |
341 | ||
342 | channels = s->pcm_channels; | |
343 | src = (void *)runtime->dma_area + | |
e84841f9 | 344 | frames_to_bytes(runtime, s->pcm_buffer_pointer); |
31ef9134 CL |
345 | remaining_frames = runtime->buffer_size - s->pcm_buffer_pointer; |
346 | frame_step = s->data_block_quadlets - channels; | |
347 | ||
348 | for (i = 0; i < frames; ++i) { | |
349 | for (c = 0; c < channels; ++c) { | |
350 | *buffer = cpu_to_be32((*src >> 8) | 0x40000000); | |
351 | src++; | |
352 | buffer++; | |
353 | } | |
354 | buffer += frame_step; | |
355 | if (--remaining_frames == 0) | |
356 | src = (void *)runtime->dma_area; | |
357 | } | |
358 | } | |
359 | ||
be4a2894 | 360 | static void amdtp_write_s16(struct amdtp_stream *s, |
31ef9134 CL |
361 | struct snd_pcm_substream *pcm, |
362 | __be32 *buffer, unsigned int frames) | |
363 | { | |
364 | struct snd_pcm_runtime *runtime = pcm->runtime; | |
365 | unsigned int channels, remaining_frames, frame_step, i, c; | |
366 | const u16 *src; | |
367 | ||
368 | channels = s->pcm_channels; | |
369 | src = (void *)runtime->dma_area + | |
e84841f9 | 370 | frames_to_bytes(runtime, s->pcm_buffer_pointer); |
31ef9134 CL |
371 | remaining_frames = runtime->buffer_size - s->pcm_buffer_pointer; |
372 | frame_step = s->data_block_quadlets - channels; | |
373 | ||
374 | for (i = 0; i < frames; ++i) { | |
375 | for (c = 0; c < channels; ++c) { | |
376 | *buffer = cpu_to_be32((*src << 8) | 0x40000000); | |
377 | src++; | |
378 | buffer++; | |
379 | } | |
380 | buffer += frame_step; | |
381 | if (--remaining_frames == 0) | |
382 | src = (void *)runtime->dma_area; | |
383 | } | |
384 | } | |
385 | ||
be4a2894 | 386 | static void amdtp_write_s32_dualwire(struct amdtp_stream *s, |
a7304e3b CL |
387 | struct snd_pcm_substream *pcm, |
388 | __be32 *buffer, unsigned int frames) | |
389 | { | |
390 | struct snd_pcm_runtime *runtime = pcm->runtime; | |
391 | unsigned int channels, frame_adjust_1, frame_adjust_2, i, c; | |
392 | const u32 *src; | |
393 | ||
394 | channels = s->pcm_channels; | |
395 | src = (void *)runtime->dma_area + | |
396 | s->pcm_buffer_pointer * (runtime->frame_bits / 8); | |
397 | frame_adjust_1 = channels - 1; | |
398 | frame_adjust_2 = 1 - (s->data_block_quadlets - channels); | |
399 | ||
400 | channels /= 2; | |
401 | for (i = 0; i < frames; ++i) { | |
402 | for (c = 0; c < channels; ++c) { | |
403 | *buffer = cpu_to_be32((*src >> 8) | 0x40000000); | |
404 | src++; | |
405 | buffer += 2; | |
406 | } | |
407 | buffer -= frame_adjust_1; | |
408 | for (c = 0; c < channels; ++c) { | |
409 | *buffer = cpu_to_be32((*src >> 8) | 0x40000000); | |
410 | src++; | |
411 | buffer += 2; | |
412 | } | |
413 | buffer -= frame_adjust_2; | |
414 | } | |
415 | } | |
416 | ||
be4a2894 | 417 | static void amdtp_write_s16_dualwire(struct amdtp_stream *s, |
a7304e3b CL |
418 | struct snd_pcm_substream *pcm, |
419 | __be32 *buffer, unsigned int frames) | |
420 | { | |
421 | struct snd_pcm_runtime *runtime = pcm->runtime; | |
422 | unsigned int channels, frame_adjust_1, frame_adjust_2, i, c; | |
423 | const u16 *src; | |
424 | ||
425 | channels = s->pcm_channels; | |
426 | src = (void *)runtime->dma_area + | |
427 | s->pcm_buffer_pointer * (runtime->frame_bits / 8); | |
428 | frame_adjust_1 = channels - 1; | |
429 | frame_adjust_2 = 1 - (s->data_block_quadlets - channels); | |
430 | ||
431 | channels /= 2; | |
432 | for (i = 0; i < frames; ++i) { | |
433 | for (c = 0; c < channels; ++c) { | |
434 | *buffer = cpu_to_be32((*src << 8) | 0x40000000); | |
435 | src++; | |
436 | buffer += 2; | |
437 | } | |
438 | buffer -= frame_adjust_1; | |
439 | for (c = 0; c < channels; ++c) { | |
440 | *buffer = cpu_to_be32((*src << 8) | 0x40000000); | |
441 | src++; | |
442 | buffer += 2; | |
443 | } | |
444 | buffer -= frame_adjust_2; | |
445 | } | |
446 | } | |
447 | ||
2b3fc456 TS |
448 | static void amdtp_read_s32(struct amdtp_stream *s, |
449 | struct snd_pcm_substream *pcm, | |
450 | __be32 *buffer, unsigned int frames) | |
451 | { | |
452 | struct snd_pcm_runtime *runtime = pcm->runtime; | |
453 | unsigned int channels, remaining_frames, i, c; | |
454 | u32 *dst; | |
455 | ||
456 | channels = s->pcm_channels; | |
457 | dst = (void *)runtime->dma_area + | |
458 | frames_to_bytes(runtime, s->pcm_buffer_pointer); | |
459 | remaining_frames = runtime->buffer_size - s->pcm_buffer_pointer; | |
460 | ||
461 | for (i = 0; i < frames; ++i) { | |
462 | for (c = 0; c < channels; ++c) { | |
463 | *dst = be32_to_cpu(buffer[c]) << 8; | |
464 | dst++; | |
465 | } | |
466 | buffer += s->data_block_quadlets; | |
467 | if (--remaining_frames == 0) | |
468 | dst = (void *)runtime->dma_area; | |
469 | } | |
470 | } | |
471 | ||
472 | static void amdtp_read_s32_dualwire(struct amdtp_stream *s, | |
473 | struct snd_pcm_substream *pcm, | |
474 | __be32 *buffer, unsigned int frames) | |
475 | { | |
476 | struct snd_pcm_runtime *runtime = pcm->runtime; | |
477 | unsigned int channels, remaining_frames, i, c; | |
478 | u32 *dst; | |
479 | ||
480 | dst = (void *)runtime->dma_area + | |
481 | frames_to_bytes(runtime, s->pcm_buffer_pointer); | |
482 | remaining_frames = runtime->buffer_size - s->pcm_buffer_pointer; | |
483 | channels = s->pcm_channels / 2; | |
484 | ||
485 | for (i = 0; i < frames; ++i) { | |
486 | for (c = 0; c < channels; ++c) { | |
487 | *dst = be32_to_cpu(buffer[c * 2]) << 8; | |
488 | dst++; | |
489 | } | |
490 | buffer += 1; | |
491 | for (c = 0; c < channels; ++c) { | |
492 | *dst = be32_to_cpu(buffer[c * 2]) << 8; | |
493 | dst++; | |
494 | } | |
495 | buffer += s->data_block_quadlets - 1; | |
496 | if (--remaining_frames == 0) | |
497 | dst = (void *)runtime->dma_area; | |
498 | } | |
499 | } | |
500 | ||
be4a2894 | 501 | static void amdtp_fill_pcm_silence(struct amdtp_stream *s, |
31ef9134 CL |
502 | __be32 *buffer, unsigned int frames) |
503 | { | |
504 | unsigned int i, c; | |
505 | ||
506 | for (i = 0; i < frames; ++i) { | |
507 | for (c = 0; c < s->pcm_channels; ++c) | |
508 | buffer[c] = cpu_to_be32(0x40000000); | |
509 | buffer += s->data_block_quadlets; | |
510 | } | |
511 | } | |
512 | ||
be4a2894 | 513 | static void amdtp_fill_midi(struct amdtp_stream *s, |
31ef9134 CL |
514 | __be32 *buffer, unsigned int frames) |
515 | { | |
83d8d72d TS |
516 | unsigned int f, port; |
517 | u8 *b; | |
518 | ||
519 | for (f = 0; f < frames; f++) { | |
520 | buffer[s->pcm_channels + 1] = 0; | |
521 | b = (u8 *)&buffer[s->pcm_channels + 1]; | |
522 | ||
523 | port = (s->data_block_counter + f) % 8; | |
524 | if ((s->midi[port] == NULL) || | |
525 | (snd_rawmidi_transmit(s->midi[port], b + 1, 1) <= 0)) | |
526 | b[0] = 0x80; | |
527 | else | |
528 | b[0] = 0x81; | |
529 | ||
530 | buffer += s->data_block_quadlets; | |
531 | } | |
532 | } | |
533 | ||
534 | static void amdtp_pull_midi(struct amdtp_stream *s, | |
535 | __be32 *buffer, unsigned int frames) | |
536 | { | |
537 | unsigned int f, port; | |
538 | int len; | |
539 | u8 *b; | |
540 | ||
541 | for (f = 0; f < frames; f++) { | |
542 | port = (s->data_block_counter + f) % 8; | |
543 | b = (u8 *)&buffer[s->pcm_channels + 1]; | |
31ef9134 | 544 | |
83d8d72d TS |
545 | len = b[0] - 0x80; |
546 | if ((1 <= len) && (len <= 3) && (s->midi[port])) | |
547 | snd_rawmidi_receive(s->midi[port], b + 1, len); | |
548 | ||
549 | buffer += s->data_block_quadlets; | |
550 | } | |
31ef9134 CL |
551 | } |
552 | ||
4b7da117 TS |
553 | static void update_pcm_pointers(struct amdtp_stream *s, |
554 | struct snd_pcm_substream *pcm, | |
555 | unsigned int frames) | |
556 | { unsigned int ptr; | |
557 | ||
558 | if (s->dual_wire) | |
559 | frames *= 2; | |
560 | ||
561 | ptr = s->pcm_buffer_pointer + frames; | |
562 | if (ptr >= pcm->runtime->buffer_size) | |
563 | ptr -= pcm->runtime->buffer_size; | |
564 | ACCESS_ONCE(s->pcm_buffer_pointer) = ptr; | |
565 | ||
566 | s->pcm_period_pointer += frames; | |
567 | if (s->pcm_period_pointer >= pcm->runtime->period_size) { | |
568 | s->pcm_period_pointer -= pcm->runtime->period_size; | |
569 | s->pointer_flush = false; | |
570 | tasklet_hi_schedule(&s->period_tasklet); | |
571 | } | |
572 | } | |
573 | ||
574 | static void pcm_period_tasklet(unsigned long data) | |
575 | { | |
576 | struct amdtp_stream *s = (void *)data; | |
577 | struct snd_pcm_substream *pcm = ACCESS_ONCE(s->pcm); | |
578 | ||
579 | if (pcm) | |
580 | snd_pcm_period_elapsed(pcm); | |
581 | } | |
582 | ||
583 | static int queue_packet(struct amdtp_stream *s, | |
584 | unsigned int header_length, | |
585 | unsigned int payload_length, bool skip) | |
586 | { | |
587 | struct fw_iso_packet p = {0}; | |
588 | int err; | |
589 | ||
590 | p.interrupt = IS_ALIGNED(s->packet_index + 1, INTERRUPT_INTERVAL); | |
591 | p.tag = TAG_CIP; | |
592 | p.header_length = header_length; | |
593 | p.payload_length = (!skip) ? payload_length : 0; | |
594 | p.skip = skip; | |
595 | err = fw_iso_context_queue(s->context, &p, &s->buffer.iso_buffer, | |
596 | s->buffer.packets[s->packet_index].offset); | |
597 | if (err < 0) { | |
598 | dev_err(&s->unit->device, "queueing error: %d\n", err); | |
599 | goto end; | |
600 | } | |
601 | ||
602 | if (++s->packet_index >= QUEUE_LENGTH) | |
603 | s->packet_index = 0; | |
604 | end: | |
605 | return err; | |
606 | } | |
607 | ||
608 | static inline int queue_out_packet(struct amdtp_stream *s, | |
609 | unsigned int payload_length, bool skip) | |
610 | { | |
611 | return queue_packet(s, OUT_PACKET_HEADER_SIZE, | |
612 | payload_length, skip); | |
613 | } | |
614 | ||
2b3fc456 TS |
615 | static inline int queue_in_packet(struct amdtp_stream *s) |
616 | { | |
617 | return queue_packet(s, IN_PACKET_HEADER_SIZE, | |
618 | amdtp_stream_get_max_payload(s), false); | |
619 | } | |
620 | ||
ccccad86 | 621 | static void handle_out_packet(struct amdtp_stream *s, unsigned int syt) |
31ef9134 CL |
622 | { |
623 | __be32 *buffer; | |
ccccad86 | 624 | unsigned int data_blocks, payload_length; |
31ef9134 | 625 | struct snd_pcm_substream *pcm; |
31ef9134 | 626 | |
ec00f5e4 CL |
627 | if (s->packet_index < 0) |
628 | return; | |
ec00f5e4 | 629 | |
82755abf | 630 | /* this module generate empty packet for 'no data' */ |
ccccad86 | 631 | if (!(s->flags & CIP_BLOCKING) || (syt != CIP_SYT_NO_INFO)) |
e84d15f6 | 632 | data_blocks = calculate_data_blocks(s); |
82755abf TS |
633 | else |
634 | data_blocks = 0; | |
31ef9134 | 635 | |
ccccad86 | 636 | buffer = s->buffer.packets[s->packet_index].buffer; |
31ef9134 | 637 | buffer[0] = cpu_to_be32(ACCESS_ONCE(s->source_node_id_field) | |
b445db44 | 638 | (s->data_block_quadlets << AMDTP_DBS_SHIFT) | |
31ef9134 CL |
639 | s->data_block_counter); |
640 | buffer[1] = cpu_to_be32(CIP_EOH | CIP_FMT_AM | AMDTP_FDF_AM824 | | |
b445db44 | 641 | (s->sfc << CIP_FDF_SFC_SHIFT) | syt); |
31ef9134 CL |
642 | buffer += 2; |
643 | ||
644 | pcm = ACCESS_ONCE(s->pcm); | |
645 | if (pcm) | |
646 | s->transfer_samples(s, pcm, buffer, data_blocks); | |
647 | else | |
648 | amdtp_fill_pcm_silence(s, buffer, data_blocks); | |
649 | if (s->midi_ports) | |
650 | amdtp_fill_midi(s, buffer, data_blocks); | |
651 | ||
652 | s->data_block_counter = (s->data_block_counter + data_blocks) & 0xff; | |
653 | ||
4b7da117 TS |
654 | payload_length = 8 + data_blocks * 4 * s->data_block_quadlets; |
655 | if (queue_out_packet(s, payload_length, false) < 0) { | |
ec00f5e4 | 656 | s->packet_index = -1; |
be4a2894 | 657 | amdtp_stream_pcm_abort(s); |
ec00f5e4 CL |
658 | return; |
659 | } | |
31ef9134 | 660 | |
76fb8789 | 661 | if (pcm) |
4b7da117 | 662 | update_pcm_pointers(s, pcm, data_blocks); |
76fb8789 CL |
663 | } |
664 | ||
2b3fc456 TS |
665 | static void handle_in_packet(struct amdtp_stream *s, |
666 | unsigned int payload_quadlets, | |
667 | __be32 *buffer) | |
668 | { | |
669 | u32 cip_header[2]; | |
670 | unsigned int data_blocks, data_block_quadlets, data_block_counter; | |
671 | struct snd_pcm_substream *pcm = NULL; | |
672 | ||
673 | cip_header[0] = be32_to_cpu(buffer[0]); | |
674 | cip_header[1] = be32_to_cpu(buffer[1]); | |
675 | ||
676 | /* | |
677 | * This module supports 'Two-quadlet CIP header with SYT field'. | |
678 | * For convinience, also check FMT field is AM824 or not. | |
679 | */ | |
680 | if (((cip_header[0] & CIP_EOH_MASK) == CIP_EOH) || | |
681 | ((cip_header[1] & CIP_EOH_MASK) != CIP_EOH) || | |
682 | ((cip_header[1] & CIP_FMT_MASK) != CIP_FMT_AM)) { | |
683 | dev_info_ratelimited(&s->unit->device, | |
684 | "Invalid CIP header for AMDTP: %08X:%08X\n", | |
685 | cip_header[0], cip_header[1]); | |
686 | goto end; | |
687 | } | |
688 | ||
689 | /* Calculate data blocks */ | |
690 | if (payload_quadlets < 3 || | |
691 | ((cip_header[1] & CIP_FDF_MASK) == | |
692 | (AMDTP_FDF_NO_DATA << CIP_FDF_SFC_SHIFT))) { | |
693 | data_blocks = 0; | |
694 | } else { | |
695 | data_block_quadlets = | |
696 | (cip_header[0] & AMDTP_DBS_MASK) >> AMDTP_DBS_SHIFT; | |
697 | /* avoid division by zero */ | |
698 | if (data_block_quadlets == 0) { | |
699 | dev_info_ratelimited(&s->unit->device, | |
700 | "Detect invalid value in dbs field: %08X\n", | |
701 | cip_header[0]); | |
702 | goto err; | |
703 | } | |
704 | ||
705 | data_blocks = (payload_quadlets - 2) / data_block_quadlets; | |
706 | } | |
707 | ||
708 | /* Check data block counter continuity */ | |
709 | data_block_counter = cip_header[0] & AMDTP_DBC_MASK; | |
710 | if (data_block_counter != s->data_block_counter) { | |
711 | dev_info(&s->unit->device, | |
712 | "Detect discontinuity of CIP: %02X %02X\n", | |
713 | s->data_block_counter, data_block_counter); | |
714 | goto err; | |
715 | } | |
716 | ||
717 | if (data_blocks > 0) { | |
718 | buffer += 2; | |
719 | ||
720 | pcm = ACCESS_ONCE(s->pcm); | |
721 | if (pcm) | |
722 | s->transfer_samples(s, pcm, buffer, data_blocks); | |
83d8d72d TS |
723 | |
724 | if (s->midi_ports) | |
725 | amdtp_pull_midi(s, buffer, data_blocks); | |
2b3fc456 TS |
726 | } |
727 | ||
728 | s->data_block_counter = (data_block_counter + data_blocks) & 0xff; | |
729 | end: | |
730 | if (queue_in_packet(s) < 0) | |
731 | goto err; | |
732 | ||
733 | if (pcm) | |
734 | update_pcm_pointers(s, pcm, data_blocks); | |
735 | ||
736 | return; | |
737 | err: | |
738 | s->packet_index = -1; | |
739 | amdtp_stream_pcm_abort(s); | |
740 | } | |
741 | ||
4b7da117 TS |
742 | static void out_stream_callback(struct fw_iso_context *context, u32 cycle, |
743 | size_t header_length, void *header, | |
744 | void *private_data) | |
31ef9134 | 745 | { |
be4a2894 | 746 | struct amdtp_stream *s = private_data; |
ccccad86 | 747 | unsigned int i, syt, packets = header_length / 4; |
31ef9134 CL |
748 | |
749 | /* | |
750 | * Compute the cycle of the last queued packet. | |
751 | * (We need only the four lowest bits for the SYT, so we can ignore | |
752 | * that bits 0-11 must wrap around at 3072.) | |
753 | */ | |
754 | cycle += QUEUE_LENGTH - packets; | |
755 | ||
ccccad86 TS |
756 | for (i = 0; i < packets; ++i) { |
757 | syt = calculate_syt(s, ++cycle); | |
758 | handle_out_packet(s, syt); | |
759 | } | |
13882a82 | 760 | fw_iso_context_queue_flush(s->context); |
31ef9134 CL |
761 | } |
762 | ||
2b3fc456 TS |
763 | static void in_stream_callback(struct fw_iso_context *context, u32 cycle, |
764 | size_t header_length, void *header, | |
765 | void *private_data) | |
766 | { | |
767 | struct amdtp_stream *s = private_data; | |
768 | unsigned int p, packets, payload_quadlets; | |
769 | __be32 *buffer, *headers = header; | |
770 | ||
771 | /* The number of packets in buffer */ | |
772 | packets = header_length / IN_PACKET_HEADER_SIZE; | |
773 | ||
774 | for (p = 0; p < packets; p++) { | |
775 | if (s->packet_index < 0) | |
776 | return; | |
777 | buffer = s->buffer.packets[s->packet_index].buffer; | |
778 | ||
779 | /* The number of quadlets in this packet */ | |
780 | payload_quadlets = | |
781 | (be32_to_cpu(headers[p]) >> ISO_DATA_LENGTH_SHIFT) / 4; | |
782 | handle_in_packet(s, payload_quadlets, buffer); | |
783 | } | |
784 | ||
785 | fw_iso_context_queue_flush(s->context); | |
786 | } | |
787 | ||
31ef9134 | 788 | /** |
be4a2894 TS |
789 | * amdtp_stream_start - start transferring packets |
790 | * @s: the AMDTP stream to start | |
31ef9134 CL |
791 | * @channel: the isochronous channel on the bus |
792 | * @speed: firewire speed code | |
793 | * | |
794 | * The stream cannot be started until it has been configured with | |
be4a2894 TS |
795 | * amdtp_stream_set_parameters() and it must be started before any PCM or MIDI |
796 | * device can be started. | |
31ef9134 | 797 | */ |
be4a2894 | 798 | int amdtp_stream_start(struct amdtp_stream *s, int channel, int speed) |
31ef9134 CL |
799 | { |
800 | static const struct { | |
801 | unsigned int data_block; | |
802 | unsigned int syt_offset; | |
803 | } initial_state[] = { | |
804 | [CIP_SFC_32000] = { 4, 3072 }, | |
805 | [CIP_SFC_48000] = { 6, 1024 }, | |
806 | [CIP_SFC_96000] = { 12, 1024 }, | |
807 | [CIP_SFC_192000] = { 24, 1024 }, | |
808 | [CIP_SFC_44100] = { 0, 67 }, | |
809 | [CIP_SFC_88200] = { 0, 67 }, | |
810 | [CIP_SFC_176400] = { 0, 67 }, | |
811 | }; | |
2b3fc456 TS |
812 | unsigned int header_size; |
813 | enum dma_data_direction dir; | |
814 | fw_iso_callback_t cb; | |
815 | int type, err; | |
31ef9134 CL |
816 | |
817 | mutex_lock(&s->mutex); | |
818 | ||
be4a2894 | 819 | if (WARN_ON(amdtp_stream_running(s) || |
4b7da117 | 820 | (s->data_block_quadlets < 1))) { |
31ef9134 CL |
821 | err = -EBADFD; |
822 | goto err_unlock; | |
823 | } | |
824 | ||
4b7da117 | 825 | s->data_block_counter = 0; |
31ef9134 CL |
826 | s->data_block_state = initial_state[s->sfc].data_block; |
827 | s->syt_offset_state = initial_state[s->sfc].syt_offset; | |
828 | s->last_syt_offset = TICKS_PER_CYCLE; | |
829 | ||
2b3fc456 TS |
830 | /* initialize packet buffer */ |
831 | if (s->direction == AMDTP_IN_STREAM) { | |
832 | dir = DMA_FROM_DEVICE; | |
833 | type = FW_ISO_CONTEXT_RECEIVE; | |
834 | header_size = IN_PACKET_HEADER_SIZE; | |
835 | cb = in_stream_callback; | |
836 | } else { | |
837 | dir = DMA_TO_DEVICE; | |
838 | type = FW_ISO_CONTEXT_TRANSMIT; | |
839 | header_size = OUT_PACKET_HEADER_SIZE; | |
840 | cb = out_stream_callback; | |
841 | } | |
31ef9134 | 842 | err = iso_packets_buffer_init(&s->buffer, s->unit, QUEUE_LENGTH, |
2b3fc456 | 843 | amdtp_stream_get_max_payload(s), dir); |
31ef9134 CL |
844 | if (err < 0) |
845 | goto err_unlock; | |
846 | ||
847 | s->context = fw_iso_context_create(fw_parent_device(s->unit)->card, | |
2b3fc456 TS |
848 | type, channel, speed, header_size, |
849 | cb, s); | |
31ef9134 CL |
850 | if (IS_ERR(s->context)) { |
851 | err = PTR_ERR(s->context); | |
852 | if (err == -EBUSY) | |
853 | dev_err(&s->unit->device, | |
be4a2894 | 854 | "no free stream on this controller\n"); |
31ef9134 CL |
855 | goto err_buffer; |
856 | } | |
857 | ||
be4a2894 | 858 | amdtp_stream_update(s); |
31ef9134 | 859 | |
ec00f5e4 | 860 | s->packet_index = 0; |
4b7da117 | 861 | do { |
2b3fc456 TS |
862 | if (s->direction == AMDTP_IN_STREAM) |
863 | err = queue_in_packet(s); | |
864 | else | |
865 | err = queue_out_packet(s, 0, true); | |
4b7da117 TS |
866 | if (err < 0) |
867 | goto err_context; | |
868 | } while (s->packet_index > 0); | |
31ef9134 | 869 | |
2b3fc456 TS |
870 | /* NOTE: TAG1 matches CIP. This just affects in stream. */ |
871 | err = fw_iso_context_start(s->context, -1, 0, | |
872 | FW_ISO_CONTEXT_MATCH_TAG1); | |
31ef9134 CL |
873 | if (err < 0) |
874 | goto err_context; | |
875 | ||
876 | mutex_unlock(&s->mutex); | |
877 | ||
878 | return 0; | |
879 | ||
880 | err_context: | |
881 | fw_iso_context_destroy(s->context); | |
882 | s->context = ERR_PTR(-1); | |
883 | err_buffer: | |
884 | iso_packets_buffer_destroy(&s->buffer, s->unit); | |
885 | err_unlock: | |
886 | mutex_unlock(&s->mutex); | |
887 | ||
888 | return err; | |
889 | } | |
be4a2894 | 890 | EXPORT_SYMBOL(amdtp_stream_start); |
31ef9134 | 891 | |
e9148ddd | 892 | /** |
be4a2894 TS |
893 | * amdtp_stream_pcm_pointer - get the PCM buffer position |
894 | * @s: the AMDTP stream that transports the PCM data | |
e9148ddd CL |
895 | * |
896 | * Returns the current buffer position, in frames. | |
897 | */ | |
be4a2894 | 898 | unsigned long amdtp_stream_pcm_pointer(struct amdtp_stream *s) |
e9148ddd | 899 | { |
92b862c7 CL |
900 | /* this optimization is allowed to be racy */ |
901 | if (s->pointer_flush) | |
902 | fw_iso_context_flush_completions(s->context); | |
903 | else | |
904 | s->pointer_flush = true; | |
e9148ddd CL |
905 | |
906 | return ACCESS_ONCE(s->pcm_buffer_pointer); | |
907 | } | |
be4a2894 | 908 | EXPORT_SYMBOL(amdtp_stream_pcm_pointer); |
e9148ddd | 909 | |
31ef9134 | 910 | /** |
be4a2894 TS |
911 | * amdtp_stream_update - update the stream after a bus reset |
912 | * @s: the AMDTP stream | |
31ef9134 | 913 | */ |
be4a2894 | 914 | void amdtp_stream_update(struct amdtp_stream *s) |
31ef9134 CL |
915 | { |
916 | ACCESS_ONCE(s->source_node_id_field) = | |
917 | (fw_parent_device(s->unit)->card->node_id & 0x3f) << 24; | |
918 | } | |
be4a2894 | 919 | EXPORT_SYMBOL(amdtp_stream_update); |
31ef9134 CL |
920 | |
921 | /** | |
be4a2894 TS |
922 | * amdtp_stream_stop - stop sending packets |
923 | * @s: the AMDTP stream to stop | |
31ef9134 CL |
924 | * |
925 | * All PCM and MIDI devices of the stream must be stopped before the stream | |
926 | * itself can be stopped. | |
927 | */ | |
be4a2894 | 928 | void amdtp_stream_stop(struct amdtp_stream *s) |
31ef9134 CL |
929 | { |
930 | mutex_lock(&s->mutex); | |
931 | ||
be4a2894 | 932 | if (!amdtp_stream_running(s)) { |
31ef9134 CL |
933 | mutex_unlock(&s->mutex); |
934 | return; | |
935 | } | |
936 | ||
76fb8789 | 937 | tasklet_kill(&s->period_tasklet); |
31ef9134 CL |
938 | fw_iso_context_stop(s->context); |
939 | fw_iso_context_destroy(s->context); | |
940 | s->context = ERR_PTR(-1); | |
941 | iso_packets_buffer_destroy(&s->buffer, s->unit); | |
942 | ||
943 | mutex_unlock(&s->mutex); | |
944 | } | |
be4a2894 | 945 | EXPORT_SYMBOL(amdtp_stream_stop); |
31ef9134 CL |
946 | |
947 | /** | |
be4a2894 | 948 | * amdtp_stream_pcm_abort - abort the running PCM device |
31ef9134 CL |
949 | * @s: the AMDTP stream about to be stopped |
950 | * | |
951 | * If the isochronous stream needs to be stopped asynchronously, call this | |
952 | * function first to stop the PCM device. | |
953 | */ | |
be4a2894 | 954 | void amdtp_stream_pcm_abort(struct amdtp_stream *s) |
31ef9134 CL |
955 | { |
956 | struct snd_pcm_substream *pcm; | |
957 | ||
958 | pcm = ACCESS_ONCE(s->pcm); | |
959 | if (pcm) { | |
960 | snd_pcm_stream_lock_irq(pcm); | |
961 | if (snd_pcm_running(pcm)) | |
962 | snd_pcm_stop(pcm, SNDRV_PCM_STATE_XRUN); | |
963 | snd_pcm_stream_unlock_irq(pcm); | |
964 | } | |
965 | } | |
be4a2894 | 966 | EXPORT_SYMBOL(amdtp_stream_pcm_abort); |