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1da177e4 LT |
1 | /* |
2 | * Routines for control of the AK4114 via I2C and 4-wire serial interface | |
3 | * IEC958 (S/PDIF) receiver by Asahi Kasei | |
c1017a4c | 4 | * Copyright (c) by Jaroslav Kysela <perex@perex.cz> |
1da177e4 LT |
5 | * |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | * | |
21 | */ | |
22 | ||
1da177e4 LT |
23 | #include <linux/slab.h> |
24 | #include <linux/delay.h> | |
da155d5b | 25 | #include <linux/module.h> |
1da177e4 LT |
26 | #include <sound/core.h> |
27 | #include <sound/control.h> | |
28 | #include <sound/pcm.h> | |
29 | #include <sound/ak4114.h> | |
30 | #include <sound/asoundef.h> | |
fdafad6f | 31 | #include <sound/info.h> |
1da177e4 | 32 | |
c1017a4c | 33 | MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); |
1da177e4 LT |
34 | MODULE_DESCRIPTION("AK4114 IEC958 (S/PDIF) receiver by Asahi Kasei"); |
35 | MODULE_LICENSE("GPL"); | |
36 | ||
37 | #define AK4114_ADDR 0x00 /* fixed address */ | |
38 | ||
c4028958 | 39 | static void ak4114_stats(struct work_struct *work); |
51354ae3 | 40 | static void ak4114_init_regs(struct ak4114 *chip); |
1da177e4 | 41 | |
97f02e05 | 42 | static void reg_write(struct ak4114 *ak4114, unsigned char reg, unsigned char val) |
1da177e4 LT |
43 | { |
44 | ak4114->write(ak4114->private_data, reg, val); | |
45 | if (reg <= AK4114_REG_INT1_MASK) | |
46 | ak4114->regmap[reg] = val; | |
1ab774e0 JD |
47 | else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4) |
48 | ak4114->txcsb[reg-AK4114_REG_TXCSB0] = val; | |
1da177e4 LT |
49 | } |
50 | ||
97f02e05 | 51 | static inline unsigned char reg_read(struct ak4114 *ak4114, unsigned char reg) |
1da177e4 LT |
52 | { |
53 | return ak4114->read(ak4114->private_data, reg); | |
54 | } | |
55 | ||
56 | #if 0 | |
97f02e05 | 57 | static void reg_dump(struct ak4114 *ak4114) |
1da177e4 LT |
58 | { |
59 | int i; | |
60 | ||
99b359ba | 61 | printk(KERN_DEBUG "AK4114 REG DUMP:\n"); |
1da177e4 | 62 | for (i = 0; i < 0x20; i++) |
e12483e0 | 63 | printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4114, i), i < ARRAY_SIZE(ak4114->regmap) ? ak4114->regmap[i] : 0); |
1da177e4 LT |
64 | } |
65 | #endif | |
66 | ||
97f02e05 | 67 | static void snd_ak4114_free(struct ak4114 *chip) |
1da177e4 | 68 | { |
4161b450 | 69 | atomic_inc(&chip->wq_processing); /* don't schedule new work */ |
5b84ba26 | 70 | cancel_delayed_work_sync(&chip->work); |
1da177e4 LT |
71 | kfree(chip); |
72 | } | |
73 | ||
97f02e05 | 74 | static int snd_ak4114_dev_free(struct snd_device *device) |
1da177e4 | 75 | { |
97f02e05 | 76 | struct ak4114 *chip = device->device_data; |
1da177e4 LT |
77 | snd_ak4114_free(chip); |
78 | return 0; | |
79 | } | |
80 | ||
97f02e05 | 81 | int snd_ak4114_create(struct snd_card *card, |
1da177e4 | 82 | ak4114_read_t *read, ak4114_write_t *write, |
e12483e0 | 83 | const unsigned char pgm[6], const unsigned char txcsb[5], |
97f02e05 | 84 | void *private_data, struct ak4114 **r_ak4114) |
1da177e4 | 85 | { |
97f02e05 | 86 | struct ak4114 *chip; |
1da177e4 LT |
87 | int err = 0; |
88 | unsigned char reg; | |
97f02e05 | 89 | static struct snd_device_ops ops = { |
1da177e4 LT |
90 | .dev_free = snd_ak4114_dev_free, |
91 | }; | |
92 | ||
561b220a | 93 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 LT |
94 | if (chip == NULL) |
95 | return -ENOMEM; | |
96 | spin_lock_init(&chip->lock); | |
97 | chip->card = card; | |
98 | chip->read = read; | |
99 | chip->write = write; | |
100 | chip->private_data = private_data; | |
3b6baa5a | 101 | INIT_DELAYED_WORK(&chip->work, ak4114_stats); |
4161b450 | 102 | atomic_set(&chip->wq_processing, 0); |
1da177e4 | 103 | |
e12483e0 | 104 | for (reg = 0; reg < 6; reg++) |
1da177e4 LT |
105 | chip->regmap[reg] = pgm[reg]; |
106 | for (reg = 0; reg < 5; reg++) | |
107 | chip->txcsb[reg] = txcsb[reg]; | |
108 | ||
51354ae3 | 109 | ak4114_init_regs(chip); |
1da177e4 LT |
110 | |
111 | chip->rcs0 = reg_read(chip, AK4114_REG_RCS0) & ~(AK4114_QINT | AK4114_CINT); | |
112 | chip->rcs1 = reg_read(chip, AK4114_REG_RCS1); | |
113 | ||
483eb062 | 114 | if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0) |
1da177e4 LT |
115 | goto __fail; |
116 | ||
117 | if (r_ak4114) | |
118 | *r_ak4114 = chip; | |
119 | return 0; | |
120 | ||
121 | __fail: | |
122 | snd_ak4114_free(chip); | |
123 | return err < 0 ? err : -EIO; | |
124 | } | |
125 | ||
97f02e05 | 126 | void snd_ak4114_reg_write(struct ak4114 *chip, unsigned char reg, unsigned char mask, unsigned char val) |
1da177e4 LT |
127 | { |
128 | if (reg <= AK4114_REG_INT1_MASK) | |
129 | reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val); | |
130 | else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4) | |
1ab774e0 JD |
131 | reg_write(chip, reg, |
132 | (chip->txcsb[reg-AK4114_REG_TXCSB0] & ~mask) | val); | |
1da177e4 LT |
133 | } |
134 | ||
51354ae3 | 135 | static void ak4114_init_regs(struct ak4114 *chip) |
1da177e4 LT |
136 | { |
137 | unsigned char old = chip->regmap[AK4114_REG_PWRDN], reg; | |
138 | ||
1da177e4 LT |
139 | /* bring the chip to reset state and powerdown state */ |
140 | reg_write(chip, AK4114_REG_PWRDN, old & ~(AK4114_RST|AK4114_PWN)); | |
141 | udelay(200); | |
142 | /* release reset, but leave powerdown */ | |
143 | reg_write(chip, AK4114_REG_PWRDN, (old | AK4114_RST) & ~AK4114_PWN); | |
144 | udelay(200); | |
e12483e0 | 145 | for (reg = 1; reg < 6; reg++) |
1da177e4 LT |
146 | reg_write(chip, reg, chip->regmap[reg]); |
147 | for (reg = 0; reg < 5; reg++) | |
148 | reg_write(chip, reg + AK4114_REG_TXCSB0, chip->txcsb[reg]); | |
149 | /* release powerdown, everything is initialized now */ | |
150 | reg_write(chip, AK4114_REG_PWRDN, old | AK4114_RST | AK4114_PWN); | |
51354ae3 TI |
151 | } |
152 | ||
153 | void snd_ak4114_reinit(struct ak4114 *chip) | |
154 | { | |
4161b450 TI |
155 | if (atomic_inc_return(&chip->wq_processing) == 1) |
156 | cancel_delayed_work_sync(&chip->work); | |
51354ae3 | 157 | ak4114_init_regs(chip); |
1da177e4 | 158 | /* bring up statistics / event queing */ |
4161b450 | 159 | if (atomic_dec_and_test(&chip->wq_processing)) |
51354ae3 | 160 | schedule_delayed_work(&chip->work, HZ / 10); |
1da177e4 LT |
161 | } |
162 | ||
163 | static unsigned int external_rate(unsigned char rcs1) | |
164 | { | |
165 | switch (rcs1 & (AK4114_FS0|AK4114_FS1|AK4114_FS2|AK4114_FS3)) { | |
166 | case AK4114_FS_32000HZ: return 32000; | |
167 | case AK4114_FS_44100HZ: return 44100; | |
168 | case AK4114_FS_48000HZ: return 48000; | |
169 | case AK4114_FS_88200HZ: return 88200; | |
170 | case AK4114_FS_96000HZ: return 96000; | |
171 | case AK4114_FS_176400HZ: return 176400; | |
172 | case AK4114_FS_192000HZ: return 192000; | |
173 | default: return 0; | |
174 | } | |
175 | } | |
176 | ||
97f02e05 TI |
177 | static int snd_ak4114_in_error_info(struct snd_kcontrol *kcontrol, |
178 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
179 | { |
180 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
181 | uinfo->count = 1; | |
182 | uinfo->value.integer.min = 0; | |
183 | uinfo->value.integer.max = LONG_MAX; | |
184 | return 0; | |
185 | } | |
186 | ||
97f02e05 TI |
187 | static int snd_ak4114_in_error_get(struct snd_kcontrol *kcontrol, |
188 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 189 | { |
97f02e05 | 190 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
191 | long *ptr; |
192 | ||
193 | spin_lock_irq(&chip->lock); | |
194 | ptr = (long *)(((char *)chip) + kcontrol->private_value); | |
195 | ucontrol->value.integer.value[0] = *ptr; | |
196 | *ptr = 0; | |
197 | spin_unlock_irq(&chip->lock); | |
198 | return 0; | |
199 | } | |
200 | ||
a5ce8890 | 201 | #define snd_ak4114_in_bit_info snd_ctl_boolean_mono_info |
1da177e4 | 202 | |
97f02e05 TI |
203 | static int snd_ak4114_in_bit_get(struct snd_kcontrol *kcontrol, |
204 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 205 | { |
97f02e05 | 206 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
207 | unsigned char reg = kcontrol->private_value & 0xff; |
208 | unsigned char bit = (kcontrol->private_value >> 8) & 0xff; | |
209 | unsigned char inv = (kcontrol->private_value >> 31) & 1; | |
210 | ||
211 | ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv; | |
212 | return 0; | |
213 | } | |
214 | ||
97f02e05 TI |
215 | static int snd_ak4114_rate_info(struct snd_kcontrol *kcontrol, |
216 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
217 | { |
218 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
219 | uinfo->count = 1; | |
220 | uinfo->value.integer.min = 0; | |
221 | uinfo->value.integer.max = 192000; | |
222 | return 0; | |
223 | } | |
224 | ||
97f02e05 TI |
225 | static int snd_ak4114_rate_get(struct snd_kcontrol *kcontrol, |
226 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 227 | { |
97f02e05 | 228 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
229 | |
230 | ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4114_REG_RCS1)); | |
231 | return 0; | |
232 | } | |
233 | ||
97f02e05 | 234 | static int snd_ak4114_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
235 | { |
236 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
237 | uinfo->count = 1; | |
238 | return 0; | |
239 | } | |
240 | ||
97f02e05 TI |
241 | static int snd_ak4114_spdif_get(struct snd_kcontrol *kcontrol, |
242 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 243 | { |
97f02e05 | 244 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
245 | unsigned i; |
246 | ||
247 | for (i = 0; i < AK4114_REG_RXCSB_SIZE; i++) | |
248 | ucontrol->value.iec958.status[i] = reg_read(chip, AK4114_REG_RXCSB0 + i); | |
249 | return 0; | |
250 | } | |
251 | ||
97f02e05 TI |
252 | static int snd_ak4114_spdif_playback_get(struct snd_kcontrol *kcontrol, |
253 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 254 | { |
97f02e05 | 255 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
256 | unsigned i; |
257 | ||
258 | for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++) | |
259 | ucontrol->value.iec958.status[i] = chip->txcsb[i]; | |
260 | return 0; | |
261 | } | |
262 | ||
97f02e05 TI |
263 | static int snd_ak4114_spdif_playback_put(struct snd_kcontrol *kcontrol, |
264 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 265 | { |
97f02e05 | 266 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
267 | unsigned i; |
268 | ||
269 | for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++) | |
270 | reg_write(chip, AK4114_REG_TXCSB0 + i, ucontrol->value.iec958.status[i]); | |
271 | return 0; | |
272 | } | |
273 | ||
97f02e05 | 274 | static int snd_ak4114_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
275 | { |
276 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
277 | uinfo->count = 1; | |
278 | return 0; | |
279 | } | |
280 | ||
97f02e05 TI |
281 | static int snd_ak4114_spdif_mask_get(struct snd_kcontrol *kcontrol, |
282 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 LT |
283 | { |
284 | memset(ucontrol->value.iec958.status, 0xff, AK4114_REG_RXCSB_SIZE); | |
285 | return 0; | |
286 | } | |
287 | ||
97f02e05 | 288 | static int snd_ak4114_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
289 | { |
290 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
291 | uinfo->value.integer.min = 0; | |
292 | uinfo->value.integer.max = 0xffff; | |
293 | uinfo->count = 4; | |
294 | return 0; | |
295 | } | |
296 | ||
97f02e05 TI |
297 | static int snd_ak4114_spdif_pget(struct snd_kcontrol *kcontrol, |
298 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 299 | { |
97f02e05 | 300 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
301 | unsigned short tmp; |
302 | ||
303 | ucontrol->value.integer.value[0] = 0xf8f2; | |
304 | ucontrol->value.integer.value[1] = 0x4e1f; | |
305 | tmp = reg_read(chip, AK4114_REG_Pc0) | (reg_read(chip, AK4114_REG_Pc1) << 8); | |
306 | ucontrol->value.integer.value[2] = tmp; | |
307 | tmp = reg_read(chip, AK4114_REG_Pd0) | (reg_read(chip, AK4114_REG_Pd1) << 8); | |
308 | ucontrol->value.integer.value[3] = tmp; | |
309 | return 0; | |
310 | } | |
311 | ||
97f02e05 | 312 | static int snd_ak4114_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
313 | { |
314 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; | |
315 | uinfo->count = AK4114_REG_QSUB_SIZE; | |
316 | return 0; | |
317 | } | |
318 | ||
97f02e05 TI |
319 | static int snd_ak4114_spdif_qget(struct snd_kcontrol *kcontrol, |
320 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 321 | { |
97f02e05 | 322 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
323 | unsigned i; |
324 | ||
325 | for (i = 0; i < AK4114_REG_QSUB_SIZE; i++) | |
326 | ucontrol->value.bytes.data[i] = reg_read(chip, AK4114_REG_QSUB_ADDR + i); | |
327 | return 0; | |
328 | } | |
329 | ||
330 | /* Don't forget to change AK4114_CONTROLS define!!! */ | |
97f02e05 | 331 | static struct snd_kcontrol_new snd_ak4114_iec958_controls[] = { |
1da177e4 LT |
332 | { |
333 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
334 | .name = "IEC958 Parity Errors", | |
335 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
336 | .info = snd_ak4114_in_error_info, | |
337 | .get = snd_ak4114_in_error_get, | |
97f02e05 | 338 | .private_value = offsetof(struct ak4114, parity_errors), |
1da177e4 LT |
339 | }, |
340 | { | |
341 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
342 | .name = "IEC958 V-Bit Errors", | |
343 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
344 | .info = snd_ak4114_in_error_info, | |
345 | .get = snd_ak4114_in_error_get, | |
97f02e05 | 346 | .private_value = offsetof(struct ak4114, v_bit_errors), |
1da177e4 LT |
347 | }, |
348 | { | |
349 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
350 | .name = "IEC958 C-CRC Errors", | |
351 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
352 | .info = snd_ak4114_in_error_info, | |
353 | .get = snd_ak4114_in_error_get, | |
97f02e05 | 354 | .private_value = offsetof(struct ak4114, ccrc_errors), |
1da177e4 LT |
355 | }, |
356 | { | |
357 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
358 | .name = "IEC958 Q-CRC Errors", | |
359 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
360 | .info = snd_ak4114_in_error_info, | |
361 | .get = snd_ak4114_in_error_get, | |
97f02e05 | 362 | .private_value = offsetof(struct ak4114, qcrc_errors), |
1da177e4 LT |
363 | }, |
364 | { | |
365 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
366 | .name = "IEC958 External Rate", | |
367 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
368 | .info = snd_ak4114_rate_info, | |
369 | .get = snd_ak4114_rate_get, | |
370 | }, | |
371 | { | |
372 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
373 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK), | |
374 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
375 | .info = snd_ak4114_spdif_mask_info, | |
376 | .get = snd_ak4114_spdif_mask_get, | |
377 | }, | |
378 | { | |
379 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
380 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), | |
381 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
382 | .info = snd_ak4114_spdif_info, | |
383 | .get = snd_ak4114_spdif_playback_get, | |
384 | .put = snd_ak4114_spdif_playback_put, | |
385 | }, | |
386 | { | |
387 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
388 | .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK), | |
389 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
390 | .info = snd_ak4114_spdif_mask_info, | |
391 | .get = snd_ak4114_spdif_mask_get, | |
392 | }, | |
393 | { | |
394 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
395 | .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT), | |
396 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
397 | .info = snd_ak4114_spdif_info, | |
398 | .get = snd_ak4114_spdif_get, | |
399 | }, | |
400 | { | |
401 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
ec8f53fb | 402 | .name = "IEC958 Preamble Capture Default", |
1da177e4 LT |
403 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, |
404 | .info = snd_ak4114_spdif_pinfo, | |
405 | .get = snd_ak4114_spdif_pget, | |
406 | }, | |
407 | { | |
408 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
409 | .name = "IEC958 Q-subcode Capture Default", | |
410 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
411 | .info = snd_ak4114_spdif_qinfo, | |
412 | .get = snd_ak4114_spdif_qget, | |
413 | }, | |
414 | { | |
415 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
416 | .name = "IEC958 Audio", | |
417 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
418 | .info = snd_ak4114_in_bit_info, | |
419 | .get = snd_ak4114_in_bit_get, | |
420 | .private_value = (1<<31) | (1<<8) | AK4114_REG_RCS0, | |
421 | }, | |
422 | { | |
423 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
424 | .name = "IEC958 Non-PCM Bitstream", | |
425 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
426 | .info = snd_ak4114_in_bit_info, | |
427 | .get = snd_ak4114_in_bit_get, | |
c4116ae7 | 428 | .private_value = (6<<8) | AK4114_REG_RCS0, |
1da177e4 LT |
429 | }, |
430 | { | |
431 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
432 | .name = "IEC958 DTS Bitstream", | |
433 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
434 | .info = snd_ak4114_in_bit_info, | |
435 | .get = snd_ak4114_in_bit_get, | |
c4116ae7 PH |
436 | .private_value = (3<<8) | AK4114_REG_RCS0, |
437 | }, | |
438 | { | |
439 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
440 | .name = "IEC958 PPL Lock Status", | |
441 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
442 | .info = snd_ak4114_in_bit_info, | |
443 | .get = snd_ak4114_in_bit_get, | |
444 | .private_value = (1<<31) | (4<<8) | AK4114_REG_RCS0, | |
1da177e4 LT |
445 | } |
446 | }; | |
447 | ||
fdafad6f PH |
448 | |
449 | static void snd_ak4114_proc_regs_read(struct snd_info_entry *entry, | |
450 | struct snd_info_buffer *buffer) | |
451 | { | |
452 | struct ak4114 *ak4114 = entry->private_data; | |
453 | int reg, val; | |
454 | /* all ak4114 registers 0x00 - 0x1f */ | |
455 | for (reg = 0; reg < 0x20; reg++) { | |
456 | val = reg_read(ak4114, reg); | |
457 | snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val); | |
458 | } | |
459 | } | |
460 | ||
461 | static void snd_ak4114_proc_init(struct ak4114 *ak4114) | |
462 | { | |
463 | struct snd_info_entry *entry; | |
464 | if (!snd_card_proc_new(ak4114->card, "ak4114", &entry)) | |
465 | snd_info_set_text_ops(entry, ak4114, snd_ak4114_proc_regs_read); | |
466 | } | |
467 | ||
97f02e05 TI |
468 | int snd_ak4114_build(struct ak4114 *ak4114, |
469 | struct snd_pcm_substream *ply_substream, | |
470 | struct snd_pcm_substream *cap_substream) | |
1da177e4 | 471 | { |
97f02e05 | 472 | struct snd_kcontrol *kctl; |
1da177e4 LT |
473 | unsigned int idx; |
474 | int err; | |
475 | ||
5e246b85 TI |
476 | if (snd_BUG_ON(!cap_substream)) |
477 | return -EINVAL; | |
1da177e4 LT |
478 | ak4114->playback_substream = ply_substream; |
479 | ak4114->capture_substream = cap_substream; | |
480 | for (idx = 0; idx < AK4114_CONTROLS; idx++) { | |
481 | kctl = snd_ctl_new1(&snd_ak4114_iec958_controls[idx], ak4114); | |
482 | if (kctl == NULL) | |
483 | return -ENOMEM; | |
c4116ae7 | 484 | if (strstr(kctl->id.name, "Playback")) { |
1da177e4 LT |
485 | if (ply_substream == NULL) { |
486 | snd_ctl_free_one(kctl); | |
487 | ak4114->kctls[idx] = NULL; | |
488 | continue; | |
489 | } | |
490 | kctl->id.device = ply_substream->pcm->device; | |
491 | kctl->id.subdevice = ply_substream->number; | |
492 | } else { | |
493 | kctl->id.device = cap_substream->pcm->device; | |
494 | kctl->id.subdevice = cap_substream->number; | |
495 | } | |
496 | err = snd_ctl_add(ak4114->card, kctl); | |
497 | if (err < 0) | |
498 | return err; | |
499 | ak4114->kctls[idx] = kctl; | |
500 | } | |
fdafad6f | 501 | snd_ak4114_proc_init(ak4114); |
51354ae3 TI |
502 | /* trigger workq */ |
503 | schedule_delayed_work(&ak4114->work, HZ / 10); | |
1da177e4 LT |
504 | return 0; |
505 | } | |
506 | ||
51354ae3 TI |
507 | /* notify kcontrols if any parameters are changed */ |
508 | static void ak4114_notify(struct ak4114 *ak4114, | |
509 | unsigned char rcs0, unsigned char rcs1, | |
510 | unsigned char c0, unsigned char c1) | |
511 | { | |
512 | if (!ak4114->kctls[0]) | |
513 | return; | |
514 | ||
515 | if (rcs0 & AK4114_PAR) | |
516 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
517 | &ak4114->kctls[0]->id); | |
518 | if (rcs0 & AK4114_V) | |
519 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
520 | &ak4114->kctls[1]->id); | |
521 | if (rcs1 & AK4114_CCRC) | |
522 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
523 | &ak4114->kctls[2]->id); | |
524 | if (rcs1 & AK4114_QCRC) | |
525 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
526 | &ak4114->kctls[3]->id); | |
527 | ||
528 | /* rate change */ | |
529 | if (c1 & 0xf0) | |
530 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
531 | &ak4114->kctls[4]->id); | |
532 | ||
533 | if ((c0 & AK4114_PEM) | (c0 & AK4114_CINT)) | |
534 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
535 | &ak4114->kctls[9]->id); | |
536 | if (c0 & AK4114_QINT) | |
537 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
538 | &ak4114->kctls[10]->id); | |
539 | ||
540 | if (c0 & AK4114_AUDION) | |
541 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
542 | &ak4114->kctls[11]->id); | |
543 | if (c0 & AK4114_AUTO) | |
544 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
545 | &ak4114->kctls[12]->id); | |
546 | if (c0 & AK4114_DTSCD) | |
547 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
548 | &ak4114->kctls[13]->id); | |
c4116ae7 PH |
549 | if (c0 & AK4114_UNLCK) |
550 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
551 | &ak4114->kctls[14]->id); | |
51354ae3 TI |
552 | } |
553 | ||
97f02e05 | 554 | int snd_ak4114_external_rate(struct ak4114 *ak4114) |
1da177e4 LT |
555 | { |
556 | unsigned char rcs1; | |
557 | ||
558 | rcs1 = reg_read(ak4114, AK4114_REG_RCS1); | |
559 | return external_rate(rcs1); | |
560 | } | |
561 | ||
97f02e05 | 562 | int snd_ak4114_check_rate_and_errors(struct ak4114 *ak4114, unsigned int flags) |
1da177e4 | 563 | { |
97f02e05 | 564 | struct snd_pcm_runtime *runtime = ak4114->capture_substream ? ak4114->capture_substream->runtime : NULL; |
1da177e4 LT |
565 | unsigned long _flags; |
566 | int res = 0; | |
567 | unsigned char rcs0, rcs1; | |
568 | unsigned char c0, c1; | |
569 | ||
570 | rcs1 = reg_read(ak4114, AK4114_REG_RCS1); | |
571 | if (flags & AK4114_CHECK_NO_STAT) | |
572 | goto __rate; | |
573 | rcs0 = reg_read(ak4114, AK4114_REG_RCS0); | |
574 | spin_lock_irqsave(&ak4114->lock, _flags); | |
575 | if (rcs0 & AK4114_PAR) | |
576 | ak4114->parity_errors++; | |
577 | if (rcs1 & AK4114_V) | |
578 | ak4114->v_bit_errors++; | |
579 | if (rcs1 & AK4114_CCRC) | |
580 | ak4114->ccrc_errors++; | |
581 | if (rcs1 & AK4114_QCRC) | |
582 | ak4114->qcrc_errors++; | |
583 | c0 = (ak4114->rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK)) ^ | |
584 | (rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK)); | |
585 | c1 = (ak4114->rcs1 & 0xf0) ^ (rcs1 & 0xf0); | |
586 | ak4114->rcs0 = rcs0 & ~(AK4114_QINT | AK4114_CINT); | |
587 | ak4114->rcs1 = rcs1; | |
588 | spin_unlock_irqrestore(&ak4114->lock, _flags); | |
589 | ||
51354ae3 | 590 | ak4114_notify(ak4114, rcs0, rcs1, c0, c1); |
1da177e4 LT |
591 | if (ak4114->change_callback && (c0 | c1) != 0) |
592 | ak4114->change_callback(ak4114, c0, c1); | |
593 | ||
594 | __rate: | |
595 | /* compare rate */ | |
596 | res = external_rate(rcs1); | |
597 | if (!(flags & AK4114_CHECK_NO_RATE) && runtime && runtime->rate != res) { | |
598 | snd_pcm_stream_lock_irqsave(ak4114->capture_substream, _flags); | |
599 | if (snd_pcm_running(ak4114->capture_substream)) { | |
99b359ba | 600 | // printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res); |
1da177e4 | 601 | snd_pcm_stop(ak4114->capture_substream, SNDRV_PCM_STATE_DRAINING); |
1da177e4 LT |
602 | res = 1; |
603 | } | |
604 | snd_pcm_stream_unlock_irqrestore(ak4114->capture_substream, _flags); | |
605 | } | |
606 | return res; | |
607 | } | |
608 | ||
c4028958 | 609 | static void ak4114_stats(struct work_struct *work) |
1da177e4 | 610 | { |
c4028958 | 611 | struct ak4114 *chip = container_of(work, struct ak4114, work.work); |
1da177e4 | 612 | |
4161b450 | 613 | if (atomic_inc_return(&chip->wq_processing) == 1) |
841b23d4 | 614 | snd_ak4114_check_rate_and_errors(chip, chip->check_flags); |
4161b450 TI |
615 | if (atomic_dec_and_test(&chip->wq_processing)) |
616 | schedule_delayed_work(&chip->work, HZ / 10); | |
1da177e4 LT |
617 | } |
618 | ||
619 | EXPORT_SYMBOL(snd_ak4114_create); | |
620 | EXPORT_SYMBOL(snd_ak4114_reg_write); | |
621 | EXPORT_SYMBOL(snd_ak4114_reinit); | |
622 | EXPORT_SYMBOL(snd_ak4114_build); | |
623 | EXPORT_SYMBOL(snd_ak4114_external_rate); | |
624 | EXPORT_SYMBOL(snd_ak4114_check_rate_and_errors); |