]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blame - sound/isa/ad1816a/ad1816a_lib.c
projects / mirror_ubuntu-zesty-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
sound: irq: Remove IRQF_DISABLED
[mirror_ubuntu-zesty-kernel.git] / sound / isa / ad1816a / ad1816a_lib.c
CommitLineData
1da177e4
LT		 1/*
2 ad1816a.c - lowlevel code for Analog Devices AD1816A chip.
3 Copyright (C) 1999-2000 by Massimo Piccioni <dafastidio@libero.it>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18*/
19
1da177e4
LT		 20#include <linux/delay.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/slab.h>
24#include <linux/ioport.h>
25#include <sound/core.h>
0e7febf1 26#include <sound/tlv.h>
1da177e4
LT		 27#include <sound/ad1816a.h>
28
29#include <asm/io.h>
30#include <asm/dma.h>
31
cbdd0dd1 32static inline int snd_ad1816a_busy_wait(struct snd_ad1816a *chip)
1da177e4
LT		 33{
34 int timeout;
35
36 for (timeout = 1000; timeout-- > 0; udelay(10))
37 if (inb(AD1816A_REG(AD1816A_CHIP_STATUS)) & AD1816A_READY)
38 return 0;
39
4c9f1d3e 40 snd_printk(KERN_WARNING "chip busy.\n");
1da177e4
LT		 41 return -EBUSY;
42}
43
cbdd0dd1 44static inline unsigned char snd_ad1816a_in(struct snd_ad1816a *chip, unsigned char reg)
1da177e4
LT		 45{
46 snd_ad1816a_busy_wait(chip);
47 return inb(AD1816A_REG(reg));
48}
49
cbdd0dd1 50static inline void snd_ad1816a_out(struct snd_ad1816a *chip, unsigned char reg,
1da177e4
LT		 51 unsigned char value)
52{
53 snd_ad1816a_busy_wait(chip);
54 outb(value, AD1816A_REG(reg));
55}
56
cbdd0dd1 57static inline void snd_ad1816a_out_mask(struct snd_ad1816a *chip, unsigned char reg,
1da177e4
LT		 58 unsigned char mask, unsigned char value)
59{
60 snd_ad1816a_out(chip, reg,
61 (value & mask) | (snd_ad1816a_in(chip, reg) & ~mask));
62}
63
cbdd0dd1 64static unsigned short snd_ad1816a_read(struct snd_ad1816a *chip, unsigned char reg)
1da177e4
LT		 65{
66 snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
67 return snd_ad1816a_in(chip, AD1816A_INDIR_DATA_LOW) |
68 (snd_ad1816a_in(chip, AD1816A_INDIR_DATA_HIGH) << 8);
69}
70
cbdd0dd1 71static void snd_ad1816a_write(struct snd_ad1816a *chip, unsigned char reg,
1da177e4
LT		 72 unsigned short value)
73{
74 snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
75 snd_ad1816a_out(chip, AD1816A_INDIR_DATA_LOW, value & 0xff);
76 snd_ad1816a_out(chip, AD1816A_INDIR_DATA_HIGH, (value >> 8) & 0xff);
77}
78
cbdd0dd1 79static void snd_ad1816a_write_mask(struct snd_ad1816a *chip, unsigned char reg,
1da177e4
LT		 80 unsigned short mask, unsigned short value)
81{
82 snd_ad1816a_write(chip, reg,
83 (value & mask) | (snd_ad1816a_read(chip, reg) & ~mask));
84}
85
86
cbdd0dd1 87static unsigned char snd_ad1816a_get_format(struct snd_ad1816a *chip,
1da177e4
LT		 88 unsigned int format, int channels)
89{
90 unsigned char retval = AD1816A_FMT_LINEAR_8;
91
92 switch (format) {
93 case SNDRV_PCM_FORMAT_MU_LAW:
94 retval = AD1816A_FMT_ULAW_8;
95 break;
96 case SNDRV_PCM_FORMAT_A_LAW:
97 retval = AD1816A_FMT_ALAW_8;
98 break;
99 case SNDRV_PCM_FORMAT_S16_LE:
100 retval = AD1816A_FMT_LINEAR_16_LIT;
101 break;
102 case SNDRV_PCM_FORMAT_S16_BE:
103 retval = AD1816A_FMT_LINEAR_16_BIG;
104 }
105 return (channels > 1) ? (retval | AD1816A_FMT_STEREO) : retval;
106}
107
cbdd0dd1 108static int snd_ad1816a_open(struct snd_ad1816a *chip, unsigned int mode)
1da177e4
LT		 109{
110 unsigned long flags;
111
112 spin_lock_irqsave(&chip->lock, flags);
113
114 if (chip->mode & mode) {
115 spin_unlock_irqrestore(&chip->lock, flags);
116 return -EAGAIN;
117 }
118
119 switch ((mode &= AD1816A_MODE_OPEN)) {
120 case AD1816A_MODE_PLAYBACK:
121 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
122 AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
123 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
124 AD1816A_PLAYBACK_IRQ_ENABLE, 0xffff);
125 break;
126 case AD1816A_MODE_CAPTURE:
127 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
128 AD1816A_CAPTURE_IRQ_PENDING, 0x00);
129 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
130 AD1816A_CAPTURE_IRQ_ENABLE, 0xffff);
131 break;
132 case AD1816A_MODE_TIMER:
133 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
134 AD1816A_TIMER_IRQ_PENDING, 0x00);
135 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
136 AD1816A_TIMER_IRQ_ENABLE, 0xffff);
137 }
138 chip->mode |= mode;
139
140 spin_unlock_irqrestore(&chip->lock, flags);
141 return 0;
142}
143
cbdd0dd1 144static void snd_ad1816a_close(struct snd_ad1816a *chip, unsigned int mode)
1da177e4
LT		 145{
146 unsigned long flags;
147
148 spin_lock_irqsave(&chip->lock, flags);
149
150 switch ((mode &= AD1816A_MODE_OPEN)) {
151 case AD1816A_MODE_PLAYBACK:
152 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
153 AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
154 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
155 AD1816A_PLAYBACK_IRQ_ENABLE, 0x0000);
156 break;
157 case AD1816A_MODE_CAPTURE:
158 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
159 AD1816A_CAPTURE_IRQ_PENDING, 0x00);
160 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
161 AD1816A_CAPTURE_IRQ_ENABLE, 0x0000);
162 break;
163 case AD1816A_MODE_TIMER:
164 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
165 AD1816A_TIMER_IRQ_PENDING, 0x00);
166 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
167 AD1816A_TIMER_IRQ_ENABLE, 0x0000);
168 }
169 if (!((chip->mode &= ~mode) & AD1816A_MODE_OPEN))
170 chip->mode = 0;
171
172 spin_unlock_irqrestore(&chip->lock, flags);
173}
174
175
cbdd0dd1 176static int snd_ad1816a_trigger(struct snd_ad1816a *chip, unsigned char what,
d08a23e2 177 int channel, int cmd, int iscapture)
1da177e4
LT		 178{
179 int error = 0;
180
181 switch (cmd) {
182 case SNDRV_PCM_TRIGGER_START:
183 case SNDRV_PCM_TRIGGER_STOP:
184 spin_lock(&chip->lock);
185 cmd = (cmd == SNDRV_PCM_TRIGGER_START) ? 0xff: 0x00;
d08a23e2
KA		 186 /* if (what & AD1816A_PLAYBACK_ENABLE) */
187 /* That is not valid, because playback and capture enable
188 * are the same bit pattern, just to different addresses
189 */
190 if (! iscapture)
1da177e4
LT		 191 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
192 AD1816A_PLAYBACK_ENABLE, cmd);
d08a23e2 193 else
1da177e4
LT		 194 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
195 AD1816A_CAPTURE_ENABLE, cmd);
196 spin_unlock(&chip->lock);
197 break;
198 default:
4c9f1d3e 199 snd_printk(KERN_WARNING "invalid trigger mode 0x%x.\n", what);
1da177e4
LT		 200 error = -EINVAL;
201 }
202
203 return error;
204}
205
cbdd0dd1 206static int snd_ad1816a_playback_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 207{
cbdd0dd1 208 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4 209 return snd_ad1816a_trigger(chip, AD1816A_PLAYBACK_ENABLE,
d08a23e2 210 SNDRV_PCM_STREAM_PLAYBACK, cmd, 0);
1da177e4
LT		 211}
212
cbdd0dd1 213static int snd_ad1816a_capture_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 214{
cbdd0dd1 215 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4 216 return snd_ad1816a_trigger(chip, AD1816A_CAPTURE_ENABLE,
d08a23e2 217 SNDRV_PCM_STREAM_CAPTURE, cmd, 1);
1da177e4
LT		 218}
219
cbdd0dd1
TI		 220static int snd_ad1816a_hw_params(struct snd_pcm_substream *substream,
221 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 222{
223 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
224}
225
cbdd0dd1 226static int snd_ad1816a_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 227{
228 return snd_pcm_lib_free_pages(substream);
229}
230
cbdd0dd1 231static int snd_ad1816a_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 232{
cbdd0dd1 233 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4 234 unsigned long flags;
cbdd0dd1 235 struct snd_pcm_runtime *runtime = substream->runtime;
5b8f7f73 236 unsigned int size, rate;
1da177e4
LT		 237
238 spin_lock_irqsave(&chip->lock, flags);
239
240 chip->p_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
241 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
242 AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
243
244 snd_dma_program(chip->dma1, runtime->dma_addr, size,
245 DMA_MODE_WRITE | DMA_AUTOINIT);
246
5b8f7f73
TI		 247 rate = runtime->rate;
248 if (chip->clock_freq)
249 rate = (rate * 33000) / chip->clock_freq;
250 snd_ad1816a_write(chip, AD1816A_PLAYBACK_SAMPLE_RATE, rate);
1da177e4
LT		 251 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
252 AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
253 snd_ad1816a_get_format(chip, runtime->format,
254 runtime->channels));
255
256 snd_ad1816a_write(chip, AD1816A_PLAYBACK_BASE_COUNT,
257 snd_pcm_lib_period_bytes(substream) / 4 - 1);
258
259 spin_unlock_irqrestore(&chip->lock, flags);
260 return 0;
261}
262
cbdd0dd1 263static int snd_ad1816a_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 264{
cbdd0dd1 265 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4 266 unsigned long flags;
cbdd0dd1 267 struct snd_pcm_runtime *runtime = substream->runtime;
5b8f7f73 268 unsigned int size, rate;
1da177e4
LT		 269
270 spin_lock_irqsave(&chip->lock, flags);
271
272 chip->c_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
273 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
274 AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
275
276 snd_dma_program(chip->dma2, runtime->dma_addr, size,
277 DMA_MODE_READ | DMA_AUTOINIT);
278
5b8f7f73
TI		 279 rate = runtime->rate;
280 if (chip->clock_freq)
281 rate = (rate * 33000) / chip->clock_freq;
282 snd_ad1816a_write(chip, AD1816A_CAPTURE_SAMPLE_RATE, rate);
1da177e4
LT		 283 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
284 AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
285 snd_ad1816a_get_format(chip, runtime->format,
286 runtime->channels));
287
288 snd_ad1816a_write(chip, AD1816A_CAPTURE_BASE_COUNT,
289 snd_pcm_lib_period_bytes(substream) / 4 - 1);
290
291 spin_unlock_irqrestore(&chip->lock, flags);
292 return 0;
293}
294
295
cbdd0dd1 296static snd_pcm_uframes_t snd_ad1816a_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 297{
cbdd0dd1 298 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 299 size_t ptr;
300 if (!(chip->mode & AD1816A_MODE_PLAYBACK))
301 return 0;
302 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
303 return bytes_to_frames(substream->runtime, ptr);
304}
305
cbdd0dd1 306static snd_pcm_uframes_t snd_ad1816a_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 307{
cbdd0dd1 308 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 309 size_t ptr;
310 if (!(chip->mode & AD1816A_MODE_CAPTURE))
311 return 0;
312 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
313 return bytes_to_frames(substream->runtime, ptr);
314}
315
316
7d12e780 317static irqreturn_t snd_ad1816a_interrupt(int irq, void *dev_id)
1da177e4 318{
cbdd0dd1 319 struct snd_ad1816a *chip = dev_id;
1da177e4
LT		 320 unsigned char status;
321
322 spin_lock(&chip->lock);
323 status = snd_ad1816a_in(chip, AD1816A_INTERRUPT_STATUS);
324 spin_unlock(&chip->lock);
325
326 if ((status & AD1816A_PLAYBACK_IRQ_PENDING) && chip->playback_substream)
327 snd_pcm_period_elapsed(chip->playback_substream);
328
329 if ((status & AD1816A_CAPTURE_IRQ_PENDING) && chip->capture_substream)
330 snd_pcm_period_elapsed(chip->capture_substream);
331
332 if ((status & AD1816A_TIMER_IRQ_PENDING) && chip->timer)
333 snd_timer_interrupt(chip->timer, chip->timer->sticks);
334
335 spin_lock(&chip->lock);
336 snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
337 spin_unlock(&chip->lock);
338 return IRQ_HANDLED;
339}
340
341
cbdd0dd1 342static struct snd_pcm_hardware snd_ad1816a_playback = {
1da177e4
LT		 343 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
344 SNDRV_PCM_INFO_MMAP_VALID),
345 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
346 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
347 SNDRV_PCM_FMTBIT_S16_BE),
348 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
349 .rate_min = 4000,
350 .rate_max = 55200,
351 .channels_min = 1,
352 .channels_max = 2,
353 .buffer_bytes_max = (128*1024),
354 .period_bytes_min = 64,
355 .period_bytes_max = (128*1024),
356 .periods_min = 1,
357 .periods_max = 1024,
358 .fifo_size = 0,
359};
360
cbdd0dd1 361static struct snd_pcm_hardware snd_ad1816a_capture = {
1da177e4
LT		 362 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
363 SNDRV_PCM_INFO_MMAP_VALID),
364 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
365 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
366 SNDRV_PCM_FMTBIT_S16_BE),
367 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
368 .rate_min = 4000,
369 .rate_max = 55200,
370 .channels_min = 1,
371 .channels_max = 2,
372 .buffer_bytes_max = (128*1024),
373 .period_bytes_min = 64,
374 .period_bytes_max = (128*1024),
375 .periods_min = 1,
376 .periods_max = 1024,
377 .fifo_size = 0,
378};
379
cbdd0dd1 380static int snd_ad1816a_timer_close(struct snd_timer *timer)
1da177e4 381{
cbdd0dd1 382 struct snd_ad1816a *chip = snd_timer_chip(timer);
1da177e4
LT		 383 snd_ad1816a_close(chip, AD1816A_MODE_TIMER);
384 return 0;
385}
386
cbdd0dd1 387static int snd_ad1816a_timer_open(struct snd_timer *timer)
1da177e4 388{
cbdd0dd1 389 struct snd_ad1816a *chip = snd_timer_chip(timer);
1da177e4
LT		 390 snd_ad1816a_open(chip, AD1816A_MODE_TIMER);
391 return 0;
392}
393
cbdd0dd1 394static unsigned long snd_ad1816a_timer_resolution(struct snd_timer *timer)
1da177e4 395{
622207dc
TI		 396 if (snd_BUG_ON(!timer))
397 return 0;
1da177e4
LT		 398
399 return 10000;
400}
401
cbdd0dd1 402static int snd_ad1816a_timer_start(struct snd_timer *timer)
1da177e4
LT		 403{
404 unsigned short bits;
405 unsigned long flags;
cbdd0dd1 406 struct snd_ad1816a *chip = snd_timer_chip(timer);
1da177e4
LT		 407 spin_lock_irqsave(&chip->lock, flags);
408 bits = snd_ad1816a_read(chip, AD1816A_INTERRUPT_ENABLE);
409
410 if (!(bits & AD1816A_TIMER_ENABLE)) {
411 snd_ad1816a_write(chip, AD1816A_TIMER_BASE_COUNT,
412 timer->sticks & 0xffff);
413
414 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
415 AD1816A_TIMER_ENABLE, 0xffff);
416 }
417 spin_unlock_irqrestore(&chip->lock, flags);
418 return 0;
419}
420
cbdd0dd1 421static int snd_ad1816a_timer_stop(struct snd_timer *timer)
1da177e4
LT		 422{
423 unsigned long flags;
cbdd0dd1 424 struct snd_ad1816a *chip = snd_timer_chip(timer);
1da177e4
LT		 425 spin_lock_irqsave(&chip->lock, flags);
426
427 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
428 AD1816A_TIMER_ENABLE, 0x0000);
429
430 spin_unlock_irqrestore(&chip->lock, flags);
431 return 0;
432}
433
cbdd0dd1 434static struct snd_timer_hardware snd_ad1816a_timer_table = {
1da177e4
LT		 435 .flags = SNDRV_TIMER_HW_AUTO,
436 .resolution = 10000,
437 .ticks = 65535,
438 .open = snd_ad1816a_timer_open,
439 .close = snd_ad1816a_timer_close,
440 .c_resolution = snd_ad1816a_timer_resolution,
441 .start = snd_ad1816a_timer_start,
442 .stop = snd_ad1816a_timer_stop,
443};
1da177e4 444
cbdd0dd1 445static int snd_ad1816a_playback_open(struct snd_pcm_substream *substream)
1da177e4 446{
cbdd0dd1
TI		 447 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
448 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 449 int error;
450
451 if ((error = snd_ad1816a_open(chip, AD1816A_MODE_PLAYBACK)) < 0)
452 return error;
1da177e4
LT		 453 runtime->hw = snd_ad1816a_playback;
454 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
455 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
456 chip->playback_substream = substream;
457 return 0;
458}
459
cbdd0dd1 460static int snd_ad1816a_capture_open(struct snd_pcm_substream *substream)
1da177e4 461{
cbdd0dd1
TI		 462 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
463 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 464 int error;
465
466 if ((error = snd_ad1816a_open(chip, AD1816A_MODE_CAPTURE)) < 0)
467 return error;
1da177e4
LT		 468 runtime->hw = snd_ad1816a_capture;
469 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
470 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
471 chip->capture_substream = substream;
472 return 0;
473}
474
cbdd0dd1 475static int snd_ad1816a_playback_close(struct snd_pcm_substream *substream)
1da177e4 476{
cbdd0dd1 477 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 478
479 chip->playback_substream = NULL;
480 snd_ad1816a_close(chip, AD1816A_MODE_PLAYBACK);
481 return 0;
482}
483
cbdd0dd1 484static int snd_ad1816a_capture_close(struct snd_pcm_substream *substream)
1da177e4 485{
cbdd0dd1 486 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 487
488 chip->capture_substream = NULL;
489 snd_ad1816a_close(chip, AD1816A_MODE_CAPTURE);
490 return 0;
491}
492
493
00a4e3d9 494static void __devinit snd_ad1816a_init(struct snd_ad1816a *chip)
1da177e4
LT		 495{
496 unsigned long flags;
497
498 spin_lock_irqsave(&chip->lock, flags);
499
500 snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
501 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
502 AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
503 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
504 AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
505 snd_ad1816a_write(chip, AD1816A_INTERRUPT_ENABLE, 0x0000);
506 snd_ad1816a_write_mask(chip, AD1816A_CHIP_CONFIG,
507 AD1816A_CAPTURE_NOT_EQUAL | AD1816A_WSS_ENABLE, 0xffff);
508 snd_ad1816a_write(chip, AD1816A_DSP_CONFIG, 0x0000);
509 snd_ad1816a_write(chip, AD1816A_POWERDOWN_CTRL, 0x0000);
510
511 spin_unlock_irqrestore(&chip->lock, flags);
512}
513
00a4e3d9 514static int __devinit snd_ad1816a_probe(struct snd_ad1816a *chip)
1da177e4
LT		 515{
516 unsigned long flags;
517
518 spin_lock_irqsave(&chip->lock, flags);
519
520 switch (chip->version = snd_ad1816a_read(chip, AD1816A_VERSION_ID)) {
521 case 0:
522 chip->hardware = AD1816A_HW_AD1815;
523 break;
524 case 1:
525 chip->hardware = AD1816A_HW_AD18MAX10;
526 break;
527 case 3:
528 chip->hardware = AD1816A_HW_AD1816A;
529 break;
530 default:
531 chip->hardware = AD1816A_HW_AUTO;
532 }
533
534 spin_unlock_irqrestore(&chip->lock, flags);
535 return 0;
536}
537
cbdd0dd1 538static int snd_ad1816a_free(struct snd_ad1816a *chip)
1da177e4 539{
b1d5776d 540 release_and_free_resource(chip->res_port);
1da177e4
LT		 541 if (chip->irq >= 0)
542 free_irq(chip->irq, (void *) chip);
543 if (chip->dma1 >= 0) {
544 snd_dma_disable(chip->dma1);
545 free_dma(chip->dma1);
546 }
547 if (chip->dma2 >= 0) {
548 snd_dma_disable(chip->dma2);
549 free_dma(chip->dma2);
550 }
551 kfree(chip);
552 return 0;
553}
554
cbdd0dd1 555static int snd_ad1816a_dev_free(struct snd_device *device)
1da177e4 556{
cbdd0dd1 557 struct snd_ad1816a *chip = device->device_data;
1da177e4
LT		 558 return snd_ad1816a_free(chip);
559}
560
00a4e3d9 561static const char __devinit *snd_ad1816a_chip_id(struct snd_ad1816a *chip)
1da177e4
LT		 562{
563 switch (chip->hardware) {
564 case AD1816A_HW_AD1816A: return "AD1816A";
565 case AD1816A_HW_AD1815: return "AD1815";
566 case AD1816A_HW_AD18MAX10: return "AD18max10";
567 default:
4c9f1d3e 568 snd_printk(KERN_WARNING "Unknown chip version %d:%d.\n",
1da177e4
LT		 569 chip->version, chip->hardware);
570 return "AD1816A - unknown";
571 }
572}
573
00a4e3d9
TI		 574int __devinit snd_ad1816a_create(struct snd_card *card,
575 unsigned long port, int irq, int dma1, int dma2,
576 struct snd_ad1816a **rchip)
1da177e4 577{
cbdd0dd1 578 static struct snd_device_ops ops = {
1da177e4
LT		 579 .dev_free = snd_ad1816a_dev_free,
580 };
581 int error;
cbdd0dd1 582 struct snd_ad1816a *chip;
1da177e4
LT		 583
584 *rchip = NULL;
585
9e76a76e 586 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 587 if (chip == NULL)
588 return -ENOMEM;
589 chip->irq = -1;
590 chip->dma1 = -1;
591 chip->dma2 = -1;
592
593 if ((chip->res_port = request_region(port, 16, "AD1816A")) == NULL) {
594 snd_printk(KERN_ERR "ad1816a: can't grab port 0x%lx\n", port);
595 snd_ad1816a_free(chip);
596 return -EBUSY;
597 }
88e24c3a 598 if (request_irq(irq, snd_ad1816a_interrupt, 0, "AD1816A", (void *) chip)) {
1da177e4
LT		 599 snd_printk(KERN_ERR "ad1816a: can't grab IRQ %d\n", irq);
600 snd_ad1816a_free(chip);
601 return -EBUSY;
602 }
603 chip->irq = irq;
604 if (request_dma(dma1, "AD1816A - 1")) {
605 snd_printk(KERN_ERR "ad1816a: can't grab DMA1 %d\n", dma1);
606 snd_ad1816a_free(chip);
607 return -EBUSY;
608 }
609 chip->dma1 = dma1;
610 if (request_dma(dma2, "AD1816A - 2")) {
611 snd_printk(KERN_ERR "ad1816a: can't grab DMA2 %d\n", dma2);
612 snd_ad1816a_free(chip);
613 return -EBUSY;
614 }
615 chip->dma2 = dma2;
616
617 chip->card = card;
618 chip->port = port;
619 spin_lock_init(&chip->lock);
620
621 if ((error = snd_ad1816a_probe(chip))) {
622 snd_ad1816a_free(chip);
623 return error;
624 }
625
626 snd_ad1816a_init(chip);
627
628 /* Register device */
629 if ((error = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
630 snd_ad1816a_free(chip);
631 return error;
632 }
633
634 *rchip = chip;
635 return 0;
636}
637
cbdd0dd1 638static struct snd_pcm_ops snd_ad1816a_playback_ops = {
1da177e4
LT		 639 .open = snd_ad1816a_playback_open,
640 .close = snd_ad1816a_playback_close,
641 .ioctl = snd_pcm_lib_ioctl,
642 .hw_params = snd_ad1816a_hw_params,
643 .hw_free = snd_ad1816a_hw_free,
644 .prepare = snd_ad1816a_playback_prepare,
645 .trigger = snd_ad1816a_playback_trigger,
646 .pointer = snd_ad1816a_playback_pointer,
647};
648
cbdd0dd1 649static struct snd_pcm_ops snd_ad1816a_capture_ops = {
1da177e4
LT		 650 .open = snd_ad1816a_capture_open,
651 .close = snd_ad1816a_capture_close,
652 .ioctl = snd_pcm_lib_ioctl,
653 .hw_params = snd_ad1816a_hw_params,
654 .hw_free = snd_ad1816a_hw_free,
655 .prepare = snd_ad1816a_capture_prepare,
656 .trigger = snd_ad1816a_capture_trigger,
657 .pointer = snd_ad1816a_capture_pointer,
658};
659
00a4e3d9 660int __devinit snd_ad1816a_pcm(struct snd_ad1816a *chip, int device, struct snd_pcm **rpcm)
1da177e4
LT		 661{
662 int error;
cbdd0dd1 663 struct snd_pcm *pcm;
1da177e4
LT		 664
665 if ((error = snd_pcm_new(chip->card, "AD1816A", device, 1, 1, &pcm)))
666 return error;
667
668 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1816a_playback_ops);
669 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1816a_capture_ops);
670
671 pcm->private_data = chip;
1da177e4
LT		 672 pcm->info_flags = (chip->dma1 == chip->dma2 ) ? SNDRV_PCM_INFO_JOINT_DUPLEX : 0;
673
674 strcpy(pcm->name, snd_ad1816a_chip_id(chip));
675 snd_ad1816a_init(chip);
676
677 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
678 snd_dma_isa_data(),
679 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
680
681 chip->pcm = pcm;
682 if (rpcm)
683 *rpcm = pcm;
684 return 0;
685}
686
00a4e3d9 687int __devinit snd_ad1816a_timer(struct snd_ad1816a *chip, int device, struct snd_timer **rtimer)
1da177e4 688{
cbdd0dd1
TI		 689 struct snd_timer *timer;
690 struct snd_timer_id tid;
1da177e4
LT		 691 int error;
692
693 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
694 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
695 tid.card = chip->card->number;
696 tid.device = device;
697 tid.subdevice = 0;
698 if ((error = snd_timer_new(chip->card, "AD1816A", &tid, &timer)) < 0)
699 return error;
700 strcpy(timer->name, snd_ad1816a_chip_id(chip));
701 timer->private_data = chip;
1da177e4
LT		 702 chip->timer = timer;
703 timer->hw = snd_ad1816a_timer_table;
704 if (rtimer)
705 *rtimer = timer;
706 return 0;
707}
1da177e4
LT		 708
709/*
710 *
711 */
712
cbdd0dd1 713static int snd_ad1816a_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 714{
715 static char *texts[8] = {
716 "Line", "Mix", "CD", "Synth", "Video",
717 "Mic", "Phone",
718 };
719
720 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
721 uinfo->count = 2;
722 uinfo->value.enumerated.items = 7;
723 if (uinfo->value.enumerated.item > 6)
724 uinfo->value.enumerated.item = 6;
725 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
726 return 0;
727}
728
cbdd0dd1 729static int snd_ad1816a_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 730{
cbdd0dd1 731 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 732 unsigned long flags;
733 unsigned short val;
734
735 spin_lock_irqsave(&chip->lock, flags);
736 val = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL);
737 spin_unlock_irqrestore(&chip->lock, flags);
738 ucontrol->value.enumerated.item[0] = (val >> 12) & 7;
739 ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
740 return 0;
741}
742
cbdd0dd1 743static int snd_ad1816a_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 744{
cbdd0dd1 745 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 746 unsigned long flags;
747 unsigned short val;
748 int change;
749
750 if (ucontrol->value.enumerated.item[0] > 6 ||
751 ucontrol->value.enumerated.item[1] > 6)
752 return -EINVAL;
753 val = (ucontrol->value.enumerated.item[0] << 12) |
754 (ucontrol->value.enumerated.item[1] << 4);
755 spin_lock_irqsave(&chip->lock, flags);
756 change = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL) != val;
757 snd_ad1816a_write(chip, AD1816A_ADC_SOURCE_SEL, val);
758 spin_unlock_irqrestore(&chip->lock, flags);
759 return change;
760}
761
0e7febf1
TI		 762#define AD1816A_SINGLE_TLV(xname, reg, shift, mask, invert, xtlv) \
763{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
764 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
765 .name = xname, .info = snd_ad1816a_info_single, \
766 .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
767 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
768 .tlv = { .p = (xtlv) } }
1da177e4
LT		 769#define AD1816A_SINGLE(xname, reg, shift, mask, invert) \
770{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_single, \
771 .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
772 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
773
cbdd0dd1 774static int snd_ad1816a_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 775{
776 int mask = (kcontrol->private_value >> 16) & 0xff;
777
778 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
779 uinfo->count = 1;
780 uinfo->value.integer.min = 0;
781 uinfo->value.integer.max = mask;
782 return 0;
783}
784
cbdd0dd1 785static int snd_ad1816a_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 786{
cbdd0dd1 787 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 788 unsigned long flags;
789 int reg = kcontrol->private_value & 0xff;
790 int shift = (kcontrol->private_value >> 8) & 0xff;
791 int mask = (kcontrol->private_value >> 16) & 0xff;
792 int invert = (kcontrol->private_value >> 24) & 0xff;
793
794 spin_lock_irqsave(&chip->lock, flags);
795 ucontrol->value.integer.value[0] = (snd_ad1816a_read(chip, reg) >> shift) & mask;
796 spin_unlock_irqrestore(&chip->lock, flags);
797 if (invert)
798 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
799 return 0;
800}
801
cbdd0dd1 802static int snd_ad1816a_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 803{
cbdd0dd1 804 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 805 unsigned long flags;
806 int reg = kcontrol->private_value & 0xff;
807 int shift = (kcontrol->private_value >> 8) & 0xff;
808 int mask = (kcontrol->private_value >> 16) & 0xff;
809 int invert = (kcontrol->private_value >> 24) & 0xff;
810 int change;
811 unsigned short old_val, val;
812
813 val = (ucontrol->value.integer.value[0] & mask);
814 if (invert)
815 val = mask - val;
816 val <<= shift;
817 spin_lock_irqsave(&chip->lock, flags);
818 old_val = snd_ad1816a_read(chip, reg);
819 val = (old_val & ~(mask << shift)) | val;
820 change = val != old_val;
821 snd_ad1816a_write(chip, reg, val);
822 spin_unlock_irqrestore(&chip->lock, flags);
823 return change;
824}
825
0e7febf1
TI		 826#define AD1816A_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
827{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
828 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
829 .name = xname, .info = snd_ad1816a_info_double, \
830 .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
831 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
832 .tlv = { .p = (xtlv) } }
833
1da177e4
LT		 834#define AD1816A_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
835{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_double, \
836 .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
837 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
838
cbdd0dd1 839static int snd_ad1816a_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 840{
841 int mask = (kcontrol->private_value >> 16) & 0xff;
842
843 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
844 uinfo->count = 2;
845 uinfo->value.integer.min = 0;
846 uinfo->value.integer.max = mask;
847 return 0;
848}
849
cbdd0dd1 850static int snd_ad1816a_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 851{
cbdd0dd1 852 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 853 unsigned long flags;
854 int reg = kcontrol->private_value & 0xff;
855 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
856 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
857 int mask = (kcontrol->private_value >> 16) & 0xff;
858 int invert = (kcontrol->private_value >> 24) & 0xff;
859 unsigned short val;
860
861 spin_lock_irqsave(&chip->lock, flags);
862 val = snd_ad1816a_read(chip, reg);
863 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
864 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
865 spin_unlock_irqrestore(&chip->lock, flags);
866 if (invert) {
867 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
868 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
869 }
870 return 0;
871}
872
cbdd0dd1 873static int snd_ad1816a_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 874{
cbdd0dd1 875 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 876 unsigned long flags;
877 int reg = kcontrol->private_value & 0xff;
878 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
879 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
880 int mask = (kcontrol->private_value >> 16) & 0xff;
881 int invert = (kcontrol->private_value >> 24) & 0xff;
882 int change;
883 unsigned short old_val, val1, val2;
884
885 val1 = ucontrol->value.integer.value[0] & mask;
886 val2 = ucontrol->value.integer.value[1] & mask;
887 if (invert) {
888 val1 = mask - val1;
889 val2 = mask - val2;
890 }
891 val1 <<= shift_left;
892 val2 <<= shift_right;
893 spin_lock_irqsave(&chip->lock, flags);
894 old_val = snd_ad1816a_read(chip, reg);
895 val1 = (old_val & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
896 change = val1 != old_val;
897 snd_ad1816a_write(chip, reg, val1);
898 spin_unlock_irqrestore(&chip->lock, flags);
899 return change;
900}
901
0cb29ea0
TI		 902static const DECLARE_TLV_DB_SCALE(db_scale_4bit, -4500, 300, 0);
903static const DECLARE_TLV_DB_SCALE(db_scale_5bit, -4650, 150, 0);
904static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
905static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
906static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
0e7febf1 907
00a4e3d9 908static struct snd_kcontrol_new snd_ad1816a_controls[] __devinitdata = {
1da177e4 909AD1816A_DOUBLE("Master Playback Switch", AD1816A_MASTER_ATT, 15, 7, 1, 1),
0e7febf1
TI		 910AD1816A_DOUBLE_TLV("Master Playback Volume", AD1816A_MASTER_ATT, 8, 0, 31, 1,
911 db_scale_5bit),
1da177e4 912AD1816A_DOUBLE("PCM Playback Switch", AD1816A_VOICE_ATT, 15, 7, 1, 1),
0e7febf1
TI		 913AD1816A_DOUBLE_TLV("PCM Playback Volume", AD1816A_VOICE_ATT, 8, 0, 63, 1,
914 db_scale_6bit),
1da177e4 915AD1816A_DOUBLE("Line Playback Switch", AD1816A_LINE_GAIN_ATT, 15, 7, 1, 1),
0e7febf1
TI		 916AD1816A_DOUBLE_TLV("Line Playback Volume", AD1816A_LINE_GAIN_ATT, 8, 0, 31, 1,
917 db_scale_5bit_12db_max),
1da177e4 918AD1816A_DOUBLE("CD Playback Switch", AD1816A_CD_GAIN_ATT, 15, 7, 1, 1),
0e7febf1
TI		 919AD1816A_DOUBLE_TLV("CD Playback Volume", AD1816A_CD_GAIN_ATT, 8, 0, 31, 1,
920 db_scale_5bit_12db_max),
1da177e4 921AD1816A_DOUBLE("Synth Playback Switch", AD1816A_SYNTH_GAIN_ATT, 15, 7, 1, 1),
0e7febf1
TI		 922AD1816A_DOUBLE_TLV("Synth Playback Volume", AD1816A_SYNTH_GAIN_ATT, 8, 0, 31, 1,
923 db_scale_5bit_12db_max),
1da177e4 924AD1816A_DOUBLE("FM Playback Switch", AD1816A_FM_ATT, 15, 7, 1, 1),
0e7febf1
TI		 925AD1816A_DOUBLE_TLV("FM Playback Volume", AD1816A_FM_ATT, 8, 0, 63, 1,
926 db_scale_6bit),
1da177e4 927AD1816A_SINGLE("Mic Playback Switch", AD1816A_MIC_GAIN_ATT, 15, 1, 1),
0e7febf1
TI		 928AD1816A_SINGLE_TLV("Mic Playback Volume", AD1816A_MIC_GAIN_ATT, 8, 31, 1,
929 db_scale_5bit_12db_max),
1da177e4
LT		 930AD1816A_SINGLE("Mic Boost", AD1816A_MIC_GAIN_ATT, 14, 1, 0),
931AD1816A_DOUBLE("Video Playback Switch", AD1816A_VID_GAIN_ATT, 15, 7, 1, 1),
0e7febf1
TI		 932AD1816A_DOUBLE_TLV("Video Playback Volume", AD1816A_VID_GAIN_ATT, 8, 0, 31, 1,
933 db_scale_5bit_12db_max),
1da177e4 934AD1816A_SINGLE("Phone Capture Switch", AD1816A_PHONE_IN_GAIN_ATT, 15, 1, 1),
0e7febf1
TI		 935AD1816A_SINGLE_TLV("Phone Capture Volume", AD1816A_PHONE_IN_GAIN_ATT, 0, 15, 1,
936 db_scale_4bit),
1da177e4 937AD1816A_SINGLE("Phone Playback Switch", AD1816A_PHONE_OUT_ATT, 7, 1, 1),
0e7febf1
TI		 938AD1816A_SINGLE_TLV("Phone Playback Volume", AD1816A_PHONE_OUT_ATT, 0, 31, 1,
939 db_scale_5bit),
1da177e4
LT		 940{
941 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
942 .name = "Capture Source",
943 .info = snd_ad1816a_info_mux,
944 .get = snd_ad1816a_get_mux,
945 .put = snd_ad1816a_put_mux,
946},
947AD1816A_DOUBLE("Capture Switch", AD1816A_ADC_PGA, 15, 7, 1, 1),
0e7febf1
TI		 948AD1816A_DOUBLE_TLV("Capture Volume", AD1816A_ADC_PGA, 8, 0, 15, 0,
949 db_scale_rec_gain),
1da177e4
LT		 950AD1816A_SINGLE("3D Control - Switch", AD1816A_3D_PHAT_CTRL, 15, 1, 1),
951AD1816A_SINGLE("3D Control - Level", AD1816A_3D_PHAT_CTRL, 0, 15, 0),
952};
953
00a4e3d9 954int __devinit snd_ad1816a_mixer(struct snd_ad1816a *chip)
1da177e4 955{
cbdd0dd1 956 struct snd_card *card;
1da177e4
LT		 957 unsigned int idx;
958 int err;
959
622207dc
TI		 960 if (snd_BUG_ON(!chip || !chip->card))
961 return -EINVAL;
1da177e4
LT		 962
963 card = chip->card;
964
965 strcpy(card->mixername, snd_ad1816a_chip_id(chip));
966
967 for (idx = 0; idx < ARRAY_SIZE(snd_ad1816a_controls); idx++) {
968 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_ad1816a_controls[idx], chip))) < 0)
969 return err;
970 }
971 return 0;
972}
ubuntu-zesty-kernel mirror