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1da177e4 LT |
1 | /***************************************************************************** |
2 | * | |
3 | * ESS Maestro/Maestro-2/Maestro-2E driver for Linux 2.[23].x | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
18 | * | |
19 | * (c) Copyright 1999 Alan Cox <alan.cox@linux.org> | |
20 | * | |
21 | * Based heavily on SonicVibes.c: | |
22 | * Copyright (C) 1998-1999 Thomas Sailer (sailer@ife.ee.ethz.ch) | |
23 | * | |
24 | * Heavily modified by Zach Brown <zab@zabbo.net> based on lunch | |
25 | * with ESS engineers. Many thanks to Howard Kim for providing | |
26 | * contacts and hardware. Honorable mention goes to Eric | |
27 | * Brombaugh for all sorts of things. Best regards to the | |
28 | * proprietors of Hack Central for fine lodging. | |
29 | * | |
30 | * Supported devices: | |
31 | * /dev/dsp0-3 standard /dev/dsp device, (mostly) OSS compatible | |
32 | * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible | |
33 | * | |
34 | * Hardware Description | |
35 | * | |
36 | * A working Maestro setup contains the Maestro chip wired to a | |
37 | * codec or 2. In the Maestro we have the APUs, the ASSP, and the | |
38 | * Wavecache. The APUs can be though of as virtual audio routing | |
39 | * channels. They can take data from a number of sources and perform | |
40 | * basic encodings of the data. The wavecache is a storehouse for | |
41 | * PCM data. Typically it deals with PCI and interracts with the | |
42 | * APUs. The ASSP is a wacky DSP like device that ESS is loth | |
43 | * to release docs on. Thankfully it isn't required on the Maestro | |
44 | * until you start doing insane things like FM emulation and surround | |
45 | * encoding. The codecs are almost always AC-97 compliant codecs, | |
46 | * but it appears that early Maestros may have had PT101 (an ESS | |
47 | * part?) wired to them. The only real difference in the Maestro | |
48 | * families is external goop like docking capability, memory for | |
49 | * the ASSP, and initialization differences. | |
50 | * | |
51 | * Driver Operation | |
52 | * | |
53 | * We only drive the APU/Wavecache as typical DACs and drive the | |
54 | * mixers in the codecs. There are 64 APUs. We assign 6 to each | |
55 | * /dev/dsp? device. 2 channels for output, and 4 channels for | |
56 | * input. | |
57 | * | |
58 | * Each APU can do a number of things, but we only really use | |
59 | * 3 basic functions. For playback we use them to convert PCM | |
60 | * data fetched over PCI by the wavecahche into analog data that | |
61 | * is handed to the codec. One APU for mono, and a pair for stereo. | |
62 | * When in stereo, the combination of smarts in the APU and Wavecache | |
63 | * decide which wavecache gets the left or right channel. | |
64 | * | |
65 | * For record we still use the old overly mono system. For each in | |
66 | * coming channel the data comes in from the codec, through a 'input' | |
67 | * APU, through another rate converter APU, and then into memory via | |
68 | * the wavecache and PCI. If its stereo, we mash it back into LRLR in | |
69 | * software. The pass between the 2 APUs is supposedly what requires us | |
70 | * to have a 512 byte buffer sitting around in wavecache/memory. | |
71 | * | |
72 | * The wavecache makes our life even more fun. First off, it can | |
73 | * only address the first 28 bits of PCI address space, making it | |
74 | * useless on quite a few architectures. Secondly, its insane. | |
75 | * It claims to fetch from 4 regions of PCI space, each 4 meg in length. | |
76 | * But that doesn't really work. You can only use 1 region. So all our | |
77 | * allocations have to be in 4meg of each other. Booo. Hiss. | |
78 | * So we have a module parameter, dsps_order, that is the order of | |
79 | * the number of dsps to provide. All their buffer space is allocated | |
80 | * on open time. The sonicvibes OSS routines we inherited really want | |
81 | * power of 2 buffers, so we have all those next to each other, then | |
82 | * 512 byte regions for the recording wavecaches. This ends up | |
83 | * wasting quite a bit of memory. The only fixes I can see would be | |
84 | * getting a kernel allocator that could work in zones, or figuring out | |
85 | * just how to coerce the WP into doing what we want. | |
86 | * | |
87 | * The indirection of the various registers means we have to spinlock | |
88 | * nearly all register accesses. We have the main register indirection | |
89 | * like the wave cache, maestro registers, etc. Then we have beasts | |
90 | * like the APU interface that is indirect registers gotten at through | |
91 | * the main maestro indirection. Ouch. We spinlock around the actual | |
92 | * ports on a per card basis. This means spinlock activity at each IO | |
93 | * operation, but the only IO operation clusters are in non critical | |
94 | * paths and it makes the code far easier to follow. Interrupts are | |
95 | * blocked while holding the locks because the int handler has to | |
96 | * get at some of them :(. The mixer interface doesn't, however. | |
97 | * We also have an OSS state lock that is thrown around in a few | |
98 | * places. | |
99 | * | |
100 | * This driver has brute force APM suspend support. We catch suspend | |
101 | * notifications and stop all work being done on the chip. Any people | |
102 | * that try between this shutdown and the real suspend operation will | |
103 | * be put to sleep. When we resume we restore our software state on | |
104 | * the chip and wake up the people that were using it. The code thats | |
105 | * being used now is quite dirty and assumes we're on a uni-processor | |
106 | * machine. Much of it will need to be cleaned up for SMP ACPI or | |
107 | * similar. | |
108 | * | |
109 | * We also pay attention to PCI power management now. The driver | |
110 | * will power down units of the chip that it knows aren't needed. | |
111 | * The WaveProcessor and company are only powered on when people | |
112 | * have /dev/dsp*s open. On removal the driver will | |
113 | * power down the maestro entirely. There could still be | |
114 | * trouble with BIOSen that magically change power states | |
115 | * themselves, but we'll see. | |
116 | * | |
117 | * History | |
118 | * v0.15 - May 21 2001 - Marcus Meissner <mm@caldera.de> | |
119 | * Ported to Linux 2.4 PCI API. Some clean ups, global devs list | |
120 | * removed (now using pci device driver data). | |
121 | * PM needs to be polished still. Bumped version. | |
122 | * (still kind of v0.14) May 13 2001 - Ben Pfaff <pfaffben@msu.edu> | |
123 | * Add support for 978 docking and basic hardware volume control | |
124 | * (still kind of v0.14) Nov 23 - Alan Cox <alan@redhat.com> | |
125 | * Add clocking= for people with seriously warped hardware | |
126 | * (still v0.14) Nov 10 2000 - Bartlomiej Zolnierkiewicz <bkz@linux-ide.org> | |
127 | * add __init to maestro_ac97_init() and maestro_install() | |
128 | * (still based on v0.14) Mar 29 2000 - Zach Brown <zab@redhat.com> | |
129 | * move to 2.3 power management interface, which | |
130 | * required hacking some suspend/resume/check paths | |
131 | * make static compilation work | |
132 | * v0.14 - Jan 28 2000 - Zach Brown <zab@redhat.com> | |
133 | * add PCI power management through ACPI regs. | |
134 | * we now shut down on machine reboot/halt | |
135 | * leave scary PCI config items alone (isa stuff, mostly) | |
136 | * enable 1921s, it seems only mine was broke. | |
137 | * fix swapped left/right pcm dac. har har. | |
138 | * up bob freq, increase buffers, fix pointers at underflow | |
139 | * silly compilation problems | |
140 | * v0.13 - Nov 18 1999 - Zach Brown <zab@redhat.com> | |
141 | * fix nec Versas? man would that be cool. | |
142 | * v0.12 - Nov 12 1999 - Zach Brown <zab@redhat.com> | |
143 | * brown bag volume max fix.. | |
144 | * v0.11 - Nov 11 1999 - Zach Brown <zab@redhat.com> | |
145 | * use proper stereo apu decoding, mmap/write should work. | |
146 | * make volume sliders more useful, tweak rate calculation. | |
147 | * fix lame 8bit format reporting bug. duh. apm apu saving buglet also | |
148 | * fix maestro 1 clock freq "bug", remove pt101 support | |
149 | * v0.10 - Oct 28 1999 - Zach Brown <zab@redhat.com> | |
150 | * aha, so, sometimes the WP writes a status word to offset 0 | |
151 | * from one of the PCMBARs. rearrange allocation accordingly.. | |
152 | * cheers again to Eric for being a good hacker in investigating this. | |
153 | * Jeroen Hoogervorst submits 7500 fix out of nowhere. yay. :) | |
154 | * v0.09 - Oct 23 1999 - Zach Brown <zab@redhat.com> | |
155 | * added APM support. | |
156 | * re-order something such that some 2Es now work. Magic! | |
157 | * new codec reset routine. made some codecs come to life. | |
158 | * fix clear_advance, sync some control with ESS. | |
159 | * now write to all base regs to be paranoid. | |
160 | * v0.08 - Oct 20 1999 - Zach Brown <zab@redhat.com> | |
161 | * Fix initial buflen bug. I am so smart. also smp compiling.. | |
162 | * I owe Eric yet another beer: fixed recmask, igain, | |
163 | * muting, and adc sync consistency. Go Team. | |
164 | * v0.07 - Oct 4 1999 - Zach Brown <zab@redhat.com> | |
165 | * tweak adc/dac, formating, and stuff to allow full duplex | |
166 | * allocate dsps memory at open() so we can fit in the wavecache window | |
167 | * fix wavecache braindamage. again. no more scribbling? | |
168 | * fix ess 1921 codec bug on some laptops. | |
169 | * fix dumb pci scanning bug | |
170 | * started 2.3 cleanup, redid spinlocks, little cleanups | |
171 | * v0.06 - Sep 20 1999 - Zach Brown <zab@redhat.com> | |
172 | * fix wavecache thinkos. limit to 1 /dev/dsp. | |
173 | * eric is wearing his thinking toque this week. | |
174 | * spotted apu mode bugs and gain ramping problem | |
175 | * don't touch weird mixer regs, make recmask optional | |
176 | * fixed igain inversion, defaults for mixers, clean up rec_start | |
177 | * make mono recording work. | |
178 | * report subsystem stuff, please send reports. | |
179 | * littles: parallel out, amp now | |
180 | * v0.05 - Sep 17 1999 - Zach Brown <zab@redhat.com> | |
181 | * merged and fixed up Eric's initial recording code | |
182 | * munged format handling to catch misuse, needs rewrite. | |
183 | * revert ring bus init, fixup shared int, add pci busmaster setting | |
184 | * fix mixer oss interface, fix mic mute and recmask | |
185 | * mask off unsupported mixers, reset with all 1s, modularize defaults | |
186 | * make sure bob is running while we need it | |
187 | * got rid of device limit, initial minimal apm hooks | |
188 | * pull out dead code/includes, only allow multimedia/audio maestros | |
189 | * v0.04 - Sep 01 1999 - Zach Brown <zab@redhat.com> | |
190 | * copied memory leak fix from sonicvibes driver | |
191 | * different ac97 reset, play with 2.0 ac97, simplify ring bus setup | |
192 | * bob freq code, region sanity, jitter sync fix; all from Eric | |
193 | * | |
194 | * TODO | |
195 | * fix bob frequency | |
196 | * endianness | |
197 | * do smart things with ac97 2.0 bits. | |
198 | * dual codecs | |
199 | * leave 54->61 open | |
200 | * | |
201 | * it also would be fun to have a mode that would not use pci dma at all | |
202 | * but would copy into the wavecache on board memory and use that | |
203 | * on architectures that don't like the maestro's pci dma ickiness. | |
204 | */ | |
205 | ||
206 | /*****************************************************************************/ | |
207 | ||
208 | #include <linux/module.h> | |
209 | #include <linux/sched.h> | |
210 | #include <linux/smp_lock.h> | |
211 | #include <linux/string.h> | |
212 | #include <linux/ctype.h> | |
213 | #include <linux/ioport.h> | |
214 | #include <linux/delay.h> | |
215 | #include <linux/sound.h> | |
216 | #include <linux/slab.h> | |
217 | #include <linux/soundcard.h> | |
218 | #include <linux/pci.h> | |
219 | #include <linux/spinlock.h> | |
220 | #include <linux/init.h> | |
221 | #include <linux/interrupt.h> | |
222 | #include <linux/poll.h> | |
223 | #include <linux/reboot.h> | |
224 | #include <linux/bitops.h> | |
225 | #include <linux/wait.h> | |
226 | ||
227 | #include <asm/current.h> | |
228 | #include <asm/dma.h> | |
229 | #include <asm/io.h> | |
230 | #include <asm/page.h> | |
231 | #include <asm/uaccess.h> | |
232 | ||
1da177e4 LT |
233 | #include "maestro.h" |
234 | ||
235 | static struct pci_driver maestro_pci_driver; | |
236 | ||
237 | /* --------------------------------------------------------------------- */ | |
238 | ||
239 | #define M_DEBUG 1 | |
240 | ||
241 | #ifdef M_DEBUG | |
242 | static int debug; | |
243 | #define M_printk(args...) {if (debug) printk(args);} | |
244 | #else | |
245 | #define M_printk(x) | |
246 | #endif | |
247 | ||
248 | /* we try to setup 2^(dsps_order) /dev/dsp devices */ | |
249 | static int dsps_order; | |
250 | /* whether or not we mess around with power management */ | |
251 | static int use_pm=2; /* set to 1 for force */ | |
252 | /* clocking for broken hardware - a few laptops seem to use a 50Khz clock | |
253 | ie insmod with clocking=50000 or so */ | |
254 | ||
255 | static int clocking=48000; | |
256 | ||
257 | MODULE_AUTHOR("Zach Brown <zab@zabbo.net>, Alan Cox <alan@redhat.com>"); | |
258 | MODULE_DESCRIPTION("ESS Maestro Driver"); | |
259 | MODULE_LICENSE("GPL"); | |
260 | ||
261 | #ifdef M_DEBUG | |
262 | module_param(debug, bool, 0644); | |
263 | #endif | |
264 | module_param(dsps_order, int, 0); | |
265 | module_param(use_pm, int, 0); | |
266 | module_param(clocking, int, 0); | |
267 | ||
268 | /* --------------------------------------------------------------------- */ | |
269 | #define DRIVER_VERSION "0.15" | |
270 | ||
271 | #ifndef PCI_VENDOR_ESS | |
272 | #define PCI_VENDOR_ESS 0x125D | |
273 | #define PCI_DEVICE_ID_ESS_ESS1968 0x1968 /* Maestro 2 */ | |
274 | #define PCI_DEVICE_ID_ESS_ESS1978 0x1978 /* Maestro 2E */ | |
275 | ||
276 | #define PCI_VENDOR_ESS_OLD 0x1285 /* Platform Tech, | |
277 | the people the maestro | |
278 | was bought from */ | |
279 | #define PCI_DEVICE_ID_ESS_ESS0100 0x0100 /* maestro 1 */ | |
280 | #endif /* PCI_VENDOR_ESS */ | |
281 | ||
282 | #define ESS_CHAN_HARD 0x100 | |
283 | ||
284 | /* NEC Versas ? */ | |
285 | #define NEC_VERSA_SUBID1 0x80581033 | |
286 | #define NEC_VERSA_SUBID2 0x803c1033 | |
287 | ||
288 | ||
289 | /* changed so that I could actually find all the | |
290 | references and fix them up. it's a little more readable now. */ | |
291 | #define ESS_FMT_STEREO 0x01 | |
292 | #define ESS_FMT_16BIT 0x02 | |
293 | #define ESS_FMT_MASK 0x03 | |
294 | #define ESS_DAC_SHIFT 0 | |
295 | #define ESS_ADC_SHIFT 4 | |
296 | ||
297 | #define ESS_STATE_MAGIC 0x125D1968 | |
298 | #define ESS_CARD_MAGIC 0x19283746 | |
299 | ||
300 | #define DAC_RUNNING 1 | |
301 | #define ADC_RUNNING 2 | |
302 | ||
303 | #define MAX_DSP_ORDER 2 | |
304 | #define MAX_DSPS (1<<MAX_DSP_ORDER) | |
305 | #define NR_DSPS (1<<dsps_order) | |
306 | #define NR_IDRS 32 | |
307 | ||
308 | #define NR_APUS 64 | |
309 | #define NR_APU_REGS 16 | |
310 | ||
311 | /* acpi states */ | |
312 | enum { | |
313 | ACPI_D0=0, | |
314 | ACPI_D1, | |
315 | ACPI_D2, | |
316 | ACPI_D3 | |
317 | }; | |
318 | ||
319 | /* bits in the acpi masks */ | |
320 | #define ACPI_12MHZ ( 1 << 15) | |
321 | #define ACPI_24MHZ ( 1 << 14) | |
322 | #define ACPI_978 ( 1 << 13) | |
323 | #define ACPI_SPDIF ( 1 << 12) | |
324 | #define ACPI_GLUE ( 1 << 11) | |
325 | #define ACPI__10 ( 1 << 10) /* reserved */ | |
326 | #define ACPI_PCIINT ( 1 << 9) | |
327 | #define ACPI_HV ( 1 << 8) /* hardware volume */ | |
328 | #define ACPI_GPIO ( 1 << 7) | |
329 | #define ACPI_ASSP ( 1 << 6) | |
330 | #define ACPI_SB ( 1 << 5) /* sb emul */ | |
331 | #define ACPI_FM ( 1 << 4) /* fm emul */ | |
332 | #define ACPI_RB ( 1 << 3) /* ringbus / aclink */ | |
333 | #define ACPI_MIDI ( 1 << 2) | |
334 | #define ACPI_GP ( 1 << 1) /* game port */ | |
335 | #define ACPI_WP ( 1 << 0) /* wave processor */ | |
336 | ||
337 | #define ACPI_ALL (0xffff) | |
338 | #define ACPI_SLEEP (~(ACPI_SPDIF|ACPI_ASSP|ACPI_SB|ACPI_FM| \ | |
339 | ACPI_MIDI|ACPI_GP|ACPI_WP)) | |
340 | #define ACPI_NONE (ACPI__10) | |
341 | ||
342 | /* these masks indicate which units we care about at | |
343 | which states */ | |
344 | static u16 acpi_state_mask[] = { | |
345 | [ACPI_D0] = ACPI_ALL, | |
346 | [ACPI_D1] = ACPI_SLEEP, | |
347 | [ACPI_D2] = ACPI_SLEEP, | |
348 | [ACPI_D3] = ACPI_NONE | |
349 | }; | |
350 | ||
351 | static char version[] __devinitdata = | |
352 | KERN_INFO "maestro: version " DRIVER_VERSION " time " __TIME__ " " __DATE__ "\n"; | |
353 | ||
354 | ||
355 | ||
356 | static const unsigned sample_size[] = { 1, 2, 2, 4 }; | |
357 | static const unsigned sample_shift[] = { 0, 1, 1, 2 }; | |
358 | ||
359 | enum card_types_t { | |
360 | TYPE_MAESTRO, | |
361 | TYPE_MAESTRO2, | |
362 | TYPE_MAESTRO2E | |
363 | }; | |
364 | ||
365 | static const char *card_names[]={ | |
366 | [TYPE_MAESTRO] = "ESS Maestro", | |
367 | [TYPE_MAESTRO2] = "ESS Maestro 2", | |
368 | [TYPE_MAESTRO2E] = "ESS Maestro 2E" | |
369 | }; | |
370 | ||
371 | static int clock_freq[]={ | |
372 | [TYPE_MAESTRO] = (49152000L / 1024L), | |
373 | [TYPE_MAESTRO2] = (50000000L / 1024L), | |
374 | [TYPE_MAESTRO2E] = (50000000L / 1024L) | |
375 | }; | |
376 | ||
377 | static int maestro_notifier(struct notifier_block *nb, unsigned long event, void *buf); | |
378 | ||
379 | static struct notifier_block maestro_nb = {maestro_notifier, NULL, 0}; | |
380 | ||
381 | /* --------------------------------------------------------------------- */ | |
382 | ||
383 | struct ess_state { | |
384 | unsigned int magic; | |
385 | /* FIXME: we probably want submixers in here, but only one record pair */ | |
386 | u8 apu[6]; /* l/r output, l/r intput converters, l/r input apus */ | |
387 | u8 apu_mode[6]; /* Running mode for this APU */ | |
388 | u8 apu_pan[6]; /* Panning setup for this APU */ | |
389 | u32 apu_base[6]; /* base address for this apu */ | |
390 | struct ess_card *card; /* Card info */ | |
391 | /* wave stuff */ | |
392 | unsigned int rateadc, ratedac; | |
393 | unsigned char fmt, enable; | |
394 | ||
395 | int index; | |
396 | ||
397 | /* this locks around the oss state in the driver */ | |
398 | spinlock_t lock; | |
399 | /* only let 1 be opening at a time */ | |
400 | struct semaphore open_sem; | |
401 | wait_queue_head_t open_wait; | |
402 | mode_t open_mode; | |
403 | ||
404 | /* soundcore stuff */ | |
405 | int dev_audio; | |
406 | ||
407 | struct dmabuf { | |
408 | void *rawbuf; | |
409 | unsigned buforder; | |
410 | unsigned numfrag; | |
411 | unsigned fragshift; | |
412 | /* XXX zab - swptr only in here so that it can be referenced by | |
413 | clear_advance, as far as I can tell :( */ | |
414 | unsigned hwptr, swptr; | |
415 | unsigned total_bytes; | |
416 | int count; | |
417 | unsigned error; /* over/underrun */ | |
418 | wait_queue_head_t wait; | |
419 | /* redundant, but makes calculations easier */ | |
420 | unsigned fragsize; | |
421 | unsigned dmasize; | |
422 | unsigned fragsamples; | |
423 | /* OSS stuff */ | |
424 | unsigned mapped:1; | |
425 | unsigned ready:1; /* our oss buffers are ready to go */ | |
426 | unsigned endcleared:1; | |
427 | unsigned ossfragshift; | |
428 | int ossmaxfrags; | |
429 | unsigned subdivision; | |
430 | u16 base; /* Offset for ptr */ | |
431 | } dma_dac, dma_adc; | |
432 | ||
433 | /* pointer to each dsp?s piece of the apu->src buffer page */ | |
434 | void *mixbuf; | |
435 | ||
436 | }; | |
437 | ||
438 | struct ess_card { | |
439 | unsigned int magic; | |
440 | ||
441 | /* We keep maestro cards in a linked list */ | |
442 | struct ess_card *next; | |
443 | ||
444 | int dev_mixer; | |
445 | ||
446 | int card_type; | |
447 | ||
448 | /* as most of this is static, | |
449 | perhaps it should be a pointer to a global struct */ | |
450 | struct mixer_goo { | |
451 | int modcnt; | |
452 | int supported_mixers; | |
453 | int stereo_mixers; | |
454 | int record_sources; | |
455 | /* the caller must guarantee arg sanity before calling these */ | |
456 | /* int (*read_mixer)(struct ess_card *card, int index);*/ | |
457 | void (*write_mixer)(struct ess_card *card,int mixer, unsigned int left,unsigned int right); | |
458 | int (*recmask_io)(struct ess_card *card,int rw,int mask); | |
459 | unsigned int mixer_state[SOUND_MIXER_NRDEVICES]; | |
460 | } mix; | |
461 | ||
462 | int power_regs; | |
463 | ||
464 | int in_suspend; | |
465 | wait_queue_head_t suspend_queue; | |
466 | ||
467 | struct ess_state channels[MAX_DSPS]; | |
468 | u16 maestro_map[NR_IDRS]; /* Register map */ | |
469 | /* we have to store this junk so that we can come back from a | |
470 | suspend */ | |
471 | u16 apu_map[NR_APUS][NR_APU_REGS]; /* contents of apu regs */ | |
472 | ||
473 | /* this locks around the physical registers on the card */ | |
474 | spinlock_t lock; | |
475 | ||
476 | /* memory for this card.. wavecache limited :(*/ | |
477 | void *dmapages; | |
478 | int dmaorder; | |
479 | ||
480 | /* hardware resources */ | |
481 | struct pci_dev *pcidev; | |
482 | u32 iobase; | |
483 | u32 irq; | |
484 | ||
485 | int bob_freq; | |
486 | char dsps_open; | |
487 | ||
488 | int dock_mute_vol; | |
489 | }; | |
490 | ||
491 | static void set_mixer(struct ess_card *card,unsigned int mixer, unsigned int val ); | |
492 | ||
493 | static unsigned | |
494 | ld2(unsigned int x) | |
495 | { | |
496 | unsigned r = 0; | |
497 | ||
498 | if (x >= 0x10000) { | |
499 | x >>= 16; | |
500 | r += 16; | |
501 | } | |
502 | if (x >= 0x100) { | |
503 | x >>= 8; | |
504 | r += 8; | |
505 | } | |
506 | if (x >= 0x10) { | |
507 | x >>= 4; | |
508 | r += 4; | |
509 | } | |
510 | if (x >= 4) { | |
511 | x >>= 2; | |
512 | r += 2; | |
513 | } | |
514 | if (x >= 2) | |
515 | r++; | |
516 | return r; | |
517 | } | |
518 | ||
519 | ||
520 | /* --------------------------------------------------------------------- */ | |
521 | ||
522 | static void check_suspend(struct ess_card *card); | |
523 | ||
524 | /* --------------------------------------------------------------------- */ | |
525 | ||
526 | ||
527 | /* | |
528 | * ESS Maestro AC97 codec programming interface. | |
529 | */ | |
530 | ||
531 | static void maestro_ac97_set(struct ess_card *card, u8 cmd, u16 val) | |
532 | { | |
533 | int io = card->iobase; | |
534 | int i; | |
535 | /* | |
536 | * Wait for the codec bus to be free | |
537 | */ | |
538 | ||
539 | check_suspend(card); | |
540 | ||
541 | for(i=0;i<10000;i++) | |
542 | { | |
543 | if(!(inb(io+ESS_AC97_INDEX)&1)) | |
544 | break; | |
545 | } | |
546 | /* | |
547 | * Write the bus | |
548 | */ | |
549 | outw(val, io+ESS_AC97_DATA); | |
550 | mdelay(1); | |
551 | outb(cmd, io+ESS_AC97_INDEX); | |
552 | mdelay(1); | |
553 | } | |
554 | ||
555 | static u16 maestro_ac97_get(struct ess_card *card, u8 cmd) | |
556 | { | |
557 | int io = card->iobase; | |
558 | int sanity=10000; | |
559 | u16 data; | |
560 | int i; | |
561 | ||
562 | check_suspend(card); | |
563 | /* | |
564 | * Wait for the codec bus to be free | |
565 | */ | |
566 | ||
567 | for(i=0;i<10000;i++) | |
568 | { | |
569 | if(!(inb(io+ESS_AC97_INDEX)&1)) | |
570 | break; | |
571 | } | |
572 | ||
573 | outb(cmd|0x80, io+ESS_AC97_INDEX); | |
574 | mdelay(1); | |
575 | ||
576 | while(inb(io+ESS_AC97_INDEX)&1) | |
577 | { | |
578 | sanity--; | |
579 | if(!sanity) | |
580 | { | |
581 | printk(KERN_ERR "maestro: ac97 codec timeout reading 0x%x.\n",cmd); | |
582 | return 0; | |
583 | } | |
584 | } | |
585 | data=inw(io+ESS_AC97_DATA); | |
586 | mdelay(1); | |
587 | return data; | |
588 | } | |
589 | ||
590 | /* OSS interface to the ac97s.. */ | |
591 | ||
592 | #define AC97_STEREO_MASK (SOUND_MASK_VOLUME|\ | |
593 | SOUND_MASK_PCM|SOUND_MASK_LINE|SOUND_MASK_CD|\ | |
594 | SOUND_MASK_VIDEO|SOUND_MASK_LINE1|SOUND_MASK_IGAIN) | |
595 | ||
596 | #define AC97_SUPPORTED_MASK (AC97_STEREO_MASK | \ | |
597 | SOUND_MASK_BASS|SOUND_MASK_TREBLE|SOUND_MASK_MIC|\ | |
598 | SOUND_MASK_SPEAKER) | |
599 | ||
600 | #define AC97_RECORD_MASK (SOUND_MASK_MIC|\ | |
601 | SOUND_MASK_CD| SOUND_MASK_VIDEO| SOUND_MASK_LINE1| SOUND_MASK_LINE|\ | |
602 | SOUND_MASK_PHONEIN) | |
603 | ||
604 | #define supported_mixer(CARD,FOO) ( CARD->mix.supported_mixers & (1<<FOO) ) | |
605 | ||
606 | /* this table has default mixer values for all OSS mixers. | |
607 | be sure to fill it in if you add oss mixers | |
608 | to anyone's supported mixer defines */ | |
609 | ||
610 | static unsigned int mixer_defaults[SOUND_MIXER_NRDEVICES] = { | |
611 | [SOUND_MIXER_VOLUME] = 0x3232, | |
612 | [SOUND_MIXER_BASS] = 0x3232, | |
613 | [SOUND_MIXER_TREBLE] = 0x3232, | |
614 | [SOUND_MIXER_SPEAKER] = 0x3232, | |
615 | [SOUND_MIXER_MIC] = 0x8000, /* annoying */ | |
616 | [SOUND_MIXER_LINE] = 0x3232, | |
617 | [SOUND_MIXER_CD] = 0x3232, | |
618 | [SOUND_MIXER_VIDEO] = 0x3232, | |
619 | [SOUND_MIXER_LINE1] = 0x3232, | |
620 | [SOUND_MIXER_PCM] = 0x3232, | |
621 | [SOUND_MIXER_IGAIN] = 0x3232 | |
622 | }; | |
623 | ||
624 | static struct ac97_mixer_hw { | |
625 | unsigned char offset; | |
626 | int scale; | |
627 | } ac97_hw[SOUND_MIXER_NRDEVICES]= { | |
628 | [SOUND_MIXER_VOLUME] = {0x02,63}, | |
629 | [SOUND_MIXER_BASS] = {0x08,15}, | |
630 | [SOUND_MIXER_TREBLE] = {0x08,15}, | |
631 | [SOUND_MIXER_SPEAKER] = {0x0a,15}, | |
632 | [SOUND_MIXER_MIC] = {0x0e,31}, | |
633 | [SOUND_MIXER_LINE] = {0x10,31}, | |
634 | [SOUND_MIXER_CD] = {0x12,31}, | |
635 | [SOUND_MIXER_VIDEO] = {0x14,31}, | |
636 | [SOUND_MIXER_LINE1] = {0x16,31}, | |
637 | [SOUND_MIXER_PCM] = {0x18,31}, | |
638 | [SOUND_MIXER_IGAIN] = {0x1c,15} | |
639 | }; | |
640 | ||
641 | #if 0 /* *shrug* removed simply because we never used it. | |
642 | feel free to implement again if needed */ | |
643 | ||
644 | /* reads the given OSS mixer from the ac97 | |
645 | the caller must have insured that the ac97 knows | |
646 | about that given mixer, and should be holding a | |
647 | spinlock for the card */ | |
648 | static int ac97_read_mixer(struct ess_card *card, int mixer) | |
649 | { | |
650 | u16 val; | |
651 | int ret=0; | |
652 | struct ac97_mixer_hw *mh = &ac97_hw[mixer]; | |
653 | ||
654 | val = maestro_ac97_get(card, mh->offset); | |
655 | ||
656 | if(AC97_STEREO_MASK & (1<<mixer)) { | |
657 | /* nice stereo mixers .. */ | |
658 | int left,right; | |
659 | ||
660 | left = (val >> 8) & 0x7f; | |
661 | right = val & 0x7f; | |
662 | ||
663 | if (mixer == SOUND_MIXER_IGAIN) { | |
664 | right = (right * 100) / mh->scale; | |
665 | left = (left * 100) / mh->scale; | |
666 | } else { | |
667 | right = 100 - ((right * 100) / mh->scale); | |
668 | left = 100 - ((left * 100) / mh->scale); | |
669 | } | |
670 | ||
671 | ret = left | (right << 8); | |
672 | } else if (mixer == SOUND_MIXER_SPEAKER) { | |
673 | ret = 100 - ((((val & 0x1e)>>1) * 100) / mh->scale); | |
674 | } else if (mixer == SOUND_MIXER_MIC) { | |
675 | ret = 100 - (((val & 0x1f) * 100) / mh->scale); | |
676 | /* the low bit is optional in the tone sliders and masking | |
677 | it lets is avoid the 0xf 'bypass'.. */ | |
678 | } else if (mixer == SOUND_MIXER_BASS) { | |
679 | ret = 100 - ((((val >> 8) & 0xe) * 100) / mh->scale); | |
680 | } else if (mixer == SOUND_MIXER_TREBLE) { | |
681 | ret = 100 - (((val & 0xe) * 100) / mh->scale); | |
682 | } | |
683 | ||
684 | M_printk("read mixer %d (0x%x) %x -> %x\n",mixer,mh->offset,val,ret); | |
685 | ||
686 | return ret; | |
687 | } | |
688 | #endif | |
689 | ||
690 | /* write the OSS encoded volume to the given OSS encoded mixer, | |
691 | again caller's job to make sure all is well in arg land, | |
692 | call with spinlock held */ | |
693 | ||
694 | /* linear scale -> log */ | |
695 | static unsigned char lin2log[101] = | |
696 | { | |
697 | 0, 0 , 15 , 23 , 30 , 34 , 38 , 42 , 45 , 47 , | |
698 | 50 , 52 , 53 , 55 , 57 , 58 , 60 , 61 , 62 , | |
699 | 63 , 65 , 66 , 67 , 68 , 69 , 69 , 70 , 71 , | |
700 | 72 , 73 , 73 , 74 , 75 , 75 , 76 , 77 , 77 , | |
701 | 78 , 78 , 79 , 80 , 80 , 81 , 81 , 82 , 82 , | |
702 | 83 , 83 , 84 , 84 , 84 , 85 , 85 , 86 , 86 , | |
703 | 87 , 87 , 87 , 88 , 88 , 88 , 89 , 89 , 89 , | |
704 | 90 , 90 , 90 , 91 , 91 , 91 , 92 , 92 , 92 , | |
705 | 93 , 93 , 93 , 94 , 94 , 94 , 94 , 95 , 95 , | |
706 | 95 , 95 , 96 , 96 , 96 , 96 , 97 , 97 , 97 , | |
707 | 97 , 98 , 98 , 98 , 98 , 99 , 99 , 99 , 99 , 99 | |
708 | }; | |
709 | ||
710 | static void ac97_write_mixer(struct ess_card *card,int mixer, unsigned int left, unsigned int right) | |
711 | { | |
712 | u16 val=0; | |
713 | struct ac97_mixer_hw *mh = &ac97_hw[mixer]; | |
714 | ||
715 | M_printk("wrote mixer %d (0x%x) %d,%d",mixer,mh->offset,left,right); | |
716 | ||
717 | if(AC97_STEREO_MASK & (1<<mixer)) { | |
718 | /* stereo mixers, mute them if we can */ | |
719 | ||
720 | if (mixer == SOUND_MIXER_IGAIN) { | |
721 | /* igain's slider is reversed.. */ | |
722 | right = (right * mh->scale) / 100; | |
723 | left = (left * mh->scale) / 100; | |
724 | if ((left == 0) && (right == 0)) | |
725 | val |= 0x8000; | |
726 | } else if (mixer == SOUND_MIXER_PCM || mixer == SOUND_MIXER_CD) { | |
727 | /* log conversion seems bad for them */ | |
728 | if ((left == 0) && (right == 0)) | |
729 | val = 0x8000; | |
730 | right = ((100 - right) * mh->scale) / 100; | |
731 | left = ((100 - left) * mh->scale) / 100; | |
732 | } else { | |
733 | /* log conversion for the stereo controls */ | |
734 | if((left == 0) && (right == 0)) | |
735 | val = 0x8000; | |
736 | right = ((100 - lin2log[right]) * mh->scale) / 100; | |
737 | left = ((100 - lin2log[left]) * mh->scale) / 100; | |
738 | } | |
739 | ||
740 | val |= (left << 8) | right; | |
741 | ||
742 | } else if (mixer == SOUND_MIXER_SPEAKER) { | |
743 | val = (((100 - left) * mh->scale) / 100) << 1; | |
744 | } else if (mixer == SOUND_MIXER_MIC) { | |
745 | val = maestro_ac97_get(card, mh->offset) & ~0x801f; | |
746 | val |= (((100 - left) * mh->scale) / 100); | |
747 | /* the low bit is optional in the tone sliders and masking | |
748 | it lets is avoid the 0xf 'bypass'.. */ | |
749 | } else if (mixer == SOUND_MIXER_BASS) { | |
750 | val = maestro_ac97_get(card , mh->offset) & ~0x0f00; | |
751 | val |= ((((100 - left) * mh->scale) / 100) << 8) & 0x0e00; | |
752 | } else if (mixer == SOUND_MIXER_TREBLE) { | |
753 | val = maestro_ac97_get(card , mh->offset) & ~0x000f; | |
754 | val |= (((100 - left) * mh->scale) / 100) & 0x000e; | |
755 | } | |
756 | ||
757 | maestro_ac97_set(card , mh->offset, val); | |
758 | ||
759 | M_printk(" -> %x\n",val); | |
760 | } | |
761 | ||
762 | /* the following tables allow us to go from | |
763 | OSS <-> ac97 quickly. */ | |
764 | ||
765 | enum ac97_recsettings { | |
766 | AC97_REC_MIC=0, | |
767 | AC97_REC_CD, | |
768 | AC97_REC_VIDEO, | |
769 | AC97_REC_AUX, | |
770 | AC97_REC_LINE, | |
771 | AC97_REC_STEREO, /* combination of all enabled outputs.. */ | |
772 | AC97_REC_MONO, /*.. or the mono equivalent */ | |
773 | AC97_REC_PHONE | |
774 | }; | |
775 | ||
776 | static unsigned int ac97_oss_mask[] = { | |
777 | [AC97_REC_MIC] = SOUND_MASK_MIC, | |
778 | [AC97_REC_CD] = SOUND_MASK_CD, | |
779 | [AC97_REC_VIDEO] = SOUND_MASK_VIDEO, | |
780 | [AC97_REC_AUX] = SOUND_MASK_LINE1, | |
781 | [AC97_REC_LINE] = SOUND_MASK_LINE, | |
782 | [AC97_REC_PHONE] = SOUND_MASK_PHONEIN | |
783 | }; | |
784 | ||
785 | /* indexed by bit position */ | |
786 | static unsigned int ac97_oss_rm[] = { | |
787 | [SOUND_MIXER_MIC] = AC97_REC_MIC, | |
788 | [SOUND_MIXER_CD] = AC97_REC_CD, | |
789 | [SOUND_MIXER_VIDEO] = AC97_REC_VIDEO, | |
790 | [SOUND_MIXER_LINE1] = AC97_REC_AUX, | |
791 | [SOUND_MIXER_LINE] = AC97_REC_LINE, | |
792 | [SOUND_MIXER_PHONEIN] = AC97_REC_PHONE | |
793 | }; | |
794 | ||
795 | /* read or write the recmask | |
796 | the ac97 can really have left and right recording | |
797 | inputs independently set, but OSS doesn't seem to | |
798 | want us to express that to the user. | |
799 | the caller guarantees that we have a supported bit set, | |
800 | and they must be holding the card's spinlock */ | |
801 | static int | |
802 | ac97_recmask_io(struct ess_card *card, int read, int mask) | |
803 | { | |
804 | unsigned int val = ac97_oss_mask[ maestro_ac97_get(card, 0x1a) & 0x7 ]; | |
805 | ||
806 | if (read) return val; | |
807 | ||
808 | /* oss can have many inputs, maestro can't. try | |
809 | to pick the 'new' one */ | |
810 | ||
811 | if (mask != val) mask &= ~val; | |
812 | ||
813 | val = ffs(mask) - 1; | |
814 | val = ac97_oss_rm[val]; | |
815 | val |= val << 8; /* set both channels */ | |
816 | ||
817 | M_printk("maestro: setting ac97 recmask to 0x%x\n",val); | |
818 | ||
819 | maestro_ac97_set(card,0x1a,val); | |
820 | ||
821 | return 0; | |
822 | }; | |
823 | ||
824 | /* | |
825 | * The Maestro can be wired to a standard AC97 compliant codec | |
826 | * (see www.intel.com for the pdf's on this), or to a PT101 codec | |
827 | * which appears to be the ES1918 (data sheet on the esstech.com.tw site) | |
828 | * | |
829 | * The PT101 setup is untested. | |
830 | */ | |
831 | ||
832 | static u16 __init maestro_ac97_init(struct ess_card *card) | |
833 | { | |
834 | u16 vend1, vend2, caps; | |
835 | ||
836 | card->mix.supported_mixers = AC97_SUPPORTED_MASK; | |
837 | card->mix.stereo_mixers = AC97_STEREO_MASK; | |
838 | card->mix.record_sources = AC97_RECORD_MASK; | |
839 | /* card->mix.read_mixer = ac97_read_mixer;*/ | |
840 | card->mix.write_mixer = ac97_write_mixer; | |
841 | card->mix.recmask_io = ac97_recmask_io; | |
842 | ||
843 | vend1 = maestro_ac97_get(card, 0x7c); | |
844 | vend2 = maestro_ac97_get(card, 0x7e); | |
845 | ||
846 | caps = maestro_ac97_get(card, 0x00); | |
847 | ||
848 | printk(KERN_INFO "maestro: AC97 Codec detected: v: 0x%2x%2x caps: 0x%x pwr: 0x%x\n", | |
849 | vend1,vend2,caps,maestro_ac97_get(card,0x26) & 0xf); | |
850 | ||
851 | if (! (caps & 0x4) ) { | |
852 | /* no bass/treble nobs */ | |
853 | card->mix.supported_mixers &= ~(SOUND_MASK_BASS|SOUND_MASK_TREBLE); | |
854 | } | |
855 | ||
856 | /* XXX endianness, dork head. */ | |
857 | /* vendor specifc bits.. */ | |
858 | switch ((long)(vend1 << 16) | vend2) { | |
859 | case 0x545200ff: /* TriTech */ | |
860 | /* no idea what this does */ | |
861 | maestro_ac97_set(card,0x2a,0x0001); | |
862 | maestro_ac97_set(card,0x2c,0x0000); | |
863 | maestro_ac97_set(card,0x2c,0xffff); | |
864 | break; | |
865 | #if 0 /* i thought the problems I was seeing were with | |
866 | the 1921, but apparently they were with the pci board | |
867 | it was on, so this code is commented out. | |
868 | lets see if this holds true. */ | |
869 | case 0x83847609: /* ESS 1921 */ | |
870 | /* writing to 0xe (mic) or 0x1a (recmask) seems | |
871 | to hang this codec */ | |
872 | card->mix.supported_mixers &= ~(SOUND_MASK_MIC); | |
873 | card->mix.record_sources = 0; | |
874 | card->mix.recmask_io = NULL; | |
875 | #if 0 /* don't ask. I have yet to see what these actually do. */ | |
876 | maestro_ac97_set(card,0x76,0xABBA); /* o/~ Take a chance on me o/~ */ | |
877 | udelay(20); | |
878 | maestro_ac97_set(card,0x78,0x3002); | |
879 | udelay(20); | |
880 | maestro_ac97_set(card,0x78,0x3802); | |
881 | udelay(20); | |
882 | #endif | |
883 | break; | |
884 | #endif | |
885 | default: break; | |
886 | } | |
887 | ||
888 | maestro_ac97_set(card, 0x1E, 0x0404); | |
889 | /* null misc stuff */ | |
890 | maestro_ac97_set(card, 0x20, 0x0000); | |
891 | ||
892 | return 0; | |
893 | } | |
894 | ||
895 | #if 0 /* there has been 1 person on the planet with a pt101 that we | |
896 | know of. If they care, they can put this back in :) */ | |
897 | static u16 maestro_pt101_init(struct ess_card *card,int iobase) | |
898 | { | |
899 | printk(KERN_INFO "maestro: PT101 Codec detected, initializing but _not_ installing mixer device.\n"); | |
900 | /* who knows.. */ | |
901 | maestro_ac97_set(iobase, 0x2A, 0x0001); | |
902 | maestro_ac97_set(iobase, 0x2C, 0x0000); | |
903 | maestro_ac97_set(iobase, 0x2C, 0xFFFF); | |
904 | maestro_ac97_set(iobase, 0x10, 0x9F1F); | |
905 | maestro_ac97_set(iobase, 0x12, 0x0808); | |
906 | maestro_ac97_set(iobase, 0x14, 0x9F1F); | |
907 | maestro_ac97_set(iobase, 0x16, 0x9F1F); | |
908 | maestro_ac97_set(iobase, 0x18, 0x0404); | |
909 | maestro_ac97_set(iobase, 0x1A, 0x0000); | |
910 | maestro_ac97_set(iobase, 0x1C, 0x0000); | |
911 | maestro_ac97_set(iobase, 0x02, 0x0404); | |
912 | maestro_ac97_set(iobase, 0x04, 0x0808); | |
913 | maestro_ac97_set(iobase, 0x0C, 0x801F); | |
914 | maestro_ac97_set(iobase, 0x0E, 0x801F); | |
915 | return 0; | |
916 | } | |
917 | #endif | |
918 | ||
919 | /* this is very magic, and very slow.. */ | |
920 | static void | |
921 | maestro_ac97_reset(int ioaddr, struct pci_dev *pcidev) | |
922 | { | |
923 | u16 save_68; | |
924 | u16 w; | |
925 | u32 vend; | |
926 | ||
927 | outw( inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); | |
928 | outw( inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a); | |
929 | outw( inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c); | |
930 | ||
931 | /* reset the first codec */ | |
932 | outw(0x0000, ioaddr+0x36); | |
933 | save_68 = inw(ioaddr+0x68); | |
934 | pci_read_config_word(pcidev, 0x58, &w); /* something magical with gpio and bus arb. */ | |
935 | pci_read_config_dword(pcidev, PCI_SUBSYSTEM_VENDOR_ID, &vend); | |
936 | if( w & 0x1) | |
937 | save_68 |= 0x10; | |
938 | outw(0xfffe, ioaddr + 0x64); /* tickly gpio 0.. */ | |
939 | outw(0x0001, ioaddr + 0x68); | |
940 | outw(0x0000, ioaddr + 0x60); | |
941 | udelay(20); | |
942 | outw(0x0001, ioaddr + 0x60); | |
943 | mdelay(20); | |
944 | ||
945 | outw(save_68 | 0x1, ioaddr + 0x68); /* now restore .. */ | |
946 | outw( (inw(ioaddr + 0x38) & 0xfffc)|0x1, ioaddr + 0x38); | |
947 | outw( (inw(ioaddr + 0x3a) & 0xfffc)|0x1, ioaddr + 0x3a); | |
948 | outw( (inw(ioaddr + 0x3c) & 0xfffc)|0x1, ioaddr + 0x3c); | |
949 | ||
950 | /* now the second codec */ | |
951 | outw(0x0000, ioaddr+0x36); | |
952 | outw(0xfff7, ioaddr + 0x64); | |
953 | save_68 = inw(ioaddr+0x68); | |
954 | outw(0x0009, ioaddr + 0x68); | |
955 | outw(0x0001, ioaddr + 0x60); | |
956 | udelay(20); | |
957 | outw(0x0009, ioaddr + 0x60); | |
958 | mdelay(500); /* .. ouch.. */ | |
959 | outw( inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); | |
960 | outw( inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a); | |
961 | outw( inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c); | |
962 | ||
963 | #if 0 /* the loop here needs to be much better if we want it.. */ | |
964 | M_printk("trying software reset\n"); | |
965 | /* try and do a software reset */ | |
966 | outb(0x80|0x7c, ioaddr + 0x30); | |
967 | for (w=0; ; w++) { | |
968 | if ((inw(ioaddr+ 0x30) & 1) == 0) { | |
969 | if(inb(ioaddr + 0x32) !=0) break; | |
970 | ||
971 | outb(0x80|0x7d, ioaddr + 0x30); | |
972 | if (((inw(ioaddr+ 0x30) & 1) == 0) && (inb(ioaddr + 0x32) !=0)) break; | |
973 | outb(0x80|0x7f, ioaddr + 0x30); | |
974 | if (((inw(ioaddr+ 0x30) & 1) == 0) && (inb(ioaddr + 0x32) !=0)) break; | |
975 | } | |
976 | ||
977 | if( w > 10000) { | |
978 | outb( inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37); /* do a software reset */ | |
979 | mdelay(500); /* oh my.. */ | |
980 | outb( inb(ioaddr + 0x37) & ~0x08, ioaddr + 0x37); | |
981 | udelay(1); | |
982 | outw( 0x80, ioaddr+0x30); | |
983 | for(w = 0 ; w < 10000; w++) { | |
984 | if((inw(ioaddr + 0x30) & 1) ==0) break; | |
985 | } | |
986 | } | |
987 | } | |
988 | #endif | |
989 | if ( vend == NEC_VERSA_SUBID1 || vend == NEC_VERSA_SUBID2) { | |
990 | /* turn on external amp? */ | |
991 | outw(0xf9ff, ioaddr + 0x64); | |
992 | outw(inw(ioaddr+0x68) | 0x600, ioaddr + 0x68); | |
993 | outw(0x0209, ioaddr + 0x60); | |
994 | } | |
995 | ||
996 | /* Turn on the 978 docking chip. | |
997 | First frob the "master output enable" bit, | |
998 | then set most of the playback volume control registers to max. */ | |
999 | outb(inb(ioaddr+0xc0)|(1<<5), ioaddr+0xc0); | |
1000 | outb(0xff, ioaddr+0xc3); | |
1001 | outb(0xff, ioaddr+0xc4); | |
1002 | outb(0xff, ioaddr+0xc6); | |
1003 | outb(0xff, ioaddr+0xc8); | |
1004 | outb(0x3f, ioaddr+0xcf); | |
1005 | outb(0x3f, ioaddr+0xd0); | |
1006 | } | |
1007 | /* | |
1008 | * Indirect register access. Not all registers are readable so we | |
1009 | * need to keep register state ourselves | |
1010 | */ | |
1011 | ||
1012 | #define WRITEABLE_MAP 0xEFFFFF | |
1013 | #define READABLE_MAP 0x64003F | |
1014 | ||
1015 | /* | |
1016 | * The Maestro engineers were a little indirection happy. These indirected | |
1017 | * registers themselves include indirect registers at another layer | |
1018 | */ | |
1019 | ||
1020 | static void __maestro_write(struct ess_card *card, u16 reg, u16 data) | |
1021 | { | |
1022 | long ioaddr = card->iobase; | |
1023 | ||
1024 | outw(reg, ioaddr+0x02); | |
1025 | outw(data, ioaddr+0x00); | |
1026 | if( reg >= NR_IDRS) printk("maestro: IDR %d out of bounds!\n",reg); | |
1027 | else card->maestro_map[reg]=data; | |
1028 | ||
1029 | } | |
1030 | ||
1031 | static void maestro_write(struct ess_state *s, u16 reg, u16 data) | |
1032 | { | |
1033 | unsigned long flags; | |
1034 | ||
1035 | check_suspend(s->card); | |
1036 | spin_lock_irqsave(&s->card->lock,flags); | |
1037 | ||
1038 | __maestro_write(s->card,reg,data); | |
1039 | ||
1040 | spin_unlock_irqrestore(&s->card->lock,flags); | |
1041 | } | |
1042 | ||
1043 | static u16 __maestro_read(struct ess_card *card, u16 reg) | |
1044 | { | |
1045 | long ioaddr = card->iobase; | |
1046 | ||
1047 | outw(reg, ioaddr+0x02); | |
1048 | return card->maestro_map[reg]=inw(ioaddr+0x00); | |
1049 | } | |
1050 | ||
1051 | static u16 maestro_read(struct ess_state *s, u16 reg) | |
1052 | { | |
1053 | if(READABLE_MAP & (1<<reg)) | |
1054 | { | |
1055 | unsigned long flags; | |
1056 | check_suspend(s->card); | |
1057 | spin_lock_irqsave(&s->card->lock,flags); | |
1058 | ||
1059 | __maestro_read(s->card,reg); | |
1060 | ||
1061 | spin_unlock_irqrestore(&s->card->lock,flags); | |
1062 | } | |
1063 | return s->card->maestro_map[reg]; | |
1064 | } | |
1065 | ||
1066 | /* | |
1067 | * These routines handle accessing the second level indirections to the | |
1068 | * wave ram. | |
1069 | */ | |
1070 | ||
1071 | /* | |
1072 | * The register names are the ones ESS uses (see 104T31.ZIP) | |
1073 | */ | |
1074 | ||
1075 | #define IDR0_DATA_PORT 0x00 | |
1076 | #define IDR1_CRAM_POINTER 0x01 | |
1077 | #define IDR2_CRAM_DATA 0x02 | |
1078 | #define IDR3_WAVE_DATA 0x03 | |
1079 | #define IDR4_WAVE_PTR_LOW 0x04 | |
1080 | #define IDR5_WAVE_PTR_HI 0x05 | |
1081 | #define IDR6_TIMER_CTRL 0x06 | |
1082 | #define IDR7_WAVE_ROMRAM 0x07 | |
1083 | ||
1084 | static void apu_index_set(struct ess_card *card, u16 index) | |
1085 | { | |
1086 | int i; | |
1087 | __maestro_write(card, IDR1_CRAM_POINTER, index); | |
1088 | for(i=0;i<1000;i++) | |
1089 | if(__maestro_read(card, IDR1_CRAM_POINTER)==index) | |
1090 | return; | |
1091 | printk(KERN_WARNING "maestro: APU register select failed.\n"); | |
1092 | } | |
1093 | ||
1094 | static void apu_data_set(struct ess_card *card, u16 data) | |
1095 | { | |
1096 | int i; | |
1097 | for(i=0;i<1000;i++) | |
1098 | { | |
1099 | if(__maestro_read(card, IDR0_DATA_PORT)==data) | |
1100 | return; | |
1101 | __maestro_write(card, IDR0_DATA_PORT, data); | |
1102 | } | |
1103 | } | |
1104 | ||
1105 | /* | |
1106 | * This is the public interface for APU manipulation. It handles the | |
1107 | * interlock to avoid two APU writes in parallel etc. Don't diddle | |
1108 | * directly with the stuff above. | |
1109 | */ | |
1110 | ||
1111 | static void apu_set_register(struct ess_state *s, u16 channel, u8 reg, u16 data) | |
1112 | { | |
1113 | unsigned long flags; | |
1114 | ||
1115 | check_suspend(s->card); | |
1116 | ||
1117 | if(channel&ESS_CHAN_HARD) | |
1118 | channel&=~ESS_CHAN_HARD; | |
1119 | else | |
1120 | { | |
1121 | if(channel>5) | |
1122 | printk("BAD CHANNEL %d.\n",channel); | |
1123 | else | |
1124 | channel = s->apu[channel]; | |
1125 | /* store based on real hardware apu/reg */ | |
1126 | s->card->apu_map[channel][reg]=data; | |
1127 | } | |
1128 | reg|=(channel<<4); | |
1129 | ||
1130 | /* hooray for double indirection!! */ | |
1131 | spin_lock_irqsave(&s->card->lock,flags); | |
1132 | ||
1133 | apu_index_set(s->card, reg); | |
1134 | apu_data_set(s->card, data); | |
1135 | ||
1136 | spin_unlock_irqrestore(&s->card->lock,flags); | |
1137 | } | |
1138 | ||
1139 | static u16 apu_get_register(struct ess_state *s, u16 channel, u8 reg) | |
1140 | { | |
1141 | unsigned long flags; | |
1142 | u16 v; | |
1143 | ||
1144 | check_suspend(s->card); | |
1145 | ||
1146 | if(channel&ESS_CHAN_HARD) | |
1147 | channel&=~ESS_CHAN_HARD; | |
1148 | else | |
1149 | channel = s->apu[channel]; | |
1150 | ||
1151 | reg|=(channel<<4); | |
1152 | ||
1153 | spin_lock_irqsave(&s->card->lock,flags); | |
1154 | ||
1155 | apu_index_set(s->card, reg); | |
1156 | v=__maestro_read(s->card, IDR0_DATA_PORT); | |
1157 | ||
1158 | spin_unlock_irqrestore(&s->card->lock,flags); | |
1159 | return v; | |
1160 | } | |
1161 | ||
1162 | ||
1163 | /* | |
1164 | * The wavecache buffers between the APUs and | |
1165 | * pci bus mastering | |
1166 | */ | |
1167 | ||
1168 | static void wave_set_register(struct ess_state *s, u16 reg, u16 value) | |
1169 | { | |
1170 | long ioaddr = s->card->iobase; | |
1171 | unsigned long flags; | |
1172 | check_suspend(s->card); | |
1173 | ||
1174 | spin_lock_irqsave(&s->card->lock,flags); | |
1175 | ||
1176 | outw(reg, ioaddr+0x10); | |
1177 | outw(value, ioaddr+0x12); | |
1178 | ||
1179 | spin_unlock_irqrestore(&s->card->lock,flags); | |
1180 | } | |
1181 | ||
1182 | static u16 wave_get_register(struct ess_state *s, u16 reg) | |
1183 | { | |
1184 | long ioaddr = s->card->iobase; | |
1185 | unsigned long flags; | |
1186 | u16 value; | |
1187 | check_suspend(s->card); | |
1188 | ||
1189 | spin_lock_irqsave(&s->card->lock,flags); | |
1190 | outw(reg, ioaddr+0x10); | |
1191 | value=inw(ioaddr+0x12); | |
1192 | spin_unlock_irqrestore(&s->card->lock,flags); | |
1193 | ||
1194 | return value; | |
1195 | } | |
1196 | ||
1197 | static void sound_reset(int ioaddr) | |
1198 | { | |
1199 | outw(0x2000, 0x18+ioaddr); | |
1200 | udelay(1); | |
1201 | outw(0x0000, 0x18+ioaddr); | |
1202 | udelay(1); | |
1203 | } | |
1204 | ||
1205 | /* sets the play formats of these apus, should be passed the already shifted format */ | |
1206 | static void set_apu_fmt(struct ess_state *s, int apu, int mode) | |
1207 | { | |
1208 | int apu_fmt = 0x10; | |
1209 | ||
1210 | if(!(mode&ESS_FMT_16BIT)) apu_fmt+=0x20; | |
1211 | if((mode&ESS_FMT_STEREO)) apu_fmt+=0x10; | |
1212 | s->apu_mode[apu] = apu_fmt; | |
1213 | s->apu_mode[apu+1] = apu_fmt; | |
1214 | } | |
1215 | ||
1216 | /* this only fixes the output apu mode to be later set by start_dac and | |
1217 | company. output apu modes are set in ess_rec_setup */ | |
1218 | static void set_fmt(struct ess_state *s, unsigned char mask, unsigned char data) | |
1219 | { | |
1220 | s->fmt = (s->fmt & mask) | data; | |
1221 | set_apu_fmt(s, 0, (s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK); | |
1222 | } | |
1223 | ||
1224 | /* this is off by a little bit.. */ | |
1225 | static u32 compute_rate(struct ess_state *s, u32 freq) | |
1226 | { | |
1227 | u32 clock = clock_freq[s->card->card_type]; | |
1228 | ||
1229 | freq = (freq * clocking)/48000; | |
1230 | ||
1231 | if (freq == 48000) | |
1232 | return 0x10000; | |
1233 | ||
1234 | return ((freq / clock) <<16 )+ | |
1235 | (((freq % clock) << 16) / clock); | |
1236 | } | |
1237 | ||
1238 | static void set_dac_rate(struct ess_state *s, unsigned int rate) | |
1239 | { | |
1240 | u32 freq; | |
1241 | int fmt = (s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK; | |
1242 | ||
1243 | if (rate > 48000) | |
1244 | rate = 48000; | |
1245 | if (rate < 4000) | |
1246 | rate = 4000; | |
1247 | ||
1248 | s->ratedac = rate; | |
1249 | ||
1250 | if(! (fmt & ESS_FMT_16BIT) && !(fmt & ESS_FMT_STEREO)) | |
1251 | rate >>= 1; | |
1252 | ||
1253 | /* M_printk("computing dac rate %d with mode %d\n",rate,s->fmt);*/ | |
1254 | ||
1255 | freq = compute_rate(s, rate); | |
1256 | ||
1257 | /* Load the frequency, turn on 6dB */ | |
1258 | apu_set_register(s, 0, 2,(apu_get_register(s, 0, 2)&0x00FF)| | |
1259 | ( ((freq&0xFF)<<8)|0x10 )); | |
1260 | apu_set_register(s, 0, 3, freq>>8); | |
1261 | apu_set_register(s, 1, 2,(apu_get_register(s, 1, 2)&0x00FF)| | |
1262 | ( ((freq&0xFF)<<8)|0x10 )); | |
1263 | apu_set_register(s, 1, 3, freq>>8); | |
1264 | } | |
1265 | ||
1266 | static void set_adc_rate(struct ess_state *s, unsigned rate) | |
1267 | { | |
1268 | u32 freq; | |
1269 | ||
1270 | /* Sample Rate conversion APUs don't like 0x10000 for their rate */ | |
1271 | if (rate > 47999) | |
1272 | rate = 47999; | |
1273 | if (rate < 4000) | |
1274 | rate = 4000; | |
1275 | ||
1276 | s->rateadc = rate; | |
1277 | ||
1278 | freq = compute_rate(s, rate); | |
1279 | ||
1280 | /* Load the frequency, turn on 6dB */ | |
1281 | apu_set_register(s, 2, 2,(apu_get_register(s, 2, 2)&0x00FF)| | |
1282 | ( ((freq&0xFF)<<8)|0x10 )); | |
1283 | apu_set_register(s, 2, 3, freq>>8); | |
1284 | apu_set_register(s, 3, 2,(apu_get_register(s, 3, 2)&0x00FF)| | |
1285 | ( ((freq&0xFF)<<8)|0x10 )); | |
1286 | apu_set_register(s, 3, 3, freq>>8); | |
1287 | ||
1288 | /* fix mixer rate at 48khz. and its _must_ be 0x10000. */ | |
1289 | freq = 0x10000; | |
1290 | ||
1291 | apu_set_register(s, 4, 2,(apu_get_register(s, 4, 2)&0x00FF)| | |
1292 | ( ((freq&0xFF)<<8)|0x10 )); | |
1293 | apu_set_register(s, 4, 3, freq>>8); | |
1294 | apu_set_register(s, 5, 2,(apu_get_register(s, 5, 2)&0x00FF)| | |
1295 | ( ((freq&0xFF)<<8)|0x10 )); | |
1296 | apu_set_register(s, 5, 3, freq>>8); | |
1297 | } | |
1298 | ||
1299 | /* Stop our host of recording apus */ | |
1300 | static inline void stop_adc(struct ess_state *s) | |
1301 | { | |
1302 | /* XXX lets hope we don't have to lock around this */ | |
1303 | if (! (s->enable & ADC_RUNNING)) return; | |
1304 | ||
1305 | s->enable &= ~ADC_RUNNING; | |
1306 | apu_set_register(s, 2, 0, apu_get_register(s, 2, 0)&0xFF0F); | |
1307 | apu_set_register(s, 3, 0, apu_get_register(s, 3, 0)&0xFF0F); | |
1308 | apu_set_register(s, 4, 0, apu_get_register(s, 2, 0)&0xFF0F); | |
1309 | apu_set_register(s, 5, 0, apu_get_register(s, 3, 0)&0xFF0F); | |
1310 | } | |
1311 | ||
1312 | /* stop output apus */ | |
1313 | static void stop_dac(struct ess_state *s) | |
1314 | { | |
1315 | /* XXX have to lock around this? */ | |
1316 | if (! (s->enable & DAC_RUNNING)) return; | |
1317 | ||
1318 | s->enable &= ~DAC_RUNNING; | |
1319 | apu_set_register(s, 0, 0, apu_get_register(s, 0, 0)&0xFF0F); | |
1320 | apu_set_register(s, 1, 0, apu_get_register(s, 1, 0)&0xFF0F); | |
1321 | } | |
1322 | ||
1323 | static void start_dac(struct ess_state *s) | |
1324 | { | |
1325 | /* XXX locks? */ | |
1326 | if ( (s->dma_dac.mapped || s->dma_dac.count > 0) && | |
1327 | s->dma_dac.ready && | |
1328 | (! (s->enable & DAC_RUNNING)) ) { | |
1329 | ||
1330 | s->enable |= DAC_RUNNING; | |
1331 | ||
1332 | apu_set_register(s, 0, 0, | |
1333 | (apu_get_register(s, 0, 0)&0xFF0F)|s->apu_mode[0]); | |
1334 | ||
1335 | if((s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_STEREO) | |
1336 | apu_set_register(s, 1, 0, | |
1337 | (apu_get_register(s, 1, 0)&0xFF0F)|s->apu_mode[1]); | |
1338 | } | |
1339 | } | |
1340 | ||
1341 | static void start_adc(struct ess_state *s) | |
1342 | { | |
1343 | /* XXX locks? */ | |
1344 | if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize)) | |
1345 | && s->dma_adc.ready && (! (s->enable & ADC_RUNNING)) ) { | |
1346 | ||
1347 | s->enable |= ADC_RUNNING; | |
1348 | apu_set_register(s, 2, 0, | |
1349 | (apu_get_register(s, 2, 0)&0xFF0F)|s->apu_mode[2]); | |
1350 | apu_set_register(s, 4, 0, | |
1351 | (apu_get_register(s, 4, 0)&0xFF0F)|s->apu_mode[4]); | |
1352 | ||
1353 | if( s->fmt & (ESS_FMT_STEREO << ESS_ADC_SHIFT)) { | |
1354 | apu_set_register(s, 3, 0, | |
1355 | (apu_get_register(s, 3, 0)&0xFF0F)|s->apu_mode[3]); | |
1356 | apu_set_register(s, 5, 0, | |
1357 | (apu_get_register(s, 5, 0)&0xFF0F)|s->apu_mode[5]); | |
1358 | } | |
1359 | ||
1360 | } | |
1361 | } | |
1362 | ||
1363 | ||
1364 | /* | |
1365 | * Native play back driver | |
1366 | */ | |
1367 | ||
1368 | /* the mode passed should be already shifted and masked */ | |
1369 | static void | |
1370 | ess_play_setup(struct ess_state *ess, int mode, u32 rate, void *buffer, int size) | |
1371 | { | |
1372 | u32 pa; | |
1373 | u32 tmpval; | |
1374 | int high_apu = 0; | |
1375 | int channel; | |
1376 | ||
1377 | M_printk("mode=%d rate=%d buf=%p len=%d.\n", | |
1378 | mode, rate, buffer, size); | |
1379 | ||
1380 | /* all maestro sizes are in 16bit words */ | |
1381 | size >>=1; | |
1382 | ||
1383 | if(mode&ESS_FMT_STEREO) { | |
1384 | high_apu++; | |
1385 | /* only 16/stereo gets size divided */ | |
1386 | if(mode&ESS_FMT_16BIT) | |
1387 | size>>=1; | |
1388 | } | |
1389 | ||
1390 | for(channel=0; channel <= high_apu; channel++) | |
1391 | { | |
1392 | pa = virt_to_bus(buffer); | |
1393 | ||
1394 | /* set the wavecache control reg */ | |
1395 | tmpval = (pa - 0x10) & 0xFFF8; | |
1396 | if(!(mode & ESS_FMT_16BIT)) tmpval |= 4; | |
1397 | if(mode & ESS_FMT_STEREO) tmpval |= 2; | |
1398 | ess->apu_base[channel]=tmpval; | |
1399 | wave_set_register(ess, ess->apu[channel]<<3, tmpval); | |
1400 | ||
1401 | pa -= virt_to_bus(ess->card->dmapages); | |
1402 | pa>>=1; /* words */ | |
1403 | ||
1404 | /* base offset of dma calcs when reading the pointer | |
1405 | on the left one */ | |
1406 | if(!channel) ess->dma_dac.base = pa&0xFFFF; | |
1407 | ||
1408 | pa|=0x00400000; /* System RAM */ | |
1409 | ||
1410 | /* XXX the 16bit here might not be needed.. */ | |
1411 | if((mode & ESS_FMT_STEREO) && (mode & ESS_FMT_16BIT)) { | |
1412 | if(channel) | |
1413 | pa|=0x00800000; /* Stereo */ | |
1414 | pa>>=1; | |
1415 | } | |
1416 | ||
1417 | /* XXX think about endianess when writing these registers */ | |
1418 | M_printk("maestro: ess_play_setup: APU[%d] pa = 0x%x\n", ess->apu[channel], pa); | |
1419 | /* start of sample */ | |
1420 | apu_set_register(ess, channel, 4, ((pa>>16)&0xFF)<<8); | |
1421 | apu_set_register(ess, channel, 5, pa&0xFFFF); | |
1422 | /* sample end */ | |
1423 | apu_set_register(ess, channel, 6, (pa+size)&0xFFFF); | |
1424 | /* setting loop len == sample len */ | |
1425 | apu_set_register(ess, channel, 7, size); | |
1426 | ||
1427 | /* clear effects/env.. */ | |
1428 | apu_set_register(ess, channel, 8, 0x0000); | |
1429 | /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */ | |
1430 | apu_set_register(ess, channel, 9, 0xD000); | |
1431 | ||
1432 | /* clear routing stuff */ | |
1433 | apu_set_register(ess, channel, 11, 0x0000); | |
1434 | /* dma on, no envelopes, filter to all 1s) */ | |
1435 | apu_set_register(ess, channel, 0, 0x400F); | |
1436 | ||
1437 | if(mode&ESS_FMT_16BIT) | |
1438 | ess->apu_mode[channel]=0x10; | |
1439 | else | |
1440 | ess->apu_mode[channel]=0x30; | |
1441 | ||
1442 | if(mode&ESS_FMT_STEREO) { | |
1443 | /* set panning: left or right */ | |
1444 | apu_set_register(ess, channel, 10, 0x8F00 | (channel ? 0 : 0x10)); | |
1445 | ess->apu_mode[channel] += 0x10; | |
1446 | } else | |
1447 | apu_set_register(ess, channel, 10, 0x8F08); | |
1448 | } | |
1449 | ||
1450 | /* clear WP interrupts */ | |
1451 | outw(1, ess->card->iobase+0x04); | |
1452 | /* enable WP ints */ | |
1453 | outw(inw(ess->card->iobase+0x18)|4, ess->card->iobase+0x18); | |
1454 | ||
1455 | /* go team! */ | |
1456 | set_dac_rate(ess,rate); | |
1457 | start_dac(ess); | |
1458 | } | |
1459 | ||
1460 | /* | |
1461 | * Native record driver | |
1462 | */ | |
1463 | ||
1464 | /* again, passed mode is alrady shifted/masked */ | |
1465 | static void | |
1466 | ess_rec_setup(struct ess_state *ess, int mode, u32 rate, void *buffer, int size) | |
1467 | { | |
1468 | int apu_step = 2; | |
1469 | int channel; | |
1470 | ||
1471 | M_printk("maestro: ess_rec_setup: mode=%d rate=%d buf=0x%p len=%d.\n", | |
1472 | mode, rate, buffer, size); | |
1473 | ||
1474 | /* all maestro sizes are in 16bit words */ | |
1475 | size >>=1; | |
1476 | ||
1477 | /* we're given the full size of the buffer, but | |
1478 | in stereo each channel will only use its half */ | |
1479 | if(mode&ESS_FMT_STEREO) { | |
1480 | size >>=1; | |
1481 | apu_step = 1; | |
1482 | } | |
1483 | ||
1484 | /* APU assignments: 2 = mono/left SRC | |
1485 | 3 = right SRC | |
1486 | 4 = mono/left Input Mixer | |
1487 | 5 = right Input Mixer */ | |
1488 | for(channel=2;channel<6;channel+=apu_step) | |
1489 | { | |
1490 | int i; | |
1491 | int bsize, route; | |
1492 | u32 pa; | |
1493 | u32 tmpval; | |
1494 | ||
1495 | /* data seems to flow from the codec, through an apu into | |
1496 | the 'mixbuf' bit of page, then through the SRC apu | |
1497 | and out to the real 'buffer'. ok. sure. */ | |
1498 | ||
1499 | if(channel & 0x04) { | |
1500 | /* ok, we're an input mixer going from adc | |
1501 | through the mixbuf to the other apus */ | |
1502 | ||
1503 | if(!(channel & 0x01)) { | |
1504 | pa = virt_to_bus(ess->mixbuf); | |
1505 | } else { | |
1506 | pa = virt_to_bus(ess->mixbuf + (PAGE_SIZE >> 4)); | |
1507 | } | |
1508 | ||
1509 | /* we source from a 'magic' apu */ | |
1510 | bsize = PAGE_SIZE >> 5; /* half of this channels alloc, in words */ | |
1511 | route = 0x14 + (channel - 4); /* parallel in crap, see maestro reg 0xC [8-11] */ | |
1512 | ess->apu_mode[channel] = 0x90; /* Input Mixer */ | |
1513 | ||
1514 | } else { | |
1515 | /* we're a rate converter taking | |
1516 | input from the input apus and outputing it to | |
1517 | system memory */ | |
1518 | if(!(channel & 0x01)) { | |
1519 | pa = virt_to_bus(buffer); | |
1520 | } else { | |
1521 | /* right channel records its split half. | |
1522 | *2 accommodates for rampant shifting earlier */ | |
1523 | pa = virt_to_bus(buffer + size*2); | |
1524 | } | |
1525 | ||
1526 | ess->apu_mode[channel] = 0xB0; /* Sample Rate Converter */ | |
1527 | ||
1528 | bsize = size; | |
1529 | /* get input from inputing apu */ | |
1530 | route = channel + 2; | |
1531 | } | |
1532 | ||
1533 | M_printk("maestro: ess_rec_setup: getting pa 0x%x from %d\n",pa,channel); | |
1534 | ||
1535 | /* set the wavecache control reg */ | |
1536 | tmpval = (pa - 0x10) & 0xFFF8; | |
1537 | ess->apu_base[channel]=tmpval; | |
1538 | wave_set_register(ess, ess->apu[channel]<<3, tmpval); | |
1539 | ||
1540 | pa -= virt_to_bus(ess->card->dmapages); | |
1541 | pa>>=1; /* words */ | |
1542 | ||
1543 | /* base offset of dma calcs when reading the pointer | |
1544 | on this left one */ | |
1545 | if(channel==2) ess->dma_adc.base = pa&0xFFFF; | |
1546 | ||
1547 | pa|=0x00400000; /* bit 22 -> System RAM */ | |
1548 | ||
1549 | M_printk("maestro: ess_rec_setup: APU[%d] pa = 0x%x size = 0x%x route = 0x%x\n", | |
1550 | ess->apu[channel], pa, bsize, route); | |
1551 | ||
1552 | /* Begin loading the APU */ | |
1553 | for(i=0;i<15;i++) /* clear all PBRs */ | |
1554 | apu_set_register(ess, channel, i, 0x0000); | |
1555 | ||
1556 | apu_set_register(ess, channel, 0, 0x400F); | |
1557 | ||
1558 | /* need to enable subgroups.. and we should probably | |
1559 | have different groups for different /dev/dsps.. */ | |
1560 | apu_set_register(ess, channel, 2, 0x8); | |
1561 | ||
1562 | /* Load the buffer into the wave engine */ | |
1563 | apu_set_register(ess, channel, 4, ((pa>>16)&0xFF)<<8); | |
1564 | /* XXX reg is little endian.. */ | |
1565 | apu_set_register(ess, channel, 5, pa&0xFFFF); | |
1566 | apu_set_register(ess, channel, 6, (pa+bsize)&0xFFFF); | |
1567 | apu_set_register(ess, channel, 7, bsize); | |
1568 | ||
1569 | /* clear effects/env.. */ | |
1570 | apu_set_register(ess, channel, 8, 0x00F0); | |
1571 | ||
1572 | /* amplitude now? sure. why not. */ | |
1573 | apu_set_register(ess, channel, 9, 0x0000); | |
1574 | ||
1575 | /* set filter tune, radius, polar pan */ | |
1576 | apu_set_register(ess, channel, 10, 0x8F08); | |
1577 | ||
1578 | /* route input */ | |
1579 | apu_set_register(ess, channel, 11, route); | |
1580 | } | |
1581 | ||
1582 | /* clear WP interrupts */ | |
1583 | outw(1, ess->card->iobase+0x04); | |
1584 | /* enable WP ints */ | |
1585 | outw(inw(ess->card->iobase+0x18)|4, ess->card->iobase+0x18); | |
1586 | ||
1587 | /* let 'er rip */ | |
1588 | set_adc_rate(ess,rate); | |
1589 | start_adc(ess); | |
1590 | } | |
1591 | /* --------------------------------------------------------------------- */ | |
1592 | ||
1593 | static void set_dmaa(struct ess_state *s, unsigned int addr, unsigned int count) | |
1594 | { | |
1595 | M_printk("set_dmaa??\n"); | |
1596 | } | |
1597 | ||
1598 | static void set_dmac(struct ess_state *s, unsigned int addr, unsigned int count) | |
1599 | { | |
1600 | M_printk("set_dmac??\n"); | |
1601 | } | |
1602 | ||
1603 | /* Playback pointer */ | |
1604 | static inline unsigned get_dmaa(struct ess_state *s) | |
1605 | { | |
1606 | int offset; | |
1607 | ||
1608 | offset = apu_get_register(s,0,5); | |
1609 | ||
1610 | /* M_printk("dmaa: offset: %d, base: %d\n",offset,s->dma_dac.base); */ | |
1611 | ||
1612 | offset-=s->dma_dac.base; | |
1613 | ||
1614 | return (offset&0xFFFE)<<1; /* hardware is in words */ | |
1615 | } | |
1616 | ||
1617 | /* Record pointer */ | |
1618 | static inline unsigned get_dmac(struct ess_state *s) | |
1619 | { | |
1620 | int offset; | |
1621 | ||
1622 | offset = apu_get_register(s,2,5); | |
1623 | ||
1624 | /* M_printk("dmac: offset: %d, base: %d\n",offset,s->dma_adc.base); */ | |
1625 | ||
1626 | /* The offset is an address not a position relative to base */ | |
1627 | offset-=s->dma_adc.base; | |
1628 | ||
1629 | return (offset&0xFFFE)<<1; /* hardware is in words */ | |
1630 | } | |
1631 | ||
1632 | /* | |
1633 | * Meet Bob, the timer... | |
1634 | */ | |
1635 | ||
1636 | static irqreturn_t ess_interrupt(int irq, void *dev_id, struct pt_regs *regs); | |
1637 | ||
1638 | static void stop_bob(struct ess_state *s) | |
1639 | { | |
1640 | /* Mask IDR 11,17 */ | |
1641 | maestro_write(s, 0x11, maestro_read(s, 0x11)&~1); | |
1642 | maestro_write(s, 0x17, maestro_read(s, 0x17)&~1); | |
1643 | } | |
1644 | ||
1645 | /* eventually we could be clever and limit bob ints | |
1646 | to the frequency at which our smallest duration | |
1647 | chunks may expire */ | |
1648 | #define ESS_SYSCLK 50000000 | |
1649 | static void start_bob(struct ess_state *s) | |
1650 | { | |
1651 | int prescale; | |
1652 | int divide; | |
1653 | ||
1654 | /* XXX make freq selector much smarter, see calc_bob_rate */ | |
1655 | int freq = 200; | |
1656 | ||
1657 | /* compute ideal interrupt frequency for buffer size & play rate */ | |
1658 | /* first, find best prescaler value to match freq */ | |
1659 | for(prescale=5;prescale<12;prescale++) | |
1660 | if(freq > (ESS_SYSCLK>>(prescale+9))) | |
1661 | break; | |
1662 | ||
1663 | /* next, back off prescaler whilst getting divider into optimum range */ | |
1664 | divide=1; | |
1665 | while((prescale > 5) && (divide<32)) | |
1666 | { | |
1667 | prescale--; | |
1668 | divide <<=1; | |
1669 | } | |
1670 | divide>>=1; | |
1671 | ||
1672 | /* now fine-tune the divider for best match */ | |
1673 | for(;divide<31;divide++) | |
1674 | if(freq >= ((ESS_SYSCLK>>(prescale+9))/(divide+1))) | |
1675 | break; | |
1676 | ||
1677 | /* divide = 0 is illegal, but don't let prescale = 4! */ | |
1678 | if(divide == 0) | |
1679 | { | |
1680 | divide++; | |
1681 | if(prescale>5) | |
1682 | prescale--; | |
1683 | } | |
1684 | ||
1685 | maestro_write(s, 6, 0x9000 | (prescale<<5) | divide); /* set reg */ | |
1686 | ||
1687 | /* Now set IDR 11/17 */ | |
1688 | maestro_write(s, 0x11, maestro_read(s, 0x11)|1); | |
1689 | maestro_write(s, 0x17, maestro_read(s, 0x17)|1); | |
1690 | } | |
1691 | /* --------------------------------------------------------------------- */ | |
1692 | ||
1693 | /* this quickly calculates the frequency needed for bob | |
1694 | and sets it if its different than what bob is | |
1695 | currently running at. its called often so | |
1696 | needs to be fairly quick. */ | |
1697 | #define BOB_MIN 50 | |
1698 | #define BOB_MAX 400 | |
1699 | static void calc_bob_rate(struct ess_state *s) { | |
1700 | #if 0 /* this thing tries to set the frequency of bob such that | |
1701 | there are 2 interrupts / buffer walked by the dac/adc. That | |
1702 | is probably very wrong for people who actually care about | |
1703 | mid buffer positioning. it should be calculated as bytes/interrupt | |
1704 | and that needs to be decided :) so for now just use the static 150 | |
1705 | in start_bob.*/ | |
1706 | ||
1707 | unsigned int dac_rate=2,adc_rate=1,newrate; | |
1708 | static int israte=-1; | |
1709 | ||
1710 | if (s->dma_dac.fragsize == 0) dac_rate = BOB_MIN; | |
1711 | else { | |
1712 | dac_rate = (2 * s->ratedac * sample_size[(s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK]) / | |
1713 | (s->dma_dac.fragsize) ; | |
1714 | } | |
1715 | ||
1716 | if (s->dma_adc.fragsize == 0) adc_rate = BOB_MIN; | |
1717 | else { | |
1718 | adc_rate = (2 * s->rateadc * sample_size[(s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK]) / | |
1719 | (s->dma_adc.fragsize) ; | |
1720 | } | |
1721 | ||
1722 | if(dac_rate > adc_rate) newrate = adc_rate; | |
1723 | else newrate=dac_rate; | |
1724 | ||
1725 | if(newrate > BOB_MAX) newrate = BOB_MAX; | |
1726 | else { | |
1727 | if(newrate < BOB_MIN) | |
1728 | newrate = BOB_MIN; | |
1729 | } | |
1730 | ||
1731 | if( israte != newrate) { | |
1732 | printk("dac: %d adc: %d rate: %d\n",dac_rate,adc_rate,israte); | |
1733 | israte=newrate; | |
1734 | } | |
1735 | #endif | |
1736 | ||
1737 | } | |
1738 | ||
1739 | static int | |
1740 | prog_dmabuf(struct ess_state *s, unsigned rec) | |
1741 | { | |
1742 | struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac; | |
1743 | unsigned rate = rec ? s->rateadc : s->ratedac; | |
1744 | unsigned bytepersec; | |
1745 | unsigned bufs; | |
1746 | unsigned char fmt; | |
1747 | unsigned long flags; | |
1748 | ||
1749 | spin_lock_irqsave(&s->lock, flags); | |
1750 | fmt = s->fmt; | |
1751 | if (rec) { | |
1752 | stop_adc(s); | |
1753 | fmt >>= ESS_ADC_SHIFT; | |
1754 | } else { | |
1755 | stop_dac(s); | |
1756 | fmt >>= ESS_DAC_SHIFT; | |
1757 | } | |
1758 | spin_unlock_irqrestore(&s->lock, flags); | |
1759 | fmt &= ESS_FMT_MASK; | |
1760 | ||
1761 | db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0; | |
1762 | ||
1763 | /* this algorithm is a little nuts.. where did /1000 come from? */ | |
1764 | bytepersec = rate << sample_shift[fmt]; | |
1765 | bufs = PAGE_SIZE << db->buforder; | |
1766 | if (db->ossfragshift) { | |
1767 | if ((1000 << db->ossfragshift) < bytepersec) | |
1768 | db->fragshift = ld2(bytepersec/1000); | |
1769 | else | |
1770 | db->fragshift = db->ossfragshift; | |
1771 | } else { | |
1772 | db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1)); | |
1773 | if (db->fragshift < 3) | |
1774 | db->fragshift = 3; | |
1775 | } | |
1776 | db->numfrag = bufs >> db->fragshift; | |
1777 | while (db->numfrag < 4 && db->fragshift > 3) { | |
1778 | db->fragshift--; | |
1779 | db->numfrag = bufs >> db->fragshift; | |
1780 | } | |
1781 | db->fragsize = 1 << db->fragshift; | |
1782 | if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag) | |
1783 | db->numfrag = db->ossmaxfrags; | |
1784 | db->fragsamples = db->fragsize >> sample_shift[fmt]; | |
1785 | db->dmasize = db->numfrag << db->fragshift; | |
1786 | ||
1787 | M_printk("maestro: setup oss: numfrag: %d fragsize: %d dmasize: %d\n",db->numfrag,db->fragsize,db->dmasize); | |
1788 | ||
1789 | memset(db->rawbuf, (fmt & ESS_FMT_16BIT) ? 0 : 0x80, db->dmasize); | |
1790 | ||
1791 | spin_lock_irqsave(&s->lock, flags); | |
1792 | if (rec) | |
1793 | ess_rec_setup(s, fmt, s->rateadc, db->rawbuf, db->dmasize); | |
1794 | else | |
1795 | ess_play_setup(s, fmt, s->ratedac, db->rawbuf, db->dmasize); | |
1796 | ||
1797 | spin_unlock_irqrestore(&s->lock, flags); | |
1798 | db->ready = 1; | |
1799 | ||
1800 | return 0; | |
1801 | } | |
1802 | ||
1803 | static __inline__ void | |
1804 | clear_advance(struct ess_state *s) | |
1805 | { | |
1806 | unsigned char c = ((s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_16BIT) ? 0 : 0x80; | |
1807 | ||
1808 | unsigned char *buf = s->dma_dac.rawbuf; | |
1809 | unsigned bsize = s->dma_dac.dmasize; | |
1810 | unsigned bptr = s->dma_dac.swptr; | |
1811 | unsigned len = s->dma_dac.fragsize; | |
1812 | ||
1813 | if (bptr + len > bsize) { | |
1814 | unsigned x = bsize - bptr; | |
1815 | memset(buf + bptr, c, x); | |
1816 | /* account for wrapping? */ | |
1817 | bptr = 0; | |
1818 | len -= x; | |
1819 | } | |
1820 | memset(buf + bptr, c, len); | |
1821 | } | |
1822 | ||
1823 | /* call with spinlock held! */ | |
1824 | static void | |
1825 | ess_update_ptr(struct ess_state *s) | |
1826 | { | |
1827 | unsigned hwptr; | |
1828 | int diff; | |
1829 | ||
1830 | /* update ADC pointer */ | |
1831 | if (s->dma_adc.ready) { | |
1832 | /* oh boy should this all be re-written. everything in the current code paths think | |
1833 | that the various counters/pointers are expressed in bytes to the user but we have | |
1834 | two apus doing stereo stuff so we fix it up here.. it propagates to all the various | |
1835 | counters from here. */ | |
1836 | if ( s->fmt & (ESS_FMT_STEREO << ESS_ADC_SHIFT)) { | |
1837 | hwptr = (get_dmac(s)*2) % s->dma_adc.dmasize; | |
1838 | } else { | |
1839 | hwptr = get_dmac(s) % s->dma_adc.dmasize; | |
1840 | } | |
1841 | diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize; | |
1842 | s->dma_adc.hwptr = hwptr; | |
1843 | s->dma_adc.total_bytes += diff; | |
1844 | s->dma_adc.count += diff; | |
1845 | if (s->dma_adc.count >= (signed)s->dma_adc.fragsize) | |
1846 | wake_up(&s->dma_adc.wait); | |
1847 | if (!s->dma_adc.mapped) { | |
1848 | if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) { | |
1849 | /* FILL ME | |
1850 | wrindir(s, SV_CIENABLE, s->enable); */ | |
1851 | stop_adc(s); | |
1852 | /* brute force everyone back in sync, sigh */ | |
1853 | s->dma_adc.count = 0; | |
1854 | s->dma_adc.swptr = 0; | |
1855 | s->dma_adc.hwptr = 0; | |
1856 | s->dma_adc.error++; | |
1857 | } | |
1858 | } | |
1859 | } | |
1860 | /* update DAC pointer */ | |
1861 | if (s->dma_dac.ready) { | |
1862 | hwptr = get_dmaa(s) % s->dma_dac.dmasize; | |
1863 | /* the apu only reports the length it has seen, not the | |
1864 | length of the memory that has been used (the WP | |
1865 | knows that) */ | |
1866 | if ( ((s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK) == (ESS_FMT_STEREO|ESS_FMT_16BIT)) | |
1867 | hwptr<<=1; | |
1868 | ||
1869 | diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize; | |
1870 | /* M_printk("updating dac: hwptr: %d diff: %d\n",hwptr,diff);*/ | |
1871 | s->dma_dac.hwptr = hwptr; | |
1872 | s->dma_dac.total_bytes += diff; | |
1873 | if (s->dma_dac.mapped) { | |
1874 | s->dma_dac.count += diff; | |
1875 | if (s->dma_dac.count >= (signed)s->dma_dac.fragsize) { | |
1876 | wake_up(&s->dma_dac.wait); | |
1877 | } | |
1878 | } else { | |
1879 | s->dma_dac.count -= diff; | |
1880 | /* M_printk("maestro: ess_update_ptr: diff: %d, count: %d\n", diff, s->dma_dac.count); */ | |
1881 | if (s->dma_dac.count <= 0) { | |
1882 | M_printk("underflow! diff: %d count: %d hw: %d sw: %d\n", diff, s->dma_dac.count, | |
1883 | hwptr, s->dma_dac.swptr); | |
1884 | /* FILL ME | |
1885 | wrindir(s, SV_CIENABLE, s->enable); */ | |
1886 | /* XXX how on earth can calling this with the lock held work.. */ | |
1887 | stop_dac(s); | |
1888 | /* brute force everyone back in sync, sigh */ | |
1889 | s->dma_dac.count = 0; | |
1890 | s->dma_dac.swptr = hwptr; | |
1891 | s->dma_dac.error++; | |
1892 | } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) { | |
1893 | clear_advance(s); | |
1894 | s->dma_dac.endcleared = 1; | |
1895 | } | |
1896 | if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize) { | |
1897 | wake_up(&s->dma_dac.wait); | |
1898 | /* printk("waking up DAC count: %d sw: %d hw: %d\n",s->dma_dac.count, s->dma_dac.swptr, | |
1899 | hwptr);*/ | |
1900 | } | |
1901 | } | |
1902 | } | |
1903 | } | |
1904 | ||
1905 | static irqreturn_t | |
1906 | ess_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
1907 | { | |
1908 | struct ess_state *s; | |
1909 | struct ess_card *c = (struct ess_card *)dev_id; | |
1910 | int i; | |
1911 | u32 event; | |
1912 | ||
1913 | if ( ! (event = inb(c->iobase+0x1A)) ) | |
1914 | return IRQ_NONE; | |
1915 | ||
1916 | outw(inw(c->iobase+4)&1, c->iobase+4); | |
1917 | ||
1918 | /* M_printk("maestro int: %x\n",event);*/ | |
1919 | if(event&(1<<6)) | |
1920 | { | |
1921 | int x; | |
1922 | enum {UP_EVT, DOWN_EVT, MUTE_EVT} vol_evt; | |
1923 | int volume; | |
1924 | ||
1925 | /* Figure out which volume control button was pushed, | |
1926 | based on differences from the default register | |
1927 | values. */ | |
1928 | x = inb(c->iobase+0x1c); | |
1929 | if (x&1) vol_evt = MUTE_EVT; | |
1930 | else if (((x>>1)&7) > 4) vol_evt = UP_EVT; | |
1931 | else vol_evt = DOWN_EVT; | |
1932 | ||
1933 | /* Reset the volume control registers. */ | |
1934 | outb(0x88, c->iobase+0x1c); | |
1935 | outb(0x88, c->iobase+0x1d); | |
1936 | outb(0x88, c->iobase+0x1e); | |
1937 | outb(0x88, c->iobase+0x1f); | |
1938 | ||
1939 | /* Deal with the button press in a hammer-handed | |
1940 | manner by adjusting the master mixer volume. */ | |
1941 | volume = c->mix.mixer_state[0] & 0xff; | |
1942 | if (vol_evt == UP_EVT) { | |
1943 | volume += 5; | |
1944 | if (volume > 100) | |
1945 | volume = 100; | |
1946 | } | |
1947 | else if (vol_evt == DOWN_EVT) { | |
1948 | volume -= 5; | |
1949 | if (volume < 0) | |
1950 | volume = 0; | |
1951 | } else { | |
1952 | /* vol_evt == MUTE_EVT */ | |
1953 | if (volume == 0) | |
1954 | volume = c->dock_mute_vol; | |
1955 | else { | |
1956 | c->dock_mute_vol = volume; | |
1957 | volume = 0; | |
1958 | } | |
1959 | } | |
1960 | set_mixer (c, 0, (volume << 8) | volume); | |
1961 | } | |
1962 | ||
1963 | /* Ack all the interrupts. */ | |
1964 | outb(0xFF, c->iobase+0x1A); | |
1965 | ||
1966 | /* | |
1967 | * Update the pointers for all APU's we are running. | |
1968 | */ | |
1969 | for(i=0;i<NR_DSPS;i++) | |
1970 | { | |
1971 | s=&c->channels[i]; | |
1972 | if(s->dev_audio == -1) | |
1973 | break; | |
1974 | spin_lock(&s->lock); | |
1975 | ess_update_ptr(s); | |
1976 | spin_unlock(&s->lock); | |
1977 | } | |
1978 | return IRQ_HANDLED; | |
1979 | } | |
1980 | ||
1981 | ||
1982 | /* --------------------------------------------------------------------- */ | |
1983 | ||
1984 | static const char invalid_magic[] = KERN_CRIT "maestro: invalid magic value in %s\n"; | |
1985 | ||
1986 | #define VALIDATE_MAGIC(FOO,MAG) \ | |
1987 | ({ \ | |
1988 | if (!(FOO) || (FOO)->magic != MAG) { \ | |
1989 | printk(invalid_magic,__FUNCTION__); \ | |
1990 | return -ENXIO; \ | |
1991 | } \ | |
1992 | }) | |
1993 | ||
1994 | #define VALIDATE_STATE(a) VALIDATE_MAGIC(a,ESS_STATE_MAGIC) | |
1995 | #define VALIDATE_CARD(a) VALIDATE_MAGIC(a,ESS_CARD_MAGIC) | |
1996 | ||
1997 | static void set_mixer(struct ess_card *card,unsigned int mixer, unsigned int val ) | |
1998 | { | |
1999 | unsigned int left,right; | |
2000 | /* cleanse input a little */ | |
2001 | right = ((val >> 8) & 0xff) ; | |
2002 | left = (val & 0xff) ; | |
2003 | ||
2004 | if(right > 100) right = 100; | |
2005 | if(left > 100) left = 100; | |
2006 | ||
2007 | card->mix.mixer_state[mixer]=(right << 8) | left; | |
2008 | card->mix.write_mixer(card,mixer,left,right); | |
2009 | } | |
2010 | ||
2011 | static void | |
2012 | mixer_push_state(struct ess_card *card) | |
2013 | { | |
2014 | int i; | |
2015 | for(i = 0 ; i < SOUND_MIXER_NRDEVICES ; i++) { | |
2016 | if( ! supported_mixer(card,i)) continue; | |
2017 | ||
2018 | set_mixer(card,i,card->mix.mixer_state[i]); | |
2019 | } | |
2020 | } | |
2021 | ||
2022 | static int mixer_ioctl(struct ess_card *card, unsigned int cmd, unsigned long arg) | |
2023 | { | |
2024 | int i, val=0; | |
2025 | unsigned long flags; | |
2026 | void __user *argp = (void __user *)arg; | |
2027 | int __user *p = argp; | |
2028 | ||
2029 | VALIDATE_CARD(card); | |
2030 | if (cmd == SOUND_MIXER_INFO) { | |
2031 | mixer_info info; | |
2032 | memset(&info, 0, sizeof(info)); | |
2033 | strlcpy(info.id, card_names[card->card_type], sizeof(info.id)); | |
2034 | strlcpy(info.name, card_names[card->card_type], sizeof(info.name)); | |
2035 | info.modify_counter = card->mix.modcnt; | |
2036 | if (copy_to_user(argp, &info, sizeof(info))) | |
2037 | return -EFAULT; | |
2038 | return 0; | |
2039 | } | |
2040 | if (cmd == SOUND_OLD_MIXER_INFO) { | |
2041 | _old_mixer_info info; | |
2042 | memset(&info, 0, sizeof(info)); | |
2043 | strlcpy(info.id, card_names[card->card_type], sizeof(info.id)); | |
2044 | strlcpy(info.name, card_names[card->card_type], sizeof(info.name)); | |
2045 | if (copy_to_user(argp, &info, sizeof(info))) | |
2046 | return -EFAULT; | |
2047 | return 0; | |
2048 | } | |
2049 | if (cmd == OSS_GETVERSION) | |
2050 | return put_user(SOUND_VERSION, p); | |
2051 | ||
2052 | if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int)) | |
2053 | return -EINVAL; | |
2054 | ||
2055 | if (_IOC_DIR(cmd) == _IOC_READ) { | |
2056 | switch (_IOC_NR(cmd)) { | |
2057 | case SOUND_MIXER_RECSRC: /* give them the current record source */ | |
2058 | ||
2059 | if(!card->mix.recmask_io) { | |
2060 | val = 0; | |
2061 | } else { | |
2062 | spin_lock_irqsave(&card->lock, flags); | |
2063 | val = card->mix.recmask_io(card,1,0); | |
2064 | spin_unlock_irqrestore(&card->lock, flags); | |
2065 | } | |
2066 | break; | |
2067 | ||
2068 | case SOUND_MIXER_DEVMASK: /* give them the supported mixers */ | |
2069 | val = card->mix.supported_mixers; | |
2070 | break; | |
2071 | ||
2072 | case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */ | |
2073 | val = card->mix.record_sources; | |
2074 | break; | |
2075 | ||
2076 | case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */ | |
2077 | val = card->mix.stereo_mixers; | |
2078 | break; | |
2079 | ||
2080 | case SOUND_MIXER_CAPS: | |
2081 | val = SOUND_CAP_EXCL_INPUT; | |
2082 | break; | |
2083 | ||
2084 | default: /* read a specific mixer */ | |
2085 | i = _IOC_NR(cmd); | |
2086 | ||
2087 | if ( ! supported_mixer(card,i)) | |
2088 | return -EINVAL; | |
2089 | ||
2090 | /* do we ever want to touch the hardware? */ | |
2091 | /* spin_lock_irqsave(&card->lock, flags); | |
2092 | val = card->mix.read_mixer(card,i); | |
2093 | spin_unlock_irqrestore(&card->lock, flags);*/ | |
2094 | ||
2095 | val = card->mix.mixer_state[i]; | |
2096 | /* M_printk("returned 0x%x for mixer %d\n",val,i);*/ | |
2097 | ||
2098 | break; | |
2099 | } | |
2100 | return put_user(val, p); | |
2101 | } | |
2102 | ||
2103 | if (_IOC_DIR(cmd) != (_IOC_WRITE|_IOC_READ)) | |
2104 | return -EINVAL; | |
2105 | ||
2106 | card->mix.modcnt++; | |
2107 | ||
2108 | if (get_user(val, p)) | |
2109 | return -EFAULT; | |
2110 | ||
2111 | switch (_IOC_NR(cmd)) { | |
2112 | case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */ | |
2113 | ||
2114 | if (!card->mix.recmask_io) return -EINVAL; | |
2115 | if(!val) return 0; | |
2116 | if(! (val &= card->mix.record_sources)) return -EINVAL; | |
2117 | ||
2118 | spin_lock_irqsave(&card->lock, flags); | |
2119 | card->mix.recmask_io(card,0,val); | |
2120 | spin_unlock_irqrestore(&card->lock, flags); | |
2121 | return 0; | |
2122 | ||
2123 | default: | |
2124 | i = _IOC_NR(cmd); | |
2125 | ||
2126 | if ( ! supported_mixer(card,i)) | |
2127 | return -EINVAL; | |
2128 | ||
2129 | spin_lock_irqsave(&card->lock, flags); | |
2130 | set_mixer(card,i,val); | |
2131 | spin_unlock_irqrestore(&card->lock, flags); | |
2132 | ||
2133 | return 0; | |
2134 | } | |
2135 | } | |
2136 | ||
2137 | /* --------------------------------------------------------------------- */ | |
2138 | static int ess_open_mixdev(struct inode *inode, struct file *file) | |
2139 | { | |
2140 | unsigned int minor = iminor(inode); | |
2141 | struct ess_card *card = NULL; | |
2142 | struct pci_dev *pdev = NULL; | |
2143 | struct pci_driver *drvr; | |
2144 | ||
2145 | while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev)) != NULL) { | |
2146 | drvr = pci_dev_driver (pdev); | |
2147 | if (drvr == &maestro_pci_driver) { | |
2148 | card = (struct ess_card*)pci_get_drvdata (pdev); | |
2149 | if (!card) | |
2150 | continue; | |
2151 | if (card->dev_mixer == minor) | |
2152 | break; | |
2153 | } | |
2154 | } | |
2155 | if (!card) | |
2156 | return -ENODEV; | |
2157 | file->private_data = card; | |
2158 | return nonseekable_open(inode, file); | |
2159 | } | |
2160 | ||
2161 | static int ess_release_mixdev(struct inode *inode, struct file *file) | |
2162 | { | |
2163 | struct ess_card *card = (struct ess_card *)file->private_data; | |
2164 | ||
2165 | VALIDATE_CARD(card); | |
2166 | ||
2167 | return 0; | |
2168 | } | |
2169 | ||
2170 | static int ess_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) | |
2171 | { | |
2172 | struct ess_card *card = (struct ess_card *)file->private_data; | |
2173 | ||
2174 | VALIDATE_CARD(card); | |
2175 | ||
2176 | return mixer_ioctl(card, cmd, arg); | |
2177 | } | |
2178 | ||
2179 | static /*const*/ struct file_operations ess_mixer_fops = { | |
2180 | .owner = THIS_MODULE, | |
2181 | .llseek = no_llseek, | |
2182 | .ioctl = ess_ioctl_mixdev, | |
2183 | .open = ess_open_mixdev, | |
2184 | .release = ess_release_mixdev, | |
2185 | }; | |
2186 | ||
2187 | /* --------------------------------------------------------------------- */ | |
2188 | ||
2189 | static int drain_dac(struct ess_state *s, int nonblock) | |
2190 | { | |
2191 | DECLARE_WAITQUEUE(wait,current); | |
2192 | unsigned long flags; | |
2193 | int count; | |
2194 | signed long tmo; | |
2195 | ||
2196 | if (s->dma_dac.mapped || !s->dma_dac.ready) | |
2197 | return 0; | |
2198 | current->state = TASK_INTERRUPTIBLE; | |
2199 | add_wait_queue(&s->dma_dac.wait, &wait); | |
2200 | for (;;) { | |
2201 | /* XXX uhm.. questionable locking*/ | |
2202 | spin_lock_irqsave(&s->lock, flags); | |
2203 | count = s->dma_dac.count; | |
2204 | spin_unlock_irqrestore(&s->lock, flags); | |
2205 | if (count <= 0) | |
2206 | break; | |
2207 | if (signal_pending(current)) | |
2208 | break; | |
2209 | if (nonblock) { | |
2210 | remove_wait_queue(&s->dma_dac.wait, &wait); | |
2211 | current->state = TASK_RUNNING; | |
2212 | return -EBUSY; | |
2213 | } | |
2214 | tmo = (count * HZ) / s->ratedac; | |
2215 | tmo >>= sample_shift[(s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK]; | |
2216 | /* XXX this is just broken. someone is waking us up alot, or schedule_timeout is broken. | |
2217 | or something. who cares. - zach */ | |
2218 | if (!schedule_timeout(tmo ? tmo : 1) && tmo) | |
2219 | M_printk(KERN_DEBUG "maestro: dma timed out?? %ld\n",jiffies); | |
2220 | } | |
2221 | remove_wait_queue(&s->dma_dac.wait, &wait); | |
2222 | current->state = TASK_RUNNING; | |
2223 | if (signal_pending(current)) | |
2224 | return -ERESTARTSYS; | |
2225 | return 0; | |
2226 | } | |
2227 | ||
2228 | /* --------------------------------------------------------------------- */ | |
2229 | /* Zach sez: "god this is gross.." */ | |
2230 | static int | |
2231 | comb_stereo(unsigned char *real_buffer,unsigned char *tmp_buffer, int offset, | |
2232 | int count, int bufsize) | |
2233 | { | |
2234 | /* No such thing as stereo recording, so we | |
2235 | use dual input mixers. which means we have to | |
2236 | combine mono to stereo buffer. yuck. | |
2237 | ||
2238 | but we don't have to be able to work a byte at a time..*/ | |
2239 | ||
2240 | unsigned char *so,*left,*right; | |
2241 | int i; | |
2242 | ||
2243 | so = tmp_buffer; | |
2244 | left = real_buffer + offset; | |
2245 | right = real_buffer + bufsize/2 + offset; | |
2246 | ||
2247 | /* M_printk("comb_stereo writing %d to %p from %p and %p, offset: %d size: %d\n",count/2, tmp_buffer,left,right,offset,bufsize);*/ | |
2248 | ||
2249 | for(i=count/4; i ; i--) { | |
2250 | (*(so+2)) = *(right++); | |
2251 | (*(so+3)) = *(right++); | |
2252 | (*so) = *(left++); | |
2253 | (*(so+1)) = *(left++); | |
2254 | so+=4; | |
2255 | } | |
2256 | ||
2257 | return 0; | |
2258 | } | |
2259 | ||
2260 | /* in this loop, dma_adc.count signifies the amount of data thats waiting | |
2261 | to be copied to the user's buffer. it is filled by the interrupt | |
2262 | handler and drained by this loop. */ | |
2263 | static ssize_t | |
2264 | ess_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos) | |
2265 | { | |
2266 | struct ess_state *s = (struct ess_state *)file->private_data; | |
2267 | ssize_t ret; | |
2268 | unsigned long flags; | |
2269 | unsigned swptr; | |
2270 | int cnt; | |
2271 | unsigned char *combbuf = NULL; | |
2272 | ||
2273 | VALIDATE_STATE(s); | |
2274 | if (s->dma_adc.mapped) | |
2275 | return -ENXIO; | |
2276 | if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1))) | |
2277 | return ret; | |
2278 | if (!access_ok(VERIFY_WRITE, buffer, count)) | |
2279 | return -EFAULT; | |
2280 | if(!(combbuf = kmalloc(count,GFP_KERNEL))) | |
2281 | return -ENOMEM; | |
2282 | ret = 0; | |
2283 | ||
2284 | calc_bob_rate(s); | |
2285 | ||
2286 | while (count > 0) { | |
2287 | spin_lock_irqsave(&s->lock, flags); | |
2288 | /* remember, all these things are expressed in bytes to be | |
2289 | sent to the user.. hence the evil / 2 down below */ | |
2290 | swptr = s->dma_adc.swptr; | |
2291 | cnt = s->dma_adc.dmasize-swptr; | |
2292 | if (s->dma_adc.count < cnt) | |
2293 | cnt = s->dma_adc.count; | |
2294 | spin_unlock_irqrestore(&s->lock, flags); | |
2295 | ||
2296 | if (cnt > count) | |
2297 | cnt = count; | |
2298 | ||
2299 | if ( cnt > 0 ) cnt &= ~3; | |
2300 | ||
2301 | if (cnt <= 0) { | |
2302 | start_adc(s); | |
2303 | if (file->f_flags & O_NONBLOCK) | |
2304 | { | |
2305 | ret = ret ? ret : -EAGAIN; | |
2306 | goto rec_return_free; | |
2307 | } | |
2308 | if (!interruptible_sleep_on_timeout(&s->dma_adc.wait, HZ)) { | |
2309 | if(! s->card->in_suspend) printk(KERN_DEBUG "maestro: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n", | |
2310 | s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count, | |
2311 | s->dma_adc.hwptr, s->dma_adc.swptr); | |
2312 | stop_adc(s); | |
2313 | spin_lock_irqsave(&s->lock, flags); | |
2314 | set_dmac(s, virt_to_bus(s->dma_adc.rawbuf), s->dma_adc.numfrag << s->dma_adc.fragshift); | |
2315 | /* program enhanced mode registers */ | |
2316 | /* FILL ME */ | |
2317 | /* wrindir(s, SV_CIDMACBASECOUNT1, (s->dma_adc.fragsamples-1) >> 8); | |
2318 | wrindir(s, SV_CIDMACBASECOUNT0, s->dma_adc.fragsamples-1); */ | |
2319 | s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0; | |
2320 | spin_unlock_irqrestore(&s->lock, flags); | |
2321 | } | |
2322 | if (signal_pending(current)) | |
2323 | { | |
2324 | ret = ret ? ret : -ERESTARTSYS; | |
2325 | goto rec_return_free; | |
2326 | } | |
2327 | continue; | |
2328 | } | |
2329 | ||
2330 | if(s->fmt & (ESS_FMT_STEREO << ESS_ADC_SHIFT)) { | |
2331 | /* swptr/2 so that we know the real offset in each apu's buffer */ | |
2332 | comb_stereo(s->dma_adc.rawbuf,combbuf,swptr/2,cnt,s->dma_adc.dmasize); | |
2333 | if (copy_to_user(buffer, combbuf, cnt)) { | |
2334 | ret = ret ? ret : -EFAULT; | |
2335 | goto rec_return_free; | |
2336 | } | |
2337 | } else { | |
2338 | if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) { | |
2339 | ret = ret ? ret : -EFAULT; | |
2340 | goto rec_return_free; | |
2341 | } | |
2342 | } | |
2343 | ||
2344 | swptr = (swptr + cnt) % s->dma_adc.dmasize; | |
2345 | spin_lock_irqsave(&s->lock, flags); | |
2346 | s->dma_adc.swptr = swptr; | |
2347 | s->dma_adc.count -= cnt; | |
2348 | spin_unlock_irqrestore(&s->lock, flags); | |
2349 | count -= cnt; | |
2350 | buffer += cnt; | |
2351 | ret += cnt; | |
2352 | start_adc(s); | |
2353 | } | |
2354 | ||
2355 | rec_return_free: | |
09417379 | 2356 | kfree(combbuf); |
1da177e4 LT |
2357 | return ret; |
2358 | } | |
2359 | ||
2360 | static ssize_t | |
2361 | ess_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos) | |
2362 | { | |
2363 | struct ess_state *s = (struct ess_state *)file->private_data; | |
2364 | ssize_t ret; | |
2365 | unsigned long flags; | |
2366 | unsigned swptr; | |
2367 | int cnt; | |
2368 | ||
2369 | VALIDATE_STATE(s); | |
2370 | if (s->dma_dac.mapped) | |
2371 | return -ENXIO; | |
2372 | if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0))) | |
2373 | return ret; | |
2374 | if (!access_ok(VERIFY_READ, buffer, count)) | |
2375 | return -EFAULT; | |
2376 | ret = 0; | |
2377 | ||
2378 | calc_bob_rate(s); | |
2379 | ||
2380 | while (count > 0) { | |
2381 | spin_lock_irqsave(&s->lock, flags); | |
2382 | ||
2383 | if (s->dma_dac.count < 0) { | |
2384 | s->dma_dac.count = 0; | |
2385 | s->dma_dac.swptr = s->dma_dac.hwptr; | |
2386 | } | |
2387 | swptr = s->dma_dac.swptr; | |
2388 | ||
2389 | cnt = s->dma_dac.dmasize-swptr; | |
2390 | ||
2391 | if (s->dma_dac.count + cnt > s->dma_dac.dmasize) | |
2392 | cnt = s->dma_dac.dmasize - s->dma_dac.count; | |
2393 | ||
2394 | spin_unlock_irqrestore(&s->lock, flags); | |
2395 | ||
2396 | if (cnt > count) | |
2397 | cnt = count; | |
2398 | ||
2399 | if (cnt <= 0) { | |
2400 | start_dac(s); | |
2401 | if (file->f_flags & O_NONBLOCK) { | |
2402 | if(!ret) ret = -EAGAIN; | |
2403 | goto return_free; | |
2404 | } | |
2405 | if (!interruptible_sleep_on_timeout(&s->dma_dac.wait, HZ)) { | |
2406 | if(! s->card->in_suspend) printk(KERN_DEBUG "maestro: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n", | |
2407 | s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count, | |
2408 | s->dma_dac.hwptr, s->dma_dac.swptr); | |
2409 | stop_dac(s); | |
2410 | spin_lock_irqsave(&s->lock, flags); | |
2411 | set_dmaa(s, virt_to_bus(s->dma_dac.rawbuf), s->dma_dac.numfrag << s->dma_dac.fragshift); | |
2412 | /* program enhanced mode registers */ | |
2413 | /* wrindir(s, SV_CIDMAABASECOUNT1, (s->dma_dac.fragsamples-1) >> 8); | |
2414 | wrindir(s, SV_CIDMAABASECOUNT0, s->dma_dac.fragsamples-1); */ | |
2415 | /* FILL ME */ | |
2416 | s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0; | |
2417 | spin_unlock_irqrestore(&s->lock, flags); | |
2418 | } | |
2419 | if (signal_pending(current)) { | |
2420 | if (!ret) ret = -ERESTARTSYS; | |
2421 | goto return_free; | |
2422 | } | |
2423 | continue; | |
2424 | } | |
2425 | if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) { | |
2426 | if (!ret) ret = -EFAULT; | |
2427 | goto return_free; | |
2428 | } | |
2429 | /* printk("wrote %d bytes at sw: %d cnt: %d while hw: %d\n",cnt, swptr, s->dma_dac.count, s->dma_dac.hwptr);*/ | |
2430 | ||
2431 | swptr = (swptr + cnt) % s->dma_dac.dmasize; | |
2432 | ||
2433 | spin_lock_irqsave(&s->lock, flags); | |
2434 | s->dma_dac.swptr = swptr; | |
2435 | s->dma_dac.count += cnt; | |
2436 | s->dma_dac.endcleared = 0; | |
2437 | spin_unlock_irqrestore(&s->lock, flags); | |
2438 | count -= cnt; | |
2439 | buffer += cnt; | |
2440 | ret += cnt; | |
2441 | start_dac(s); | |
2442 | } | |
2443 | return_free: | |
2444 | return ret; | |
2445 | } | |
2446 | ||
2447 | /* No kernel lock - we have our own spinlock */ | |
2448 | static unsigned int ess_poll(struct file *file, struct poll_table_struct *wait) | |
2449 | { | |
2450 | struct ess_state *s = (struct ess_state *)file->private_data; | |
2451 | unsigned long flags; | |
2452 | unsigned int mask = 0; | |
2453 | ||
2454 | VALIDATE_STATE(s); | |
2455 | ||
2456 | /* In 0.14 prog_dmabuf always returns success anyway ... */ | |
2457 | if (file->f_mode & FMODE_WRITE) { | |
2458 | if (!s->dma_dac.ready && prog_dmabuf(s, 0)) | |
2459 | return 0; | |
2460 | } | |
2461 | if (file->f_mode & FMODE_READ) { | |
2462 | if (!s->dma_adc.ready && prog_dmabuf(s, 1)) | |
2463 | return 0; | |
2464 | } | |
2465 | ||
2466 | if (file->f_mode & FMODE_WRITE) | |
2467 | poll_wait(file, &s->dma_dac.wait, wait); | |
2468 | if (file->f_mode & FMODE_READ) | |
2469 | poll_wait(file, &s->dma_adc.wait, wait); | |
2470 | spin_lock_irqsave(&s->lock, flags); | |
2471 | ess_update_ptr(s); | |
2472 | if (file->f_mode & FMODE_READ) { | |
2473 | if (s->dma_adc.count >= (signed)s->dma_adc.fragsize) | |
2474 | mask |= POLLIN | POLLRDNORM; | |
2475 | } | |
2476 | if (file->f_mode & FMODE_WRITE) { | |
2477 | if (s->dma_dac.mapped) { | |
2478 | if (s->dma_dac.count >= (signed)s->dma_dac.fragsize) | |
2479 | mask |= POLLOUT | POLLWRNORM; | |
2480 | } else { | |
2481 | if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize) | |
2482 | mask |= POLLOUT | POLLWRNORM; | |
2483 | } | |
2484 | } | |
2485 | spin_unlock_irqrestore(&s->lock, flags); | |
2486 | return mask; | |
2487 | } | |
2488 | ||
2489 | static int ess_mmap(struct file *file, struct vm_area_struct *vma) | |
2490 | { | |
2491 | struct ess_state *s = (struct ess_state *)file->private_data; | |
2492 | struct dmabuf *db; | |
2493 | int ret = -EINVAL; | |
2494 | unsigned long size; | |
2495 | ||
2496 | VALIDATE_STATE(s); | |
2497 | lock_kernel(); | |
2498 | if (vma->vm_flags & VM_WRITE) { | |
2499 | if ((ret = prog_dmabuf(s, 1)) != 0) | |
2500 | goto out; | |
2501 | db = &s->dma_dac; | |
2502 | } else | |
2503 | #if 0 | |
2504 | /* if we can have the wp/wc do the combining | |
2505 | we can turn this back on. */ | |
2506 | if (vma->vm_flags & VM_READ) { | |
2507 | if ((ret = prog_dmabuf(s, 0)) != 0) | |
2508 | goto out; | |
2509 | db = &s->dma_adc; | |
2510 | } else | |
2511 | #endif | |
2512 | goto out; | |
2513 | ret = -EINVAL; | |
2514 | if (vma->vm_pgoff != 0) | |
2515 | goto out; | |
2516 | size = vma->vm_end - vma->vm_start; | |
2517 | if (size > (PAGE_SIZE << db->buforder)) | |
2518 | goto out; | |
2519 | ret = -EAGAIN; | |
2520 | if (remap_pfn_range(vma, vma->vm_start, | |
2521 | virt_to_phys(db->rawbuf) >> PAGE_SHIFT, | |
2522 | size, vma->vm_page_prot)) | |
2523 | goto out; | |
2524 | db->mapped = 1; | |
2525 | ret = 0; | |
2526 | out: | |
2527 | unlock_kernel(); | |
2528 | return ret; | |
2529 | } | |
2530 | ||
2531 | static int ess_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) | |
2532 | { | |
2533 | struct ess_state *s = (struct ess_state *)file->private_data; | |
2534 | unsigned long flags; | |
2535 | audio_buf_info abinfo; | |
2536 | count_info cinfo; | |
2537 | int val, mapped, ret; | |
2538 | unsigned char fmtm, fmtd; | |
2539 | void __user *argp = (void __user *)arg; | |
2540 | int __user *p = argp; | |
2541 | ||
2542 | /* printk("maestro: ess_ioctl: cmd %d\n", cmd);*/ | |
2543 | ||
2544 | VALIDATE_STATE(s); | |
2545 | mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) || | |
2546 | ((file->f_mode & FMODE_READ) && s->dma_adc.mapped); | |
2547 | switch (cmd) { | |
2548 | case OSS_GETVERSION: | |
2549 | return put_user(SOUND_VERSION, p); | |
2550 | ||
2551 | case SNDCTL_DSP_SYNC: | |
2552 | if (file->f_mode & FMODE_WRITE) | |
2553 | return drain_dac(s, file->f_flags & O_NONBLOCK); | |
2554 | return 0; | |
2555 | ||
2556 | case SNDCTL_DSP_SETDUPLEX: | |
2557 | /* XXX fix */ | |
2558 | return 0; | |
2559 | ||
2560 | case SNDCTL_DSP_GETCAPS: | |
2561 | return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p); | |
2562 | ||
2563 | case SNDCTL_DSP_RESET: | |
2564 | if (file->f_mode & FMODE_WRITE) { | |
2565 | stop_dac(s); | |
2566 | synchronize_irq(s->card->pcidev->irq); | |
2567 | s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0; | |
2568 | } | |
2569 | if (file->f_mode & FMODE_READ) { | |
2570 | stop_adc(s); | |
2571 | synchronize_irq(s->card->pcidev->irq); | |
2572 | s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0; | |
2573 | } | |
2574 | return 0; | |
2575 | ||
2576 | case SNDCTL_DSP_SPEED: | |
2577 | if (get_user(val, p)) | |
2578 | return -EFAULT; | |
2579 | if (val >= 0) { | |
2580 | if (file->f_mode & FMODE_READ) { | |
2581 | stop_adc(s); | |
2582 | s->dma_adc.ready = 0; | |
2583 | set_adc_rate(s, val); | |
2584 | } | |
2585 | if (file->f_mode & FMODE_WRITE) { | |
2586 | stop_dac(s); | |
2587 | s->dma_dac.ready = 0; | |
2588 | set_dac_rate(s, val); | |
2589 | } | |
2590 | } | |
2591 | return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p); | |
2592 | ||
2593 | case SNDCTL_DSP_STEREO: | |
2594 | if (get_user(val, p)) | |
2595 | return -EFAULT; | |
2596 | fmtd = 0; | |
2597 | fmtm = ~0; | |
2598 | if (file->f_mode & FMODE_READ) { | |
2599 | stop_adc(s); | |
2600 | s->dma_adc.ready = 0; | |
2601 | if (val) | |
2602 | fmtd |= ESS_FMT_STEREO << ESS_ADC_SHIFT; | |
2603 | else | |
2604 | fmtm &= ~(ESS_FMT_STEREO << ESS_ADC_SHIFT); | |
2605 | } | |
2606 | if (file->f_mode & FMODE_WRITE) { | |
2607 | stop_dac(s); | |
2608 | s->dma_dac.ready = 0; | |
2609 | if (val) | |
2610 | fmtd |= ESS_FMT_STEREO << ESS_DAC_SHIFT; | |
2611 | else | |
2612 | fmtm &= ~(ESS_FMT_STEREO << ESS_DAC_SHIFT); | |
2613 | } | |
2614 | set_fmt(s, fmtm, fmtd); | |
2615 | return 0; | |
2616 | ||
2617 | case SNDCTL_DSP_CHANNELS: | |
2618 | if (get_user(val, p)) | |
2619 | return -EFAULT; | |
2620 | if (val != 0) { | |
2621 | fmtd = 0; | |
2622 | fmtm = ~0; | |
2623 | if (file->f_mode & FMODE_READ) { | |
2624 | stop_adc(s); | |
2625 | s->dma_adc.ready = 0; | |
2626 | if (val >= 2) | |
2627 | fmtd |= ESS_FMT_STEREO << ESS_ADC_SHIFT; | |
2628 | else | |
2629 | fmtm &= ~(ESS_FMT_STEREO << ESS_ADC_SHIFT); | |
2630 | } | |
2631 | if (file->f_mode & FMODE_WRITE) { | |
2632 | stop_dac(s); | |
2633 | s->dma_dac.ready = 0; | |
2634 | if (val >= 2) | |
2635 | fmtd |= ESS_FMT_STEREO << ESS_DAC_SHIFT; | |
2636 | else | |
2637 | fmtm &= ~(ESS_FMT_STEREO << ESS_DAC_SHIFT); | |
2638 | } | |
2639 | set_fmt(s, fmtm, fmtd); | |
2640 | } | |
2641 | return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_STEREO << ESS_ADC_SHIFT) | |
2642 | : (ESS_FMT_STEREO << ESS_DAC_SHIFT))) ? 2 : 1, p); | |
2643 | ||
2644 | case SNDCTL_DSP_GETFMTS: /* Returns a mask */ | |
2645 | return put_user(AFMT_U8|AFMT_S16_LE, p); | |
2646 | ||
2647 | case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/ | |
2648 | if (get_user(val, p)) | |
2649 | return -EFAULT; | |
2650 | if (val != AFMT_QUERY) { | |
2651 | fmtd = 0; | |
2652 | fmtm = ~0; | |
2653 | if (file->f_mode & FMODE_READ) { | |
2654 | stop_adc(s); | |
2655 | s->dma_adc.ready = 0; | |
2656 | /* fixed at 16bit for now */ | |
2657 | fmtd |= ESS_FMT_16BIT << ESS_ADC_SHIFT; | |
2658 | #if 0 | |
2659 | if (val == AFMT_S16_LE) | |
2660 | fmtd |= ESS_FMT_16BIT << ESS_ADC_SHIFT; | |
2661 | else | |
2662 | fmtm &= ~(ESS_FMT_16BIT << ESS_ADC_SHIFT); | |
2663 | #endif | |
2664 | } | |
2665 | if (file->f_mode & FMODE_WRITE) { | |
2666 | stop_dac(s); | |
2667 | s->dma_dac.ready = 0; | |
2668 | if (val == AFMT_S16_LE) | |
2669 | fmtd |= ESS_FMT_16BIT << ESS_DAC_SHIFT; | |
2670 | else | |
2671 | fmtm &= ~(ESS_FMT_16BIT << ESS_DAC_SHIFT); | |
2672 | } | |
2673 | set_fmt(s, fmtm, fmtd); | |
2674 | } | |
2675 | return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? | |
2676 | (ESS_FMT_16BIT << ESS_ADC_SHIFT) | |
2677 | : (ESS_FMT_16BIT << ESS_DAC_SHIFT))) ? | |
2678 | AFMT_S16_LE : | |
2679 | AFMT_U8, | |
2680 | p); | |
2681 | ||
2682 | case SNDCTL_DSP_POST: | |
2683 | return 0; | |
2684 | ||
2685 | case SNDCTL_DSP_GETTRIGGER: | |
2686 | val = 0; | |
2687 | if ((file->f_mode & FMODE_READ) && (s->enable & ADC_RUNNING)) | |
2688 | val |= PCM_ENABLE_INPUT; | |
2689 | if ((file->f_mode & FMODE_WRITE) && (s->enable & DAC_RUNNING)) | |
2690 | val |= PCM_ENABLE_OUTPUT; | |
2691 | return put_user(val, p); | |
2692 | ||
2693 | case SNDCTL_DSP_SETTRIGGER: | |
2694 | if (get_user(val, p)) | |
2695 | return -EFAULT; | |
2696 | if (file->f_mode & FMODE_READ) { | |
2697 | if (val & PCM_ENABLE_INPUT) { | |
2698 | if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1))) | |
2699 | return ret; | |
2700 | start_adc(s); | |
2701 | } else | |
2702 | stop_adc(s); | |
2703 | } | |
2704 | if (file->f_mode & FMODE_WRITE) { | |
2705 | if (val & PCM_ENABLE_OUTPUT) { | |
2706 | if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0))) | |
2707 | return ret; | |
2708 | start_dac(s); | |
2709 | } else | |
2710 | stop_dac(s); | |
2711 | } | |
2712 | return 0; | |
2713 | ||
2714 | case SNDCTL_DSP_GETOSPACE: | |
2715 | if (!(file->f_mode & FMODE_WRITE)) | |
2716 | return -EINVAL; | |
2717 | if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0))) | |
2718 | return ret; | |
2719 | spin_lock_irqsave(&s->lock, flags); | |
2720 | ess_update_ptr(s); | |
2721 | abinfo.fragsize = s->dma_dac.fragsize; | |
2722 | abinfo.bytes = s->dma_dac.dmasize - s->dma_dac.count; | |
2723 | abinfo.fragstotal = s->dma_dac.numfrag; | |
2724 | abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift; | |
2725 | spin_unlock_irqrestore(&s->lock, flags); | |
2726 | return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0; | |
2727 | ||
2728 | case SNDCTL_DSP_GETISPACE: | |
2729 | if (!(file->f_mode & FMODE_READ)) | |
2730 | return -EINVAL; | |
2731 | if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1))) | |
2732 | return ret; | |
2733 | spin_lock_irqsave(&s->lock, flags); | |
2734 | ess_update_ptr(s); | |
2735 | abinfo.fragsize = s->dma_adc.fragsize; | |
2736 | abinfo.bytes = s->dma_adc.count; | |
2737 | abinfo.fragstotal = s->dma_adc.numfrag; | |
2738 | abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift; | |
2739 | spin_unlock_irqrestore(&s->lock, flags); | |
2740 | return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0; | |
2741 | ||
2742 | case SNDCTL_DSP_NONBLOCK: | |
2743 | file->f_flags |= O_NONBLOCK; | |
2744 | return 0; | |
2745 | ||
2746 | case SNDCTL_DSP_GETODELAY: | |
2747 | if (!(file->f_mode & FMODE_WRITE)) | |
2748 | return -EINVAL; | |
2749 | if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0))) | |
2750 | return ret; | |
2751 | spin_lock_irqsave(&s->lock, flags); | |
2752 | ess_update_ptr(s); | |
2753 | val = s->dma_dac.count; | |
2754 | spin_unlock_irqrestore(&s->lock, flags); | |
2755 | return put_user(val, p); | |
2756 | ||
2757 | case SNDCTL_DSP_GETIPTR: | |
2758 | if (!(file->f_mode & FMODE_READ)) | |
2759 | return -EINVAL; | |
2760 | if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1))) | |
2761 | return ret; | |
2762 | spin_lock_irqsave(&s->lock, flags); | |
2763 | ess_update_ptr(s); | |
2764 | cinfo.bytes = s->dma_adc.total_bytes; | |
2765 | cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift; | |
2766 | cinfo.ptr = s->dma_adc.hwptr; | |
2767 | if (s->dma_adc.mapped) | |
2768 | s->dma_adc.count &= s->dma_adc.fragsize-1; | |
2769 | spin_unlock_irqrestore(&s->lock, flags); | |
2770 | if (copy_to_user(argp, &cinfo, sizeof(cinfo))) | |
2771 | return -EFAULT; | |
2772 | return 0; | |
2773 | ||
2774 | case SNDCTL_DSP_GETOPTR: | |
2775 | if (!(file->f_mode & FMODE_WRITE)) | |
2776 | return -EINVAL; | |
2777 | if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0))) | |
2778 | return ret; | |
2779 | spin_lock_irqsave(&s->lock, flags); | |
2780 | ess_update_ptr(s); | |
2781 | cinfo.bytes = s->dma_dac.total_bytes; | |
2782 | cinfo.blocks = s->dma_dac.count >> s->dma_dac.fragshift; | |
2783 | cinfo.ptr = s->dma_dac.hwptr; | |
2784 | if (s->dma_dac.mapped) | |
2785 | s->dma_dac.count &= s->dma_dac.fragsize-1; | |
2786 | spin_unlock_irqrestore(&s->lock, flags); | |
2787 | if (copy_to_user(argp, &cinfo, sizeof(cinfo))) | |
2788 | return -EFAULT; | |
2789 | return 0; | |
2790 | ||
2791 | case SNDCTL_DSP_GETBLKSIZE: | |
2792 | if (file->f_mode & FMODE_WRITE) { | |
2793 | if ((val = prog_dmabuf(s, 0))) | |
2794 | return val; | |
2795 | return put_user(s->dma_dac.fragsize, p); | |
2796 | } | |
2797 | if ((val = prog_dmabuf(s, 1))) | |
2798 | return val; | |
2799 | return put_user(s->dma_adc.fragsize, p); | |
2800 | ||
2801 | case SNDCTL_DSP_SETFRAGMENT: | |
2802 | if (get_user(val, p)) | |
2803 | return -EFAULT; | |
2804 | M_printk("maestro: SETFRAGMENT: %0x\n",val); | |
2805 | if (file->f_mode & FMODE_READ) { | |
2806 | s->dma_adc.ossfragshift = val & 0xffff; | |
2807 | s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff; | |
2808 | if (s->dma_adc.ossfragshift < 4) | |
2809 | s->dma_adc.ossfragshift = 4; | |
2810 | if (s->dma_adc.ossfragshift > 15) | |
2811 | s->dma_adc.ossfragshift = 15; | |
2812 | if (s->dma_adc.ossmaxfrags < 4) | |
2813 | s->dma_adc.ossmaxfrags = 4; | |
2814 | } | |
2815 | if (file->f_mode & FMODE_WRITE) { | |
2816 | s->dma_dac.ossfragshift = val & 0xffff; | |
2817 | s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff; | |
2818 | if (s->dma_dac.ossfragshift < 4) | |
2819 | s->dma_dac.ossfragshift = 4; | |
2820 | if (s->dma_dac.ossfragshift > 15) | |
2821 | s->dma_dac.ossfragshift = 15; | |
2822 | if (s->dma_dac.ossmaxfrags < 4) | |
2823 | s->dma_dac.ossmaxfrags = 4; | |
2824 | } | |
2825 | return 0; | |
2826 | ||
2827 | case SNDCTL_DSP_SUBDIVIDE: | |
2828 | if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) || | |
2829 | (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision)) | |
2830 | return -EINVAL; | |
2831 | if (get_user(val, p)) | |
2832 | return -EFAULT; | |
2833 | if (val != 1 && val != 2 && val != 4) | |
2834 | return -EINVAL; | |
2835 | if (file->f_mode & FMODE_READ) | |
2836 | s->dma_adc.subdivision = val; | |
2837 | if (file->f_mode & FMODE_WRITE) | |
2838 | s->dma_dac.subdivision = val; | |
2839 | return 0; | |
2840 | ||
2841 | case SOUND_PCM_READ_RATE: | |
2842 | return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p); | |
2843 | ||
2844 | case SOUND_PCM_READ_CHANNELS: | |
2845 | return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_STEREO << ESS_ADC_SHIFT) | |
2846 | : (ESS_FMT_STEREO << ESS_DAC_SHIFT))) ? 2 : 1, p); | |
2847 | ||
2848 | case SOUND_PCM_READ_BITS: | |
2849 | return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_16BIT << ESS_ADC_SHIFT) | |
2850 | : (ESS_FMT_16BIT << ESS_DAC_SHIFT))) ? 16 : 8, p); | |
2851 | ||
2852 | case SOUND_PCM_WRITE_FILTER: | |
2853 | case SNDCTL_DSP_SETSYNCRO: | |
2854 | case SOUND_PCM_READ_FILTER: | |
2855 | return -EINVAL; | |
2856 | ||
2857 | } | |
2858 | return -EINVAL; | |
2859 | } | |
2860 | ||
2861 | static void | |
2862 | set_base_registers(struct ess_state *s,void *vaddr) | |
2863 | { | |
2864 | unsigned long packed_phys = virt_to_bus(vaddr)>>12; | |
2865 | wave_set_register(s, 0x01FC , packed_phys); | |
2866 | wave_set_register(s, 0x01FD , packed_phys); | |
2867 | wave_set_register(s, 0x01FE , packed_phys); | |
2868 | wave_set_register(s, 0x01FF , packed_phys); | |
2869 | } | |
2870 | ||
2871 | /* | |
2872 | * this guy makes sure we're in the right power | |
2873 | * state for what we want to be doing | |
2874 | */ | |
2875 | static void maestro_power(struct ess_card *card, int tostate) | |
2876 | { | |
2877 | u16 active_mask = acpi_state_mask[tostate]; | |
2878 | u8 state; | |
2879 | ||
2880 | if(!use_pm) return; | |
2881 | ||
2882 | pci_read_config_byte(card->pcidev, card->power_regs+0x4, &state); | |
2883 | state&=3; | |
2884 | ||
2885 | /* make sure we're in the right state */ | |
2886 | if(state != tostate) { | |
2887 | M_printk(KERN_WARNING "maestro: dev %02x:%02x.%x switching from D%d to D%d\n", | |
2888 | card->pcidev->bus->number, | |
2889 | PCI_SLOT(card->pcidev->devfn), | |
2890 | PCI_FUNC(card->pcidev->devfn), | |
2891 | state,tostate); | |
2892 | pci_write_config_byte(card->pcidev, card->power_regs+0x4, tostate); | |
2893 | } | |
2894 | ||
2895 | /* and make sure the units we care about are on | |
2896 | XXX we might want to do this before state flipping? */ | |
2897 | pci_write_config_word(card->pcidev, 0x54, ~ active_mask); | |
2898 | pci_write_config_word(card->pcidev, 0x56, ~ active_mask); | |
2899 | } | |
2900 | ||
2901 | /* we allocate a large power of two for all our memory. | |
2902 | this is cut up into (not to scale :): | |
2903 | |silly fifo word | 512byte mixbuf per adc | dac/adc * channels | | |
2904 | */ | |
2905 | static int | |
2906 | allocate_buffers(struct ess_state *s) | |
2907 | { | |
2908 | void *rawbuf=NULL; | |
2909 | int order,i; | |
2910 | struct page *page, *pend; | |
2911 | ||
2912 | /* alloc as big a chunk as we can */ | |
2913 | for (order = (dsps_order + (16-PAGE_SHIFT) + 1); order >= (dsps_order + 2 + 1); order--) | |
2914 | if((rawbuf = (void *)__get_free_pages(GFP_KERNEL|GFP_DMA, order))) | |
2915 | break; | |
2916 | ||
2917 | if (!rawbuf) | |
2918 | return 1; | |
2919 | ||
2920 | M_printk("maestro: allocated %ld (%d) bytes at %p\n",PAGE_SIZE<<order,order, rawbuf); | |
2921 | ||
2922 | if ((virt_to_bus(rawbuf) + (PAGE_SIZE << order) - 1) & ~((1<<28)-1)) { | |
2923 | printk(KERN_ERR "maestro: DMA buffer beyond 256MB! busaddr 0x%lx size %ld\n", | |
2924 | virt_to_bus(rawbuf), PAGE_SIZE << order); | |
2925 | kfree(rawbuf); | |
2926 | return 1; | |
2927 | } | |
2928 | ||
2929 | s->card->dmapages = rawbuf; | |
2930 | s->card->dmaorder = order; | |
2931 | ||
2932 | for(i=0;i<NR_DSPS;i++) { | |
2933 | struct ess_state *ess = &s->card->channels[i]; | |
2934 | ||
2935 | if(ess->dev_audio == -1) | |
2936 | continue; | |
2937 | ||
2938 | ess->dma_dac.ready = s->dma_dac.mapped = 0; | |
2939 | ess->dma_adc.ready = s->dma_adc.mapped = 0; | |
2940 | ess->dma_adc.buforder = ess->dma_dac.buforder = order - 1 - dsps_order - 1; | |
2941 | ||
2942 | /* offset dac and adc buffers starting half way through and then at each [da][ad]c's | |
2943 | order's intervals.. */ | |
2944 | ess->dma_dac.rawbuf = rawbuf + (PAGE_SIZE<<(order-1)) + (i * ( PAGE_SIZE << (ess->dma_dac.buforder + 1 ))); | |
2945 | ess->dma_adc.rawbuf = ess->dma_dac.rawbuf + ( PAGE_SIZE << ess->dma_dac.buforder); | |
2946 | /* offset mixbuf by a mixbuf so that the lame status fifo can | |
2947 | happily scribble away.. */ | |
2948 | ess->mixbuf = rawbuf + (512 * (i+1)); | |
2949 | ||
2950 | M_printk("maestro: setup apu %d: dac: %p adc: %p mix: %p\n",i,ess->dma_dac.rawbuf, | |
2951 | ess->dma_adc.rawbuf, ess->mixbuf); | |
2952 | ||
2953 | } | |
2954 | ||
2955 | /* now mark the pages as reserved; otherwise remap_pfn_range doesn't do what we want */ | |
2956 | pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1); | |
2957 | for (page = virt_to_page(rawbuf); page <= pend; page++) | |
2958 | SetPageReserved(page); | |
2959 | ||
2960 | return 0; | |
2961 | } | |
2962 | static void | |
2963 | free_buffers(struct ess_state *s) | |
2964 | { | |
2965 | struct page *page, *pend; | |
2966 | ||
2967 | s->dma_dac.rawbuf = s->dma_adc.rawbuf = NULL; | |
2968 | s->dma_dac.mapped = s->dma_adc.mapped = 0; | |
2969 | s->dma_dac.ready = s->dma_adc.ready = 0; | |
2970 | ||
2971 | M_printk("maestro: freeing %p\n",s->card->dmapages); | |
2972 | /* undo marking the pages as reserved */ | |
2973 | ||
2974 | pend = virt_to_page(s->card->dmapages + (PAGE_SIZE << s->card->dmaorder) - 1); | |
2975 | for (page = virt_to_page(s->card->dmapages); page <= pend; page++) | |
2976 | ClearPageReserved(page); | |
2977 | ||
2978 | free_pages((unsigned long)s->card->dmapages,s->card->dmaorder); | |
2979 | s->card->dmapages = NULL; | |
2980 | } | |
2981 | ||
2982 | static int | |
2983 | ess_open(struct inode *inode, struct file *file) | |
2984 | { | |
2985 | unsigned int minor = iminor(inode); | |
2986 | struct ess_state *s = NULL; | |
2987 | unsigned char fmtm = ~0, fmts = 0; | |
2988 | struct pci_dev *pdev = NULL; | |
2989 | /* | |
2990 | * Scan the cards and find the channel. We only | |
2991 | * do this at open time so it is ok | |
2992 | */ | |
2993 | ||
2994 | while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev)) != NULL) { | |
2995 | struct ess_card *c; | |
2996 | struct pci_driver *drvr; | |
2997 | ||
2998 | drvr = pci_dev_driver (pdev); | |
2999 | if (drvr == &maestro_pci_driver) { | |
3000 | int i; | |
3001 | struct ess_state *sp; | |
3002 | ||
3003 | c = (struct ess_card*)pci_get_drvdata (pdev); | |
3004 | if (!c) | |
3005 | continue; | |
3006 | for(i=0;i<NR_DSPS;i++) | |
3007 | { | |
3008 | sp=&c->channels[i]; | |
3009 | if(sp->dev_audio < 0) | |
3010 | continue; | |
3011 | if((sp->dev_audio ^ minor) & ~0xf) | |
3012 | continue; | |
3013 | s=sp; | |
3014 | } | |
3015 | } | |
3016 | } | |
3017 | if (!s) | |
3018 | return -ENODEV; | |
3019 | ||
3020 | VALIDATE_STATE(s); | |
3021 | file->private_data = s; | |
3022 | /* wait for device to become free */ | |
3023 | down(&s->open_sem); | |
3024 | while (s->open_mode & file->f_mode) { | |
3025 | if (file->f_flags & O_NONBLOCK) { | |
3026 | up(&s->open_sem); | |
3027 | return -EWOULDBLOCK; | |
3028 | } | |
3029 | up(&s->open_sem); | |
3030 | interruptible_sleep_on(&s->open_wait); | |
3031 | if (signal_pending(current)) | |
3032 | return -ERESTARTSYS; | |
3033 | down(&s->open_sem); | |
3034 | } | |
3035 | ||
3036 | /* under semaphore.. */ | |
3037 | if ((s->card->dmapages==NULL) && allocate_buffers(s)) { | |
3038 | up(&s->open_sem); | |
3039 | return -ENOMEM; | |
3040 | } | |
3041 | ||
3042 | /* we're covered by the open_sem */ | |
3043 | if( ! s->card->dsps_open ) { | |
3044 | maestro_power(s->card,ACPI_D0); | |
3045 | start_bob(s); | |
3046 | } | |
3047 | s->card->dsps_open++; | |
3048 | M_printk("maestro: open, %d bobs now\n",s->card->dsps_open); | |
3049 | ||
3050 | /* ok, lets write WC base regs now that we've | |
3051 | powered up the chip */ | |
3052 | M_printk("maestro: writing 0x%lx (bus 0x%lx) to the wp\n",virt_to_bus(s->card->dmapages), | |
3053 | ((virt_to_bus(s->card->dmapages))&0xFFE00000)>>12); | |
3054 | set_base_registers(s,s->card->dmapages); | |
3055 | ||
3056 | if (file->f_mode & FMODE_READ) { | |
3057 | /* | |
3058 | fmtm &= ~((ESS_FMT_STEREO | ESS_FMT_16BIT) << ESS_ADC_SHIFT); | |
3059 | if ((minor & 0xf) == SND_DEV_DSP16) | |
3060 | fmts |= ESS_FMT_16BIT << ESS_ADC_SHIFT; */ | |
3061 | ||
3062 | fmtm &= ~((ESS_FMT_STEREO|ESS_FMT_16BIT) << ESS_ADC_SHIFT); | |
3063 | fmts = (ESS_FMT_STEREO|ESS_FMT_16BIT) << ESS_ADC_SHIFT; | |
3064 | ||
3065 | s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0; | |
3066 | set_adc_rate(s, 8000); | |
3067 | } | |
3068 | if (file->f_mode & FMODE_WRITE) { | |
3069 | fmtm &= ~((ESS_FMT_STEREO | ESS_FMT_16BIT) << ESS_DAC_SHIFT); | |
3070 | if ((minor & 0xf) == SND_DEV_DSP16) | |
3071 | fmts |= ESS_FMT_16BIT << ESS_DAC_SHIFT; | |
3072 | ||
3073 | s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0; | |
3074 | set_dac_rate(s, 8000); | |
3075 | } | |
3076 | set_fmt(s, fmtm, fmts); | |
3077 | s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE); | |
3078 | ||
3079 | up(&s->open_sem); | |
3080 | return nonseekable_open(inode, file); | |
3081 | } | |
3082 | ||
3083 | static int | |
3084 | ess_release(struct inode *inode, struct file *file) | |
3085 | { | |
3086 | struct ess_state *s = (struct ess_state *)file->private_data; | |
3087 | ||
3088 | VALIDATE_STATE(s); | |
3089 | lock_kernel(); | |
3090 | if (file->f_mode & FMODE_WRITE) | |
3091 | drain_dac(s, file->f_flags & O_NONBLOCK); | |
3092 | down(&s->open_sem); | |
3093 | if (file->f_mode & FMODE_WRITE) { | |
3094 | stop_dac(s); | |
3095 | } | |
3096 | if (file->f_mode & FMODE_READ) { | |
3097 | stop_adc(s); | |
3098 | } | |
3099 | ||
3100 | s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE); | |
3101 | /* we're covered by the open_sem */ | |
3102 | M_printk("maestro: %d dsps now alive\n",s->card->dsps_open-1); | |
3103 | if( --s->card->dsps_open <= 0) { | |
3104 | s->card->dsps_open = 0; | |
3105 | stop_bob(s); | |
3106 | free_buffers(s); | |
3107 | maestro_power(s->card,ACPI_D2); | |
3108 | } | |
3109 | up(&s->open_sem); | |
3110 | wake_up(&s->open_wait); | |
3111 | unlock_kernel(); | |
3112 | return 0; | |
3113 | } | |
3114 | ||
3115 | static struct file_operations ess_audio_fops = { | |
3116 | .owner = THIS_MODULE, | |
3117 | .llseek = no_llseek, | |
3118 | .read = ess_read, | |
3119 | .write = ess_write, | |
3120 | .poll = ess_poll, | |
3121 | .ioctl = ess_ioctl, | |
3122 | .mmap = ess_mmap, | |
3123 | .open = ess_open, | |
3124 | .release = ess_release, | |
3125 | }; | |
3126 | ||
3127 | static int | |
3128 | maestro_config(struct ess_card *card) | |
3129 | { | |
3130 | struct pci_dev *pcidev = card->pcidev; | |
3131 | struct ess_state *ess = &card->channels[0]; | |
3132 | int apu,iobase = card->iobase; | |
3133 | u16 w; | |
3134 | u32 n; | |
3135 | ||
3136 | /* We used to muck around with pci config space that | |
3137 | * we had no business messing with. We don't know enough | |
3138 | * about the machine to know which DMA mode is appropriate, | |
3139 | * etc. We were guessing wrong on some machines and making | |
3140 | * them unhappy. We now trust in the BIOS to do things right, | |
3141 | * which almost certainly means a new host of problems will | |
3142 | * arise with broken BIOS implementations. screw 'em. | |
3143 | * We're already intolerant of machines that don't assign | |
3144 | * IRQs. | |
3145 | */ | |
3146 | ||
3147 | /* do config work at full power */ | |
3148 | maestro_power(card,ACPI_D0); | |
3149 | ||
3150 | pci_read_config_word(pcidev, 0x50, &w); | |
3151 | ||
3152 | w&=~(1<<5); /* Don't swap left/right (undoc)*/ | |
3153 | ||
3154 | pci_write_config_word(pcidev, 0x50, w); | |
3155 | ||
3156 | pci_read_config_word(pcidev, 0x52, &w); | |
3157 | w&=~(1<<15); /* Turn off internal clock multiplier */ | |
3158 | /* XXX how do we know which to use? */ | |
3159 | w&=~(1<<14); /* External clock */ | |
3160 | ||
3161 | w|= (1<<7); /* Hardware volume control on */ | |
3162 | w|= (1<<6); /* Debounce off: easier to push the HWV buttons. */ | |
3163 | w&=~(1<<5); /* GPIO 4:5 */ | |
3164 | w|= (1<<4); /* Disconnect from the CHI. Enabling this made a dell 7500 work. */ | |
3165 | w&=~(1<<2); /* MIDI fix off (undoc) */ | |
3166 | w&=~(1<<1); /* reserved, always write 0 */ | |
3167 | pci_write_config_word(pcidev, 0x52, w); | |
3168 | ||
3169 | /* | |
3170 | * Legacy mode | |
3171 | */ | |
3172 | ||
3173 | pci_read_config_word(pcidev, 0x40, &w); | |
3174 | w|=(1<<15); /* legacy decode off */ | |
3175 | w&=~(1<<14); /* Disable SIRQ */ | |
3176 | w&=~(0x1f); /* disable mpu irq/io, game port, fm, SB */ | |
3177 | ||
3178 | pci_write_config_word(pcidev, 0x40, w); | |
3179 | ||
3180 | /* Set up 978 docking control chip. */ | |
3181 | pci_read_config_word(pcidev, 0x58, &w); | |
3182 | w|=1<<2; /* Enable 978. */ | |
3183 | w|=1<<3; /* Turn on 978 hardware volume control. */ | |
3184 | w&=~(1<<11); /* Turn on 978 mixer volume control. */ | |
3185 | pci_write_config_word(pcidev, 0x58, w); | |
3186 | ||
3187 | sound_reset(iobase); | |
3188 | ||
3189 | /* | |
3190 | * Ring Bus Setup | |
3191 | */ | |
3192 | ||
3193 | /* setup usual 0x34 stuff.. 0x36 may be chip specific */ | |
3194 | outw(0xC090, iobase+0x34); /* direct sound, stereo */ | |
3195 | udelay(20); | |
3196 | outw(0x3000, iobase+0x36); /* direct sound, stereo */ | |
3197 | udelay(20); | |
3198 | ||
3199 | ||
3200 | /* | |
3201 | * Reset the CODEC | |
3202 | */ | |
3203 | ||
3204 | maestro_ac97_reset(iobase,pcidev); | |
3205 | ||
3206 | /* | |
3207 | * Ring Bus Setup | |
3208 | */ | |
3209 | ||
3210 | n=inl(iobase+0x34); | |
3211 | n&=~0xF000; | |
3212 | n|=12<<12; /* Direct Sound, Stereo */ | |
3213 | outl(n, iobase+0x34); | |
3214 | ||
3215 | n=inl(iobase+0x34); | |
3216 | n&=~0x0F00; /* Modem off */ | |
3217 | outl(n, iobase+0x34); | |
3218 | ||
3219 | n=inl(iobase+0x34); | |
3220 | n&=~0x00F0; | |
3221 | n|=9<<4; /* DAC, Stereo */ | |
3222 | outl(n, iobase+0x34); | |
3223 | ||
3224 | n=inl(iobase+0x34); | |
3225 | n&=~0x000F; /* ASSP off */ | |
3226 | outl(n, iobase+0x34); | |
3227 | ||
3228 | n=inl(iobase+0x34); | |
3229 | n|=(1<<29); /* Enable ring bus */ | |
3230 | outl(n, iobase+0x34); | |
3231 | ||
3232 | n=inl(iobase+0x34); | |
3233 | n|=(1<<28); /* Enable serial bus */ | |
3234 | outl(n, iobase+0x34); | |
3235 | ||
3236 | n=inl(iobase+0x34); | |
3237 | n&=~0x00F00000; /* MIC off */ | |
3238 | outl(n, iobase+0x34); | |
3239 | ||
3240 | n=inl(iobase+0x34); | |
3241 | n&=~0x000F0000; /* I2S off */ | |
3242 | outl(n, iobase+0x34); | |
3243 | ||
3244 | ||
3245 | w=inw(iobase+0x18); | |
3246 | w&=~(1<<7); /* ClkRun off */ | |
3247 | outw(w, iobase+0x18); | |
3248 | ||
3249 | w=inw(iobase+0x18); | |
3250 | w&=~(1<<6); /* Hardware volume control interrupt off... for now. */ | |
3251 | outw(w, iobase+0x18); | |
3252 | ||
3253 | w=inw(iobase+0x18); | |
3254 | w&=~(1<<4); /* ASSP irq off */ | |
3255 | outw(w, iobase+0x18); | |
3256 | ||
3257 | w=inw(iobase+0x18); | |
3258 | w&=~(1<<3); /* ISDN irq off */ | |
3259 | outw(w, iobase+0x18); | |
3260 | ||
3261 | w=inw(iobase+0x18); | |
3262 | w|=(1<<2); /* Direct Sound IRQ on */ | |
3263 | outw(w, iobase+0x18); | |
3264 | ||
3265 | w=inw(iobase+0x18); | |
3266 | w&=~(1<<1); /* MPU401 IRQ off */ | |
3267 | outw(w, iobase+0x18); | |
3268 | ||
3269 | w=inw(iobase+0x18); | |
3270 | w|=(1<<0); /* SB IRQ on */ | |
3271 | outw(w, iobase+0x18); | |
3272 | ||
3273 | /* Set hardware volume control registers to midpoints. | |
3274 | We can tell which button was pushed based on how they change. */ | |
3275 | outb(0x88, iobase+0x1c); | |
3276 | outb(0x88, iobase+0x1d); | |
3277 | outb(0x88, iobase+0x1e); | |
3278 | outb(0x88, iobase+0x1f); | |
3279 | ||
3280 | /* it appears some maestros (dell 7500) only work if these are set, | |
3281 | regardless of whether we use the assp or not. */ | |
3282 | ||
3283 | outb(0, iobase+0xA4); | |
3284 | outb(3, iobase+0xA2); | |
3285 | outb(0, iobase+0xA6); | |
3286 | ||
3287 | for(apu=0;apu<16;apu++) | |
3288 | { | |
3289 | /* Write 0 into the buffer area 0x1E0->1EF */ | |
3290 | outw(0x01E0+apu, 0x10+iobase); | |
3291 | outw(0x0000, 0x12+iobase); | |
3292 | ||
3293 | /* | |
3294 | * The 1.10 test program seem to write 0 into the buffer area | |
3295 | * 0x1D0-0x1DF too. | |
3296 | */ | |
3297 | outw(0x01D0+apu, 0x10+iobase); | |
3298 | outw(0x0000, 0x12+iobase); | |
3299 | } | |
3300 | ||
3301 | #if 1 | |
3302 | wave_set_register(ess, IDR7_WAVE_ROMRAM, | |
3303 | (wave_get_register(ess, IDR7_WAVE_ROMRAM)&0xFF00)); | |
3304 | wave_set_register(ess, IDR7_WAVE_ROMRAM, | |
3305 | wave_get_register(ess, IDR7_WAVE_ROMRAM)|0x100); | |
3306 | wave_set_register(ess, IDR7_WAVE_ROMRAM, | |
3307 | wave_get_register(ess, IDR7_WAVE_ROMRAM)&~0x200); | |
3308 | wave_set_register(ess, IDR7_WAVE_ROMRAM, | |
3309 | wave_get_register(ess, IDR7_WAVE_ROMRAM)|~0x400); | |
3310 | #else | |
3311 | maestro_write(ess, IDR7_WAVE_ROMRAM, | |
3312 | (maestro_read(ess, IDR7_WAVE_ROMRAM)&0xFF00)); | |
3313 | maestro_write(ess, IDR7_WAVE_ROMRAM, | |
3314 | maestro_read(ess, IDR7_WAVE_ROMRAM)|0x100); | |
3315 | maestro_write(ess, IDR7_WAVE_ROMRAM, | |
3316 | maestro_read(ess, IDR7_WAVE_ROMRAM)&~0x200); | |
3317 | maestro_write(ess, IDR7_WAVE_ROMRAM, | |
3318 | maestro_read(ess, IDR7_WAVE_ROMRAM)|0x400); | |
3319 | #endif | |
3320 | ||
3321 | maestro_write(ess, IDR2_CRAM_DATA, 0x0000); | |
3322 | maestro_write(ess, 0x08, 0xB004); | |
3323 | /* Now back to the DirectSound stuff */ | |
3324 | maestro_write(ess, 0x09, 0x001B); | |
3325 | maestro_write(ess, 0x0A, 0x8000); | |
3326 | maestro_write(ess, 0x0B, 0x3F37); | |
3327 | maestro_write(ess, 0x0C, 0x0098); | |
3328 | ||
3329 | /* parallel out ?? */ | |
3330 | maestro_write(ess, 0x0C, | |
3331 | (maestro_read(ess, 0x0C)&~0xF000)|0x8000); | |
3332 | /* parallel in, has something to do with recording :) */ | |
3333 | maestro_write(ess, 0x0C, | |
3334 | (maestro_read(ess, 0x0C)&~0x0F00)|0x0500); | |
3335 | ||
3336 | maestro_write(ess, 0x0D, 0x7632); | |
3337 | ||
3338 | /* Wave cache control on - test off, sg off, | |
3339 | enable, enable extra chans 1Mb */ | |
3340 | ||
3341 | outw(inw(0x14+iobase)|(1<<8),0x14+iobase); | |
3342 | outw(inw(0x14+iobase)&0xFE03,0x14+iobase); | |
3343 | outw((inw(0x14+iobase)&0xFFFC), 0x14+iobase); | |
3344 | outw(inw(0x14+iobase)|(1<<7),0x14+iobase); | |
3345 | ||
3346 | outw(0xA1A0, 0x14+iobase); /* 0300 ? */ | |
3347 | ||
3348 | /* Now clear the APU control ram */ | |
3349 | for(apu=0;apu<NR_APUS;apu++) | |
3350 | { | |
3351 | for(w=0;w<NR_APU_REGS;w++) | |
3352 | apu_set_register(ess, apu|ESS_CHAN_HARD, w, 0); | |
3353 | ||
3354 | } | |
3355 | ||
3356 | return 0; | |
3357 | ||
3358 | } | |
3359 | ||
3360 | /* this guy tries to find the pci power management | |
3361 | * register bank. this should really be in core | |
3362 | * code somewhere. 1 on success. */ | |
3363 | static int | |
3364 | parse_power(struct ess_card *card, struct pci_dev *pcidev) | |
3365 | { | |
3366 | u32 n; | |
3367 | u16 w; | |
3368 | u8 next; | |
3369 | int max = 64; /* an a 8bit guy pointing to 32bit guys | |
3370 | can only express so much. */ | |
3371 | ||
3372 | card->power_regs = 0; | |
3373 | ||
3374 | /* check to see if we have a capabilities list in | |
3375 | the config register */ | |
3376 | pci_read_config_word(pcidev, PCI_STATUS, &w); | |
3377 | if(!(w & PCI_STATUS_CAP_LIST)) return 0; | |
3378 | ||
3379 | /* walk the list, starting at the head. */ | |
3380 | pci_read_config_byte(pcidev,PCI_CAPABILITY_LIST,&next); | |
3381 | ||
3382 | while(next && max--) { | |
3383 | pci_read_config_dword(pcidev, next & ~3, &n); | |
3384 | if((n & 0xff) == PCI_CAP_ID_PM) { | |
3385 | card->power_regs = next; | |
3386 | break; | |
3387 | } | |
3388 | next = ((n>>8) & 0xff); | |
3389 | } | |
3390 | ||
3391 | return card->power_regs ? 1 : 0; | |
3392 | } | |
3393 | ||
3394 | static int __init | |
3395 | maestro_probe(struct pci_dev *pcidev,const struct pci_device_id *pdid) | |
3396 | { | |
3397 | int card_type = pdid->driver_data; | |
3398 | u32 n; | |
3399 | int iobase; | |
3400 | int i, ret; | |
3401 | struct ess_card *card; | |
3402 | struct ess_state *ess; | |
1da177e4 LT |
3403 | int num = 0; |
3404 | ||
3405 | /* when built into the kernel, we only print version if device is found */ | |
3406 | #ifndef MODULE | |
3407 | static int printed_version; | |
3408 | if (!printed_version++) | |
3409 | printk(version); | |
3410 | #endif | |
3411 | ||
3412 | /* don't pick up weird modem maestros */ | |
3413 | if(((pcidev->class >> 8) & 0xffff) != PCI_CLASS_MULTIMEDIA_AUDIO) | |
3414 | return -ENODEV; | |
3415 | ||
3416 | ||
3417 | if ((ret=pci_enable_device(pcidev))) | |
3418 | return ret; | |
3419 | ||
3420 | iobase = pci_resource_start(pcidev,0); | |
3421 | if (!iobase || !(pci_resource_flags(pcidev, 0 ) & IORESOURCE_IO)) | |
3422 | return -ENODEV; | |
3423 | ||
3424 | if(pcidev->irq == 0) | |
3425 | return -ENODEV; | |
3426 | ||
3427 | /* stake our claim on the iospace */ | |
3428 | if( request_region(iobase, 256, card_names[card_type]) == NULL ) | |
3429 | { | |
3430 | printk(KERN_WARNING "maestro: can't allocate 256 bytes I/O at 0x%4.4x\n", iobase); | |
3431 | return -EBUSY; | |
3432 | } | |
3433 | ||
3434 | /* just to be sure */ | |
3435 | pci_set_master(pcidev); | |
3436 | ||
3437 | card = kmalloc(sizeof(struct ess_card), GFP_KERNEL); | |
3438 | if(card == NULL) | |
3439 | { | |
3440 | printk(KERN_WARNING "maestro: out of memory\n"); | |
3441 | release_region(iobase, 256); | |
3442 | return -ENOMEM; | |
3443 | } | |
3444 | ||
3445 | memset(card, 0, sizeof(*card)); | |
3446 | card->pcidev = pcidev; | |
3447 | ||
1da177e4 LT |
3448 | card->iobase = iobase; |
3449 | card->card_type = card_type; | |
3450 | card->irq = pcidev->irq; | |
3451 | card->magic = ESS_CARD_MAGIC; | |
3452 | spin_lock_init(&card->lock); | |
3453 | init_waitqueue_head(&card->suspend_queue); | |
3454 | ||
3455 | card->dock_mute_vol = 50; | |
3456 | ||
3457 | /* init our groups of 6 apus */ | |
3458 | for(i=0;i<NR_DSPS;i++) | |
3459 | { | |
3460 | struct ess_state *s=&card->channels[i]; | |
3461 | ||
3462 | s->index = i; | |
3463 | ||
3464 | s->card = card; | |
3465 | init_waitqueue_head(&s->dma_adc.wait); | |
3466 | init_waitqueue_head(&s->dma_dac.wait); | |
3467 | init_waitqueue_head(&s->open_wait); | |
3468 | spin_lock_init(&s->lock); | |
3469 | init_MUTEX(&s->open_sem); | |
3470 | s->magic = ESS_STATE_MAGIC; | |
3471 | ||
3472 | s->apu[0] = 6*i; | |
3473 | s->apu[1] = (6*i)+1; | |
3474 | s->apu[2] = (6*i)+2; | |
3475 | s->apu[3] = (6*i)+3; | |
3476 | s->apu[4] = (6*i)+4; | |
3477 | s->apu[5] = (6*i)+5; | |
3478 | ||
3479 | if(s->dma_adc.ready || s->dma_dac.ready || s->dma_adc.rawbuf) | |
3480 | printk("maestro: BOTCH!\n"); | |
3481 | /* register devices */ | |
3482 | if ((s->dev_audio = register_sound_dsp(&ess_audio_fops, -1)) < 0) | |
3483 | break; | |
3484 | } | |
3485 | ||
3486 | num = i; | |
3487 | ||
3488 | /* clear the rest if we ran out of slots to register */ | |
3489 | for(;i<NR_DSPS;i++) | |
3490 | { | |
3491 | struct ess_state *s=&card->channels[i]; | |
3492 | s->dev_audio = -1; | |
3493 | } | |
3494 | ||
3495 | ess = &card->channels[0]; | |
3496 | ||
3497 | /* | |
3498 | * Ok card ready. Begin setup proper | |
3499 | */ | |
3500 | ||
3501 | printk(KERN_INFO "maestro: Configuring %s found at IO 0x%04X IRQ %d\n", | |
3502 | card_names[card_type],iobase,card->irq); | |
3503 | pci_read_config_dword(pcidev, PCI_SUBSYSTEM_VENDOR_ID, &n); | |
3504 | printk(KERN_INFO "maestro: subvendor id: 0x%08x\n",n); | |
3505 | ||
3506 | /* turn off power management unless: | |
3507 | * - the user explicitly asks for it | |
3508 | * or | |
3509 | * - we're not a 2e, lesser chipps seem to have problems. | |
3510 | * - we're not on our _very_ small whitelist. some implemenetations | |
3511 | * really don't like the pm code, others require it. | |
3512 | * feel free to expand this as required. | |
3513 | */ | |
3514 | #define SUBSYSTEM_VENDOR(x) (x&0xffff) | |
3515 | if( (use_pm != 1) && | |
3516 | ((card_type != TYPE_MAESTRO2E) || (SUBSYSTEM_VENDOR(n) != 0x1028))) | |
3517 | use_pm = 0; | |
3518 | ||
3519 | if(!use_pm) | |
3520 | printk(KERN_INFO "maestro: not attempting power management.\n"); | |
3521 | else { | |
3522 | if(!parse_power(card,pcidev)) | |
3523 | printk(KERN_INFO "maestro: no PCI power management interface found.\n"); | |
3524 | else { | |
3525 | pci_read_config_dword(pcidev, card->power_regs, &n); | |
3526 | printk(KERN_INFO "maestro: PCI power management capability: 0x%x\n",n>>16); | |
3527 | } | |
3528 | } | |
3529 | ||
3530 | maestro_config(card); | |
3531 | ||
3532 | if(maestro_ac97_get(card, 0x00)==0x0080) { | |
3533 | printk(KERN_ERR "maestro: my goodness! you seem to have a pt101 codec, which is quite rare.\n" | |
3534 | "\tyou should tell someone about this.\n"); | |
3535 | } else { | |
3536 | maestro_ac97_init(card); | |
3537 | } | |
3538 | ||
3539 | if ((card->dev_mixer = register_sound_mixer(&ess_mixer_fops, -1)) < 0) { | |
3540 | printk("maestro: couldn't register mixer!\n"); | |
3541 | } else { | |
3542 | memcpy(card->mix.mixer_state,mixer_defaults,sizeof(card->mix.mixer_state)); | |
3543 | mixer_push_state(card); | |
3544 | } | |
3545 | ||
3546 | if((ret=request_irq(card->irq, ess_interrupt, SA_SHIRQ, card_names[card_type], card))) | |
3547 | { | |
3548 | printk(KERN_ERR "maestro: unable to allocate irq %d,\n", card->irq); | |
3549 | unregister_sound_mixer(card->dev_mixer); | |
3550 | for(i=0;i<NR_DSPS;i++) | |
3551 | { | |
3552 | struct ess_state *s = &card->channels[i]; | |
3553 | if(s->dev_audio != -1) | |
3554 | unregister_sound_dsp(s->dev_audio); | |
3555 | } | |
3556 | release_region(card->iobase, 256); | |
3557 | unregister_reboot_notifier(&maestro_nb); | |
3558 | kfree(card); | |
3559 | return ret; | |
3560 | } | |
3561 | ||
3562 | /* Turn on hardware volume control interrupt. | |
3563 | This has to come after we grab the IRQ above, | |
3564 | or a crash will result on installation if a button has been pressed, | |
3565 | because in that case we'll get an immediate interrupt. */ | |
3566 | n = inw(iobase+0x18); | |
3567 | n|=(1<<6); | |
3568 | outw(n, iobase+0x18); | |
3569 | ||
3570 | pci_set_drvdata(pcidev,card); | |
3571 | /* now go to sleep 'till something interesting happens */ | |
3572 | maestro_power(card,ACPI_D2); | |
3573 | ||
3574 | printk(KERN_INFO "maestro: %d channels configured.\n", num); | |
3575 | return 0; | |
3576 | } | |
3577 | ||
3578 | static void maestro_remove(struct pci_dev *pcidev) { | |
3579 | struct ess_card *card = pci_get_drvdata(pcidev); | |
3580 | int i; | |
3581 | u32 n; | |
3582 | ||
3583 | /* XXX maybe should force stop bob, but should be all | |
3584 | stopped by _release by now */ | |
3585 | ||
3586 | /* Turn off hardware volume control interrupt. | |
3587 | This has to come before we leave the IRQ below, | |
3588 | or a crash results if a button is pressed ! */ | |
3589 | n = inw(card->iobase+0x18); | |
3590 | n&=~(1<<6); | |
3591 | outw(n, card->iobase+0x18); | |
3592 | ||
3593 | free_irq(card->irq, card); | |
3594 | unregister_sound_mixer(card->dev_mixer); | |
3595 | for(i=0;i<NR_DSPS;i++) | |
3596 | { | |
3597 | struct ess_state *ess = &card->channels[i]; | |
3598 | if(ess->dev_audio != -1) | |
3599 | unregister_sound_dsp(ess->dev_audio); | |
3600 | } | |
3601 | /* Goodbye, Mr. Bond. */ | |
3602 | maestro_power(card,ACPI_D3); | |
3603 | release_region(card->iobase, 256); | |
3604 | kfree(card); | |
3605 | pci_set_drvdata(pcidev,NULL); | |
3606 | } | |
3607 | ||
3608 | static struct pci_device_id maestro_pci_tbl[] = { | |
3609 | {PCI_VENDOR_ESS, PCI_DEVICE_ID_ESS_ESS1968, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_MAESTRO2}, | |
3610 | {PCI_VENDOR_ESS, PCI_DEVICE_ID_ESS_ESS1978, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_MAESTRO2E}, | |
3611 | {PCI_VENDOR_ESS_OLD, PCI_DEVICE_ID_ESS_ESS0100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_MAESTRO}, | |
3612 | {0,} | |
3613 | }; | |
3614 | MODULE_DEVICE_TABLE(pci, maestro_pci_tbl); | |
3615 | ||
3616 | static struct pci_driver maestro_pci_driver = { | |
3617 | .name = "maestro", | |
3618 | .id_table = maestro_pci_tbl, | |
3619 | .probe = maestro_probe, | |
3620 | .remove = maestro_remove, | |
3621 | }; | |
3622 | ||
3623 | static int __init init_maestro(void) | |
3624 | { | |
3625 | int rc; | |
3626 | ||
46654728 | 3627 | rc = pci_register_driver(&maestro_pci_driver); |
1da177e4 LT |
3628 | if (rc < 0) |
3629 | return rc; | |
3630 | ||
3631 | if (register_reboot_notifier(&maestro_nb)) | |
3632 | printk(KERN_WARNING "maestro: reboot notifier registration failed; may not reboot properly.\n"); | |
3633 | #ifdef MODULE | |
3634 | printk(version); | |
3635 | #endif | |
3636 | if (dsps_order < 0) { | |
3637 | dsps_order = 1; | |
3638 | printk(KERN_WARNING "maestro: clipping dsps_order to %d\n",dsps_order); | |
3639 | } | |
3640 | else if (dsps_order > MAX_DSP_ORDER) { | |
3641 | dsps_order = MAX_DSP_ORDER; | |
3642 | printk(KERN_WARNING "maestro: clipping dsps_order to %d\n",dsps_order); | |
3643 | } | |
3644 | return 0; | |
3645 | } | |
3646 | ||
3647 | static int maestro_notifier(struct notifier_block *nb, unsigned long event, void *buf) | |
3648 | { | |
3649 | /* this notifier is called when the kernel is really shut down. */ | |
3650 | M_printk("maestro: shutting down\n"); | |
3651 | /* this will remove all card instances too */ | |
3652 | pci_unregister_driver(&maestro_pci_driver); | |
3653 | /* XXX dunno about power management */ | |
3654 | return NOTIFY_OK; | |
3655 | } | |
3656 | ||
3657 | /* --------------------------------------------------------------------- */ | |
3658 | ||
3659 | ||
3660 | static void cleanup_maestro(void) { | |
3661 | M_printk("maestro: unloading\n"); | |
3662 | pci_unregister_driver(&maestro_pci_driver); | |
1da177e4 LT |
3663 | unregister_reboot_notifier(&maestro_nb); |
3664 | } | |
3665 | ||
3666 | /* --------------------------------------------------------------------- */ | |
3667 | ||
3668 | void | |
3669 | check_suspend(struct ess_card *card) | |
3670 | { | |
3671 | DECLARE_WAITQUEUE(wait, current); | |
3672 | ||
3673 | if(!card->in_suspend) return; | |
3674 | ||
3675 | card->in_suspend++; | |
3676 | add_wait_queue(&(card->suspend_queue), &wait); | |
3677 | current->state = TASK_UNINTERRUPTIBLE; | |
3678 | schedule(); | |
3679 | remove_wait_queue(&(card->suspend_queue), &wait); | |
3680 | current->state = TASK_RUNNING; | |
3681 | } | |
3682 | ||
1da177e4 LT |
3683 | module_init(init_maestro); |
3684 | module_exit(cleanup_maestro); |