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Merge tag 'linux-watchdog-5.4-rc1' of git://www.linux-watchdog.org/linux-watchdog
[mirror_ubuntu-jammy-kernel.git] / sound / pci / ad1889.c
CommitLineData
82c29810 1// SPDX-License-Identifier: GPL-2.0-only
12bb5b78
CL		 2/* Analog Devices 1889 audio driver
3 *
4 * This is a driver for the AD1889 PCI audio chipset found
5 * on the HP PA-RISC [BCJ]-xxx0 workstations.
6 *
7 * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org>
8 * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org>
9 * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org>
10 *
12bb5b78
CL		 11 * TODO:
12 * Do we need to take care of CCS register?
13 * Maybe we could use finer grained locking (separate locks for pb/cap)?
14 * Wishlist:
15 * Control Interface (mixer) support
16 * Better AC97 support (VSR...)?
17 * PM support
18 * MIDI support
19 * Game Port support
25985edc 20 * SG DMA support (this will need *a lot* of work)
12bb5b78
CL		 21 */
22
23#include <linux/init.h>
24#include <linux/pci.h>
9d2f928d 25#include <linux/dma-mapping.h>
12bb5b78
CL		 26#include <linux/slab.h>
27#include <linux/interrupt.h>
28#include <linux/compiler.h>
29#include <linux/delay.h>
da155d5b 30#include <linux/module.h>
6cbbfe1c 31#include <linux/io.h>
12bb5b78 32
12bb5b78
CL		 33#include <sound/core.h>
34#include <sound/pcm.h>
35#include <sound/initval.h>
36#include <sound/ac97_codec.h>
37
12bb5b78
CL		 38#include "ad1889.h"
39#include "ac97/ac97_id.h"
40
c6f43290 41#define AD1889_DRVVER "Version: 1.7"
12bb5b78
CL		 42
43MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>");
44MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
45MODULE_LICENSE("GPL");
46MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}");
47
48static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
49module_param_array(index, int, NULL, 0444);
50MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard.");
51
52static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
53module_param_array(id, charp, NULL, 0444);
54MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard.");
55
a67ff6a5 56static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
12bb5b78
CL		 57module_param_array(enable, bool, NULL, 0444);
58MODULE_PARM_DESC(enable, "Enable AD1889 soundcard.");
59
60static char *ac97_quirk[SNDRV_CARDS];
61module_param_array(ac97_quirk, charp, NULL, 0444);
62MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
63
64#define DEVNAME "ad1889"
65#define PFX DEVNAME ": "
66
12bb5b78
CL		 67/* keep track of some hw registers */
68struct ad1889_register_state {
69 u16 reg; /* reg setup */
70 u32 addr; /* dma base address */
71 unsigned long size; /* DMA buffer size */
72};
73
74struct snd_ad1889 {
02c2de69 75 struct snd_card *card;
12bb5b78
CL		 76 struct pci_dev *pci;
77
78 int irq;
79 unsigned long bar;
80 void __iomem *iobase;
81
02c2de69
TI		 82 struct snd_ac97 *ac97;
83 struct snd_ac97_bus *ac97_bus;
84 struct snd_pcm *pcm;
85 struct snd_info_entry *proc;
12bb5b78 86
02c2de69
TI		 87 struct snd_pcm_substream *psubs;
88 struct snd_pcm_substream *csubs;
12bb5b78
CL		 89
90 /* playback register state */
91 struct ad1889_register_state wave;
92 struct ad1889_register_state ramc;
93
94 spinlock_t lock;
95};
96
97static inline u16
98ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
99{
100 return readw(chip->iobase + reg);
101}
102
103static inline void
104ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
105{
106 writew(val, chip->iobase + reg);
107}
108
109static inline u32
110ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
111{
112 return readl(chip->iobase + reg);
113}
114
115static inline void
116ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
117{
118 writel(val, chip->iobase + reg);
119}
120
121static inline void
122ad1889_unmute(struct snd_ad1889 *chip)
123{
124 u16 st;
125 st = ad1889_readw(chip, AD_DS_WADA) &
126 ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM);
127 ad1889_writew(chip, AD_DS_WADA, st);
128 ad1889_readw(chip, AD_DS_WADA);
129}
130
131static inline void
132ad1889_mute(struct snd_ad1889 *chip)
133{
134 u16 st;
135 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM;
136 ad1889_writew(chip, AD_DS_WADA, st);
137 ad1889_readw(chip, AD_DS_WADA);
138}
139
140static inline void
141ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address)
142{
143 ad1889_writel(chip, AD_DMA_ADCBA, address);
144 ad1889_writel(chip, AD_DMA_ADCCA, address);
145}
146
147static inline void
148ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count)
149{
150 ad1889_writel(chip, AD_DMA_ADCBC, count);
151 ad1889_writel(chip, AD_DMA_ADCCC, count);
152}
153
154static inline void
155ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count)
156{
157 ad1889_writel(chip, AD_DMA_ADCIB, count);
158 ad1889_writel(chip, AD_DMA_ADCIC, count);
159}
160
161static inline void
162ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address)
163{
164 ad1889_writel(chip, AD_DMA_WAVBA, address);
165 ad1889_writel(chip, AD_DMA_WAVCA, address);
166}
167
168static inline void
169ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count)
170{
171 ad1889_writel(chip, AD_DMA_WAVBC, count);
172 ad1889_writel(chip, AD_DMA_WAVCC, count);
173}
174
175static inline void
176ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count)
177{
178 ad1889_writel(chip, AD_DMA_WAVIB, count);
179 ad1889_writel(chip, AD_DMA_WAVIC, count);
180}
181
182static void
183ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel)
184{
185 u16 reg;
186
187 if (channel & AD_CHAN_WAV) {
188 /* Disable wave channel */
189 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
190 ad1889_writew(chip, AD_DS_WSMC, reg);
191 chip->wave.reg = reg;
192
193 /* disable IRQs */
194 reg = ad1889_readw(chip, AD_DMA_WAV);
195 reg &= AD_DMA_IM_DIS;
196 reg &= ~AD_DMA_LOOP;
197 ad1889_writew(chip, AD_DMA_WAV, reg);
198
199 /* clear IRQ and address counters and pointers */
200 ad1889_load_wave_buffer_address(chip, 0x0);
201 ad1889_load_wave_buffer_count(chip, 0x0);
202 ad1889_load_wave_interrupt_count(chip, 0x0);
203
204 /* flush */
205 ad1889_readw(chip, AD_DMA_WAV);
206 }
207
208 if (channel & AD_CHAN_ADC) {
209 /* Disable ADC channel */
210 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
211 ad1889_writew(chip, AD_DS_RAMC, reg);
212 chip->ramc.reg = reg;
213
214 reg = ad1889_readw(chip, AD_DMA_ADC);
215 reg &= AD_DMA_IM_DIS;
216 reg &= ~AD_DMA_LOOP;
217 ad1889_writew(chip, AD_DMA_ADC, reg);
218
219 ad1889_load_adc_buffer_address(chip, 0x0);
220 ad1889_load_adc_buffer_count(chip, 0x0);
221 ad1889_load_adc_interrupt_count(chip, 0x0);
222
223 /* flush */
224 ad1889_readw(chip, AD_DMA_ADC);
225 }
226}
227
f40b6890 228static u16
02c2de69 229snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
12bb5b78
CL		 230{
231 struct snd_ad1889 *chip = ac97->private_data;
232 return ad1889_readw(chip, AD_AC97_BASE + reg);
233}
234
f40b6890 235static void
02c2de69 236snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
12bb5b78
CL		 237{
238 struct snd_ad1889 *chip = ac97->private_data;
239 ad1889_writew(chip, AD_AC97_BASE + reg, val);
240}
241
242static int
243snd_ad1889_ac97_ready(struct snd_ad1889 *chip)
244{
245 int retry = 400; /* average needs 352 msec */
246
247 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY)
248 && --retry)
1fa350b6 249 usleep_range(1000, 2000);
12bb5b78 250 if (!retry) {
29633004
TI		 251 dev_err(chip->card->dev, "[%s] Link is not ready.\n",
252 __func__);
12bb5b78
CL		 253 return -EIO;
254 }
29633004 255 dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry);
12bb5b78
CL		 256
257 return 0;
258}
259
260static int
02c2de69
TI		 261snd_ad1889_hw_params(struct snd_pcm_substream *substream,
262 struct snd_pcm_hw_params *hw_params)
12bb5b78
CL		 263{
264 return snd_pcm_lib_malloc_pages(substream,
265 params_buffer_bytes(hw_params));
266}
267
268static int
02c2de69 269snd_ad1889_hw_free(struct snd_pcm_substream *substream)
12bb5b78
CL		 270{
271 return snd_pcm_lib_free_pages(substream);
272}
273
dee49895 274static const struct snd_pcm_hardware snd_ad1889_playback_hw = {
12bb5b78
CL		 275 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
276 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
277 .formats = SNDRV_PCM_FMTBIT_S16_LE,
278 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
279 .rate_min = 8000, /* docs say 7000, but we're lazy */
280 .rate_max = 48000,
281 .channels_min = 1,
282 .channels_max = 2,
283 .buffer_bytes_max = BUFFER_BYTES_MAX,
284 .period_bytes_min = PERIOD_BYTES_MIN,
285 .period_bytes_max = PERIOD_BYTES_MAX,
286 .periods_min = PERIODS_MIN,
287 .periods_max = PERIODS_MAX,
288 /*.fifo_size = 0,*/
289};
290
dee49895 291static const struct snd_pcm_hardware snd_ad1889_capture_hw = {
12bb5b78
CL		 292 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
293 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
294 .formats = SNDRV_PCM_FMTBIT_S16_LE,
295 .rates = SNDRV_PCM_RATE_48000,
296 .rate_min = 48000, /* docs say we could to VSR, but we're lazy */
297 .rate_max = 48000,
298 .channels_min = 1,
299 .channels_max = 2,
300 .buffer_bytes_max = BUFFER_BYTES_MAX,
301 .period_bytes_min = PERIOD_BYTES_MIN,
302 .period_bytes_max = PERIOD_BYTES_MAX,
303 .periods_min = PERIODS_MIN,
304 .periods_max = PERIODS_MAX,
305 /*.fifo_size = 0,*/
306};
307
308static int
02c2de69 309snd_ad1889_playback_open(struct snd_pcm_substream *ss)
12bb5b78
CL		 310{
311 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
02c2de69 312 struct snd_pcm_runtime *rt = ss->runtime;
12bb5b78
CL		 313
314 chip->psubs = ss;
315 rt->hw = snd_ad1889_playback_hw;
316
317 return 0;
318}
319
320static int
02c2de69 321snd_ad1889_capture_open(struct snd_pcm_substream *ss)
12bb5b78
CL		 322{
323 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
02c2de69 324 struct snd_pcm_runtime *rt = ss->runtime;
12bb5b78
CL		 325
326 chip->csubs = ss;
327 rt->hw = snd_ad1889_capture_hw;
328
329 return 0;
330}
331
332static int
02c2de69 333snd_ad1889_playback_close(struct snd_pcm_substream *ss)
12bb5b78
CL		 334{
335 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
336 chip->psubs = NULL;
337 return 0;
338}
339
340static int
02c2de69 341snd_ad1889_capture_close(struct snd_pcm_substream *ss)
12bb5b78
CL		 342{
343 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
344 chip->csubs = NULL;
345 return 0;
346}
347
348static int
02c2de69 349snd_ad1889_playback_prepare(struct snd_pcm_substream *ss)
12bb5b78
CL		 350{
351 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
02c2de69 352 struct snd_pcm_runtime *rt = ss->runtime;
12bb5b78
CL		 353 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
354 unsigned int count = snd_pcm_lib_period_bytes(ss);
355 u16 reg;
356
357 ad1889_channel_reset(chip, AD_CHAN_WAV);
358
359 reg = ad1889_readw(chip, AD_DS_WSMC);
360
361 /* Mask out 16-bit / Stereo */
362 reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST);
363
364 if (snd_pcm_format_width(rt->format) == 16)
365 reg |= AD_DS_WSMC_WA16;
366
367 if (rt->channels > 1)
368 reg |= AD_DS_WSMC_WAST;
369
370 /* let's make sure we don't clobber ourselves */
371 spin_lock_irq(&chip->lock);
372
373 chip->wave.size = size;
374 chip->wave.reg = reg;
375 chip->wave.addr = rt->dma_addr;
376
377 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg);
378
379 /* Set sample rates on the codec */
380 ad1889_writew(chip, AD_DS_WAS, rt->rate);
381
382 /* Set up DMA */
383 ad1889_load_wave_buffer_address(chip, chip->wave.addr);
384 ad1889_load_wave_buffer_count(chip, size);
385 ad1889_load_wave_interrupt_count(chip, count);
386
387 /* writes flush */
388 ad1889_readw(chip, AD_DS_WSMC);
389
390 spin_unlock_irq(&chip->lock);
391
29633004
TI		 392 dev_dbg(chip->card->dev,
393 "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
394 chip->wave.addr, count, size, reg, rt->rate);
12bb5b78
CL		 395 return 0;
396}
397
398static int
02c2de69 399snd_ad1889_capture_prepare(struct snd_pcm_substream *ss)
12bb5b78
CL		 400{
401 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
02c2de69 402 struct snd_pcm_runtime *rt = ss->runtime;
12bb5b78
CL		 403 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
404 unsigned int count = snd_pcm_lib_period_bytes(ss);
405 u16 reg;
406
407 ad1889_channel_reset(chip, AD_CHAN_ADC);
408
409 reg = ad1889_readw(chip, AD_DS_RAMC);
410
411 /* Mask out 16-bit / Stereo */
412 reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST);
413
414 if (snd_pcm_format_width(rt->format) == 16)
415 reg |= AD_DS_RAMC_AD16;
416
417 if (rt->channels > 1)
418 reg |= AD_DS_RAMC_ADST;
419
420 /* let's make sure we don't clobber ourselves */
421 spin_lock_irq(&chip->lock);
422
423 chip->ramc.size = size;
424 chip->ramc.reg = reg;
425 chip->ramc.addr = rt->dma_addr;
426
427 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg);
428
429 /* Set up DMA */
430 ad1889_load_adc_buffer_address(chip, chip->ramc.addr);
431 ad1889_load_adc_buffer_count(chip, size);
432 ad1889_load_adc_interrupt_count(chip, count);
433
434 /* writes flush */
435 ad1889_readw(chip, AD_DS_RAMC);
436
437 spin_unlock_irq(&chip->lock);
438
29633004
TI		 439 dev_dbg(chip->card->dev,
440 "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
441 chip->ramc.addr, count, size, reg, rt->rate);
12bb5b78
CL		 442 return 0;
443}
444
445/* this is called in atomic context with IRQ disabled.
446 Must be as fast as possible and not sleep.
447 DMA should be *triggered* by this call.
448 The WSMC "WAEN" bit triggers DMA Wave On/Off */
449static int
02c2de69 450snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd)
12bb5b78
CL		 451{
452 u16 wsmc;
453 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
454
455 wsmc = ad1889_readw(chip, AD_DS_WSMC);
456
457 switch (cmd) {
458 case SNDRV_PCM_TRIGGER_START:
459 /* enable DMA loop & interrupts */
460 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT);
461 wsmc |= AD_DS_WSMC_WAEN;
462 /* 1 to clear CHSS bit */
463 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS);
464 ad1889_unmute(chip);
465 break;
466 case SNDRV_PCM_TRIGGER_STOP:
467 ad1889_mute(chip);
468 wsmc &= ~AD_DS_WSMC_WAEN;
469 break;
470 default:
471 snd_BUG();
472 return -EINVAL;
473 }
474
475 chip->wave.reg = wsmc;
476 ad1889_writew(chip, AD_DS_WSMC, wsmc);
477 ad1889_readw(chip, AD_DS_WSMC); /* flush */
478
479 /* reset the chip when STOP - will disable IRQs */
480 if (cmd == SNDRV_PCM_TRIGGER_STOP)
481 ad1889_channel_reset(chip, AD_CHAN_WAV);
482
483 return 0;
484}
485
486/* this is called in atomic context with IRQ disabled.
487 Must be as fast as possible and not sleep.
488 DMA should be *triggered* by this call.
489 The RAMC "ADEN" bit triggers DMA ADC On/Off */
490static int
02c2de69 491snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd)
12bb5b78
CL		 492{
493 u16 ramc;
494 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
495
496 ramc = ad1889_readw(chip, AD_DS_RAMC);
497
498 switch (cmd) {
499 case SNDRV_PCM_TRIGGER_START:
500 /* enable DMA loop & interrupts */
501 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT);
502 ramc |= AD_DS_RAMC_ADEN;
503 /* 1 to clear CHSS bit */
504 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS);
505 break;
506 case SNDRV_PCM_TRIGGER_STOP:
507 ramc &= ~AD_DS_RAMC_ADEN;
508 break;
509 default:
510 return -EINVAL;
511 }
512
513 chip->ramc.reg = ramc;
514 ad1889_writew(chip, AD_DS_RAMC, ramc);
515 ad1889_readw(chip, AD_DS_RAMC); /* flush */
516
517 /* reset the chip when STOP - will disable IRQs */
518 if (cmd == SNDRV_PCM_TRIGGER_STOP)
519 ad1889_channel_reset(chip, AD_CHAN_ADC);
520
521 return 0;
522}
523
524/* Called in atomic context with IRQ disabled */
525static snd_pcm_uframes_t
02c2de69 526snd_ad1889_playback_pointer(struct snd_pcm_substream *ss)
12bb5b78
CL		 527{
528 size_t ptr = 0;
529 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
530
531 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN)))
532 return 0;
533
534 ptr = ad1889_readl(chip, AD_DMA_WAVCA);
535 ptr -= chip->wave.addr;
536
da3cec35
TI		 537 if (snd_BUG_ON(ptr >= chip->wave.size))
538 return 0;
12bb5b78
CL		 539
540 return bytes_to_frames(ss->runtime, ptr);
541}
542
543/* Called in atomic context with IRQ disabled */
544static snd_pcm_uframes_t
02c2de69 545snd_ad1889_capture_pointer(struct snd_pcm_substream *ss)
12bb5b78
CL		 546{
547 size_t ptr = 0;
548 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
549
550 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN)))
551 return 0;
552
553 ptr = ad1889_readl(chip, AD_DMA_ADCCA);
554 ptr -= chip->ramc.addr;
555
da3cec35
TI		 556 if (snd_BUG_ON(ptr >= chip->ramc.size))
557 return 0;
12bb5b78
CL		 558
559 return bytes_to_frames(ss->runtime, ptr);
560}
561
d602efca 562static const struct snd_pcm_ops snd_ad1889_playback_ops = {
12bb5b78
CL		 563 .open = snd_ad1889_playback_open,
564 .close = snd_ad1889_playback_close,
565 .ioctl = snd_pcm_lib_ioctl,
566 .hw_params = snd_ad1889_hw_params,
567 .hw_free = snd_ad1889_hw_free,
568 .prepare = snd_ad1889_playback_prepare,
569 .trigger = snd_ad1889_playback_trigger,
570 .pointer = snd_ad1889_playback_pointer,
571};
572
d602efca 573static const struct snd_pcm_ops snd_ad1889_capture_ops = {
12bb5b78
CL		 574 .open = snd_ad1889_capture_open,
575 .close = snd_ad1889_capture_close,
576 .ioctl = snd_pcm_lib_ioctl,
577 .hw_params = snd_ad1889_hw_params,
578 .hw_free = snd_ad1889_hw_free,
579 .prepare = snd_ad1889_capture_prepare,
580 .trigger = snd_ad1889_capture_trigger,
581 .pointer = snd_ad1889_capture_pointer,
582};
583
584static irqreturn_t
7d12e780 585snd_ad1889_interrupt(int irq, void *dev_id)
12bb5b78
CL		 586{
587 unsigned long st;
588 struct snd_ad1889 *chip = dev_id;
589
590 st = ad1889_readl(chip, AD_DMA_DISR);
591
592 /* clear ISR */
593 ad1889_writel(chip, AD_DMA_DISR, st);
594
595 st &= AD_INTR_MASK;
596
597 if (unlikely(!st))
598 return IRQ_NONE;
599
600 if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI))
29633004
TI		 601 dev_dbg(chip->card->dev,
602 "Unexpected master or target abort interrupt!\n");
12bb5b78
CL		 603
604 if ((st & AD_DMA_DISR_WAVI) && chip->psubs)
605 snd_pcm_period_elapsed(chip->psubs);
606 if ((st & AD_DMA_DISR_ADCI) && chip->csubs)
607 snd_pcm_period_elapsed(chip->csubs);
608
609 return IRQ_HANDLED;
610}
611
2f5c1302 612static int
a0880094 613snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device)
12bb5b78
CL		 614{
615 int err;
02c2de69 616 struct snd_pcm *pcm;
12bb5b78 617
12bb5b78
CL		 618 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm);
619 if (err < 0)
620 return err;
621
622 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
623 &snd_ad1889_playback_ops);
624 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
625 &snd_ad1889_capture_ops);
626
627 pcm->private_data = chip;
12bb5b78
CL		 628 pcm->info_flags = 0;
629 strcpy(pcm->name, chip->card->shortname);
630
631 chip->pcm = pcm;
632 chip->psubs = NULL;
633 chip->csubs = NULL;
634
5116b94a 635 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
12bb5b78
CL		 636 snd_dma_pci_data(chip->pci),
637 BUFFER_BYTES_MAX / 2,
638 BUFFER_BYTES_MAX);
639
12bb5b78
CL		 640 return 0;
641}
642
643static void
02c2de69 644snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
12bb5b78
CL		 645{
646 struct snd_ad1889 *chip = entry->private_data;
647 u16 reg;
648 int tmp;
649
650 reg = ad1889_readw(chip, AD_DS_WSMC);
651 snd_iprintf(buffer, "Wave output: %s\n",
652 (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled");
653 snd_iprintf(buffer, "Wave Channels: %s\n",
654 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
655 snd_iprintf(buffer, "Wave Quality: %d-bit linear\n",
656 (reg & AD_DS_WSMC_WA16) ? 16 : 8);
657
658 /* WARQ is at offset 12 */
659 tmp = (reg & AD_DS_WSMC_WARQ) ?
ccbec5ea 660 ((((reg & AD_DS_WSMC_WARQ) >> 12) & 0x01) ? 12 : 18) : 4;
12bb5b78
CL		 661 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
662
663 snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp,
664 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
665
666
667 snd_iprintf(buffer, "Synthesis output: %s\n",
668 reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled");
669
670 /* SYRQ is at offset 4 */
671 tmp = (reg & AD_DS_WSMC_SYRQ) ?
ccbec5ea 672 ((((reg & AD_DS_WSMC_SYRQ) >> 4) & 0x01) ? 12 : 18) : 4;
12bb5b78
CL		 673 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
674
675 snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp,
676 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
677
678 reg = ad1889_readw(chip, AD_DS_RAMC);
679 snd_iprintf(buffer, "ADC input: %s\n",
680 (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled");
681 snd_iprintf(buffer, "ADC Channels: %s\n",
682 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
683 snd_iprintf(buffer, "ADC Quality: %d-bit linear\n",
684 (reg & AD_DS_RAMC_AD16) ? 16 : 8);
685
686 /* ACRQ is at offset 4 */
687 tmp = (reg & AD_DS_RAMC_ACRQ) ?
ccbec5ea 688 ((((reg & AD_DS_RAMC_ACRQ) >> 4) & 0x01) ? 12 : 18) : 4;
12bb5b78
CL		 689 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
690
691 snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp,
692 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
693
694 snd_iprintf(buffer, "Resampler input: %s\n",
695 reg & AD_DS_RAMC_REEN ? "enabled" : "disabled");
696
697 /* RERQ is at offset 12 */
698 tmp = (reg & AD_DS_RAMC_RERQ) ?
ccbec5ea 699 ((((reg & AD_DS_RAMC_RERQ) >> 12) & 0x01) ? 12 : 18) : 4;
12bb5b78
CL		 700 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
701
702 snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp,
703 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
704
705
706 /* doc says LSB represents -1.5dB, but the max value (-94.5dB)
707 suggests that LSB is -3dB, which is more coherent with the logarithmic
708 nature of the dB scale */
709 reg = ad1889_readw(chip, AD_DS_WADA);
710 snd_iprintf(buffer, "Left: %s, -%d dB\n",
711 (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute",
712 ((reg & AD_DS_WADA_LWAA) >> 8) * 3);
713 reg = ad1889_readw(chip, AD_DS_WADA);
714 snd_iprintf(buffer, "Right: %s, -%d dB\n",
715 (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute",
9bd0f5c0 716 (reg & AD_DS_WADA_RWAA) * 3);
12bb5b78
CL		 717
718 reg = ad1889_readw(chip, AD_DS_WAS);
719 snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg);
720 reg = ad1889_readw(chip, AD_DS_RES);
721 snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg);
722}
723
2f5c1302 724static void
12bb5b78
CL		 725snd_ad1889_proc_init(struct snd_ad1889 *chip)
726{
47f2769b
TI		 727 snd_card_ro_proc_new(chip->card, chip->card->driver,
728 chip, snd_ad1889_proc_read);
12bb5b78
CL		 729}
730
eab0fbfa 731static const struct ac97_quirk ac97_quirks[] = {
12bb5b78
CL		 732 {
733 .subvendor = 0x11d4, /* AD */
734 .subdevice = 0x1889, /* AD1889 */
735 .codec_id = AC97_ID_AD1819,
736 .name = "AD1889",
737 .type = AC97_TUNE_HP_ONLY
738 },
739 { } /* terminator */
740};
741
2f5c1302 742static void
12bb5b78
CL		 743snd_ad1889_ac97_xinit(struct snd_ad1889 *chip)
744{
745 u16 reg;
746
747 reg = ad1889_readw(chip, AD_AC97_ACIC);
748 reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */
749 ad1889_writew(chip, AD_AC97_ACIC, reg);
750 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
751 udelay(10);
752 /* Interface Enable */
753 reg |= AD_AC97_ACIC_ACIE;
754 ad1889_writew(chip, AD_AC97_ACIC, reg);
755
756 snd_ad1889_ac97_ready(chip);
757
758 /* Audio Stream Output | Variable Sample Rate Mode */
759 reg = ad1889_readw(chip, AD_AC97_ACIC);
760 reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM;
761 ad1889_writew(chip, AD_AC97_ACIC, reg);
762 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
763
764}
765
766static void
02c2de69 767snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus)
12bb5b78
CL		 768{
769 struct snd_ad1889 *chip = bus->private_data;
770 chip->ac97_bus = NULL;
771}
772
773static void
02c2de69 774snd_ad1889_ac97_free(struct snd_ac97 *ac97)
12bb5b78
CL		 775{
776 struct snd_ad1889 *chip = ac97->private_data;
777 chip->ac97 = NULL;
778}
779
2f5c1302 780static int
12bb5b78
CL		 781snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override)
782{
783 int err;
02c2de69
TI		 784 struct snd_ac97_template ac97;
785 static struct snd_ac97_bus_ops ops = {
12bb5b78
CL		 786 .write = snd_ad1889_ac97_write,
787 .read = snd_ad1889_ac97_read,
788 };
789
790 /* doing that here, it works. */
791 snd_ad1889_ac97_xinit(chip);
792
793 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
794 if (err < 0)
795 return err;
796
797 chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free;
798
799 memset(&ac97, 0, sizeof(ac97));
800 ac97.private_data = chip;
801 ac97.private_free = snd_ad1889_ac97_free;
802 ac97.pci = chip->pci;
803
804 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
805 if (err < 0)
806 return err;
807
808 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
809
810 return 0;
811}
812
813static int
814snd_ad1889_free(struct snd_ad1889 *chip)
815{
816 if (chip->irq < 0)
817 goto skip_hw;
818
819 spin_lock_irq(&chip->lock);
820
821 ad1889_mute(chip);
822
823 /* Turn off interrupt on count and zero DMA registers */
824 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC);
825
826 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */
827 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI);
828 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */
829
830 spin_unlock_irq(&chip->lock);
831
12bb5b78 832 if (chip->irq >= 0)
437a5a46 833 free_irq(chip->irq, chip);
12bb5b78
CL		 834
835skip_hw:
ff6defa6 836 iounmap(chip->iobase);
12bb5b78
CL		 837 pci_release_regions(chip->pci);
838 pci_disable_device(chip->pci);
12bb5b78
CL		 839 kfree(chip);
840 return 0;
841}
842
f40b6890 843static int
02c2de69 844snd_ad1889_dev_free(struct snd_device *device)
12bb5b78
CL		 845{
846 struct snd_ad1889 *chip = device->device_data;
847 return snd_ad1889_free(chip);
848}
849
2f5c1302 850static int
12bb5b78
CL		 851snd_ad1889_init(struct snd_ad1889 *chip)
852{
853 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */
854 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */
855
621fdf60 856 usleep_range(10000, 11000);
12bb5b78
CL		 857
858 /* enable Master and Target abort interrupts */
859 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE);
860
861 return 0;
862}
863
2f5c1302 864static int
02c2de69 865snd_ad1889_create(struct snd_card *card,
12bb5b78
CL		 866 struct pci_dev *pci,
867 struct snd_ad1889 **rchip)
868{
869 int err;
870
871 struct snd_ad1889 *chip;
02c2de69 872 static struct snd_device_ops ops = {
12bb5b78
CL		 873 .dev_free = snd_ad1889_dev_free,
874 };
875
876 *rchip = NULL;
877
878 if ((err = pci_enable_device(pci)) < 0)
879 return err;
9d2f928d 880
12bb5b78 881 /* check PCI availability (32bit DMA) */
412b979c
QL		 882 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(32)) < 0 ||
883 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32)) < 0) {
29633004 884 dev_err(card->dev, "error setting 32-bit DMA mask.\n");
12bb5b78
CL		 885 pci_disable_device(pci);
886 return -ENXIO;
887 }
888
889 /* allocate chip specific data with zero-filled memory */
e560d8d8 890 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
12bb5b78
CL		 891 pci_disable_device(pci);
892 return -ENOMEM;
893 }
894
895 chip->card = card;
896 card->private_data = chip;
897 chip->pci = pci;
898 chip->irq = -1;
899
900 /* (1) PCI resource allocation */
901 if ((err = pci_request_regions(pci, card->driver)) < 0)
902 goto free_and_ret;
903
904 chip->bar = pci_resource_start(pci, 0);
2f5ad54e 905 chip->iobase = pci_ioremap_bar(pci, 0);
12bb5b78 906 if (chip->iobase == NULL) {
29633004 907 dev_err(card->dev, "unable to reserve region.\n");
12bb5b78
CL		 908 err = -EBUSY;
909 goto free_and_ret;
910 }
911
912 pci_set_master(pci);
913
914 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */
915
916 if (request_irq(pci->irq, snd_ad1889_interrupt,
934c2b6d 917 IRQF_SHARED, KBUILD_MODNAME, chip)) {
29633004 918 dev_err(card->dev, "cannot obtain IRQ %d\n", pci->irq);
12bb5b78
CL		 919 snd_ad1889_free(chip);
920 return -EBUSY;
921 }
922
923 chip->irq = pci->irq;
924 synchronize_irq(chip->irq);
925
926 /* (2) initialization of the chip hardware */
927 if ((err = snd_ad1889_init(chip)) < 0) {
928 snd_ad1889_free(chip);
929 return err;
930 }
931
932 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
933 snd_ad1889_free(chip);
934 return err;
935 }
936
12bb5b78
CL		 937 *rchip = chip;
938
939 return 0;
940
941free_and_ret:
fc58422a 942 kfree(chip);
12bb5b78
CL		 943 pci_disable_device(pci);
944
945 return err;
946}
947
2f5c1302 948static int
12bb5b78
CL		 949snd_ad1889_probe(struct pci_dev *pci,
950 const struct pci_device_id *pci_id)
951{
952 int err;
953 static int devno;
02c2de69 954 struct snd_card *card;
12bb5b78
CL		 955 struct snd_ad1889 *chip;
956
957 /* (1) */
958 if (devno >= SNDRV_CARDS)
959 return -ENODEV;
960 if (!enable[devno]) {
961 devno++;
962 return -ENOENT;
963 }
964
965 /* (2) */
60c5772b
TI		 966 err = snd_card_new(&pci->dev, index[devno], id[devno], THIS_MODULE,
967 0, &card);
12bb5b78 968 /* XXX REVISIT: we can probably allocate chip in this call */
e58de7ba
TI		 969 if (err < 0)
970 return err;
12bb5b78
CL		 971
972 strcpy(card->driver, "AD1889");
973 strcpy(card->shortname, "Analog Devices AD1889");
974
975 /* (3) */
976 err = snd_ad1889_create(card, pci, &chip);
977 if (err < 0)
978 goto free_and_ret;
979
980 /* (4) */
981 sprintf(card->longname, "%s at 0x%lx irq %i",
982 card->shortname, chip->bar, chip->irq);
983
984 /* (5) */
985 /* register AC97 mixer */
986 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]);
987 if (err < 0)
988 goto free_and_ret;
989
a0880094 990 err = snd_ad1889_pcm_init(chip, 0);
12bb5b78
CL		 991 if (err < 0)
992 goto free_and_ret;
993
994 /* register proc interface */
995 snd_ad1889_proc_init(chip);
996
997 /* (6) */
998 err = snd_card_register(card);
999 if (err < 0)
1000 goto free_and_ret;
1001
1002 /* (7) */
1003 pci_set_drvdata(pci, card);
1004
1005 devno++;
1006 return 0;
1007
1008free_and_ret:
1009 snd_card_free(card);
1010 return err;
1011}
1012
2f5c1302 1013static void
12bb5b78
CL		 1014snd_ad1889_remove(struct pci_dev *pci)
1015{
1016 snd_card_free(pci_get_drvdata(pci));
12bb5b78
CL		 1017}
1018
9baa3c34 1019static const struct pci_device_id snd_ad1889_ids[] = {
12bb5b78
CL		 1020 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) },
1021 { 0, },
1022};
1023MODULE_DEVICE_TABLE(pci, snd_ad1889_ids);
1024
e4d76815 1025static struct pci_driver ad1889_pci_driver = {
3733e424 1026 .name = KBUILD_MODNAME,
12bb5b78
CL		 1027 .id_table = snd_ad1889_ids,
1028 .probe = snd_ad1889_probe,
2f5c1302 1029 .remove = snd_ad1889_remove,
12bb5b78
CL		 1030};
1031
e9f66d9b 1032module_pci_driver(ad1889_pci_driver);
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