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1a59d1b8 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 LT |
2 | /* |
3 | * card-als4000.c - driver for Avance Logic ALS4000 based soundcards. | |
4 | * Copyright (C) 2000 by Bart Hartgers <bart@etpmod.phys.tue.nl>, | |
c1017a4c | 5 | * Jaroslav Kysela <perex@perex.cz> |
cb780cdd | 6 | * Copyright (C) 2002, 2008 by Andreas Mohr <hw7oshyuv3001@sneakemail.com> |
1da177e4 LT |
7 | * |
8 | * Framework borrowed from Massimo Piccioni's card-als100.c. | |
9 | * | |
10 | * NOTES | |
11 | * | |
12 | * Since Avance does not provide any meaningful documentation, and I | |
13 | * bought an ALS4000 based soundcard, I was forced to base this driver | |
14 | * on reverse engineering. | |
15 | * | |
cb780cdd AM |
16 | * Note: this is no longer true (thank you!): |
17 | * pretty verbose chip docu (ALS4000a.PDF) can be found on the ALSA web site. | |
18 | * Page numbers stated anywhere below with the "SPECS_PAGE:" tag | |
19 | * refer to: ALS4000a.PDF specs Ver 1.0, May 28th, 1998. | |
1da177e4 LT |
20 | * |
21 | * The ALS4000 seems to be the PCI-cousin of the ALS100. It contains an | |
22 | * ALS100-like SB DSP/mixer, an OPL3 synth, a MPU401 and a gameport | |
23 | * interface. These subsystems can be mapped into ISA io-port space, | |
24 | * using the PCI-interface. In addition, the PCI-bit provides DMA and IRQ | |
25 | * services to the subsystems. | |
26 | * | |
27 | * While ALS4000 is very similar to a SoundBlaster, the differences in | |
28 | * DMA and capturing require more changes to the SoundBlaster than | |
29 | * desirable, so I made this separate driver. | |
30 | * | |
31 | * The ALS4000 can do real full duplex playback/capture. | |
32 | * | |
33 | * FMDAC: | |
34 | * - 0x4f -> port 0x14 | |
35 | * - port 0x15 |= 1 | |
36 | * | |
37 | * Enable/disable 3D sound: | |
38 | * - 0x50 -> port 0x14 | |
39 | * - change bit 6 (0x40) of port 0x15 | |
40 | * | |
41 | * Set QSound: | |
42 | * - 0xdb -> port 0x14 | |
43 | * - set port 0x15: | |
44 | * 0x3e (mode 3), 0x3c (mode 2), 0x3a (mode 1), 0x38 (mode 0) | |
45 | * | |
46 | * Set KSound: | |
47 | * - value -> some port 0x0c0d | |
48 | * | |
ba7301c7 | 49 | * ToDo: |
c0874449 | 50 | * - by default, don't enable legacy game and use PCI game I/O |
ba7301c7 | 51 | * - power management? (card can do voice wakeup according to datasheet!!) |
1da177e4 LT |
52 | */ |
53 | ||
6cbbfe1c | 54 | #include <linux/io.h> |
1da177e4 LT |
55 | #include <linux/init.h> |
56 | #include <linux/pci.h> | |
1da177e4 | 57 | #include <linux/gameport.h> |
65a77217 | 58 | #include <linux/module.h> |
910638ae | 59 | #include <linux/dma-mapping.h> |
1da177e4 LT |
60 | #include <sound/core.h> |
61 | #include <sound/pcm.h> | |
62 | #include <sound/rawmidi.h> | |
63 | #include <sound/mpu401.h> | |
64 | #include <sound/opl3.h> | |
65 | #include <sound/sb.h> | |
66 | #include <sound/initval.h> | |
67 | ||
cb780cdd | 68 | MODULE_AUTHOR("Bart Hartgers <bart@etpmod.phys.tue.nl>, Andreas Mohr"); |
1da177e4 LT |
69 | MODULE_DESCRIPTION("Avance Logic ALS4000"); |
70 | MODULE_LICENSE("GPL"); | |
71 | MODULE_SUPPORTED_DEVICE("{{Avance Logic,ALS4000}}"); | |
72 | ||
b2fac073 | 73 | #if IS_REACHABLE(CONFIG_GAMEPORT) |
1da177e4 LT |
74 | #define SUPPORT_JOYSTICK 1 |
75 | #endif | |
76 | ||
77 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ | |
78 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
a67ff6a5 | 79 | static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ |
1da177e4 LT |
80 | #ifdef SUPPORT_JOYSTICK |
81 | static int joystick_port[SNDRV_CARDS]; | |
82 | #endif | |
83 | ||
84 | module_param_array(index, int, NULL, 0444); | |
85 | MODULE_PARM_DESC(index, "Index value for ALS4000 soundcard."); | |
86 | module_param_array(id, charp, NULL, 0444); | |
87 | MODULE_PARM_DESC(id, "ID string for ALS4000 soundcard."); | |
88 | module_param_array(enable, bool, NULL, 0444); | |
89 | MODULE_PARM_DESC(enable, "Enable ALS4000 soundcard."); | |
90 | #ifdef SUPPORT_JOYSTICK | |
6192c41f | 91 | module_param_hw_array(joystick_port, int, ioport, NULL, 0444); |
1da177e4 LT |
92 | MODULE_PARM_DESC(joystick_port, "Joystick port address for ALS4000 soundcard. (0 = disabled)"); |
93 | #endif | |
94 | ||
17c39d9a | 95 | struct snd_card_als4000 { |
ba7301c7 | 96 | /* most frequent access first */ |
c0874449 | 97 | unsigned long iobase; |
ba7301c7 | 98 | struct pci_dev *pci; |
70352914 | 99 | struct snd_sb *chip; |
1da177e4 LT |
100 | #ifdef SUPPORT_JOYSTICK |
101 | struct gameport *gameport; | |
102 | #endif | |
17c39d9a | 103 | }; |
1da177e4 | 104 | |
9baa3c34 | 105 | static const struct pci_device_id snd_als4000_ids[] = { |
1da177e4 LT |
106 | { 0x4005, 0x4000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ALS4000 */ |
107 | { 0, } | |
108 | }; | |
109 | ||
110 | MODULE_DEVICE_TABLE(pci, snd_als4000_ids); | |
111 | ||
c0874449 | 112 | enum als4k_iobase_t { |
cb780cdd | 113 | /* IOx: B == Byte, W = Word, D = DWord; SPECS_PAGE: 37 */ |
c0874449 AM |
114 | ALS4K_IOD_00_AC97_ACCESS = 0x00, |
115 | ALS4K_IOW_04_AC97_READ = 0x04, | |
116 | ALS4K_IOB_06_AC97_STATUS = 0x06, | |
117 | ALS4K_IOB_07_IRQSTATUS = 0x07, | |
118 | ALS4K_IOD_08_GCR_DATA = 0x08, | |
119 | ALS4K_IOB_0C_GCR_INDEX = 0x0c, | |
cb780cdd | 120 | ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU = 0x0e, |
c0874449 AM |
121 | ALS4K_IOB_10_ADLIB_ADDR0 = 0x10, |
122 | ALS4K_IOB_11_ADLIB_ADDR1 = 0x11, | |
123 | ALS4K_IOB_12_ADLIB_ADDR2 = 0x12, | |
124 | ALS4K_IOB_13_ADLIB_ADDR3 = 0x13, | |
125 | ALS4K_IOB_14_MIXER_INDEX = 0x14, | |
126 | ALS4K_IOB_15_MIXER_DATA = 0x15, | |
cb780cdd AM |
127 | ALS4K_IOB_16_ESP_RESET = 0x16, |
128 | ALS4K_IOB_16_ACK_FOR_CR1E = 0x16, /* 2nd function */ | |
c0874449 AM |
129 | ALS4K_IOB_18_OPL_ADDR0 = 0x18, |
130 | ALS4K_IOB_19_OPL_ADDR1 = 0x19, | |
131 | ALS4K_IOB_1A_ESP_RD_DATA = 0x1a, | |
132 | ALS4K_IOB_1C_ESP_CMD_DATA = 0x1c, | |
133 | ALS4K_IOB_1C_ESP_WR_STATUS = 0x1c, /* 2nd function */ | |
134 | ALS4K_IOB_1E_ESP_RD_STATUS8 = 0x1e, | |
135 | ALS4K_IOB_1F_ESP_RD_STATUS16 = 0x1f, | |
136 | ALS4K_IOB_20_ESP_GAMEPORT_200 = 0x20, | |
137 | ALS4K_IOB_21_ESP_GAMEPORT_201 = 0x21, | |
138 | ALS4K_IOB_30_MIDI_DATA = 0x30, | |
139 | ALS4K_IOB_31_MIDI_STATUS = 0x31, | |
140 | ALS4K_IOB_31_MIDI_COMMAND = 0x31, /* 2nd function */ | |
141 | }; | |
142 | ||
cb780cdd AM |
143 | enum als4k_iobase_0e_t { |
144 | ALS4K_IOB_0E_MPU_IRQ = 0x10, | |
145 | ALS4K_IOB_0E_CR1E_IRQ = 0x40, | |
146 | ALS4K_IOB_0E_SB_DMA_IRQ = 0x80, | |
c0874449 AM |
147 | }; |
148 | ||
cb780cdd AM |
149 | enum als4k_gcr_t { /* all registers 32bit wide; SPECS_PAGE: 38 to 42 */ |
150 | ALS4K_GCR8C_MISC_CTRL = 0x8c, | |
151 | ALS4K_GCR90_TEST_MODE_REG = 0x90, | |
152 | ALS4K_GCR91_DMA0_ADDR = 0x91, | |
153 | ALS4K_GCR92_DMA0_MODE_COUNT = 0x92, | |
154 | ALS4K_GCR93_DMA1_ADDR = 0x93, | |
155 | ALS4K_GCR94_DMA1_MODE_COUNT = 0x94, | |
156 | ALS4K_GCR95_DMA3_ADDR = 0x95, | |
157 | ALS4K_GCR96_DMA3_MODE_COUNT = 0x96, | |
158 | ALS4K_GCR99_DMA_EMULATION_CTRL = 0x99, | |
159 | ALS4K_GCRA0_FIFO1_CURRENT_ADDR = 0xa0, | |
160 | ALS4K_GCRA1_FIFO1_STATUS_BYTECOUNT = 0xa1, | |
161 | ALS4K_GCRA2_FIFO2_PCIADDR = 0xa2, | |
162 | ALS4K_GCRA3_FIFO2_COUNT = 0xa3, | |
163 | ALS4K_GCRA4_FIFO2_CURRENT_ADDR = 0xa4, | |
164 | ALS4K_GCRA5_FIFO1_STATUS_BYTECOUNT = 0xa5, | |
165 | ALS4K_GCRA6_PM_CTRL = 0xa6, | |
166 | ALS4K_GCRA7_PCI_ACCESS_STORAGE = 0xa7, | |
167 | ALS4K_GCRA8_LEGACY_CFG1 = 0xa8, | |
168 | ALS4K_GCRA9_LEGACY_CFG2 = 0xa9, | |
169 | ALS4K_GCRFF_DUMMY_SCRATCH = 0xff, | |
c0874449 AM |
170 | }; |
171 | ||
cb780cdd AM |
172 | enum als4k_gcr8c_t { |
173 | ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE = 0x8000, | |
174 | ALS4K_GCR8C_CHIP_REV_MASK = 0xf0000 | |
175 | }; | |
176 | ||
177 | static inline void snd_als4k_iobase_writeb(unsigned long iobase, | |
178 | enum als4k_iobase_t reg, | |
179 | u8 val) | |
1da177e4 | 180 | { |
cb780cdd | 181 | outb(val, iobase + reg); |
1da177e4 LT |
182 | } |
183 | ||
cb780cdd AM |
184 | static inline void snd_als4k_iobase_writel(unsigned long iobase, |
185 | enum als4k_iobase_t reg, | |
186 | u32 val) | |
187 | { | |
188 | outl(val, iobase + reg); | |
189 | } | |
190 | ||
191 | static inline u8 snd_als4k_iobase_readb(unsigned long iobase, | |
192 | enum als4k_iobase_t reg) | |
193 | { | |
194 | return inb(iobase + reg); | |
195 | } | |
196 | ||
197 | static inline u32 snd_als4k_iobase_readl(unsigned long iobase, | |
198 | enum als4k_iobase_t reg) | |
199 | { | |
200 | return inl(iobase + reg); | |
201 | } | |
202 | ||
203 | static inline void snd_als4k_gcr_write_addr(unsigned long iobase, | |
c0874449 AM |
204 | enum als4k_gcr_t reg, |
205 | u32 val) | |
1da177e4 | 206 | { |
cb780cdd AM |
207 | snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg); |
208 | snd_als4k_iobase_writel(iobase, ALS4K_IOD_08_GCR_DATA, val); | |
209 | } | |
210 | ||
211 | static inline void snd_als4k_gcr_write(struct snd_sb *sb, | |
212 | enum als4k_gcr_t reg, | |
213 | u32 val) | |
214 | { | |
215 | snd_als4k_gcr_write_addr(sb->alt_port, reg, val); | |
1da177e4 LT |
216 | } |
217 | ||
cb780cdd | 218 | static inline u32 snd_als4k_gcr_read_addr(unsigned long iobase, |
c0874449 | 219 | enum als4k_gcr_t reg) |
1da177e4 | 220 | { |
cb780cdd AM |
221 | /* SPECS_PAGE: 37/38 */ |
222 | snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg); | |
223 | return snd_als4k_iobase_readl(iobase, ALS4K_IOD_08_GCR_DATA); | |
224 | } | |
225 | ||
226 | static inline u32 snd_als4k_gcr_read(struct snd_sb *sb, enum als4k_gcr_t reg) | |
227 | { | |
228 | return snd_als4k_gcr_read_addr(sb->alt_port, reg); | |
229 | } | |
230 | ||
231 | enum als4k_cr_t { /* all registers 8bit wide; SPECS_PAGE: 20 to 23 */ | |
232 | ALS4K_CR0_SB_CONFIG = 0x00, | |
233 | ALS4K_CR2_MISC_CONTROL = 0x02, | |
234 | ALS4K_CR3_CONFIGURATION = 0x03, | |
235 | ALS4K_CR17_FIFO_STATUS = 0x17, | |
236 | ALS4K_CR18_ESP_MAJOR_VERSION = 0x18, | |
237 | ALS4K_CR19_ESP_MINOR_VERSION = 0x19, | |
238 | ALS4K_CR1A_MPU401_UART_MODE_CONTROL = 0x1a, | |
239 | ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO = 0x1c, | |
240 | ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI = 0x1d, | |
241 | ALS4K_CR1E_FIFO2_CONTROL = 0x1e, /* secondary PCM FIFO (recording) */ | |
242 | ALS4K_CR3A_MISC_CONTROL = 0x3a, | |
243 | ALS4K_CR3B_CRC32_BYTE0 = 0x3b, /* for testing, activate via CR3A */ | |
244 | ALS4K_CR3C_CRC32_BYTE1 = 0x3c, | |
245 | ALS4K_CR3D_CRC32_BYTE2 = 0x3d, | |
246 | ALS4K_CR3E_CRC32_BYTE3 = 0x3e, | |
247 | }; | |
248 | ||
249 | enum als4k_cr0_t { | |
250 | ALS4K_CR0_DMA_CONTIN_MODE_CTRL = 0x02, /* IRQ/FIFO controlled for 0/1 */ | |
251 | ALS4K_CR0_DMA_90H_MODE_CTRL = 0x04, /* IRQ/FIFO controlled for 0/1 */ | |
252 | ALS4K_CR0_MX80_81_REG_WRITE_ENABLE = 0x80, | |
253 | }; | |
254 | ||
255 | static inline void snd_als4_cr_write(struct snd_sb *chip, | |
256 | enum als4k_cr_t reg, | |
257 | u8 data) | |
258 | { | |
259 | /* Control Register is reg | 0xc0 (bit 7, 6 set) on sbmixer_index | |
260 | * NOTE: assumes chip->mixer_lock to be locked externally already! | |
261 | * SPECS_PAGE: 6 */ | |
262 | snd_sbmixer_write(chip, reg | 0xc0, data); | |
1da177e4 LT |
263 | } |
264 | ||
cb780cdd AM |
265 | static inline u8 snd_als4_cr_read(struct snd_sb *chip, |
266 | enum als4k_cr_t reg) | |
1da177e4 | 267 | { |
cb780cdd AM |
268 | /* NOTE: assumes chip->mixer_lock to be locked externally already! */ |
269 | return snd_sbmixer_read(chip, reg | 0xc0); | |
1da177e4 LT |
270 | } |
271 | ||
cb780cdd AM |
272 | |
273 | ||
17c39d9a | 274 | static void snd_als4000_set_rate(struct snd_sb *chip, unsigned int rate) |
1da177e4 LT |
275 | { |
276 | if (!(chip->mode & SB_RATE_LOCK)) { | |
277 | snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT); | |
278 | snd_sbdsp_command(chip, rate>>8); | |
279 | snd_sbdsp_command(chip, rate); | |
280 | } | |
281 | } | |
282 | ||
17c39d9a TI |
283 | static inline void snd_als4000_set_capture_dma(struct snd_sb *chip, |
284 | dma_addr_t addr, unsigned size) | |
1da177e4 | 285 | { |
cb780cdd AM |
286 | /* SPECS_PAGE: 40 */ |
287 | snd_als4k_gcr_write(chip, ALS4K_GCRA2_FIFO2_PCIADDR, addr); | |
288 | snd_als4k_gcr_write(chip, ALS4K_GCRA3_FIFO2_COUNT, (size-1)); | |
1da177e4 LT |
289 | } |
290 | ||
17c39d9a | 291 | static inline void snd_als4000_set_playback_dma(struct snd_sb *chip, |
c0874449 AM |
292 | dma_addr_t addr, |
293 | unsigned size) | |
1da177e4 | 294 | { |
cb780cdd AM |
295 | /* SPECS_PAGE: 38 */ |
296 | snd_als4k_gcr_write(chip, ALS4K_GCR91_DMA0_ADDR, addr); | |
297 | snd_als4k_gcr_write(chip, ALS4K_GCR92_DMA0_MODE_COUNT, | |
c0874449 | 298 | (size-1)|0x180000); |
1da177e4 LT |
299 | } |
300 | ||
301 | #define ALS4000_FORMAT_SIGNED (1<<0) | |
302 | #define ALS4000_FORMAT_16BIT (1<<1) | |
303 | #define ALS4000_FORMAT_STEREO (1<<2) | |
304 | ||
17c39d9a | 305 | static int snd_als4000_get_format(struct snd_pcm_runtime *runtime) |
1da177e4 LT |
306 | { |
307 | int result; | |
308 | ||
309 | result = 0; | |
310 | if (snd_pcm_format_signed(runtime->format)) | |
311 | result |= ALS4000_FORMAT_SIGNED; | |
312 | if (snd_pcm_format_physical_width(runtime->format) == 16) | |
313 | result |= ALS4000_FORMAT_16BIT; | |
314 | if (runtime->channels > 1) | |
315 | result |= ALS4000_FORMAT_STEREO; | |
316 | return result; | |
317 | } | |
318 | ||
319 | /* structure for setting up playback */ | |
ba7301c7 | 320 | static const struct { |
1da177e4 LT |
321 | unsigned char dsp_cmd, dma_on, dma_off, format; |
322 | } playback_cmd_vals[]={ | |
323 | /* ALS4000_FORMAT_U8_MONO */ | |
324 | { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_MONO }, | |
325 | /* ALS4000_FORMAT_S8_MONO */ | |
326 | { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_MONO }, | |
327 | /* ALS4000_FORMAT_U16L_MONO */ | |
328 | { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_MONO }, | |
329 | /* ALS4000_FORMAT_S16L_MONO */ | |
330 | { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_MONO }, | |
331 | /* ALS4000_FORMAT_U8_STEREO */ | |
332 | { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_STEREO }, | |
333 | /* ALS4000_FORMAT_S8_STEREO */ | |
334 | { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_STEREO }, | |
335 | /* ALS4000_FORMAT_U16L_STEREO */ | |
336 | { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_STEREO }, | |
337 | /* ALS4000_FORMAT_S16L_STEREO */ | |
338 | { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_STEREO }, | |
339 | }; | |
340 | #define playback_cmd(chip) (playback_cmd_vals[(chip)->playback_format]) | |
341 | ||
342 | /* structure for setting up capture */ | |
343 | enum { CMD_WIDTH8=0x04, CMD_SIGNED=0x10, CMD_MONO=0x80, CMD_STEREO=0xA0 }; | |
ba7301c7 | 344 | static const unsigned char capture_cmd_vals[]= |
1da177e4 LT |
345 | { |
346 | CMD_WIDTH8|CMD_MONO, /* ALS4000_FORMAT_U8_MONO */ | |
347 | CMD_WIDTH8|CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S8_MONO */ | |
348 | CMD_MONO, /* ALS4000_FORMAT_U16L_MONO */ | |
349 | CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S16L_MONO */ | |
350 | CMD_WIDTH8|CMD_STEREO, /* ALS4000_FORMAT_U8_STEREO */ | |
351 | CMD_WIDTH8|CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S8_STEREO */ | |
352 | CMD_STEREO, /* ALS4000_FORMAT_U16L_STEREO */ | |
353 | CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S16L_STEREO */ | |
354 | }; | |
355 | #define capture_cmd(chip) (capture_cmd_vals[(chip)->capture_format]) | |
356 | ||
17c39d9a | 357 | static int snd_als4000_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 358 | { |
17c39d9a TI |
359 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
360 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
361 | unsigned long size; |
362 | unsigned count; | |
363 | ||
364 | chip->capture_format = snd_als4000_get_format(runtime); | |
365 | ||
366 | size = snd_pcm_lib_buffer_bytes(substream); | |
367 | count = snd_pcm_lib_period_bytes(substream); | |
368 | ||
369 | if (chip->capture_format & ALS4000_FORMAT_16BIT) | |
cb780cdd | 370 | count >>= 1; |
1da177e4 LT |
371 | count--; |
372 | ||
17c39d9a | 373 | spin_lock_irq(&chip->reg_lock); |
1da177e4 LT |
374 | snd_als4000_set_rate(chip, runtime->rate); |
375 | snd_als4000_set_capture_dma(chip, runtime->dma_addr, size); | |
17c39d9a TI |
376 | spin_unlock_irq(&chip->reg_lock); |
377 | spin_lock_irq(&chip->mixer_lock); | |
cb780cdd AM |
378 | snd_als4_cr_write(chip, ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO, count & 0xff); |
379 | snd_als4_cr_write(chip, ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI, count >> 8); | |
17c39d9a | 380 | spin_unlock_irq(&chip->mixer_lock); |
1da177e4 LT |
381 | return 0; |
382 | } | |
383 | ||
17c39d9a | 384 | static int snd_als4000_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 385 | { |
17c39d9a TI |
386 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
387 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
388 | unsigned long size; |
389 | unsigned count; | |
390 | ||
391 | chip->playback_format = snd_als4000_get_format(runtime); | |
392 | ||
393 | size = snd_pcm_lib_buffer_bytes(substream); | |
394 | count = snd_pcm_lib_period_bytes(substream); | |
395 | ||
396 | if (chip->playback_format & ALS4000_FORMAT_16BIT) | |
cb780cdd | 397 | count >>= 1; |
1da177e4 LT |
398 | count--; |
399 | ||
400 | /* FIXME: from second playback on, there's a lot more clicks and pops | |
401 | * involved here than on first playback. Fiddling with | |
402 | * tons of different settings didn't help (DMA, speaker on/off, | |
403 | * reordering, ...). Something seems to get enabled on playback | |
404 | * that I haven't found out how to disable again, which then causes | |
405 | * the switching pops to reach the speakers the next time here. */ | |
17c39d9a | 406 | spin_lock_irq(&chip->reg_lock); |
1da177e4 LT |
407 | snd_als4000_set_rate(chip, runtime->rate); |
408 | snd_als4000_set_playback_dma(chip, runtime->dma_addr, size); | |
409 | ||
410 | /* SPEAKER_ON not needed, since dma_on seems to also enable speaker */ | |
411 | /* snd_sbdsp_command(chip, SB_DSP_SPEAKER_ON); */ | |
412 | snd_sbdsp_command(chip, playback_cmd(chip).dsp_cmd); | |
413 | snd_sbdsp_command(chip, playback_cmd(chip).format); | |
cb780cdd AM |
414 | snd_sbdsp_command(chip, count & 0xff); |
415 | snd_sbdsp_command(chip, count >> 8); | |
1da177e4 | 416 | snd_sbdsp_command(chip, playback_cmd(chip).dma_off); |
17c39d9a | 417 | spin_unlock_irq(&chip->reg_lock); |
1da177e4 LT |
418 | |
419 | return 0; | |
420 | } | |
421 | ||
17c39d9a | 422 | static int snd_als4000_capture_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 423 | { |
17c39d9a | 424 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
425 | int result = 0; |
426 | ||
c0874449 AM |
427 | /* FIXME race condition in here!!! |
428 | chip->mode non-atomic update gets consistently protected | |
429 | by reg_lock always, _except_ for this place!! | |
430 | Probably need to take reg_lock as outer (or inner??) lock, too. | |
431 | (or serialize both lock operations? probably not, though... - racy?) | |
432 | */ | |
1da177e4 | 433 | spin_lock(&chip->mixer_lock); |
70352914 TI |
434 | switch (cmd) { |
435 | case SNDRV_PCM_TRIGGER_START: | |
436 | case SNDRV_PCM_TRIGGER_RESUME: | |
1da177e4 | 437 | chip->mode |= SB_RATE_LOCK_CAPTURE; |
cb780cdd AM |
438 | snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL, |
439 | capture_cmd(chip)); | |
70352914 TI |
440 | break; |
441 | case SNDRV_PCM_TRIGGER_STOP: | |
442 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
1da177e4 | 443 | chip->mode &= ~SB_RATE_LOCK_CAPTURE; |
cb780cdd AM |
444 | snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL, |
445 | capture_cmd(chip)); | |
70352914 TI |
446 | break; |
447 | default: | |
1da177e4 | 448 | result = -EINVAL; |
70352914 | 449 | break; |
1da177e4 LT |
450 | } |
451 | spin_unlock(&chip->mixer_lock); | |
452 | return result; | |
453 | } | |
454 | ||
17c39d9a | 455 | static int snd_als4000_playback_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 456 | { |
17c39d9a | 457 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
458 | int result = 0; |
459 | ||
460 | spin_lock(&chip->reg_lock); | |
70352914 TI |
461 | switch (cmd) { |
462 | case SNDRV_PCM_TRIGGER_START: | |
463 | case SNDRV_PCM_TRIGGER_RESUME: | |
1da177e4 LT |
464 | chip->mode |= SB_RATE_LOCK_PLAYBACK; |
465 | snd_sbdsp_command(chip, playback_cmd(chip).dma_on); | |
70352914 TI |
466 | break; |
467 | case SNDRV_PCM_TRIGGER_STOP: | |
468 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
1da177e4 LT |
469 | snd_sbdsp_command(chip, playback_cmd(chip).dma_off); |
470 | chip->mode &= ~SB_RATE_LOCK_PLAYBACK; | |
70352914 TI |
471 | break; |
472 | default: | |
1da177e4 | 473 | result = -EINVAL; |
70352914 | 474 | break; |
1da177e4 LT |
475 | } |
476 | spin_unlock(&chip->reg_lock); | |
477 | return result; | |
478 | } | |
479 | ||
17c39d9a | 480 | static snd_pcm_uframes_t snd_als4000_capture_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 481 | { |
17c39d9a | 482 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
483 | unsigned int result; |
484 | ||
485 | spin_lock(&chip->reg_lock); | |
cb780cdd | 486 | result = snd_als4k_gcr_read(chip, ALS4K_GCRA4_FIFO2_CURRENT_ADDR); |
1da177e4 | 487 | spin_unlock(&chip->reg_lock); |
cb780cdd | 488 | result &= 0xffff; |
1da177e4 LT |
489 | return bytes_to_frames( substream->runtime, result ); |
490 | } | |
491 | ||
17c39d9a | 492 | static snd_pcm_uframes_t snd_als4000_playback_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 493 | { |
17c39d9a | 494 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
495 | unsigned result; |
496 | ||
497 | spin_lock(&chip->reg_lock); | |
cb780cdd | 498 | result = snd_als4k_gcr_read(chip, ALS4K_GCRA0_FIFO1_CURRENT_ADDR); |
1da177e4 | 499 | spin_unlock(&chip->reg_lock); |
cb780cdd | 500 | result &= 0xffff; |
1da177e4 LT |
501 | return bytes_to_frames( substream->runtime, result ); |
502 | } | |
503 | ||
ba7301c7 AM |
504 | /* FIXME: this IRQ routine doesn't really support IRQ sharing (we always |
505 | * return IRQ_HANDLED no matter whether we actually had an IRQ flag or not). | |
506 | * ALS4000a.PDF writes that while ACKing IRQ in PCI block will *not* ACK | |
507 | * the IRQ in the SB core, ACKing IRQ in SB block *will* ACK the PCI IRQ | |
cb780cdd | 508 | * register (alt_port + ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU). Probably something |
c0874449 | 509 | * could be optimized here to query/write one register only... |
ba7301c7 AM |
510 | * And even if both registers need to be queried, then there's still the |
511 | * question of whether it's actually correct to ACK PCI IRQ before reading | |
512 | * SB IRQ like we do now, since ALS4000a.PDF mentions that PCI IRQ will *clear* | |
513 | * SB IRQ status. | |
cb780cdd | 514 | * (hmm, SPECS_PAGE: 38 mentions it the other way around!) |
ba7301c7 AM |
515 | * And do we *really* need the lock here for *reading* SB_DSP4_IRQSTATUS?? |
516 | * */ | |
7d12e780 | 517 | static irqreturn_t snd_als4000_interrupt(int irq, void *dev_id) |
1da177e4 | 518 | { |
17c39d9a | 519 | struct snd_sb *chip = dev_id; |
cb780cdd AM |
520 | unsigned pci_irqstatus; |
521 | unsigned sb_irqstatus; | |
522 | ||
523 | /* find out which bit of the ALS4000 PCI block produced the interrupt, | |
524 | SPECS_PAGE: 38, 5 */ | |
525 | pci_irqstatus = snd_als4k_iobase_readb(chip->alt_port, | |
526 | ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU); | |
527 | if ((pci_irqstatus & ALS4K_IOB_0E_SB_DMA_IRQ) | |
528 | && (chip->playback_substream)) /* playback */ | |
1da177e4 | 529 | snd_pcm_period_elapsed(chip->playback_substream); |
cb780cdd AM |
530 | if ((pci_irqstatus & ALS4K_IOB_0E_CR1E_IRQ) |
531 | && (chip->capture_substream)) /* capturing */ | |
1da177e4 | 532 | snd_pcm_period_elapsed(chip->capture_substream); |
cb780cdd AM |
533 | if ((pci_irqstatus & ALS4K_IOB_0E_MPU_IRQ) |
534 | && (chip->rmidi)) /* MPU401 interrupt */ | |
7d12e780 | 535 | snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); |
cb780cdd AM |
536 | /* ACK the PCI block IRQ */ |
537 | snd_als4k_iobase_writeb(chip->alt_port, | |
538 | ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU, pci_irqstatus); | |
1da177e4 LT |
539 | |
540 | spin_lock(&chip->mixer_lock); | |
cb780cdd AM |
541 | /* SPECS_PAGE: 20 */ |
542 | sb_irqstatus = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS); | |
1da177e4 LT |
543 | spin_unlock(&chip->mixer_lock); |
544 | ||
cb780cdd | 545 | if (sb_irqstatus & SB_IRQTYPE_8BIT) |
1da177e4 | 546 | snd_sb_ack_8bit(chip); |
cb780cdd | 547 | if (sb_irqstatus & SB_IRQTYPE_16BIT) |
1da177e4 | 548 | snd_sb_ack_16bit(chip); |
cb780cdd | 549 | if (sb_irqstatus & SB_IRQTYPE_MPUIN) |
1da177e4 | 550 | inb(chip->mpu_port); |
cb780cdd AM |
551 | if (sb_irqstatus & ALS4K_IRQTYPE_CR1E_DMA) |
552 | snd_als4k_iobase_readb(chip->alt_port, | |
553 | ALS4K_IOB_16_ACK_FOR_CR1E); | |
554 | ||
d85d878e | 555 | /* dev_dbg(chip->card->dev, "als4000: irq 0x%04x 0x%04x\n", |
cb780cdd AM |
556 | pci_irqstatus, sb_irqstatus); */ |
557 | ||
558 | /* only ack the things we actually handled above */ | |
559 | return IRQ_RETVAL( | |
560 | (pci_irqstatus & (ALS4K_IOB_0E_SB_DMA_IRQ|ALS4K_IOB_0E_CR1E_IRQ| | |
561 | ALS4K_IOB_0E_MPU_IRQ)) | |
562 | || (sb_irqstatus & (SB_IRQTYPE_8BIT|SB_IRQTYPE_16BIT| | |
563 | SB_IRQTYPE_MPUIN|ALS4K_IRQTYPE_CR1E_DMA)) | |
564 | ); | |
1da177e4 LT |
565 | } |
566 | ||
567 | /*****************************************************************/ | |
568 | ||
dee49895 | 569 | static const struct snd_pcm_hardware snd_als4000_playback = |
1da177e4 LT |
570 | { |
571 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
572 | SNDRV_PCM_INFO_MMAP_VALID), | |
573 | .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | | |
574 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */ | |
575 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, | |
576 | .rate_min = 4000, | |
577 | .rate_max = 48000, | |
578 | .channels_min = 1, | |
579 | .channels_max = 2, | |
580 | .buffer_bytes_max = 65536, | |
581 | .period_bytes_min = 64, | |
582 | .period_bytes_max = 65536, | |
583 | .periods_min = 1, | |
584 | .periods_max = 1024, | |
585 | .fifo_size = 0 | |
586 | }; | |
587 | ||
dee49895 | 588 | static const struct snd_pcm_hardware snd_als4000_capture = |
1da177e4 LT |
589 | { |
590 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
591 | SNDRV_PCM_INFO_MMAP_VALID), | |
592 | .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | | |
593 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */ | |
594 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, | |
595 | .rate_min = 4000, | |
596 | .rate_max = 48000, | |
597 | .channels_min = 1, | |
598 | .channels_max = 2, | |
599 | .buffer_bytes_max = 65536, | |
600 | .period_bytes_min = 64, | |
601 | .period_bytes_max = 65536, | |
602 | .periods_min = 1, | |
603 | .periods_max = 1024, | |
604 | .fifo_size = 0 | |
605 | }; | |
606 | ||
607 | /*****************************************************************/ | |
608 | ||
17c39d9a | 609 | static int snd_als4000_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 610 | { |
17c39d9a TI |
611 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
612 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
613 | |
614 | chip->playback_substream = substream; | |
615 | runtime->hw = snd_als4000_playback; | |
616 | return 0; | |
617 | } | |
618 | ||
17c39d9a | 619 | static int snd_als4000_playback_close(struct snd_pcm_substream *substream) |
1da177e4 | 620 | { |
17c39d9a | 621 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
622 | |
623 | chip->playback_substream = NULL; | |
1da177e4 LT |
624 | return 0; |
625 | } | |
626 | ||
17c39d9a | 627 | static int snd_als4000_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 628 | { |
17c39d9a TI |
629 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
630 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
631 | |
632 | chip->capture_substream = substream; | |
633 | runtime->hw = snd_als4000_capture; | |
634 | return 0; | |
635 | } | |
636 | ||
17c39d9a | 637 | static int snd_als4000_capture_close(struct snd_pcm_substream *substream) |
1da177e4 | 638 | { |
17c39d9a | 639 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
640 | |
641 | chip->capture_substream = NULL; | |
1da177e4 LT |
642 | return 0; |
643 | } | |
644 | ||
645 | /******************************************************************/ | |
646 | ||
6769e988 | 647 | static const struct snd_pcm_ops snd_als4000_playback_ops = { |
1da177e4 LT |
648 | .open = snd_als4000_playback_open, |
649 | .close = snd_als4000_playback_close, | |
1da177e4 LT |
650 | .prepare = snd_als4000_playback_prepare, |
651 | .trigger = snd_als4000_playback_trigger, | |
652 | .pointer = snd_als4000_playback_pointer | |
653 | }; | |
654 | ||
6769e988 | 655 | static const struct snd_pcm_ops snd_als4000_capture_ops = { |
1da177e4 LT |
656 | .open = snd_als4000_capture_open, |
657 | .close = snd_als4000_capture_close, | |
1da177e4 LT |
658 | .prepare = snd_als4000_capture_prepare, |
659 | .trigger = snd_als4000_capture_trigger, | |
660 | .pointer = snd_als4000_capture_pointer | |
661 | }; | |
662 | ||
e23e7a14 | 663 | static int snd_als4000_pcm(struct snd_sb *chip, int device) |
1da177e4 | 664 | { |
17c39d9a | 665 | struct snd_pcm *pcm; |
1da177e4 LT |
666 | int err; |
667 | ||
cb780cdd AM |
668 | err = snd_pcm_new(chip->card, "ALS4000 DSP", device, 1, 1, &pcm); |
669 | if (err < 0) | |
1da177e4 | 670 | return err; |
1da177e4 LT |
671 | pcm->private_data = chip; |
672 | pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; | |
673 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_als4000_playback_ops); | |
674 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_als4000_capture_ops); | |
675 | ||
96bcfde1 TI |
676 | snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, |
677 | &chip->pci->dev, 64*1024, 64*1024); | |
1da177e4 LT |
678 | |
679 | chip->pcm = pcm; | |
680 | ||
681 | return 0; | |
682 | } | |
683 | ||
684 | /******************************************************************/ | |
685 | ||
c0874449 AM |
686 | static void snd_als4000_set_addr(unsigned long iobase, |
687 | unsigned int sb_io, | |
688 | unsigned int mpu_io, | |
689 | unsigned int opl_io, | |
690 | unsigned int game_io) | |
1da177e4 | 691 | { |
c0874449 AM |
692 | u32 cfg1 = 0; |
693 | u32 cfg2 = 0; | |
1da177e4 | 694 | |
c0874449 AM |
695 | if (mpu_io > 0) |
696 | cfg2 |= (mpu_io | 1) << 16; | |
697 | if (sb_io > 0) | |
698 | cfg2 |= (sb_io | 1); | |
699 | if (game_io > 0) | |
700 | cfg1 |= (game_io | 1) << 16; | |
701 | if (opl_io > 0) | |
702 | cfg1 |= (opl_io | 1); | |
cb780cdd AM |
703 | snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA8_LEGACY_CFG1, cfg1); |
704 | snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA9_LEGACY_CFG2, cfg2); | |
1da177e4 LT |
705 | } |
706 | ||
70352914 | 707 | static void snd_als4000_configure(struct snd_sb *chip) |
1da177e4 | 708 | { |
cb780cdd | 709 | u8 tmp; |
1da177e4 LT |
710 | int i; |
711 | ||
712 | /* do some more configuration */ | |
713 | spin_lock_irq(&chip->mixer_lock); | |
cb780cdd AM |
714 | tmp = snd_als4_cr_read(chip, ALS4K_CR0_SB_CONFIG); |
715 | snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG, | |
716 | tmp|ALS4K_CR0_MX80_81_REG_WRITE_ENABLE); | |
717 | /* always select DMA channel 0, since we do not actually use DMA | |
718 | * SPECS_PAGE: 19/20 */ | |
1da177e4 | 719 | snd_sbmixer_write(chip, SB_DSP4_DMASETUP, SB_DMASETUP_DMA0); |
cb780cdd AM |
720 | snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG, |
721 | tmp & ~ALS4K_CR0_MX80_81_REG_WRITE_ENABLE); | |
1da177e4 LT |
722 | spin_unlock_irq(&chip->mixer_lock); |
723 | ||
724 | spin_lock_irq(&chip->reg_lock); | |
c0874449 | 725 | /* enable interrupts */ |
cb780cdd AM |
726 | snd_als4k_gcr_write(chip, ALS4K_GCR8C_MISC_CTRL, |
727 | ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE); | |
c0874449 | 728 | |
cb780cdd AM |
729 | /* SPECS_PAGE: 39 */ |
730 | for (i = ALS4K_GCR91_DMA0_ADDR; i <= ALS4K_GCR96_DMA3_MODE_COUNT; ++i) | |
731 | snd_als4k_gcr_write(chip, i, 0); | |
b9619230 | 732 | /* enable burst mode to prevent dropouts during high PCI bus usage */ |
cb780cdd | 733 | snd_als4k_gcr_write(chip, ALS4K_GCR99_DMA_EMULATION_CTRL, |
c4685849 | 734 | (snd_als4k_gcr_read(chip, ALS4K_GCR99_DMA_EMULATION_CTRL) & ~0x07) | 0x04); |
1da177e4 LT |
735 | spin_unlock_irq(&chip->reg_lock); |
736 | } | |
737 | ||
738 | #ifdef SUPPORT_JOYSTICK | |
e23e7a14 | 739 | static int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev) |
1da177e4 LT |
740 | { |
741 | struct gameport *gp; | |
742 | struct resource *r; | |
743 | int io_port; | |
744 | ||
745 | if (joystick_port[dev] == 0) | |
746 | return -ENODEV; | |
747 | ||
748 | if (joystick_port[dev] == 1) { /* auto-detect */ | |
749 | for (io_port = 0x200; io_port <= 0x218; io_port += 8) { | |
750 | r = request_region(io_port, 8, "ALS4000 gameport"); | |
751 | if (r) | |
752 | break; | |
753 | } | |
754 | } else { | |
755 | io_port = joystick_port[dev]; | |
756 | r = request_region(io_port, 8, "ALS4000 gameport"); | |
757 | } | |
758 | ||
759 | if (!r) { | |
d85d878e | 760 | dev_warn(&acard->pci->dev, "cannot reserve joystick ports\n"); |
1da177e4 LT |
761 | return -EBUSY; |
762 | } | |
763 | ||
764 | acard->gameport = gp = gameport_allocate_port(); | |
765 | if (!gp) { | |
d85d878e | 766 | dev_err(&acard->pci->dev, "cannot allocate memory for gameport\n"); |
b1d5776d | 767 | release_and_free_resource(r); |
1da177e4 LT |
768 | return -ENOMEM; |
769 | } | |
770 | ||
771 | gameport_set_name(gp, "ALS4000 Gameport"); | |
772 | gameport_set_phys(gp, "pci%s/gameport0", pci_name(acard->pci)); | |
773 | gameport_set_dev_parent(gp, &acard->pci->dev); | |
774 | gp->io = io_port; | |
775 | gameport_set_port_data(gp, r); | |
776 | ||
777 | /* Enable legacy joystick port */ | |
c0874449 | 778 | snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1); |
1da177e4 LT |
779 | |
780 | gameport_register_port(acard->gameport); | |
781 | ||
782 | return 0; | |
783 | } | |
784 | ||
17c39d9a | 785 | static void snd_als4000_free_gameport(struct snd_card_als4000 *acard) |
1da177e4 LT |
786 | { |
787 | if (acard->gameport) { | |
788 | struct resource *r = gameport_get_port_data(acard->gameport); | |
789 | ||
790 | gameport_unregister_port(acard->gameport); | |
791 | acard->gameport = NULL; | |
792 | ||
c0874449 AM |
793 | /* disable joystick */ |
794 | snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0); | |
795 | ||
b1d5776d | 796 | release_and_free_resource(r); |
1da177e4 LT |
797 | } |
798 | } | |
799 | #else | |
17c39d9a TI |
800 | static inline int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev) { return -ENOSYS; } |
801 | static inline void snd_als4000_free_gameport(struct snd_card_als4000 *acard) { } | |
1da177e4 LT |
802 | #endif |
803 | ||
17c39d9a | 804 | static void snd_card_als4000_free( struct snd_card *card ) |
1da177e4 | 805 | { |
c0874449 | 806 | struct snd_card_als4000 *acard = card->private_data; |
1da177e4 LT |
807 | |
808 | /* make sure that interrupts are disabled */ | |
cb780cdd | 809 | snd_als4k_gcr_write_addr(acard->iobase, ALS4K_GCR8C_MISC_CTRL, 0); |
1da177e4 LT |
810 | /* free resources */ |
811 | snd_als4000_free_gameport(acard); | |
812 | pci_release_regions(acard->pci); | |
813 | pci_disable_device(acard->pci); | |
814 | } | |
815 | ||
e23e7a14 BP |
816 | static int snd_card_als4000_probe(struct pci_dev *pci, |
817 | const struct pci_device_id *pci_id) | |
1da177e4 LT |
818 | { |
819 | static int dev; | |
17c39d9a TI |
820 | struct snd_card *card; |
821 | struct snd_card_als4000 *acard; | |
c0874449 | 822 | unsigned long iobase; |
17c39d9a TI |
823 | struct snd_sb *chip; |
824 | struct snd_opl3 *opl3; | |
1da177e4 LT |
825 | unsigned short word; |
826 | int err; | |
827 | ||
828 | if (dev >= SNDRV_CARDS) | |
829 | return -ENODEV; | |
830 | if (!enable[dev]) { | |
831 | dev++; | |
832 | return -ENOENT; | |
833 | } | |
834 | ||
835 | /* enable PCI device */ | |
836 | if ((err = pci_enable_device(pci)) < 0) { | |
837 | return err; | |
838 | } | |
839 | /* check, if we can restrict PCI DMA transfers to 24 bits */ | |
412b979c QL |
840 | if (dma_set_mask(&pci->dev, DMA_BIT_MASK(24)) < 0 || |
841 | dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(24)) < 0) { | |
d85d878e | 842 | dev_err(&pci->dev, "architecture does not support 24bit PCI busmaster DMA\n"); |
1da177e4 LT |
843 | pci_disable_device(pci); |
844 | return -ENXIO; | |
845 | } | |
846 | ||
847 | if ((err = pci_request_regions(pci, "ALS4000")) < 0) { | |
848 | pci_disable_device(pci); | |
849 | return err; | |
850 | } | |
c0874449 | 851 | iobase = pci_resource_start(pci, 0); |
1da177e4 LT |
852 | |
853 | pci_read_config_word(pci, PCI_COMMAND, &word); | |
854 | pci_write_config_word(pci, PCI_COMMAND, word | PCI_COMMAND_IO); | |
855 | pci_set_master(pci); | |
856 | ||
60c5772b TI |
857 | err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, |
858 | sizeof(*acard) /* private_data: acard */, | |
859 | &card); | |
e58de7ba | 860 | if (err < 0) { |
1da177e4 LT |
861 | pci_release_regions(pci); |
862 | pci_disable_device(pci); | |
e58de7ba | 863 | return err; |
1da177e4 LT |
864 | } |
865 | ||
c0874449 | 866 | acard = card->private_data; |
1da177e4 | 867 | acard->pci = pci; |
c0874449 | 868 | acard->iobase = iobase; |
1da177e4 LT |
869 | card->private_free = snd_card_als4000_free; |
870 | ||
871 | /* disable all legacy ISA stuff */ | |
c0874449 | 872 | snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0); |
1da177e4 LT |
873 | |
874 | if ((err = snd_sbdsp_create(card, | |
c0874449 | 875 | iobase + ALS4K_IOB_10_ADLIB_ADDR0, |
1da177e4 | 876 | pci->irq, |
cb780cdd | 877 | /* internally registered as IRQF_SHARED in case of ALS4000 SB */ |
1da177e4 LT |
878 | snd_als4000_interrupt, |
879 | -1, | |
880 | -1, | |
881 | SB_HW_ALS4000, | |
882 | &chip)) < 0) { | |
ba7301c7 | 883 | goto out_err; |
1da177e4 | 884 | } |
70352914 | 885 | acard->chip = chip; |
1da177e4 LT |
886 | |
887 | chip->pci = pci; | |
c0874449 | 888 | chip->alt_port = iobase; |
1da177e4 LT |
889 | |
890 | snd_als4000_configure(chip); | |
891 | ||
892 | strcpy(card->driver, "ALS4000"); | |
893 | strcpy(card->shortname, "Avance Logic ALS4000"); | |
894 | sprintf(card->longname, "%s at 0x%lx, irq %i", | |
895 | card->shortname, chip->alt_port, chip->irq); | |
896 | ||
897 | if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_ALS4000, | |
c0874449 | 898 | iobase + ALS4K_IOB_30_MIDI_DATA, |
dba8b469 CL |
899 | MPU401_INFO_INTEGRATED | |
900 | MPU401_INFO_IRQ_HOOK, | |
901 | -1, &chip->rmidi)) < 0) { | |
d85d878e | 902 | dev_err(&pci->dev, "no MPU-401 device at 0x%lx?\n", |
c0874449 | 903 | iobase + ALS4K_IOB_30_MIDI_DATA); |
ba7301c7 | 904 | goto out_err; |
1da177e4 | 905 | } |
c0874449 | 906 | /* FIXME: ALS4000 has interesting MPU401 configuration features |
cb780cdd AM |
907 | * at ALS4K_CR1A_MPU401_UART_MODE_CONTROL |
908 | * (pass-thru / UART switching, fast MIDI clock, etc.), | |
909 | * however there doesn't seem to be an ALSA API for this... | |
910 | * SPECS_PAGE: 21 */ | |
1da177e4 LT |
911 | |
912 | if ((err = snd_als4000_pcm(chip, 0)) < 0) { | |
ba7301c7 | 913 | goto out_err; |
1da177e4 LT |
914 | } |
915 | if ((err = snd_sbmixer_new(chip)) < 0) { | |
ba7301c7 | 916 | goto out_err; |
1da177e4 LT |
917 | } |
918 | ||
c0874449 AM |
919 | if (snd_opl3_create(card, |
920 | iobase + ALS4K_IOB_10_ADLIB_ADDR0, | |
921 | iobase + ALS4K_IOB_12_ADLIB_ADDR2, | |
1da177e4 | 922 | OPL3_HW_AUTO, 1, &opl3) < 0) { |
d85d878e | 923 | dev_err(&pci->dev, "no OPL device at 0x%lx-0x%lx?\n", |
c0874449 AM |
924 | iobase + ALS4K_IOB_10_ADLIB_ADDR0, |
925 | iobase + ALS4K_IOB_12_ADLIB_ADDR2); | |
1da177e4 LT |
926 | } else { |
927 | if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { | |
ba7301c7 | 928 | goto out_err; |
1da177e4 LT |
929 | } |
930 | } | |
931 | ||
932 | snd_als4000_create_gameport(acard, dev); | |
933 | ||
934 | if ((err = snd_card_register(card)) < 0) { | |
ba7301c7 | 935 | goto out_err; |
1da177e4 LT |
936 | } |
937 | pci_set_drvdata(pci, card); | |
938 | dev++; | |
ba7301c7 AM |
939 | err = 0; |
940 | goto out; | |
941 | ||
942 | out_err: | |
943 | snd_card_free(card); | |
944 | ||
945 | out: | |
946 | return err; | |
1da177e4 LT |
947 | } |
948 | ||
e23e7a14 | 949 | static void snd_card_als4000_remove(struct pci_dev *pci) |
1da177e4 LT |
950 | { |
951 | snd_card_free(pci_get_drvdata(pci)); | |
1da177e4 LT |
952 | } |
953 | ||
c7561cd8 | 954 | #ifdef CONFIG_PM_SLEEP |
68cb2b55 | 955 | static int snd_als4000_suspend(struct device *dev) |
70352914 | 956 | { |
68cb2b55 | 957 | struct snd_card *card = dev_get_drvdata(dev); |
70352914 TI |
958 | struct snd_card_als4000 *acard = card->private_data; |
959 | struct snd_sb *chip = acard->chip; | |
960 | ||
961 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); | |
962 | ||
70352914 | 963 | snd_sbmixer_suspend(chip); |
70352914 TI |
964 | return 0; |
965 | } | |
966 | ||
68cb2b55 | 967 | static int snd_als4000_resume(struct device *dev) |
70352914 | 968 | { |
68cb2b55 | 969 | struct snd_card *card = dev_get_drvdata(dev); |
70352914 TI |
970 | struct snd_card_als4000 *acard = card->private_data; |
971 | struct snd_sb *chip = acard->chip; | |
972 | ||
70352914 TI |
973 | snd_als4000_configure(chip); |
974 | snd_sbdsp_reset(chip); | |
975 | snd_sbmixer_resume(chip); | |
976 | ||
977 | #ifdef SUPPORT_JOYSTICK | |
978 | if (acard->gameport) | |
c0874449 | 979 | snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1); |
70352914 TI |
980 | #endif |
981 | ||
982 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); | |
983 | return 0; | |
984 | } | |
70352914 | 985 | |
68cb2b55 TI |
986 | static SIMPLE_DEV_PM_OPS(snd_als4000_pm, snd_als4000_suspend, snd_als4000_resume); |
987 | #define SND_ALS4000_PM_OPS &snd_als4000_pm | |
988 | #else | |
989 | #define SND_ALS4000_PM_OPS NULL | |
c7561cd8 | 990 | #endif /* CONFIG_PM_SLEEP */ |
70352914 | 991 | |
e9f66d9b | 992 | static struct pci_driver als4000_driver = { |
3733e424 | 993 | .name = KBUILD_MODNAME, |
1da177e4 LT |
994 | .id_table = snd_als4000_ids, |
995 | .probe = snd_card_als4000_probe, | |
e23e7a14 | 996 | .remove = snd_card_als4000_remove, |
68cb2b55 TI |
997 | .driver = { |
998 | .pm = SND_ALS4000_PM_OPS, | |
999 | }, | |
1da177e4 LT |
1000 | }; |
1001 | ||
e9f66d9b | 1002 | module_pci_driver(als4000_driver); |