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1a59d1b8 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 LT |
2 | /* |
3 | * ALSA driver for ATI IXP 150/200/250 AC97 modem controllers | |
4 | * | |
5 | * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> | |
1da177e4 LT |
6 | */ |
7 | ||
6cbbfe1c | 8 | #include <linux/io.h> |
1da177e4 LT |
9 | #include <linux/delay.h> |
10 | #include <linux/interrupt.h> | |
11 | #include <linux/init.h> | |
12 | #include <linux/pci.h> | |
13 | #include <linux/slab.h> | |
65a77217 | 14 | #include <linux/module.h> |
62932df8 | 15 | #include <linux/mutex.h> |
1da177e4 LT |
16 | #include <sound/core.h> |
17 | #include <sound/pcm.h> | |
18 | #include <sound/pcm_params.h> | |
19 | #include <sound/info.h> | |
20 | #include <sound/ac97_codec.h> | |
21 | #include <sound/initval.h> | |
22 | ||
23 | MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>"); | |
24 | MODULE_DESCRIPTION("ATI IXP MC97 controller"); | |
25 | MODULE_LICENSE("GPL"); | |
26 | MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250}}"); | |
27 | ||
b7fe4622 CL |
28 | static int index = -2; /* Exclude the first card */ |
29 | static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ | |
30 | static int ac97_clock = 48000; | |
1da177e4 | 31 | |
b7fe4622 | 32 | module_param(index, int, 0444); |
1da177e4 | 33 | MODULE_PARM_DESC(index, "Index value for ATI IXP controller."); |
b7fe4622 | 34 | module_param(id, charp, 0444); |
1da177e4 | 35 | MODULE_PARM_DESC(id, "ID string for ATI IXP controller."); |
b7fe4622 | 36 | module_param(ac97_clock, int, 0444); |
1da177e4 LT |
37 | MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz)."); |
38 | ||
2b3e584b | 39 | /* just for backward compatibility */ |
a67ff6a5 | 40 | static bool enable; |
698444f3 | 41 | module_param(enable, bool, 0444); |
2b3e584b | 42 | |
1da177e4 LT |
43 | |
44 | /* | |
45 | */ | |
46 | ||
47 | #define ATI_REG_ISR 0x00 /* interrupt source */ | |
48 | #define ATI_REG_ISR_MODEM_IN_XRUN (1U<<0) | |
49 | #define ATI_REG_ISR_MODEM_IN_STATUS (1U<<1) | |
50 | #define ATI_REG_ISR_MODEM_OUT1_XRUN (1U<<2) | |
51 | #define ATI_REG_ISR_MODEM_OUT1_STATUS (1U<<3) | |
52 | #define ATI_REG_ISR_MODEM_OUT2_XRUN (1U<<4) | |
53 | #define ATI_REG_ISR_MODEM_OUT2_STATUS (1U<<5) | |
54 | #define ATI_REG_ISR_MODEM_OUT3_XRUN (1U<<6) | |
55 | #define ATI_REG_ISR_MODEM_OUT3_STATUS (1U<<7) | |
56 | #define ATI_REG_ISR_PHYS_INTR (1U<<8) | |
57 | #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9) | |
58 | #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10) | |
59 | #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11) | |
60 | #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12) | |
61 | #define ATI_REG_ISR_NEW_FRAME (1U<<13) | |
62 | #define ATI_REG_ISR_MODEM_GPIO_DATA (1U<<14) | |
63 | ||
64 | #define ATI_REG_IER 0x04 /* interrupt enable */ | |
65 | #define ATI_REG_IER_MODEM_IN_XRUN_EN (1U<<0) | |
66 | #define ATI_REG_IER_MODEM_STATUS_EN (1U<<1) | |
67 | #define ATI_REG_IER_MODEM_OUT1_XRUN_EN (1U<<2) | |
68 | #define ATI_REG_IER_MODEM_OUT2_XRUN_EN (1U<<4) | |
69 | #define ATI_REG_IER_MODEM_OUT3_XRUN_EN (1U<<6) | |
70 | #define ATI_REG_IER_PHYS_INTR_EN (1U<<8) | |
71 | #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9) | |
72 | #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10) | |
73 | #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11) | |
74 | #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12) | |
75 | #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */ | |
76 | #define ATI_REG_IER_MODEM_GPIO_DATA_EN (1U<<14) /* (WO) modem is running */ | |
77 | #define ATI_REG_IER_MODEM_SET_BUS_BUSY (1U<<15) | |
78 | ||
79 | #define ATI_REG_CMD 0x08 /* command */ | |
80 | #define ATI_REG_CMD_POWERDOWN (1U<<0) | |
81 | #define ATI_REG_CMD_MODEM_RECEIVE_EN (1U<<1) /* modem only */ | |
82 | #define ATI_REG_CMD_MODEM_SEND1_EN (1U<<2) /* modem only */ | |
83 | #define ATI_REG_CMD_MODEM_SEND2_EN (1U<<3) /* modem only */ | |
84 | #define ATI_REG_CMD_MODEM_SEND3_EN (1U<<4) /* modem only */ | |
85 | #define ATI_REG_CMD_MODEM_STATUS_MEM (1U<<5) /* modem only */ | |
86 | #define ATI_REG_CMD_MODEM_IN_DMA_EN (1U<<8) /* modem only */ | |
87 | #define ATI_REG_CMD_MODEM_OUT_DMA1_EN (1U<<9) /* modem only */ | |
88 | #define ATI_REG_CMD_MODEM_OUT_DMA2_EN (1U<<10) /* modem only */ | |
89 | #define ATI_REG_CMD_MODEM_OUT_DMA3_EN (1U<<11) /* modem only */ | |
90 | #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20) | |
91 | #define ATI_REG_CMD_MODEM_GPIO_THRU_DMA (1U<<22) /* modem only */ | |
92 | #define ATI_REG_CMD_LOOPBACK_EN (1U<<23) | |
93 | #define ATI_REG_CMD_PACKED_DIS (1U<<24) | |
94 | #define ATI_REG_CMD_BURST_EN (1U<<25) | |
95 | #define ATI_REG_CMD_PANIC_EN (1U<<26) | |
96 | #define ATI_REG_CMD_MODEM_PRESENT (1U<<27) | |
97 | #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28) | |
98 | #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29) | |
99 | #define ATI_REG_CMD_AC_SYNC (1U<<30) | |
100 | #define ATI_REG_CMD_AC_RESET (1U<<31) | |
101 | ||
102 | #define ATI_REG_PHYS_OUT_ADDR 0x0c | |
103 | #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0) | |
104 | #define ATI_REG_PHYS_OUT_RW (1U<<2) | |
105 | #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8) | |
106 | #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9 | |
107 | #define ATI_REG_PHYS_OUT_DATA_SHIFT 16 | |
108 | ||
109 | #define ATI_REG_PHYS_IN_ADDR 0x10 | |
110 | #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8) | |
111 | #define ATI_REG_PHYS_IN_ADDR_SHIFT 9 | |
112 | #define ATI_REG_PHYS_IN_DATA_SHIFT 16 | |
113 | ||
114 | #define ATI_REG_SLOTREQ 0x14 | |
115 | ||
116 | #define ATI_REG_COUNTER 0x18 | |
117 | #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */ | |
118 | #define ATI_REG_COUNTER_BITCLOCK (31U<<8) | |
119 | ||
120 | #define ATI_REG_IN_FIFO_THRESHOLD 0x1c | |
121 | ||
122 | #define ATI_REG_MODEM_IN_DMA_LINKPTR 0x20 | |
123 | #define ATI_REG_MODEM_IN_DMA_DT_START 0x24 /* RO */ | |
124 | #define ATI_REG_MODEM_IN_DMA_DT_NEXT 0x28 /* RO */ | |
125 | #define ATI_REG_MODEM_IN_DMA_DT_CUR 0x2c /* RO */ | |
126 | #define ATI_REG_MODEM_IN_DMA_DT_SIZE 0x30 | |
127 | #define ATI_REG_MODEM_OUT_FIFO 0x34 /* output threshold */ | |
128 | #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK (0xf<<16) | |
129 | #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT 16 | |
130 | #define ATI_REG_MODEM_OUT_DMA1_LINKPTR 0x38 | |
131 | #define ATI_REG_MODEM_OUT_DMA2_LINKPTR 0x3c | |
132 | #define ATI_REG_MODEM_OUT_DMA3_LINKPTR 0x40 | |
133 | #define ATI_REG_MODEM_OUT_DMA1_DT_START 0x44 | |
134 | #define ATI_REG_MODEM_OUT_DMA1_DT_NEXT 0x48 | |
135 | #define ATI_REG_MODEM_OUT_DMA1_DT_CUR 0x4c | |
136 | #define ATI_REG_MODEM_OUT_DMA2_DT_START 0x50 | |
137 | #define ATI_REG_MODEM_OUT_DMA2_DT_NEXT 0x54 | |
138 | #define ATI_REG_MODEM_OUT_DMA2_DT_CUR 0x58 | |
139 | #define ATI_REG_MODEM_OUT_DMA3_DT_START 0x5c | |
140 | #define ATI_REG_MODEM_OUT_DMA3_DT_NEXT 0x60 | |
141 | #define ATI_REG_MODEM_OUT_DMA3_DT_CUR 0x64 | |
142 | #define ATI_REG_MODEM_OUT_DMA12_DT_SIZE 0x68 | |
143 | #define ATI_REG_MODEM_OUT_DMA3_DT_SIZE 0x6c | |
144 | #define ATI_REG_MODEM_OUT_FIFO_USED 0x70 | |
145 | #define ATI_REG_MODEM_OUT_GPIO 0x74 | |
146 | #define ATI_REG_MODEM_OUT_GPIO_EN 1 | |
147 | #define ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT 5 | |
148 | #define ATI_REG_MODEM_IN_GPIO 0x78 | |
149 | ||
150 | #define ATI_REG_MODEM_MIRROR 0x7c | |
151 | #define ATI_REG_AUDIO_MIRROR 0x80 | |
152 | ||
153 | #define ATI_REG_MODEM_FIFO_FLUSH 0x88 | |
154 | #define ATI_REG_MODEM_FIFO_OUT1_FLUSH (1U<<0) | |
155 | #define ATI_REG_MODEM_FIFO_OUT2_FLUSH (1U<<1) | |
156 | #define ATI_REG_MODEM_FIFO_OUT3_FLUSH (1U<<2) | |
157 | #define ATI_REG_MODEM_FIFO_IN_FLUSH (1U<<3) | |
158 | ||
159 | /* LINKPTR */ | |
160 | #define ATI_REG_LINKPTR_EN (1U<<0) | |
161 | ||
162 | #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */ | |
163 | ||
164 | ||
74ee4ff1 | 165 | struct atiixp_modem; |
1da177e4 LT |
166 | |
167 | /* | |
168 | * DMA packate descriptor | |
169 | */ | |
170 | ||
74ee4ff1 | 171 | struct atiixp_dma_desc { |
7e49aadf | 172 | __le32 addr; /* DMA buffer address */ |
1da177e4 LT |
173 | u16 status; /* status bits */ |
174 | u16 size; /* size of the packet in dwords */ | |
7e49aadf | 175 | __le32 next; /* address of the next packet descriptor */ |
74ee4ff1 | 176 | }; |
1da177e4 LT |
177 | |
178 | /* | |
179 | * stream enum | |
180 | */ | |
181 | enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, NUM_ATI_DMAS }; /* DMAs */ | |
182 | enum { ATI_PCM_OUT, ATI_PCM_IN, NUM_ATI_PCMS }; /* AC97 pcm slots */ | |
183 | enum { ATI_PCMDEV_ANALOG, NUM_ATI_PCMDEVS }; /* pcm devices */ | |
184 | ||
185 | #define NUM_ATI_CODECS 3 | |
186 | ||
187 | ||
188 | /* | |
189 | * constants and callbacks for each DMA type | |
190 | */ | |
74ee4ff1 | 191 | struct atiixp_dma_ops { |
1da177e4 LT |
192 | int type; /* ATI_DMA_XXX */ |
193 | unsigned int llp_offset; /* LINKPTR offset */ | |
194 | unsigned int dt_cur; /* DT_CUR offset */ | |
74ee4ff1 TI |
195 | /* called from open callback */ |
196 | void (*enable_dma)(struct atiixp_modem *chip, int on); | |
197 | /* called from trigger (START/STOP) */ | |
198 | void (*enable_transfer)(struct atiixp_modem *chip, int on); | |
199 | /* called from trigger (STOP only) */ | |
200 | void (*flush_dma)(struct atiixp_modem *chip); | |
1da177e4 LT |
201 | }; |
202 | ||
203 | /* | |
204 | * DMA stream | |
205 | */ | |
74ee4ff1 TI |
206 | struct atiixp_dma { |
207 | const struct atiixp_dma_ops *ops; | |
1da177e4 | 208 | struct snd_dma_buffer desc_buf; |
74ee4ff1 | 209 | struct snd_pcm_substream *substream; /* assigned PCM substream */ |
1da177e4 LT |
210 | unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */ |
211 | unsigned int period_bytes, periods; | |
212 | int opened; | |
213 | int running; | |
214 | int pcm_open_flag; | |
215 | int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */ | |
216 | }; | |
217 | ||
218 | /* | |
219 | * ATI IXP chip | |
220 | */ | |
74ee4ff1 TI |
221 | struct atiixp_modem { |
222 | struct snd_card *card; | |
1da177e4 LT |
223 | struct pci_dev *pci; |
224 | ||
225 | struct resource *res; /* memory i/o */ | |
226 | unsigned long addr; | |
227 | void __iomem *remap_addr; | |
228 | int irq; | |
229 | ||
74ee4ff1 TI |
230 | struct snd_ac97_bus *ac97_bus; |
231 | struct snd_ac97 *ac97[NUM_ATI_CODECS]; | |
1da177e4 LT |
232 | |
233 | spinlock_t reg_lock; | |
234 | ||
74ee4ff1 | 235 | struct atiixp_dma dmas[NUM_ATI_DMAS]; |
1da177e4 | 236 | struct ac97_pcm *pcms[NUM_ATI_PCMS]; |
74ee4ff1 | 237 | struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS]; |
1da177e4 LT |
238 | |
239 | int max_channels; /* max. channels for PCM out */ | |
240 | ||
241 | unsigned int codec_not_ready_bits; /* for codec detection */ | |
242 | ||
243 | int spdif_over_aclink; /* passed from the module option */ | |
62932df8 | 244 | struct mutex open_mutex; /* playback open mutex */ |
1da177e4 LT |
245 | }; |
246 | ||
247 | ||
248 | /* | |
249 | */ | |
9baa3c34 | 250 | static const struct pci_device_id snd_atiixp_ids[] = { |
28d27aae JP |
251 | { PCI_VDEVICE(ATI, 0x434d), 0 }, /* SB200 */ |
252 | { PCI_VDEVICE(ATI, 0x4378), 0 }, /* SB400 */ | |
1da177e4 LT |
253 | { 0, } |
254 | }; | |
255 | ||
256 | MODULE_DEVICE_TABLE(pci, snd_atiixp_ids); | |
257 | ||
258 | ||
259 | /* | |
260 | * lowlevel functions | |
261 | */ | |
262 | ||
263 | /* | |
264 | * update the bits of the given register. | |
265 | * return 1 if the bits changed. | |
266 | */ | |
74ee4ff1 TI |
267 | static int snd_atiixp_update_bits(struct atiixp_modem *chip, unsigned int reg, |
268 | unsigned int mask, unsigned int value) | |
1da177e4 LT |
269 | { |
270 | void __iomem *addr = chip->remap_addr + reg; | |
271 | unsigned int data, old_data; | |
272 | old_data = data = readl(addr); | |
273 | data &= ~mask; | |
274 | data |= value; | |
275 | if (old_data == data) | |
276 | return 0; | |
277 | writel(data, addr); | |
278 | return 1; | |
279 | } | |
280 | ||
281 | /* | |
282 | * macros for easy use | |
283 | */ | |
284 | #define atiixp_write(chip,reg,value) \ | |
285 | writel(value, chip->remap_addr + ATI_REG_##reg) | |
286 | #define atiixp_read(chip,reg) \ | |
287 | readl(chip->remap_addr + ATI_REG_##reg) | |
288 | #define atiixp_update(chip,reg,mask,val) \ | |
289 | snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val) | |
290 | ||
1da177e4 LT |
291 | /* |
292 | * handling DMA packets | |
293 | * | |
294 | * we allocate a linear buffer for the DMA, and split it to each packet. | |
295 | * in a future version, a scatter-gather buffer should be implemented. | |
296 | */ | |
297 | ||
298 | #define ATI_DESC_LIST_SIZE \ | |
74ee4ff1 | 299 | PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc)) |
1da177e4 LT |
300 | |
301 | /* | |
302 | * build packets ring for the given buffer size. | |
303 | * | |
304 | * IXP handles the buffer descriptors, which are connected as a linked | |
305 | * list. although we can change the list dynamically, in this version, | |
306 | * a static RING of buffer descriptors is used. | |
307 | * | |
308 | * the ring is built in this function, and is set up to the hardware. | |
309 | */ | |
74ee4ff1 TI |
310 | static int atiixp_build_dma_packets(struct atiixp_modem *chip, |
311 | struct atiixp_dma *dma, | |
312 | struct snd_pcm_substream *substream, | |
313 | unsigned int periods, | |
314 | unsigned int period_bytes) | |
1da177e4 LT |
315 | { |
316 | unsigned int i; | |
317 | u32 addr, desc_addr; | |
318 | unsigned long flags; | |
319 | ||
320 | if (periods > ATI_MAX_DESCRIPTORS) | |
321 | return -ENOMEM; | |
322 | ||
323 | if (dma->desc_buf.area == NULL) { | |
324 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), | |
325 | ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0) | |
326 | return -ENOMEM; | |
327 | dma->period_bytes = dma->periods = 0; /* clear */ | |
328 | } | |
329 | ||
330 | if (dma->periods == periods && dma->period_bytes == period_bytes) | |
331 | return 0; | |
332 | ||
333 | /* reset DMA before changing the descriptor table */ | |
334 | spin_lock_irqsave(&chip->reg_lock, flags); | |
335 | writel(0, chip->remap_addr + dma->ops->llp_offset); | |
336 | dma->ops->enable_dma(chip, 0); | |
337 | dma->ops->enable_dma(chip, 1); | |
338 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
339 | ||
340 | /* fill the entries */ | |
341 | addr = (u32)substream->runtime->dma_addr; | |
342 | desc_addr = (u32)dma->desc_buf.addr; | |
343 | for (i = 0; i < periods; i++) { | |
74ee4ff1 TI |
344 | struct atiixp_dma_desc *desc; |
345 | desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i]; | |
1da177e4 LT |
346 | desc->addr = cpu_to_le32(addr); |
347 | desc->status = 0; | |
348 | desc->size = period_bytes >> 2; /* in dwords */ | |
74ee4ff1 | 349 | desc_addr += sizeof(struct atiixp_dma_desc); |
1da177e4 LT |
350 | if (i == periods - 1) |
351 | desc->next = cpu_to_le32((u32)dma->desc_buf.addr); | |
352 | else | |
353 | desc->next = cpu_to_le32(desc_addr); | |
354 | addr += period_bytes; | |
355 | } | |
356 | ||
357 | writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN, | |
358 | chip->remap_addr + dma->ops->llp_offset); | |
359 | ||
360 | dma->period_bytes = period_bytes; | |
361 | dma->periods = periods; | |
362 | ||
363 | return 0; | |
364 | } | |
365 | ||
366 | /* | |
367 | * remove the ring buffer and release it if assigned | |
368 | */ | |
74ee4ff1 TI |
369 | static void atiixp_clear_dma_packets(struct atiixp_modem *chip, |
370 | struct atiixp_dma *dma, | |
371 | struct snd_pcm_substream *substream) | |
1da177e4 LT |
372 | { |
373 | if (dma->desc_buf.area) { | |
374 | writel(0, chip->remap_addr + dma->ops->llp_offset); | |
375 | snd_dma_free_pages(&dma->desc_buf); | |
376 | dma->desc_buf.area = NULL; | |
377 | } | |
378 | } | |
379 | ||
380 | /* | |
381 | * AC97 interface | |
382 | */ | |
74ee4ff1 | 383 | static int snd_atiixp_acquire_codec(struct atiixp_modem *chip) |
1da177e4 LT |
384 | { |
385 | int timeout = 1000; | |
386 | ||
387 | while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) { | |
388 | if (! timeout--) { | |
ca6aafd8 | 389 | dev_warn(chip->card->dev, "codec acquire timeout\n"); |
1da177e4 LT |
390 | return -EBUSY; |
391 | } | |
392 | udelay(1); | |
393 | } | |
394 | return 0; | |
395 | } | |
396 | ||
74ee4ff1 TI |
397 | static unsigned short snd_atiixp_codec_read(struct atiixp_modem *chip, |
398 | unsigned short codec, | |
399 | unsigned short reg) | |
1da177e4 LT |
400 | { |
401 | unsigned int data; | |
402 | int timeout; | |
403 | ||
404 | if (snd_atiixp_acquire_codec(chip) < 0) | |
405 | return 0xffff; | |
406 | data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | | |
407 | ATI_REG_PHYS_OUT_ADDR_EN | | |
408 | ATI_REG_PHYS_OUT_RW | | |
409 | codec; | |
410 | atiixp_write(chip, PHYS_OUT_ADDR, data); | |
411 | if (snd_atiixp_acquire_codec(chip) < 0) | |
412 | return 0xffff; | |
413 | timeout = 1000; | |
414 | do { | |
415 | data = atiixp_read(chip, PHYS_IN_ADDR); | |
416 | if (data & ATI_REG_PHYS_IN_READ_FLAG) | |
417 | return data >> ATI_REG_PHYS_IN_DATA_SHIFT; | |
418 | udelay(1); | |
419 | } while (--timeout); | |
420 | /* time out may happen during reset */ | |
421 | if (reg < 0x7c) | |
ca6aafd8 | 422 | dev_warn(chip->card->dev, "codec read timeout (reg %x)\n", reg); |
1da177e4 LT |
423 | return 0xffff; |
424 | } | |
425 | ||
426 | ||
74ee4ff1 TI |
427 | static void snd_atiixp_codec_write(struct atiixp_modem *chip, |
428 | unsigned short codec, | |
429 | unsigned short reg, unsigned short val) | |
1da177e4 LT |
430 | { |
431 | unsigned int data; | |
432 | ||
433 | if (snd_atiixp_acquire_codec(chip) < 0) | |
434 | return; | |
435 | data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) | | |
436 | ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | | |
437 | ATI_REG_PHYS_OUT_ADDR_EN | codec; | |
438 | atiixp_write(chip, PHYS_OUT_ADDR, data); | |
439 | } | |
440 | ||
441 | ||
74ee4ff1 TI |
442 | static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97, |
443 | unsigned short reg) | |
1da177e4 | 444 | { |
74ee4ff1 | 445 | struct atiixp_modem *chip = ac97->private_data; |
1da177e4 LT |
446 | return snd_atiixp_codec_read(chip, ac97->num, reg); |
447 | ||
448 | } | |
449 | ||
74ee4ff1 TI |
450 | static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg, |
451 | unsigned short val) | |
1da177e4 | 452 | { |
74ee4ff1 | 453 | struct atiixp_modem *chip = ac97->private_data; |
83a5b72a SK |
454 | if (reg == AC97_GPIO_STATUS) { |
455 | atiixp_write(chip, MODEM_OUT_GPIO, | |
456 | (val << ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT) | ATI_REG_MODEM_OUT_GPIO_EN); | |
457 | return; | |
458 | } | |
1da177e4 LT |
459 | snd_atiixp_codec_write(chip, ac97->num, reg, val); |
460 | } | |
461 | ||
462 | /* | |
463 | * reset AC link | |
464 | */ | |
74ee4ff1 | 465 | static int snd_atiixp_aclink_reset(struct atiixp_modem *chip) |
1da177e4 LT |
466 | { |
467 | int timeout; | |
468 | ||
469 | /* reset powerdoewn */ | |
470 | if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0)) | |
471 | udelay(10); | |
472 | ||
473 | /* perform a software reset */ | |
474 | atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET); | |
475 | atiixp_read(chip, CMD); | |
476 | udelay(10); | |
477 | atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0); | |
478 | ||
479 | timeout = 10; | |
480 | while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) { | |
481 | /* do a hard reset */ | |
482 | atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, | |
483 | ATI_REG_CMD_AC_SYNC); | |
484 | atiixp_read(chip, CMD); | |
bfdcbace | 485 | msleep(1); |
1da177e4 | 486 | atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET); |
7e79443c | 487 | if (!--timeout) { |
ca6aafd8 | 488 | dev_err(chip->card->dev, "codec reset timeout\n"); |
1da177e4 LT |
489 | break; |
490 | } | |
491 | } | |
492 | ||
493 | /* deassert RESET and assert SYNC to make sure */ | |
494 | atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, | |
495 | ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET); | |
496 | ||
497 | return 0; | |
498 | } | |
499 | ||
c7561cd8 | 500 | #ifdef CONFIG_PM_SLEEP |
74ee4ff1 | 501 | static int snd_atiixp_aclink_down(struct atiixp_modem *chip) |
1da177e4 LT |
502 | { |
503 | // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */ | |
504 | // return -EBUSY; | |
505 | atiixp_update(chip, CMD, | |
506 | ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET, | |
507 | ATI_REG_CMD_POWERDOWN); | |
508 | return 0; | |
509 | } | |
510 | #endif | |
511 | ||
512 | /* | |
513 | * auto-detection of codecs | |
514 | * | |
515 | * the IXP chip can generate interrupts for the non-existing codecs. | |
516 | * NEW_FRAME interrupt is used to make sure that the interrupt is generated | |
517 | * even if all three codecs are connected. | |
518 | */ | |
519 | ||
520 | #define ALL_CODEC_NOT_READY \ | |
521 | (ATI_REG_ISR_CODEC0_NOT_READY |\ | |
522 | ATI_REG_ISR_CODEC1_NOT_READY |\ | |
523 | ATI_REG_ISR_CODEC2_NOT_READY) | |
524 | #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME) | |
525 | ||
74ee4ff1 | 526 | static int snd_atiixp_codec_detect(struct atiixp_modem *chip) |
1da177e4 LT |
527 | { |
528 | int timeout; | |
529 | ||
530 | chip->codec_not_ready_bits = 0; | |
531 | atiixp_write(chip, IER, CODEC_CHECK_BITS); | |
532 | /* wait for the interrupts */ | |
bfdcbace | 533 | timeout = 50; |
1da177e4 | 534 | while (timeout-- > 0) { |
bfdcbace | 535 | msleep(1); |
1da177e4 LT |
536 | if (chip->codec_not_ready_bits) |
537 | break; | |
538 | } | |
539 | atiixp_write(chip, IER, 0); /* disable irqs */ | |
540 | ||
541 | if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) { | |
ca6aafd8 | 542 | dev_err(chip->card->dev, "no codec detected!\n"); |
1da177e4 LT |
543 | return -ENXIO; |
544 | } | |
545 | return 0; | |
546 | } | |
547 | ||
548 | ||
549 | /* | |
550 | * enable DMA and irqs | |
551 | */ | |
74ee4ff1 | 552 | static int snd_atiixp_chip_start(struct atiixp_modem *chip) |
1da177e4 LT |
553 | { |
554 | unsigned int reg; | |
555 | ||
556 | /* set up spdif, enable burst mode */ | |
557 | reg = atiixp_read(chip, CMD); | |
558 | reg |= ATI_REG_CMD_BURST_EN; | |
559 | if(!(reg & ATI_REG_CMD_MODEM_PRESENT)) | |
560 | reg |= ATI_REG_CMD_MODEM_PRESENT; | |
561 | atiixp_write(chip, CMD, reg); | |
562 | ||
563 | /* clear all interrupt source */ | |
564 | atiixp_write(chip, ISR, 0xffffffff); | |
565 | /* enable irqs */ | |
566 | atiixp_write(chip, IER, | |
567 | ATI_REG_IER_MODEM_STATUS_EN | | |
568 | ATI_REG_IER_MODEM_IN_XRUN_EN | | |
569 | ATI_REG_IER_MODEM_OUT1_XRUN_EN); | |
570 | return 0; | |
571 | } | |
572 | ||
573 | ||
574 | /* | |
575 | * disable DMA and IRQs | |
576 | */ | |
74ee4ff1 | 577 | static int snd_atiixp_chip_stop(struct atiixp_modem *chip) |
1da177e4 LT |
578 | { |
579 | /* clear interrupt source */ | |
580 | atiixp_write(chip, ISR, atiixp_read(chip, ISR)); | |
581 | /* disable irqs */ | |
582 | atiixp_write(chip, IER, 0); | |
583 | return 0; | |
584 | } | |
585 | ||
586 | ||
587 | /* | |
588 | * PCM section | |
589 | */ | |
590 | ||
591 | /* | |
592 | * pointer callback simplly reads XXX_DMA_DT_CUR register as the current | |
593 | * position. when SG-buffer is implemented, the offset must be calculated | |
594 | * correctly... | |
595 | */ | |
74ee4ff1 | 596 | static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 597 | { |
74ee4ff1 TI |
598 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
599 | struct snd_pcm_runtime *runtime = substream->runtime; | |
600 | struct atiixp_dma *dma = runtime->private_data; | |
1da177e4 LT |
601 | unsigned int curptr; |
602 | int timeout = 1000; | |
603 | ||
604 | while (timeout--) { | |
605 | curptr = readl(chip->remap_addr + dma->ops->dt_cur); | |
606 | if (curptr < dma->buf_addr) | |
607 | continue; | |
608 | curptr -= dma->buf_addr; | |
609 | if (curptr >= dma->buf_bytes) | |
610 | continue; | |
611 | return bytes_to_frames(runtime, curptr); | |
612 | } | |
ca6aafd8 | 613 | dev_dbg(chip->card->dev, "invalid DMA pointer read 0x%x (buf=%x)\n", |
1da177e4 LT |
614 | readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr); |
615 | return 0; | |
616 | } | |
617 | ||
618 | /* | |
619 | * XRUN detected, and stop the PCM substream | |
620 | */ | |
74ee4ff1 TI |
621 | static void snd_atiixp_xrun_dma(struct atiixp_modem *chip, |
622 | struct atiixp_dma *dma) | |
1da177e4 LT |
623 | { |
624 | if (! dma->substream || ! dma->running) | |
625 | return; | |
ca6aafd8 | 626 | dev_dbg(chip->card->dev, "XRUN detected (DMA %d)\n", dma->ops->type); |
1fb8510c | 627 | snd_pcm_stop_xrun(dma->substream); |
1da177e4 LT |
628 | } |
629 | ||
630 | /* | |
631 | * the period ack. update the substream. | |
632 | */ | |
74ee4ff1 TI |
633 | static void snd_atiixp_update_dma(struct atiixp_modem *chip, |
634 | struct atiixp_dma *dma) | |
1da177e4 LT |
635 | { |
636 | if (! dma->substream || ! dma->running) | |
637 | return; | |
638 | snd_pcm_period_elapsed(dma->substream); | |
639 | } | |
640 | ||
641 | /* set BUS_BUSY interrupt bit if any DMA is running */ | |
642 | /* call with spinlock held */ | |
74ee4ff1 | 643 | static void snd_atiixp_check_bus_busy(struct atiixp_modem *chip) |
1da177e4 LT |
644 | { |
645 | unsigned int bus_busy; | |
646 | if (atiixp_read(chip, CMD) & (ATI_REG_CMD_MODEM_SEND1_EN | | |
647 | ATI_REG_CMD_MODEM_RECEIVE_EN)) | |
648 | bus_busy = ATI_REG_IER_MODEM_SET_BUS_BUSY; | |
649 | else | |
650 | bus_busy = 0; | |
651 | atiixp_update(chip, IER, ATI_REG_IER_MODEM_SET_BUS_BUSY, bus_busy); | |
652 | } | |
653 | ||
654 | /* common trigger callback | |
655 | * calling the lowlevel callbacks in it | |
656 | */ | |
74ee4ff1 | 657 | static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 658 | { |
74ee4ff1 TI |
659 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
660 | struct atiixp_dma *dma = substream->runtime->private_data; | |
83a5b72a | 661 | int err = 0; |
1da177e4 | 662 | |
da3cec35 TI |
663 | if (snd_BUG_ON(!dma->ops->enable_transfer || |
664 | !dma->ops->flush_dma)) | |
665 | return -EINVAL; | |
1da177e4 | 666 | |
1da177e4 | 667 | spin_lock(&chip->reg_lock); |
83a5b72a SK |
668 | switch(cmd) { |
669 | case SNDRV_PCM_TRIGGER_START: | |
1da177e4 LT |
670 | dma->ops->enable_transfer(chip, 1); |
671 | dma->running = 1; | |
83a5b72a SK |
672 | break; |
673 | case SNDRV_PCM_TRIGGER_STOP: | |
1da177e4 LT |
674 | dma->ops->enable_transfer(chip, 0); |
675 | dma->running = 0; | |
83a5b72a SK |
676 | break; |
677 | default: | |
678 | err = -EINVAL; | |
679 | break; | |
1da177e4 | 680 | } |
83a5b72a | 681 | if (! err) { |
1da177e4 LT |
682 | snd_atiixp_check_bus_busy(chip); |
683 | if (cmd == SNDRV_PCM_TRIGGER_STOP) { | |
684 | dma->ops->flush_dma(chip); | |
685 | snd_atiixp_check_bus_busy(chip); | |
686 | } | |
83a5b72a | 687 | } |
1da177e4 | 688 | spin_unlock(&chip->reg_lock); |
83a5b72a | 689 | return err; |
1da177e4 LT |
690 | } |
691 | ||
692 | ||
693 | /* | |
694 | * lowlevel callbacks for each DMA type | |
695 | * | |
696 | * every callback is supposed to be called in chip->reg_lock spinlock | |
697 | */ | |
698 | ||
699 | /* flush FIFO of analog OUT DMA */ | |
74ee4ff1 | 700 | static void atiixp_out_flush_dma(struct atiixp_modem *chip) |
1da177e4 LT |
701 | { |
702 | atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_OUT1_FLUSH); | |
703 | } | |
704 | ||
705 | /* enable/disable analog OUT DMA */ | |
74ee4ff1 | 706 | static void atiixp_out_enable_dma(struct atiixp_modem *chip, int on) |
1da177e4 LT |
707 | { |
708 | unsigned int data; | |
709 | data = atiixp_read(chip, CMD); | |
710 | if (on) { | |
711 | if (data & ATI_REG_CMD_MODEM_OUT_DMA1_EN) | |
712 | return; | |
713 | atiixp_out_flush_dma(chip); | |
714 | data |= ATI_REG_CMD_MODEM_OUT_DMA1_EN; | |
715 | } else | |
716 | data &= ~ATI_REG_CMD_MODEM_OUT_DMA1_EN; | |
717 | atiixp_write(chip, CMD, data); | |
718 | } | |
719 | ||
720 | /* start/stop transfer over OUT DMA */ | |
74ee4ff1 | 721 | static void atiixp_out_enable_transfer(struct atiixp_modem *chip, int on) |
1da177e4 LT |
722 | { |
723 | atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_SEND1_EN, | |
724 | on ? ATI_REG_CMD_MODEM_SEND1_EN : 0); | |
725 | } | |
726 | ||
727 | /* enable/disable analog IN DMA */ | |
74ee4ff1 | 728 | static void atiixp_in_enable_dma(struct atiixp_modem *chip, int on) |
1da177e4 LT |
729 | { |
730 | atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_IN_DMA_EN, | |
731 | on ? ATI_REG_CMD_MODEM_IN_DMA_EN : 0); | |
732 | } | |
733 | ||
734 | /* start/stop analog IN DMA */ | |
74ee4ff1 | 735 | static void atiixp_in_enable_transfer(struct atiixp_modem *chip, int on) |
1da177e4 LT |
736 | { |
737 | if (on) { | |
738 | unsigned int data = atiixp_read(chip, CMD); | |
739 | if (! (data & ATI_REG_CMD_MODEM_RECEIVE_EN)) { | |
740 | data |= ATI_REG_CMD_MODEM_RECEIVE_EN; | |
741 | atiixp_write(chip, CMD, data); | |
742 | } | |
743 | } else | |
744 | atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_RECEIVE_EN, 0); | |
745 | } | |
746 | ||
747 | /* flush FIFO of analog IN DMA */ | |
74ee4ff1 | 748 | static void atiixp_in_flush_dma(struct atiixp_modem *chip) |
1da177e4 LT |
749 | { |
750 | atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_IN_FLUSH); | |
751 | } | |
752 | ||
753 | /* set up slots and formats for analog OUT */ | |
74ee4ff1 | 754 | static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 755 | { |
74ee4ff1 | 756 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
757 | unsigned int data; |
758 | ||
759 | spin_lock_irq(&chip->reg_lock); | |
760 | /* set output threshold */ | |
761 | data = atiixp_read(chip, MODEM_OUT_FIFO); | |
762 | data &= ~ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK; | |
763 | data |= 0x04 << ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT; | |
764 | atiixp_write(chip, MODEM_OUT_FIFO, data); | |
765 | spin_unlock_irq(&chip->reg_lock); | |
766 | return 0; | |
767 | } | |
768 | ||
769 | /* set up slots and formats for analog IN */ | |
74ee4ff1 | 770 | static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 LT |
771 | { |
772 | return 0; | |
773 | } | |
774 | ||
775 | /* | |
776 | * hw_params - allocate the buffer and set up buffer descriptors | |
777 | */ | |
74ee4ff1 TI |
778 | static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream, |
779 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 780 | { |
74ee4ff1 TI |
781 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
782 | struct atiixp_dma *dma = substream->runtime->private_data; | |
1da177e4 LT |
783 | int err; |
784 | int i; | |
785 | ||
786 | err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); | |
787 | if (err < 0) | |
788 | return err; | |
789 | dma->buf_addr = substream->runtime->dma_addr; | |
790 | dma->buf_bytes = params_buffer_bytes(hw_params); | |
791 | ||
792 | err = atiixp_build_dma_packets(chip, dma, substream, | |
793 | params_periods(hw_params), | |
794 | params_period_bytes(hw_params)); | |
795 | if (err < 0) | |
796 | return err; | |
797 | ||
798 | /* set up modem rate */ | |
799 | for (i = 0; i < NUM_ATI_CODECS; i++) { | |
800 | if (! chip->ac97[i]) | |
801 | continue; | |
802 | snd_ac97_write(chip->ac97[i], AC97_LINE1_RATE, params_rate(hw_params)); | |
803 | snd_ac97_write(chip->ac97[i], AC97_LINE1_LEVEL, 0); | |
804 | } | |
805 | ||
806 | return err; | |
807 | } | |
808 | ||
74ee4ff1 | 809 | static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream) |
1da177e4 | 810 | { |
74ee4ff1 TI |
811 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
812 | struct atiixp_dma *dma = substream->runtime->private_data; | |
1da177e4 LT |
813 | |
814 | atiixp_clear_dma_packets(chip, dma, substream); | |
815 | snd_pcm_lib_free_pages(substream); | |
816 | return 0; | |
817 | } | |
818 | ||
819 | ||
820 | /* | |
821 | * pcm hardware definition, identical for all DMA types | |
822 | */ | |
dee49895 | 823 | static const struct snd_pcm_hardware snd_atiixp_pcm_hw = |
1da177e4 LT |
824 | { |
825 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
826 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
827 | SNDRV_PCM_INFO_MMAP_VALID), | |
828 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
74ee4ff1 TI |
829 | .rates = (SNDRV_PCM_RATE_8000 | |
830 | SNDRV_PCM_RATE_16000 | | |
831 | SNDRV_PCM_RATE_KNOT), | |
1da177e4 LT |
832 | .rate_min = 8000, |
833 | .rate_max = 16000, | |
834 | .channels_min = 2, | |
835 | .channels_max = 2, | |
836 | .buffer_bytes_max = 256 * 1024, | |
837 | .period_bytes_min = 32, | |
838 | .period_bytes_max = 128 * 1024, | |
839 | .periods_min = 2, | |
840 | .periods_max = ATI_MAX_DESCRIPTORS, | |
841 | }; | |
842 | ||
74ee4ff1 TI |
843 | static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream, |
844 | struct atiixp_dma *dma, int pcm_type) | |
1da177e4 | 845 | { |
74ee4ff1 TI |
846 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
847 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 | 848 | int err; |
c15ec07b TI |
849 | static const unsigned int rates[] = { 8000, 9600, 12000, 16000 }; |
850 | static const struct snd_pcm_hw_constraint_list hw_constraints_rates = { | |
1da177e4 LT |
851 | .count = ARRAY_SIZE(rates), |
852 | .list = rates, | |
853 | .mask = 0, | |
854 | }; | |
855 | ||
da3cec35 TI |
856 | if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma)) |
857 | return -EINVAL; | |
1da177e4 LT |
858 | |
859 | if (dma->opened) | |
860 | return -EBUSY; | |
861 | dma->substream = substream; | |
862 | runtime->hw = snd_atiixp_pcm_hw; | |
863 | dma->ac97_pcm_type = pcm_type; | |
74ee4ff1 TI |
864 | if ((err = snd_pcm_hw_constraint_list(runtime, 0, |
865 | SNDRV_PCM_HW_PARAM_RATE, | |
866 | &hw_constraints_rates)) < 0) | |
1da177e4 | 867 | return err; |
74ee4ff1 TI |
868 | if ((err = snd_pcm_hw_constraint_integer(runtime, |
869 | SNDRV_PCM_HW_PARAM_PERIODS)) < 0) | |
1da177e4 LT |
870 | return err; |
871 | runtime->private_data = dma; | |
872 | ||
873 | /* enable DMA bits */ | |
874 | spin_lock_irq(&chip->reg_lock); | |
875 | dma->ops->enable_dma(chip, 1); | |
876 | spin_unlock_irq(&chip->reg_lock); | |
877 | dma->opened = 1; | |
878 | ||
879 | return 0; | |
880 | } | |
881 | ||
74ee4ff1 TI |
882 | static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream, |
883 | struct atiixp_dma *dma) | |
1da177e4 | 884 | { |
74ee4ff1 | 885 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 | 886 | /* disable DMA bits */ |
da3cec35 TI |
887 | if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma)) |
888 | return -EINVAL; | |
1da177e4 LT |
889 | spin_lock_irq(&chip->reg_lock); |
890 | dma->ops->enable_dma(chip, 0); | |
891 | spin_unlock_irq(&chip->reg_lock); | |
892 | dma->substream = NULL; | |
893 | dma->opened = 0; | |
894 | return 0; | |
895 | } | |
896 | ||
897 | /* | |
898 | */ | |
74ee4ff1 | 899 | static int snd_atiixp_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 900 | { |
74ee4ff1 | 901 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
902 | int err; |
903 | ||
62932df8 | 904 | mutex_lock(&chip->open_mutex); |
1da177e4 | 905 | err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0); |
62932df8 | 906 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
907 | if (err < 0) |
908 | return err; | |
909 | return 0; | |
910 | } | |
911 | ||
74ee4ff1 | 912 | static int snd_atiixp_playback_close(struct snd_pcm_substream *substream) |
1da177e4 | 913 | { |
74ee4ff1 | 914 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 | 915 | int err; |
62932df8 | 916 | mutex_lock(&chip->open_mutex); |
1da177e4 | 917 | err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]); |
62932df8 | 918 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
919 | return err; |
920 | } | |
921 | ||
74ee4ff1 | 922 | static int snd_atiixp_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 923 | { |
74ee4ff1 | 924 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
925 | return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1); |
926 | } | |
927 | ||
74ee4ff1 | 928 | static int snd_atiixp_capture_close(struct snd_pcm_substream *substream) |
1da177e4 | 929 | { |
74ee4ff1 | 930 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
931 | return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]); |
932 | } | |
933 | ||
934 | ||
935 | /* AC97 playback */ | |
6769e988 | 936 | static const struct snd_pcm_ops snd_atiixp_playback_ops = { |
1da177e4 LT |
937 | .open = snd_atiixp_playback_open, |
938 | .close = snd_atiixp_playback_close, | |
939 | .ioctl = snd_pcm_lib_ioctl, | |
940 | .hw_params = snd_atiixp_pcm_hw_params, | |
941 | .hw_free = snd_atiixp_pcm_hw_free, | |
942 | .prepare = snd_atiixp_playback_prepare, | |
943 | .trigger = snd_atiixp_pcm_trigger, | |
944 | .pointer = snd_atiixp_pcm_pointer, | |
945 | }; | |
946 | ||
947 | /* AC97 capture */ | |
6769e988 | 948 | static const struct snd_pcm_ops snd_atiixp_capture_ops = { |
1da177e4 LT |
949 | .open = snd_atiixp_capture_open, |
950 | .close = snd_atiixp_capture_close, | |
951 | .ioctl = snd_pcm_lib_ioctl, | |
952 | .hw_params = snd_atiixp_pcm_hw_params, | |
953 | .hw_free = snd_atiixp_pcm_hw_free, | |
954 | .prepare = snd_atiixp_capture_prepare, | |
955 | .trigger = snd_atiixp_pcm_trigger, | |
956 | .pointer = snd_atiixp_pcm_pointer, | |
957 | }; | |
958 | ||
064e186f | 959 | static const struct atiixp_dma_ops snd_atiixp_playback_dma_ops = { |
1da177e4 LT |
960 | .type = ATI_DMA_PLAYBACK, |
961 | .llp_offset = ATI_REG_MODEM_OUT_DMA1_LINKPTR, | |
962 | .dt_cur = ATI_REG_MODEM_OUT_DMA1_DT_CUR, | |
963 | .enable_dma = atiixp_out_enable_dma, | |
964 | .enable_transfer = atiixp_out_enable_transfer, | |
965 | .flush_dma = atiixp_out_flush_dma, | |
966 | }; | |
967 | ||
064e186f | 968 | static const struct atiixp_dma_ops snd_atiixp_capture_dma_ops = { |
1da177e4 LT |
969 | .type = ATI_DMA_CAPTURE, |
970 | .llp_offset = ATI_REG_MODEM_IN_DMA_LINKPTR, | |
971 | .dt_cur = ATI_REG_MODEM_IN_DMA_DT_CUR, | |
972 | .enable_dma = atiixp_in_enable_dma, | |
973 | .enable_transfer = atiixp_in_enable_transfer, | |
974 | .flush_dma = atiixp_in_flush_dma, | |
975 | }; | |
976 | ||
e23e7a14 | 977 | static int snd_atiixp_pcm_new(struct atiixp_modem *chip) |
1da177e4 | 978 | { |
74ee4ff1 | 979 | struct snd_pcm *pcm; |
1da177e4 LT |
980 | int err; |
981 | ||
982 | /* initialize constants */ | |
983 | chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops; | |
984 | chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops; | |
985 | ||
986 | /* PCM #0: analog I/O */ | |
987 | err = snd_pcm_new(chip->card, "ATI IXP MC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm); | |
988 | if (err < 0) | |
989 | return err; | |
990 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops); | |
991 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops); | |
6632d198 | 992 | pcm->dev_class = SNDRV_PCM_CLASS_MODEM; |
1da177e4 LT |
993 | pcm->private_data = chip; |
994 | strcpy(pcm->name, "ATI IXP MC97"); | |
995 | chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm; | |
996 | ||
997 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
74ee4ff1 TI |
998 | snd_dma_pci_data(chip->pci), |
999 | 64*1024, 128*1024); | |
1da177e4 LT |
1000 | |
1001 | return 0; | |
1002 | } | |
1003 | ||
1004 | ||
1005 | ||
1006 | /* | |
1007 | * interrupt handler | |
1008 | */ | |
7d12e780 | 1009 | static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id) |
1da177e4 | 1010 | { |
74ee4ff1 | 1011 | struct atiixp_modem *chip = dev_id; |
1da177e4 LT |
1012 | unsigned int status; |
1013 | ||
1014 | status = atiixp_read(chip, ISR); | |
1015 | ||
1016 | if (! status) | |
1017 | return IRQ_NONE; | |
1018 | ||
1019 | /* process audio DMA */ | |
1020 | if (status & ATI_REG_ISR_MODEM_OUT1_XRUN) | |
1021 | snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); | |
1022 | else if (status & ATI_REG_ISR_MODEM_OUT1_STATUS) | |
1023 | snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); | |
1024 | if (status & ATI_REG_ISR_MODEM_IN_XRUN) | |
1025 | snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); | |
1026 | else if (status & ATI_REG_ISR_MODEM_IN_STATUS) | |
1027 | snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); | |
1028 | ||
1029 | /* for codec detection */ | |
1030 | if (status & CODEC_CHECK_BITS) { | |
1031 | unsigned int detected; | |
1032 | detected = status & CODEC_CHECK_BITS; | |
1033 | spin_lock(&chip->reg_lock); | |
1034 | chip->codec_not_ready_bits |= detected; | |
1035 | atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */ | |
1036 | spin_unlock(&chip->reg_lock); | |
1037 | } | |
1038 | ||
1039 | /* ack */ | |
1040 | atiixp_write(chip, ISR, status); | |
1041 | ||
1042 | return IRQ_HANDLED; | |
1043 | } | |
1044 | ||
1045 | ||
1046 | /* | |
1047 | * ac97 mixer section | |
1048 | */ | |
1049 | ||
e23e7a14 | 1050 | static int snd_atiixp_mixer_new(struct atiixp_modem *chip, int clock) |
1da177e4 | 1051 | { |
74ee4ff1 TI |
1052 | struct snd_ac97_bus *pbus; |
1053 | struct snd_ac97_template ac97; | |
1da177e4 LT |
1054 | int i, err; |
1055 | int codec_count; | |
74ee4ff1 | 1056 | static struct snd_ac97_bus_ops ops = { |
1da177e4 LT |
1057 | .write = snd_atiixp_ac97_write, |
1058 | .read = snd_atiixp_ac97_read, | |
1059 | }; | |
1060 | static unsigned int codec_skip[NUM_ATI_CODECS] = { | |
1061 | ATI_REG_ISR_CODEC0_NOT_READY, | |
1062 | ATI_REG_ISR_CODEC1_NOT_READY, | |
1063 | ATI_REG_ISR_CODEC2_NOT_READY, | |
1064 | }; | |
1065 | ||
1066 | if (snd_atiixp_codec_detect(chip) < 0) | |
1067 | return -ENXIO; | |
1068 | ||
1069 | if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0) | |
1070 | return err; | |
1071 | pbus->clock = clock; | |
1da177e4 LT |
1072 | chip->ac97_bus = pbus; |
1073 | ||
1074 | codec_count = 0; | |
1075 | for (i = 0; i < NUM_ATI_CODECS; i++) { | |
1076 | if (chip->codec_not_ready_bits & codec_skip[i]) | |
1077 | continue; | |
1078 | memset(&ac97, 0, sizeof(ac97)); | |
1079 | ac97.private_data = chip; | |
1080 | ac97.pci = chip->pci; | |
1081 | ac97.num = i; | |
f1a63a38 | 1082 | ac97.scaps = AC97_SCAP_SKIP_AUDIO | AC97_SCAP_POWER_SAVE; |
1da177e4 LT |
1083 | if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) { |
1084 | chip->ac97[i] = NULL; /* to be sure */ | |
ca6aafd8 TI |
1085 | dev_dbg(chip->card->dev, |
1086 | "codec %d not available for modem\n", i); | |
1da177e4 LT |
1087 | continue; |
1088 | } | |
1089 | codec_count++; | |
1090 | } | |
1091 | ||
1092 | if (! codec_count) { | |
ca6aafd8 | 1093 | dev_err(chip->card->dev, "no codec available\n"); |
1da177e4 LT |
1094 | return -ENODEV; |
1095 | } | |
1096 | ||
1097 | /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */ | |
1098 | ||
1099 | return 0; | |
1100 | } | |
1101 | ||
1102 | ||
c7561cd8 | 1103 | #ifdef CONFIG_PM_SLEEP |
1da177e4 LT |
1104 | /* |
1105 | * power management | |
1106 | */ | |
68cb2b55 | 1107 | static int snd_atiixp_suspend(struct device *dev) |
1da177e4 | 1108 | { |
68cb2b55 | 1109 | struct snd_card *card = dev_get_drvdata(dev); |
92304cc7 | 1110 | struct atiixp_modem *chip = card->private_data; |
1da177e4 LT |
1111 | int i; |
1112 | ||
92304cc7 | 1113 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); |
1da177e4 | 1114 | for (i = 0; i < NUM_ATI_CODECS; i++) |
92304cc7 | 1115 | snd_ac97_suspend(chip->ac97[i]); |
1da177e4 LT |
1116 | snd_atiixp_aclink_down(chip); |
1117 | snd_atiixp_chip_stop(chip); | |
1da177e4 LT |
1118 | return 0; |
1119 | } | |
1120 | ||
68cb2b55 | 1121 | static int snd_atiixp_resume(struct device *dev) |
1da177e4 | 1122 | { |
68cb2b55 | 1123 | struct snd_card *card = dev_get_drvdata(dev); |
92304cc7 | 1124 | struct atiixp_modem *chip = card->private_data; |
1da177e4 LT |
1125 | int i; |
1126 | ||
1da177e4 LT |
1127 | snd_atiixp_aclink_reset(chip); |
1128 | snd_atiixp_chip_start(chip); | |
1129 | ||
1130 | for (i = 0; i < NUM_ATI_CODECS; i++) | |
92304cc7 | 1131 | snd_ac97_resume(chip->ac97[i]); |
1da177e4 | 1132 | |
92304cc7 | 1133 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
1da177e4 LT |
1134 | return 0; |
1135 | } | |
1da177e4 | 1136 | |
68cb2b55 TI |
1137 | static SIMPLE_DEV_PM_OPS(snd_atiixp_pm, snd_atiixp_suspend, snd_atiixp_resume); |
1138 | #define SND_ATIIXP_PM_OPS &snd_atiixp_pm | |
1139 | #else | |
1140 | #define SND_ATIIXP_PM_OPS NULL | |
c7561cd8 | 1141 | #endif /* CONFIG_PM_SLEEP */ |
1da177e4 LT |
1142 | |
1143 | /* | |
1144 | * proc interface for register dump | |
1145 | */ | |
1146 | ||
74ee4ff1 TI |
1147 | static void snd_atiixp_proc_read(struct snd_info_entry *entry, |
1148 | struct snd_info_buffer *buffer) | |
1da177e4 | 1149 | { |
74ee4ff1 | 1150 | struct atiixp_modem *chip = entry->private_data; |
1da177e4 LT |
1151 | int i; |
1152 | ||
1153 | for (i = 0; i < 256; i += 4) | |
1154 | snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i)); | |
1155 | } | |
1156 | ||
e23e7a14 | 1157 | static void snd_atiixp_proc_init(struct atiixp_modem *chip) |
1da177e4 | 1158 | { |
47f2769b TI |
1159 | snd_card_ro_proc_new(chip->card, "atiixp-modem", chip, |
1160 | snd_atiixp_proc_read); | |
1da177e4 | 1161 | } |
1da177e4 LT |
1162 | |
1163 | ||
1164 | /* | |
1165 | * destructor | |
1166 | */ | |
1167 | ||
74ee4ff1 | 1168 | static int snd_atiixp_free(struct atiixp_modem *chip) |
1da177e4 LT |
1169 | { |
1170 | if (chip->irq < 0) | |
1171 | goto __hw_end; | |
1172 | snd_atiixp_chip_stop(chip); | |
f000fd80 | 1173 | |
1da177e4 LT |
1174 | __hw_end: |
1175 | if (chip->irq >= 0) | |
74ee4ff1 | 1176 | free_irq(chip->irq, chip); |
ff6defa6 | 1177 | iounmap(chip->remap_addr); |
1da177e4 LT |
1178 | pci_release_regions(chip->pci); |
1179 | pci_disable_device(chip->pci); | |
1180 | kfree(chip); | |
1181 | return 0; | |
1182 | } | |
1183 | ||
74ee4ff1 | 1184 | static int snd_atiixp_dev_free(struct snd_device *device) |
1da177e4 | 1185 | { |
74ee4ff1 | 1186 | struct atiixp_modem *chip = device->device_data; |
1da177e4 LT |
1187 | return snd_atiixp_free(chip); |
1188 | } | |
1189 | ||
1190 | /* | |
1191 | * constructor for chip instance | |
1192 | */ | |
e23e7a14 BP |
1193 | static int snd_atiixp_create(struct snd_card *card, |
1194 | struct pci_dev *pci, | |
1195 | struct atiixp_modem **r_chip) | |
1da177e4 | 1196 | { |
74ee4ff1 | 1197 | static struct snd_device_ops ops = { |
1da177e4 LT |
1198 | .dev_free = snd_atiixp_dev_free, |
1199 | }; | |
74ee4ff1 | 1200 | struct atiixp_modem *chip; |
1da177e4 LT |
1201 | int err; |
1202 | ||
1203 | if ((err = pci_enable_device(pci)) < 0) | |
1204 | return err; | |
1205 | ||
e560d8d8 | 1206 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 LT |
1207 | if (chip == NULL) { |
1208 | pci_disable_device(pci); | |
1209 | return -ENOMEM; | |
1210 | } | |
1211 | ||
1212 | spin_lock_init(&chip->reg_lock); | |
62932df8 | 1213 | mutex_init(&chip->open_mutex); |
1da177e4 LT |
1214 | chip->card = card; |
1215 | chip->pci = pci; | |
1216 | chip->irq = -1; | |
1217 | if ((err = pci_request_regions(pci, "ATI IXP MC97")) < 0) { | |
1218 | kfree(chip); | |
1219 | pci_disable_device(pci); | |
1220 | return err; | |
1221 | } | |
1222 | chip->addr = pci_resource_start(pci, 0); | |
2f5ad54e | 1223 | chip->remap_addr = pci_ioremap_bar(pci, 0); |
1da177e4 | 1224 | if (chip->remap_addr == NULL) { |
ca6aafd8 | 1225 | dev_err(card->dev, "AC'97 space ioremap problem\n"); |
1da177e4 LT |
1226 | snd_atiixp_free(chip); |
1227 | return -EIO; | |
1228 | } | |
1229 | ||
437a5a46 | 1230 | if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED, |
934c2b6d | 1231 | KBUILD_MODNAME, chip)) { |
ca6aafd8 | 1232 | dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); |
1da177e4 LT |
1233 | snd_atiixp_free(chip); |
1234 | return -EBUSY; | |
1235 | } | |
1236 | chip->irq = pci->irq; | |
1237 | pci_set_master(pci); | |
1238 | synchronize_irq(chip->irq); | |
1239 | ||
1240 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { | |
1241 | snd_atiixp_free(chip); | |
1242 | return err; | |
1243 | } | |
1244 | ||
1da177e4 LT |
1245 | *r_chip = chip; |
1246 | return 0; | |
1247 | } | |
1248 | ||
1249 | ||
e23e7a14 BP |
1250 | static int snd_atiixp_probe(struct pci_dev *pci, |
1251 | const struct pci_device_id *pci_id) | |
1da177e4 | 1252 | { |
74ee4ff1 TI |
1253 | struct snd_card *card; |
1254 | struct atiixp_modem *chip; | |
1da177e4 LT |
1255 | int err; |
1256 | ||
60c5772b | 1257 | err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card); |
e58de7ba TI |
1258 | if (err < 0) |
1259 | return err; | |
1da177e4 | 1260 | |
1da177e4 LT |
1261 | strcpy(card->driver, "ATIIXP-MODEM"); |
1262 | strcpy(card->shortname, "ATI IXP Modem"); | |
1263 | if ((err = snd_atiixp_create(card, pci, &chip)) < 0) | |
1264 | goto __error; | |
92304cc7 | 1265 | card->private_data = chip; |
1da177e4 LT |
1266 | |
1267 | if ((err = snd_atiixp_aclink_reset(chip)) < 0) | |
1268 | goto __error; | |
1269 | ||
b7fe4622 | 1270 | if ((err = snd_atiixp_mixer_new(chip, ac97_clock)) < 0) |
1da177e4 LT |
1271 | goto __error; |
1272 | ||
1273 | if ((err = snd_atiixp_pcm_new(chip)) < 0) | |
1274 | goto __error; | |
1275 | ||
1276 | snd_atiixp_proc_init(chip); | |
1277 | ||
1278 | snd_atiixp_chip_start(chip); | |
1279 | ||
1280 | sprintf(card->longname, "%s rev %x at 0x%lx, irq %i", | |
44c10138 | 1281 | card->shortname, pci->revision, chip->addr, chip->irq); |
1da177e4 | 1282 | |
1da177e4 LT |
1283 | if ((err = snd_card_register(card)) < 0) |
1284 | goto __error; | |
1285 | ||
1286 | pci_set_drvdata(pci, card); | |
1da177e4 LT |
1287 | return 0; |
1288 | ||
1289 | __error: | |
1290 | snd_card_free(card); | |
1291 | return err; | |
1292 | } | |
1293 | ||
e23e7a14 | 1294 | static void snd_atiixp_remove(struct pci_dev *pci) |
1da177e4 LT |
1295 | { |
1296 | snd_card_free(pci_get_drvdata(pci)); | |
1da177e4 LT |
1297 | } |
1298 | ||
e9f66d9b | 1299 | static struct pci_driver atiixp_modem_driver = { |
3733e424 | 1300 | .name = KBUILD_MODNAME, |
1da177e4 LT |
1301 | .id_table = snd_atiixp_ids, |
1302 | .probe = snd_atiixp_probe, | |
e23e7a14 | 1303 | .remove = snd_atiixp_remove, |
68cb2b55 TI |
1304 | .driver = { |
1305 | .pm = SND_ATIIXP_PM_OPS, | |
1306 | }, | |
1da177e4 LT |
1307 | }; |
1308 | ||
e9f66d9b | 1309 | module_pci_driver(atiixp_modem_driver); |