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1da177e4
LT
1/*
2 * ALSA driver for ATI IXP 150/200/250 AC97 modem controllers
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <sound/driver.h>
23#include <asm/io.h>
24#include <linux/delay.h>
25#include <linux/interrupt.h>
26#include <linux/init.h>
27#include <linux/pci.h>
28#include <linux/slab.h>
29#include <linux/moduleparam.h>
30#include <sound/core.h>
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/info.h>
34#include <sound/ac97_codec.h>
35#include <sound/initval.h>
36
37MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38MODULE_DESCRIPTION("ATI IXP MC97 controller");
39MODULE_LICENSE("GPL");
40MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250}}");
41
b7fe4622
CL
42static int index = -2; /* Exclude the first card */
43static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
44static int ac97_clock = 48000;
1da177e4 45
b7fe4622 46module_param(index, int, 0444);
1da177e4 47MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
b7fe4622 48module_param(id, charp, 0444);
1da177e4 49MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
b7fe4622 50module_param(ac97_clock, int, 0444);
1da177e4
LT
51MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
52
53
54/*
55 */
56
57#define ATI_REG_ISR 0x00 /* interrupt source */
58#define ATI_REG_ISR_MODEM_IN_XRUN (1U<<0)
59#define ATI_REG_ISR_MODEM_IN_STATUS (1U<<1)
60#define ATI_REG_ISR_MODEM_OUT1_XRUN (1U<<2)
61#define ATI_REG_ISR_MODEM_OUT1_STATUS (1U<<3)
62#define ATI_REG_ISR_MODEM_OUT2_XRUN (1U<<4)
63#define ATI_REG_ISR_MODEM_OUT2_STATUS (1U<<5)
64#define ATI_REG_ISR_MODEM_OUT3_XRUN (1U<<6)
65#define ATI_REG_ISR_MODEM_OUT3_STATUS (1U<<7)
66#define ATI_REG_ISR_PHYS_INTR (1U<<8)
67#define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
68#define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
69#define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
70#define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
71#define ATI_REG_ISR_NEW_FRAME (1U<<13)
72#define ATI_REG_ISR_MODEM_GPIO_DATA (1U<<14)
73
74#define ATI_REG_IER 0x04 /* interrupt enable */
75#define ATI_REG_IER_MODEM_IN_XRUN_EN (1U<<0)
76#define ATI_REG_IER_MODEM_STATUS_EN (1U<<1)
77#define ATI_REG_IER_MODEM_OUT1_XRUN_EN (1U<<2)
78#define ATI_REG_IER_MODEM_OUT2_XRUN_EN (1U<<4)
79#define ATI_REG_IER_MODEM_OUT3_XRUN_EN (1U<<6)
80#define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
81#define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
82#define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
83#define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
84#define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
85#define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
86#define ATI_REG_IER_MODEM_GPIO_DATA_EN (1U<<14) /* (WO) modem is running */
87#define ATI_REG_IER_MODEM_SET_BUS_BUSY (1U<<15)
88
89#define ATI_REG_CMD 0x08 /* command */
90#define ATI_REG_CMD_POWERDOWN (1U<<0)
91#define ATI_REG_CMD_MODEM_RECEIVE_EN (1U<<1) /* modem only */
92#define ATI_REG_CMD_MODEM_SEND1_EN (1U<<2) /* modem only */
93#define ATI_REG_CMD_MODEM_SEND2_EN (1U<<3) /* modem only */
94#define ATI_REG_CMD_MODEM_SEND3_EN (1U<<4) /* modem only */
95#define ATI_REG_CMD_MODEM_STATUS_MEM (1U<<5) /* modem only */
96#define ATI_REG_CMD_MODEM_IN_DMA_EN (1U<<8) /* modem only */
97#define ATI_REG_CMD_MODEM_OUT_DMA1_EN (1U<<9) /* modem only */
98#define ATI_REG_CMD_MODEM_OUT_DMA2_EN (1U<<10) /* modem only */
99#define ATI_REG_CMD_MODEM_OUT_DMA3_EN (1U<<11) /* modem only */
100#define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
101#define ATI_REG_CMD_MODEM_GPIO_THRU_DMA (1U<<22) /* modem only */
102#define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
103#define ATI_REG_CMD_PACKED_DIS (1U<<24)
104#define ATI_REG_CMD_BURST_EN (1U<<25)
105#define ATI_REG_CMD_PANIC_EN (1U<<26)
106#define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
107#define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
108#define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
109#define ATI_REG_CMD_AC_SYNC (1U<<30)
110#define ATI_REG_CMD_AC_RESET (1U<<31)
111
112#define ATI_REG_PHYS_OUT_ADDR 0x0c
113#define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
114#define ATI_REG_PHYS_OUT_RW (1U<<2)
115#define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
116#define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
117#define ATI_REG_PHYS_OUT_DATA_SHIFT 16
118
119#define ATI_REG_PHYS_IN_ADDR 0x10
120#define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
121#define ATI_REG_PHYS_IN_ADDR_SHIFT 9
122#define ATI_REG_PHYS_IN_DATA_SHIFT 16
123
124#define ATI_REG_SLOTREQ 0x14
125
126#define ATI_REG_COUNTER 0x18
127#define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
128#define ATI_REG_COUNTER_BITCLOCK (31U<<8)
129
130#define ATI_REG_IN_FIFO_THRESHOLD 0x1c
131
132#define ATI_REG_MODEM_IN_DMA_LINKPTR 0x20
133#define ATI_REG_MODEM_IN_DMA_DT_START 0x24 /* RO */
134#define ATI_REG_MODEM_IN_DMA_DT_NEXT 0x28 /* RO */
135#define ATI_REG_MODEM_IN_DMA_DT_CUR 0x2c /* RO */
136#define ATI_REG_MODEM_IN_DMA_DT_SIZE 0x30
137#define ATI_REG_MODEM_OUT_FIFO 0x34 /* output threshold */
138#define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK (0xf<<16)
139#define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT 16
140#define ATI_REG_MODEM_OUT_DMA1_LINKPTR 0x38
141#define ATI_REG_MODEM_OUT_DMA2_LINKPTR 0x3c
142#define ATI_REG_MODEM_OUT_DMA3_LINKPTR 0x40
143#define ATI_REG_MODEM_OUT_DMA1_DT_START 0x44
144#define ATI_REG_MODEM_OUT_DMA1_DT_NEXT 0x48
145#define ATI_REG_MODEM_OUT_DMA1_DT_CUR 0x4c
146#define ATI_REG_MODEM_OUT_DMA2_DT_START 0x50
147#define ATI_REG_MODEM_OUT_DMA2_DT_NEXT 0x54
148#define ATI_REG_MODEM_OUT_DMA2_DT_CUR 0x58
149#define ATI_REG_MODEM_OUT_DMA3_DT_START 0x5c
150#define ATI_REG_MODEM_OUT_DMA3_DT_NEXT 0x60
151#define ATI_REG_MODEM_OUT_DMA3_DT_CUR 0x64
152#define ATI_REG_MODEM_OUT_DMA12_DT_SIZE 0x68
153#define ATI_REG_MODEM_OUT_DMA3_DT_SIZE 0x6c
154#define ATI_REG_MODEM_OUT_FIFO_USED 0x70
155#define ATI_REG_MODEM_OUT_GPIO 0x74
156#define ATI_REG_MODEM_OUT_GPIO_EN 1
157#define ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT 5
158#define ATI_REG_MODEM_IN_GPIO 0x78
159
160#define ATI_REG_MODEM_MIRROR 0x7c
161#define ATI_REG_AUDIO_MIRROR 0x80
162
163#define ATI_REG_MODEM_FIFO_FLUSH 0x88
164#define ATI_REG_MODEM_FIFO_OUT1_FLUSH (1U<<0)
165#define ATI_REG_MODEM_FIFO_OUT2_FLUSH (1U<<1)
166#define ATI_REG_MODEM_FIFO_OUT3_FLUSH (1U<<2)
167#define ATI_REG_MODEM_FIFO_IN_FLUSH (1U<<3)
168
169/* LINKPTR */
170#define ATI_REG_LINKPTR_EN (1U<<0)
171
172#define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
173
174
175/*
176 */
177
178typedef struct snd_atiixp atiixp_t;
179typedef struct snd_atiixp_dma atiixp_dma_t;
180typedef struct snd_atiixp_dma_ops atiixp_dma_ops_t;
181
182
183/*
184 * DMA packate descriptor
185 */
186
187typedef struct atiixp_dma_desc {
188 u32 addr; /* DMA buffer address */
189 u16 status; /* status bits */
190 u16 size; /* size of the packet in dwords */
191 u32 next; /* address of the next packet descriptor */
192} atiixp_dma_desc_t;
193
194/*
195 * stream enum
196 */
197enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, NUM_ATI_DMAS }; /* DMAs */
198enum { ATI_PCM_OUT, ATI_PCM_IN, NUM_ATI_PCMS }; /* AC97 pcm slots */
199enum { ATI_PCMDEV_ANALOG, NUM_ATI_PCMDEVS }; /* pcm devices */
200
201#define NUM_ATI_CODECS 3
202
203
204/*
205 * constants and callbacks for each DMA type
206 */
207struct snd_atiixp_dma_ops {
208 int type; /* ATI_DMA_XXX */
209 unsigned int llp_offset; /* LINKPTR offset */
210 unsigned int dt_cur; /* DT_CUR offset */
211 void (*enable_dma)(atiixp_t *chip, int on); /* called from open callback */
212 void (*enable_transfer)(atiixp_t *chip, int on); /* called from trigger (START/STOP) */
213 void (*flush_dma)(atiixp_t *chip); /* called from trigger (STOP only) */
214};
215
216/*
217 * DMA stream
218 */
219struct snd_atiixp_dma {
220 const atiixp_dma_ops_t *ops;
221 struct snd_dma_buffer desc_buf;
222 snd_pcm_substream_t *substream; /* assigned PCM substream */
223 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
224 unsigned int period_bytes, periods;
225 int opened;
226 int running;
227 int pcm_open_flag;
228 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
229};
230
231/*
232 * ATI IXP chip
233 */
234struct snd_atiixp {
235 snd_card_t *card;
236 struct pci_dev *pci;
237
238 struct resource *res; /* memory i/o */
239 unsigned long addr;
240 void __iomem *remap_addr;
241 int irq;
242
243 ac97_bus_t *ac97_bus;
244 ac97_t *ac97[NUM_ATI_CODECS];
245
246 spinlock_t reg_lock;
247
248 atiixp_dma_t dmas[NUM_ATI_DMAS];
249 struct ac97_pcm *pcms[NUM_ATI_PCMS];
250 snd_pcm_t *pcmdevs[NUM_ATI_PCMDEVS];
251
252 int max_channels; /* max. channels for PCM out */
253
254 unsigned int codec_not_ready_bits; /* for codec detection */
255
256 int spdif_over_aclink; /* passed from the module option */
257 struct semaphore open_mutex; /* playback open mutex */
258};
259
260
261/*
262 */
263static struct pci_device_id snd_atiixp_ids[] = {
264 { 0x1002, 0x434d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
548e7823 265 { 0x1002, 0x4378, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB400 */
1da177e4
LT
266 { 0, }
267};
268
269MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
270
271
272/*
273 * lowlevel functions
274 */
275
276/*
277 * update the bits of the given register.
278 * return 1 if the bits changed.
279 */
280static int snd_atiixp_update_bits(atiixp_t *chip, unsigned int reg,
281 unsigned int mask, unsigned int value)
282{
283 void __iomem *addr = chip->remap_addr + reg;
284 unsigned int data, old_data;
285 old_data = data = readl(addr);
286 data &= ~mask;
287 data |= value;
288 if (old_data == data)
289 return 0;
290 writel(data, addr);
291 return 1;
292}
293
294/*
295 * macros for easy use
296 */
297#define atiixp_write(chip,reg,value) \
298 writel(value, chip->remap_addr + ATI_REG_##reg)
299#define atiixp_read(chip,reg) \
300 readl(chip->remap_addr + ATI_REG_##reg)
301#define atiixp_update(chip,reg,mask,val) \
302 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
303
304/* delay for one tick */
305#define do_delay() do { \
306 set_current_state(TASK_UNINTERRUPTIBLE); \
307 schedule_timeout(1); \
308} while (0)
309
310
311/*
312 * handling DMA packets
313 *
314 * we allocate a linear buffer for the DMA, and split it to each packet.
315 * in a future version, a scatter-gather buffer should be implemented.
316 */
317
318#define ATI_DESC_LIST_SIZE \
319 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(atiixp_dma_desc_t))
320
321/*
322 * build packets ring for the given buffer size.
323 *
324 * IXP handles the buffer descriptors, which are connected as a linked
325 * list. although we can change the list dynamically, in this version,
326 * a static RING of buffer descriptors is used.
327 *
328 * the ring is built in this function, and is set up to the hardware.
329 */
330static int atiixp_build_dma_packets(atiixp_t *chip, atiixp_dma_t *dma,
331 snd_pcm_substream_t *substream,
332 unsigned int periods,
333 unsigned int period_bytes)
334{
335 unsigned int i;
336 u32 addr, desc_addr;
337 unsigned long flags;
338
339 if (periods > ATI_MAX_DESCRIPTORS)
340 return -ENOMEM;
341
342 if (dma->desc_buf.area == NULL) {
343 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
344 ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
345 return -ENOMEM;
346 dma->period_bytes = dma->periods = 0; /* clear */
347 }
348
349 if (dma->periods == periods && dma->period_bytes == period_bytes)
350 return 0;
351
352 /* reset DMA before changing the descriptor table */
353 spin_lock_irqsave(&chip->reg_lock, flags);
354 writel(0, chip->remap_addr + dma->ops->llp_offset);
355 dma->ops->enable_dma(chip, 0);
356 dma->ops->enable_dma(chip, 1);
357 spin_unlock_irqrestore(&chip->reg_lock, flags);
358
359 /* fill the entries */
360 addr = (u32)substream->runtime->dma_addr;
361 desc_addr = (u32)dma->desc_buf.addr;
362 for (i = 0; i < periods; i++) {
363 atiixp_dma_desc_t *desc = &((atiixp_dma_desc_t *)dma->desc_buf.area)[i];
364 desc->addr = cpu_to_le32(addr);
365 desc->status = 0;
366 desc->size = period_bytes >> 2; /* in dwords */
367 desc_addr += sizeof(atiixp_dma_desc_t);
368 if (i == periods - 1)
369 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
370 else
371 desc->next = cpu_to_le32(desc_addr);
372 addr += period_bytes;
373 }
374
375 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
376 chip->remap_addr + dma->ops->llp_offset);
377
378 dma->period_bytes = period_bytes;
379 dma->periods = periods;
380
381 return 0;
382}
383
384/*
385 * remove the ring buffer and release it if assigned
386 */
387static void atiixp_clear_dma_packets(atiixp_t *chip, atiixp_dma_t *dma, snd_pcm_substream_t *substream)
388{
389 if (dma->desc_buf.area) {
390 writel(0, chip->remap_addr + dma->ops->llp_offset);
391 snd_dma_free_pages(&dma->desc_buf);
392 dma->desc_buf.area = NULL;
393 }
394}
395
396/*
397 * AC97 interface
398 */
399static int snd_atiixp_acquire_codec(atiixp_t *chip)
400{
401 int timeout = 1000;
402
403 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
404 if (! timeout--) {
98b4f592 405 snd_printk(KERN_WARNING "atiixp-modem: codec acquire timeout\n");
1da177e4
LT
406 return -EBUSY;
407 }
408 udelay(1);
409 }
410 return 0;
411}
412
413static unsigned short snd_atiixp_codec_read(atiixp_t *chip, unsigned short codec, unsigned short reg)
414{
415 unsigned int data;
416 int timeout;
417
418 if (snd_atiixp_acquire_codec(chip) < 0)
419 return 0xffff;
420 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
421 ATI_REG_PHYS_OUT_ADDR_EN |
422 ATI_REG_PHYS_OUT_RW |
423 codec;
424 atiixp_write(chip, PHYS_OUT_ADDR, data);
425 if (snd_atiixp_acquire_codec(chip) < 0)
426 return 0xffff;
427 timeout = 1000;
428 do {
429 data = atiixp_read(chip, PHYS_IN_ADDR);
430 if (data & ATI_REG_PHYS_IN_READ_FLAG)
431 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
432 udelay(1);
433 } while (--timeout);
434 /* time out may happen during reset */
435 if (reg < 0x7c)
98b4f592 436 snd_printk(KERN_WARNING "atiixp-modem: codec read timeout (reg %x)\n", reg);
1da177e4
LT
437 return 0xffff;
438}
439
440
441static void snd_atiixp_codec_write(atiixp_t *chip, unsigned short codec, unsigned short reg, unsigned short val)
442{
443 unsigned int data;
444
445 if (snd_atiixp_acquire_codec(chip) < 0)
446 return;
447 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
448 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
449 ATI_REG_PHYS_OUT_ADDR_EN | codec;
450 atiixp_write(chip, PHYS_OUT_ADDR, data);
451}
452
453
454static unsigned short snd_atiixp_ac97_read(ac97_t *ac97, unsigned short reg)
455{
456 atiixp_t *chip = ac97->private_data;
457 return snd_atiixp_codec_read(chip, ac97->num, reg);
458
459}
460
461static void snd_atiixp_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
462{
463 atiixp_t *chip = ac97->private_data;
83a5b72a
SK
464 if (reg == AC97_GPIO_STATUS) {
465 atiixp_write(chip, MODEM_OUT_GPIO,
466 (val << ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT) | ATI_REG_MODEM_OUT_GPIO_EN);
467 return;
468 }
1da177e4
LT
469 snd_atiixp_codec_write(chip, ac97->num, reg, val);
470}
471
472/*
473 * reset AC link
474 */
475static int snd_atiixp_aclink_reset(atiixp_t *chip)
476{
477 int timeout;
478
479 /* reset powerdoewn */
480 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
481 udelay(10);
482
483 /* perform a software reset */
484 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
485 atiixp_read(chip, CMD);
486 udelay(10);
487 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
488
489 timeout = 10;
490 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
491 /* do a hard reset */
492 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
493 ATI_REG_CMD_AC_SYNC);
494 atiixp_read(chip, CMD);
495 do_delay();
496 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
497 if (--timeout) {
98b4f592 498 snd_printk(KERN_ERR "atiixp-modem: codec reset timeout\n");
1da177e4
LT
499 break;
500 }
501 }
502
503 /* deassert RESET and assert SYNC to make sure */
504 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
505 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
506
507 return 0;
508}
509
510#ifdef CONFIG_PM
511static int snd_atiixp_aclink_down(atiixp_t *chip)
512{
513 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
514 // return -EBUSY;
515 atiixp_update(chip, CMD,
516 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
517 ATI_REG_CMD_POWERDOWN);
518 return 0;
519}
520#endif
521
522/*
523 * auto-detection of codecs
524 *
525 * the IXP chip can generate interrupts for the non-existing codecs.
526 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
527 * even if all three codecs are connected.
528 */
529
530#define ALL_CODEC_NOT_READY \
531 (ATI_REG_ISR_CODEC0_NOT_READY |\
532 ATI_REG_ISR_CODEC1_NOT_READY |\
533 ATI_REG_ISR_CODEC2_NOT_READY)
534#define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
535
536static int snd_atiixp_codec_detect(atiixp_t *chip)
537{
538 int timeout;
539
540 chip->codec_not_ready_bits = 0;
541 atiixp_write(chip, IER, CODEC_CHECK_BITS);
542 /* wait for the interrupts */
543 timeout = HZ / 10;
544 while (timeout-- > 0) {
545 do_delay();
546 if (chip->codec_not_ready_bits)
547 break;
548 }
549 atiixp_write(chip, IER, 0); /* disable irqs */
550
551 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
98b4f592 552 snd_printk(KERN_ERR "atiixp-modem: no codec detected!\n");
1da177e4
LT
553 return -ENXIO;
554 }
555 return 0;
556}
557
558
559/*
560 * enable DMA and irqs
561 */
562static int snd_atiixp_chip_start(atiixp_t *chip)
563{
564 unsigned int reg;
565
566 /* set up spdif, enable burst mode */
567 reg = atiixp_read(chip, CMD);
568 reg |= ATI_REG_CMD_BURST_EN;
569 if(!(reg & ATI_REG_CMD_MODEM_PRESENT))
570 reg |= ATI_REG_CMD_MODEM_PRESENT;
571 atiixp_write(chip, CMD, reg);
572
573 /* clear all interrupt source */
574 atiixp_write(chip, ISR, 0xffffffff);
575 /* enable irqs */
576 atiixp_write(chip, IER,
577 ATI_REG_IER_MODEM_STATUS_EN |
578 ATI_REG_IER_MODEM_IN_XRUN_EN |
579 ATI_REG_IER_MODEM_OUT1_XRUN_EN);
580 return 0;
581}
582
583
584/*
585 * disable DMA and IRQs
586 */
587static int snd_atiixp_chip_stop(atiixp_t *chip)
588{
589 /* clear interrupt source */
590 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
591 /* disable irqs */
592 atiixp_write(chip, IER, 0);
593 return 0;
594}
595
596
597/*
598 * PCM section
599 */
600
601/*
602 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
603 * position. when SG-buffer is implemented, the offset must be calculated
604 * correctly...
605 */
606static snd_pcm_uframes_t snd_atiixp_pcm_pointer(snd_pcm_substream_t *substream)
607{
608 atiixp_t *chip = snd_pcm_substream_chip(substream);
609 snd_pcm_runtime_t *runtime = substream->runtime;
610 atiixp_dma_t *dma = (atiixp_dma_t *)runtime->private_data;
611 unsigned int curptr;
612 int timeout = 1000;
613
614 while (timeout--) {
615 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
616 if (curptr < dma->buf_addr)
617 continue;
618 curptr -= dma->buf_addr;
619 if (curptr >= dma->buf_bytes)
620 continue;
621 return bytes_to_frames(runtime, curptr);
622 }
623 snd_printd("atiixp-modem: invalid DMA pointer read 0x%x (buf=%x)\n",
624 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
625 return 0;
626}
627
628/*
629 * XRUN detected, and stop the PCM substream
630 */
631static void snd_atiixp_xrun_dma(atiixp_t *chip, atiixp_dma_t *dma)
632{
633 if (! dma->substream || ! dma->running)
634 return;
98b4f592 635 snd_printdd("atiixp-modem: XRUN detected (DMA %d)\n", dma->ops->type);
1da177e4
LT
636 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
637}
638
639/*
640 * the period ack. update the substream.
641 */
642static void snd_atiixp_update_dma(atiixp_t *chip, atiixp_dma_t *dma)
643{
644 if (! dma->substream || ! dma->running)
645 return;
646 snd_pcm_period_elapsed(dma->substream);
647}
648
649/* set BUS_BUSY interrupt bit if any DMA is running */
650/* call with spinlock held */
651static void snd_atiixp_check_bus_busy(atiixp_t *chip)
652{
653 unsigned int bus_busy;
654 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_MODEM_SEND1_EN |
655 ATI_REG_CMD_MODEM_RECEIVE_EN))
656 bus_busy = ATI_REG_IER_MODEM_SET_BUS_BUSY;
657 else
658 bus_busy = 0;
659 atiixp_update(chip, IER, ATI_REG_IER_MODEM_SET_BUS_BUSY, bus_busy);
660}
661
662/* common trigger callback
663 * calling the lowlevel callbacks in it
664 */
665static int snd_atiixp_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
666{
667 atiixp_t *chip = snd_pcm_substream_chip(substream);
668 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
83a5b72a 669 int err = 0;
1da177e4
LT
670
671 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
672
1da177e4 673 spin_lock(&chip->reg_lock);
83a5b72a
SK
674 switch(cmd) {
675 case SNDRV_PCM_TRIGGER_START:
1da177e4
LT
676 dma->ops->enable_transfer(chip, 1);
677 dma->running = 1;
83a5b72a
SK
678 break;
679 case SNDRV_PCM_TRIGGER_STOP:
1da177e4
LT
680 dma->ops->enable_transfer(chip, 0);
681 dma->running = 0;
83a5b72a
SK
682 break;
683 default:
684 err = -EINVAL;
685 break;
1da177e4 686 }
83a5b72a 687 if (! err) {
1da177e4
LT
688 snd_atiixp_check_bus_busy(chip);
689 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
690 dma->ops->flush_dma(chip);
691 snd_atiixp_check_bus_busy(chip);
692 }
83a5b72a 693 }
1da177e4 694 spin_unlock(&chip->reg_lock);
83a5b72a 695 return err;
1da177e4
LT
696}
697
698
699/*
700 * lowlevel callbacks for each DMA type
701 *
702 * every callback is supposed to be called in chip->reg_lock spinlock
703 */
704
705/* flush FIFO of analog OUT DMA */
706static void atiixp_out_flush_dma(atiixp_t *chip)
707{
708 atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_OUT1_FLUSH);
709}
710
711/* enable/disable analog OUT DMA */
712static void atiixp_out_enable_dma(atiixp_t *chip, int on)
713{
714 unsigned int data;
715 data = atiixp_read(chip, CMD);
716 if (on) {
717 if (data & ATI_REG_CMD_MODEM_OUT_DMA1_EN)
718 return;
719 atiixp_out_flush_dma(chip);
720 data |= ATI_REG_CMD_MODEM_OUT_DMA1_EN;
721 } else
722 data &= ~ATI_REG_CMD_MODEM_OUT_DMA1_EN;
723 atiixp_write(chip, CMD, data);
724}
725
726/* start/stop transfer over OUT DMA */
727static void atiixp_out_enable_transfer(atiixp_t *chip, int on)
728{
729 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_SEND1_EN,
730 on ? ATI_REG_CMD_MODEM_SEND1_EN : 0);
731}
732
733/* enable/disable analog IN DMA */
734static void atiixp_in_enable_dma(atiixp_t *chip, int on)
735{
736 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_IN_DMA_EN,
737 on ? ATI_REG_CMD_MODEM_IN_DMA_EN : 0);
738}
739
740/* start/stop analog IN DMA */
741static void atiixp_in_enable_transfer(atiixp_t *chip, int on)
742{
743 if (on) {
744 unsigned int data = atiixp_read(chip, CMD);
745 if (! (data & ATI_REG_CMD_MODEM_RECEIVE_EN)) {
746 data |= ATI_REG_CMD_MODEM_RECEIVE_EN;
747 atiixp_write(chip, CMD, data);
748 }
749 } else
750 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_RECEIVE_EN, 0);
751}
752
753/* flush FIFO of analog IN DMA */
754static void atiixp_in_flush_dma(atiixp_t *chip)
755{
756 atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_IN_FLUSH);
757}
758
759/* set up slots and formats for analog OUT */
760static int snd_atiixp_playback_prepare(snd_pcm_substream_t *substream)
761{
762 atiixp_t *chip = snd_pcm_substream_chip(substream);
763 unsigned int data;
764
765 spin_lock_irq(&chip->reg_lock);
766 /* set output threshold */
767 data = atiixp_read(chip, MODEM_OUT_FIFO);
768 data &= ~ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK;
769 data |= 0x04 << ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT;
770 atiixp_write(chip, MODEM_OUT_FIFO, data);
771 spin_unlock_irq(&chip->reg_lock);
772 return 0;
773}
774
775/* set up slots and formats for analog IN */
776static int snd_atiixp_capture_prepare(snd_pcm_substream_t *substream)
777{
778 return 0;
779}
780
781/*
782 * hw_params - allocate the buffer and set up buffer descriptors
783 */
784static int snd_atiixp_pcm_hw_params(snd_pcm_substream_t *substream,
785 snd_pcm_hw_params_t *hw_params)
786{
787 atiixp_t *chip = snd_pcm_substream_chip(substream);
788 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
789 int err;
790 int i;
791
792 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
793 if (err < 0)
794 return err;
795 dma->buf_addr = substream->runtime->dma_addr;
796 dma->buf_bytes = params_buffer_bytes(hw_params);
797
798 err = atiixp_build_dma_packets(chip, dma, substream,
799 params_periods(hw_params),
800 params_period_bytes(hw_params));
801 if (err < 0)
802 return err;
803
804 /* set up modem rate */
805 for (i = 0; i < NUM_ATI_CODECS; i++) {
806 if (! chip->ac97[i])
807 continue;
808 snd_ac97_write(chip->ac97[i], AC97_LINE1_RATE, params_rate(hw_params));
809 snd_ac97_write(chip->ac97[i], AC97_LINE1_LEVEL, 0);
810 }
811
812 return err;
813}
814
815static int snd_atiixp_pcm_hw_free(snd_pcm_substream_t * substream)
816{
817 atiixp_t *chip = snd_pcm_substream_chip(substream);
818 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
819
820 atiixp_clear_dma_packets(chip, dma, substream);
821 snd_pcm_lib_free_pages(substream);
822 return 0;
823}
824
825
826/*
827 * pcm hardware definition, identical for all DMA types
828 */
829static snd_pcm_hardware_t snd_atiixp_pcm_hw =
830{
831 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
832 SNDRV_PCM_INFO_BLOCK_TRANSFER |
833 SNDRV_PCM_INFO_MMAP_VALID),
834 .formats = SNDRV_PCM_FMTBIT_S16_LE,
835 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_KNOT,
836 .rate_min = 8000,
837 .rate_max = 16000,
838 .channels_min = 2,
839 .channels_max = 2,
840 .buffer_bytes_max = 256 * 1024,
841 .period_bytes_min = 32,
842 .period_bytes_max = 128 * 1024,
843 .periods_min = 2,
844 .periods_max = ATI_MAX_DESCRIPTORS,
845};
846
847static int snd_atiixp_pcm_open(snd_pcm_substream_t *substream, atiixp_dma_t *dma, int pcm_type)
848{
849 atiixp_t *chip = snd_pcm_substream_chip(substream);
850 snd_pcm_runtime_t *runtime = substream->runtime;
851 int err;
852 static unsigned int rates[] = { 8000, 9600, 12000, 16000 };
853 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
854 .count = ARRAY_SIZE(rates),
855 .list = rates,
856 .mask = 0,
857 };
858
859 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
860
861 if (dma->opened)
862 return -EBUSY;
863 dma->substream = substream;
864 runtime->hw = snd_atiixp_pcm_hw;
865 dma->ac97_pcm_type = pcm_type;
866 if ((err = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates)) < 0)
867 return err;
868 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
869 return err;
870 runtime->private_data = dma;
871
872 /* enable DMA bits */
873 spin_lock_irq(&chip->reg_lock);
874 dma->ops->enable_dma(chip, 1);
875 spin_unlock_irq(&chip->reg_lock);
876 dma->opened = 1;
877
878 return 0;
879}
880
881static int snd_atiixp_pcm_close(snd_pcm_substream_t *substream, atiixp_dma_t *dma)
882{
883 atiixp_t *chip = snd_pcm_substream_chip(substream);
884 /* disable DMA bits */
885 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
886 spin_lock_irq(&chip->reg_lock);
887 dma->ops->enable_dma(chip, 0);
888 spin_unlock_irq(&chip->reg_lock);
889 dma->substream = NULL;
890 dma->opened = 0;
891 return 0;
892}
893
894/*
895 */
896static int snd_atiixp_playback_open(snd_pcm_substream_t *substream)
897{
898 atiixp_t *chip = snd_pcm_substream_chip(substream);
899 int err;
900
901 down(&chip->open_mutex);
902 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
903 up(&chip->open_mutex);
904 if (err < 0)
905 return err;
906 return 0;
907}
908
909static int snd_atiixp_playback_close(snd_pcm_substream_t *substream)
910{
911 atiixp_t *chip = snd_pcm_substream_chip(substream);
912 int err;
913 down(&chip->open_mutex);
914 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
915 up(&chip->open_mutex);
916 return err;
917}
918
919static int snd_atiixp_capture_open(snd_pcm_substream_t *substream)
920{
921 atiixp_t *chip = snd_pcm_substream_chip(substream);
922 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
923}
924
925static int snd_atiixp_capture_close(snd_pcm_substream_t *substream)
926{
927 atiixp_t *chip = snd_pcm_substream_chip(substream);
928 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
929}
930
931
932/* AC97 playback */
933static snd_pcm_ops_t snd_atiixp_playback_ops = {
934 .open = snd_atiixp_playback_open,
935 .close = snd_atiixp_playback_close,
936 .ioctl = snd_pcm_lib_ioctl,
937 .hw_params = snd_atiixp_pcm_hw_params,
938 .hw_free = snd_atiixp_pcm_hw_free,
939 .prepare = snd_atiixp_playback_prepare,
940 .trigger = snd_atiixp_pcm_trigger,
941 .pointer = snd_atiixp_pcm_pointer,
942};
943
944/* AC97 capture */
945static snd_pcm_ops_t snd_atiixp_capture_ops = {
946 .open = snd_atiixp_capture_open,
947 .close = snd_atiixp_capture_close,
948 .ioctl = snd_pcm_lib_ioctl,
949 .hw_params = snd_atiixp_pcm_hw_params,
950 .hw_free = snd_atiixp_pcm_hw_free,
951 .prepare = snd_atiixp_capture_prepare,
952 .trigger = snd_atiixp_pcm_trigger,
953 .pointer = snd_atiixp_pcm_pointer,
954};
955
956static atiixp_dma_ops_t snd_atiixp_playback_dma_ops = {
957 .type = ATI_DMA_PLAYBACK,
958 .llp_offset = ATI_REG_MODEM_OUT_DMA1_LINKPTR,
959 .dt_cur = ATI_REG_MODEM_OUT_DMA1_DT_CUR,
960 .enable_dma = atiixp_out_enable_dma,
961 .enable_transfer = atiixp_out_enable_transfer,
962 .flush_dma = atiixp_out_flush_dma,
963};
964
965static atiixp_dma_ops_t snd_atiixp_capture_dma_ops = {
966 .type = ATI_DMA_CAPTURE,
967 .llp_offset = ATI_REG_MODEM_IN_DMA_LINKPTR,
968 .dt_cur = ATI_REG_MODEM_IN_DMA_DT_CUR,
969 .enable_dma = atiixp_in_enable_dma,
970 .enable_transfer = atiixp_in_enable_transfer,
971 .flush_dma = atiixp_in_flush_dma,
972};
973
974static int __devinit snd_atiixp_pcm_new(atiixp_t *chip)
975{
976 snd_pcm_t *pcm;
977 int err;
978
979 /* initialize constants */
980 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
981 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
982
983 /* PCM #0: analog I/O */
984 err = snd_pcm_new(chip->card, "ATI IXP MC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
985 if (err < 0)
986 return err;
987 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
988 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
6632d198 989 pcm->dev_class = SNDRV_PCM_CLASS_MODEM;
1da177e4
LT
990 pcm->private_data = chip;
991 strcpy(pcm->name, "ATI IXP MC97");
992 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
993
994 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
995 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
996
997 return 0;
998}
999
1000
1001
1002/*
1003 * interrupt handler
1004 */
1005static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1006{
1007 atiixp_t *chip = dev_id;
1008 unsigned int status;
1009
1010 status = atiixp_read(chip, ISR);
1011
1012 if (! status)
1013 return IRQ_NONE;
1014
1015 /* process audio DMA */
1016 if (status & ATI_REG_ISR_MODEM_OUT1_XRUN)
1017 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1018 else if (status & ATI_REG_ISR_MODEM_OUT1_STATUS)
1019 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1020 if (status & ATI_REG_ISR_MODEM_IN_XRUN)
1021 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1022 else if (status & ATI_REG_ISR_MODEM_IN_STATUS)
1023 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1024
1025 /* for codec detection */
1026 if (status & CODEC_CHECK_BITS) {
1027 unsigned int detected;
1028 detected = status & CODEC_CHECK_BITS;
1029 spin_lock(&chip->reg_lock);
1030 chip->codec_not_ready_bits |= detected;
1031 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1032 spin_unlock(&chip->reg_lock);
1033 }
1034
1035 /* ack */
1036 atiixp_write(chip, ISR, status);
1037
1038 return IRQ_HANDLED;
1039}
1040
1041
1042/*
1043 * ac97 mixer section
1044 */
1045
1046static int __devinit snd_atiixp_mixer_new(atiixp_t *chip, int clock)
1047{
1048 ac97_bus_t *pbus;
1049 ac97_template_t ac97;
1050 int i, err;
1051 int codec_count;
1052 static ac97_bus_ops_t ops = {
1053 .write = snd_atiixp_ac97_write,
1054 .read = snd_atiixp_ac97_read,
1055 };
1056 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1057 ATI_REG_ISR_CODEC0_NOT_READY,
1058 ATI_REG_ISR_CODEC1_NOT_READY,
1059 ATI_REG_ISR_CODEC2_NOT_READY,
1060 };
1061
1062 if (snd_atiixp_codec_detect(chip) < 0)
1063 return -ENXIO;
1064
1065 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1066 return err;
1067 pbus->clock = clock;
1da177e4
LT
1068 chip->ac97_bus = pbus;
1069
1070 codec_count = 0;
1071 for (i = 0; i < NUM_ATI_CODECS; i++) {
1072 if (chip->codec_not_ready_bits & codec_skip[i])
1073 continue;
1074 memset(&ac97, 0, sizeof(ac97));
1075 ac97.private_data = chip;
1076 ac97.pci = chip->pci;
1077 ac97.num = i;
1078 ac97.scaps = AC97_SCAP_SKIP_AUDIO;
1079 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1080 chip->ac97[i] = NULL; /* to be sure */
98b4f592 1081 snd_printdd("atiixp-modem: codec %d not available for modem\n", i);
1da177e4
LT
1082 continue;
1083 }
1084 codec_count++;
1085 }
1086
1087 if (! codec_count) {
98b4f592 1088 snd_printk(KERN_ERR "atiixp-modem: no codec available\n");
1da177e4
LT
1089 return -ENODEV;
1090 }
1091
1092 /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */
1093
1094 return 0;
1095}
1096
1097
1098#ifdef CONFIG_PM
1099/*
1100 * power management
1101 */
1102static int snd_atiixp_suspend(snd_card_t *card, pm_message_t state)
1103{
1104 atiixp_t *chip = card->pm_private_data;
1105 int i;
1106
1107 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1108 if (chip->pcmdevs[i])
1109 snd_pcm_suspend_all(chip->pcmdevs[i]);
1110 for (i = 0; i < NUM_ATI_CODECS; i++)
1111 if (chip->ac97[i])
1112 snd_ac97_suspend(chip->ac97[i]);
1113 snd_atiixp_aclink_down(chip);
1114 snd_atiixp_chip_stop(chip);
1115
e2d53566 1116 pci_set_power_state(chip->pci, PCI_D3hot);
1da177e4
LT
1117 pci_disable_device(chip->pci);
1118 return 0;
1119}
1120
1121static int snd_atiixp_resume(snd_card_t *card)
1122{
1123 atiixp_t *chip = card->pm_private_data;
1124 int i;
1125
1126 pci_enable_device(chip->pci);
e2d53566 1127 pci_set_power_state(chip->pci, PCI_D0);
1da177e4
LT
1128 pci_set_master(chip->pci);
1129
1130 snd_atiixp_aclink_reset(chip);
1131 snd_atiixp_chip_start(chip);
1132
1133 for (i = 0; i < NUM_ATI_CODECS; i++)
1134 if (chip->ac97[i])
1135 snd_ac97_resume(chip->ac97[i]);
1136
1137 return 0;
1138}
1139#endif /* CONFIG_PM */
1140
1141
1142/*
1143 * proc interface for register dump
1144 */
1145
1146static void snd_atiixp_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1147{
1148 atiixp_t *chip = entry->private_data;
1149 int i;
1150
1151 for (i = 0; i < 256; i += 4)
1152 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1153}
1154
1155static void __devinit snd_atiixp_proc_init(atiixp_t *chip)
1156{
1157 snd_info_entry_t *entry;
1158
98b4f592 1159 if (! snd_card_proc_new(chip->card, "atiixp-modem", &entry))
1da177e4
LT
1160 snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read);
1161}
1162
1163
1164
1165/*
1166 * destructor
1167 */
1168
1169static int snd_atiixp_free(atiixp_t *chip)
1170{
1171 if (chip->irq < 0)
1172 goto __hw_end;
1173 snd_atiixp_chip_stop(chip);
1174 synchronize_irq(chip->irq);
1175 __hw_end:
1176 if (chip->irq >= 0)
1177 free_irq(chip->irq, (void *)chip);
1178 if (chip->remap_addr)
1179 iounmap(chip->remap_addr);
1180 pci_release_regions(chip->pci);
1181 pci_disable_device(chip->pci);
1182 kfree(chip);
1183 return 0;
1184}
1185
1186static int snd_atiixp_dev_free(snd_device_t *device)
1187{
1188 atiixp_t *chip = device->device_data;
1189 return snd_atiixp_free(chip);
1190}
1191
1192/*
1193 * constructor for chip instance
1194 */
1195static int __devinit snd_atiixp_create(snd_card_t *card,
1196 struct pci_dev *pci,
1197 atiixp_t **r_chip)
1198{
1199 static snd_device_ops_t ops = {
1200 .dev_free = snd_atiixp_dev_free,
1201 };
1202 atiixp_t *chip;
1203 int err;
1204
1205 if ((err = pci_enable_device(pci)) < 0)
1206 return err;
1207
e560d8d8 1208 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT
1209 if (chip == NULL) {
1210 pci_disable_device(pci);
1211 return -ENOMEM;
1212 }
1213
1214 spin_lock_init(&chip->reg_lock);
1215 init_MUTEX(&chip->open_mutex);
1216 chip->card = card;
1217 chip->pci = pci;
1218 chip->irq = -1;
1219 if ((err = pci_request_regions(pci, "ATI IXP MC97")) < 0) {
1220 kfree(chip);
1221 pci_disable_device(pci);
1222 return err;
1223 }
1224 chip->addr = pci_resource_start(pci, 0);
1225 chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0));
1226 if (chip->remap_addr == NULL) {
1227 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1228 snd_atiixp_free(chip);
1229 return -EIO;
1230 }
1231
1232 if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1233 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1234 snd_atiixp_free(chip);
1235 return -EBUSY;
1236 }
1237 chip->irq = pci->irq;
1238 pci_set_master(pci);
1239 synchronize_irq(chip->irq);
1240
1241 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1242 snd_atiixp_free(chip);
1243 return err;
1244 }
1245
1246 snd_card_set_dev(card, &pci->dev);
1247
1248 *r_chip = chip;
1249 return 0;
1250}
1251
1252
1253static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1254 const struct pci_device_id *pci_id)
1255{
1da177e4
LT
1256 snd_card_t *card;
1257 atiixp_t *chip;
1258 unsigned char revision;
1259 int err;
1260
b7fe4622 1261 card = snd_card_new(index, id, THIS_MODULE, 0);
1da177e4
LT
1262 if (card == NULL)
1263 return -ENOMEM;
1264
1265 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
1266
1267 strcpy(card->driver, "ATIIXP-MODEM");
1268 strcpy(card->shortname, "ATI IXP Modem");
1269 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1270 goto __error;
1271
1272 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1273 goto __error;
1274
b7fe4622 1275 if ((err = snd_atiixp_mixer_new(chip, ac97_clock)) < 0)
1da177e4
LT
1276 goto __error;
1277
1278 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1279 goto __error;
1280
1281 snd_atiixp_proc_init(chip);
1282
1283 snd_atiixp_chip_start(chip);
1284
1285 sprintf(card->longname, "%s rev %x at 0x%lx, irq %i",
1286 card->shortname, revision, chip->addr, chip->irq);
1287
1288 snd_card_set_pm_callback(card, snd_atiixp_suspend, snd_atiixp_resume, chip);
1289
1290 if ((err = snd_card_register(card)) < 0)
1291 goto __error;
1292
1293 pci_set_drvdata(pci, card);
1da177e4
LT
1294 return 0;
1295
1296 __error:
1297 snd_card_free(card);
1298 return err;
1299}
1300
1301static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1302{
1303 snd_card_free(pci_get_drvdata(pci));
1304 pci_set_drvdata(pci, NULL);
1305}
1306
1307static struct pci_driver driver = {
1308 .name = "ATI IXP MC97 controller",
3bcd4649 1309 .owner = THIS_MODULE,
1da177e4
LT
1310 .id_table = snd_atiixp_ids,
1311 .probe = snd_atiixp_probe,
1312 .remove = __devexit_p(snd_atiixp_remove),
1313 SND_PCI_PM_CALLBACKS
1314};
1315
1316
1317static int __init alsa_card_atiixp_init(void)
1318{
01d25d46 1319 return pci_register_driver(&driver);
1da177e4
LT
1320}
1321
1322static void __exit alsa_card_atiixp_exit(void)
1323{
1324 pci_unregister_driver(&driver);
1325}
1326
1327module_init(alsa_card_atiixp_init)
1328module_exit(alsa_card_atiixp_exit)