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Merge tag 'pci-v5.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
[mirror_ubuntu-hirsute-kernel.git] / sound / pci / bt87x.c
CommitLineData
d0fa1179 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT
2/*
3 * bt87x.c - Brooktree Bt878/Bt879 driver for ALSA
4 *
5 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
6 *
7 * based on btaudio.c by Gerd Knorr <kraxel@bytesex.org>
1da177e4
LT
8 */
9
1da177e4
LT
10#include <linux/init.h>
11#include <linux/interrupt.h>
12#include <linux/pci.h>
13#include <linux/slab.h>
65a77217 14#include <linux/module.h>
1da177e4 15#include <linux/bitops.h>
6cbbfe1c 16#include <linux/io.h>
1da177e4
LT
17#include <sound/core.h>
18#include <sound/pcm.h>
19#include <sound/pcm_params.h>
20#include <sound/control.h>
21#include <sound/initval.h>
22
23MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
24MODULE_DESCRIPTION("Brooktree Bt87x audio driver");
25MODULE_LICENSE("GPL");
26MODULE_SUPPORTED_DEVICE("{{Brooktree,Bt878},"
27 "{Brooktree,Bt879}}");
28
29static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */
30static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 31static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
6581f4e7 32static int digital_rate[SNDRV_CARDS]; /* digital input rate */
a67ff6a5 33static bool load_all; /* allow to load the non-whitelisted cards */
1da177e4
LT
34
35module_param_array(index, int, NULL, 0444);
36MODULE_PARM_DESC(index, "Index value for Bt87x soundcard");
37module_param_array(id, charp, NULL, 0444);
38MODULE_PARM_DESC(id, "ID string for Bt87x soundcard");
39module_param_array(enable, bool, NULL, 0444);
40MODULE_PARM_DESC(enable, "Enable Bt87x soundcard");
41module_param_array(digital_rate, int, NULL, 0444);
42MODULE_PARM_DESC(digital_rate, "Digital input rate for Bt87x soundcard");
43module_param(load_all, bool, 0444);
44MODULE_PARM_DESC(load_all, "Allow to load the non-whitelisted cards");
45
46
1da177e4
LT
47/* register offsets */
48#define REG_INT_STAT 0x100 /* interrupt status */
49#define REG_INT_MASK 0x104 /* interrupt mask */
50#define REG_GPIO_DMA_CTL 0x10c /* audio control */
51#define REG_PACKET_LEN 0x110 /* audio packet lengths */
52#define REG_RISC_STRT_ADD 0x114 /* RISC program start address */
53#define REG_RISC_COUNT 0x120 /* RISC program counter */
54
55/* interrupt bits */
56#define INT_OFLOW (1 << 3) /* audio A/D overflow */
57#define INT_RISCI (1 << 11) /* RISC instruction IRQ bit set */
58#define INT_FBUS (1 << 12) /* FIFO overrun due to bus access latency */
59#define INT_FTRGT (1 << 13) /* FIFO overrun due to target latency */
60#define INT_FDSR (1 << 14) /* FIFO data stream resynchronization */
61#define INT_PPERR (1 << 15) /* PCI parity error */
62#define INT_RIPERR (1 << 16) /* RISC instruction parity error */
63#define INT_PABORT (1 << 17) /* PCI master or target abort */
64#define INT_OCERR (1 << 18) /* invalid opcode */
65#define INT_SCERR (1 << 19) /* sync counter overflow */
66#define INT_RISC_EN (1 << 27) /* DMA controller running */
67#define INT_RISCS_SHIFT 28 /* RISC status bits */
68
69/* audio control bits */
70#define CTL_FIFO_ENABLE (1 << 0) /* enable audio data FIFO */
71#define CTL_RISC_ENABLE (1 << 1) /* enable audio DMA controller */
72#define CTL_PKTP_4 (0 << 2) /* packet mode FIFO trigger point - 4 DWORDs */
73#define CTL_PKTP_8 (1 << 2) /* 8 DWORDs */
74#define CTL_PKTP_16 (2 << 2) /* 16 DWORDs */
75#define CTL_ACAP_EN (1 << 4) /* enable audio capture */
76#define CTL_DA_APP (1 << 5) /* GPIO input */
77#define CTL_DA_IOM_AFE (0 << 6) /* audio A/D input */
78#define CTL_DA_IOM_DA (1 << 6) /* digital audio input */
79#define CTL_DA_SDR_SHIFT 8 /* DDF first stage decimation rate */
80#define CTL_DA_SDR_MASK (0xf<< 8)
81#define CTL_DA_LMT (1 << 12) /* limit audio data values */
82#define CTL_DA_ES2 (1 << 13) /* enable DDF stage 2 */
83#define CTL_DA_SBR (1 << 14) /* samples rounded to 8 bits */
84#define CTL_DA_DPM (1 << 15) /* data packet mode */
85#define CTL_DA_LRD_SHIFT 16 /* ALRCK delay */
86#define CTL_DA_MLB (1 << 21) /* MSB/LSB format */
87#define CTL_DA_LRI (1 << 22) /* left/right indication */
88#define CTL_DA_SCE (1 << 23) /* sample clock edge */
89#define CTL_A_SEL_STV (0 << 24) /* TV tuner audio input */
90#define CTL_A_SEL_SFM (1 << 24) /* FM audio input */
91#define CTL_A_SEL_SML (2 << 24) /* mic/line audio input */
92#define CTL_A_SEL_SMXC (3 << 24) /* MUX bypass */
93#define CTL_A_SEL_SHIFT 24
94#define CTL_A_SEL_MASK (3 << 24)
95#define CTL_A_PWRDN (1 << 26) /* analog audio power-down */
96#define CTL_A_G2X (1 << 27) /* audio gain boost */
97#define CTL_A_GAIN_SHIFT 28 /* audio input gain */
98#define CTL_A_GAIN_MASK (0xf<<28)
99
100/* RISC instruction opcodes */
101#define RISC_WRITE (0x1 << 28) /* write FIFO data to memory at address */
102#define RISC_WRITEC (0x5 << 28) /* write FIFO data to memory at current address */
103#define RISC_SKIP (0x2 << 28) /* skip FIFO data */
104#define RISC_JUMP (0x7 << 28) /* jump to address */
105#define RISC_SYNC (0x8 << 28) /* synchronize with FIFO */
106
107/* RISC instruction bits */
108#define RISC_BYTES_ENABLE (0xf << 12) /* byte enable bits */
109#define RISC_RESYNC ( 1 << 15) /* disable FDSR errors */
110#define RISC_SET_STATUS_SHIFT 16 /* set status bits */
111#define RISC_RESET_STATUS_SHIFT 20 /* clear status bits */
112#define RISC_IRQ ( 1 << 24) /* interrupt */
113#define RISC_EOL ( 1 << 26) /* end of line */
114#define RISC_SOL ( 1 << 27) /* start of line */
115
116/* SYNC status bits values */
117#define RISC_SYNC_FM1 0x6
118#define RISC_SYNC_VRO 0xc
119
120#define ANALOG_CLOCK 1792000
121#ifdef CONFIG_SND_BT87X_OVERCLOCK
122#define CLOCK_DIV_MIN 1
123#else
124#define CLOCK_DIV_MIN 4
125#endif
126#define CLOCK_DIV_MAX 15
127
128#define ERROR_INTERRUPTS (INT_FBUS | INT_FTRGT | INT_PPERR | \
129 INT_RIPERR | INT_PABORT | INT_OCERR)
130#define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS)
131
132/* SYNC, one WRITE per line, one extra WRITE per page boundary, SYNC, JUMP */
133#define MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8)
134
dcfb4140
TP
135/* Cards with configuration information */
136enum snd_bt87x_boardid {
c818e0a1 137 SND_BT87X_BOARD_UNKNOWN,
dcfb4140
TP
138 SND_BT87X_BOARD_GENERIC, /* both an & dig interfaces, 32kHz */
139 SND_BT87X_BOARD_ANALOG, /* board with no external A/D */
140 SND_BT87X_BOARD_OSPREY2x0,
141 SND_BT87X_BOARD_OSPREY440,
142 SND_BT87X_BOARD_AVPHONE98,
143};
144
145/* Card configuration */
146struct snd_bt87x_board {
147 int dig_rate; /* Digital input sampling rate */
148 u32 digital_fmt; /* Register settings for digital input */
149 unsigned no_analog:1; /* No analog input */
150 unsigned no_digital:1; /* No digital input */
151};
152
baa9df20 153static const struct snd_bt87x_board snd_bt87x_boards[] = {
c818e0a1
CL
154 [SND_BT87X_BOARD_UNKNOWN] = {
155 .dig_rate = 32000, /* just a guess */
156 },
dcfb4140
TP
157 [SND_BT87X_BOARD_GENERIC] = {
158 .dig_rate = 32000,
159 },
160 [SND_BT87X_BOARD_ANALOG] = {
161 .no_digital = 1,
162 },
163 [SND_BT87X_BOARD_OSPREY2x0] = {
164 .dig_rate = 44100,
165 .digital_fmt = CTL_DA_LRI | (1 << CTL_DA_LRD_SHIFT),
166 },
167 [SND_BT87X_BOARD_OSPREY440] = {
168 .dig_rate = 32000,
169 .digital_fmt = CTL_DA_LRI | (1 << CTL_DA_LRD_SHIFT),
170 .no_analog = 1,
171 },
172 [SND_BT87X_BOARD_AVPHONE98] = {
173 .dig_rate = 48000,
174 },
175};
176
1da177e4 177struct snd_bt87x {
9f362dce 178 struct snd_card *card;
1da177e4 179 struct pci_dev *pci;
dcfb4140 180 struct snd_bt87x_board board;
1da177e4
LT
181
182 void __iomem *mmio;
183 int irq;
184
1da177e4 185 spinlock_t reg_lock;
64b33619 186 unsigned long opened;
9f362dce 187 struct snd_pcm_substream *substream;
1da177e4
LT
188
189 struct snd_dma_buffer dma_risc;
190 unsigned int line_bytes;
191 unsigned int lines;
192
193 u32 reg_control;
194 u32 interrupt_mask;
195
196 int current_line;
197
198 int pci_parity_errors;
199};
200
201enum { DEVICE_DIGITAL, DEVICE_ANALOG };
202
9f362dce 203static inline u32 snd_bt87x_readl(struct snd_bt87x *chip, u32 reg)
1da177e4
LT
204{
205 return readl(chip->mmio + reg);
206}
207
9f362dce 208static inline void snd_bt87x_writel(struct snd_bt87x *chip, u32 reg, u32 value)
1da177e4
LT
209{
210 writel(value, chip->mmio + reg);
211}
212
9f362dce 213static int snd_bt87x_create_risc(struct snd_bt87x *chip, struct snd_pcm_substream *substream,
1da177e4
LT
214 unsigned int periods, unsigned int period_bytes)
215{
1da177e4 216 unsigned int i, offset;
58578d18 217 __le32 *risc;
1da177e4
LT
218
219 if (chip->dma_risc.area == NULL) {
6974f8ad 220 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
1da177e4
LT
221 PAGE_ALIGN(MAX_RISC_SIZE), &chip->dma_risc) < 0)
222 return -ENOMEM;
223 }
58578d18 224 risc = (__le32 *)chip->dma_risc.area;
1da177e4
LT
225 offset = 0;
226 *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_FM1);
227 *risc++ = cpu_to_le32(0);
228 for (i = 0; i < periods; ++i) {
229 u32 rest;
230
231 rest = period_bytes;
232 do {
233 u32 cmd, len;
77a23f26 234 unsigned int addr;
1da177e4
LT
235
236 len = PAGE_SIZE - (offset % PAGE_SIZE);
237 if (len > rest)
238 len = rest;
239 cmd = RISC_WRITE | len;
240 if (rest == period_bytes) {
241 u32 block = i * 16 / periods;
242 cmd |= RISC_SOL;
243 cmd |= block << RISC_SET_STATUS_SHIFT;
244 cmd |= (~block & 0xf) << RISC_RESET_STATUS_SHIFT;
245 }
246 if (len == rest)
247 cmd |= RISC_EOL | RISC_IRQ;
248 *risc++ = cpu_to_le32(cmd);
77a23f26
TI
249 addr = snd_pcm_sgbuf_get_addr(substream, offset);
250 *risc++ = cpu_to_le32(addr);
1da177e4
LT
251 offset += len;
252 rest -= len;
253 } while (rest > 0);
254 }
255 *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_VRO);
256 *risc++ = cpu_to_le32(0);
257 *risc++ = cpu_to_le32(RISC_JUMP);
258 *risc++ = cpu_to_le32(chip->dma_risc.addr);
259 chip->line_bytes = period_bytes;
260 chip->lines = periods;
261 return 0;
262}
263
9f362dce 264static void snd_bt87x_free_risc(struct snd_bt87x *chip)
1da177e4
LT
265{
266 if (chip->dma_risc.area) {
267 snd_dma_free_pages(&chip->dma_risc);
268 chip->dma_risc.area = NULL;
269 }
270}
271
9f362dce 272static void snd_bt87x_pci_error(struct snd_bt87x *chip, unsigned int status)
1da177e4
LT
273{
274 u16 pci_status;
275
276 pci_read_config_word(chip->pci, PCI_STATUS, &pci_status);
277 pci_status &= PCI_STATUS_PARITY | PCI_STATUS_SIG_TARGET_ABORT |
278 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_REC_MASTER_ABORT |
279 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_DETECTED_PARITY;
280 pci_write_config_word(chip->pci, PCI_STATUS, pci_status);
281 if (pci_status != PCI_STATUS_DETECTED_PARITY)
02c33520
TI
282 dev_err(chip->card->dev,
283 "Aieee - PCI error! status %#08x, PCI status %#04x\n",
1da177e4
LT
284 status & ERROR_INTERRUPTS, pci_status);
285 else {
02c33520
TI
286 dev_err(chip->card->dev,
287 "Aieee - PCI parity error detected!\n");
1da177e4
LT
288 /* error 'handling' similar to aic7xxx_pci.c: */
289 chip->pci_parity_errors++;
290 if (chip->pci_parity_errors > 20) {
02c33520
TI
291 dev_err(chip->card->dev,
292 "Too many PCI parity errors observed.\n");
293 dev_err(chip->card->dev,
294 "Some device on this bus is generating bad parity.\n");
295 dev_err(chip->card->dev,
296 "This is an error *observed by*, not *generated by*, this card.\n");
297 dev_err(chip->card->dev,
298 "PCI parity error checking has been disabled.\n");
1da177e4
LT
299 chip->interrupt_mask &= ~(INT_PPERR | INT_RIPERR);
300 snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
301 }
302 }
303}
304
7d12e780 305static irqreturn_t snd_bt87x_interrupt(int irq, void *dev_id)
1da177e4 306{
9f362dce 307 struct snd_bt87x *chip = dev_id;
1da177e4
LT
308 unsigned int status, irq_status;
309
310 status = snd_bt87x_readl(chip, REG_INT_STAT);
311 irq_status = status & chip->interrupt_mask;
312 if (!irq_status)
313 return IRQ_NONE;
314 snd_bt87x_writel(chip, REG_INT_STAT, irq_status);
315
316 if (irq_status & ERROR_INTERRUPTS) {
317 if (irq_status & (INT_FBUS | INT_FTRGT))
02c33520
TI
318 dev_warn(chip->card->dev,
319 "FIFO overrun, status %#08x\n", status);
1da177e4 320 if (irq_status & INT_OCERR)
02c33520
TI
321 dev_err(chip->card->dev,
322 "internal RISC error, status %#08x\n", status);
1da177e4
LT
323 if (irq_status & (INT_PPERR | INT_RIPERR | INT_PABORT))
324 snd_bt87x_pci_error(chip, irq_status);
325 }
326 if ((irq_status & INT_RISCI) && (chip->reg_control & CTL_ACAP_EN)) {
327 int current_block, irq_block;
328
329 /* assume that exactly one line has been recorded */
330 chip->current_line = (chip->current_line + 1) % chip->lines;
331 /* but check if some interrupts have been skipped */
332 current_block = chip->current_line * 16 / chip->lines;
333 irq_block = status >> INT_RISCS_SHIFT;
334 if (current_block != irq_block)
335 chip->current_line = (irq_block * chip->lines + 15) / 16;
336
337 snd_pcm_period_elapsed(chip->substream);
338 }
339 return IRQ_HANDLED;
340}
341
dee49895 342static const struct snd_pcm_hardware snd_bt87x_digital_hw = {
1da177e4
LT
343 .info = SNDRV_PCM_INFO_MMAP |
344 SNDRV_PCM_INFO_INTERLEAVED |
345 SNDRV_PCM_INFO_BLOCK_TRANSFER |
2008f137
TI
346 SNDRV_PCM_INFO_MMAP_VALID |
347 SNDRV_PCM_INFO_BATCH,
1da177e4
LT
348 .formats = SNDRV_PCM_FMTBIT_S16_LE,
349 .rates = 0, /* set at runtime */
350 .channels_min = 2,
351 .channels_max = 2,
352 .buffer_bytes_max = 255 * 4092,
353 .period_bytes_min = 32,
354 .period_bytes_max = 4092,
355 .periods_min = 2,
356 .periods_max = 255,
357};
358
dee49895 359static const struct snd_pcm_hardware snd_bt87x_analog_hw = {
1da177e4
LT
360 .info = SNDRV_PCM_INFO_MMAP |
361 SNDRV_PCM_INFO_INTERLEAVED |
362 SNDRV_PCM_INFO_BLOCK_TRANSFER |
2008f137
TI
363 SNDRV_PCM_INFO_MMAP_VALID |
364 SNDRV_PCM_INFO_BATCH,
1da177e4
LT
365 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
366 .rates = SNDRV_PCM_RATE_KNOT,
367 .rate_min = ANALOG_CLOCK / CLOCK_DIV_MAX,
368 .rate_max = ANALOG_CLOCK / CLOCK_DIV_MIN,
369 .channels_min = 1,
370 .channels_max = 1,
371 .buffer_bytes_max = 255 * 4092,
372 .period_bytes_min = 32,
373 .period_bytes_max = 4092,
374 .periods_min = 2,
375 .periods_max = 255,
376};
377
9f362dce 378static int snd_bt87x_set_digital_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime)
1da177e4 379{
950fb626 380 chip->reg_control |= CTL_DA_IOM_DA | CTL_A_PWRDN;
1da177e4 381 runtime->hw = snd_bt87x_digital_hw;
dcfb4140
TP
382 runtime->hw.rates = snd_pcm_rate_to_rate_bit(chip->board.dig_rate);
383 runtime->hw.rate_min = chip->board.dig_rate;
384 runtime->hw.rate_max = chip->board.dig_rate;
1da177e4
LT
385 return 0;
386}
387
9f362dce 388static int snd_bt87x_set_analog_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime)
1da177e4 389{
934cd5b7 390 static const struct snd_ratnum analog_clock = {
1da177e4
LT
391 .num = ANALOG_CLOCK,
392 .den_min = CLOCK_DIV_MIN,
393 .den_max = CLOCK_DIV_MAX,
394 .den_step = 1
395 };
934cd5b7 396 static const struct snd_pcm_hw_constraint_ratnums constraint_rates = {
1da177e4
LT
397 .nrats = 1,
398 .rats = &analog_clock
399 };
400
950fb626 401 chip->reg_control &= ~(CTL_DA_IOM_DA | CTL_A_PWRDN);
1da177e4
LT
402 runtime->hw = snd_bt87x_analog_hw;
403 return snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
404 &constraint_rates);
405}
406
9f362dce 407static int snd_bt87x_pcm_open(struct snd_pcm_substream *substream)
1da177e4 408{
9f362dce
TI
409 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
410 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
411 int err;
412
413 if (test_and_set_bit(0, &chip->opened))
414 return -EBUSY;
415
416 if (substream->pcm->device == DEVICE_DIGITAL)
417 err = snd_bt87x_set_digital_hw(chip, runtime);
418 else
419 err = snd_bt87x_set_analog_hw(chip, runtime);
420 if (err < 0)
421 goto _error;
422
423 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
424 if (err < 0)
425 goto _error;
426
427 chip->substream = substream;
428 return 0;
429
430_error:
431 clear_bit(0, &chip->opened);
4e857c58 432 smp_mb__after_atomic();
1da177e4
LT
433 return err;
434}
435
9f362dce 436static int snd_bt87x_close(struct snd_pcm_substream *substream)
1da177e4 437{
9f362dce 438 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
1da177e4 439
950fb626
TP
440 spin_lock_irq(&chip->reg_lock);
441 chip->reg_control |= CTL_A_PWRDN;
442 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
443 spin_unlock_irq(&chip->reg_lock);
444
1da177e4
LT
445 chip->substream = NULL;
446 clear_bit(0, &chip->opened);
4e857c58 447 smp_mb__after_atomic();
1da177e4
LT
448 return 0;
449}
450
9f362dce
TI
451static int snd_bt87x_hw_params(struct snd_pcm_substream *substream,
452 struct snd_pcm_hw_params *hw_params)
1da177e4 453{
9f362dce 454 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
1da177e4 455
1da177e4
LT
456 return snd_bt87x_create_risc(chip, substream,
457 params_periods(hw_params),
458 params_period_bytes(hw_params));
459}
460
9f362dce 461static int snd_bt87x_hw_free(struct snd_pcm_substream *substream)
1da177e4 462{
9f362dce 463 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
464
465 snd_bt87x_free_risc(chip);
1da177e4
LT
466 return 0;
467}
468
9f362dce 469static int snd_bt87x_prepare(struct snd_pcm_substream *substream)
1da177e4 470{
9f362dce
TI
471 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
472 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
473 int decimation;
474
475 spin_lock_irq(&chip->reg_lock);
476 chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR);
477 decimation = (ANALOG_CLOCK + runtime->rate / 4) / runtime->rate;
478 chip->reg_control |= decimation << CTL_DA_SDR_SHIFT;
479 if (runtime->format == SNDRV_PCM_FORMAT_S8)
480 chip->reg_control |= CTL_DA_SBR;
481 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
482 spin_unlock_irq(&chip->reg_lock);
483 return 0;
484}
485
9f362dce 486static int snd_bt87x_start(struct snd_bt87x *chip)
1da177e4
LT
487{
488 spin_lock(&chip->reg_lock);
489 chip->current_line = 0;
490 chip->reg_control |= CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN;
491 snd_bt87x_writel(chip, REG_RISC_STRT_ADD, chip->dma_risc.addr);
492 snd_bt87x_writel(chip, REG_PACKET_LEN,
493 chip->line_bytes | (chip->lines << 16));
494 snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
495 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
496 spin_unlock(&chip->reg_lock);
497 return 0;
498}
499
9f362dce 500static int snd_bt87x_stop(struct snd_bt87x *chip)
1da177e4
LT
501{
502 spin_lock(&chip->reg_lock);
503 chip->reg_control &= ~(CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN);
504 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
505 snd_bt87x_writel(chip, REG_INT_MASK, 0);
506 snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
507 spin_unlock(&chip->reg_lock);
508 return 0;
509}
510
9f362dce 511static int snd_bt87x_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 512{
9f362dce 513 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
514
515 switch (cmd) {
516 case SNDRV_PCM_TRIGGER_START:
517 return snd_bt87x_start(chip);
518 case SNDRV_PCM_TRIGGER_STOP:
519 return snd_bt87x_stop(chip);
520 default:
521 return -EINVAL;
522 }
523}
524
9f362dce 525static snd_pcm_uframes_t snd_bt87x_pointer(struct snd_pcm_substream *substream)
1da177e4 526{
9f362dce
TI
527 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
528 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
529
530 return (snd_pcm_uframes_t)bytes_to_frames(runtime, chip->current_line * chip->line_bytes);
531}
532
8c91d7d0 533static const struct snd_pcm_ops snd_bt87x_pcm_ops = {
1da177e4
LT
534 .open = snd_bt87x_pcm_open,
535 .close = snd_bt87x_close,
1da177e4
LT
536 .hw_params = snd_bt87x_hw_params,
537 .hw_free = snd_bt87x_hw_free,
538 .prepare = snd_bt87x_prepare,
539 .trigger = snd_bt87x_trigger,
540 .pointer = snd_bt87x_pointer,
1da177e4
LT
541};
542
9f362dce
TI
543static int snd_bt87x_capture_volume_info(struct snd_kcontrol *kcontrol,
544 struct snd_ctl_elem_info *info)
1da177e4
LT
545{
546 info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
547 info->count = 1;
548 info->value.integer.min = 0;
549 info->value.integer.max = 15;
550 return 0;
551}
552
9f362dce
TI
553static int snd_bt87x_capture_volume_get(struct snd_kcontrol *kcontrol,
554 struct snd_ctl_elem_value *value)
1da177e4 555{
9f362dce 556 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
557
558 value->value.integer.value[0] = (chip->reg_control & CTL_A_GAIN_MASK) >> CTL_A_GAIN_SHIFT;
559 return 0;
560}
561
9f362dce
TI
562static int snd_bt87x_capture_volume_put(struct snd_kcontrol *kcontrol,
563 struct snd_ctl_elem_value *value)
1da177e4 564{
9f362dce 565 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
566 u32 old_control;
567 int changed;
568
569 spin_lock_irq(&chip->reg_lock);
570 old_control = chip->reg_control;
571 chip->reg_control = (chip->reg_control & ~CTL_A_GAIN_MASK)
572 | (value->value.integer.value[0] << CTL_A_GAIN_SHIFT);
573 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
574 changed = old_control != chip->reg_control;
575 spin_unlock_irq(&chip->reg_lock);
576 return changed;
577}
578
f3b827e0 579static const struct snd_kcontrol_new snd_bt87x_capture_volume = {
1da177e4
LT
580 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
581 .name = "Capture Volume",
582 .info = snd_bt87x_capture_volume_info,
583 .get = snd_bt87x_capture_volume_get,
584 .put = snd_bt87x_capture_volume_put,
585};
586
a5ce8890 587#define snd_bt87x_capture_boost_info snd_ctl_boolean_mono_info
1da177e4 588
9f362dce
TI
589static int snd_bt87x_capture_boost_get(struct snd_kcontrol *kcontrol,
590 struct snd_ctl_elem_value *value)
1da177e4 591{
9f362dce 592 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
593
594 value->value.integer.value[0] = !! (chip->reg_control & CTL_A_G2X);
595 return 0;
596}
597
9f362dce
TI
598static int snd_bt87x_capture_boost_put(struct snd_kcontrol *kcontrol,
599 struct snd_ctl_elem_value *value)
1da177e4 600{
9f362dce 601 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
602 u32 old_control;
603 int changed;
604
605 spin_lock_irq(&chip->reg_lock);
606 old_control = chip->reg_control;
607 chip->reg_control = (chip->reg_control & ~CTL_A_G2X)
608 | (value->value.integer.value[0] ? CTL_A_G2X : 0);
609 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
610 changed = chip->reg_control != old_control;
611 spin_unlock_irq(&chip->reg_lock);
612 return changed;
613}
614
f3b827e0 615static const struct snd_kcontrol_new snd_bt87x_capture_boost = {
1da177e4
LT
616 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
617 .name = "Capture Boost",
618 .info = snd_bt87x_capture_boost_info,
619 .get = snd_bt87x_capture_boost_get,
620 .put = snd_bt87x_capture_boost_put,
621};
622
9f362dce
TI
623static int snd_bt87x_capture_source_info(struct snd_kcontrol *kcontrol,
624 struct snd_ctl_elem_info *info)
1da177e4 625{
dd1224aa 626 static const char *const texts[3] = {"TV Tuner", "FM", "Mic/Line"};
1da177e4 627
dd1224aa 628 return snd_ctl_enum_info(info, 1, 3, texts);
1da177e4
LT
629}
630
9f362dce
TI
631static int snd_bt87x_capture_source_get(struct snd_kcontrol *kcontrol,
632 struct snd_ctl_elem_value *value)
1da177e4 633{
9f362dce 634 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
635
636 value->value.enumerated.item[0] = (chip->reg_control & CTL_A_SEL_MASK) >> CTL_A_SEL_SHIFT;
637 return 0;
638}
639
9f362dce
TI
640static int snd_bt87x_capture_source_put(struct snd_kcontrol *kcontrol,
641 struct snd_ctl_elem_value *value)
1da177e4 642{
9f362dce 643 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
644 u32 old_control;
645 int changed;
646
647 spin_lock_irq(&chip->reg_lock);
648 old_control = chip->reg_control;
649 chip->reg_control = (chip->reg_control & ~CTL_A_SEL_MASK)
650 | (value->value.enumerated.item[0] << CTL_A_SEL_SHIFT);
651 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
652 changed = chip->reg_control != old_control;
653 spin_unlock_irq(&chip->reg_lock);
654 return changed;
655}
656
f3b827e0 657static const struct snd_kcontrol_new snd_bt87x_capture_source = {
1da177e4
LT
658 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
659 .name = "Capture Source",
660 .info = snd_bt87x_capture_source_info,
661 .get = snd_bt87x_capture_source_get,
662 .put = snd_bt87x_capture_source_put,
663};
664
9f362dce 665static int snd_bt87x_free(struct snd_bt87x *chip)
1da177e4 666{
2f93d797 667 if (chip->mmio)
1da177e4 668 snd_bt87x_stop(chip);
1da177e4
LT
669 if (chip->irq >= 0)
670 free_irq(chip->irq, chip);
ff6defa6 671 iounmap(chip->mmio);
1da177e4
LT
672 pci_release_regions(chip->pci);
673 pci_disable_device(chip->pci);
674 kfree(chip);
675 return 0;
676}
677
9f362dce 678static int snd_bt87x_dev_free(struct snd_device *device)
1da177e4 679{
9f362dce 680 struct snd_bt87x *chip = device->device_data;
1da177e4
LT
681 return snd_bt87x_free(chip);
682}
683
3dd06763 684static int snd_bt87x_pcm(struct snd_bt87x *chip, int device, char *name)
1da177e4
LT
685{
686 int err;
9f362dce 687 struct snd_pcm *pcm;
1da177e4
LT
688
689 err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm);
690 if (err < 0)
691 return err;
692 pcm->private_data = chip;
693 strcpy(pcm->name, name);
694 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_bt87x_pcm_ops);
b87ddad2
TI
695 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
696 &chip->pci->dev,
697 128 * 1024,
698 ALIGN(255 * 4092, 1024));
5116b94a 699 return 0;
1da177e4
LT
700}
701
3dd06763
BP
702static int snd_bt87x_create(struct snd_card *card,
703 struct pci_dev *pci,
704 struct snd_bt87x **rchip)
1da177e4 705{
9f362dce 706 struct snd_bt87x *chip;
1da177e4 707 int err;
efb0ad25 708 static const struct snd_device_ops ops = {
1da177e4
LT
709 .dev_free = snd_bt87x_dev_free
710 };
711
712 *rchip = NULL;
713
714 err = pci_enable_device(pci);
715 if (err < 0)
716 return err;
717
e560d8d8 718 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT
719 if (!chip) {
720 pci_disable_device(pci);
721 return -ENOMEM;
722 }
723 chip->card = card;
724 chip->pci = pci;
725 chip->irq = -1;
726 spin_lock_init(&chip->reg_lock);
727
728 if ((err = pci_request_regions(pci, "Bt87x audio")) < 0) {
729 kfree(chip);
730 pci_disable_device(pci);
731 return err;
732 }
2f5ad54e 733 chip->mmio = pci_ioremap_bar(pci, 0);
1da177e4 734 if (!chip->mmio) {
02c33520 735 dev_err(card->dev, "cannot remap io memory\n");
dcfb4140
TP
736 err = -ENOMEM;
737 goto fail;
1da177e4
LT
738 }
739
950fb626
TP
740 chip->reg_control = CTL_A_PWRDN | CTL_DA_ES2 |
741 CTL_PKTP_16 | (15 << CTL_DA_SDR_SHIFT);
1da177e4
LT
742 chip->interrupt_mask = MY_INTERRUPTS;
743 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
744 snd_bt87x_writel(chip, REG_INT_MASK, 0);
745 snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
746
dcfb4140 747 err = request_irq(pci->irq, snd_bt87x_interrupt, IRQF_SHARED,
934c2b6d 748 KBUILD_MODNAME, chip);
dcfb4140 749 if (err < 0) {
02c33520 750 dev_err(card->dev, "cannot grab irq %d\n", pci->irq);
dcfb4140 751 goto fail;
1da177e4
LT
752 }
753 chip->irq = pci->irq;
d2625a62 754 card->sync_irq = chip->irq;
1da177e4 755 pci_set_master(pci);
1da177e4
LT
756
757 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
dcfb4140
TP
758 if (err < 0)
759 goto fail;
760
1da177e4
LT
761 *rchip = chip;
762 return 0;
dcfb4140
TP
763
764fail:
765 snd_bt87x_free(chip);
766 return err;
1da177e4
LT
767}
768
dcfb4140 769#define BT_DEVICE(chip, subvend, subdev, id) \
1da177e4 770 { .vendor = PCI_VENDOR_ID_BROOKTREE, \
4153812f 771 .device = chip, \
1da177e4 772 .subvendor = subvend, .subdevice = subdev, \
dcfb4140
TP
773 .driver_data = SND_BT87X_BOARD_ ## id }
774/* driver_data is the card id for that device */
1da177e4 775
9baa3c34 776static const struct pci_device_id snd_bt87x_ids[] = {
4153812f 777 /* Hauppauge WinTV series */
dcfb4140 778 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0x13eb, GENERIC),
4153812f 779 /* Hauppauge WinTV series */
dcfb4140 780 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, 0x0070, 0x13eb, GENERIC),
4153812f 781 /* Viewcast Osprey 200 */
dcfb4140 782 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff01, OSPREY2x0),
cf784d55 783 /* Viewcast Osprey 440 (rate is configurable via gpio) */
dcfb4140 784 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff07, OSPREY440),
76e63067 785 /* ATI TV-Wonder */
dcfb4140 786 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1002, 0x0001, GENERIC),
abf58f09 787 /* Leadtek Winfast tv 2000xp delux */
dcfb4140 788 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x107d, 0x6606, GENERIC),
9c6b8dce
TI
789 /* Pinnacle PCTV */
790 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x11bd, 0x0012, GENERIC),
29463dfe 791 /* Voodoo TV 200 */
dcfb4140 792 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x121a, 0x3000, GENERIC),
3f08a0e4
TI
793 /* Askey Computer Corp. MagicTView'99 */
794 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x144f, 0x3000, GENERIC),
29463dfe 795 /* AVerMedia Studio No. 103, 203, ...? */
dcfb4140 796 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1461, 0x0003, AVPHONE98),
abaeeb59 797 /* Prolink PixelView PV-M4900 */
dcfb4140 798 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1554, 0x4011, GENERIC),
abaeeb59 799 /* Pinnacle Studio PCTV rave */
dcfb4140 800 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0xbd11, 0x1200, GENERIC),
1da177e4
LT
801 { }
802};
803MODULE_DEVICE_TABLE(pci, snd_bt87x_ids);
804
805/* cards known not to have audio
806 * (DVB cards use the audio function to transfer MPEG data) */
807static struct {
808 unsigned short subvendor, subdevice;
3dd06763 809} blacklist[] = {
1da177e4 810 {0x0071, 0x0101}, /* Nebula Electronics DigiTV */
0110f50b 811 {0x11bd, 0x001c}, /* Pinnacle PCTV Sat */
1da177e4
LT
812 {0x11bd, 0x0026}, /* Pinnacle PCTV SAT CI */
813 {0x1461, 0x0761}, /* AVermedia AverTV DVB-T */
814 {0x1461, 0x0771}, /* AVermedia DVB-T 771 */
815 {0x1822, 0x0001}, /* Twinhan VisionPlus DVB-T */
0110f50b 816 {0x18ac, 0xd500}, /* DVICO FusionHDTV 5 Lite */
1da177e4 817 {0x18ac, 0xdb10}, /* DVICO FusionHDTV DVB-T Lite */
19790db0 818 {0x18ac, 0xdb11}, /* Ultraview DVB-T Lite */
1da177e4 819 {0x270f, 0xfc00}, /* Chaintech Digitop DST-1000 DVB-S */
0110f50b 820 {0x7063, 0x2000}, /* pcHDTV HD-2000 TV */
1da177e4
LT
821};
822
aacfddfd
TI
823static struct pci_driver driver;
824
dcfb4140 825/* return the id of the card, or a negative value if it's blacklisted */
3dd06763 826static int snd_bt87x_detect_card(struct pci_dev *pci)
1da177e4
LT
827{
828 int i;
829 const struct pci_device_id *supported;
830
8e84c641 831 supported = pci_match_id(snd_bt87x_ids, pci);
54c63cfc 832 if (supported && supported->driver_data > 0)
1da177e4
LT
833 return supported->driver_data;
834
835 for (i = 0; i < ARRAY_SIZE(blacklist); ++i)
836 if (blacklist[i].subvendor == pci->subsystem_vendor &&
837 blacklist[i].subdevice == pci->subsystem_device) {
02c33520
TI
838 dev_dbg(&pci->dev,
839 "card %#04x-%#04x:%#04x has no audio\n",
abf58f09 840 pci->device, pci->subsystem_vendor, pci->subsystem_device);
1da177e4
LT
841 return -EBUSY;
842 }
843
02c33520 844 dev_info(&pci->dev, "unknown card %#04x-%#04x:%#04x\n",
dcfb4140 845 pci->device, pci->subsystem_vendor, pci->subsystem_device);
02c33520 846 dev_info(&pci->dev, "please mail id, board name, and, "
1da177e4 847 "if it works, the correct digital_rate option to "
4505179c 848 "<alsa-devel@alsa-project.org>\n");
c818e0a1 849 return SND_BT87X_BOARD_UNKNOWN;
1da177e4
LT
850}
851
3dd06763
BP
852static int snd_bt87x_probe(struct pci_dev *pci,
853 const struct pci_device_id *pci_id)
1da177e4
LT
854{
855 static int dev;
9f362dce
TI
856 struct snd_card *card;
857 struct snd_bt87x *chip;
dcfb4140
TP
858 int err;
859 enum snd_bt87x_boardid boardid;
1da177e4 860
dcfb4140
TP
861 if (!pci_id->driver_data) {
862 err = snd_bt87x_detect_card(pci);
863 if (err < 0)
1da177e4 864 return -ENODEV;
dcfb4140
TP
865 boardid = err;
866 } else
867 boardid = pci_id->driver_data;
1da177e4
LT
868
869 if (dev >= SNDRV_CARDS)
870 return -ENODEV;
871 if (!enable[dev]) {
872 ++dev;
873 return -ENOENT;
874 }
875
60c5772b
TI
876 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
877 0, &card);
e58de7ba
TI
878 if (err < 0)
879 return err;
1da177e4
LT
880
881 err = snd_bt87x_create(card, pci, &chip);
882 if (err < 0)
883 goto _error;
884
dcfb4140 885 memcpy(&chip->board, &snd_bt87x_boards[boardid], sizeof(chip->board));
1da177e4 886
dcfb4140
TP
887 if (!chip->board.no_digital) {
888 if (digital_rate[dev] > 0)
889 chip->board.dig_rate = digital_rate[dev];
1da177e4 890
dcfb4140
TP
891 chip->reg_control |= chip->board.digital_fmt;
892
893 err = snd_bt87x_pcm(chip, DEVICE_DIGITAL, "Bt87x Digital");
894 if (err < 0)
895 goto _error;
896 }
897 if (!chip->board.no_analog) {
898 err = snd_bt87x_pcm(chip, DEVICE_ANALOG, "Bt87x Analog");
899 if (err < 0)
900 goto _error;
901 err = snd_ctl_add(card, snd_ctl_new1(
902 &snd_bt87x_capture_volume, chip));
903 if (err < 0)
904 goto _error;
905 err = snd_ctl_add(card, snd_ctl_new1(
906 &snd_bt87x_capture_boost, chip));
907 if (err < 0)
908 goto _error;
909 err = snd_ctl_add(card, snd_ctl_new1(
910 &snd_bt87x_capture_source, chip));
911 if (err < 0)
912 goto _error;
913 }
02c33520 914 dev_info(card->dev, "bt87x%d: Using board %d, %sanalog, %sdigital "
dcfb4140
TP
915 "(rate %d Hz)\n", dev, boardid,
916 chip->board.no_analog ? "no " : "",
917 chip->board.no_digital ? "no " : "", chip->board.dig_rate);
1da177e4
LT
918
919 strcpy(card->driver, "Bt87x");
920 sprintf(card->shortname, "Brooktree Bt%x", pci->device);
aa0a2ddc
GKH
921 sprintf(card->longname, "%s at %#llx, irq %i",
922 card->shortname, (unsigned long long)pci_resource_start(pci, 0),
923 chip->irq);
1da177e4
LT
924 strcpy(card->mixername, "Bt87x");
925
926 err = snd_card_register(card);
927 if (err < 0)
928 goto _error;
929
930 pci_set_drvdata(pci, card);
931 ++dev;
932 return 0;
933
934_error:
935 snd_card_free(card);
936 return err;
937}
938
3dd06763 939static void snd_bt87x_remove(struct pci_dev *pci)
1da177e4
LT
940{
941 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT
942}
943
944/* default entries for all Bt87x cards - it's not exported */
945/* driver_data is set to 0 to call detection */
9baa3c34 946static const struct pci_device_id snd_bt87x_default_ids[] = {
c818e0a1
CL
947 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, PCI_ANY_ID, PCI_ANY_ID, UNKNOWN),
948 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, PCI_ANY_ID, PCI_ANY_ID, UNKNOWN),
1da177e4
LT
949 { }
950};
951
aacfddfd 952static struct pci_driver driver = {
3733e424 953 .name = KBUILD_MODNAME,
1da177e4
LT
954 .id_table = snd_bt87x_ids,
955 .probe = snd_bt87x_probe,
3dd06763 956 .remove = snd_bt87x_remove,
1da177e4
LT
957};
958
aacfddfd
TI
959static int __init alsa_card_bt87x_init(void)
960{
961 if (load_all)
962 driver.id_table = snd_bt87x_default_ids;
963 return pci_register_driver(&driver);
964}
965
966static void __exit alsa_card_bt87x_exit(void)
967{
968 pci_unregister_driver(&driver);
969}
970
971module_init(alsa_card_bt87x_init)
972module_exit(alsa_card_bt87x_exit)