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[ALSA] cs4231-lib: replace common delay loop by function
[mirror_ubuntu-bionic-kernel.git] / sound / pci / bt87x.c
CommitLineData
1da177e4
LT
1/*
2 * bt87x.c - Brooktree Bt878/Bt879 driver for ALSA
3 *
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 *
6 * based on btaudio.c by Gerd Knorr <kraxel@bytesex.org>
7 *
8 *
9 * This driver is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This driver is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23
24#include <sound/driver.h>
25#include <linux/init.h>
26#include <linux/interrupt.h>
27#include <linux/pci.h>
28#include <linux/slab.h>
29#include <linux/moduleparam.h>
30#include <linux/bitops.h>
31#include <asm/io.h>
32#include <sound/core.h>
33#include <sound/pcm.h>
34#include <sound/pcm_params.h>
35#include <sound/control.h>
36#include <sound/initval.h>
37
38MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
39MODULE_DESCRIPTION("Brooktree Bt87x audio driver");
40MODULE_LICENSE("GPL");
41MODULE_SUPPORTED_DEVICE("{{Brooktree,Bt878},"
42 "{Brooktree,Bt879}}");
43
44static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */
45static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
46static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
6581f4e7 47static int digital_rate[SNDRV_CARDS]; /* digital input rate */
1da177e4
LT
48static int load_all; /* allow to load the non-whitelisted cards */
49
50module_param_array(index, int, NULL, 0444);
51MODULE_PARM_DESC(index, "Index value for Bt87x soundcard");
52module_param_array(id, charp, NULL, 0444);
53MODULE_PARM_DESC(id, "ID string for Bt87x soundcard");
54module_param_array(enable, bool, NULL, 0444);
55MODULE_PARM_DESC(enable, "Enable Bt87x soundcard");
56module_param_array(digital_rate, int, NULL, 0444);
57MODULE_PARM_DESC(digital_rate, "Digital input rate for Bt87x soundcard");
58module_param(load_all, bool, 0444);
59MODULE_PARM_DESC(load_all, "Allow to load the non-whitelisted cards");
60
61
1da177e4
LT
62/* register offsets */
63#define REG_INT_STAT 0x100 /* interrupt status */
64#define REG_INT_MASK 0x104 /* interrupt mask */
65#define REG_GPIO_DMA_CTL 0x10c /* audio control */
66#define REG_PACKET_LEN 0x110 /* audio packet lengths */
67#define REG_RISC_STRT_ADD 0x114 /* RISC program start address */
68#define REG_RISC_COUNT 0x120 /* RISC program counter */
69
70/* interrupt bits */
71#define INT_OFLOW (1 << 3) /* audio A/D overflow */
72#define INT_RISCI (1 << 11) /* RISC instruction IRQ bit set */
73#define INT_FBUS (1 << 12) /* FIFO overrun due to bus access latency */
74#define INT_FTRGT (1 << 13) /* FIFO overrun due to target latency */
75#define INT_FDSR (1 << 14) /* FIFO data stream resynchronization */
76#define INT_PPERR (1 << 15) /* PCI parity error */
77#define INT_RIPERR (1 << 16) /* RISC instruction parity error */
78#define INT_PABORT (1 << 17) /* PCI master or target abort */
79#define INT_OCERR (1 << 18) /* invalid opcode */
80#define INT_SCERR (1 << 19) /* sync counter overflow */
81#define INT_RISC_EN (1 << 27) /* DMA controller running */
82#define INT_RISCS_SHIFT 28 /* RISC status bits */
83
84/* audio control bits */
85#define CTL_FIFO_ENABLE (1 << 0) /* enable audio data FIFO */
86#define CTL_RISC_ENABLE (1 << 1) /* enable audio DMA controller */
87#define CTL_PKTP_4 (0 << 2) /* packet mode FIFO trigger point - 4 DWORDs */
88#define CTL_PKTP_8 (1 << 2) /* 8 DWORDs */
89#define CTL_PKTP_16 (2 << 2) /* 16 DWORDs */
90#define CTL_ACAP_EN (1 << 4) /* enable audio capture */
91#define CTL_DA_APP (1 << 5) /* GPIO input */
92#define CTL_DA_IOM_AFE (0 << 6) /* audio A/D input */
93#define CTL_DA_IOM_DA (1 << 6) /* digital audio input */
94#define CTL_DA_SDR_SHIFT 8 /* DDF first stage decimation rate */
95#define CTL_DA_SDR_MASK (0xf<< 8)
96#define CTL_DA_LMT (1 << 12) /* limit audio data values */
97#define CTL_DA_ES2 (1 << 13) /* enable DDF stage 2 */
98#define CTL_DA_SBR (1 << 14) /* samples rounded to 8 bits */
99#define CTL_DA_DPM (1 << 15) /* data packet mode */
100#define CTL_DA_LRD_SHIFT 16 /* ALRCK delay */
101#define CTL_DA_MLB (1 << 21) /* MSB/LSB format */
102#define CTL_DA_LRI (1 << 22) /* left/right indication */
103#define CTL_DA_SCE (1 << 23) /* sample clock edge */
104#define CTL_A_SEL_STV (0 << 24) /* TV tuner audio input */
105#define CTL_A_SEL_SFM (1 << 24) /* FM audio input */
106#define CTL_A_SEL_SML (2 << 24) /* mic/line audio input */
107#define CTL_A_SEL_SMXC (3 << 24) /* MUX bypass */
108#define CTL_A_SEL_SHIFT 24
109#define CTL_A_SEL_MASK (3 << 24)
110#define CTL_A_PWRDN (1 << 26) /* analog audio power-down */
111#define CTL_A_G2X (1 << 27) /* audio gain boost */
112#define CTL_A_GAIN_SHIFT 28 /* audio input gain */
113#define CTL_A_GAIN_MASK (0xf<<28)
114
115/* RISC instruction opcodes */
116#define RISC_WRITE (0x1 << 28) /* write FIFO data to memory at address */
117#define RISC_WRITEC (0x5 << 28) /* write FIFO data to memory at current address */
118#define RISC_SKIP (0x2 << 28) /* skip FIFO data */
119#define RISC_JUMP (0x7 << 28) /* jump to address */
120#define RISC_SYNC (0x8 << 28) /* synchronize with FIFO */
121
122/* RISC instruction bits */
123#define RISC_BYTES_ENABLE (0xf << 12) /* byte enable bits */
124#define RISC_RESYNC ( 1 << 15) /* disable FDSR errors */
125#define RISC_SET_STATUS_SHIFT 16 /* set status bits */
126#define RISC_RESET_STATUS_SHIFT 20 /* clear status bits */
127#define RISC_IRQ ( 1 << 24) /* interrupt */
128#define RISC_EOL ( 1 << 26) /* end of line */
129#define RISC_SOL ( 1 << 27) /* start of line */
130
131/* SYNC status bits values */
132#define RISC_SYNC_FM1 0x6
133#define RISC_SYNC_VRO 0xc
134
135#define ANALOG_CLOCK 1792000
136#ifdef CONFIG_SND_BT87X_OVERCLOCK
137#define CLOCK_DIV_MIN 1
138#else
139#define CLOCK_DIV_MIN 4
140#endif
141#define CLOCK_DIV_MAX 15
142
143#define ERROR_INTERRUPTS (INT_FBUS | INT_FTRGT | INT_PPERR | \
144 INT_RIPERR | INT_PABORT | INT_OCERR)
145#define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS)
146
147/* SYNC, one WRITE per line, one extra WRITE per page boundary, SYNC, JUMP */
148#define MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8)
149
1da177e4 150struct snd_bt87x {
9f362dce 151 struct snd_card *card;
1da177e4
LT
152 struct pci_dev *pci;
153
154 void __iomem *mmio;
155 int irq;
156
157 int dig_rate;
158
159 spinlock_t reg_lock;
64b33619 160 unsigned long opened;
9f362dce 161 struct snd_pcm_substream *substream;
1da177e4
LT
162
163 struct snd_dma_buffer dma_risc;
164 unsigned int line_bytes;
165 unsigned int lines;
166
167 u32 reg_control;
168 u32 interrupt_mask;
169
170 int current_line;
171
172 int pci_parity_errors;
173};
174
175enum { DEVICE_DIGITAL, DEVICE_ANALOG };
176
9f362dce 177static inline u32 snd_bt87x_readl(struct snd_bt87x *chip, u32 reg)
1da177e4
LT
178{
179 return readl(chip->mmio + reg);
180}
181
9f362dce 182static inline void snd_bt87x_writel(struct snd_bt87x *chip, u32 reg, u32 value)
1da177e4
LT
183{
184 writel(value, chip->mmio + reg);
185}
186
9f362dce 187static int snd_bt87x_create_risc(struct snd_bt87x *chip, struct snd_pcm_substream *substream,
1da177e4
LT
188 unsigned int periods, unsigned int period_bytes)
189{
190 struct snd_sg_buf *sgbuf = snd_pcm_substream_sgbuf(substream);
191 unsigned int i, offset;
192 u32 *risc;
193
194 if (chip->dma_risc.area == NULL) {
195 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
196 PAGE_ALIGN(MAX_RISC_SIZE), &chip->dma_risc) < 0)
197 return -ENOMEM;
198 }
199 risc = (u32 *)chip->dma_risc.area;
200 offset = 0;
201 *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_FM1);
202 *risc++ = cpu_to_le32(0);
203 for (i = 0; i < periods; ++i) {
204 u32 rest;
205
206 rest = period_bytes;
207 do {
208 u32 cmd, len;
209
210 len = PAGE_SIZE - (offset % PAGE_SIZE);
211 if (len > rest)
212 len = rest;
213 cmd = RISC_WRITE | len;
214 if (rest == period_bytes) {
215 u32 block = i * 16 / periods;
216 cmd |= RISC_SOL;
217 cmd |= block << RISC_SET_STATUS_SHIFT;
218 cmd |= (~block & 0xf) << RISC_RESET_STATUS_SHIFT;
219 }
220 if (len == rest)
221 cmd |= RISC_EOL | RISC_IRQ;
222 *risc++ = cpu_to_le32(cmd);
223 *risc++ = cpu_to_le32((u32)snd_pcm_sgbuf_get_addr(sgbuf, offset));
224 offset += len;
225 rest -= len;
226 } while (rest > 0);
227 }
228 *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_VRO);
229 *risc++ = cpu_to_le32(0);
230 *risc++ = cpu_to_le32(RISC_JUMP);
231 *risc++ = cpu_to_le32(chip->dma_risc.addr);
232 chip->line_bytes = period_bytes;
233 chip->lines = periods;
234 return 0;
235}
236
9f362dce 237static void snd_bt87x_free_risc(struct snd_bt87x *chip)
1da177e4
LT
238{
239 if (chip->dma_risc.area) {
240 snd_dma_free_pages(&chip->dma_risc);
241 chip->dma_risc.area = NULL;
242 }
243}
244
9f362dce 245static void snd_bt87x_pci_error(struct snd_bt87x *chip, unsigned int status)
1da177e4
LT
246{
247 u16 pci_status;
248
249 pci_read_config_word(chip->pci, PCI_STATUS, &pci_status);
250 pci_status &= PCI_STATUS_PARITY | PCI_STATUS_SIG_TARGET_ABORT |
251 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_REC_MASTER_ABORT |
252 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_DETECTED_PARITY;
253 pci_write_config_word(chip->pci, PCI_STATUS, pci_status);
254 if (pci_status != PCI_STATUS_DETECTED_PARITY)
255 snd_printk(KERN_ERR "Aieee - PCI error! status %#08x, PCI status %#04x\n",
256 status & ERROR_INTERRUPTS, pci_status);
257 else {
258 snd_printk(KERN_ERR "Aieee - PCI parity error detected!\n");
259 /* error 'handling' similar to aic7xxx_pci.c: */
260 chip->pci_parity_errors++;
261 if (chip->pci_parity_errors > 20) {
262 snd_printk(KERN_ERR "Too many PCI parity errors observed.\n");
263 snd_printk(KERN_ERR "Some device on this bus is generating bad parity.\n");
264 snd_printk(KERN_ERR "This is an error *observed by*, not *generated by*, this card.\n");
265 snd_printk(KERN_ERR "PCI parity error checking has been disabled.\n");
266 chip->interrupt_mask &= ~(INT_PPERR | INT_RIPERR);
267 snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
268 }
269 }
270}
271
7d12e780 272static irqreturn_t snd_bt87x_interrupt(int irq, void *dev_id)
1da177e4 273{
9f362dce 274 struct snd_bt87x *chip = dev_id;
1da177e4
LT
275 unsigned int status, irq_status;
276
277 status = snd_bt87x_readl(chip, REG_INT_STAT);
278 irq_status = status & chip->interrupt_mask;
279 if (!irq_status)
280 return IRQ_NONE;
281 snd_bt87x_writel(chip, REG_INT_STAT, irq_status);
282
283 if (irq_status & ERROR_INTERRUPTS) {
284 if (irq_status & (INT_FBUS | INT_FTRGT))
285 snd_printk(KERN_WARNING "FIFO overrun, status %#08x\n", status);
286 if (irq_status & INT_OCERR)
287 snd_printk(KERN_ERR "internal RISC error, status %#08x\n", status);
288 if (irq_status & (INT_PPERR | INT_RIPERR | INT_PABORT))
289 snd_bt87x_pci_error(chip, irq_status);
290 }
291 if ((irq_status & INT_RISCI) && (chip->reg_control & CTL_ACAP_EN)) {
292 int current_block, irq_block;
293
294 /* assume that exactly one line has been recorded */
295 chip->current_line = (chip->current_line + 1) % chip->lines;
296 /* but check if some interrupts have been skipped */
297 current_block = chip->current_line * 16 / chip->lines;
298 irq_block = status >> INT_RISCS_SHIFT;
299 if (current_block != irq_block)
300 chip->current_line = (irq_block * chip->lines + 15) / 16;
301
302 snd_pcm_period_elapsed(chip->substream);
303 }
304 return IRQ_HANDLED;
305}
306
9f362dce 307static struct snd_pcm_hardware snd_bt87x_digital_hw = {
1da177e4
LT
308 .info = SNDRV_PCM_INFO_MMAP |
309 SNDRV_PCM_INFO_INTERLEAVED |
310 SNDRV_PCM_INFO_BLOCK_TRANSFER |
311 SNDRV_PCM_INFO_MMAP_VALID,
312 .formats = SNDRV_PCM_FMTBIT_S16_LE,
313 .rates = 0, /* set at runtime */
314 .channels_min = 2,
315 .channels_max = 2,
316 .buffer_bytes_max = 255 * 4092,
317 .period_bytes_min = 32,
318 .period_bytes_max = 4092,
319 .periods_min = 2,
320 .periods_max = 255,
321};
322
9f362dce 323static struct snd_pcm_hardware snd_bt87x_analog_hw = {
1da177e4
LT
324 .info = SNDRV_PCM_INFO_MMAP |
325 SNDRV_PCM_INFO_INTERLEAVED |
326 SNDRV_PCM_INFO_BLOCK_TRANSFER |
327 SNDRV_PCM_INFO_MMAP_VALID,
328 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
329 .rates = SNDRV_PCM_RATE_KNOT,
330 .rate_min = ANALOG_CLOCK / CLOCK_DIV_MAX,
331 .rate_max = ANALOG_CLOCK / CLOCK_DIV_MIN,
332 .channels_min = 1,
333 .channels_max = 1,
334 .buffer_bytes_max = 255 * 4092,
335 .period_bytes_min = 32,
336 .period_bytes_max = 4092,
337 .periods_min = 2,
338 .periods_max = 255,
339};
340
9f362dce 341static int snd_bt87x_set_digital_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime)
1da177e4 342{
1da177e4
LT
343 chip->reg_control |= CTL_DA_IOM_DA;
344 runtime->hw = snd_bt87x_digital_hw;
918f3a0e 345 runtime->hw.rates = snd_pcm_rate_to_rate_bit(chip->dig_rate);
1da177e4
LT
346 runtime->hw.rate_min = chip->dig_rate;
347 runtime->hw.rate_max = chip->dig_rate;
348 return 0;
349}
350
9f362dce 351static int snd_bt87x_set_analog_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime)
1da177e4 352{
9f362dce 353 static struct snd_ratnum analog_clock = {
1da177e4
LT
354 .num = ANALOG_CLOCK,
355 .den_min = CLOCK_DIV_MIN,
356 .den_max = CLOCK_DIV_MAX,
357 .den_step = 1
358 };
9f362dce 359 static struct snd_pcm_hw_constraint_ratnums constraint_rates = {
1da177e4
LT
360 .nrats = 1,
361 .rats = &analog_clock
362 };
363
364 chip->reg_control &= ~CTL_DA_IOM_DA;
365 runtime->hw = snd_bt87x_analog_hw;
366 return snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
367 &constraint_rates);
368}
369
9f362dce 370static int snd_bt87x_pcm_open(struct snd_pcm_substream *substream)
1da177e4 371{
9f362dce
TI
372 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
373 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
374 int err;
375
376 if (test_and_set_bit(0, &chip->opened))
377 return -EBUSY;
378
379 if (substream->pcm->device == DEVICE_DIGITAL)
380 err = snd_bt87x_set_digital_hw(chip, runtime);
381 else
382 err = snd_bt87x_set_analog_hw(chip, runtime);
383 if (err < 0)
384 goto _error;
385
386 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
387 if (err < 0)
388 goto _error;
389
390 chip->substream = substream;
391 return 0;
392
393_error:
394 clear_bit(0, &chip->opened);
395 smp_mb__after_clear_bit();
396 return err;
397}
398
9f362dce 399static int snd_bt87x_close(struct snd_pcm_substream *substream)
1da177e4 400{
9f362dce 401 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
402
403 chip->substream = NULL;
404 clear_bit(0, &chip->opened);
405 smp_mb__after_clear_bit();
406 return 0;
407}
408
9f362dce
TI
409static int snd_bt87x_hw_params(struct snd_pcm_substream *substream,
410 struct snd_pcm_hw_params *hw_params)
1da177e4 411{
9f362dce 412 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
413 int err;
414
415 err = snd_pcm_lib_malloc_pages(substream,
416 params_buffer_bytes(hw_params));
417 if (err < 0)
418 return err;
419 return snd_bt87x_create_risc(chip, substream,
420 params_periods(hw_params),
421 params_period_bytes(hw_params));
422}
423
9f362dce 424static int snd_bt87x_hw_free(struct snd_pcm_substream *substream)
1da177e4 425{
9f362dce 426 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
427
428 snd_bt87x_free_risc(chip);
429 snd_pcm_lib_free_pages(substream);
430 return 0;
431}
432
9f362dce 433static int snd_bt87x_prepare(struct snd_pcm_substream *substream)
1da177e4 434{
9f362dce
TI
435 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
436 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
437 int decimation;
438
439 spin_lock_irq(&chip->reg_lock);
440 chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR);
441 decimation = (ANALOG_CLOCK + runtime->rate / 4) / runtime->rate;
442 chip->reg_control |= decimation << CTL_DA_SDR_SHIFT;
443 if (runtime->format == SNDRV_PCM_FORMAT_S8)
444 chip->reg_control |= CTL_DA_SBR;
445 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
446 spin_unlock_irq(&chip->reg_lock);
447 return 0;
448}
449
9f362dce 450static int snd_bt87x_start(struct snd_bt87x *chip)
1da177e4
LT
451{
452 spin_lock(&chip->reg_lock);
453 chip->current_line = 0;
454 chip->reg_control |= CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN;
455 snd_bt87x_writel(chip, REG_RISC_STRT_ADD, chip->dma_risc.addr);
456 snd_bt87x_writel(chip, REG_PACKET_LEN,
457 chip->line_bytes | (chip->lines << 16));
458 snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
459 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
460 spin_unlock(&chip->reg_lock);
461 return 0;
462}
463
9f362dce 464static int snd_bt87x_stop(struct snd_bt87x *chip)
1da177e4
LT
465{
466 spin_lock(&chip->reg_lock);
467 chip->reg_control &= ~(CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN);
468 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
469 snd_bt87x_writel(chip, REG_INT_MASK, 0);
470 snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
471 spin_unlock(&chip->reg_lock);
472 return 0;
473}
474
9f362dce 475static int snd_bt87x_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 476{
9f362dce 477 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
478
479 switch (cmd) {
480 case SNDRV_PCM_TRIGGER_START:
481 return snd_bt87x_start(chip);
482 case SNDRV_PCM_TRIGGER_STOP:
483 return snd_bt87x_stop(chip);
484 default:
485 return -EINVAL;
486 }
487}
488
9f362dce 489static snd_pcm_uframes_t snd_bt87x_pointer(struct snd_pcm_substream *substream)
1da177e4 490{
9f362dce
TI
491 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
492 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
493
494 return (snd_pcm_uframes_t)bytes_to_frames(runtime, chip->current_line * chip->line_bytes);
495}
496
9f362dce 497static struct snd_pcm_ops snd_bt87x_pcm_ops = {
1da177e4
LT
498 .open = snd_bt87x_pcm_open,
499 .close = snd_bt87x_close,
500 .ioctl = snd_pcm_lib_ioctl,
501 .hw_params = snd_bt87x_hw_params,
502 .hw_free = snd_bt87x_hw_free,
503 .prepare = snd_bt87x_prepare,
504 .trigger = snd_bt87x_trigger,
505 .pointer = snd_bt87x_pointer,
506 .page = snd_pcm_sgbuf_ops_page,
507};
508
9f362dce
TI
509static int snd_bt87x_capture_volume_info(struct snd_kcontrol *kcontrol,
510 struct snd_ctl_elem_info *info)
1da177e4
LT
511{
512 info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
513 info->count = 1;
514 info->value.integer.min = 0;
515 info->value.integer.max = 15;
516 return 0;
517}
518
9f362dce
TI
519static int snd_bt87x_capture_volume_get(struct snd_kcontrol *kcontrol,
520 struct snd_ctl_elem_value *value)
1da177e4 521{
9f362dce 522 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
523
524 value->value.integer.value[0] = (chip->reg_control & CTL_A_GAIN_MASK) >> CTL_A_GAIN_SHIFT;
525 return 0;
526}
527
9f362dce
TI
528static int snd_bt87x_capture_volume_put(struct snd_kcontrol *kcontrol,
529 struct snd_ctl_elem_value *value)
1da177e4 530{
9f362dce 531 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
532 u32 old_control;
533 int changed;
534
535 spin_lock_irq(&chip->reg_lock);
536 old_control = chip->reg_control;
537 chip->reg_control = (chip->reg_control & ~CTL_A_GAIN_MASK)
538 | (value->value.integer.value[0] << CTL_A_GAIN_SHIFT);
539 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
540 changed = old_control != chip->reg_control;
541 spin_unlock_irq(&chip->reg_lock);
542 return changed;
543}
544
9f362dce 545static struct snd_kcontrol_new snd_bt87x_capture_volume = {
1da177e4
LT
546 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
547 .name = "Capture Volume",
548 .info = snd_bt87x_capture_volume_info,
549 .get = snd_bt87x_capture_volume_get,
550 .put = snd_bt87x_capture_volume_put,
551};
552
a5ce8890 553#define snd_bt87x_capture_boost_info snd_ctl_boolean_mono_info
1da177e4 554
9f362dce
TI
555static int snd_bt87x_capture_boost_get(struct snd_kcontrol *kcontrol,
556 struct snd_ctl_elem_value *value)
1da177e4 557{
9f362dce 558 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
559
560 value->value.integer.value[0] = !! (chip->reg_control & CTL_A_G2X);
561 return 0;
562}
563
9f362dce
TI
564static int snd_bt87x_capture_boost_put(struct snd_kcontrol *kcontrol,
565 struct snd_ctl_elem_value *value)
1da177e4 566{
9f362dce 567 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
568 u32 old_control;
569 int changed;
570
571 spin_lock_irq(&chip->reg_lock);
572 old_control = chip->reg_control;
573 chip->reg_control = (chip->reg_control & ~CTL_A_G2X)
574 | (value->value.integer.value[0] ? CTL_A_G2X : 0);
575 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
576 changed = chip->reg_control != old_control;
577 spin_unlock_irq(&chip->reg_lock);
578 return changed;
579}
580
9f362dce 581static struct snd_kcontrol_new snd_bt87x_capture_boost = {
1da177e4
LT
582 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
583 .name = "Capture Boost",
584 .info = snd_bt87x_capture_boost_info,
585 .get = snd_bt87x_capture_boost_get,
586 .put = snd_bt87x_capture_boost_put,
587};
588
9f362dce
TI
589static int snd_bt87x_capture_source_info(struct snd_kcontrol *kcontrol,
590 struct snd_ctl_elem_info *info)
1da177e4
LT
591{
592 static char *texts[3] = {"TV Tuner", "FM", "Mic/Line"};
593
594 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
595 info->count = 1;
596 info->value.enumerated.items = 3;
597 if (info->value.enumerated.item > 2)
598 info->value.enumerated.item = 2;
599 strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
600 return 0;
601}
602
9f362dce
TI
603static int snd_bt87x_capture_source_get(struct snd_kcontrol *kcontrol,
604 struct snd_ctl_elem_value *value)
1da177e4 605{
9f362dce 606 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
607
608 value->value.enumerated.item[0] = (chip->reg_control & CTL_A_SEL_MASK) >> CTL_A_SEL_SHIFT;
609 return 0;
610}
611
9f362dce
TI
612static int snd_bt87x_capture_source_put(struct snd_kcontrol *kcontrol,
613 struct snd_ctl_elem_value *value)
1da177e4 614{
9f362dce 615 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
616 u32 old_control;
617 int changed;
618
619 spin_lock_irq(&chip->reg_lock);
620 old_control = chip->reg_control;
621 chip->reg_control = (chip->reg_control & ~CTL_A_SEL_MASK)
622 | (value->value.enumerated.item[0] << CTL_A_SEL_SHIFT);
623 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
624 changed = chip->reg_control != old_control;
625 spin_unlock_irq(&chip->reg_lock);
626 return changed;
627}
628
9f362dce 629static struct snd_kcontrol_new snd_bt87x_capture_source = {
1da177e4
LT
630 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
631 .name = "Capture Source",
632 .info = snd_bt87x_capture_source_info,
633 .get = snd_bt87x_capture_source_get,
634 .put = snd_bt87x_capture_source_put,
635};
636
9f362dce 637static int snd_bt87x_free(struct snd_bt87x *chip)
1da177e4
LT
638{
639 if (chip->mmio) {
640 snd_bt87x_stop(chip);
641 if (chip->irq >= 0)
642 synchronize_irq(chip->irq);
643
644 iounmap(chip->mmio);
645 }
646 if (chip->irq >= 0)
647 free_irq(chip->irq, chip);
648 pci_release_regions(chip->pci);
649 pci_disable_device(chip->pci);
650 kfree(chip);
651 return 0;
652}
653
9f362dce 654static int snd_bt87x_dev_free(struct snd_device *device)
1da177e4 655{
9f362dce 656 struct snd_bt87x *chip = device->device_data;
1da177e4
LT
657 return snd_bt87x_free(chip);
658}
659
9f362dce 660static int __devinit snd_bt87x_pcm(struct snd_bt87x *chip, int device, char *name)
1da177e4
LT
661{
662 int err;
9f362dce 663 struct snd_pcm *pcm;
1da177e4
LT
664
665 err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm);
666 if (err < 0)
667 return err;
668 pcm->private_data = chip;
669 strcpy(pcm->name, name);
670 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_bt87x_pcm_ops);
671 return snd_pcm_lib_preallocate_pages_for_all(pcm,
672 SNDRV_DMA_TYPE_DEV_SG,
673 snd_dma_pci_data(chip->pci),
674 128 * 1024,
7ab39926 675 ALIGN(255 * 4092, 1024));
1da177e4
LT
676}
677
9f362dce 678static int __devinit snd_bt87x_create(struct snd_card *card,
1da177e4 679 struct pci_dev *pci,
9f362dce 680 struct snd_bt87x **rchip)
1da177e4 681{
9f362dce 682 struct snd_bt87x *chip;
1da177e4 683 int err;
9f362dce 684 static struct snd_device_ops ops = {
1da177e4
LT
685 .dev_free = snd_bt87x_dev_free
686 };
687
688 *rchip = NULL;
689
690 err = pci_enable_device(pci);
691 if (err < 0)
692 return err;
693
e560d8d8 694 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT
695 if (!chip) {
696 pci_disable_device(pci);
697 return -ENOMEM;
698 }
699 chip->card = card;
700 chip->pci = pci;
701 chip->irq = -1;
702 spin_lock_init(&chip->reg_lock);
703
704 if ((err = pci_request_regions(pci, "Bt87x audio")) < 0) {
705 kfree(chip);
706 pci_disable_device(pci);
707 return err;
708 }
709 chip->mmio = ioremap_nocache(pci_resource_start(pci, 0),
710 pci_resource_len(pci, 0));
711 if (!chip->mmio) {
712 snd_bt87x_free(chip);
713 snd_printk(KERN_ERR "cannot remap io memory\n");
714 return -ENOMEM;
715 }
716
717 chip->reg_control = CTL_DA_ES2 | CTL_PKTP_16 | (15 << CTL_DA_SDR_SHIFT);
718 chip->interrupt_mask = MY_INTERRUPTS;
719 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
720 snd_bt87x_writel(chip, REG_INT_MASK, 0);
721 snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
722
437a5a46 723 if (request_irq(pci->irq, snd_bt87x_interrupt, IRQF_SHARED,
1da177e4
LT
724 "Bt87x audio", chip)) {
725 snd_bt87x_free(chip);
726 snd_printk(KERN_ERR "cannot grab irq\n");
727 return -EBUSY;
728 }
729 chip->irq = pci->irq;
730 pci_set_master(pci);
731 synchronize_irq(chip->irq);
732
733 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
734 if (err < 0) {
735 snd_bt87x_free(chip);
736 return err;
737 }
738 snd_card_set_dev(card, &pci->dev);
739 *rchip = chip;
740 return 0;
741}
742
743#define BT_DEVICE(chip, subvend, subdev, rate) \
744 { .vendor = PCI_VENDOR_ID_BROOKTREE, \
4153812f 745 .device = chip, \
1da177e4
LT
746 .subvendor = subvend, .subdevice = subdev, \
747 .driver_data = rate }
748
749/* driver_data is the default digital_rate value for that device */
f40b6890 750static struct pci_device_id snd_bt87x_ids[] = {
4153812f
GC
751 /* Hauppauge WinTV series */
752 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0x13eb, 32000),
753 /* Hauppauge WinTV series */
754 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, 0x0070, 0x13eb, 32000),
755 /* Viewcast Osprey 200 */
756 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff01, 44100),
cf784d55
TP
757 /* Viewcast Osprey 440 (rate is configurable via gpio) */
758 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff07, 32000),
76e63067
TI
759 /* ATI TV-Wonder */
760 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1002, 0x0001, 32000),
abf58f09
JK
761 /* Leadtek Winfast tv 2000xp delux */
762 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x107d, 0x6606, 32000),
29463dfe
CL
763 /* Voodoo TV 200 */
764 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x121a, 0x3000, 32000),
765 /* AVerMedia Studio No. 103, 203, ...? */
766 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1461, 0x0003, 48000),
abaeeb59
TI
767 /* Prolink PixelView PV-M4900 */
768 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1554, 0x4011, 32000),
769 /* Pinnacle Studio PCTV rave */
770 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0xbd11, 0x1200, 32000),
1da177e4
LT
771 { }
772};
773MODULE_DEVICE_TABLE(pci, snd_bt87x_ids);
774
775/* cards known not to have audio
776 * (DVB cards use the audio function to transfer MPEG data) */
777static struct {
778 unsigned short subvendor, subdevice;
779} blacklist[] __devinitdata = {
780 {0x0071, 0x0101}, /* Nebula Electronics DigiTV */
0110f50b 781 {0x11bd, 0x001c}, /* Pinnacle PCTV Sat */
1da177e4
LT
782 {0x11bd, 0x0026}, /* Pinnacle PCTV SAT CI */
783 {0x1461, 0x0761}, /* AVermedia AverTV DVB-T */
784 {0x1461, 0x0771}, /* AVermedia DVB-T 771 */
785 {0x1822, 0x0001}, /* Twinhan VisionPlus DVB-T */
0110f50b 786 {0x18ac, 0xd500}, /* DVICO FusionHDTV 5 Lite */
1da177e4 787 {0x18ac, 0xdb10}, /* DVICO FusionHDTV DVB-T Lite */
19790db0 788 {0x18ac, 0xdb11}, /* Ultraview DVB-T Lite */
1da177e4 789 {0x270f, 0xfc00}, /* Chaintech Digitop DST-1000 DVB-S */
0110f50b 790 {0x7063, 0x2000}, /* pcHDTV HD-2000 TV */
1da177e4
LT
791};
792
b4634484
GKH
793static struct pci_driver driver;
794
1da177e4
LT
795/* return the rate of the card, or a negative value if it's blacklisted */
796static int __devinit snd_bt87x_detect_card(struct pci_dev *pci)
797{
798 int i;
799 const struct pci_device_id *supported;
800
159f597a 801 supported = pci_match_device(&driver, pci);
54c63cfc 802 if (supported && supported->driver_data > 0)
1da177e4
LT
803 return supported->driver_data;
804
805 for (i = 0; i < ARRAY_SIZE(blacklist); ++i)
806 if (blacklist[i].subvendor == pci->subsystem_vendor &&
807 blacklist[i].subdevice == pci->subsystem_device) {
abf58f09
JK
808 snd_printdd(KERN_INFO "card %#04x-%#04x:%#04x has no audio\n",
809 pci->device, pci->subsystem_vendor, pci->subsystem_device);
1da177e4
LT
810 return -EBUSY;
811 }
812
abf58f09
JK
813 snd_printk(KERN_INFO "unknown card %#04x-%#04x:%#04x, using default rate 32000\n",
814 pci->device, pci->subsystem_vendor, pci->subsystem_device);
1da177e4
LT
815 snd_printk(KERN_DEBUG "please mail id, board name, and, "
816 "if it works, the correct digital_rate option to "
4505179c 817 "<alsa-devel@alsa-project.org>\n");
1da177e4
LT
818 return 32000; /* default rate */
819}
820
821static int __devinit snd_bt87x_probe(struct pci_dev *pci,
822 const struct pci_device_id *pci_id)
823{
824 static int dev;
9f362dce
TI
825 struct snd_card *card;
826 struct snd_bt87x *chip;
1da177e4
LT
827 int err, rate;
828
829 rate = pci_id->driver_data;
830 if (! rate)
831 if ((rate = snd_bt87x_detect_card(pci)) <= 0)
832 return -ENODEV;
833
834 if (dev >= SNDRV_CARDS)
835 return -ENODEV;
836 if (!enable[dev]) {
837 ++dev;
838 return -ENOENT;
839 }
840
841 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
842 if (!card)
843 return -ENOMEM;
844
845 err = snd_bt87x_create(card, pci, &chip);
846 if (err < 0)
847 goto _error;
848
849 if (digital_rate[dev] > 0)
850 chip->dig_rate = digital_rate[dev];
851 else
852 chip->dig_rate = rate;
853
854 err = snd_bt87x_pcm(chip, DEVICE_DIGITAL, "Bt87x Digital");
855 if (err < 0)
856 goto _error;
857 err = snd_bt87x_pcm(chip, DEVICE_ANALOG, "Bt87x Analog");
858 if (err < 0)
859 goto _error;
860
861 err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_volume, chip));
862 if (err < 0)
863 goto _error;
864 err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_boost, chip));
865 if (err < 0)
866 goto _error;
867 err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_source, chip));
868 if (err < 0)
869 goto _error;
870
871 strcpy(card->driver, "Bt87x");
872 sprintf(card->shortname, "Brooktree Bt%x", pci->device);
aa0a2ddc
GKH
873 sprintf(card->longname, "%s at %#llx, irq %i",
874 card->shortname, (unsigned long long)pci_resource_start(pci, 0),
875 chip->irq);
1da177e4
LT
876 strcpy(card->mixername, "Bt87x");
877
878 err = snd_card_register(card);
879 if (err < 0)
880 goto _error;
881
882 pci_set_drvdata(pci, card);
883 ++dev;
884 return 0;
885
886_error:
887 snd_card_free(card);
888 return err;
889}
890
891static void __devexit snd_bt87x_remove(struct pci_dev *pci)
892{
893 snd_card_free(pci_get_drvdata(pci));
894 pci_set_drvdata(pci, NULL);
895}
896
897/* default entries for all Bt87x cards - it's not exported */
898/* driver_data is set to 0 to call detection */
396c9b92 899static struct pci_device_id snd_bt87x_default_ids[] __devinitdata = {
26205e02
GC
900 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, PCI_ANY_ID, PCI_ANY_ID, 0),
901 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, PCI_ANY_ID, PCI_ANY_ID, 0),
1da177e4
LT
902 { }
903};
904
905static struct pci_driver driver = {
906 .name = "Bt87x",
907 .id_table = snd_bt87x_ids,
908 .probe = snd_bt87x_probe,
909 .remove = __devexit_p(snd_bt87x_remove),
910};
911
912static int __init alsa_card_bt87x_init(void)
913{
914 if (load_all)
915 driver.id_table = snd_bt87x_default_ids;
01d25d46 916 return pci_register_driver(&driver);
1da177e4
LT
917}
918
919static void __exit alsa_card_bt87x_exit(void)
920{
921 pci_unregister_driver(&driver);
922}
923
924module_init(alsa_card_bt87x_init)
925module_exit(alsa_card_bt87x_exit)