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1da177e4 LT |
1 | /* |
2 | * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com> | |
3 | * Driver EMU10K1X chips | |
4 | * | |
5 | * Parts of this code were adapted from audigyls.c driver which is | |
6 | * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk> | |
7 | * | |
8 | * BUGS: | |
9 | * -- | |
10 | * | |
11 | * TODO: | |
12 | * | |
13 | * Chips (SB0200 model): | |
14 | * - EMU10K1X-DBQ | |
15 | * - STAC 9708T | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or modify | |
18 | * it under the terms of the GNU General Public License as published by | |
19 | * the Free Software Foundation; either version 2 of the License, or | |
20 | * (at your option) any later version. | |
21 | * | |
22 | * This program is distributed in the hope that it will be useful, | |
23 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
25 | * GNU General Public License for more details. | |
26 | * | |
27 | * You should have received a copy of the GNU General Public License | |
28 | * along with this program; if not, write to the Free Software | |
29 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
30 | * | |
31 | */ | |
1da177e4 LT |
32 | #include <linux/init.h> |
33 | #include <linux/interrupt.h> | |
34 | #include <linux/pci.h> | |
9d2f928d | 35 | #include <linux/dma-mapping.h> |
1da177e4 | 36 | #include <linux/slab.h> |
65a77217 | 37 | #include <linux/module.h> |
1da177e4 LT |
38 | #include <sound/core.h> |
39 | #include <sound/initval.h> | |
40 | #include <sound/pcm.h> | |
41 | #include <sound/ac97_codec.h> | |
42 | #include <sound/info.h> | |
43 | #include <sound/rawmidi.h> | |
44 | ||
45 | MODULE_AUTHOR("Francisco Moraes <fmoraes@nc.rr.com>"); | |
46 | MODULE_DESCRIPTION("EMU10K1X"); | |
47 | MODULE_LICENSE("GPL"); | |
48 | MODULE_SUPPORTED_DEVICE("{{Dell Creative Labs,SB Live!}"); | |
49 | ||
50 | // module parameters (see "Module Parameters") | |
51 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; | |
52 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; | |
a67ff6a5 | 53 | static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; |
1da177e4 LT |
54 | |
55 | module_param_array(index, int, NULL, 0444); | |
56 | MODULE_PARM_DESC(index, "Index value for the EMU10K1X soundcard."); | |
57 | module_param_array(id, charp, NULL, 0444); | |
58 | MODULE_PARM_DESC(id, "ID string for the EMU10K1X soundcard."); | |
59 | module_param_array(enable, bool, NULL, 0444); | |
60 | MODULE_PARM_DESC(enable, "Enable the EMU10K1X soundcard."); | |
61 | ||
62 | ||
63 | // some definitions were borrowed from emu10k1 driver as they seem to be the same | |
64 | /************************************************************************************************/ | |
65 | /* PCI function 0 registers, address = <val> + PCIBASE0 */ | |
66 | /************************************************************************************************/ | |
67 | ||
68 | #define PTR 0x00 /* Indexed register set pointer register */ | |
69 | /* NOTE: The CHANNELNUM and ADDRESS words can */ | |
70 | /* be modified independently of each other. */ | |
71 | ||
72 | #define DATA 0x04 /* Indexed register set data register */ | |
73 | ||
74 | #define IPR 0x08 /* Global interrupt pending register */ | |
75 | /* Clear pending interrupts by writing a 1 to */ | |
76 | /* the relevant bits and zero to the other bits */ | |
77 | #define IPR_MIDITRANSBUFEMPTY 0x00000001 /* MIDI UART transmit buffer empty */ | |
78 | #define IPR_MIDIRECVBUFEMPTY 0x00000002 /* MIDI UART receive buffer empty */ | |
79 | #define IPR_CH_0_LOOP 0x00000800 /* Channel 0 loop */ | |
80 | #define IPR_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */ | |
81 | #define IPR_CAP_0_LOOP 0x00080000 /* Channel capture loop */ | |
82 | #define IPR_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */ | |
83 | ||
84 | #define INTE 0x0c /* Interrupt enable register */ | |
85 | #define INTE_MIDITXENABLE 0x00000001 /* Enable MIDI transmit-buffer-empty interrupts */ | |
86 | #define INTE_MIDIRXENABLE 0x00000002 /* Enable MIDI receive-buffer-empty interrupts */ | |
87 | #define INTE_CH_0_LOOP 0x00000800 /* Channel 0 loop */ | |
88 | #define INTE_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */ | |
89 | #define INTE_CAP_0_LOOP 0x00080000 /* Channel capture loop */ | |
90 | #define INTE_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */ | |
91 | ||
92 | #define HCFG 0x14 /* Hardware config register */ | |
93 | ||
94 | #define HCFG_LOCKSOUNDCACHE 0x00000008 /* 1 = Cancel bustmaster accesses to soundcache */ | |
95 | /* NOTE: This should generally never be used. */ | |
96 | #define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */ | |
97 | /* Should be set to 1 when the EMU10K1 is */ | |
98 | /* completely initialized. */ | |
99 | #define GPIO 0x18 /* Defaults: 00001080-Analog, 00001000-SPDIF. */ | |
100 | ||
101 | ||
102 | #define AC97DATA 0x1c /* AC97 register set data register (16 bit) */ | |
103 | ||
104 | #define AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */ | |
105 | ||
106 | /********************************************************************************************************/ | |
107 | /* Emu10k1x pointer-offset register set, accessed through the PTR and DATA registers */ | |
108 | /********************************************************************************************************/ | |
109 | #define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */ | |
110 | /* One list entry: 4 bytes for DMA address, | |
111 | * 4 bytes for period_size << 16. | |
112 | * One list entry is 8 bytes long. | |
113 | * One list entry for each period in the buffer. | |
114 | */ | |
115 | #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */ | |
116 | #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */ | |
b595076a | 117 | #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */ |
1da177e4 LT |
118 | #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */ |
119 | #define PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */ | |
120 | #define PLAYBACK_UNKNOWN1 0x07 | |
121 | #define PLAYBACK_UNKNOWN2 0x08 | |
122 | ||
123 | /* Only one capture channel supported */ | |
124 | #define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */ | |
125 | #define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */ | |
126 | #define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */ | |
127 | #define CAPTURE_UNKNOWN 0x13 | |
128 | ||
129 | /* From 0x20 - 0x3f, last samples played on each channel */ | |
130 | ||
131 | #define TRIGGER_CHANNEL 0x40 /* Trigger channel playback */ | |
132 | #define TRIGGER_CHANNEL_0 0x00000001 /* Trigger channel 0 */ | |
133 | #define TRIGGER_CHANNEL_1 0x00000002 /* Trigger channel 1 */ | |
134 | #define TRIGGER_CHANNEL_2 0x00000004 /* Trigger channel 2 */ | |
135 | #define TRIGGER_CAPTURE 0x00000100 /* Trigger capture channel */ | |
136 | ||
137 | #define ROUTING 0x41 /* Setup sound routing ? */ | |
138 | #define ROUTING_FRONT_LEFT 0x00000001 | |
139 | #define ROUTING_FRONT_RIGHT 0x00000002 | |
140 | #define ROUTING_REAR_LEFT 0x00000004 | |
141 | #define ROUTING_REAR_RIGHT 0x00000008 | |
142 | #define ROUTING_CENTER_LFE 0x00010000 | |
143 | ||
144 | #define SPCS0 0x42 /* SPDIF output Channel Status 0 register */ | |
145 | ||
146 | #define SPCS1 0x43 /* SPDIF output Channel Status 1 register */ | |
147 | ||
148 | #define SPCS2 0x44 /* SPDIF output Channel Status 2 register */ | |
149 | ||
150 | #define SPCS_CLKACCYMASK 0x30000000 /* Clock accuracy */ | |
151 | #define SPCS_CLKACCY_1000PPM 0x00000000 /* 1000 parts per million */ | |
152 | #define SPCS_CLKACCY_50PPM 0x10000000 /* 50 parts per million */ | |
153 | #define SPCS_CLKACCY_VARIABLE 0x20000000 /* Variable accuracy */ | |
154 | #define SPCS_SAMPLERATEMASK 0x0f000000 /* Sample rate */ | |
155 | #define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */ | |
156 | #define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */ | |
157 | #define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */ | |
158 | #define SPCS_CHANNELNUMMASK 0x00f00000 /* Channel number */ | |
159 | #define SPCS_CHANNELNUM_UNSPEC 0x00000000 /* Unspecified channel number */ | |
160 | #define SPCS_CHANNELNUM_LEFT 0x00100000 /* Left channel */ | |
161 | #define SPCS_CHANNELNUM_RIGHT 0x00200000 /* Right channel */ | |
162 | #define SPCS_SOURCENUMMASK 0x000f0000 /* Source number */ | |
163 | #define SPCS_SOURCENUM_UNSPEC 0x00000000 /* Unspecified source number */ | |
164 | #define SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */ | |
165 | #define SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */ | |
166 | #define SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */ | |
167 | #define SPCS_EMPHASISMASK 0x00000038 /* Emphasis */ | |
168 | #define SPCS_EMPHASIS_NONE 0x00000000 /* No emphasis */ | |
169 | #define SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */ | |
170 | #define SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */ | |
171 | #define SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */ | |
172 | #define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */ | |
173 | ||
174 | #define SPDIF_SELECT 0x45 /* Enables SPDIF or Analogue outputs 0-Analogue, 0x700-SPDIF */ | |
175 | ||
176 | /* This is the MPU port on the card */ | |
177 | #define MUDATA 0x47 | |
178 | #define MUCMD 0x48 | |
179 | #define MUSTAT MUCMD | |
180 | ||
181 | /* From 0x50 - 0x5f, last samples captured */ | |
182 | ||
183 | /** | |
184 | * The hardware has 3 channels for playback and 1 for capture. | |
185 | * - channel 0 is the front channel | |
186 | * - channel 1 is the rear channel | |
af901ca1 | 187 | * - channel 2 is the center/lfe channel |
1da177e4 LT |
188 | * Volume is controlled by the AC97 for the front and rear channels by |
189 | * the PCM Playback Volume, Sigmatel Surround Playback Volume and | |
190 | * Surround Playback Volume. The Sigmatel 4-Speaker Stereo switch affects | |
191 | * the front/rear channel mixing in the REAR OUT jack. When using the | |
192 | * 4-Speaker Stereo, both front and rear channels will be mixed in the | |
193 | * REAR OUT. | |
194 | * The center/lfe channel has no volume control and cannot be muted during | |
195 | * playback. | |
196 | */ | |
197 | ||
4b32f1aa TI |
198 | struct emu10k1x_voice { |
199 | struct emu10k1x *emu; | |
1da177e4 LT |
200 | int number; |
201 | int use; | |
202 | ||
4b32f1aa | 203 | struct emu10k1x_pcm *epcm; |
1da177e4 LT |
204 | }; |
205 | ||
4b32f1aa TI |
206 | struct emu10k1x_pcm { |
207 | struct emu10k1x *emu; | |
208 | struct snd_pcm_substream *substream; | |
209 | struct emu10k1x_voice *voice; | |
1da177e4 LT |
210 | unsigned short running; |
211 | }; | |
212 | ||
4b32f1aa TI |
213 | struct emu10k1x_midi { |
214 | struct emu10k1x *emu; | |
215 | struct snd_rawmidi *rmidi; | |
216 | struct snd_rawmidi_substream *substream_input; | |
217 | struct snd_rawmidi_substream *substream_output; | |
1da177e4 LT |
218 | unsigned int midi_mode; |
219 | spinlock_t input_lock; | |
220 | spinlock_t output_lock; | |
221 | spinlock_t open_lock; | |
222 | int tx_enable, rx_enable; | |
223 | int port; | |
224 | int ipr_tx, ipr_rx; | |
4b32f1aa TI |
225 | void (*interrupt)(struct emu10k1x *emu, unsigned int status); |
226 | }; | |
1da177e4 LT |
227 | |
228 | // definition of the chip-specific record | |
4b32f1aa TI |
229 | struct emu10k1x { |
230 | struct snd_card *card; | |
1da177e4 LT |
231 | struct pci_dev *pci; |
232 | ||
233 | unsigned long port; | |
234 | struct resource *res_port; | |
235 | int irq; | |
236 | ||
01f681da | 237 | unsigned char revision; /* chip revision */ |
1da177e4 LT |
238 | unsigned int serial; /* serial number */ |
239 | unsigned short model; /* subsystem id */ | |
240 | ||
241 | spinlock_t emu_lock; | |
242 | spinlock_t voice_lock; | |
243 | ||
4b32f1aa TI |
244 | struct snd_ac97 *ac97; |
245 | struct snd_pcm *pcm; | |
1da177e4 | 246 | |
4b32f1aa TI |
247 | struct emu10k1x_voice voices[3]; |
248 | struct emu10k1x_voice capture_voice; | |
1da177e4 LT |
249 | u32 spdif_bits[3]; // SPDIF out setup |
250 | ||
251 | struct snd_dma_buffer dma_buffer; | |
252 | ||
4b32f1aa | 253 | struct emu10k1x_midi midi; |
1da177e4 LT |
254 | }; |
255 | ||
256 | /* hardware definition */ | |
4b32f1aa | 257 | static struct snd_pcm_hardware snd_emu10k1x_playback_hw = { |
1da177e4 LT |
258 | .info = (SNDRV_PCM_INFO_MMAP | |
259 | SNDRV_PCM_INFO_INTERLEAVED | | |
260 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
261 | SNDRV_PCM_INFO_MMAP_VALID), | |
262 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
263 | .rates = SNDRV_PCM_RATE_48000, | |
264 | .rate_min = 48000, | |
265 | .rate_max = 48000, | |
266 | .channels_min = 2, | |
267 | .channels_max = 2, | |
268 | .buffer_bytes_max = (32*1024), | |
269 | .period_bytes_min = 64, | |
270 | .period_bytes_max = (16*1024), | |
271 | .periods_min = 2, | |
272 | .periods_max = 8, | |
273 | .fifo_size = 0, | |
274 | }; | |
275 | ||
4b32f1aa | 276 | static struct snd_pcm_hardware snd_emu10k1x_capture_hw = { |
1da177e4 LT |
277 | .info = (SNDRV_PCM_INFO_MMAP | |
278 | SNDRV_PCM_INFO_INTERLEAVED | | |
279 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
280 | SNDRV_PCM_INFO_MMAP_VALID), | |
281 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
282 | .rates = SNDRV_PCM_RATE_48000, | |
283 | .rate_min = 48000, | |
284 | .rate_max = 48000, | |
285 | .channels_min = 2, | |
286 | .channels_max = 2, | |
287 | .buffer_bytes_max = (32*1024), | |
288 | .period_bytes_min = 64, | |
289 | .period_bytes_max = (16*1024), | |
290 | .periods_min = 2, | |
291 | .periods_max = 2, | |
292 | .fifo_size = 0, | |
293 | }; | |
294 | ||
4b32f1aa | 295 | static unsigned int snd_emu10k1x_ptr_read(struct emu10k1x * emu, |
1da177e4 LT |
296 | unsigned int reg, |
297 | unsigned int chn) | |
298 | { | |
299 | unsigned long flags; | |
300 | unsigned int regptr, val; | |
301 | ||
302 | regptr = (reg << 16) | chn; | |
303 | ||
304 | spin_lock_irqsave(&emu->emu_lock, flags); | |
305 | outl(regptr, emu->port + PTR); | |
306 | val = inl(emu->port + DATA); | |
307 | spin_unlock_irqrestore(&emu->emu_lock, flags); | |
308 | return val; | |
309 | } | |
310 | ||
4b32f1aa | 311 | static void snd_emu10k1x_ptr_write(struct emu10k1x *emu, |
1da177e4 LT |
312 | unsigned int reg, |
313 | unsigned int chn, | |
314 | unsigned int data) | |
315 | { | |
316 | unsigned int regptr; | |
317 | unsigned long flags; | |
318 | ||
319 | regptr = (reg << 16) | chn; | |
320 | ||
321 | spin_lock_irqsave(&emu->emu_lock, flags); | |
322 | outl(regptr, emu->port + PTR); | |
323 | outl(data, emu->port + DATA); | |
324 | spin_unlock_irqrestore(&emu->emu_lock, flags); | |
325 | } | |
326 | ||
4b32f1aa | 327 | static void snd_emu10k1x_intr_enable(struct emu10k1x *emu, unsigned int intrenb) |
1da177e4 LT |
328 | { |
329 | unsigned long flags; | |
f2948fc2 HH |
330 | unsigned int intr_enable; |
331 | ||
1da177e4 | 332 | spin_lock_irqsave(&emu->emu_lock, flags); |
f2948fc2 HH |
333 | intr_enable = inl(emu->port + INTE) | intrenb; |
334 | outl(intr_enable, emu->port + INTE); | |
1da177e4 LT |
335 | spin_unlock_irqrestore(&emu->emu_lock, flags); |
336 | } | |
337 | ||
4b32f1aa | 338 | static void snd_emu10k1x_intr_disable(struct emu10k1x *emu, unsigned int intrenb) |
1da177e4 LT |
339 | { |
340 | unsigned long flags; | |
f2948fc2 HH |
341 | unsigned int intr_enable; |
342 | ||
1da177e4 | 343 | spin_lock_irqsave(&emu->emu_lock, flags); |
f2948fc2 HH |
344 | intr_enable = inl(emu->port + INTE) & ~intrenb; |
345 | outl(intr_enable, emu->port + INTE); | |
1da177e4 LT |
346 | spin_unlock_irqrestore(&emu->emu_lock, flags); |
347 | } | |
348 | ||
4b32f1aa | 349 | static void snd_emu10k1x_gpio_write(struct emu10k1x *emu, unsigned int value) |
1da177e4 LT |
350 | { |
351 | unsigned long flags; | |
352 | ||
353 | spin_lock_irqsave(&emu->emu_lock, flags); | |
354 | outl(value, emu->port + GPIO); | |
355 | spin_unlock_irqrestore(&emu->emu_lock, flags); | |
356 | } | |
357 | ||
4b32f1aa | 358 | static void snd_emu10k1x_pcm_free_substream(struct snd_pcm_runtime *runtime) |
1da177e4 | 359 | { |
4d572776 | 360 | kfree(runtime->private_data); |
1da177e4 LT |
361 | } |
362 | ||
4b32f1aa | 363 | static void snd_emu10k1x_pcm_interrupt(struct emu10k1x *emu, struct emu10k1x_voice *voice) |
1da177e4 | 364 | { |
4b32f1aa | 365 | struct emu10k1x_pcm *epcm; |
1da177e4 LT |
366 | |
367 | if ((epcm = voice->epcm) == NULL) | |
368 | return; | |
369 | if (epcm->substream == NULL) | |
370 | return; | |
371 | #if 0 | |
26bc6964 TI |
372 | dev_info(emu->card->dev, |
373 | "IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n", | |
1da177e4 LT |
374 | epcm->substream->ops->pointer(epcm->substream), |
375 | snd_pcm_lib_period_bytes(epcm->substream), | |
376 | snd_pcm_lib_buffer_bytes(epcm->substream)); | |
377 | #endif | |
378 | snd_pcm_period_elapsed(epcm->substream); | |
379 | } | |
380 | ||
381 | /* open callback */ | |
4b32f1aa | 382 | static int snd_emu10k1x_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 383 | { |
4b32f1aa TI |
384 | struct emu10k1x *chip = snd_pcm_substream_chip(substream); |
385 | struct emu10k1x_pcm *epcm; | |
386 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
387 | int err; |
388 | ||
389 | if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) { | |
390 | return err; | |
391 | } | |
392 | if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0) | |
393 | return err; | |
394 | ||
e560d8d8 | 395 | epcm = kzalloc(sizeof(*epcm), GFP_KERNEL); |
1da177e4 LT |
396 | if (epcm == NULL) |
397 | return -ENOMEM; | |
398 | epcm->emu = chip; | |
399 | epcm->substream = substream; | |
400 | ||
401 | runtime->private_data = epcm; | |
402 | runtime->private_free = snd_emu10k1x_pcm_free_substream; | |
403 | ||
404 | runtime->hw = snd_emu10k1x_playback_hw; | |
405 | ||
406 | return 0; | |
407 | } | |
408 | ||
409 | /* close callback */ | |
4b32f1aa | 410 | static int snd_emu10k1x_playback_close(struct snd_pcm_substream *substream) |
1da177e4 LT |
411 | { |
412 | return 0; | |
413 | } | |
414 | ||
415 | /* hw_params callback */ | |
4b32f1aa TI |
416 | static int snd_emu10k1x_pcm_hw_params(struct snd_pcm_substream *substream, |
417 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 418 | { |
4b32f1aa TI |
419 | struct snd_pcm_runtime *runtime = substream->runtime; |
420 | struct emu10k1x_pcm *epcm = runtime->private_data; | |
1da177e4 LT |
421 | |
422 | if (! epcm->voice) { | |
423 | epcm->voice = &epcm->emu->voices[substream->pcm->device]; | |
424 | epcm->voice->use = 1; | |
425 | epcm->voice->epcm = epcm; | |
426 | } | |
427 | ||
428 | return snd_pcm_lib_malloc_pages(substream, | |
429 | params_buffer_bytes(hw_params)); | |
430 | } | |
431 | ||
432 | /* hw_free callback */ | |
4b32f1aa | 433 | static int snd_emu10k1x_pcm_hw_free(struct snd_pcm_substream *substream) |
1da177e4 | 434 | { |
4b32f1aa TI |
435 | struct snd_pcm_runtime *runtime = substream->runtime; |
436 | struct emu10k1x_pcm *epcm; | |
1da177e4 LT |
437 | |
438 | if (runtime->private_data == NULL) | |
439 | return 0; | |
440 | ||
441 | epcm = runtime->private_data; | |
442 | ||
443 | if (epcm->voice) { | |
444 | epcm->voice->use = 0; | |
445 | epcm->voice->epcm = NULL; | |
446 | epcm->voice = NULL; | |
447 | } | |
448 | ||
449 | return snd_pcm_lib_free_pages(substream); | |
450 | } | |
451 | ||
452 | /* prepare callback */ | |
4b32f1aa | 453 | static int snd_emu10k1x_pcm_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 454 | { |
4b32f1aa TI |
455 | struct emu10k1x *emu = snd_pcm_substream_chip(substream); |
456 | struct snd_pcm_runtime *runtime = substream->runtime; | |
457 | struct emu10k1x_pcm *epcm = runtime->private_data; | |
1da177e4 LT |
458 | int voice = epcm->voice->number; |
459 | u32 *table_base = (u32 *)(emu->dma_buffer.area+1024*voice); | |
460 | u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size); | |
461 | int i; | |
462 | ||
9f4bd5dd | 463 | for(i = 0; i < runtime->periods; i++) { |
1da177e4 LT |
464 | *table_base++=runtime->dma_addr+(i*period_size_bytes); |
465 | *table_base++=period_size_bytes<<16; | |
466 | } | |
467 | ||
468 | snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_ADDR, voice, emu->dma_buffer.addr+1024*voice); | |
469 | snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_SIZE, voice, (runtime->periods - 1) << 19); | |
470 | snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_PTR, voice, 0); | |
471 | snd_emu10k1x_ptr_write(emu, PLAYBACK_POINTER, voice, 0); | |
472 | snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN1, voice, 0); | |
473 | snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN2, voice, 0); | |
474 | snd_emu10k1x_ptr_write(emu, PLAYBACK_DMA_ADDR, voice, runtime->dma_addr); | |
475 | ||
476 | snd_emu10k1x_ptr_write(emu, PLAYBACK_PERIOD_SIZE, voice, frames_to_bytes(runtime, runtime->period_size)<<16); | |
477 | ||
478 | return 0; | |
479 | } | |
480 | ||
481 | /* trigger callback */ | |
4b32f1aa | 482 | static int snd_emu10k1x_pcm_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
483 | int cmd) |
484 | { | |
4b32f1aa TI |
485 | struct emu10k1x *emu = snd_pcm_substream_chip(substream); |
486 | struct snd_pcm_runtime *runtime = substream->runtime; | |
487 | struct emu10k1x_pcm *epcm = runtime->private_data; | |
1da177e4 LT |
488 | int channel = epcm->voice->number; |
489 | int result = 0; | |
490 | ||
26bc6964 TI |
491 | /* |
492 | dev_dbg(emu->card->dev, | |
493 | "trigger - emu10k1x = 0x%x, cmd = %i, pointer = %d\n", | |
494 | (int)emu, cmd, (int)substream->ops->pointer(substream)); | |
495 | */ | |
1da177e4 LT |
496 | |
497 | switch (cmd) { | |
498 | case SNDRV_PCM_TRIGGER_START: | |
499 | if(runtime->periods == 2) | |
500 | snd_emu10k1x_intr_enable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel); | |
501 | else | |
502 | snd_emu10k1x_intr_enable(emu, INTE_CH_0_LOOP << channel); | |
503 | epcm->running = 1; | |
504 | snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|(TRIGGER_CHANNEL_0<<channel)); | |
505 | break; | |
506 | case SNDRV_PCM_TRIGGER_STOP: | |
507 | epcm->running = 0; | |
508 | snd_emu10k1x_intr_disable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel); | |
509 | snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CHANNEL_0<<channel)); | |
510 | break; | |
511 | default: | |
512 | result = -EINVAL; | |
513 | break; | |
514 | } | |
515 | return result; | |
516 | } | |
517 | ||
518 | /* pointer callback */ | |
519 | static snd_pcm_uframes_t | |
4b32f1aa | 520 | snd_emu10k1x_pcm_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 521 | { |
4b32f1aa TI |
522 | struct emu10k1x *emu = snd_pcm_substream_chip(substream); |
523 | struct snd_pcm_runtime *runtime = substream->runtime; | |
524 | struct emu10k1x_pcm *epcm = runtime->private_data; | |
1da177e4 LT |
525 | int channel = epcm->voice->number; |
526 | snd_pcm_uframes_t ptr = 0, ptr1 = 0, ptr2= 0,ptr3 = 0,ptr4 = 0; | |
527 | ||
528 | if (!epcm->running) | |
529 | return 0; | |
530 | ||
531 | ptr3 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel); | |
532 | ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel); | |
533 | ptr4 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel); | |
534 | ||
535 | if(ptr4 == 0 && ptr1 == frames_to_bytes(runtime, runtime->buffer_size)) | |
536 | return 0; | |
537 | ||
538 | if (ptr3 != ptr4) | |
539 | ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel); | |
540 | ptr2 = bytes_to_frames(runtime, ptr1); | |
541 | ptr2 += (ptr4 >> 3) * runtime->period_size; | |
542 | ptr = ptr2; | |
543 | ||
544 | if (ptr >= runtime->buffer_size) | |
545 | ptr -= runtime->buffer_size; | |
546 | ||
547 | return ptr; | |
548 | } | |
549 | ||
550 | /* operators */ | |
4b32f1aa | 551 | static struct snd_pcm_ops snd_emu10k1x_playback_ops = { |
1da177e4 LT |
552 | .open = snd_emu10k1x_playback_open, |
553 | .close = snd_emu10k1x_playback_close, | |
554 | .ioctl = snd_pcm_lib_ioctl, | |
555 | .hw_params = snd_emu10k1x_pcm_hw_params, | |
556 | .hw_free = snd_emu10k1x_pcm_hw_free, | |
557 | .prepare = snd_emu10k1x_pcm_prepare, | |
558 | .trigger = snd_emu10k1x_pcm_trigger, | |
559 | .pointer = snd_emu10k1x_pcm_pointer, | |
560 | }; | |
561 | ||
562 | /* open_capture callback */ | |
4b32f1aa | 563 | static int snd_emu10k1x_pcm_open_capture(struct snd_pcm_substream *substream) |
1da177e4 | 564 | { |
4b32f1aa TI |
565 | struct emu10k1x *chip = snd_pcm_substream_chip(substream); |
566 | struct emu10k1x_pcm *epcm; | |
567 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
568 | int err; |
569 | ||
570 | if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) | |
571 | return err; | |
572 | if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0) | |
573 | return err; | |
574 | ||
e560d8d8 | 575 | epcm = kzalloc(sizeof(*epcm), GFP_KERNEL); |
1da177e4 LT |
576 | if (epcm == NULL) |
577 | return -ENOMEM; | |
578 | ||
579 | epcm->emu = chip; | |
580 | epcm->substream = substream; | |
581 | ||
582 | runtime->private_data = epcm; | |
583 | runtime->private_free = snd_emu10k1x_pcm_free_substream; | |
584 | ||
585 | runtime->hw = snd_emu10k1x_capture_hw; | |
586 | ||
587 | return 0; | |
588 | } | |
589 | ||
590 | /* close callback */ | |
4b32f1aa | 591 | static int snd_emu10k1x_pcm_close_capture(struct snd_pcm_substream *substream) |
1da177e4 LT |
592 | { |
593 | return 0; | |
594 | } | |
595 | ||
596 | /* hw_params callback */ | |
4b32f1aa TI |
597 | static int snd_emu10k1x_pcm_hw_params_capture(struct snd_pcm_substream *substream, |
598 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 599 | { |
4b32f1aa TI |
600 | struct snd_pcm_runtime *runtime = substream->runtime; |
601 | struct emu10k1x_pcm *epcm = runtime->private_data; | |
1da177e4 LT |
602 | |
603 | if (! epcm->voice) { | |
604 | if (epcm->emu->capture_voice.use) | |
605 | return -EBUSY; | |
606 | epcm->voice = &epcm->emu->capture_voice; | |
607 | epcm->voice->epcm = epcm; | |
608 | epcm->voice->use = 1; | |
609 | } | |
610 | ||
611 | return snd_pcm_lib_malloc_pages(substream, | |
612 | params_buffer_bytes(hw_params)); | |
613 | } | |
614 | ||
615 | /* hw_free callback */ | |
4b32f1aa | 616 | static int snd_emu10k1x_pcm_hw_free_capture(struct snd_pcm_substream *substream) |
1da177e4 | 617 | { |
4b32f1aa | 618 | struct snd_pcm_runtime *runtime = substream->runtime; |
1da177e4 | 619 | |
4b32f1aa | 620 | struct emu10k1x_pcm *epcm; |
1da177e4 LT |
621 | |
622 | if (runtime->private_data == NULL) | |
623 | return 0; | |
624 | epcm = runtime->private_data; | |
625 | ||
626 | if (epcm->voice) { | |
627 | epcm->voice->use = 0; | |
628 | epcm->voice->epcm = NULL; | |
629 | epcm->voice = NULL; | |
630 | } | |
631 | ||
632 | return snd_pcm_lib_free_pages(substream); | |
633 | } | |
634 | ||
635 | /* prepare capture callback */ | |
4b32f1aa | 636 | static int snd_emu10k1x_pcm_prepare_capture(struct snd_pcm_substream *substream) |
1da177e4 | 637 | { |
4b32f1aa TI |
638 | struct emu10k1x *emu = snd_pcm_substream_chip(substream); |
639 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
640 | |
641 | snd_emu10k1x_ptr_write(emu, CAPTURE_DMA_ADDR, 0, runtime->dma_addr); | |
642 | snd_emu10k1x_ptr_write(emu, CAPTURE_BUFFER_SIZE, 0, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes | |
643 | snd_emu10k1x_ptr_write(emu, CAPTURE_POINTER, 0, 0); | |
644 | snd_emu10k1x_ptr_write(emu, CAPTURE_UNKNOWN, 0, 0); | |
645 | ||
646 | return 0; | |
647 | } | |
648 | ||
649 | /* trigger_capture callback */ | |
4b32f1aa | 650 | static int snd_emu10k1x_pcm_trigger_capture(struct snd_pcm_substream *substream, |
1da177e4 LT |
651 | int cmd) |
652 | { | |
4b32f1aa TI |
653 | struct emu10k1x *emu = snd_pcm_substream_chip(substream); |
654 | struct snd_pcm_runtime *runtime = substream->runtime; | |
655 | struct emu10k1x_pcm *epcm = runtime->private_data; | |
1da177e4 LT |
656 | int result = 0; |
657 | ||
658 | switch (cmd) { | |
659 | case SNDRV_PCM_TRIGGER_START: | |
660 | snd_emu10k1x_intr_enable(emu, INTE_CAP_0_LOOP | | |
661 | INTE_CAP_0_HALF_LOOP); | |
662 | snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|TRIGGER_CAPTURE); | |
663 | epcm->running = 1; | |
664 | break; | |
665 | case SNDRV_PCM_TRIGGER_STOP: | |
666 | epcm->running = 0; | |
667 | snd_emu10k1x_intr_disable(emu, INTE_CAP_0_LOOP | | |
668 | INTE_CAP_0_HALF_LOOP); | |
669 | snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CAPTURE)); | |
670 | break; | |
671 | default: | |
672 | result = -EINVAL; | |
673 | break; | |
674 | } | |
675 | return result; | |
676 | } | |
677 | ||
678 | /* pointer_capture callback */ | |
679 | static snd_pcm_uframes_t | |
4b32f1aa | 680 | snd_emu10k1x_pcm_pointer_capture(struct snd_pcm_substream *substream) |
1da177e4 | 681 | { |
4b32f1aa TI |
682 | struct emu10k1x *emu = snd_pcm_substream_chip(substream); |
683 | struct snd_pcm_runtime *runtime = substream->runtime; | |
684 | struct emu10k1x_pcm *epcm = runtime->private_data; | |
1da177e4 LT |
685 | snd_pcm_uframes_t ptr; |
686 | ||
687 | if (!epcm->running) | |
688 | return 0; | |
689 | ||
690 | ptr = bytes_to_frames(runtime, snd_emu10k1x_ptr_read(emu, CAPTURE_POINTER, 0)); | |
691 | if (ptr >= runtime->buffer_size) | |
692 | ptr -= runtime->buffer_size; | |
693 | ||
694 | return ptr; | |
695 | } | |
696 | ||
4b32f1aa | 697 | static struct snd_pcm_ops snd_emu10k1x_capture_ops = { |
1da177e4 LT |
698 | .open = snd_emu10k1x_pcm_open_capture, |
699 | .close = snd_emu10k1x_pcm_close_capture, | |
700 | .ioctl = snd_pcm_lib_ioctl, | |
701 | .hw_params = snd_emu10k1x_pcm_hw_params_capture, | |
702 | .hw_free = snd_emu10k1x_pcm_hw_free_capture, | |
703 | .prepare = snd_emu10k1x_pcm_prepare_capture, | |
704 | .trigger = snd_emu10k1x_pcm_trigger_capture, | |
705 | .pointer = snd_emu10k1x_pcm_pointer_capture, | |
706 | }; | |
707 | ||
4b32f1aa | 708 | static unsigned short snd_emu10k1x_ac97_read(struct snd_ac97 *ac97, |
1da177e4 LT |
709 | unsigned short reg) |
710 | { | |
4b32f1aa | 711 | struct emu10k1x *emu = ac97->private_data; |
1da177e4 LT |
712 | unsigned long flags; |
713 | unsigned short val; | |
714 | ||
715 | spin_lock_irqsave(&emu->emu_lock, flags); | |
716 | outb(reg, emu->port + AC97ADDRESS); | |
717 | val = inw(emu->port + AC97DATA); | |
718 | spin_unlock_irqrestore(&emu->emu_lock, flags); | |
719 | return val; | |
720 | } | |
721 | ||
4b32f1aa | 722 | static void snd_emu10k1x_ac97_write(struct snd_ac97 *ac97, |
1da177e4 LT |
723 | unsigned short reg, unsigned short val) |
724 | { | |
4b32f1aa | 725 | struct emu10k1x *emu = ac97->private_data; |
1da177e4 LT |
726 | unsigned long flags; |
727 | ||
728 | spin_lock_irqsave(&emu->emu_lock, flags); | |
729 | outb(reg, emu->port + AC97ADDRESS); | |
730 | outw(val, emu->port + AC97DATA); | |
731 | spin_unlock_irqrestore(&emu->emu_lock, flags); | |
732 | } | |
733 | ||
4b32f1aa | 734 | static int snd_emu10k1x_ac97(struct emu10k1x *chip) |
1da177e4 | 735 | { |
4b32f1aa TI |
736 | struct snd_ac97_bus *pbus; |
737 | struct snd_ac97_template ac97; | |
1da177e4 | 738 | int err; |
4b32f1aa | 739 | static struct snd_ac97_bus_ops ops = { |
1da177e4 LT |
740 | .write = snd_emu10k1x_ac97_write, |
741 | .read = snd_emu10k1x_ac97_read, | |
742 | }; | |
743 | ||
744 | if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0) | |
745 | return err; | |
746 | pbus->no_vra = 1; /* we don't need VRA */ | |
747 | ||
748 | memset(&ac97, 0, sizeof(ac97)); | |
749 | ac97.private_data = chip; | |
750 | ac97.scaps = AC97_SCAP_NO_SPDIF; | |
751 | return snd_ac97_mixer(pbus, &ac97, &chip->ac97); | |
752 | } | |
753 | ||
4b32f1aa | 754 | static int snd_emu10k1x_free(struct emu10k1x *chip) |
1da177e4 LT |
755 | { |
756 | snd_emu10k1x_ptr_write(chip, TRIGGER_CHANNEL, 0, 0); | |
757 | // disable interrupts | |
758 | outl(0, chip->port + INTE); | |
759 | // disable audio | |
760 | outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG); | |
761 | ||
ebf029da | 762 | /* release the irq */ |
1da177e4 | 763 | if (chip->irq >= 0) |
437a5a46 | 764 | free_irq(chip->irq, chip); |
1da177e4 | 765 | |
ebf029da TI |
766 | // release the i/o port |
767 | release_and_free_resource(chip->res_port); | |
768 | ||
1da177e4 LT |
769 | // release the DMA |
770 | if (chip->dma_buffer.area) { | |
771 | snd_dma_free_pages(&chip->dma_buffer); | |
772 | } | |
773 | ||
774 | pci_disable_device(chip->pci); | |
775 | ||
776 | // release the data | |
777 | kfree(chip); | |
778 | return 0; | |
779 | } | |
780 | ||
4b32f1aa | 781 | static int snd_emu10k1x_dev_free(struct snd_device *device) |
1da177e4 | 782 | { |
4b32f1aa | 783 | struct emu10k1x *chip = device->device_data; |
1da177e4 LT |
784 | return snd_emu10k1x_free(chip); |
785 | } | |
786 | ||
7d12e780 | 787 | static irqreturn_t snd_emu10k1x_interrupt(int irq, void *dev_id) |
1da177e4 LT |
788 | { |
789 | unsigned int status; | |
790 | ||
4b32f1aa TI |
791 | struct emu10k1x *chip = dev_id; |
792 | struct emu10k1x_voice *pvoice = chip->voices; | |
1da177e4 LT |
793 | int i; |
794 | int mask; | |
795 | ||
796 | status = inl(chip->port + IPR); | |
797 | ||
89173bd4 TI |
798 | if (! status) |
799 | return IRQ_NONE; | |
800 | ||
801 | // capture interrupt | |
802 | if (status & (IPR_CAP_0_LOOP | IPR_CAP_0_HALF_LOOP)) { | |
f2948fc2 HH |
803 | struct emu10k1x_voice *cap_voice = &chip->capture_voice; |
804 | if (cap_voice->use) | |
805 | snd_emu10k1x_pcm_interrupt(chip, cap_voice); | |
89173bd4 TI |
806 | else |
807 | snd_emu10k1x_intr_disable(chip, | |
808 | INTE_CAP_0_LOOP | | |
809 | INTE_CAP_0_HALF_LOOP); | |
810 | } | |
1da177e4 | 811 | |
89173bd4 TI |
812 | mask = IPR_CH_0_LOOP|IPR_CH_0_HALF_LOOP; |
813 | for (i = 0; i < 3; i++) { | |
814 | if (status & mask) { | |
815 | if (pvoice->use) | |
816 | snd_emu10k1x_pcm_interrupt(chip, pvoice); | |
817 | else | |
818 | snd_emu10k1x_intr_disable(chip, mask); | |
1da177e4 | 819 | } |
89173bd4 TI |
820 | pvoice++; |
821 | mask <<= 1; | |
822 | } | |
1da177e4 | 823 | |
89173bd4 TI |
824 | if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) { |
825 | if (chip->midi.interrupt) | |
826 | chip->midi.interrupt(chip, status); | |
827 | else | |
828 | snd_emu10k1x_intr_disable(chip, INTE_MIDITXENABLE|INTE_MIDIRXENABLE); | |
1da177e4 | 829 | } |
89173bd4 TI |
830 | |
831 | // acknowledge the interrupt if necessary | |
832 | outl(status, chip->port + IPR); | |
1da177e4 | 833 | |
26bc6964 | 834 | /* dev_dbg(chip->card->dev, "interrupt %08x\n", status); */ |
1da177e4 LT |
835 | return IRQ_HANDLED; |
836 | } | |
837 | ||
3adc497f TI |
838 | static const struct snd_pcm_chmap_elem surround_map[] = { |
839 | { .channels = 2, | |
840 | .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, | |
841 | { } | |
842 | }; | |
843 | ||
844 | static const struct snd_pcm_chmap_elem clfe_map[] = { | |
845 | { .channels = 2, | |
846 | .map = { SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE } }, | |
847 | { } | |
848 | }; | |
849 | ||
e23e7a14 | 850 | static int snd_emu10k1x_pcm(struct emu10k1x *emu, int device, struct snd_pcm **rpcm) |
1da177e4 | 851 | { |
4b32f1aa | 852 | struct snd_pcm *pcm; |
3adc497f | 853 | const struct snd_pcm_chmap_elem *map = NULL; |
1da177e4 LT |
854 | int err; |
855 | int capture = 0; | |
856 | ||
857 | if (rpcm) | |
858 | *rpcm = NULL; | |
859 | if (device == 0) | |
860 | capture = 1; | |
861 | ||
862 | if ((err = snd_pcm_new(emu->card, "emu10k1x", device, 1, capture, &pcm)) < 0) | |
863 | return err; | |
864 | ||
865 | pcm->private_data = emu; | |
1da177e4 LT |
866 | |
867 | switch(device) { | |
868 | case 0: | |
869 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops); | |
870 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1x_capture_ops); | |
871 | break; | |
872 | case 1: | |
873 | case 2: | |
874 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops); | |
875 | break; | |
876 | } | |
877 | ||
878 | pcm->info_flags = 0; | |
1da177e4 LT |
879 | switch(device) { |
880 | case 0: | |
881 | strcpy(pcm->name, "EMU10K1X Front"); | |
3adc497f | 882 | map = snd_pcm_std_chmaps; |
1da177e4 LT |
883 | break; |
884 | case 1: | |
885 | strcpy(pcm->name, "EMU10K1X Rear"); | |
3adc497f | 886 | map = surround_map; |
1da177e4 LT |
887 | break; |
888 | case 2: | |
889 | strcpy(pcm->name, "EMU10K1X Center/LFE"); | |
3adc497f | 890 | map = clfe_map; |
1da177e4 LT |
891 | break; |
892 | } | |
893 | emu->pcm = pcm; | |
894 | ||
895 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
896 | snd_dma_pci_data(emu->pci), | |
897 | 32*1024, 32*1024); | |
898 | ||
3adc497f TI |
899 | err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, map, 2, |
900 | 1 << 2, NULL); | |
901 | if (err < 0) | |
902 | return err; | |
903 | ||
1da177e4 LT |
904 | if (rpcm) |
905 | *rpcm = pcm; | |
906 | ||
907 | return 0; | |
908 | } | |
909 | ||
e23e7a14 BP |
910 | static int snd_emu10k1x_create(struct snd_card *card, |
911 | struct pci_dev *pci, | |
912 | struct emu10k1x **rchip) | |
1da177e4 | 913 | { |
4b32f1aa | 914 | struct emu10k1x *chip; |
1da177e4 LT |
915 | int err; |
916 | int ch; | |
4b32f1aa | 917 | static struct snd_device_ops ops = { |
1da177e4 LT |
918 | .dev_free = snd_emu10k1x_dev_free, |
919 | }; | |
9d2f928d | 920 | |
1da177e4 | 921 | *rchip = NULL; |
9d2f928d | 922 | |
1da177e4 LT |
923 | if ((err = pci_enable_device(pci)) < 0) |
924 | return err; | |
ce0b6201 YH |
925 | if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 || |
926 | pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) { | |
26bc6964 | 927 | dev_err(card->dev, "error to set 28bit mask DMA\n"); |
1da177e4 LT |
928 | pci_disable_device(pci); |
929 | return -ENXIO; | |
930 | } | |
9d2f928d | 931 | |
e560d8d8 | 932 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 LT |
933 | if (chip == NULL) { |
934 | pci_disable_device(pci); | |
935 | return -ENOMEM; | |
936 | } | |
9d2f928d | 937 | |
1da177e4 LT |
938 | chip->card = card; |
939 | chip->pci = pci; | |
940 | chip->irq = -1; | |
941 | ||
942 | spin_lock_init(&chip->emu_lock); | |
943 | spin_lock_init(&chip->voice_lock); | |
944 | ||
945 | chip->port = pci_resource_start(pci, 0); | |
946 | if ((chip->res_port = request_region(chip->port, 8, | |
947 | "EMU10K1X")) == NULL) { | |
26bc6964 TI |
948 | dev_err(card->dev, "cannot allocate the port 0x%lx\n", |
949 | chip->port); | |
1da177e4 LT |
950 | snd_emu10k1x_free(chip); |
951 | return -EBUSY; | |
952 | } | |
953 | ||
954 | if (request_irq(pci->irq, snd_emu10k1x_interrupt, | |
934c2b6d | 955 | IRQF_SHARED, KBUILD_MODNAME, chip)) { |
26bc6964 | 956 | dev_err(card->dev, "cannot grab irq %d\n", pci->irq); |
1da177e4 LT |
957 | snd_emu10k1x_free(chip); |
958 | return -EBUSY; | |
959 | } | |
960 | chip->irq = pci->irq; | |
961 | ||
962 | if(snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), | |
963 | 4 * 1024, &chip->dma_buffer) < 0) { | |
964 | snd_emu10k1x_free(chip); | |
965 | return -ENOMEM; | |
966 | } | |
967 | ||
968 | pci_set_master(pci); | |
969 | /* read revision & serial */ | |
44c10138 | 970 | chip->revision = pci->revision; |
1da177e4 LT |
971 | pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial); |
972 | pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model); | |
26bc6964 | 973 | dev_info(card->dev, "Model %04x Rev %08x Serial %08x\n", chip->model, |
1da177e4 LT |
974 | chip->revision, chip->serial); |
975 | ||
976 | outl(0, chip->port + INTE); | |
977 | ||
978 | for(ch = 0; ch < 3; ch++) { | |
979 | chip->voices[ch].emu = chip; | |
980 | chip->voices[ch].number = ch; | |
981 | } | |
982 | ||
983 | /* | |
984 | * Init to 0x02109204 : | |
985 | * Clock accuracy = 0 (1000ppm) | |
986 | * Sample Rate = 2 (48kHz) | |
987 | * Audio Channel = 1 (Left of 2) | |
988 | * Source Number = 0 (Unspecified) | |
989 | * Generation Status = 1 (Original for Cat Code 12) | |
990 | * Cat Code = 12 (Digital Signal Mixer) | |
991 | * Mode = 0 (Mode 0) | |
992 | * Emphasis = 0 (None) | |
993 | * CP = 1 (Copyright unasserted) | |
994 | * AN = 0 (Audio data) | |
995 | * P = 0 (Consumer) | |
996 | */ | |
997 | snd_emu10k1x_ptr_write(chip, SPCS0, 0, | |
998 | chip->spdif_bits[0] = | |
999 | SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | | |
1000 | SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | | |
1001 | SPCS_GENERATIONSTATUS | 0x00001200 | | |
1002 | 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT); | |
1003 | snd_emu10k1x_ptr_write(chip, SPCS1, 0, | |
1004 | chip->spdif_bits[1] = | |
1005 | SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | | |
1006 | SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | | |
1007 | SPCS_GENERATIONSTATUS | 0x00001200 | | |
1008 | 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT); | |
1009 | snd_emu10k1x_ptr_write(chip, SPCS2, 0, | |
1010 | chip->spdif_bits[2] = | |
1011 | SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | | |
1012 | SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | | |
1013 | SPCS_GENERATIONSTATUS | 0x00001200 | | |
1014 | 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT); | |
1015 | ||
1016 | snd_emu10k1x_ptr_write(chip, SPDIF_SELECT, 0, 0x700); // disable SPDIF | |
1017 | snd_emu10k1x_ptr_write(chip, ROUTING, 0, 0x1003F); // routing | |
1018 | snd_emu10k1x_gpio_write(chip, 0x1080); // analog mode | |
1019 | ||
1020 | outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG); | |
1021 | ||
1022 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, | |
1023 | chip, &ops)) < 0) { | |
1024 | snd_emu10k1x_free(chip); | |
1025 | return err; | |
1026 | } | |
1027 | *rchip = chip; | |
1028 | return 0; | |
1029 | } | |
1030 | ||
4b32f1aa TI |
1031 | static void snd_emu10k1x_proc_reg_read(struct snd_info_entry *entry, |
1032 | struct snd_info_buffer *buffer) | |
1da177e4 | 1033 | { |
4b32f1aa | 1034 | struct emu10k1x *emu = entry->private_data; |
1da177e4 LT |
1035 | unsigned long value,value1,value2; |
1036 | unsigned long flags; | |
1037 | int i; | |
1038 | ||
1039 | snd_iprintf(buffer, "Registers:\n\n"); | |
1040 | for(i = 0; i < 0x20; i+=4) { | |
1041 | spin_lock_irqsave(&emu->emu_lock, flags); | |
1042 | value = inl(emu->port + i); | |
1043 | spin_unlock_irqrestore(&emu->emu_lock, flags); | |
1044 | snd_iprintf(buffer, "Register %02X: %08lX\n", i, value); | |
1045 | } | |
1046 | snd_iprintf(buffer, "\nRegisters\n\n"); | |
1047 | for(i = 0; i <= 0x48; i++) { | |
1048 | value = snd_emu10k1x_ptr_read(emu, i, 0); | |
1049 | if(i < 0x10 || (i >= 0x20 && i < 0x40)) { | |
1050 | value1 = snd_emu10k1x_ptr_read(emu, i, 1); | |
1051 | value2 = snd_emu10k1x_ptr_read(emu, i, 2); | |
1052 | snd_iprintf(buffer, "%02X: %08lX %08lX %08lX\n", i, value, value1, value2); | |
1053 | } else { | |
1054 | snd_iprintf(buffer, "%02X: %08lX\n", i, value); | |
1055 | } | |
1056 | } | |
1057 | } | |
1058 | ||
4b32f1aa TI |
1059 | static void snd_emu10k1x_proc_reg_write(struct snd_info_entry *entry, |
1060 | struct snd_info_buffer *buffer) | |
1da177e4 | 1061 | { |
4b32f1aa | 1062 | struct emu10k1x *emu = entry->private_data; |
1da177e4 LT |
1063 | char line[64]; |
1064 | unsigned int reg, channel_id , val; | |
1065 | ||
1066 | while (!snd_info_get_line(buffer, line, sizeof(line))) { | |
1067 | if (sscanf(line, "%x %x %x", ®, &channel_id, &val) != 3) | |
1068 | continue; | |
1069 | ||
84ed1a19 | 1070 | if (reg < 0x49 && val <= 0xffffffff && channel_id <= 2) |
1da177e4 LT |
1071 | snd_emu10k1x_ptr_write(emu, reg, channel_id, val); |
1072 | } | |
1073 | } | |
1074 | ||
e23e7a14 | 1075 | static int snd_emu10k1x_proc_init(struct emu10k1x *emu) |
1da177e4 | 1076 | { |
4b32f1aa | 1077 | struct snd_info_entry *entry; |
1da177e4 LT |
1078 | |
1079 | if(! snd_card_proc_new(emu->card, "emu10k1x_regs", &entry)) { | |
bf850204 | 1080 | snd_info_set_text_ops(entry, emu, snd_emu10k1x_proc_reg_read); |
1da177e4 | 1081 | entry->c.text.write = snd_emu10k1x_proc_reg_write; |
bd7bf042 | 1082 | entry->mode |= S_IWUSR; |
1da177e4 LT |
1083 | entry->private_data = emu; |
1084 | } | |
1085 | ||
1086 | return 0; | |
1087 | } | |
1088 | ||
a5ce8890 | 1089 | #define snd_emu10k1x_shared_spdif_info snd_ctl_boolean_mono_info |
1da177e4 | 1090 | |
4b32f1aa TI |
1091 | static int snd_emu10k1x_shared_spdif_get(struct snd_kcontrol *kcontrol, |
1092 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1093 | { |
4b32f1aa | 1094 | struct emu10k1x *emu = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1095 | |
1096 | ucontrol->value.integer.value[0] = (snd_emu10k1x_ptr_read(emu, SPDIF_SELECT, 0) == 0x700) ? 0 : 1; | |
1097 | ||
1098 | return 0; | |
1099 | } | |
1100 | ||
4b32f1aa TI |
1101 | static int snd_emu10k1x_shared_spdif_put(struct snd_kcontrol *kcontrol, |
1102 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1103 | { |
4b32f1aa | 1104 | struct emu10k1x *emu = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1105 | unsigned int val; |
1106 | int change = 0; | |
1107 | ||
1108 | val = ucontrol->value.integer.value[0] ; | |
1109 | ||
1110 | if (val) { | |
1111 | // enable spdif output | |
1112 | snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x000); | |
1113 | snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x700); | |
1114 | snd_emu10k1x_gpio_write(emu, 0x1000); | |
1115 | } else { | |
1116 | // disable spdif output | |
1117 | snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x700); | |
1118 | snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x1003F); | |
1119 | snd_emu10k1x_gpio_write(emu, 0x1080); | |
1120 | } | |
1121 | return change; | |
1122 | } | |
1123 | ||
e23e7a14 | 1124 | static struct snd_kcontrol_new snd_emu10k1x_shared_spdif = |
1da177e4 LT |
1125 | { |
1126 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1127 | .name = "Analog/Digital Output Jack", | |
1128 | .info = snd_emu10k1x_shared_spdif_info, | |
1129 | .get = snd_emu10k1x_shared_spdif_get, | |
1130 | .put = snd_emu10k1x_shared_spdif_put | |
1131 | }; | |
1132 | ||
4b32f1aa | 1133 | static int snd_emu10k1x_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1134 | { |
1135 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
1136 | uinfo->count = 1; | |
1137 | return 0; | |
1138 | } | |
1139 | ||
4b32f1aa TI |
1140 | static int snd_emu10k1x_spdif_get(struct snd_kcontrol *kcontrol, |
1141 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1142 | { |
4b32f1aa | 1143 | struct emu10k1x *emu = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1144 | unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
1145 | ||
1146 | ucontrol->value.iec958.status[0] = (emu->spdif_bits[idx] >> 0) & 0xff; | |
1147 | ucontrol->value.iec958.status[1] = (emu->spdif_bits[idx] >> 8) & 0xff; | |
1148 | ucontrol->value.iec958.status[2] = (emu->spdif_bits[idx] >> 16) & 0xff; | |
1149 | ucontrol->value.iec958.status[3] = (emu->spdif_bits[idx] >> 24) & 0xff; | |
1150 | return 0; | |
1151 | } | |
1152 | ||
4b32f1aa TI |
1153 | static int snd_emu10k1x_spdif_get_mask(struct snd_kcontrol *kcontrol, |
1154 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 LT |
1155 | { |
1156 | ucontrol->value.iec958.status[0] = 0xff; | |
1157 | ucontrol->value.iec958.status[1] = 0xff; | |
1158 | ucontrol->value.iec958.status[2] = 0xff; | |
1159 | ucontrol->value.iec958.status[3] = 0xff; | |
1160 | return 0; | |
1161 | } | |
1162 | ||
4b32f1aa TI |
1163 | static int snd_emu10k1x_spdif_put(struct snd_kcontrol *kcontrol, |
1164 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1165 | { |
4b32f1aa | 1166 | struct emu10k1x *emu = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1167 | unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
1168 | int change; | |
1169 | unsigned int val; | |
1170 | ||
1171 | val = (ucontrol->value.iec958.status[0] << 0) | | |
1172 | (ucontrol->value.iec958.status[1] << 8) | | |
1173 | (ucontrol->value.iec958.status[2] << 16) | | |
1174 | (ucontrol->value.iec958.status[3] << 24); | |
1175 | change = val != emu->spdif_bits[idx]; | |
1176 | if (change) { | |
1177 | snd_emu10k1x_ptr_write(emu, SPCS0 + idx, 0, val); | |
1178 | emu->spdif_bits[idx] = val; | |
1179 | } | |
1180 | return change; | |
1181 | } | |
1182 | ||
4b32f1aa | 1183 | static struct snd_kcontrol_new snd_emu10k1x_spdif_mask_control = |
1da177e4 LT |
1184 | { |
1185 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
5549d549 | 1186 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1da177e4 LT |
1187 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK), |
1188 | .count = 3, | |
1189 | .info = snd_emu10k1x_spdif_info, | |
1190 | .get = snd_emu10k1x_spdif_get_mask | |
1191 | }; | |
1192 | ||
4b32f1aa | 1193 | static struct snd_kcontrol_new snd_emu10k1x_spdif_control = |
1da177e4 | 1194 | { |
5549d549 | 1195 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1da177e4 LT |
1196 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), |
1197 | .count = 3, | |
1198 | .info = snd_emu10k1x_spdif_info, | |
1199 | .get = snd_emu10k1x_spdif_get, | |
1200 | .put = snd_emu10k1x_spdif_put | |
1201 | }; | |
1202 | ||
e23e7a14 | 1203 | static int snd_emu10k1x_mixer(struct emu10k1x *emu) |
1da177e4 LT |
1204 | { |
1205 | int err; | |
4b32f1aa TI |
1206 | struct snd_kcontrol *kctl; |
1207 | struct snd_card *card = emu->card; | |
1da177e4 LT |
1208 | |
1209 | if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_mask_control, emu)) == NULL) | |
1210 | return -ENOMEM; | |
1211 | if ((err = snd_ctl_add(card, kctl))) | |
1212 | return err; | |
1213 | if ((kctl = snd_ctl_new1(&snd_emu10k1x_shared_spdif, emu)) == NULL) | |
1214 | return -ENOMEM; | |
1215 | if ((err = snd_ctl_add(card, kctl))) | |
1216 | return err; | |
1217 | if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_control, emu)) == NULL) | |
1218 | return -ENOMEM; | |
1219 | if ((err = snd_ctl_add(card, kctl))) | |
1220 | return err; | |
1221 | ||
1222 | return 0; | |
1223 | } | |
1224 | ||
1225 | #define EMU10K1X_MIDI_MODE_INPUT (1<<0) | |
1226 | #define EMU10K1X_MIDI_MODE_OUTPUT (1<<1) | |
1227 | ||
4b32f1aa | 1228 | static inline unsigned char mpu401_read(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int idx) |
1da177e4 LT |
1229 | { |
1230 | return (unsigned char)snd_emu10k1x_ptr_read(emu, mpu->port + idx, 0); | |
1231 | } | |
1232 | ||
4b32f1aa | 1233 | static inline void mpu401_write(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int data, int idx) |
1da177e4 LT |
1234 | { |
1235 | snd_emu10k1x_ptr_write(emu, mpu->port + idx, 0, data); | |
1236 | } | |
1237 | ||
1238 | #define mpu401_write_data(emu, mpu, data) mpu401_write(emu, mpu, data, 0) | |
1239 | #define mpu401_write_cmd(emu, mpu, data) mpu401_write(emu, mpu, data, 1) | |
1240 | #define mpu401_read_data(emu, mpu) mpu401_read(emu, mpu, 0) | |
1241 | #define mpu401_read_stat(emu, mpu) mpu401_read(emu, mpu, 1) | |
1242 | ||
1243 | #define mpu401_input_avail(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x80)) | |
1244 | #define mpu401_output_ready(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x40)) | |
1245 | ||
1246 | #define MPU401_RESET 0xff | |
1247 | #define MPU401_ENTER_UART 0x3f | |
1248 | #define MPU401_ACK 0xfe | |
1249 | ||
4b32f1aa | 1250 | static void mpu401_clear_rx(struct emu10k1x *emu, struct emu10k1x_midi *mpu) |
1da177e4 LT |
1251 | { |
1252 | int timeout = 100000; | |
1253 | for (; timeout > 0 && mpu401_input_avail(emu, mpu); timeout--) | |
1254 | mpu401_read_data(emu, mpu); | |
1255 | #ifdef CONFIG_SND_DEBUG | |
1256 | if (timeout <= 0) | |
26bc6964 TI |
1257 | dev_err(emu->card->dev, |
1258 | "cmd: clear rx timeout (status = 0x%x)\n", | |
1259 | mpu401_read_stat(emu, mpu)); | |
1da177e4 LT |
1260 | #endif |
1261 | } | |
1262 | ||
1263 | /* | |
1264 | ||
1265 | */ | |
1266 | ||
4b32f1aa TI |
1267 | static void do_emu10k1x_midi_interrupt(struct emu10k1x *emu, |
1268 | struct emu10k1x_midi *midi, unsigned int status) | |
1da177e4 LT |
1269 | { |
1270 | unsigned char byte; | |
1271 | ||
1272 | if (midi->rmidi == NULL) { | |
1273 | snd_emu10k1x_intr_disable(emu, midi->tx_enable | midi->rx_enable); | |
1274 | return; | |
1275 | } | |
1276 | ||
1277 | spin_lock(&midi->input_lock); | |
1278 | if ((status & midi->ipr_rx) && mpu401_input_avail(emu, midi)) { | |
1279 | if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) { | |
1280 | mpu401_clear_rx(emu, midi); | |
1281 | } else { | |
1282 | byte = mpu401_read_data(emu, midi); | |
1283 | if (midi->substream_input) | |
1284 | snd_rawmidi_receive(midi->substream_input, &byte, 1); | |
1285 | } | |
1286 | } | |
1287 | spin_unlock(&midi->input_lock); | |
1288 | ||
1289 | spin_lock(&midi->output_lock); | |
1290 | if ((status & midi->ipr_tx) && mpu401_output_ready(emu, midi)) { | |
1291 | if (midi->substream_output && | |
1292 | snd_rawmidi_transmit(midi->substream_output, &byte, 1) == 1) { | |
1293 | mpu401_write_data(emu, midi, byte); | |
1294 | } else { | |
1295 | snd_emu10k1x_intr_disable(emu, midi->tx_enable); | |
1296 | } | |
1297 | } | |
1298 | spin_unlock(&midi->output_lock); | |
1299 | } | |
1300 | ||
4b32f1aa | 1301 | static void snd_emu10k1x_midi_interrupt(struct emu10k1x *emu, unsigned int status) |
1da177e4 LT |
1302 | { |
1303 | do_emu10k1x_midi_interrupt(emu, &emu->midi, status); | |
1304 | } | |
1305 | ||
b130807d | 1306 | static int snd_emu10k1x_midi_cmd(struct emu10k1x * emu, |
4b32f1aa | 1307 | struct emu10k1x_midi *midi, unsigned char cmd, int ack) |
1da177e4 LT |
1308 | { |
1309 | unsigned long flags; | |
1310 | int timeout, ok; | |
1311 | ||
1312 | spin_lock_irqsave(&midi->input_lock, flags); | |
1313 | mpu401_write_data(emu, midi, 0x00); | |
1314 | /* mpu401_clear_rx(emu, midi); */ | |
1315 | ||
1316 | mpu401_write_cmd(emu, midi, cmd); | |
1317 | if (ack) { | |
1318 | ok = 0; | |
1319 | timeout = 10000; | |
1320 | while (!ok && timeout-- > 0) { | |
1321 | if (mpu401_input_avail(emu, midi)) { | |
1322 | if (mpu401_read_data(emu, midi) == MPU401_ACK) | |
1323 | ok = 1; | |
1324 | } | |
1325 | } | |
1326 | if (!ok && mpu401_read_data(emu, midi) == MPU401_ACK) | |
1327 | ok = 1; | |
1328 | } else { | |
1329 | ok = 1; | |
1330 | } | |
1331 | spin_unlock_irqrestore(&midi->input_lock, flags); | |
b130807d | 1332 | if (!ok) { |
26bc6964 TI |
1333 | dev_err(emu->card->dev, |
1334 | "midi_cmd: 0x%x failed at 0x%lx (status = 0x%x, data = 0x%x)!!!\n", | |
1da177e4 LT |
1335 | cmd, emu->port, |
1336 | mpu401_read_stat(emu, midi), | |
1337 | mpu401_read_data(emu, midi)); | |
b130807d RD |
1338 | return 1; |
1339 | } | |
1340 | return 0; | |
1da177e4 LT |
1341 | } |
1342 | ||
4b32f1aa | 1343 | static int snd_emu10k1x_midi_input_open(struct snd_rawmidi_substream *substream) |
1da177e4 | 1344 | { |
4b32f1aa TI |
1345 | struct emu10k1x *emu; |
1346 | struct emu10k1x_midi *midi = substream->rmidi->private_data; | |
1da177e4 LT |
1347 | unsigned long flags; |
1348 | ||
1349 | emu = midi->emu; | |
da3cec35 TI |
1350 | if (snd_BUG_ON(!emu)) |
1351 | return -ENXIO; | |
1da177e4 LT |
1352 | spin_lock_irqsave(&midi->open_lock, flags); |
1353 | midi->midi_mode |= EMU10K1X_MIDI_MODE_INPUT; | |
1354 | midi->substream_input = substream; | |
1355 | if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) { | |
1356 | spin_unlock_irqrestore(&midi->open_lock, flags); | |
b130807d RD |
1357 | if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1)) |
1358 | goto error_out; | |
1359 | if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1)) | |
1360 | goto error_out; | |
1da177e4 LT |
1361 | } else { |
1362 | spin_unlock_irqrestore(&midi->open_lock, flags); | |
1363 | } | |
1364 | return 0; | |
b130807d RD |
1365 | |
1366 | error_out: | |
1367 | return -EIO; | |
1da177e4 LT |
1368 | } |
1369 | ||
4b32f1aa | 1370 | static int snd_emu10k1x_midi_output_open(struct snd_rawmidi_substream *substream) |
1da177e4 | 1371 | { |
4b32f1aa TI |
1372 | struct emu10k1x *emu; |
1373 | struct emu10k1x_midi *midi = substream->rmidi->private_data; | |
1da177e4 LT |
1374 | unsigned long flags; |
1375 | ||
1376 | emu = midi->emu; | |
da3cec35 TI |
1377 | if (snd_BUG_ON(!emu)) |
1378 | return -ENXIO; | |
1da177e4 LT |
1379 | spin_lock_irqsave(&midi->open_lock, flags); |
1380 | midi->midi_mode |= EMU10K1X_MIDI_MODE_OUTPUT; | |
1381 | midi->substream_output = substream; | |
1382 | if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) { | |
1383 | spin_unlock_irqrestore(&midi->open_lock, flags); | |
b130807d RD |
1384 | if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1)) |
1385 | goto error_out; | |
1386 | if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1)) | |
1387 | goto error_out; | |
1da177e4 LT |
1388 | } else { |
1389 | spin_unlock_irqrestore(&midi->open_lock, flags); | |
1390 | } | |
1391 | return 0; | |
b130807d RD |
1392 | |
1393 | error_out: | |
1394 | return -EIO; | |
1da177e4 LT |
1395 | } |
1396 | ||
4b32f1aa | 1397 | static int snd_emu10k1x_midi_input_close(struct snd_rawmidi_substream *substream) |
1da177e4 | 1398 | { |
4b32f1aa TI |
1399 | struct emu10k1x *emu; |
1400 | struct emu10k1x_midi *midi = substream->rmidi->private_data; | |
1da177e4 | 1401 | unsigned long flags; |
b130807d | 1402 | int err = 0; |
1da177e4 LT |
1403 | |
1404 | emu = midi->emu; | |
da3cec35 TI |
1405 | if (snd_BUG_ON(!emu)) |
1406 | return -ENXIO; | |
1da177e4 LT |
1407 | spin_lock_irqsave(&midi->open_lock, flags); |
1408 | snd_emu10k1x_intr_disable(emu, midi->rx_enable); | |
1409 | midi->midi_mode &= ~EMU10K1X_MIDI_MODE_INPUT; | |
1410 | midi->substream_input = NULL; | |
1411 | if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) { | |
1412 | spin_unlock_irqrestore(&midi->open_lock, flags); | |
b130807d | 1413 | err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0); |
1da177e4 LT |
1414 | } else { |
1415 | spin_unlock_irqrestore(&midi->open_lock, flags); | |
1416 | } | |
b130807d | 1417 | return err; |
1da177e4 LT |
1418 | } |
1419 | ||
4b32f1aa | 1420 | static int snd_emu10k1x_midi_output_close(struct snd_rawmidi_substream *substream) |
1da177e4 | 1421 | { |
4b32f1aa TI |
1422 | struct emu10k1x *emu; |
1423 | struct emu10k1x_midi *midi = substream->rmidi->private_data; | |
1da177e4 | 1424 | unsigned long flags; |
b130807d | 1425 | int err = 0; |
1da177e4 LT |
1426 | |
1427 | emu = midi->emu; | |
da3cec35 TI |
1428 | if (snd_BUG_ON(!emu)) |
1429 | return -ENXIO; | |
1da177e4 LT |
1430 | spin_lock_irqsave(&midi->open_lock, flags); |
1431 | snd_emu10k1x_intr_disable(emu, midi->tx_enable); | |
1432 | midi->midi_mode &= ~EMU10K1X_MIDI_MODE_OUTPUT; | |
1433 | midi->substream_output = NULL; | |
1434 | if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) { | |
1435 | spin_unlock_irqrestore(&midi->open_lock, flags); | |
b130807d | 1436 | err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0); |
1da177e4 LT |
1437 | } else { |
1438 | spin_unlock_irqrestore(&midi->open_lock, flags); | |
1439 | } | |
b130807d | 1440 | return err; |
1da177e4 LT |
1441 | } |
1442 | ||
4b32f1aa | 1443 | static void snd_emu10k1x_midi_input_trigger(struct snd_rawmidi_substream *substream, int up) |
1da177e4 | 1444 | { |
4b32f1aa TI |
1445 | struct emu10k1x *emu; |
1446 | struct emu10k1x_midi *midi = substream->rmidi->private_data; | |
1da177e4 | 1447 | emu = midi->emu; |
da3cec35 TI |
1448 | if (snd_BUG_ON(!emu)) |
1449 | return; | |
1da177e4 LT |
1450 | |
1451 | if (up) | |
1452 | snd_emu10k1x_intr_enable(emu, midi->rx_enable); | |
1453 | else | |
1454 | snd_emu10k1x_intr_disable(emu, midi->rx_enable); | |
1455 | } | |
1456 | ||
4b32f1aa | 1457 | static void snd_emu10k1x_midi_output_trigger(struct snd_rawmidi_substream *substream, int up) |
1da177e4 | 1458 | { |
4b32f1aa TI |
1459 | struct emu10k1x *emu; |
1460 | struct emu10k1x_midi *midi = substream->rmidi->private_data; | |
1da177e4 LT |
1461 | unsigned long flags; |
1462 | ||
1463 | emu = midi->emu; | |
da3cec35 TI |
1464 | if (snd_BUG_ON(!emu)) |
1465 | return; | |
1da177e4 LT |
1466 | |
1467 | if (up) { | |
1468 | int max = 4; | |
1469 | unsigned char byte; | |
1470 | ||
1471 | /* try to send some amount of bytes here before interrupts */ | |
1472 | spin_lock_irqsave(&midi->output_lock, flags); | |
1473 | while (max > 0) { | |
1474 | if (mpu401_output_ready(emu, midi)) { | |
1475 | if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT) || | |
1476 | snd_rawmidi_transmit(substream, &byte, 1) != 1) { | |
1477 | /* no more data */ | |
1478 | spin_unlock_irqrestore(&midi->output_lock, flags); | |
1479 | return; | |
1480 | } | |
1481 | mpu401_write_data(emu, midi, byte); | |
1482 | max--; | |
1483 | } else { | |
1484 | break; | |
1485 | } | |
1486 | } | |
1487 | spin_unlock_irqrestore(&midi->output_lock, flags); | |
1488 | snd_emu10k1x_intr_enable(emu, midi->tx_enable); | |
1489 | } else { | |
1490 | snd_emu10k1x_intr_disable(emu, midi->tx_enable); | |
1491 | } | |
1492 | } | |
1493 | ||
1494 | /* | |
1495 | ||
1496 | */ | |
1497 | ||
4b32f1aa | 1498 | static struct snd_rawmidi_ops snd_emu10k1x_midi_output = |
1da177e4 LT |
1499 | { |
1500 | .open = snd_emu10k1x_midi_output_open, | |
1501 | .close = snd_emu10k1x_midi_output_close, | |
1502 | .trigger = snd_emu10k1x_midi_output_trigger, | |
1503 | }; | |
1504 | ||
4b32f1aa | 1505 | static struct snd_rawmidi_ops snd_emu10k1x_midi_input = |
1da177e4 LT |
1506 | { |
1507 | .open = snd_emu10k1x_midi_input_open, | |
1508 | .close = snd_emu10k1x_midi_input_close, | |
1509 | .trigger = snd_emu10k1x_midi_input_trigger, | |
1510 | }; | |
1511 | ||
4b32f1aa | 1512 | static void snd_emu10k1x_midi_free(struct snd_rawmidi *rmidi) |
1da177e4 | 1513 | { |
4b32f1aa | 1514 | struct emu10k1x_midi *midi = rmidi->private_data; |
1da177e4 LT |
1515 | midi->interrupt = NULL; |
1516 | midi->rmidi = NULL; | |
1517 | } | |
1518 | ||
e23e7a14 BP |
1519 | static int emu10k1x_midi_init(struct emu10k1x *emu, |
1520 | struct emu10k1x_midi *midi, int device, | |
1521 | char *name) | |
1da177e4 | 1522 | { |
4b32f1aa | 1523 | struct snd_rawmidi *rmidi; |
1da177e4 LT |
1524 | int err; |
1525 | ||
1526 | if ((err = snd_rawmidi_new(emu->card, name, device, 1, 1, &rmidi)) < 0) | |
1527 | return err; | |
1528 | midi->emu = emu; | |
1529 | spin_lock_init(&midi->open_lock); | |
1530 | spin_lock_init(&midi->input_lock); | |
1531 | spin_lock_init(&midi->output_lock); | |
1532 | strcpy(rmidi->name, name); | |
1533 | snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_emu10k1x_midi_output); | |
1534 | snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_emu10k1x_midi_input); | |
1535 | rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | | |
1536 | SNDRV_RAWMIDI_INFO_INPUT | | |
1537 | SNDRV_RAWMIDI_INFO_DUPLEX; | |
1538 | rmidi->private_data = midi; | |
1539 | rmidi->private_free = snd_emu10k1x_midi_free; | |
1540 | midi->rmidi = rmidi; | |
1541 | return 0; | |
1542 | } | |
1543 | ||
e23e7a14 | 1544 | static int snd_emu10k1x_midi(struct emu10k1x *emu) |
1da177e4 | 1545 | { |
4b32f1aa | 1546 | struct emu10k1x_midi *midi = &emu->midi; |
1da177e4 LT |
1547 | int err; |
1548 | ||
1549 | if ((err = emu10k1x_midi_init(emu, midi, 0, "EMU10K1X MPU-401 (UART)")) < 0) | |
1550 | return err; | |
1551 | ||
1552 | midi->tx_enable = INTE_MIDITXENABLE; | |
1553 | midi->rx_enable = INTE_MIDIRXENABLE; | |
1554 | midi->port = MUDATA; | |
1555 | midi->ipr_tx = IPR_MIDITRANSBUFEMPTY; | |
1556 | midi->ipr_rx = IPR_MIDIRECVBUFEMPTY; | |
1557 | midi->interrupt = snd_emu10k1x_midi_interrupt; | |
1558 | return 0; | |
1559 | } | |
1560 | ||
e23e7a14 BP |
1561 | static int snd_emu10k1x_probe(struct pci_dev *pci, |
1562 | const struct pci_device_id *pci_id) | |
1da177e4 LT |
1563 | { |
1564 | static int dev; | |
4b32f1aa TI |
1565 | struct snd_card *card; |
1566 | struct emu10k1x *chip; | |
1da177e4 LT |
1567 | int err; |
1568 | ||
1569 | if (dev >= SNDRV_CARDS) | |
1570 | return -ENODEV; | |
1571 | if (!enable[dev]) { | |
1572 | dev++; | |
1573 | return -ENOENT; | |
1574 | } | |
1575 | ||
60c5772b TI |
1576 | err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, |
1577 | 0, &card); | |
e58de7ba TI |
1578 | if (err < 0) |
1579 | return err; | |
1da177e4 LT |
1580 | |
1581 | if ((err = snd_emu10k1x_create(card, pci, &chip)) < 0) { | |
1582 | snd_card_free(card); | |
1583 | return err; | |
1584 | } | |
1585 | ||
1586 | if ((err = snd_emu10k1x_pcm(chip, 0, NULL)) < 0) { | |
1587 | snd_card_free(card); | |
1588 | return err; | |
1589 | } | |
1590 | if ((err = snd_emu10k1x_pcm(chip, 1, NULL)) < 0) { | |
1591 | snd_card_free(card); | |
1592 | return err; | |
1593 | } | |
1594 | if ((err = snd_emu10k1x_pcm(chip, 2, NULL)) < 0) { | |
1595 | snd_card_free(card); | |
1596 | return err; | |
1597 | } | |
1598 | ||
1599 | if ((err = snd_emu10k1x_ac97(chip)) < 0) { | |
1600 | snd_card_free(card); | |
1601 | return err; | |
1602 | } | |
1603 | ||
1604 | if ((err = snd_emu10k1x_mixer(chip)) < 0) { | |
1605 | snd_card_free(card); | |
1606 | return err; | |
1607 | } | |
1608 | ||
1609 | if ((err = snd_emu10k1x_midi(chip)) < 0) { | |
1610 | snd_card_free(card); | |
1611 | return err; | |
1612 | } | |
1613 | ||
1614 | snd_emu10k1x_proc_init(chip); | |
1615 | ||
1616 | strcpy(card->driver, "EMU10K1X"); | |
1617 | strcpy(card->shortname, "Dell Sound Blaster Live!"); | |
1618 | sprintf(card->longname, "%s at 0x%lx irq %i", | |
1619 | card->shortname, chip->port, chip->irq); | |
1620 | ||
1621 | if ((err = snd_card_register(card)) < 0) { | |
1622 | snd_card_free(card); | |
1623 | return err; | |
1624 | } | |
1625 | ||
1626 | pci_set_drvdata(pci, card); | |
1627 | dev++; | |
1628 | return 0; | |
1629 | } | |
1630 | ||
e23e7a14 | 1631 | static void snd_emu10k1x_remove(struct pci_dev *pci) |
1da177e4 LT |
1632 | { |
1633 | snd_card_free(pci_get_drvdata(pci)); | |
1da177e4 LT |
1634 | } |
1635 | ||
1636 | // PCI IDs | |
9baa3c34 | 1637 | static const struct pci_device_id snd_emu10k1x_ids[] = { |
0d7392e5 | 1638 | { PCI_VDEVICE(CREATIVE, 0x0006), 0 }, /* Dell OEM version (EMU10K1) */ |
1da177e4 LT |
1639 | { 0, } |
1640 | }; | |
1641 | MODULE_DEVICE_TABLE(pci, snd_emu10k1x_ids); | |
1642 | ||
1643 | // pci_driver definition | |
e9f66d9b | 1644 | static struct pci_driver emu10k1x_driver = { |
3733e424 | 1645 | .name = KBUILD_MODNAME, |
1da177e4 LT |
1646 | .id_table = snd_emu10k1x_ids, |
1647 | .probe = snd_emu10k1x_probe, | |
e23e7a14 | 1648 | .remove = snd_emu10k1x_remove, |
1da177e4 LT |
1649 | }; |
1650 | ||
e9f66d9b | 1651 | module_pci_driver(emu10k1x_driver); |