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PCI: PM: Skip devices in D0 for suspend-to-idle
[mirror_ubuntu-bionic-kernel.git] / sound / pci / es1938.c
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1da177e4
LT		 1/*
2 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
3 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
c1017a4c 4 * Jaroslav Kysela <perex@perex.cz>,
1da177e4
LT		 5 * Thomas Sailer <sailer@ife.ee.ethz.ch>,
6 * Abramo Bagnara <abramo@alsa-project.org>,
7 * Markus Gruber <gruber@eikon.tum.de>
8 *
9 * Rewritten from sonicvibes.c source.
10 *
11 * TODO:
12 * Rewrite better spinlocks
13 *
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 *
29 */
30
31/*
32 NOTES:
33 - Capture data is written unaligned starting from dma_base + 1 so I need to
34 disable mmap and to add a copy callback.
35 - After several cycle of the following:
36 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
37 a "playback write error (DMA or IRQ trouble?)" may happen.
38 This is due to playback interrupts not generated.
39 I suspect a timing issue.
40 - Sometimes the interrupt handler is invoked wrongly during playback.
41 This generates some harmless "Unexpected hw_pointer: wrong interrupt
42 acknowledge".
43 I've seen that using small period sizes.
44 Reproducible with:
45 mpg123 test.mp3 &
46 hdparm -t -T /dev/hda
47*/
48
49
1da177e4
LT		 50#include <linux/init.h>
51#include <linux/interrupt.h>
52#include <linux/pci.h>
53#include <linux/slab.h>
54#include <linux/gameport.h>
65a77217 55#include <linux/module.h>
1da177e4 56#include <linux/delay.h>
910638ae 57#include <linux/dma-mapping.h>
6cbbfe1c 58#include <linux/io.h>
1da177e4
LT		 59#include <sound/core.h>
60#include <sound/control.h>
61#include <sound/pcm.h>
62#include <sound/opl3.h>
63#include <sound/mpu401.h>
64#include <sound/initval.h>
0b593972 65#include <sound/tlv.h>
1da177e4 66
1da177e4
LT		 67MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
68MODULE_DESCRIPTION("ESS Solo-1");
69MODULE_LICENSE("GPL");
70MODULE_SUPPORTED_DEVICE("{{ESS,ES1938},"
71 "{ESS,ES1946},"
72 "{ESS,ES1969},"
73 "{TerraTec,128i PCI}}");
74
b2fac073 75#if IS_REACHABLE(CONFIG_GAMEPORT)
1da177e4
LT		 76#define SUPPORT_JOYSTICK 1
77#endif
78
1da177e4
LT		 79static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
80static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 81static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
1da177e4
LT		 82
83module_param_array(index, int, NULL, 0444);
84MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
85module_param_array(id, charp, NULL, 0444);
86MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
87module_param_array(enable, bool, NULL, 0444);
88MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
89
90#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
91
92#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
93
94#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
95
96#define SL_PCI_LEGACYCONTROL 0x40
97#define SL_PCI_CONFIG 0x50
98#define SL_PCI_DDMACONTROL 0x60
99
100#define ESSIO_REG_AUDIO2DMAADDR 0
101#define ESSIO_REG_AUDIO2DMACOUNT 4
102#define ESSIO_REG_AUDIO2MODE 6
103#define ESSIO_REG_IRQCONTROL 7
104
105#define ESSDM_REG_DMAADDR 0x00
106#define ESSDM_REG_DMACOUNT 0x04
107#define ESSDM_REG_DMACOMMAND 0x08
108#define ESSDM_REG_DMASTATUS 0x08
109#define ESSDM_REG_DMAMODE 0x0b
110#define ESSDM_REG_DMACLEAR 0x0d
111#define ESSDM_REG_DMAMASK 0x0f
112
113#define ESSSB_REG_FMLOWADDR 0x00
114#define ESSSB_REG_FMHIGHADDR 0x02
115#define ESSSB_REG_MIXERADDR 0x04
116#define ESSSB_REG_MIXERDATA 0x05
117
118#define ESSSB_IREG_AUDIO1 0x14
119#define ESSSB_IREG_MICMIX 0x1a
120#define ESSSB_IREG_RECSRC 0x1c
121#define ESSSB_IREG_MASTER 0x32
122#define ESSSB_IREG_FM 0x36
123#define ESSSB_IREG_AUXACD 0x38
124#define ESSSB_IREG_AUXB 0x3a
125#define ESSSB_IREG_PCSPEAKER 0x3c
126#define ESSSB_IREG_LINE 0x3e
127#define ESSSB_IREG_SPATCONTROL 0x50
128#define ESSSB_IREG_SPATLEVEL 0x52
129#define ESSSB_IREG_MASTER_LEFT 0x60
130#define ESSSB_IREG_MASTER_RIGHT 0x62
131#define ESSSB_IREG_MPU401CONTROL 0x64
132#define ESSSB_IREG_MICMIXRECORD 0x68
133#define ESSSB_IREG_AUDIO2RECORD 0x69
134#define ESSSB_IREG_AUXACDRECORD 0x6a
135#define ESSSB_IREG_FMRECORD 0x6b
136#define ESSSB_IREG_AUXBRECORD 0x6c
137#define ESSSB_IREG_MONO 0x6d
138#define ESSSB_IREG_LINERECORD 0x6e
139#define ESSSB_IREG_MONORECORD 0x6f
140#define ESSSB_IREG_AUDIO2SAMPLE 0x70
141#define ESSSB_IREG_AUDIO2MODE 0x71
142#define ESSSB_IREG_AUDIO2FILTER 0x72
143#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
144#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
145#define ESSSB_IREG_AUDIO2CONTROL1 0x78
146#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
147#define ESSSB_IREG_AUDIO2 0x7c
148
149#define ESSSB_REG_RESET 0x06
150
151#define ESSSB_REG_READDATA 0x0a
152#define ESSSB_REG_WRITEDATA 0x0c
153#define ESSSB_REG_READSTATUS 0x0c
154
155#define ESSSB_REG_STATUS 0x0e
156
157#define ESS_CMD_EXTSAMPLERATE 0xa1
158#define ESS_CMD_FILTERDIV 0xa2
159#define ESS_CMD_DMACNTRELOADL 0xa4
160#define ESS_CMD_DMACNTRELOADH 0xa5
161#define ESS_CMD_ANALOGCONTROL 0xa8
162#define ESS_CMD_IRQCONTROL 0xb1
163#define ESS_CMD_DRQCONTROL 0xb2
164#define ESS_CMD_RECLEVEL 0xb4
165#define ESS_CMD_SETFORMAT 0xb6
166#define ESS_CMD_SETFORMAT2 0xb7
167#define ESS_CMD_DMACONTROL 0xb8
168#define ESS_CMD_DMATYPE 0xb9
169#define ESS_CMD_OFFSETLEFT 0xba
170#define ESS_CMD_OFFSETRIGHT 0xbb
171#define ESS_CMD_READREG 0xc0
172#define ESS_CMD_ENABLEEXT 0xc6
173#define ESS_CMD_PAUSEDMA 0xd0
174#define ESS_CMD_ENABLEAUDIO1 0xd1
175#define ESS_CMD_STOPAUDIO1 0xd3
176#define ESS_CMD_AUDIO1STATUS 0xd8
177#define ESS_CMD_CONTDMA 0xd4
178#define ESS_CMD_TESTIRQ 0xf2
179
180#define ESS_RECSRC_MIC 0
181#define ESS_RECSRC_AUXACD 2
182#define ESS_RECSRC_AUXB 5
183#define ESS_RECSRC_LINE 6
184#define ESS_RECSRC_NONE 7
185
186#define DAC1 0x01
187#define ADC1 0x02
188#define DAC2 0x04
189
190/*
191
192 */
193
1da177e4
LT		 194#define SAVED_REG_SIZE 32 /* max. number of registers to save */
195
e571f594 196struct es1938 {
1da177e4
LT		 197 int irq;
198
199 unsigned long io_port;
200 unsigned long sb_port;
201 unsigned long vc_port;
202 unsigned long mpu_port;
203 unsigned long game_port;
204 unsigned long ddma_port;
205
206 unsigned char irqmask;
207 unsigned char revision;
208
e571f594
TI		 209 struct snd_kcontrol *hw_volume;
210 struct snd_kcontrol *hw_switch;
211 struct snd_kcontrol *master_volume;
212 struct snd_kcontrol *master_switch;
1da177e4
LT		 213
214 struct pci_dev *pci;
e571f594
TI		 215 struct snd_card *card;
216 struct snd_pcm *pcm;
217 struct snd_pcm_substream *capture_substream;
218 struct snd_pcm_substream *playback1_substream;
219 struct snd_pcm_substream *playback2_substream;
220 struct snd_rawmidi *rmidi;
1da177e4
LT		 221
222 unsigned int dma1_size;
223 unsigned int dma2_size;
224 unsigned int dma1_start;
225 unsigned int dma2_start;
226 unsigned int dma1_shift;
227 unsigned int dma2_shift;
19e2e3c3 228 unsigned int last_capture_dmaaddr;
1da177e4
LT		 229 unsigned int active;
230
231 spinlock_t reg_lock;
232 spinlock_t mixer_lock;
e571f594 233 struct snd_info_entry *proc_entry;
1da177e4
LT		 234
235#ifdef SUPPORT_JOYSTICK
236 struct gameport *gameport;
237#endif
c7561cd8 238#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 239 unsigned char saved_regs[SAVED_REG_SIZE];
240#endif
241};
242
7d12e780 243static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
1da177e4 244
9baa3c34 245static const struct pci_device_id snd_es1938_ids[] = {
28d27aae 246 { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
1da177e4
LT		 247 { 0, }
248};
249
250MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
251
252#define RESET_LOOP_TIMEOUT 0x10000
253#define WRITE_LOOP_TIMEOUT 0x10000
254#define GET_LOOP_TIMEOUT 0x01000
255
1da177e4
LT		 256/* -----------------------------------------------------------------
257 * Write to a mixer register
258 * -----------------------------------------------------------------*/
e571f594 259static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT		 260{
261 unsigned long flags;
262 spin_lock_irqsave(&chip->mixer_lock, flags);
263 outb(reg, SLSB_REG(chip, MIXERADDR));
264 outb(val, SLSB_REG(chip, MIXERDATA));
265 spin_unlock_irqrestore(&chip->mixer_lock, flags);
ebebecaa 266 dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
1da177e4
LT		 267}
268
269/* -----------------------------------------------------------------
270 * Read from a mixer register
271 * -----------------------------------------------------------------*/
e571f594 272static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 273{
274 int data;
275 unsigned long flags;
276 spin_lock_irqsave(&chip->mixer_lock, flags);
277 outb(reg, SLSB_REG(chip, MIXERADDR));
278 data = inb(SLSB_REG(chip, MIXERDATA));
279 spin_unlock_irqrestore(&chip->mixer_lock, flags);
ebebecaa 280 dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
1da177e4
LT		 281 return data;
282}
283
284/* -----------------------------------------------------------------
285 * Write to some bits of a mixer register (return old value)
286 * -----------------------------------------------------------------*/
e571f594
TI		 287static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
288 unsigned char mask, unsigned char val)
1da177e4
LT		 289{
290 unsigned long flags;
291 unsigned char old, new, oval;
292 spin_lock_irqsave(&chip->mixer_lock, flags);
293 outb(reg, SLSB_REG(chip, MIXERADDR));
294 old = inb(SLSB_REG(chip, MIXERDATA));
295 oval = old & mask;
296 if (val != oval) {
297 new = (old & ~mask) | (val & mask);
298 outb(new, SLSB_REG(chip, MIXERDATA));
ebebecaa
TI		 299 dev_dbg(chip->card->dev,
300 "Mixer reg %02x was %02x, set to %02x\n",
99b359ba 301 reg, old, new);
1da177e4
LT		 302 }
303 spin_unlock_irqrestore(&chip->mixer_lock, flags);
304 return oval;
305}
306
307/* -----------------------------------------------------------------
308 * Write command to Controller Registers
309 * -----------------------------------------------------------------*/
e571f594 310static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
1da177e4
LT		 311{
312 int i;
313 unsigned char v;
314 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
315 if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
316 outb(cmd, SLSB_REG(chip, WRITEDATA));
317 return;
318 }
319 }
ebebecaa
TI		 320 dev_err(chip->card->dev,
321 "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
1da177e4
LT		 322}
323
324/* -----------------------------------------------------------------
325 * Read the Read Data Buffer
326 * -----------------------------------------------------------------*/
e571f594 327static int snd_es1938_get_byte(struct es1938 *chip)
1da177e4
LT		 328{
329 int i;
330 unsigned char v;
331 for (i = GET_LOOP_TIMEOUT; i; i--)
332 if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
333 return inb(SLSB_REG(chip, READDATA));
ebebecaa 334 dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
1da177e4
LT		 335 return -ENODEV;
336}
337
338/* -----------------------------------------------------------------
339 * Write value cmd register
340 * -----------------------------------------------------------------*/
e571f594 341static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT		 342{
343 unsigned long flags;
344 spin_lock_irqsave(&chip->reg_lock, flags);
345 snd_es1938_write_cmd(chip, reg);
346 snd_es1938_write_cmd(chip, val);
347 spin_unlock_irqrestore(&chip->reg_lock, flags);
ebebecaa 348 dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
1da177e4
LT		 349}
350
351/* -----------------------------------------------------------------
352 * Read data from cmd register and return it
353 * -----------------------------------------------------------------*/
e571f594 354static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 355{
356 unsigned char val;
357 unsigned long flags;
358 spin_lock_irqsave(&chip->reg_lock, flags);
359 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
360 snd_es1938_write_cmd(chip, reg);
361 val = snd_es1938_get_byte(chip);
362 spin_unlock_irqrestore(&chip->reg_lock, flags);
ebebecaa 363 dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
1da177e4
LT		 364 return val;
365}
366
367/* -----------------------------------------------------------------
368 * Write data to cmd register and return old value
369 * -----------------------------------------------------------------*/
e571f594
TI		 370static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
371 unsigned char val)
1da177e4
LT		 372{
373 unsigned long flags;
374 unsigned char old, new, oval;
375 spin_lock_irqsave(&chip->reg_lock, flags);
376 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
377 snd_es1938_write_cmd(chip, reg);
378 old = snd_es1938_get_byte(chip);
379 oval = old & mask;
380 if (val != oval) {
381 snd_es1938_write_cmd(chip, reg);
382 new = (old & ~mask) | (val & mask);
383 snd_es1938_write_cmd(chip, new);
ebebecaa 384 dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
99b359ba 385 reg, old, new);
1da177e4
LT		 386 }
387 spin_unlock_irqrestore(&chip->reg_lock, flags);
388 return oval;
389}
390
391/* --------------------------------------------------------------------
392 * Reset the chip
393 * --------------------------------------------------------------------*/
e571f594 394static void snd_es1938_reset(struct es1938 *chip)
1da177e4
LT		 395{
396 int i;
397
398 outb(3, SLSB_REG(chip, RESET));
399 inb(SLSB_REG(chip, RESET));
400 outb(0, SLSB_REG(chip, RESET));
401 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
402 if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
403 if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
404 goto __next;
405 }
406 }
ebebecaa 407 dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
1da177e4
LT		 408
409 __next:
410 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
411
412 /* Demand transfer DMA: 4 bytes per DMA request */
413 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
414
415 /* Change behaviour of register A1
416 4x oversampling
417 2nd channel DAC asynchronous */
418 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
419 /* enable/select DMA channel and IRQ channel */
420 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
421 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
422 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
423 /* Set spatializer parameters to recommended values */
424 snd_es1938_mixer_write(chip, 0x54, 0x8f);
425 snd_es1938_mixer_write(chip, 0x56, 0x95);
426 snd_es1938_mixer_write(chip, 0x58, 0x94);
427 snd_es1938_mixer_write(chip, 0x5a, 0x80);
428}
429
430/* --------------------------------------------------------------------
431 * Reset the FIFOs
432 * --------------------------------------------------------------------*/
e571f594 433static void snd_es1938_reset_fifo(struct es1938 *chip)
1da177e4
LT		 434{
435 outb(2, SLSB_REG(chip, RESET));
436 outb(0, SLSB_REG(chip, RESET));
437}
438
44d71507 439static const struct snd_ratnum clocks[2] = {
1da177e4
LT		 440 {
441 .num = 793800,
442 .den_min = 1,
443 .den_max = 128,
444 .den_step = 1,
445 },
446 {
447 .num = 768000,
448 .den_min = 1,
449 .den_max = 128,
450 .den_step = 1,
451 }
452};
453
44d71507 454static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
1da177e4
LT		 455 .nrats = 2,
456 .rats = clocks,
457};
458
459
e571f594
TI		 460static void snd_es1938_rate_set(struct es1938 *chip,
461 struct snd_pcm_substream *substream,
1da177e4
LT		 462 int mode)
463{
464 unsigned int bits, div0;
e571f594 465 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 466 if (runtime->rate_num == clocks[0].num)
467 bits = 128 - runtime->rate_den;
468 else
469 bits = 256 - runtime->rate_den;
470
471 /* set filter register */
472 div0 = 256 - 7160000*20/(8*82*runtime->rate);
473
474 if (mode == DAC2) {
475 snd_es1938_mixer_write(chip, 0x70, bits);
476 snd_es1938_mixer_write(chip, 0x72, div0);
477 } else {
478 snd_es1938_write(chip, 0xA1, bits);
479 snd_es1938_write(chip, 0xA2, div0);
480 }
481}
482
483/* --------------------------------------------------------------------
484 * Configure Solo1 builtin DMA Controller
485 * --------------------------------------------------------------------*/
486
e571f594 487static void snd_es1938_playback1_setdma(struct es1938 *chip)
1da177e4
LT		 488{
489 outb(0x00, SLIO_REG(chip, AUDIO2MODE));
490 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
491 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
492 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
493}
494
e571f594 495static void snd_es1938_playback2_setdma(struct es1938 *chip)
1da177e4
LT		 496{
497 /* Enable DMA controller */
498 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
499 /* 1. Master reset */
500 outb(0, SLDM_REG(chip, DMACLEAR));
501 /* 2. Mask DMA */
502 outb(1, SLDM_REG(chip, DMAMASK));
503 outb(0x18, SLDM_REG(chip, DMAMODE));
504 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
505 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
506 /* 3. Unmask DMA */
507 outb(0, SLDM_REG(chip, DMAMASK));
508}
509
e571f594 510static void snd_es1938_capture_setdma(struct es1938 *chip)
1da177e4
LT		 511{
512 /* Enable DMA controller */
513 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
514 /* 1. Master reset */
515 outb(0, SLDM_REG(chip, DMACLEAR));
516 /* 2. Mask DMA */
517 outb(1, SLDM_REG(chip, DMAMASK));
518 outb(0x14, SLDM_REG(chip, DMAMODE));
519 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
19e2e3c3 520 chip->last_capture_dmaaddr = chip->dma1_start;
1da177e4
LT		 521 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
522 /* 3. Unmask DMA */
523 outb(0, SLDM_REG(chip, DMAMASK));
524}
525
526/* ----------------------------------------------------------------------
527 *
528 * *** PCM part ***
529 */
530
e571f594 531static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 532 int cmd)
533{
e571f594 534 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 535 int val;
536 switch (cmd) {
537 case SNDRV_PCM_TRIGGER_START:
93b9f426 538 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 539 val = 0x0f;
540 chip->active |= ADC1;
541 break;
542 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 543 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 544 val = 0x00;
545 chip->active &= ~ADC1;
546 break;
547 default:
548 return -EINVAL;
549 }
550 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
551 return 0;
552}
553
e571f594 554static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 555 int cmd)
556{
e571f594 557 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 558 switch (cmd) {
559 case SNDRV_PCM_TRIGGER_START:
93b9f426 560 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 561 /* According to the documentation this should be:
562 0x13 but that value may randomly swap stereo channels */
563 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
564 udelay(10);
565 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
566 /* This two stage init gives the FIFO -> DAC connection time to
567 * settle before first data from DMA flows in. This should ensure
568 * no swapping of stereo channels. Report a bug if otherwise :-) */
569 outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
570 chip->active |= DAC2;
571 break;
572 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 573 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 574 outb(0, SLIO_REG(chip, AUDIO2MODE));
575 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
576 chip->active &= ~DAC2;
577 break;
578 default:
579 return -EINVAL;
580 }
581 return 0;
582}
583
e571f594 584static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 585 int cmd)
586{
e571f594 587 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 588 int val;
589 switch (cmd) {
590 case SNDRV_PCM_TRIGGER_START:
93b9f426 591 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 592 val = 5;
593 chip->active |= DAC1;
594 break;
595 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 596 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 597 val = 0;
598 chip->active &= ~DAC1;
599 break;
600 default:
601 return -EINVAL;
602 }
603 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
604 return 0;
605}
606
e571f594 607static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 608 int cmd)
609{
610 switch (substream->number) {
611 case 0:
612 return snd_es1938_playback1_trigger(substream, cmd);
613 case 1:
614 return snd_es1938_playback2_trigger(substream, cmd);
615 }
616 snd_BUG();
617 return -EINVAL;
618}
619
620/* --------------------------------------------------------------------
621 * First channel for Extended Mode Audio 1 ADC Operation
622 * --------------------------------------------------------------------*/
e571f594 623static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 624{
e571f594
TI		 625 struct es1938 *chip = snd_pcm_substream_chip(substream);
626 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 627 int u, is8, mono;
628 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
629 unsigned int count = snd_pcm_lib_period_bytes(substream);
630
631 chip->dma1_size = size;
632 chip->dma1_start = runtime->dma_addr;
633
634 mono = (runtime->channels > 1) ? 0 : 1;
635 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
636 u = snd_pcm_format_unsigned(runtime->format);
637
638 chip->dma1_shift = 2 - mono - is8;
639
640 snd_es1938_reset_fifo(chip);
641
642 /* program type */
643 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
644
645 /* set clock and counters */
646 snd_es1938_rate_set(chip, substream, ADC1);
647
648 count = 0x10000 - count;
649 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
650 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
651
652 /* initialize and configure ADC */
653 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
654 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
655 (u ? 0x00 : 0x20) |
656 (is8 ? 0x00 : 0x04) |
657 (mono ? 0x40 : 0x08));
658
659 // snd_es1938_reset_fifo(chip);
660
661 /* 11. configure system interrupt controller and DMA controller */
662 snd_es1938_capture_setdma(chip);
663
664 return 0;
665}
666
667
668/* ------------------------------------------------------------------------------
669 * Second Audio channel DAC Operation
670 * ------------------------------------------------------------------------------*/
e571f594 671static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
1da177e4 672{
e571f594
TI		 673 struct es1938 *chip = snd_pcm_substream_chip(substream);
674 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 675 int u, is8, mono;
676 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
677 unsigned int count = snd_pcm_lib_period_bytes(substream);
678
679 chip->dma2_size = size;
680 chip->dma2_start = runtime->dma_addr;
681
682 mono = (runtime->channels > 1) ? 0 : 1;
683 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
684 u = snd_pcm_format_unsigned(runtime->format);
685
686 chip->dma2_shift = 2 - mono - is8;
687
688 snd_es1938_reset_fifo(chip);
689
690 /* set clock and counters */
691 snd_es1938_rate_set(chip, substream, DAC2);
692
693 count >>= 1;
694 count = 0x10000 - count;
695 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
696 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
697
698 /* initialize and configure Audio 2 DAC */
e571f594
TI		 699 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
700 (mono ? 0 : 2) | (is8 ? 0 : 1));
1da177e4
LT		 701
702 /* program DMA */
703 snd_es1938_playback1_setdma(chip);
704
705 return 0;
706}
707
e571f594 708static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
1da177e4 709{
e571f594
TI		 710 struct es1938 *chip = snd_pcm_substream_chip(substream);
711 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 712 int u, is8, mono;
713 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
714 unsigned int count = snd_pcm_lib_period_bytes(substream);
715
716 chip->dma1_size = size;
717 chip->dma1_start = runtime->dma_addr;
718
719 mono = (runtime->channels > 1) ? 0 : 1;
720 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
721 u = snd_pcm_format_unsigned(runtime->format);
722
723 chip->dma1_shift = 2 - mono - is8;
724
725 count = 0x10000 - count;
726
727 /* reset */
728 snd_es1938_reset_fifo(chip);
729
730 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
731
732 /* set clock and counters */
733 snd_es1938_rate_set(chip, substream, DAC1);
734 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
735 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
736
737 /* initialized and configure DAC */
738 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
739 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
740 snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
741 0x90 | (mono ? 0x40 : 0x08) |
742 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
743
744 /* program DMA */
745 snd_es1938_playback2_setdma(chip);
746
747 return 0;
748}
749
e571f594 750static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
1da177e4
LT		 751{
752 switch (substream->number) {
753 case 0:
754 return snd_es1938_playback1_prepare(substream);
755 case 1:
756 return snd_es1938_playback2_prepare(substream);
757 }
758 snd_BUG();
759 return -EINVAL;
760}
761
19e2e3c3
HL		 762/* during the incrementing of dma counters the DMA register reads sometimes
763 returns garbage. To ensure a valid hw pointer, the following checks which
764 should be very unlikely to fail are used:
765 - is the current DMA address in the valid DMA range ?
766 - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
767 One can argue this could differ by one byte depending on which register is
768 updated first, so the implementation below allows for that.
769*/
e571f594 770static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 771{
e571f594 772 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4 773 size_t ptr;
19e2e3c3 774#if 0
1da177e4 775 size_t old, new;
1da177e4
LT		 776 /* This stuff is *needed*, don't ask why - AB */
777 old = inw(SLDM_REG(chip, DMACOUNT));
778 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
779 old = new;
780 ptr = chip->dma1_size - 1 - new;
781#else
19e2e3c3
HL		 782 size_t count;
783 unsigned int diff;
784
785 ptr = inl(SLDM_REG(chip, DMAADDR));
786 count = inw(SLDM_REG(chip, DMACOUNT));
787 diff = chip->dma1_start + chip->dma1_size - ptr - count;
788
789 if (diff > 3 || ptr < chip->dma1_start
790 || ptr >= chip->dma1_start+chip->dma1_size)
791 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
792 else
793 chip->last_capture_dmaaddr = ptr; /* good, remember it */
794
795 ptr -= chip->dma1_start;
1da177e4
LT		 796#endif
797 return ptr >> chip->dma1_shift;
798}
799
e571f594 800static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
1da177e4 801{
e571f594 802 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 803 size_t ptr;
804#if 1
805 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
806#else
807 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
808#endif
809 return ptr >> chip->dma2_shift;
810}
811
e571f594 812static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
1da177e4 813{
e571f594 814 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 815 size_t ptr;
816 size_t old, new;
817#if 1
818 /* This stuff is *needed*, don't ask why - AB */
819 old = inw(SLDM_REG(chip, DMACOUNT));
820 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
821 old = new;
822 ptr = chip->dma1_size - 1 - new;
823#else
824 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
825#endif
826 return ptr >> chip->dma1_shift;
827}
828
e571f594 829static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
1da177e4
LT		 830{
831 switch (substream->number) {
832 case 0:
833 return snd_es1938_playback1_pointer(substream);
834 case 1:
835 return snd_es1938_playback2_pointer(substream);
836 }
837 snd_BUG();
838 return -EINVAL;
839}
840
e571f594 841static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
b96c3a15
TI		 842 int channel, unsigned long pos,
843 void __user *dst, unsigned long count)
1da177e4 844{
e571f594
TI		 845 struct snd_pcm_runtime *runtime = substream->runtime;
846 struct es1938 *chip = snd_pcm_substream_chip(substream);
b96c3a15 847
da3cec35
TI		 848 if (snd_BUG_ON(pos + count > chip->dma1_size))
849 return -EINVAL;
1da177e4
LT		 850 if (pos + count < chip->dma1_size) {
851 if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
852 return -EFAULT;
853 } else {
854 if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
855 return -EFAULT;
b96c3a15
TI		 856 if (put_user(runtime->dma_area[0],
857 ((unsigned char __user *)dst) + count - 1))
1da177e4
LT		 858 return -EFAULT;
859 }
860 return 0;
861}
862
b96c3a15
TI		 863static int snd_es1938_capture_copy_kernel(struct snd_pcm_substream *substream,
864 int channel, unsigned long pos,
865 void *dst, unsigned long count)
866{
867 struct snd_pcm_runtime *runtime = substream->runtime;
868 struct es1938 *chip = snd_pcm_substream_chip(substream);
869
870 if (snd_BUG_ON(pos + count > chip->dma1_size))
871 return -EINVAL;
872 if (pos + count < chip->dma1_size) {
873 memcpy(dst, runtime->dma_area + pos + 1, count);
874 } else {
875 memcpy(dst, runtime->dma_area + pos + 1, count - 1);
876 runtime->dma_area[0] = *((unsigned char *)dst + count - 1);
877 }
878 return 0;
879}
880
1da177e4
LT		 881/*
882 * buffer management
883 */
e571f594
TI		 884static int snd_es1938_pcm_hw_params(struct snd_pcm_substream *substream,
885 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 886
887{
888 int err;
889
890 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
891 return err;
892 return 0;
893}
894
e571f594 895static int snd_es1938_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 896{
897 return snd_pcm_lib_free_pages(substream);
898}
899
900/* ----------------------------------------------------------------------
901 * Audio1 Capture (ADC)
902 * ----------------------------------------------------------------------*/
dee49895 903static const struct snd_pcm_hardware snd_es1938_capture =
1da177e4
LT		 904{
905 .info = (SNDRV_PCM_INFO_INTERLEAVED |
906 SNDRV_PCM_INFO_BLOCK_TRANSFER),
e571f594
TI		 907 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
908 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT		 909 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
910 .rate_min = 6000,
911 .rate_max = 48000,
912 .channels_min = 1,
913 .channels_max = 2,
914 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
915 .period_bytes_min = 64,
916 .period_bytes_max = 0x8000,
917 .periods_min = 1,
918 .periods_max = 1024,
919 .fifo_size = 256,
920};
921
922/* -----------------------------------------------------------------------
923 * Audio2 Playback (DAC)
924 * -----------------------------------------------------------------------*/
dee49895 925static const struct snd_pcm_hardware snd_es1938_playback =
1da177e4
LT		 926{
927 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
928 SNDRV_PCM_INFO_BLOCK_TRANSFER |
929 SNDRV_PCM_INFO_MMAP_VALID),
e571f594
TI		 930 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
931 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT		 932 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
933 .rate_min = 6000,
934 .rate_max = 48000,
935 .channels_min = 1,
936 .channels_max = 2,
937 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
938 .period_bytes_min = 64,
939 .period_bytes_max = 0x8000,
940 .periods_min = 1,
941 .periods_max = 1024,
942 .fifo_size = 256,
943};
944
e571f594 945static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
1da177e4 946{
e571f594
TI		 947 struct es1938 *chip = snd_pcm_substream_chip(substream);
948 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 949
950 if (chip->playback2_substream)
951 return -EAGAIN;
952 chip->capture_substream = substream;
953 runtime->hw = snd_es1938_capture;
954 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
955 &hw_constraints_clocks);
956 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
957 return 0;
958}
959
e571f594 960static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
1da177e4 961{
e571f594
TI		 962 struct es1938 *chip = snd_pcm_substream_chip(substream);
963 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 964
965 switch (substream->number) {
966 case 0:
967 chip->playback1_substream = substream;
968 break;
969 case 1:
970 if (chip->capture_substream)
971 return -EAGAIN;
972 chip->playback2_substream = substream;
973 break;
974 default:
975 snd_BUG();
976 return -EINVAL;
977 }
978 runtime->hw = snd_es1938_playback;
979 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
980 &hw_constraints_clocks);
981 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
982 return 0;
983}
984
e571f594 985static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
1da177e4 986{
e571f594 987 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 988
989 chip->capture_substream = NULL;
990 return 0;
991}
992
e571f594 993static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
1da177e4 994{
e571f594 995 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 996
997 switch (substream->number) {
998 case 0:
999 chip->playback1_substream = NULL;
1000 break;
1001 case 1:
1002 chip->playback2_substream = NULL;
1003 break;
1004 default:
1005 snd_BUG();
1006 return -EINVAL;
1007 }
1008 return 0;
1009}
1010
6769e988 1011static const struct snd_pcm_ops snd_es1938_playback_ops = {
1da177e4
LT		 1012 .open = snd_es1938_playback_open,
1013 .close = snd_es1938_playback_close,
1014 .ioctl = snd_pcm_lib_ioctl,
1015 .hw_params = snd_es1938_pcm_hw_params,
1016 .hw_free = snd_es1938_pcm_hw_free,
1017 .prepare = snd_es1938_playback_prepare,
1018 .trigger = snd_es1938_playback_trigger,
1019 .pointer = snd_es1938_playback_pointer,
1020};
1021
6769e988 1022static const struct snd_pcm_ops snd_es1938_capture_ops = {
1da177e4
LT		 1023 .open = snd_es1938_capture_open,
1024 .close = snd_es1938_capture_close,
1025 .ioctl = snd_pcm_lib_ioctl,
1026 .hw_params = snd_es1938_pcm_hw_params,
1027 .hw_free = snd_es1938_pcm_hw_free,
1028 .prepare = snd_es1938_capture_prepare,
1029 .trigger = snd_es1938_capture_trigger,
1030 .pointer = snd_es1938_capture_pointer,
b96c3a15
TI		 1031 .copy_user = snd_es1938_capture_copy,
1032 .copy_kernel = snd_es1938_capture_copy_kernel,
1da177e4
LT		 1033};
1034
e23e7a14 1035static int snd_es1938_new_pcm(struct es1938 *chip, int device)
1da177e4 1036{
e571f594 1037 struct snd_pcm *pcm;
1da177e4
LT		 1038 int err;
1039
1040 if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
1041 return err;
1042 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1043 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1044
1045 pcm->private_data = chip;
1da177e4
LT		 1046 pcm->info_flags = 0;
1047 strcpy(pcm->name, "ESS Solo-1");
1048
1049 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1050 snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1051
1052 chip->pcm = pcm;
1053 return 0;
1054}
1055
1056/* -------------------------------------------------------------------
1057 *
1058 * *** Mixer part ***
1059 */
1060
e571f594
TI		 1061static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1062 struct snd_ctl_elem_info *uinfo)
1da177e4 1063{
6b6b295e 1064 static const char * const texts[8] = {
1da177e4
LT		 1065 "Mic", "Mic Master", "CD", "AOUT",
1066 "Mic1", "Mix", "Line", "Master"
1067 };
1068
6b6b295e 1069 return snd_ctl_enum_info(uinfo, 1, 8, texts);
1da177e4
LT		 1070}
1071
e571f594
TI		 1072static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1073 struct snd_ctl_elem_value *ucontrol)
1da177e4 1074{
e571f594 1075 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1076 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1077 return 0;
1078}
1079
e571f594
TI		 1080static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1081 struct snd_ctl_elem_value *ucontrol)
1da177e4 1082{
e571f594 1083 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1084 unsigned char val = ucontrol->value.enumerated.item[0];
1085
1086 if (val > 7)
1087 return -EINVAL;
1088 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1089}
1090
a5ce8890 1091#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1da177e4 1092
e571f594
TI		 1093static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1094 struct snd_ctl_elem_value *ucontrol)
1da177e4 1095{
e571f594 1096 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1097 unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1098 ucontrol->value.integer.value[0] = !!(val & 8);
1099 return 0;
1100}
1101
e571f594
TI		 1102static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1103 struct snd_ctl_elem_value *ucontrol)
1da177e4 1104{
e571f594 1105 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1106 unsigned char oval, nval;
1107 int change;
1108 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1109 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1110 change = nval != oval;
1111 if (change) {
1112 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1113 snd_es1938_mixer_write(chip, 0x50, nval);
1114 }
1115 return change;
1116}
1117
e571f594
TI		 1118static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1119 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1120{
1121 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1122 uinfo->count = 2;
1123 uinfo->value.integer.min = 0;
1124 uinfo->value.integer.max = 63;
1125 return 0;
1126}
1127
e571f594
TI		 1128static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1129 struct snd_ctl_elem_value *ucontrol)
1da177e4 1130{
e571f594 1131 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1132 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1133 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1134 return 0;
1135}
1136
a5ce8890 1137#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1da177e4 1138
e571f594
TI		 1139static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1140 struct snd_ctl_elem_value *ucontrol)
1da177e4 1141{
e571f594 1142 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1143 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1144 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1145 return 0;
1146}
1147
e571f594 1148static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1da177e4 1149{
e571f594 1150 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1151 chip->master_volume = NULL;
1152 chip->master_switch = NULL;
1153 chip->hw_volume = NULL;
1154 chip->hw_switch = NULL;
1155}
1156
e571f594 1157static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1da177e4
LT		 1158 unsigned char mask, unsigned char val)
1159{
1160 if (reg < 0xa0)
1161 return snd_es1938_mixer_bits(chip, reg, mask, val);
1162 else
1163 return snd_es1938_bits(chip, reg, mask, val);
1164}
1165
e571f594 1166static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 1167{
1168 if (reg < 0xa0)
1169 return snd_es1938_mixer_read(chip, reg);
1170 else
1171 return snd_es1938_read(chip, reg);
1172}
1173
0b593972
TI		 1174#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1175{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1176 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1177 .name = xname, .index = xindex, \
1178 .info = snd_es1938_info_single, \
1179 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1180 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1181 .tlv = { .p = xtlv } }
1da177e4
LT		 1182#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1183{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1184 .info = snd_es1938_info_single, \
1185 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1186 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1187
e571f594
TI		 1188static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1189 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1190{
1191 int mask = (kcontrol->private_value >> 16) & 0xff;
1192
1193 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1194 uinfo->count = 1;
1195 uinfo->value.integer.min = 0;
1196 uinfo->value.integer.max = mask;
1197 return 0;
1198}
1199
e571f594
TI		 1200static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1201 struct snd_ctl_elem_value *ucontrol)
1da177e4 1202{
e571f594 1203 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1204 int reg = kcontrol->private_value & 0xff;
1205 int shift = (kcontrol->private_value >> 8) & 0xff;
1206 int mask = (kcontrol->private_value >> 16) & 0xff;
1207 int invert = (kcontrol->private_value >> 24) & 0xff;
1208 int val;
1209
1210 val = snd_es1938_reg_read(chip, reg);
1211 ucontrol->value.integer.value[0] = (val >> shift) & mask;
1212 if (invert)
1213 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1214 return 0;
1215}
1216
e571f594
TI		 1217static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1218 struct snd_ctl_elem_value *ucontrol)
1da177e4 1219{
e571f594 1220 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1221 int reg = kcontrol->private_value & 0xff;
1222 int shift = (kcontrol->private_value >> 8) & 0xff;
1223 int mask = (kcontrol->private_value >> 16) & 0xff;
1224 int invert = (kcontrol->private_value >> 24) & 0xff;
1225 unsigned char val;
1226
1227 val = (ucontrol->value.integer.value[0] & mask);
1228 if (invert)
1229 val = mask - val;
1230 mask <<= shift;
1231 val <<= shift;
1232 return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1233}
1234
0b593972
TI		 1235#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1236{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1237 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1238 .name = xname, .index = xindex, \
1239 .info = snd_es1938_info_double, \
1240 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1241 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1242 .tlv = { .p = xtlv } }
1da177e4
LT		 1243#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1244{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1245 .info = snd_es1938_info_double, \
1246 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1247 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1248
e571f594
TI		 1249static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1250 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1251{
1252 int mask = (kcontrol->private_value >> 24) & 0xff;
1253
1254 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1255 uinfo->count = 2;
1256 uinfo->value.integer.min = 0;
1257 uinfo->value.integer.max = mask;
1258 return 0;
1259}
1260
e571f594
TI		 1261static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1262 struct snd_ctl_elem_value *ucontrol)
1da177e4 1263{
e571f594 1264 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1265 int left_reg = kcontrol->private_value & 0xff;
1266 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1267 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1268 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1269 int mask = (kcontrol->private_value >> 24) & 0xff;
1270 int invert = (kcontrol->private_value >> 22) & 1;
1271 unsigned char left, right;
1272
1273 left = snd_es1938_reg_read(chip, left_reg);
1274 if (left_reg != right_reg)
1275 right = snd_es1938_reg_read(chip, right_reg);
1276 else
1277 right = left;
1278 ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1279 ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1280 if (invert) {
1281 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1282 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1283 }
1284 return 0;
1285}
1286
e571f594
TI		 1287static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1288 struct snd_ctl_elem_value *ucontrol)
1da177e4 1289{
e571f594 1290 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1291 int left_reg = kcontrol->private_value & 0xff;
1292 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1293 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1294 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1295 int mask = (kcontrol->private_value >> 24) & 0xff;
1296 int invert = (kcontrol->private_value >> 22) & 1;
1297 int change;
1298 unsigned char val1, val2, mask1, mask2;
1299
1300 val1 = ucontrol->value.integer.value[0] & mask;
1301 val2 = ucontrol->value.integer.value[1] & mask;
1302 if (invert) {
1303 val1 = mask - val1;
1304 val2 = mask - val2;
1305 }
1306 val1 <<= shift_left;
1307 val2 <<= shift_right;
1308 mask1 = mask << shift_left;
1309 mask2 = mask << shift_right;
1310 if (left_reg != right_reg) {
1311 change = 0;
1312 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1313 change = 1;
1314 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1315 change = 1;
1316 } else {
1317 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1318 val1 | val2) != (val1 | val2));
1319 }
1320 return change;
1321}
1322
093eef41 1323static const DECLARE_TLV_DB_RANGE(db_scale_master,
0b593972
TI		 1324 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1325 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
093eef41 1326);
0b593972 1327
093eef41 1328static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
0b593972
TI		 1329 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1330 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
093eef41 1331);
0b593972 1332
093eef41 1333static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
0b593972
TI		 1334 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1335 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
093eef41 1336);
0b593972 1337
093eef41 1338static const DECLARE_TLV_DB_RANGE(db_scale_mic,
0b593972
TI		 1339 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1340 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
093eef41 1341);
0b593972 1342
093eef41 1343static const DECLARE_TLV_DB_RANGE(db_scale_line,
0b593972
TI		 1344 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1345 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
093eef41 1346);
0b593972 1347
0cb29ea0 1348static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
0b593972 1349
e571f594 1350static struct snd_kcontrol_new snd_es1938_controls[] = {
0b593972
TI		 1351ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1352 db_scale_master),
1da177e4
LT		 1353ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1354{
1355 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1356 .name = "Hardware Master Playback Volume",
1357 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1358 .info = snd_es1938_info_hw_volume,
1359 .get = snd_es1938_get_hw_volume,
1360},
1361{
1362 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
dbf91dd4 1363 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
0b593972 1364 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4 1365 .name = "Hardware Master Playback Switch",
1da177e4
LT		 1366 .info = snd_es1938_info_hw_switch,
1367 .get = snd_es1938_get_hw_switch,
0b593972 1368 .tlv = { .p = db_scale_master },
1da177e4
LT		 1369},
1370ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
0b593972
TI		 1371ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1372 db_scale_line),
1da177e4 1373ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
0b593972
TI		 1374ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1375 db_scale_mic),
1376ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1377 db_scale_line),
1378ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1379 db_scale_mic),
1380ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1381 db_scale_line),
1382ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1383 db_scale_capture),
d355c82a 1384ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1da177e4
LT		 1385ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1386ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1387{
1388 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1389 .name = "Capture Source",
1390 .info = snd_es1938_info_mux,
1391 .get = snd_es1938_get_mux,
1392 .put = snd_es1938_put_mux,
1393},
0b593972
TI		 1394ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1395 db_scale_line),
1396ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1397 db_scale_audio2),
1398ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1399 db_scale_mic),
1400ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1401 db_scale_line),
1402ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1403 db_scale_mic),
1404ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1405 db_scale_line),
1406ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1407 db_scale_line),
1408ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1409 db_scale_line),
1410ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1411 db_scale_audio2),
1412ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1413 db_scale_audio1),
1da177e4
LT		 1414ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1415{
1416 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1417 .name = "3D Control - Switch",
1418 .info = snd_es1938_info_spatializer_enable,
1419 .get = snd_es1938_get_spatializer_enable,
1420 .put = snd_es1938_put_spatializer_enable,
1421},
1422ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1423};
1424
1425
1426/* ---------------------------------------------------------------------------- */
1427/* ---------------------------------------------------------------------------- */
1428
1429/*
1430 * initialize the chip - used by resume callback, too
1431 */
e571f594 1432static void snd_es1938_chip_init(struct es1938 *chip)
1da177e4
LT		 1433{
1434 /* reset chip */
1435 snd_es1938_reset(chip);
1436
1437 /* configure native mode */
1438
1439 /* enable bus master */
1440 pci_set_master(chip->pci);
1441
1442 /* disable legacy audio */
1443 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1444
1445 /* set DDMA base */
1446 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1447
1448 /* set DMA/IRQ policy */
1449 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1450
1451 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1452 outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1453
1454 /* reset DMA */
1455 outb(0, SLDM_REG(chip, DMACLEAR));
1456}
1457
c7561cd8 1458#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 1459/*
1460 * PM support
1461 */
1462
1463static unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1464 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1465 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1466 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1467 0xa8, 0xb4,
1468};
1469
1470
68cb2b55 1471static int es1938_suspend(struct device *dev)
1da177e4 1472{
68cb2b55 1473 struct snd_card *card = dev_get_drvdata(dev);
b34a580e 1474 struct es1938 *chip = card->private_data;
1da177e4
LT		 1475 unsigned char *s, *d;
1476
b34a580e 1477 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT		 1478 snd_pcm_suspend_all(chip->pcm);
1479
1480 /* save mixer-related registers */
1481 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1482 *d = snd_es1938_reg_read(chip, *s);
1483
1484 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
30b35399 1485 if (chip->irq >= 0) {
b34a580e 1486 free_irq(chip->irq, chip);
30b35399
TI		 1487 chip->irq = -1;
1488 }
1da177e4
LT		 1489 return 0;
1490}
1491
68cb2b55 1492static int es1938_resume(struct device *dev)
1da177e4 1493{
68cb2b55
TI		 1494 struct pci_dev *pci = to_pci_dev(dev);
1495 struct snd_card *card = dev_get_drvdata(dev);
b34a580e 1496 struct es1938 *chip = card->private_data;
1da177e4
LT		 1497 unsigned char *s, *d;
1498
30b35399 1499 if (request_irq(pci->irq, snd_es1938_interrupt,
934c2b6d 1500 IRQF_SHARED, KBUILD_MODNAME, chip)) {
ebebecaa
TI		 1501 dev_err(dev, "unable to grab IRQ %d, disabling device\n",
1502 pci->irq);
30b35399
TI		 1503 snd_card_disconnect(card);
1504 return -EIO;
1505 }
b34a580e 1506 chip->irq = pci->irq;
1da177e4
LT		 1507 snd_es1938_chip_init(chip);
1508
1509 /* restore mixer-related registers */
1510 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1511 if (*s < 0xa0)
1512 snd_es1938_mixer_write(chip, *s, *d);
1513 else
1514 snd_es1938_write(chip, *s, *d);
1515 }
1516
b34a580e 1517 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 1518 return 0;
1519}
68cb2b55
TI		 1520
1521static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1522#define ES1938_PM_OPS &es1938_pm
1523#else
1524#define ES1938_PM_OPS NULL
c7561cd8 1525#endif /* CONFIG_PM_SLEEP */
1da177e4
LT		 1526
1527#ifdef SUPPORT_JOYSTICK
e23e7a14 1528static int snd_es1938_create_gameport(struct es1938 *chip)
1da177e4
LT		 1529{
1530 struct gameport *gp;
1531
1532 chip->gameport = gp = gameport_allocate_port();
1533 if (!gp) {
ebebecaa
TI		 1534 dev_err(chip->card->dev,
1535 "cannot allocate memory for gameport\n");
1da177e4
LT		 1536 return -ENOMEM;
1537 }
1538
1539 gameport_set_name(gp, "ES1938");
1540 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1541 gameport_set_dev_parent(gp, &chip->pci->dev);
1542 gp->io = chip->game_port;
1543
1544 gameport_register_port(gp);
1545
1546 return 0;
1547}
1548
e571f594 1549static void snd_es1938_free_gameport(struct es1938 *chip)
1da177e4
LT		 1550{
1551 if (chip->gameport) {
1552 gameport_unregister_port(chip->gameport);
1553 chip->gameport = NULL;
1554 }
1555}
1556#else
e571f594
TI		 1557static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1558static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1da177e4
LT		 1559#endif /* SUPPORT_JOYSTICK */
1560
e571f594 1561static int snd_es1938_free(struct es1938 *chip)
1da177e4
LT		 1562{
1563 /* disable irqs */
1564 outb(0x00, SLIO_REG(chip, IRQCONTROL));
1565 if (chip->rmidi)
1566 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1567
1568 snd_es1938_free_gameport(chip);
1569
f000fd80 1570 if (chip->irq >= 0)
e571f594 1571 free_irq(chip->irq, chip);
1da177e4
LT		 1572 pci_release_regions(chip->pci);
1573 pci_disable_device(chip->pci);
1574 kfree(chip);
1575 return 0;
1576}
1577
e571f594 1578static int snd_es1938_dev_free(struct snd_device *device)
1da177e4 1579{
e571f594 1580 struct es1938 *chip = device->device_data;
1da177e4
LT		 1581 return snd_es1938_free(chip);
1582}
1583
e23e7a14
BP		 1584static int snd_es1938_create(struct snd_card *card,
1585 struct pci_dev *pci,
1586 struct es1938 **rchip)
1da177e4 1587{
e571f594 1588 struct es1938 *chip;
1da177e4 1589 int err;
e571f594 1590 static struct snd_device_ops ops = {
1da177e4
LT		 1591 .dev_free = snd_es1938_dev_free,
1592 };
1593
1594 *rchip = NULL;
1595
1596 /* enable PCI device */
1597 if ((err = pci_enable_device(pci)) < 0)
1598 return err;
1599 /* check, if we can restrict PCI DMA transfers to 24 bits */
412b979c
QL		 1600 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(24)) < 0 ||
1601 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(24)) < 0) {
ebebecaa
TI		 1602 dev_err(card->dev,
1603 "architecture does not support 24bit PCI busmaster DMA\n");
1da177e4
LT		 1604 pci_disable_device(pci);
1605 return -ENXIO;
1606 }
1607
e560d8d8 1608 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 1609 if (chip == NULL) {
1610 pci_disable_device(pci);
1611 return -ENOMEM;
1612 }
1613 spin_lock_init(&chip->reg_lock);
1614 spin_lock_init(&chip->mixer_lock);
1615 chip->card = card;
1616 chip->pci = pci;
30b35399 1617 chip->irq = -1;
1da177e4
LT		 1618 if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
1619 kfree(chip);
1620 pci_disable_device(pci);
1621 return err;
1622 }
1623 chip->io_port = pci_resource_start(pci, 0);
1624 chip->sb_port = pci_resource_start(pci, 1);
1625 chip->vc_port = pci_resource_start(pci, 2);
1626 chip->mpu_port = pci_resource_start(pci, 3);
1627 chip->game_port = pci_resource_start(pci, 4);
437a5a46 1628 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
934c2b6d 1629 KBUILD_MODNAME, chip)) {
ebebecaa 1630 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 1631 snd_es1938_free(chip);
1632 return -EBUSY;
1633 }
1634 chip->irq = pci->irq;
ebebecaa
TI		 1635 dev_dbg(card->dev,
1636 "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1da177e4 1637 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1da177e4
LT		 1638
1639 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1640
1641 snd_es1938_chip_init(chip);
1642
1da177e4
LT		 1643 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1644 snd_es1938_free(chip);
1645 return err;
1646 }
1647
1da177e4
LT		 1648 *rchip = chip;
1649 return 0;
1650}
1651
1652/* --------------------------------------------------------------------
1653 * Interrupt handler
1654 * -------------------------------------------------------------------- */
7d12e780 1655static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1da177e4 1656{
e571f594 1657 struct es1938 *chip = dev_id;
1da177e4
LT		 1658 unsigned char status, audiostatus;
1659 int handled = 0;
1660
1661 status = inb(SLIO_REG(chip, IRQCONTROL));
1662#if 0
ebebecaa
TI		 1663 dev_dbg(chip->card->dev,
1664 "Es1938debug - interrupt status: =0x%x\n", status);
1da177e4
LT		 1665#endif
1666
1667 /* AUDIO 1 */
1668 if (status & 0x10) {
1669#if 0
ebebecaa 1670 dev_dbg(chip->card->dev,
ee419653 1671 "Es1938debug - AUDIO channel 1 interrupt\n");
ebebecaa 1672 dev_dbg(chip->card->dev,
ee419653 1673 "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
e571f594 1674 inw(SLDM_REG(chip, DMACOUNT)));
ebebecaa 1675 dev_dbg(chip->card->dev,
ee419653 1676 "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
e571f594 1677 inl(SLDM_REG(chip, DMAADDR)));
ebebecaa 1678 dev_dbg(chip->card->dev,
ee419653 1679 "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
e571f594 1680 inl(SLDM_REG(chip, DMASTATUS)));
1da177e4
LT		 1681#endif
1682 /* clear irq */
1683 handled = 1;
1684 audiostatus = inb(SLSB_REG(chip, STATUS));
1685 if (chip->active & ADC1)
1686 snd_pcm_period_elapsed(chip->capture_substream);
1687 else if (chip->active & DAC1)
1688 snd_pcm_period_elapsed(chip->playback2_substream);
1689 }
1690
1691 /* AUDIO 2 */
1692 if (status & 0x20) {
1693#if 0
ebebecaa 1694 dev_dbg(chip->card->dev,
ee419653 1695 "Es1938debug - AUDIO channel 2 interrupt\n");
ebebecaa 1696 dev_dbg(chip->card->dev,
ee419653 1697 "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
e571f594 1698 inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
ebebecaa 1699 dev_dbg(chip->card->dev,
ee419653 1700 "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
e571f594 1701 inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1da177e4
LT		 1702
1703#endif
1704 /* clear irq */
1705 handled = 1;
1706 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1707 if (chip->active & DAC2)
1708 snd_pcm_period_elapsed(chip->playback1_substream);
1709 }
1710
1711 /* Hardware volume */
1712 if (status & 0x40) {
1713 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1714 handled = 1;
1715 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1716 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1717 if (!split) {
e571f594
TI		 1718 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1719 &chip->master_switch->id);
1720 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1721 &chip->master_volume->id);
1da177e4
LT		 1722 }
1723 /* ack interrupt */
1724 snd_es1938_mixer_write(chip, 0x66, 0x00);
1725 }
1726
1727 /* MPU401 */
1728 if (status & 0x80) {
1729 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1730 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1731 // andreas@flying-snail.de
1732 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1733 if (chip->rmidi) {
1734 handled = 1;
7d12e780 1735 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT		 1736 }
1737 }
1738 return IRQ_RETVAL(handled);
1739}
1740
1741#define ES1938_DMA_SIZE 64
1742
e23e7a14 1743static int snd_es1938_mixer(struct es1938 *chip)
1da177e4 1744{
e571f594 1745 struct snd_card *card;
1da177e4
LT		 1746 unsigned int idx;
1747 int err;
1748
1749 card = chip->card;
1750
1751 strcpy(card->mixername, "ESS Solo-1");
1752
1753 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
e571f594 1754 struct snd_kcontrol *kctl;
1da177e4
LT		 1755 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1756 switch (idx) {
1757 case 0:
1758 chip->master_volume = kctl;
1759 kctl->private_free = snd_es1938_hwv_free;
1760 break;
1761 case 1:
1762 chip->master_switch = kctl;
1763 kctl->private_free = snd_es1938_hwv_free;
1764 break;
1765 case 2:
1766 chip->hw_volume = kctl;
1767 kctl->private_free = snd_es1938_hwv_free;
1768 break;
1769 case 3:
1770 chip->hw_switch = kctl;
1771 kctl->private_free = snd_es1938_hwv_free;
1772 break;
1773 }
1774 if ((err = snd_ctl_add(card, kctl)) < 0)
1775 return err;
1776 }
1777 return 0;
1778}
1779
1780
e23e7a14
BP		 1781static int snd_es1938_probe(struct pci_dev *pci,
1782 const struct pci_device_id *pci_id)
1da177e4
LT		 1783{
1784 static int dev;
e571f594
TI		 1785 struct snd_card *card;
1786 struct es1938 *chip;
1787 struct snd_opl3 *opl3;
1da177e4
LT		 1788 int idx, err;
1789
1790 if (dev >= SNDRV_CARDS)
1791 return -ENODEV;
1792 if (!enable[dev]) {
1793 dev++;
1794 return -ENOENT;
1795 }
1796
60c5772b
TI		 1797 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1798 0, &card);
e58de7ba
TI		 1799 if (err < 0)
1800 return err;
1da177e4
LT		 1801 for (idx = 0; idx < 5; idx++) {
1802 if (pci_resource_start(pci, idx) == 0 ||
1803 !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
1804 snd_card_free(card);
1805 return -ENODEV;
1806 }
1807 }
1808 if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
1809 snd_card_free(card);
1810 return err;
1811 }
b34a580e 1812 card->private_data = chip;
1da177e4
LT		 1813
1814 strcpy(card->driver, "ES1938");
1815 strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1816 sprintf(card->longname, "%s rev %i, irq %i",
1817 card->shortname,
1818 chip->revision,
1819 chip->irq);
1820
1821 if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
1822 snd_card_free(card);
1823 return err;
1824 }
1825 if ((err = snd_es1938_mixer(chip)) < 0) {
1826 snd_card_free(card);
1827 return err;
1828 }
1829 if (snd_opl3_create(card,
1830 SLSB_REG(chip, FMLOWADDR),
1831 SLSB_REG(chip, FMHIGHADDR),
1832 OPL3_HW_OPL3, 1, &opl3) < 0) {
ebebecaa 1833 dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
1da177e4
LT		 1834 SLSB_REG(chip, FMLOWADDR));
1835 } else {
1836 if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
1837 snd_card_free(card);
1838 return err;
1839 }
1840 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1841 snd_card_free(card);
1842 return err;
1843 }
1844 }
1845 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
dba8b469
CL		 1846 chip->mpu_port,
1847 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1848 -1, &chip->rmidi) < 0) {
ebebecaa 1849 dev_err(card->dev, "unable to initialize MPU-401\n");
1da177e4
LT		 1850 } else {
1851 // this line is vital for MIDI interrupt handling on ess-solo1
1852 // andreas@flying-snail.de
1853 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1854 }
1855
1856 snd_es1938_create_gameport(chip);
1857
1858 if ((err = snd_card_register(card)) < 0) {
1859 snd_card_free(card);
1860 return err;
1861 }
1862
1863 pci_set_drvdata(pci, card);
1864 dev++;
1865 return 0;
1866}
1867
e23e7a14 1868static void snd_es1938_remove(struct pci_dev *pci)
1da177e4
LT		 1869{
1870 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT		 1871}
1872
e9f66d9b 1873static struct pci_driver es1938_driver = {
3733e424 1874 .name = KBUILD_MODNAME,
1da177e4
LT		 1875 .id_table = snd_es1938_ids,
1876 .probe = snd_es1938_probe,
e23e7a14 1877 .remove = snd_es1938_remove,
68cb2b55
TI		 1878 .driver = {
1879 .pm = ES1938_PM_OPS,
1880 },
1da177e4
LT		 1881};
1882
e9f66d9b 1883module_pci_driver(es1938_driver);
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