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[mirror_ubuntu-artful-kernel.git] / sound / pci / fm801.c
CommitLineData
1da177e4
LT		 1/*
2 * The driver for the ForteMedia FM801 based soundcards
c1017a4c 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4 4 *
1da177e4
LT		 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
1da177e4
LT		 15 */
16
1da177e4
LT		 17#include <linux/delay.h>
18#include <linux/init.h>
19#include <linux/interrupt.h>
215dacc2 20#include <linux/io.h>
1da177e4
LT		 21#include <linux/pci.h>
22#include <linux/slab.h>
65a77217 23#include <linux/module.h>
1da177e4
LT		 24#include <sound/core.h>
25#include <sound/pcm.h>
666c70ff 26#include <sound/tlv.h>
1da177e4
LT		 27#include <sound/ac97_codec.h>
28#include <sound/mpu401.h>
29#include <sound/opl3.h>
30#include <sound/initval.h>
31
efce4bb9 32#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d647f0b7 33#include <media/drv-intf/tea575x.h>
1da177e4
LT		 34#endif
35
c1017a4c 36MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT		 37MODULE_DESCRIPTION("ForteMedia FM801");
38MODULE_LICENSE("GPL");
39MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801},"
40 "{Genius,SoundMaker Live 5.1}}");
41
42static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
43static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 44static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
1da177e4
LT		 45/*
46 * Enable TEA575x tuner
47 * 1 = MediaForte 256-PCS
d7ba858a 48 * 2 = MediaForte 256-PCP
1da177e4 49 * 3 = MediaForte 64-PCR
fb716c0b 50 * 16 = setup tuner only (this is additional bit), i.e. SF64-PCR FM card
1da177e4
LT		 51 * High 16-bits are video (radio) device number + 1
52 */
6581f4e7 53static int tea575x_tuner[SNDRV_CARDS];
d4ecc83b 54static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
1da177e4
LT		 55
56module_param_array(index, int, NULL, 0444);
57MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
58module_param_array(id, charp, NULL, 0444);
59MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
60module_param_array(enable, bool, NULL, 0444);
61MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
62module_param_array(tea575x_tuner, int, NULL, 0444);
d7ba858a 63MODULE_PARM_DESC(tea575x_tuner, "TEA575x tuner access method (0 = auto, 1 = SF256-PCS, 2=SF256-PCP, 3=SF64-PCR, 8=disable, +16=tuner-only).");
d4ecc83b
HV		 64module_param_array(radio_nr, int, NULL, 0444);
65MODULE_PARM_DESC(radio_nr, "Radio device numbers");
66
fb716c0b 67
c37279b9 68#define TUNER_DISABLED (1<<3)
fb716c0b
OZ		 69#define TUNER_ONLY (1<<4)
70#define TUNER_TYPE_MASK (~TUNER_ONLY & 0xFFFF)
1da177e4
LT		 71
72/*
73 * Direct registers
74 */
75
215dacc2
AS		 76#define fm801_writew(chip,reg,value) outw((value), chip->port + FM801_##reg)
77#define fm801_readw(chip,reg) inw(chip->port + FM801_##reg)
78
79#define fm801_writel(chip,reg,value) outl((value), chip->port + FM801_##reg)
1da177e4
LT		 80
81#define FM801_PCM_VOL 0x00 /* PCM Output Volume */
82#define FM801_FM_VOL 0x02 /* FM Output Volume */
83#define FM801_I2S_VOL 0x04 /* I2S Volume */
84#define FM801_REC_SRC 0x06 /* Record Source */
85#define FM801_PLY_CTRL 0x08 /* Playback Control */
86#define FM801_PLY_COUNT 0x0a /* Playback Count */
87#define FM801_PLY_BUF1 0x0c /* Playback Bufer I */
88#define FM801_PLY_BUF2 0x10 /* Playback Buffer II */
89#define FM801_CAP_CTRL 0x14 /* Capture Control */
90#define FM801_CAP_COUNT 0x16 /* Capture Count */
91#define FM801_CAP_BUF1 0x18 /* Capture Buffer I */
92#define FM801_CAP_BUF2 0x1c /* Capture Buffer II */
93#define FM801_CODEC_CTRL 0x22 /* Codec Control */
94#define FM801_I2S_MODE 0x24 /* I2S Mode Control */
95#define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */
96#define FM801_I2C_CTRL 0x29 /* I2C Control */
97#define FM801_AC97_CMD 0x2a /* AC'97 Command */
98#define FM801_AC97_DATA 0x2c /* AC'97 Data */
99#define FM801_MPU401_DATA 0x30 /* MPU401 Data */
100#define FM801_MPU401_CMD 0x31 /* MPU401 Command */
101#define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */
102#define FM801_GEN_CTRL 0x54 /* General Control */
103#define FM801_IRQ_MASK 0x56 /* Interrupt Mask */
104#define FM801_IRQ_STATUS 0x5a /* Interrupt Status */
105#define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */
106#define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */
107#define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */
108#define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */
109#define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */
110
b1e9ed26
TI		 111/* codec access */
112#define FM801_AC97_READ (1<<7) /* read=1, write=0 */
113#define FM801_AC97_VALID (1<<8) /* port valid=1 */
114#define FM801_AC97_BUSY (1<<9) /* busy=1 */
115#define FM801_AC97_ADDR_SHIFT 10 /* codec id (2bit) */
1da177e4
LT		 116
117/* playback and record control register bits */
118#define FM801_BUF1_LAST (1<<1)
119#define FM801_BUF2_LAST (1<<2)
120#define FM801_START (1<<5)
121#define FM801_PAUSE (1<<6)
122#define FM801_IMMED_STOP (1<<7)
123#define FM801_RATE_SHIFT 8
124#define FM801_RATE_MASK (15 << FM801_RATE_SHIFT)
125#define FM801_CHANNELS_4 (1<<12) /* playback only */
126#define FM801_CHANNELS_6 (2<<12) /* playback only */
127#define FM801_CHANNELS_6MS (3<<12) /* playback only */
128#define FM801_CHANNELS_MASK (3<<12)
129#define FM801_16BIT (1<<14)
130#define FM801_STEREO (1<<15)
131
132/* IRQ status bits */
133#define FM801_IRQ_PLAYBACK (1<<8)
134#define FM801_IRQ_CAPTURE (1<<9)
135#define FM801_IRQ_VOLUME (1<<14)
136#define FM801_IRQ_MPU (1<<15)
137
138/* GPIO control register */
139#define FM801_GPIO_GP0 (1<<0) /* read/write */
140#define FM801_GPIO_GP1 (1<<1)
141#define FM801_GPIO_GP2 (1<<2)
142#define FM801_GPIO_GP3 (1<<3)
143#define FM801_GPIO_GP(x) (1<<(0+(x)))
144#define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/
145#define FM801_GPIO_GD1 (1<<9)
146#define FM801_GPIO_GD2 (1<<10)
147#define FM801_GPIO_GD3 (1<<11)
148#define FM801_GPIO_GD(x) (1<<(8+(x)))
149#define FM801_GPIO_GS0 (1<<12) /* function select: */
150#define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */
151#define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */
152#define FM801_GPIO_GS3 (1<<15)
153#define FM801_GPIO_GS(x) (1<<(12+(x)))
154
052c233e
AS		 155/**
156 * struct fm801 - describes FM801 chip
157 * @port: I/O port number
158 * @multichannel: multichannel support
159 * @secondary: secondary codec
160 * @secondary_addr: address of the secondary codec
161 * @tea575x_tuner: tuner access method & flags
162 * @ply_ctrl: playback control
163 * @cap_ctrl: capture control
1da177e4 164 */
a5f22156 165struct fm801 {
d3d33aab 166 struct device *dev;
1da177e4
LT		 167 int irq;
168
052c233e
AS		 169 unsigned long port;
170 unsigned int multichannel: 1,
171 secondary: 1;
172 unsigned char secondary_addr;
173 unsigned int tea575x_tuner;
1da177e4 174
052c233e
AS		 175 unsigned short ply_ctrl;
176 unsigned short cap_ctrl;
1da177e4
LT		 177
178 unsigned long ply_buffer;
179 unsigned int ply_buf;
180 unsigned int ply_count;
181 unsigned int ply_size;
182 unsigned int ply_pos;
183
184 unsigned long cap_buffer;
185 unsigned int cap_buf;
186 unsigned int cap_count;
187 unsigned int cap_size;
188 unsigned int cap_pos;
189
a5f22156
TI		 190 struct snd_ac97_bus *ac97_bus;
191 struct snd_ac97 *ac97;
192 struct snd_ac97 *ac97_sec;
1da177e4 193
a5f22156
TI		 194 struct snd_card *card;
195 struct snd_pcm *pcm;
196 struct snd_rawmidi *rmidi;
197 struct snd_pcm_substream *playback_substream;
198 struct snd_pcm_substream *capture_substream;
1da177e4
LT		 199 unsigned int p_dma_size;
200 unsigned int c_dma_size;
201
202 spinlock_t reg_lock;
a5f22156 203 struct snd_info_entry *proc_entry;
1da177e4 204
fdb62b50 205#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b 206 struct v4l2_device v4l2_dev;
a5f22156 207 struct snd_tea575x tea;
1da177e4 208#endif
b1e9ed26 209
c7561cd8 210#ifdef CONFIG_PM_SLEEP
b1e9ed26
TI		 211 u16 saved_regs[0x20];
212#endif
1da177e4
LT		 213};
214
4b5c15f7
AS		 215/*
216 * IO accessors
217 */
218
219static inline void fm801_iowrite16(struct fm801 *chip, unsigned short offset, u16 value)
220{
221 outw(value, chip->port + offset);
222}
223
224static inline u16 fm801_ioread16(struct fm801 *chip, unsigned short offset)
225{
226 return inw(chip->port + offset);
227}
228
9baa3c34 229static const struct pci_device_id snd_fm801_ids[] = {
1da177e4 230 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */
26be8659 231 { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */
1da177e4
LT		 232 { 0, }
233};
234
235MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
236
237/*
238 * common I/O routines
239 */
240
02fd1a76
AS		 241static bool fm801_ac97_is_ready(struct fm801 *chip, unsigned int iterations)
242{
243 unsigned int idx;
244
245 for (idx = 0; idx < iterations; idx++) {
246 if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY))
247 return true;
248 udelay(10);
249 }
250 return false;
251}
252
253static bool fm801_ac97_is_valid(struct fm801 *chip, unsigned int iterations)
254{
255 unsigned int idx;
256
257 for (idx = 0; idx < iterations; idx++) {
258 if (fm801_readw(chip, AC97_CMD) & FM801_AC97_VALID)
259 return true;
260 udelay(10);
261 }
262 return false;
263}
264
a5f22156 265static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg,
1da177e4
LT		 266 unsigned short mask, unsigned short value)
267{
268 int change;
269 unsigned long flags;
270 unsigned short old, new;
271
272 spin_lock_irqsave(&chip->reg_lock, flags);
4b5c15f7 273 old = fm801_ioread16(chip, reg);
1da177e4
LT		 274 new = (old & ~mask) | value;
275 change = old != new;
276 if (change)
4b5c15f7 277 fm801_iowrite16(chip, reg, new);
1da177e4
LT		 278 spin_unlock_irqrestore(&chip->reg_lock, flags);
279 return change;
280}
281
a5f22156 282static void snd_fm801_codec_write(struct snd_ac97 *ac97,
1da177e4
LT		 283 unsigned short reg,
284 unsigned short val)
285{
a5f22156 286 struct fm801 *chip = ac97->private_data;
1da177e4
LT		 287
288 /*
289 * Wait until the codec interface is not ready..
290 */
02fd1a76
AS		 291 if (!fm801_ac97_is_ready(chip, 100)) {
292 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
293 return;
1da177e4 294 }
1da177e4 295
1da177e4 296 /* write data and address */
215dacc2
AS		 297 fm801_writew(chip, AC97_DATA, val);
298 fm801_writew(chip, AC97_CMD, reg | (ac97->addr << FM801_AC97_ADDR_SHIFT));
1da177e4
LT		 299 /*
300 * Wait until the write command is not completed..
02fd1a76
AS		 301 */
302 if (!fm801_ac97_is_ready(chip, 1000))
303 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
304 ac97->num);
1da177e4
LT		 305}
306
a5f22156 307static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 308{
a5f22156 309 struct fm801 *chip = ac97->private_data;
1da177e4
LT		 310
311 /*
312 * Wait until the codec interface is not ready..
313 */
02fd1a76
AS		 314 if (!fm801_ac97_is_ready(chip, 100)) {
315 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
316 return 0;
1da177e4 317 }
1da177e4 318
1da177e4 319 /* read command */
215dacc2
AS		 320 fm801_writew(chip, AC97_CMD,
321 reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
02fd1a76
AS		 322 if (!fm801_ac97_is_ready(chip, 100)) {
323 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
324 ac97->num);
325 return 0;
1da177e4 326 }
1da177e4 327
02fd1a76
AS		 328 if (!fm801_ac97_is_valid(chip, 1000)) {
329 dev_err(chip->card->dev,
330 "AC'97 interface #%d is not valid (2)\n", ac97->num);
331 return 0;
1da177e4 332 }
1da177e4 333
215dacc2 334 return fm801_readw(chip, AC97_DATA);
1da177e4
LT		 335}
336
d71a13f4 337static const unsigned int rates[] = {
1da177e4
LT		 338 5500, 8000, 9600, 11025,
339 16000, 19200, 22050, 32000,
340 38400, 44100, 48000
341};
342
d71a13f4 343static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
1da177e4
LT		 344 .count = ARRAY_SIZE(rates),
345 .list = rates,
346 .mask = 0,
347};
348
d71a13f4 349static const unsigned int channels[] = {
1da177e4
LT		 350 2, 4, 6
351};
352
d71a13f4 353static const struct snd_pcm_hw_constraint_list hw_constraints_channels = {
5e4968e2 354 .count = ARRAY_SIZE(channels),
1da177e4
LT		 355 .list = channels,
356 .mask = 0,
357};
358
359/*
360 * Sample rate routines
361 */
362
363static unsigned short snd_fm801_rate_bits(unsigned int rate)
364{
365 unsigned int idx;
366
367 for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
368 if (rates[idx] == rate)
369 return idx;
370 snd_BUG();
371 return ARRAY_SIZE(rates) - 1;
372}
373
374/*
375 * PCM part
376 */
377
a5f22156 378static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 379 int cmd)
380{
a5f22156 381 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 382
383 spin_lock(&chip->reg_lock);
384 switch (cmd) {
385 case SNDRV_PCM_TRIGGER_START:
386 chip->ply_ctrl &= ~(FM801_BUF1_LAST |
387 FM801_BUF2_LAST |
388 FM801_PAUSE);
389 chip->ply_ctrl |= FM801_START |
390 FM801_IMMED_STOP;
391 break;
392 case SNDRV_PCM_TRIGGER_STOP:
393 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
394 break;
395 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
b1e9ed26 396 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 397 chip->ply_ctrl |= FM801_PAUSE;
398 break;
399 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
b1e9ed26 400 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 401 chip->ply_ctrl &= ~FM801_PAUSE;
402 break;
403 default:
404 spin_unlock(&chip->reg_lock);
405 snd_BUG();
406 return -EINVAL;
407 }
215dacc2 408 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
1da177e4
LT		 409 spin_unlock(&chip->reg_lock);
410 return 0;
411}
412
a5f22156 413static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 414 int cmd)
415{
a5f22156 416 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 417
418 spin_lock(&chip->reg_lock);
419 switch (cmd) {
420 case SNDRV_PCM_TRIGGER_START:
421 chip->cap_ctrl &= ~(FM801_BUF1_LAST |
422 FM801_BUF2_LAST |
423 FM801_PAUSE);
424 chip->cap_ctrl |= FM801_START |
425 FM801_IMMED_STOP;
426 break;
427 case SNDRV_PCM_TRIGGER_STOP:
428 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
429 break;
430 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
b1e9ed26 431 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 432 chip->cap_ctrl |= FM801_PAUSE;
433 break;
434 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
b1e9ed26 435 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 436 chip->cap_ctrl &= ~FM801_PAUSE;
437 break;
438 default:
439 spin_unlock(&chip->reg_lock);
440 snd_BUG();
441 return -EINVAL;
442 }
215dacc2 443 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
1da177e4
LT		 444 spin_unlock(&chip->reg_lock);
445 return 0;
446}
447
a5f22156
TI		 448static int snd_fm801_hw_params(struct snd_pcm_substream *substream,
449 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 450{
451 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
452}
453
a5f22156 454static int snd_fm801_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 455{
456 return snd_pcm_lib_free_pages(substream);
457}
458
a5f22156 459static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 460{
a5f22156
TI		 461 struct fm801 *chip = snd_pcm_substream_chip(substream);
462 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 463
464 chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
465 chip->ply_count = snd_pcm_lib_period_bytes(substream);
466 spin_lock_irq(&chip->reg_lock);
467 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
468 FM801_STEREO | FM801_RATE_MASK |
469 FM801_CHANNELS_MASK);
470 if (snd_pcm_format_width(runtime->format) == 16)
471 chip->ply_ctrl |= FM801_16BIT;
472 if (runtime->channels > 1) {
473 chip->ply_ctrl |= FM801_STEREO;
474 if (runtime->channels == 4)
475 chip->ply_ctrl |= FM801_CHANNELS_4;
476 else if (runtime->channels == 6)
477 chip->ply_ctrl |= FM801_CHANNELS_6;
478 }
479 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
480 chip->ply_buf = 0;
215dacc2
AS		 481 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
482 fm801_writew(chip, PLY_COUNT, chip->ply_count - 1);
1da177e4
LT		 483 chip->ply_buffer = runtime->dma_addr;
484 chip->ply_pos = 0;
215dacc2
AS		 485 fm801_writel(chip, PLY_BUF1, chip->ply_buffer);
486 fm801_writel(chip, PLY_BUF2,
487 chip->ply_buffer + (chip->ply_count % chip->ply_size));
1da177e4
LT		 488 spin_unlock_irq(&chip->reg_lock);
489 return 0;
490}
491
a5f22156 492static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 493{
a5f22156
TI		 494 struct fm801 *chip = snd_pcm_substream_chip(substream);
495 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 496
497 chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
498 chip->cap_count = snd_pcm_lib_period_bytes(substream);
499 spin_lock_irq(&chip->reg_lock);
500 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
501 FM801_STEREO | FM801_RATE_MASK);
502 if (snd_pcm_format_width(runtime->format) == 16)
503 chip->cap_ctrl |= FM801_16BIT;
504 if (runtime->channels > 1)
505 chip->cap_ctrl |= FM801_STEREO;
506 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
507 chip->cap_buf = 0;
215dacc2
AS		 508 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
509 fm801_writew(chip, CAP_COUNT, chip->cap_count - 1);
1da177e4
LT		 510 chip->cap_buffer = runtime->dma_addr;
511 chip->cap_pos = 0;
215dacc2
AS		 512 fm801_writel(chip, CAP_BUF1, chip->cap_buffer);
513 fm801_writel(chip, CAP_BUF2,
514 chip->cap_buffer + (chip->cap_count % chip->cap_size));
1da177e4
LT		 515 spin_unlock_irq(&chip->reg_lock);
516 return 0;
517}
518
a5f22156 519static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 520{
a5f22156 521 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 522 size_t ptr;
523
524 if (!(chip->ply_ctrl & FM801_START))
525 return 0;
526 spin_lock(&chip->reg_lock);
215dacc2
AS		 527 ptr = chip->ply_pos + (chip->ply_count - 1) - fm801_readw(chip, PLY_COUNT);
528 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_PLAYBACK) {
1da177e4
LT		 529 ptr += chip->ply_count;
530 ptr %= chip->ply_size;
531 }
532 spin_unlock(&chip->reg_lock);
533 return bytes_to_frames(substream->runtime, ptr);
534}
535
a5f22156 536static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 537{
a5f22156 538 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 539 size_t ptr;
540
541 if (!(chip->cap_ctrl & FM801_START))
542 return 0;
543 spin_lock(&chip->reg_lock);
215dacc2
AS		 544 ptr = chip->cap_pos + (chip->cap_count - 1) - fm801_readw(chip, CAP_COUNT);
545 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_CAPTURE) {
1da177e4
LT		 546 ptr += chip->cap_count;
547 ptr %= chip->cap_size;
548 }
549 spin_unlock(&chip->reg_lock);
550 return bytes_to_frames(substream->runtime, ptr);
551}
552
7d12e780 553static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id)
1da177e4 554{
a5f22156 555 struct fm801 *chip = dev_id;
1da177e4
LT		 556 unsigned short status;
557 unsigned int tmp;
558
215dacc2 559 status = fm801_readw(chip, IRQ_STATUS);
1da177e4
LT		 560 status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
561 if (! status)
562 return IRQ_NONE;
563 /* ack first */
215dacc2 564 fm801_writew(chip, IRQ_STATUS, status);
1da177e4
LT		 565 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
566 spin_lock(&chip->reg_lock);
567 chip->ply_buf++;
568 chip->ply_pos += chip->ply_count;
569 chip->ply_pos %= chip->ply_size;
570 tmp = chip->ply_pos + chip->ply_count;
571 tmp %= chip->ply_size;
215dacc2
AS		 572 if (chip->ply_buf & 1)
573 fm801_writel(chip, PLY_BUF1, chip->ply_buffer + tmp);
574 else
575 fm801_writel(chip, PLY_BUF2, chip->ply_buffer + tmp);
1da177e4
LT		 576 spin_unlock(&chip->reg_lock);
577 snd_pcm_period_elapsed(chip->playback_substream);
578 }
579 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
580 spin_lock(&chip->reg_lock);
581 chip->cap_buf++;
582 chip->cap_pos += chip->cap_count;
583 chip->cap_pos %= chip->cap_size;
584 tmp = chip->cap_pos + chip->cap_count;
585 tmp %= chip->cap_size;
215dacc2
AS		 586 if (chip->cap_buf & 1)
587 fm801_writel(chip, CAP_BUF1, chip->cap_buffer + tmp);
588 else
589 fm801_writel(chip, CAP_BUF2, chip->cap_buffer + tmp);
1da177e4
LT		 590 spin_unlock(&chip->reg_lock);
591 snd_pcm_period_elapsed(chip->capture_substream);
592 }
593 if (chip->rmidi && (status & FM801_IRQ_MPU))
7d12e780 594 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
997c87da
AS		 595 if (status & FM801_IRQ_VOLUME) {
596 /* TODO */
597 }
1da177e4
LT		 598
599 return IRQ_HANDLED;
600}
601
a5f22156 602static struct snd_pcm_hardware snd_fm801_playback =
1da177e4
LT		 603{
604 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
605 SNDRV_PCM_INFO_BLOCK_TRANSFER |
b1e9ed26 606 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
1da177e4
LT		 607 SNDRV_PCM_INFO_MMAP_VALID),
608 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
609 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
610 .rate_min = 5500,
611 .rate_max = 48000,
612 .channels_min = 1,
613 .channels_max = 2,
614 .buffer_bytes_max = (128*1024),
615 .period_bytes_min = 64,
616 .period_bytes_max = (128*1024),
617 .periods_min = 1,
618 .periods_max = 1024,
619 .fifo_size = 0,
620};
621
a5f22156 622static struct snd_pcm_hardware snd_fm801_capture =
1da177e4
LT		 623{
624 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
625 SNDRV_PCM_INFO_BLOCK_TRANSFER |
b1e9ed26 626 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
1da177e4
LT		 627 SNDRV_PCM_INFO_MMAP_VALID),
628 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
629 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
630 .rate_min = 5500,
631 .rate_max = 48000,
632 .channels_min = 1,
633 .channels_max = 2,
634 .buffer_bytes_max = (128*1024),
635 .period_bytes_min = 64,
636 .period_bytes_max = (128*1024),
637 .periods_min = 1,
638 .periods_max = 1024,
639 .fifo_size = 0,
640};
641
a5f22156 642static int snd_fm801_playback_open(struct snd_pcm_substream *substream)
1da177e4 643{
a5f22156
TI		 644 struct fm801 *chip = snd_pcm_substream_chip(substream);
645 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 646 int err;
647
648 chip->playback_substream = substream;
649 runtime->hw = snd_fm801_playback;
a5f22156
TI		 650 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
651 &hw_constraints_rates);
1da177e4
LT		 652 if (chip->multichannel) {
653 runtime->hw.channels_max = 6;
a5f22156
TI		 654 snd_pcm_hw_constraint_list(runtime, 0,
655 SNDRV_PCM_HW_PARAM_CHANNELS,
656 &hw_constraints_channels);
1da177e4
LT		 657 }
658 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
659 return err;
660 return 0;
661}
662
a5f22156 663static int snd_fm801_capture_open(struct snd_pcm_substream *substream)
1da177e4 664{
a5f22156
TI		 665 struct fm801 *chip = snd_pcm_substream_chip(substream);
666 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 667 int err;
668
669 chip->capture_substream = substream;
670 runtime->hw = snd_fm801_capture;
a5f22156
TI		 671 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
672 &hw_constraints_rates);
1da177e4
LT		 673 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
674 return err;
675 return 0;
676}
677
a5f22156 678static int snd_fm801_playback_close(struct snd_pcm_substream *substream)
1da177e4 679{
a5f22156 680 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 681
682 chip->playback_substream = NULL;
683 return 0;
684}
685
a5f22156 686static int snd_fm801_capture_close(struct snd_pcm_substream *substream)
1da177e4 687{
a5f22156 688 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 689
690 chip->capture_substream = NULL;
691 return 0;
692}
693
6769e988 694static const struct snd_pcm_ops snd_fm801_playback_ops = {
1da177e4
LT		 695 .open = snd_fm801_playback_open,
696 .close = snd_fm801_playback_close,
697 .ioctl = snd_pcm_lib_ioctl,
698 .hw_params = snd_fm801_hw_params,
699 .hw_free = snd_fm801_hw_free,
700 .prepare = snd_fm801_playback_prepare,
701 .trigger = snd_fm801_playback_trigger,
702 .pointer = snd_fm801_playback_pointer,
703};
704
6769e988 705static const struct snd_pcm_ops snd_fm801_capture_ops = {
1da177e4
LT		 706 .open = snd_fm801_capture_open,
707 .close = snd_fm801_capture_close,
708 .ioctl = snd_pcm_lib_ioctl,
709 .hw_params = snd_fm801_hw_params,
710 .hw_free = snd_fm801_hw_free,
711 .prepare = snd_fm801_capture_prepare,
712 .trigger = snd_fm801_capture_trigger,
713 .pointer = snd_fm801_capture_pointer,
714};
715
483337f9 716static int snd_fm801_pcm(struct fm801 *chip, int device)
1da177e4 717{
d3d33aab 718 struct pci_dev *pdev = to_pci_dev(chip->dev);
a5f22156 719 struct snd_pcm *pcm;
1da177e4
LT		 720 int err;
721
1da177e4
LT		 722 if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
723 return err;
724
725 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
726 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
727
728 pcm->private_data = chip;
1da177e4
LT		 729 pcm->info_flags = 0;
730 strcpy(pcm->name, "FM801");
731 chip->pcm = pcm;
732
733 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
d3d33aab 734 snd_dma_pci_data(pdev),
1da177e4
LT		 735 chip->multichannel ? 128*1024 : 64*1024, 128*1024);
736
483337f9 737 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
e36e3b86
TI		 738 snd_pcm_alt_chmaps,
739 chip->multichannel ? 6 : 2, 0,
740 NULL);
1da177e4
LT		 741}
742
743/*
744 * TEA5757 radio
745 */
746
fdb62b50 747#ifdef CONFIG_SND_FM801_TEA575X_BOOL
1da177e4 748
938a1566
OZ		 749/* GPIO to TEA575x maps */
750struct snd_fm801_tea575x_gpio {
751 u8 data, clk, wren, most;
d7ba858a 752 char *name;
938a1566 753};
1da177e4 754
938a1566 755static struct snd_fm801_tea575x_gpio snd_fm801_tea575x_gpios[] = {
d7ba858a
OZ		 756 { .data = 1, .clk = 3, .wren = 2, .most = 0, .name = "SF256-PCS" },
757 { .data = 1, .clk = 0, .wren = 2, .most = 3, .name = "SF256-PCP" },
758 { .data = 2, .clk = 0, .wren = 1, .most = 3, .name = "SF64-PCR" },
938a1566 759};
1da177e4 760
8e699d2c
TI		 761#define get_tea575x_gpio(chip) \
762 (&snd_fm801_tea575x_gpios[((chip)->tea575x_tuner & TUNER_TYPE_MASK) - 1])
763
938a1566 764static void snd_fm801_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)
1da177e4 765{
a5f22156 766 struct fm801 *chip = tea->private_data;
215dacc2 767 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 768 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
1da177e4 769
938a1566
OZ		 770 reg &= ~(FM801_GPIO_GP(gpio.data) |
771 FM801_GPIO_GP(gpio.clk) |
772 FM801_GPIO_GP(gpio.wren));
1da177e4 773
938a1566
OZ		 774 reg |= (pins & TEA575X_DATA) ? FM801_GPIO_GP(gpio.data) : 0;
775 reg |= (pins & TEA575X_CLK) ? FM801_GPIO_GP(gpio.clk) : 0;
776 /* WRITE_ENABLE is inverted */
777 reg |= (pins & TEA575X_WREN) ? 0 : FM801_GPIO_GP(gpio.wren);
1da177e4 778
215dacc2 779 fm801_writew(chip, GPIO_CTRL, reg);
1da177e4
LT		 780}
781
938a1566 782static u8 snd_fm801_tea575x_get_pins(struct snd_tea575x *tea)
1da177e4 783{
a5f22156 784 struct fm801 *chip = tea->private_data;
215dacc2 785 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 786 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
effded75
DC		 787 u8 ret;
788
789 ret = 0;
790 if (reg & FM801_GPIO_GP(gpio.data))
791 ret |= TEA575X_DATA;
792 if (reg & FM801_GPIO_GP(gpio.most))
793 ret |= TEA575X_MOST;
794 return ret;
1da177e4
LT		 795}
796
938a1566 797static void snd_fm801_tea575x_set_direction(struct snd_tea575x *tea, bool output)
1da177e4 798{
a5f22156 799 struct fm801 *chip = tea->private_data;
215dacc2 800 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 801 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
1da177e4 802
1da177e4 803 /* use GPIO lines and set write enable bit */
938a1566
OZ		 804 reg |= FM801_GPIO_GS(gpio.data) |
805 FM801_GPIO_GS(gpio.wren) |
806 FM801_GPIO_GS(gpio.clk) |
807 FM801_GPIO_GS(gpio.most);
808 if (output) {
809 /* all of lines are in the write direction */
810 /* clear data and clock lines */
811 reg &= ~(FM801_GPIO_GD(gpio.data) |
812 FM801_GPIO_GD(gpio.wren) |
813 FM801_GPIO_GD(gpio.clk) |
814 FM801_GPIO_GP(gpio.data) |
815 FM801_GPIO_GP(gpio.clk) |
816 FM801_GPIO_GP(gpio.wren));
817 } else {
818 /* use GPIO lines, set data direction to input */
819 reg |= FM801_GPIO_GD(gpio.data) |
820 FM801_GPIO_GD(gpio.most) |
821 FM801_GPIO_GP(gpio.data) |
822 FM801_GPIO_GP(gpio.most) |
823 FM801_GPIO_GP(gpio.wren);
824 /* all of lines are in the write direction, except data */
825 /* clear data, write enable and clock lines */
826 reg &= ~(FM801_GPIO_GD(gpio.wren) |
827 FM801_GPIO_GD(gpio.clk) |
828 FM801_GPIO_GP(gpio.clk));
1da177e4
LT		 829 }
830
215dacc2 831 fm801_writew(chip, GPIO_CTRL, reg);
69252128
AS		 832}
833
22dbec26 834static const struct snd_tea575x_ops snd_fm801_tea_ops = {
938a1566
OZ		 835 .set_pins = snd_fm801_tea575x_set_pins,
836 .get_pins = snd_fm801_tea575x_get_pins,
837 .set_direction = snd_fm801_tea575x_set_direction,
1da177e4
LT		 838};
839#endif
840
841/*
842 * Mixer routines
843 */
844
845#define FM801_SINGLE(xname, reg, shift, mask, invert) \
846{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
847 .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
848 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
849
a5f22156
TI		 850static int snd_fm801_info_single(struct snd_kcontrol *kcontrol,
851 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 852{
853 int mask = (kcontrol->private_value >> 16) & 0xff;
854
855 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
856 uinfo->count = 1;
857 uinfo->value.integer.min = 0;
858 uinfo->value.integer.max = mask;
859 return 0;
860}
861
a5f22156
TI		 862static int snd_fm801_get_single(struct snd_kcontrol *kcontrol,
863 struct snd_ctl_elem_value *ucontrol)
1da177e4 864{
a5f22156 865 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 866 int reg = kcontrol->private_value & 0xff;
867 int shift = (kcontrol->private_value >> 8) & 0xff;
868 int mask = (kcontrol->private_value >> 16) & 0xff;
869 int invert = (kcontrol->private_value >> 24) & 0xff;
4b5c15f7 870 long *value = ucontrol->value.integer.value;
1da177e4 871
4b5c15f7 872 value[0] = (fm801_ioread16(chip, reg) >> shift) & mask;
1da177e4 873 if (invert)
4b5c15f7 874 value[0] = mask - value[0];
1da177e4
LT		 875 return 0;
876}
877
a5f22156
TI		 878static int snd_fm801_put_single(struct snd_kcontrol *kcontrol,
879 struct snd_ctl_elem_value *ucontrol)
1da177e4 880{
a5f22156 881 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 882 int reg = kcontrol->private_value & 0xff;
883 int shift = (kcontrol->private_value >> 8) & 0xff;
884 int mask = (kcontrol->private_value >> 16) & 0xff;
885 int invert = (kcontrol->private_value >> 24) & 0xff;
886 unsigned short val;
887
888 val = (ucontrol->value.integer.value[0] & mask);
889 if (invert)
890 val = mask - val;
891 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
892}
893
894#define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
895{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
896 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
897 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
666c70ff
TI		 898#define FM801_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
899{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
900 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
901 .name = xname, .info = snd_fm801_info_double, \
902 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
903 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
904 .tlv = { .p = (xtlv) } }
1da177e4 905
a5f22156
TI		 906static int snd_fm801_info_double(struct snd_kcontrol *kcontrol,
907 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 908{
909 int mask = (kcontrol->private_value >> 16) & 0xff;
910
911 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
912 uinfo->count = 2;
913 uinfo->value.integer.min = 0;
914 uinfo->value.integer.max = mask;
915 return 0;
916}
917
a5f22156
TI		 918static int snd_fm801_get_double(struct snd_kcontrol *kcontrol,
919 struct snd_ctl_elem_value *ucontrol)
1da177e4 920{
a5f22156 921 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 922 int reg = kcontrol->private_value & 0xff;
923 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
924 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
925 int mask = (kcontrol->private_value >> 16) & 0xff;
926 int invert = (kcontrol->private_value >> 24) & 0xff;
4b5c15f7 927 long *value = ucontrol->value.integer.value;
1da177e4
LT		 928
929 spin_lock_irq(&chip->reg_lock);
4b5c15f7
AS		 930 value[0] = (fm801_ioread16(chip, reg) >> shift_left) & mask;
931 value[1] = (fm801_ioread16(chip, reg) >> shift_right) & mask;
1da177e4
LT		 932 spin_unlock_irq(&chip->reg_lock);
933 if (invert) {
4b5c15f7
AS		 934 value[0] = mask - value[0];
935 value[1] = mask - value[1];
1da177e4
LT		 936 }
937 return 0;
938}
939
a5f22156
TI		 940static int snd_fm801_put_double(struct snd_kcontrol *kcontrol,
941 struct snd_ctl_elem_value *ucontrol)
1da177e4 942{
a5f22156 943 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 944 int reg = kcontrol->private_value & 0xff;
945 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
946 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
947 int mask = (kcontrol->private_value >> 16) & 0xff;
948 int invert = (kcontrol->private_value >> 24) & 0xff;
949 unsigned short val1, val2;
950
951 val1 = ucontrol->value.integer.value[0] & mask;
952 val2 = ucontrol->value.integer.value[1] & mask;
953 if (invert) {
954 val1 = mask - val1;
955 val2 = mask - val2;
956 }
957 return snd_fm801_update_bits(chip, reg,
958 (mask << shift_left) | (mask << shift_right),
959 (val1 << shift_left ) | (val2 << shift_right));
960}
961
a5f22156
TI		 962static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol,
963 struct snd_ctl_elem_info *uinfo)
1da177e4 964{
ca776a28 965 static const char * const texts[5] = {
1da177e4
LT		 966 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
967 };
968
ca776a28 969 return snd_ctl_enum_info(uinfo, 1, 5, texts);
1da177e4
LT		 970}
971
a5f22156
TI		 972static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol,
973 struct snd_ctl_elem_value *ucontrol)
1da177e4 974{
a5f22156 975 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 976 unsigned short val;
977
215dacc2 978 val = fm801_readw(chip, REC_SRC) & 7;
1da177e4
LT		 979 if (val > 4)
980 val = 4;
981 ucontrol->value.enumerated.item[0] = val;
982 return 0;
983}
984
a5f22156
TI		 985static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol,
986 struct snd_ctl_elem_value *ucontrol)
1da177e4 987{
a5f22156 988 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 989 unsigned short val;
990
991 if ((val = ucontrol->value.enumerated.item[0]) > 4)
992 return -EINVAL;
993 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
994}
995
0cb29ea0 996static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -3450, 150, 0);
666c70ff 997
a5f22156 998#define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls)
1da177e4 999
e23e7a14 1000static struct snd_kcontrol_new snd_fm801_controls[] = {
666c70ff
TI		 1001FM801_DOUBLE_TLV("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1,
1002 db_scale_dsp),
1da177e4 1003FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
666c70ff
TI		 1004FM801_DOUBLE_TLV("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1,
1005 db_scale_dsp),
1da177e4 1006FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
666c70ff
TI		 1007FM801_DOUBLE_TLV("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1,
1008 db_scale_dsp),
1da177e4
LT		 1009FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1010{
1011 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1012 .name = "Digital Capture Source",
1013 .info = snd_fm801_info_mux,
1014 .get = snd_fm801_get_mux,
1015 .put = snd_fm801_put_mux,
1016}
1017};
1018
a5f22156 1019#define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi)
1da177e4 1020
e23e7a14 1021static struct snd_kcontrol_new snd_fm801_controls_multi[] = {
1da177e4
LT		 1022FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1023FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
10e8d78a
CL		 1024FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0),
1025FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0),
1026FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0),
1027FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0),
1da177e4
LT		 1028};
1029
a5f22156 1030static void snd_fm801_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1031{
a5f22156 1032 struct fm801 *chip = bus->private_data;
1da177e4
LT		 1033 chip->ac97_bus = NULL;
1034}
1035
a5f22156 1036static void snd_fm801_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1037{
a5f22156 1038 struct fm801 *chip = ac97->private_data;
1da177e4
LT		 1039 if (ac97->num == 0) {
1040 chip->ac97 = NULL;
1041 } else {
1042 chip->ac97_sec = NULL;
1043 }
1044}
1045
e23e7a14 1046static int snd_fm801_mixer(struct fm801 *chip)
1da177e4 1047{
a5f22156 1048 struct snd_ac97_template ac97;
1da177e4
LT		 1049 unsigned int i;
1050 int err;
a5f22156 1051 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1052 .write = snd_fm801_codec_write,
1053 .read = snd_fm801_codec_read,
1054 };
1055
1056 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1057 return err;
1058 chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus;
1059
1060 memset(&ac97, 0, sizeof(ac97));
1061 ac97.private_data = chip;
1062 ac97.private_free = snd_fm801_mixer_free_ac97;
1063 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1064 return err;
1065 if (chip->secondary) {
1066 ac97.num = 1;
1067 ac97.addr = chip->secondary_addr;
1068 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
1069 return err;
1070 }
1071 for (i = 0; i < FM801_CONTROLS; i++)
1072 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip));
1073 if (chip->multichannel) {
1074 for (i = 0; i < FM801_CONTROLS_MULTI; i++)
1075 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1076 }
1077 return 0;
1078}
1079
1080/*
1081 * initialization routines
1082 */
1083
b1e9ed26
TI		 1084static int wait_for_codec(struct fm801 *chip, unsigned int codec_id,
1085 unsigned short reg, unsigned long waits)
1086{
1087 unsigned long timeout = jiffies + waits;
1088
215dacc2
AS		 1089 fm801_writew(chip, AC97_CMD,
1090 reg | (codec_id << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
b1e9ed26
TI		 1091 udelay(5);
1092 do {
215dacc2
AS		 1093 if ((fm801_readw(chip, AC97_CMD) &
1094 (FM801_AC97_VALID | FM801_AC97_BUSY)) == FM801_AC97_VALID)
b1e9ed26
TI		 1095 return 0;
1096 schedule_timeout_uninterruptible(1);
1097 } while (time_after(timeout, jiffies));
1098 return -EIO;
1099}
1100
b56fa687 1101static int reset_codec(struct fm801 *chip)
b1e9ed26 1102{
b1e9ed26 1103 /* codec cold reset + AC'97 warm reset */
215dacc2
AS		 1104 fm801_writew(chip, CODEC_CTRL, (1 << 5) | (1 << 6));
1105 fm801_readw(chip, CODEC_CTRL); /* flush posting data */
b1e9ed26 1106 udelay(100);
215dacc2 1107 fm801_writew(chip, CODEC_CTRL, 0);
b1e9ed26 1108
b56fa687
AS		 1109 return wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750));
1110}
1111
1112static void snd_fm801_chip_multichannel_init(struct fm801 *chip)
1113{
1114 unsigned short cmdw;
b1e9ed26
TI		 1115
1116 if (chip->multichannel) {
1117 if (chip->secondary_addr) {
1118 wait_for_codec(chip, chip->secondary_addr,
1119 AC97_VENDOR_ID1, msecs_to_jiffies(50));
1120 } else {
1121 /* my card has the secondary codec */
1122 /* at address #3, so the loop is inverted */
58e4334e
HH		 1123 int i;
1124 for (i = 3; i > 0; i--) {
1125 if (!wait_for_codec(chip, i, AC97_VENDOR_ID1,
b1e9ed26 1126 msecs_to_jiffies(50))) {
215dacc2 1127 cmdw = fm801_readw(chip, AC97_DATA);
b1e9ed26
TI		 1128 if (cmdw != 0xffff && cmdw != 0) {
1129 chip->secondary = 1;
58e4334e 1130 chip->secondary_addr = i;
b1e9ed26
TI		 1131 break;
1132 }
1133 }
1134 }
1135 }
1136
1137 /* the recovery phase, it seems that probing for non-existing codec might */
1138 /* cause timeout problems */
1139 wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750));
1140 }
b56fa687 1141}
b1e9ed26 1142
b56fa687
AS		 1143static void snd_fm801_chip_init(struct fm801 *chip)
1144{
1145 unsigned short cmdw;
6bbe13ec 1146
b1e9ed26 1147 /* init volume */
215dacc2
AS		 1148 fm801_writew(chip, PCM_VOL, 0x0808);
1149 fm801_writew(chip, FM_VOL, 0x9f1f);
1150 fm801_writew(chip, I2S_VOL, 0x8808);
b1e9ed26
TI		 1151
1152 /* I2S control - I2S mode */
215dacc2 1153 fm801_writew(chip, I2S_MODE, 0x0003);
b1e9ed26 1154
6bbe13ec 1155 /* interrupt setup */
215dacc2 1156 cmdw = fm801_readw(chip, IRQ_MASK);
6bbe13ec
JK		 1157 if (chip->irq < 0)
1158 cmdw |= 0x00c3; /* mask everything, no PCM nor MPU */
1159 else
1160 cmdw &= ~0x0083; /* unmask MPU, PLAYBACK & CAPTURE */
215dacc2 1161 fm801_writew(chip, IRQ_MASK, cmdw);
b1e9ed26
TI		 1162
1163 /* interrupt clear */
215dacc2
AS		 1164 fm801_writew(chip, IRQ_STATUS,
1165 FM801_IRQ_PLAYBACK | FM801_IRQ_CAPTURE | FM801_IRQ_MPU);
b1e9ed26
TI		 1166}
1167
a5f22156 1168static int snd_fm801_free(struct fm801 *chip)
1da177e4
LT		 1169{
1170 unsigned short cmdw;
1171
1172 if (chip->irq < 0)
1173 goto __end_hw;
1174
1175 /* interrupt setup - mask everything */
215dacc2 1176 cmdw = fm801_readw(chip, IRQ_MASK);
1da177e4 1177 cmdw |= 0x00c3;
215dacc2 1178 fm801_writew(chip, IRQ_MASK, cmdw);
1da177e4 1179
d3d33aab 1180 devm_free_irq(chip->dev, chip->irq, chip);
e97e98c6 1181
1da177e4 1182 __end_hw:
fdb62b50 1183#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b 1184 if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
c37279b9 1185 snd_tea575x_exit(&chip->tea);
d4ecc83b
HV		 1186 v4l2_device_unregister(&chip->v4l2_dev);
1187 }
1da177e4 1188#endif
1da177e4
LT		 1189 return 0;
1190}
1191
a5f22156 1192static int snd_fm801_dev_free(struct snd_device *device)
1da177e4 1193{
a5f22156 1194 struct fm801 *chip = device->device_data;
1da177e4
LT		 1195 return snd_fm801_free(chip);
1196}
1197
e23e7a14
BP		 1198static int snd_fm801_create(struct snd_card *card,
1199 struct pci_dev *pci,
1200 int tea575x_tuner,
1201 int radio_nr,
1202 struct fm801 **rchip)
1da177e4 1203{
a5f22156 1204 struct fm801 *chip;
1da177e4 1205 int err;
a5f22156 1206 static struct snd_device_ops ops = {
1da177e4
LT		 1207 .dev_free = snd_fm801_dev_free,
1208 };
1209
1210 *rchip = NULL;
5618955c 1211 if ((err = pcim_enable_device(pci)) < 0)
1da177e4 1212 return err;
5618955c
AS		 1213 chip = devm_kzalloc(&pci->dev, sizeof(*chip), GFP_KERNEL);
1214 if (chip == NULL)
1da177e4 1215 return -ENOMEM;
1da177e4
LT		 1216 spin_lock_init(&chip->reg_lock);
1217 chip->card = card;
d3d33aab 1218 chip->dev = &pci->dev;
1da177e4 1219 chip->irq = -1;
6bbe13ec 1220 chip->tea575x_tuner = tea575x_tuner;
5618955c 1221 if ((err = pci_request_regions(pci, "FM801")) < 0)
1da177e4 1222 return err;
1da177e4 1223 chip->port = pci_resource_start(pci, 0);
b56fa687
AS		 1224
1225 if (pci->revision >= 0xb1) /* FM801-AU */
1226 chip->multichannel = 1;
1227
1228 if (!(chip->tea575x_tuner & TUNER_ONLY)) {
1229 if (reset_codec(chip) < 0) {
1230 dev_info(chip->card->dev,
1231 "Primary AC'97 codec not found, assume SF64-PCR (tuner-only)\n");
1232 chip->tea575x_tuner = 3 | TUNER_ONLY;
1233 } else {
1234 snd_fm801_chip_multichannel_init(chip);
1235 }
1236 }
1237
b56fa687 1238 if ((chip->tea575x_tuner & TUNER_ONLY) == 0) {
5618955c
AS		 1239 if (devm_request_irq(&pci->dev, pci->irq, snd_fm801_interrupt,
1240 IRQF_SHARED, KBUILD_MODNAME, chip)) {
1241 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
6bbe13ec
JK		 1242 snd_fm801_free(chip);
1243 return -EBUSY;
1244 }
1245 chip->irq = pci->irq;
1246 pci_set_master(pci);
1da177e4 1247 }
1da177e4 1248
610e1ae9
AS		 1249 snd_fm801_chip_init(chip);
1250
1da177e4
LT		 1251 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1252 snd_fm801_free(chip);
1253 return err;
1254 }
1255
fdb62b50 1256#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b
HV		 1257 err = v4l2_device_register(&pci->dev, &chip->v4l2_dev);
1258 if (err < 0) {
1259 snd_fm801_free(chip);
1260 return err;
1261 }
1262 chip->tea.v4l2_dev = &chip->v4l2_dev;
1263 chip->tea.radio_nr = radio_nr;
d7ba858a
OZ		 1264 chip->tea.private_data = chip;
1265 chip->tea.ops = &snd_fm801_tea_ops;
10ca7201 1266 sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));
b56fa687
AS		 1267 if ((chip->tea575x_tuner & TUNER_TYPE_MASK) > 0 &&
1268 (chip->tea575x_tuner & TUNER_TYPE_MASK) < 4) {
5daf53a6 1269 if (snd_tea575x_init(&chip->tea, THIS_MODULE)) {
9c7f9abf 1270 dev_err(card->dev, "TEA575x radio not found\n");
d4ecc83b 1271 snd_fm801_free(chip);
96760015
DC		 1272 return -ENODEV;
1273 }
b56fa687
AS		 1274 } else if ((chip->tea575x_tuner & TUNER_TYPE_MASK) == 0) {
1275 unsigned int tuner_only = chip->tea575x_tuner & TUNER_ONLY;
dbec6719 1276
d7ba858a
OZ		 1277 /* autodetect tuner connection */
1278 for (tea575x_tuner = 1; tea575x_tuner <= 3; tea575x_tuner++) {
1279 chip->tea575x_tuner = tea575x_tuner;
5daf53a6 1280 if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) {
9c7f9abf
TI		 1281 dev_info(card->dev,
1282 "detected TEA575x radio type %s\n",
8e699d2c 1283 get_tea575x_gpio(chip)->name);
d7ba858a
OZ		 1284 break;
1285 }
1286 }
96760015 1287 if (tea575x_tuner == 4) {
9c7f9abf 1288 dev_err(card->dev, "TEA575x radio not found\n");
c37279b9 1289 chip->tea575x_tuner = TUNER_DISABLED;
96760015 1290 }
dbec6719
AS		 1291
1292 chip->tea575x_tuner |= tuner_only;
96760015 1293 }
c37279b9 1294 if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
8e699d2c 1295 strlcpy(chip->tea.card, get_tea575x_gpio(chip)->name,
c37279b9
BH		 1296 sizeof(chip->tea.card));
1297 }
1da177e4
LT		 1298#endif
1299
1300 *rchip = chip;
1301 return 0;
1302}
1303
e23e7a14
BP		 1304static int snd_card_fm801_probe(struct pci_dev *pci,
1305 const struct pci_device_id *pci_id)
1da177e4
LT		 1306{
1307 static int dev;
a5f22156
TI		 1308 struct snd_card *card;
1309 struct fm801 *chip;
1310 struct snd_opl3 *opl3;
1da177e4
LT		 1311 int err;
1312
1313 if (dev >= SNDRV_CARDS)
1314 return -ENODEV;
1315 if (!enable[dev]) {
1316 dev++;
1317 return -ENOENT;
1318 }
1319
60c5772b
TI		 1320 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1321 0, &card);
e58de7ba
TI		 1322 if (err < 0)
1323 return err;
d4ecc83b 1324 if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], radio_nr[dev], &chip)) < 0) {
1da177e4
LT		 1325 snd_card_free(card);
1326 return err;
1327 }
b1e9ed26 1328 card->private_data = chip;
1da177e4
LT		 1329
1330 strcpy(card->driver, "FM801");
1331 strcpy(card->shortname, "ForteMedia FM801-");
1332 strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1333 sprintf(card->longname, "%s at 0x%lx, irq %i",
1334 card->shortname, chip->port, chip->irq);
1335
fb716c0b 1336 if (chip->tea575x_tuner & TUNER_ONLY)
e0a5d82a
AS		 1337 goto __fm801_tuner_only;
1338
483337f9 1339 if ((err = snd_fm801_pcm(chip, 0)) < 0) {
1da177e4
LT		 1340 snd_card_free(card);
1341 return err;
1342 }
1343 if ((err = snd_fm801_mixer(chip)) < 0) {
1344 snd_card_free(card);
1345 return err;
1346 }
1347 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
215dacc2 1348 chip->port + FM801_MPU401_DATA,
dba8b469
CL		 1349 MPU401_INFO_INTEGRATED |
1350 MPU401_INFO_IRQ_HOOK,
1351 -1, &chip->rmidi)) < 0) {
1da177e4
LT		 1352 snd_card_free(card);
1353 return err;
1354 }
215dacc2
AS		 1355 if ((err = snd_opl3_create(card, chip->port + FM801_OPL3_BANK0,
1356 chip->port + FM801_OPL3_BANK1,
1da177e4
LT		 1357 OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
1358 snd_card_free(card);
1359 return err;
1360 }
1361 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1362 snd_card_free(card);
1363 return err;
1364 }
1365
e0a5d82a 1366 __fm801_tuner_only:
1da177e4
LT		 1367 if ((err = snd_card_register(card)) < 0) {
1368 snd_card_free(card);
1369 return err;
1370 }
1371 pci_set_drvdata(pci, card);
1372 dev++;
1373 return 0;
1374}
1375
e23e7a14 1376static void snd_card_fm801_remove(struct pci_dev *pci)
1da177e4
LT		 1377{
1378 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT		 1379}
1380
c7561cd8 1381#ifdef CONFIG_PM_SLEEP
b1e9ed26
TI		 1382static unsigned char saved_regs[] = {
1383 FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC,
1384 FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2,
1385 FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2,
1386 FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL,
1387};
1388
68cb2b55 1389static int snd_fm801_suspend(struct device *dev)
b1e9ed26 1390{
68cb2b55 1391 struct snd_card *card = dev_get_drvdata(dev);
b1e9ed26
TI		 1392 struct fm801 *chip = card->private_data;
1393 int i;
1394
1395 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
14da04b5 1396
b1e9ed26 1397 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
37ba8fca
AS		 1398 chip->saved_regs[i] = fm801_ioread16(chip, saved_regs[i]);
1399
14da04b5
AS		 1400 if (chip->tea575x_tuner & TUNER_ONLY) {
1401 /* FIXME: tea575x suspend */
1402 } else {
1403 snd_pcm_suspend_all(chip->pcm);
1404 snd_ac97_suspend(chip->ac97);
1405 snd_ac97_suspend(chip->ac97_sec);
1406 }
1407
b1e9ed26
TI		 1408 return 0;
1409}
1410
68cb2b55 1411static int snd_fm801_resume(struct device *dev)
b1e9ed26 1412{
68cb2b55 1413 struct snd_card *card = dev_get_drvdata(dev);
b1e9ed26
TI		 1414 struct fm801 *chip = card->private_data;
1415 int i;
1416
b56fa687
AS		 1417 if (chip->tea575x_tuner & TUNER_ONLY) {
1418 snd_fm801_chip_init(chip);
1419 } else {
1420 reset_codec(chip);
1421 snd_fm801_chip_multichannel_init(chip);
1422 snd_fm801_chip_init(chip);
14da04b5
AS		 1423 snd_ac97_resume(chip->ac97);
1424 snd_ac97_resume(chip->ac97_sec);
b56fa687 1425 }
14da04b5 1426
b1e9ed26 1427 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
4b5c15f7 1428 fm801_iowrite16(chip, saved_regs[i], chip->saved_regs[i]);
b1e9ed26 1429
cb41f271
AS		 1430#ifdef CONFIG_SND_FM801_TEA575X_BOOL
1431 if (!(chip->tea575x_tuner & TUNER_DISABLED))
1432 snd_tea575x_set_freq(&chip->tea);
1433#endif
b1e9ed26
TI		 1434
1435 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1436 return 0;
1437}
68cb2b55
TI		 1438
1439static SIMPLE_DEV_PM_OPS(snd_fm801_pm, snd_fm801_suspend, snd_fm801_resume);
1440#define SND_FM801_PM_OPS &snd_fm801_pm
1441#else
1442#define SND_FM801_PM_OPS NULL
c7561cd8 1443#endif /* CONFIG_PM_SLEEP */
b1e9ed26 1444
e9f66d9b 1445static struct pci_driver fm801_driver = {
3733e424 1446 .name = KBUILD_MODNAME,
1da177e4
LT		 1447 .id_table = snd_fm801_ids,
1448 .probe = snd_card_fm801_probe,
e23e7a14 1449 .remove = snd_card_fm801_remove,
68cb2b55
TI		 1450 .driver = {
1451 .pm = SND_FM801_PM_OPS,
1452 },
1da177e4
LT		 1453};
1454
e9f66d9b 1455module_pci_driver(fm801_driver);
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