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ALSA: hda - show HBR(High Bit Rate) pin cap in procfs
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CommitLineData
1da177e4
LT
1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the Free
8 * Software Foundation; either version 2 of the License, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc., 59
18 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21#ifndef __SOUND_HDA_CODEC_H
22#define __SOUND_HDA_CODEC_H
23
24#include <sound/info.h>
25#include <sound/control.h>
26#include <sound/pcm.h>
2807314d 27#include <sound/hwdep.h>
1da177e4 28
cb53c626
TI
29#if defined(CONFIG_PM) || defined(CONFIG_SND_HDA_POWER_SAVE)
30#define SND_HDA_NEEDS_RESUME /* resume control code is required */
31#endif
32
1da177e4
LT
33/*
34 * nodes
35 */
36#define AC_NODE_ROOT 0x00
37
38/*
39 * function group types
40 */
41enum {
42 AC_GRP_AUDIO_FUNCTION = 0x01,
43 AC_GRP_MODEM_FUNCTION = 0x02,
44};
45
46/*
47 * widget types
48 */
49enum {
50 AC_WID_AUD_OUT, /* Audio Out */
51 AC_WID_AUD_IN, /* Audio In */
52 AC_WID_AUD_MIX, /* Audio Mixer */
53 AC_WID_AUD_SEL, /* Audio Selector */
54 AC_WID_PIN, /* Pin Complex */
55 AC_WID_POWER, /* Power */
56 AC_WID_VOL_KNB, /* Volume Knob */
57 AC_WID_BEEP, /* Beep Generator */
58 AC_WID_VENDOR = 0x0f /* Vendor specific */
59};
60
61/*
62 * GET verbs
63 */
64#define AC_VERB_GET_STREAM_FORMAT 0x0a00
65#define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00
66#define AC_VERB_GET_PROC_COEF 0x0c00
67#define AC_VERB_GET_COEF_INDEX 0x0d00
68#define AC_VERB_PARAMETERS 0x0f00
69#define AC_VERB_GET_CONNECT_SEL 0x0f01
70#define AC_VERB_GET_CONNECT_LIST 0x0f02
71#define AC_VERB_GET_PROC_STATE 0x0f03
72#define AC_VERB_GET_SDI_SELECT 0x0f04
73#define AC_VERB_GET_POWER_STATE 0x0f05
74#define AC_VERB_GET_CONV 0x0f06
75#define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07
76#define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08
77#define AC_VERB_GET_PIN_SENSE 0x0f09
78#define AC_VERB_GET_BEEP_CONTROL 0x0f0a
79#define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c
3982d17e 80#define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d
a1855d80 81#define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */
1da177e4
LT
82#define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f
83/* f10-f1a: GPIO */
16ded525
TI
84#define AC_VERB_GET_GPIO_DATA 0x0f15
85#define AC_VERB_GET_GPIO_MASK 0x0f16
86#define AC_VERB_GET_GPIO_DIRECTION 0x0f17
797760ab 87#define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18
3982d17e 88#define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19
797760ab 89#define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a
1da177e4 90#define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c
86284e45
TI
91/* f20: AFG/MFG */
92#define AC_VERB_GET_SUBSYSTEM_ID 0x0f20
955d2488
TI
93#define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d
94#define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e
95#define AC_VERB_GET_HDMI_ELDD 0x0f2f
96#define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30
97#define AC_VERB_GET_HDMI_DIP_DATA 0x0f31
98#define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32
99#define AC_VERB_GET_HDMI_CP_CTRL 0x0f33
100#define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34
1da177e4
LT
101
102/*
103 * SET verbs
104 */
105#define AC_VERB_SET_STREAM_FORMAT 0x200
106#define AC_VERB_SET_AMP_GAIN_MUTE 0x300
107#define AC_VERB_SET_PROC_COEF 0x400
108#define AC_VERB_SET_COEF_INDEX 0x500
109#define AC_VERB_SET_CONNECT_SEL 0x701
110#define AC_VERB_SET_PROC_STATE 0x703
111#define AC_VERB_SET_SDI_SELECT 0x704
112#define AC_VERB_SET_POWER_STATE 0x705
113#define AC_VERB_SET_CHANNEL_STREAMID 0x706
114#define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707
115#define AC_VERB_SET_UNSOLICITED_ENABLE 0x708
116#define AC_VERB_SET_PIN_SENSE 0x709
117#define AC_VERB_SET_BEEP_CONTROL 0x70a
a2a20939 118#define AC_VERB_SET_EAPD_BTLENABLE 0x70c
1da177e4
LT
119#define AC_VERB_SET_DIGI_CONVERT_1 0x70d
120#define AC_VERB_SET_DIGI_CONVERT_2 0x70e
121#define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f
16ded525
TI
122#define AC_VERB_SET_GPIO_DATA 0x715
123#define AC_VERB_SET_GPIO_MASK 0x716
124#define AC_VERB_SET_GPIO_DIRECTION 0x717
797760ab 125#define AC_VERB_SET_GPIO_WAKE_MASK 0x718
3982d17e 126#define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719
797760ab 127#define AC_VERB_SET_GPIO_STICKY_MASK 0x71a
1da177e4
LT
128#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c
129#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d
130#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e
131#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f
d0513fc6 132#define AC_VERB_SET_EAPD 0x788
1da177e4 133#define AC_VERB_SET_CODEC_RESET 0x7ff
955d2488
TI
134#define AC_VERB_SET_CVT_CHAN_COUNT 0x72d
135#define AC_VERB_SET_HDMI_DIP_INDEX 0x730
136#define AC_VERB_SET_HDMI_DIP_DATA 0x731
137#define AC_VERB_SET_HDMI_DIP_XMIT 0x732
138#define AC_VERB_SET_HDMI_CP_CTRL 0x733
139#define AC_VERB_SET_HDMI_CHAN_SLOT 0x734
1da177e4
LT
140
141/*
142 * Parameter IDs
143 */
144#define AC_PAR_VENDOR_ID 0x00
145#define AC_PAR_SUBSYSTEM_ID 0x01
146#define AC_PAR_REV_ID 0x02
147#define AC_PAR_NODE_COUNT 0x04
148#define AC_PAR_FUNCTION_TYPE 0x05
149#define AC_PAR_AUDIO_FG_CAP 0x08
150#define AC_PAR_AUDIO_WIDGET_CAP 0x09
151#define AC_PAR_PCM 0x0a
152#define AC_PAR_STREAM 0x0b
153#define AC_PAR_PIN_CAP 0x0c
154#define AC_PAR_AMP_IN_CAP 0x0d
155#define AC_PAR_CONNLIST_LEN 0x0e
156#define AC_PAR_POWER_STATE 0x0f
157#define AC_PAR_PROC_CAP 0x10
158#define AC_PAR_GPIO_CAP 0x11
159#define AC_PAR_AMP_OUT_CAP 0x12
e1716139 160#define AC_PAR_VOL_KNB_CAP 0x13
955d2488 161#define AC_PAR_HDMI_LPCM_CAP 0x20
1da177e4
LT
162
163/*
164 * AC_VERB_PARAMETERS results (32bit)
165 */
166
167/* Function Group Type */
168#define AC_FGT_TYPE (0xff<<0)
169#define AC_FGT_TYPE_SHIFT 0
170#define AC_FGT_UNSOL_CAP (1<<8)
171
172/* Audio Function Group Capabilities */
173#define AC_AFG_OUT_DELAY (0xf<<0)
174#define AC_AFG_IN_DELAY (0xf<<8)
175#define AC_AFG_BEEP_GEN (1<<16)
176
177/* Audio Widget Capabilities */
178#define AC_WCAP_STEREO (1<<0) /* stereo I/O */
179#define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */
180#define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */
181#define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */
182#define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */
183#define AC_WCAP_STRIPE (1<<5) /* stripe */
184#define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */
185#define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */
186#define AC_WCAP_CONN_LIST (1<<8) /* connection list */
187#define AC_WCAP_DIGITAL (1<<9) /* digital I/O */
188#define AC_WCAP_POWER (1<<10) /* power control */
189#define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */
955d2488
TI
190#define AC_WCAP_CP_CAPS (1<<12) /* content protection */
191#define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */
1da177e4
LT
192#define AC_WCAP_DELAY (0xf<<16)
193#define AC_WCAP_DELAY_SHIFT 16
194#define AC_WCAP_TYPE (0xf<<20)
195#define AC_WCAP_TYPE_SHIFT 20
196
197/* supported PCM rates and bits */
198#define AC_SUPPCM_RATES (0xfff << 0)
199#define AC_SUPPCM_BITS_8 (1<<16)
200#define AC_SUPPCM_BITS_16 (1<<17)
201#define AC_SUPPCM_BITS_20 (1<<18)
202#define AC_SUPPCM_BITS_24 (1<<19)
203#define AC_SUPPCM_BITS_32 (1<<20)
204
205/* supported PCM stream format */
206#define AC_SUPFMT_PCM (1<<0)
207#define AC_SUPFMT_FLOAT32 (1<<1)
208#define AC_SUPFMT_AC3 (1<<2)
209
797760ab
AP
210/* GP I/O count */
211#define AC_GPIO_IO_COUNT (0xff<<0)
212#define AC_GPIO_O_COUNT (0xff<<8)
213#define AC_GPIO_O_COUNT_SHIFT 8
214#define AC_GPIO_I_COUNT (0xff<<16)
215#define AC_GPIO_I_COUNT_SHIFT 16
216#define AC_GPIO_UNSOLICITED (1<<30)
217#define AC_GPIO_WAKE (1<<31)
218
219/* Converter stream, channel */
220#define AC_CONV_CHANNEL (0xf<<0)
221#define AC_CONV_STREAM (0xf<<4)
222#define AC_CONV_STREAM_SHIFT 4
223
224/* Input converter SDI select */
225#define AC_SDI_SELECT (0xf<<0)
226
955d2488 227/* Unsolicited response control */
797760ab
AP
228#define AC_UNSOL_TAG (0x3f<<0)
229#define AC_UNSOL_ENABLED (1<<7)
955d2488
TI
230#define AC_USRSP_EN AC_UNSOL_ENABLED
231
232/* Unsolicited responses */
233#define AC_UNSOL_RES_TAG (0x3f<<26)
234#define AC_UNSOL_RES_TAG_SHIFT 26
235#define AC_UNSOL_RES_SUBTAG (0x1f<<21)
236#define AC_UNSOL_RES_SUBTAG_SHIFT 21
237#define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */
238#define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */
239#define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */
240#define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */
797760ab 241
1da177e4
LT
242/* Pin widget capabilies */
243#define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */
244#define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */
245#define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */
246#define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */
247#define AC_PINCAP_OUT (1<<4) /* output capable */
248#define AC_PINCAP_IN (1<<5) /* input capable */
249#define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */
3982d17e
AP
250/* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
251 * but is marked reserved in the Intel HDA specification.
252 */
253#define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */
955d2488
TI
254/* Note: The same bit as LR_SWAP is newly defined as HDMI capability
255 * in HD-audio specification
256 */
257#define AC_PINCAP_HDMI (1<<7) /* HDMI pin */
1a12de1e 258#define AC_PINCAP_VREF (0x37<<8)
1da177e4
LT
259#define AC_PINCAP_VREF_SHIFT 8
260#define AC_PINCAP_EAPD (1<<16) /* EAPD capable */
b923528e 261#define AC_PINCAP_HBR (1<<27) /* High Bit Rate */
1a12de1e
M
262/* Vref status (used in pin cap) */
263#define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */
264#define AC_PINCAP_VREF_50 (1<<1) /* 50% */
265#define AC_PINCAP_VREF_GRD (1<<2) /* ground */
266#define AC_PINCAP_VREF_80 (1<<4) /* 80% */
267#define AC_PINCAP_VREF_100 (1<<5) /* 100% */
1da177e4
LT
268
269/* Amplifier capabilities */
270#define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */
271#define AC_AMPCAP_OFFSET_SHIFT 0
272#define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */
273#define AC_AMPCAP_NUM_STEPS_SHIFT 8
d01ce99f
TI
274#define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB
275 * in 0.25dB
276 */
1da177e4
LT
277#define AC_AMPCAP_STEP_SIZE_SHIFT 16
278#define AC_AMPCAP_MUTE (1<<31) /* mute capable */
279#define AC_AMPCAP_MUTE_SHIFT 31
280
281/* Connection list */
282#define AC_CLIST_LENGTH (0x7f<<0)
283#define AC_CLIST_LONG (1<<7)
284
285/* Supported power status */
286#define AC_PWRST_D0SUP (1<<0)
287#define AC_PWRST_D1SUP (1<<1)
288#define AC_PWRST_D2SUP (1<<2)
289#define AC_PWRST_D3SUP (1<<3)
83d605fd
WF
290#define AC_PWRST_D3COLDSUP (1<<4)
291#define AC_PWRST_S3D3COLDSUP (1<<29)
292#define AC_PWRST_CLKSTOP (1<<30)
293#define AC_PWRST_EPSS (1U<<31)
1da177e4 294
54d17403 295/* Power state values */
797760ab
AP
296#define AC_PWRST_SETTING (0xf<<0)
297#define AC_PWRST_ACTUAL (0xf<<4)
298#define AC_PWRST_ACTUAL_SHIFT 4
54d17403
TI
299#define AC_PWRST_D0 0x00
300#define AC_PWRST_D1 0x01
301#define AC_PWRST_D2 0x02
302#define AC_PWRST_D3 0x03
303
1da177e4
LT
304/* Processing capabilies */
305#define AC_PCAP_BENIGN (1<<0)
306#define AC_PCAP_NUM_COEF (0xff<<8)
797760ab 307#define AC_PCAP_NUM_COEF_SHIFT 8
1da177e4
LT
308
309/* Volume knobs capabilities */
310#define AC_KNBCAP_NUM_STEPS (0x7f<<0)
38fcaf8e 311#define AC_KNBCAP_DELTA (1<<7)
1da177e4 312
955d2488
TI
313/* HDMI LPCM capabilities */
314#define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */
315#define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */
316#define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */
317#define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */
318#define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */
319#define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */
320#define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */
321#define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */
322#define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */
323#define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */
324#define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */
325#define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */
326#define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */
327#define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */
328
1da177e4
LT
329/*
330 * Control Parameters
331 */
332
333/* Amp gain/mute */
d427c77e 334#define AC_AMP_MUTE (1<<7)
1da177e4
LT
335#define AC_AMP_GAIN (0x7f)
336#define AC_AMP_GET_INDEX (0xf<<0)
337
338#define AC_AMP_GET_LEFT (1<<13)
339#define AC_AMP_GET_RIGHT (0<<13)
340#define AC_AMP_GET_OUTPUT (1<<15)
341#define AC_AMP_GET_INPUT (0<<15)
342
343#define AC_AMP_SET_INDEX (0xf<<8)
344#define AC_AMP_SET_INDEX_SHIFT 8
345#define AC_AMP_SET_RIGHT (1<<12)
346#define AC_AMP_SET_LEFT (1<<13)
347#define AC_AMP_SET_INPUT (1<<14)
348#define AC_AMP_SET_OUTPUT (1<<15)
349
350/* DIGITAL1 bits */
351#define AC_DIG1_ENABLE (1<<0)
352#define AC_DIG1_V (1<<1)
353#define AC_DIG1_VCFG (1<<2)
354#define AC_DIG1_EMPHASIS (1<<3)
355#define AC_DIG1_COPYRIGHT (1<<4)
356#define AC_DIG1_NONAUDIO (1<<5)
357#define AC_DIG1_PROFESSIONAL (1<<6)
358#define AC_DIG1_LEVEL (1<<7)
359
797760ab
AP
360/* DIGITAL2 bits */
361#define AC_DIG2_CC (0x7f<<0)
362
1da177e4
LT
363/* Pin widget control - 8bit */
364#define AC_PINCTL_VREFEN (0x7<<0)
98f759a6
TI
365#define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */
366#define AC_PINCTL_VREF_50 1 /* 50% */
367#define AC_PINCTL_VREF_GRD 2 /* ground */
368#define AC_PINCTL_VREF_80 4 /* 80% */
369#define AC_PINCTL_VREF_100 5 /* 100% */
1da177e4
LT
370#define AC_PINCTL_IN_EN (1<<5)
371#define AC_PINCTL_OUT_EN (1<<6)
372#define AC_PINCTL_HP_EN (1<<7)
373
797760ab
AP
374/* Pin sense - 32bit */
375#define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff)
376#define AC_PINSENSE_PRESENCE (1<<31)
955d2488 377#define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */
797760ab
AP
378
379/* EAPD/BTL enable - 32bit */
380#define AC_EAPDBTL_BALANCED (1<<0)
381#define AC_EAPDBTL_EAPD (1<<1)
382#define AC_EAPDBTL_LR_SWAP (1<<2)
383
955d2488
TI
384/* HDMI ELD data */
385#define AC_ELDD_ELD_VALID (1<<31)
386#define AC_ELDD_ELD_DATA 0xff
387
388/* HDMI DIP size */
389#define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */
390#define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */
391
392/* HDMI DIP index */
393#define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */
394#define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */
395
396/* HDMI DIP xmit (transmit) control */
397#define AC_DIPXMIT_MASK (0x3<<6)
398#define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */
399#define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */
400#define AC_DIPXMIT_BEST (0x3<<6) /* best effort */
401
402/* HDMI content protection (CP) control */
403#define AC_CPCTRL_CES (1<<9) /* current encryption state */
404#define AC_CPCTRL_READY (1<<8) /* ready bit */
405#define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */
406#define AC_CPCTRL_STATE (3<<0) /* current CP request state */
407
408/* Converter channel <-> HDMI slot mapping */
409#define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */
410#define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */
411
1da177e4
LT
412/* configuration default - 32bit */
413#define AC_DEFCFG_SEQUENCE (0xf<<0)
414#define AC_DEFCFG_DEF_ASSOC (0xf<<4)
d21b37ea 415#define AC_DEFCFG_ASSOC_SHIFT 4
1da177e4 416#define AC_DEFCFG_MISC (0xf<<8)
d21b37ea 417#define AC_DEFCFG_MISC_SHIFT 8
797760ab 418#define AC_DEFCFG_MISC_NO_PRESENCE (1<<0)
1da177e4
LT
419#define AC_DEFCFG_COLOR (0xf<<12)
420#define AC_DEFCFG_COLOR_SHIFT 12
421#define AC_DEFCFG_CONN_TYPE (0xf<<16)
422#define AC_DEFCFG_CONN_TYPE_SHIFT 16
423#define AC_DEFCFG_DEVICE (0xf<<20)
424#define AC_DEFCFG_DEVICE_SHIFT 20
425#define AC_DEFCFG_LOCATION (0x3f<<24)
426#define AC_DEFCFG_LOCATION_SHIFT 24
427#define AC_DEFCFG_PORT_CONN (0x3<<30)
428#define AC_DEFCFG_PORT_CONN_SHIFT 30
429
430/* device device types (0x0-0xf) */
431enum {
432 AC_JACK_LINE_OUT,
433 AC_JACK_SPEAKER,
434 AC_JACK_HP_OUT,
435 AC_JACK_CD,
436 AC_JACK_SPDIF_OUT,
437 AC_JACK_DIG_OTHER_OUT,
438 AC_JACK_MODEM_LINE_SIDE,
439 AC_JACK_MODEM_HAND_SIDE,
440 AC_JACK_LINE_IN,
441 AC_JACK_AUX,
442 AC_JACK_MIC_IN,
443 AC_JACK_TELEPHONY,
444 AC_JACK_SPDIF_IN,
445 AC_JACK_DIG_OTHER_IN,
446 AC_JACK_OTHER = 0xf,
447};
448
449/* jack connection types (0x0-0xf) */
450enum {
451 AC_JACK_CONN_UNKNOWN,
452 AC_JACK_CONN_1_8,
453 AC_JACK_CONN_1_4,
454 AC_JACK_CONN_ATAPI,
455 AC_JACK_CONN_RCA,
456 AC_JACK_CONN_OPTICAL,
457 AC_JACK_CONN_OTHER_DIGITAL,
458 AC_JACK_CONN_OTHER_ANALOG,
459 AC_JACK_CONN_DIN,
460 AC_JACK_CONN_XLR,
461 AC_JACK_CONN_RJ11,
462 AC_JACK_CONN_COMB,
463 AC_JACK_CONN_OTHER = 0xf,
464};
465
466/* jack colors (0x0-0xf) */
467enum {
468 AC_JACK_COLOR_UNKNOWN,
469 AC_JACK_COLOR_BLACK,
470 AC_JACK_COLOR_GREY,
471 AC_JACK_COLOR_BLUE,
472 AC_JACK_COLOR_GREEN,
473 AC_JACK_COLOR_RED,
474 AC_JACK_COLOR_ORANGE,
475 AC_JACK_COLOR_YELLOW,
476 AC_JACK_COLOR_PURPLE,
477 AC_JACK_COLOR_PINK,
478 AC_JACK_COLOR_WHITE = 0xe,
479 AC_JACK_COLOR_OTHER,
480};
481
482/* Jack location (0x0-0x3f) */
483/* common case */
484enum {
485 AC_JACK_LOC_NONE,
486 AC_JACK_LOC_REAR,
487 AC_JACK_LOC_FRONT,
488 AC_JACK_LOC_LEFT,
489 AC_JACK_LOC_RIGHT,
490 AC_JACK_LOC_TOP,
491 AC_JACK_LOC_BOTTOM,
492};
493/* bits 4-5 */
494enum {
495 AC_JACK_LOC_EXTERNAL = 0x00,
496 AC_JACK_LOC_INTERNAL = 0x10,
497 AC_JACK_LOC_SEPARATE = 0x20,
498 AC_JACK_LOC_OTHER = 0x30,
499};
500enum {
501 /* external on primary chasis */
502 AC_JACK_LOC_REAR_PANEL = 0x07,
503 AC_JACK_LOC_DRIVE_BAY,
504 /* internal */
505 AC_JACK_LOC_RISER = 0x17,
506 AC_JACK_LOC_HDMI,
507 AC_JACK_LOC_ATAPI,
508 /* others */
509 AC_JACK_LOC_MOBILE_IN = 0x37,
510 AC_JACK_LOC_MOBILE_OUT,
511};
512
513/* Port connectivity (0-3) */
514enum {
515 AC_JACK_PORT_COMPLEX,
516 AC_JACK_PORT_NONE,
517 AC_JACK_PORT_FIXED,
518 AC_JACK_PORT_BOTH,
519};
520
521/* max. connections to a widget */
54d17403 522#define HDA_MAX_CONNECTIONS 32
1da177e4
LT
523
524/* max. codec address */
525#define HDA_MAX_CODEC_ADDRESS 0x0f
526
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527/*
528 * generic arrays
529 */
530struct snd_array {
531 unsigned int used;
532 unsigned int alloced;
533 unsigned int elem_size;
534 unsigned int alloc_align;
535 void *list;
536};
537
538void *snd_array_new(struct snd_array *array);
539void snd_array_free(struct snd_array *array);
540static inline void snd_array_init(struct snd_array *array, unsigned int size,
541 unsigned int align)
542{
543 array->elem_size = size;
544 array->alloc_align = align;
545}
546
f43aa025
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547static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
548{
549 return array->list + idx * array->elem_size;
550}
551
552static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
553{
554 return (unsigned long)(ptr - array->list) / array->elem_size;
555}
556
1da177e4
LT
557/*
558 * Structures
559 */
560
561struct hda_bus;
1cd2224c 562struct hda_beep;
1da177e4
LT
563struct hda_codec;
564struct hda_pcm;
565struct hda_pcm_stream;
566struct hda_bus_unsolicited;
567
568/* NID type */
569typedef u16 hda_nid_t;
570
571/* bus operators */
572struct hda_bus_ops {
573 /* send a single command */
33fa35ed 574 int (*command)(struct hda_bus *bus, unsigned int cmd);
1da177e4 575 /* get a response from the last command */
deadff16 576 unsigned int (*get_response)(struct hda_bus *bus, unsigned int addr);
1da177e4
LT
577 /* free the private data */
578 void (*private_free)(struct hda_bus *);
176d5335 579 /* attach a PCM stream */
33fa35ed
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580 int (*attach_pcm)(struct hda_bus *bus, struct hda_codec *codec,
581 struct hda_pcm *pcm);
8dd78330
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582 /* reset bus for retry verb */
583 void (*bus_reset)(struct hda_bus *bus);
cb53c626 584#ifdef CONFIG_SND_HDA_POWER_SAVE
561de31a 585 /* notify power-up/down from codec to controller */
33fa35ed 586 void (*pm_notify)(struct hda_bus *bus);
cb53c626 587#endif
1da177e4
LT
588};
589
590/* template to pass to the bus constructor */
591struct hda_bus_template {
592 void *private_data;
593 struct pci_dev *pci;
594 const char *modelname;
fee2fba3 595 int *power_save;
1da177e4
LT
596 struct hda_bus_ops ops;
597};
598
599/*
600 * codec bus
601 *
602 * each controller needs to creata a hda_bus to assign the accessor.
603 * A hda_bus contains several codecs in the list codec_list.
604 */
605struct hda_bus {
c8b6bf9b 606 struct snd_card *card;
1da177e4
LT
607
608 /* copied from template */
609 void *private_data;
610 struct pci_dev *pci;
611 const char *modelname;
fee2fba3 612 int *power_save;
1da177e4
LT
613 struct hda_bus_ops ops;
614
615 /* codec linked list */
616 struct list_head codec_list;
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617 /* link caddr -> codec */
618 struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
1da177e4 619
62932df8 620 struct mutex cmd_mutex;
1da177e4
LT
621
622 /* unsolicited event queue */
623 struct hda_bus_unsolicited *unsol;
e8c0ee5d 624 char workq_name[16];
6acaed38 625 struct workqueue_struct *workq; /* common workqueue for codecs */
1da177e4 626
529bd6c4
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627 /* assigned PCMs */
628 DECLARE_BITMAP(pcm_dev_bits, SNDRV_PCM_DEVICES);
629
52987656
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630 /* misc op flags */
631 unsigned int needs_damn_long_delay :1;
b20f3b83
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632 unsigned int allow_bus_reset:1; /* allow bus reset at fatal error */
633 unsigned int sync_write:1; /* sync after verb write */
634 /* status for codec/controller */
b94d3539 635 unsigned int shutdown :1; /* being unloaded */
b613291f 636 unsigned int rirb_error:1; /* error in codec communication */
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637 unsigned int response_reset:1; /* controller was reset */
638 unsigned int in_reset:1; /* during reset operation */
1da177e4
LT
639};
640
641/*
642 * codec preset
643 *
644 * Known codecs have the patch to build and set up the controls/PCMs
645 * better than the generic parser.
646 */
647struct hda_codec_preset {
648 unsigned int id;
649 unsigned int mask;
650 unsigned int subs;
651 unsigned int subs_mask;
652 unsigned int rev;
ca7cfae9 653 hda_nid_t afg, mfg;
1da177e4
LT
654 const char *name;
655 int (*patch)(struct hda_codec *codec);
656};
657
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658struct hda_codec_preset_list {
659 const struct hda_codec_preset *preset;
660 struct module *owner;
661 struct list_head list;
662};
663
664/* initial hook */
665int snd_hda_add_codec_preset(struct hda_codec_preset_list *preset);
666int snd_hda_delete_codec_preset(struct hda_codec_preset_list *preset);
667
1da177e4
LT
668/* ops set by the preset patch */
669struct hda_codec_ops {
670 int (*build_controls)(struct hda_codec *codec);
671 int (*build_pcms)(struct hda_codec *codec);
672 int (*init)(struct hda_codec *codec);
673 void (*free)(struct hda_codec *codec);
674 void (*unsol_event)(struct hda_codec *codec, unsigned int res);
cb53c626 675#ifdef SND_HDA_NEEDS_RESUME
1da177e4
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676 int (*suspend)(struct hda_codec *codec, pm_message_t state);
677 int (*resume)(struct hda_codec *codec);
678#endif
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679#ifdef CONFIG_SND_HDA_POWER_SAVE
680 int (*check_power_status)(struct hda_codec *codec, hda_nid_t nid);
681#endif
fb8d1a34 682 void (*reboot_notify)(struct hda_codec *codec);
1da177e4
LT
683};
684
685/* record for amp information cache */
01751f54 686struct hda_cache_head {
1da177e4 687 u32 key; /* hash key */
01751f54
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688 u16 val; /* assigned value */
689 u16 next; /* next link; -1 = terminal */
690};
691
692struct hda_amp_info {
693 struct hda_cache_head head;
1da177e4 694 u32 amp_caps; /* amp capabilities */
7f0e2f8b 695 u16 vol[2]; /* current volume & mute */
01751f54
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696};
697
698struct hda_cache_rec {
699 u16 hash[64]; /* hash table for index */
603c4019 700 struct snd_array buf; /* record entries */
1da177e4
LT
701};
702
703/* PCM callbacks */
704struct hda_pcm_ops {
705 int (*open)(struct hda_pcm_stream *info, struct hda_codec *codec,
c8b6bf9b 706 struct snd_pcm_substream *substream);
1da177e4 707 int (*close)(struct hda_pcm_stream *info, struct hda_codec *codec,
c8b6bf9b 708 struct snd_pcm_substream *substream);
1da177e4
LT
709 int (*prepare)(struct hda_pcm_stream *info, struct hda_codec *codec,
710 unsigned int stream_tag, unsigned int format,
c8b6bf9b 711 struct snd_pcm_substream *substream);
1da177e4 712 int (*cleanup)(struct hda_pcm_stream *info, struct hda_codec *codec,
c8b6bf9b 713 struct snd_pcm_substream *substream);
1da177e4
LT
714};
715
716/* PCM information for each substream */
717struct hda_pcm_stream {
d01ce99f 718 unsigned int substreams; /* number of substreams, 0 = not exist*/
1da177e4
LT
719 unsigned int channels_min; /* min. number of channels */
720 unsigned int channels_max; /* max. number of channels */
721 hda_nid_t nid; /* default NID to query rates/formats/bps, or set up */
722 u32 rates; /* supported rates */
723 u64 formats; /* supported formats (SNDRV_PCM_FMTBIT_) */
724 unsigned int maxbps; /* supported max. bit per sample */
725 struct hda_pcm_ops ops;
726};
727
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728/* PCM types */
729enum {
730 HDA_PCM_TYPE_AUDIO,
731 HDA_PCM_TYPE_SPDIF,
732 HDA_PCM_TYPE_HDMI,
733 HDA_PCM_TYPE_MODEM,
734 HDA_PCM_NTYPES
735};
736
1da177e4
LT
737/* for PCM creation */
738struct hda_pcm {
739 char *name;
740 struct hda_pcm_stream stream[2];
7ba72ba1 741 unsigned int pcm_type; /* HDA_PCM_TYPE_XXX */
176d5335
TI
742 int device; /* device number to assign */
743 struct snd_pcm *pcm; /* assigned PCM instance */
1da177e4
LT
744};
745
746/* codec information */
747struct hda_codec {
748 struct hda_bus *bus;
749 unsigned int addr; /* codec addr*/
750 struct list_head list; /* list point */
751
752 hda_nid_t afg; /* AFG node id */
673b683a 753 hda_nid_t mfg; /* MFG node id */
1da177e4
LT
754
755 /* ids */
234b4346 756 u32 function_id;
1da177e4
LT
757 u32 vendor_id;
758 u32 subsystem_id;
759 u32 revision_id;
760
761 /* detected preset */
762 const struct hda_codec_preset *preset;
1289e9e8 763 struct module *owner;
812a2cca
TI
764 const char *vendor_name; /* codec vendor name */
765 const char *chip_name; /* codec chip name */
f44ac837 766 const char *modelname; /* model name for preset */
1da177e4
LT
767
768 /* set by patch */
769 struct hda_codec_ops patch_ops;
770
1da177e4
LT
771 /* PCM to create, set by patch_ops.build_pcms callback */
772 unsigned int num_pcms;
773 struct hda_pcm *pcm_info;
774
775 /* codec specific info */
776 void *spec;
777
1cd2224c
MR
778 /* beep device */
779 struct hda_beep *beep;
2dca0bba 780 unsigned int beep_mode;
1cd2224c 781
54d17403
TI
782 /* widget capabilities cache */
783 unsigned int num_nodes;
784 hda_nid_t start_nid;
785 u32 *wcaps;
786
d13bd412
TI
787 struct snd_array mixers; /* list of assigned mixer elements */
788
01751f54 789 struct hda_cache_rec amp_cache; /* cache for amp access */
b3ac5636 790 struct hda_cache_rec cmd_cache; /* cache for other commands */
1da177e4 791
62932df8 792 struct mutex spdif_mutex;
5a9e02e9 793 struct mutex control_mutex;
1da177e4
LT
794 unsigned int spdif_status; /* IEC958 status bits */
795 unsigned short spdif_ctls; /* SPDIF control bits */
796 unsigned int spdif_in_enable; /* SPDIF input enable? */
de51ca12 797 hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */
3be14149 798 struct snd_array init_pins; /* initial (BIOS) pin configurations */
346ff70f 799 struct snd_array driver_pins; /* pin configs set by codec parser */
2807314d 800
11aeff08 801#ifdef CONFIG_SND_HDA_HWDEP
2807314d 802 struct snd_hwdep *hwdep; /* assigned hwdep device */
11aeff08 803 struct snd_array init_verbs; /* additional init verbs */
1e1be432 804 struct snd_array hints; /* additional hints */
346ff70f 805 struct snd_array user_pins; /* default pin configs to override */
11aeff08 806#endif
cb53c626 807
963f803f
TI
808 /* misc flags */
809 unsigned int spdif_status_reset :1; /* needs to toggle SPDIF for each
810 * status change
811 * (e.g. Realtek codecs)
812 */
9421f954
TI
813 unsigned int pin_amp_workaround:1; /* pin out-amp takes index
814 * (e.g. Conexant codecs)
815 */
cb53c626 816#ifdef CONFIG_SND_HDA_POWER_SAVE
a221e287
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817 unsigned int power_on :1; /* current (global) power-state */
818 unsigned int power_transition :1; /* power-state in transition */
cb53c626
TI
819 int power_count; /* current (global) power refcount */
820 struct delayed_work power_work; /* delayed task for powerdown */
a2f6309e
TI
821 unsigned long power_on_acct;
822 unsigned long power_off_acct;
823 unsigned long power_jiffies;
cb53c626 824#endif
daead538
TI
825
826 /* codec-specific additional proc output */
827 void (*proc_widget_hook)(struct snd_info_buffer *buffer,
828 struct hda_codec *codec, hda_nid_t nid);
1da177e4
LT
829};
830
831/* direction */
832enum {
833 HDA_INPUT, HDA_OUTPUT
834};
835
836
837/*
838 * constructors
839 */
c8b6bf9b 840int snd_hda_bus_new(struct snd_card *card, const struct hda_bus_template *temp,
1da177e4
LT
841 struct hda_bus **busp);
842int snd_hda_codec_new(struct hda_bus *bus, unsigned int codec_addr,
a1e21c90
TI
843 struct hda_codec **codecp);
844int snd_hda_codec_configure(struct hda_codec *codec);
1da177e4
LT
845
846/*
847 * low level functions
848 */
d01ce99f
TI
849unsigned int snd_hda_codec_read(struct hda_codec *codec, hda_nid_t nid,
850 int direct,
1da177e4
LT
851 unsigned int verb, unsigned int parm);
852int snd_hda_codec_write(struct hda_codec *codec, hda_nid_t nid, int direct,
853 unsigned int verb, unsigned int parm);
d01ce99f
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854#define snd_hda_param_read(codec, nid, param) \
855 snd_hda_codec_read(codec, nid, 0, AC_VERB_PARAMETERS, param)
856int snd_hda_get_sub_nodes(struct hda_codec *codec, hda_nid_t nid,
857 hda_nid_t *start_id);
858int snd_hda_get_connections(struct hda_codec *codec, hda_nid_t nid,
859 hda_nid_t *conn_list, int max_conns);
1da177e4
LT
860
861struct hda_verb {
862 hda_nid_t nid;
863 u32 verb;
864 u32 param;
865};
866
d01ce99f
TI
867void snd_hda_sequence_write(struct hda_codec *codec,
868 const struct hda_verb *seq);
1da177e4
LT
869
870/* unsolicited event */
871int snd_hda_queue_unsol_event(struct hda_bus *bus, u32 res, u32 res_ex);
872
b3ac5636 873/* cached write */
cb53c626 874#ifdef SND_HDA_NEEDS_RESUME
b3ac5636
TI
875int snd_hda_codec_write_cache(struct hda_codec *codec, hda_nid_t nid,
876 int direct, unsigned int verb, unsigned int parm);
877void snd_hda_sequence_write_cache(struct hda_codec *codec,
878 const struct hda_verb *seq);
879void snd_hda_codec_resume_cache(struct hda_codec *codec);
82beb8fd
TI
880#else
881#define snd_hda_codec_write_cache snd_hda_codec_write
882#define snd_hda_sequence_write_cache snd_hda_sequence_write
883#endif
b3ac5636 884
3be14149
TI
885/* the struct for codec->pin_configs */
886struct hda_pincfg {
887 hda_nid_t nid;
888 unsigned int cfg;
889};
890
891unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid);
892int snd_hda_codec_set_pincfg(struct hda_codec *codec, hda_nid_t nid,
893 unsigned int cfg);
894int snd_hda_add_pincfg(struct hda_codec *codec, struct snd_array *list,
895 hda_nid_t nid, unsigned int cfg); /* for hwdep */
896
1da177e4
LT
897/*
898 * Mixer
899 */
900int snd_hda_build_controls(struct hda_bus *bus);
6c1f45ea 901int snd_hda_codec_build_controls(struct hda_codec *codec);
1da177e4
LT
902
903/*
904 * PCM
905 */
906int snd_hda_build_pcms(struct hda_bus *bus);
529bd6c4 907int snd_hda_codec_build_pcms(struct hda_codec *codec);
d01ce99f
TI
908void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid,
909 u32 stream_tag,
1da177e4 910 int channel_id, int format);
888afa15 911void snd_hda_codec_cleanup_stream(struct hda_codec *codec, hda_nid_t nid);
d01ce99f
TI
912unsigned int snd_hda_calc_stream_format(unsigned int rate,
913 unsigned int channels,
914 unsigned int format,
915 unsigned int maxbps);
1da177e4
LT
916int snd_hda_is_supported_format(struct hda_codec *codec, hda_nid_t nid,
917 unsigned int format);
918
919/*
920 * Misc
921 */
922void snd_hda_get_codec_name(struct hda_codec *codec, char *name, int namelen);
fb8d1a34 923void snd_hda_bus_reboot_notify(struct hda_bus *bus);
1da177e4
LT
924
925/*
926 * power management
927 */
928#ifdef CONFIG_PM
8dd78330 929int snd_hda_suspend(struct hda_bus *bus);
1da177e4
LT
930int snd_hda_resume(struct hda_bus *bus);
931#endif
932
50a9f790
MR
933/*
934 * get widget information
935 */
936const char *snd_hda_get_jack_connectivity(u32 cfg);
937const char *snd_hda_get_jack_type(u32 cfg);
938const char *snd_hda_get_jack_location(u32 cfg);
939
cb53c626
TI
940/*
941 * power saving
942 */
943#ifdef CONFIG_SND_HDA_POWER_SAVE
944void snd_hda_power_up(struct hda_codec *codec);
945void snd_hda_power_down(struct hda_codec *codec);
d804ad92 946#define snd_hda_codec_needs_resume(codec) codec->power_count
a2f6309e 947void snd_hda_update_power_acct(struct hda_codec *codec);
cb53c626
TI
948#else
949static inline void snd_hda_power_up(struct hda_codec *codec) {}
950static inline void snd_hda_power_down(struct hda_codec *codec) {}
d804ad92 951#define snd_hda_codec_needs_resume(codec) 1
cb53c626
TI
952#endif
953
4ea6fbc8
TI
954#ifdef CONFIG_SND_HDA_PATCH_LOADER
955/*
956 * patch firmware
957 */
958int snd_hda_load_patch(struct hda_bus *bus, const char *patch);
959#endif
960
ff7a3267
TI
961/*
962 * Codec modularization
963 */
964
965/* Export symbols only for communication with codec drivers;
966 * When built in kernel, all HD-audio drivers are supposed to be statically
967 * linked to the kernel. Thus, the symbols don't have to (or shouldn't) be
968 * exported unless it's built as a module.
969 */
970#ifdef MODULE
971#define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym)
972#else
973#define EXPORT_SYMBOL_HDA(sym)
974#endif
975
1da177e4 976#endif /* __SOUND_HDA_CODEC_H */