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e5f14248 TI |
1 | /* |
2 | * HD audio interface patch for Cirrus Logic CS420x chip | |
3 | * | |
4 | * Copyright (c) 2009 Takashi Iwai <tiwai@suse.de> | |
5 | * | |
6 | * This driver is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This driver is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
21 | #include <linux/init.h> | |
e5f14248 | 22 | #include <linux/slab.h> |
da155d5b | 23 | #include <linux/module.h> |
e5f14248 | 24 | #include <sound/core.h> |
1077a024 | 25 | #include <sound/tlv.h> |
e5f14248 TI |
26 | #include "hda_codec.h" |
27 | #include "hda_local.h" | |
128bc4ba | 28 | #include "hda_auto_parser.h" |
1835a0f9 | 29 | #include "hda_jack.h" |
1077a024 | 30 | #include "hda_generic.h" |
e5f14248 TI |
31 | |
32 | /* | |
33 | */ | |
34 | ||
35 | struct cs_spec { | |
1077a024 | 36 | struct hda_gen_spec gen; |
e5f14248 | 37 | |
ed208255 TI |
38 | unsigned int gpio_mask; |
39 | unsigned int gpio_dir; | |
40 | unsigned int gpio_data; | |
6dfeb703 TI |
41 | unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */ |
42 | unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */ | |
ed208255 | 43 | |
56487c27 TH |
44 | /* CS421x */ |
45 | unsigned int spdif_detect:1; | |
1077a024 | 46 | unsigned int spdif_present:1; |
56487c27 TH |
47 | unsigned int sense_b:1; |
48 | hda_nid_t vendor_nid; | |
0c52db8c TI |
49 | |
50 | /* for MBP SPDIF control */ | |
51 | int (*spdif_sw_put)(struct snd_kcontrol *kcontrol, | |
52 | struct snd_ctl_elem_value *ucontrol); | |
e5f14248 TI |
53 | }; |
54 | ||
56487c27 | 55 | /* available models with CS420x */ |
a6bae205 | 56 | enum { |
4e7d7c60 | 57 | CS420X_MBP53, |
a6bae205 | 58 | CS420X_MBP55, |
1a5ba2e9 | 59 | CS420X_IMAC27, |
b35aabd7 TI |
60 | CS420X_GPIO_13, |
61 | CS420X_GPIO_23, | |
ef596a57 | 62 | CS420X_MBP101, |
ffe4d12b | 63 | CS420X_MBP81, |
6ab982e8 | 64 | CS420X_MBA42, |
a6bae205 | 65 | CS420X_AUTO, |
03efce75 TI |
66 | /* aliases */ |
67 | CS420X_IMAC27_122 = CS420X_GPIO_23, | |
68 | CS420X_APPLE = CS420X_GPIO_13, | |
a6bae205 TI |
69 | }; |
70 | ||
56487c27 TH |
71 | /* CS421x boards */ |
72 | enum { | |
73 | CS421X_CDB4210, | |
b35aabd7 | 74 | CS421X_SENSE_B, |
4af16107 | 75 | CS421X_STUMPY, |
56487c27 TH |
76 | }; |
77 | ||
40c20fa0 TI |
78 | /* Vendor-specific processing widget */ |
79 | #define CS420X_VENDOR_NID 0x11 | |
80 | #define CS_DIG_OUT1_PIN_NID 0x10 | |
81 | #define CS_DIG_OUT2_PIN_NID 0x15 | |
16337e02 DB |
82 | #define CS_DMIC1_PIN_NID 0x0e |
83 | #define CS_DMIC2_PIN_NID 0x12 | |
40c20fa0 TI |
84 | |
85 | /* coef indices */ | |
86 | #define IDX_SPDIF_STAT 0x0000 | |
87 | #define IDX_SPDIF_CTL 0x0001 | |
88 | #define IDX_ADC_CFG 0x0002 | |
89 | /* SZC bitmask, 4 modes below: | |
90 | * 0 = immediate, | |
91 | * 1 = digital immediate, analog zero-cross | |
92 | * 2 = digtail & analog soft-ramp | |
93 | * 3 = digital soft-ramp, analog zero-cross | |
94 | */ | |
95 | #define CS_COEF_ADC_SZC_MASK (3 << 0) | |
96 | #define CS_COEF_ADC_MIC_SZC_MODE (3 << 0) /* SZC setup for mic */ | |
97 | #define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */ | |
98 | /* PGA mode: 0 = differential, 1 = signle-ended */ | |
99 | #define CS_COEF_ADC_MIC_PGA_MODE (1 << 5) /* PGA setup for mic */ | |
100 | #define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */ | |
101 | #define IDX_DAC_CFG 0x0003 | |
102 | /* SZC bitmask, 4 modes below: | |
103 | * 0 = Immediate | |
104 | * 1 = zero-cross | |
105 | * 2 = soft-ramp | |
106 | * 3 = soft-ramp on zero-cross | |
107 | */ | |
108 | #define CS_COEF_DAC_HP_SZC_MODE (3 << 0) /* nid 0x02 */ | |
109 | #define CS_COEF_DAC_LO_SZC_MODE (3 << 2) /* nid 0x03 */ | |
110 | #define CS_COEF_DAC_SPK_SZC_MODE (3 << 4) /* nid 0x04 */ | |
111 | ||
112 | #define IDX_BEEP_CFG 0x0004 | |
113 | /* 0x0008 - test reg key */ | |
114 | /* 0x0009 - 0x0014 -> 12 test regs */ | |
115 | /* 0x0015 - visibility reg */ | |
116 | ||
b5bf0a92 BW |
117 | /* Cirrus Logic CS4208 */ |
118 | #define CS4208_VENDOR_NID 0x24 | |
119 | ||
56487c27 TH |
120 | /* |
121 | * Cirrus Logic CS4210 | |
122 | * | |
123 | * 1 DAC => HP(sense) / Speakers, | |
124 | * 1 ADC <= LineIn(sense) / MicIn / DMicIn, | |
125 | * 1 SPDIF OUT => SPDIF Trasmitter(sense) | |
126 | */ | |
127 | #define CS4210_DAC_NID 0x02 | |
128 | #define CS4210_ADC_NID 0x03 | |
5660ffd0 | 129 | #define CS4210_VENDOR_NID 0x0B |
56487c27 TH |
130 | #define CS421X_DMIC_PIN_NID 0x09 /* Port E */ |
131 | #define CS421X_SPDIF_PIN_NID 0x0A /* Port H */ | |
132 | ||
1077a024 TI |
133 | #define CS421X_IDX_DEV_CFG 0x01 |
134 | #define CS421X_IDX_ADC_CFG 0x02 | |
135 | #define CS421X_IDX_DAC_CFG 0x03 | |
136 | #define CS421X_IDX_SPK_CTL 0x04 | |
e5f14248 | 137 | |
1077a024 TI |
138 | /* Cirrus Logic CS4213 is like CS4210 but does not have SPDIF input/output */ |
139 | #define CS4213_VENDOR_NID 0x09 | |
e5f14248 | 140 | |
21a4dc43 | 141 | |
1077a024 | 142 | static inline int cs_vendor_coef_get(struct hda_codec *codec, unsigned int idx) |
e5f14248 TI |
143 | { |
144 | struct cs_spec *spec = codec->spec; | |
1077a024 TI |
145 | snd_hda_codec_write(codec, spec->vendor_nid, 0, |
146 | AC_VERB_SET_COEF_INDEX, idx); | |
147 | return snd_hda_codec_read(codec, spec->vendor_nid, 0, | |
148 | AC_VERB_GET_PROC_COEF, 0); | |
e5f14248 TI |
149 | } |
150 | ||
1077a024 TI |
151 | static inline void cs_vendor_coef_set(struct hda_codec *codec, unsigned int idx, |
152 | unsigned int coef) | |
e5f14248 TI |
153 | { |
154 | struct cs_spec *spec = codec->spec; | |
1077a024 TI |
155 | snd_hda_codec_write(codec, spec->vendor_nid, 0, |
156 | AC_VERB_SET_COEF_INDEX, idx); | |
157 | snd_hda_codec_write(codec, spec->vendor_nid, 0, | |
158 | AC_VERB_SET_PROC_COEF, coef); | |
e5f14248 TI |
159 | } |
160 | ||
21a4dc43 TI |
161 | /* |
162 | * auto-mute and auto-mic switching | |
56487c27 TH |
163 | * CS421x auto-output redirecting |
164 | * HP/SPK/SPDIF | |
21a4dc43 TI |
165 | */ |
166 | ||
1077a024 | 167 | static void cs_automute(struct hda_codec *codec) |
e5f14248 TI |
168 | { |
169 | struct cs_spec *spec = codec->spec; | |
e5f14248 | 170 | |
1077a024 TI |
171 | /* mute HPs if spdif jack (SENSE_B) is present */ |
172 | spec->gen.master_mute = !!(spec->spdif_present && spec->sense_b); | |
56487c27 | 173 | |
1077a024 | 174 | snd_hda_gen_update_outputs(codec); |
78e2a928 | 175 | |
be8cf445 | 176 | if (spec->gpio_eapd_hp || spec->gpio_eapd_speaker) { |
039eb753 | 177 | spec->gpio_data = spec->gen.hp_jack_present ? |
6dfeb703 | 178 | spec->gpio_eapd_hp : spec->gpio_eapd_speaker; |
3a385167 | 179 | snd_hda_codec_write(codec, 0x01, 0, |
039eb753 | 180 | AC_VERB_SET_GPIO_DATA, spec->gpio_data); |
3a385167 | 181 | } |
e5f14248 TI |
182 | } |
183 | ||
1077a024 | 184 | static bool is_active_pin(struct hda_codec *codec, hda_nid_t nid) |
e5f14248 | 185 | { |
1077a024 TI |
186 | unsigned int val; |
187 | val = snd_hda_codec_get_pincfg(codec, nid); | |
188 | return (get_defcfg_connect(val) != AC_JACK_PORT_NONE); | |
e5f14248 TI |
189 | } |
190 | ||
1077a024 | 191 | static void init_input_coef(struct hda_codec *codec) |
e5f14248 TI |
192 | { |
193 | struct cs_spec *spec = codec->spec; | |
40c20fa0 | 194 | unsigned int coef; |
e5f14248 | 195 | |
5660ffd0 DH |
196 | /* CS420x has multiple ADC, CS421x has single ADC */ |
197 | if (spec->vendor_nid == CS420X_VENDOR_NID) { | |
16337e02 | 198 | coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG); |
56487c27 | 199 | if (is_active_pin(codec, CS_DMIC2_PIN_NID)) |
16337e02 | 200 | coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */ |
56487c27 | 201 | if (is_active_pin(codec, CS_DMIC1_PIN_NID)) |
16337e02 | 202 | coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off |
56487c27 TH |
203 | * No effect if SPDIF_OUT2 is |
204 | * selected in IDX_SPDIF_CTL. | |
205 | */ | |
16337e02 DB |
206 | |
207 | cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef); | |
56487c27 | 208 | } |
40c20fa0 TI |
209 | } |
210 | ||
c42d4782 | 211 | static const struct hda_verb cs_coef_init_verbs[] = { |
40c20fa0 TI |
212 | {0x11, AC_VERB_SET_PROC_STATE, 1}, |
213 | {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG}, | |
214 | {0x11, AC_VERB_SET_PROC_COEF, | |
215 | (0x002a /* DAC1/2/3 SZCMode Soft Ramp */ | |
216 | | 0x0040 /* Mute DACs on FIFO error */ | |
217 | | 0x1000 /* Enable DACs High Pass Filter */ | |
218 | | 0x0400 /* Disable Coefficient Auto increment */ | |
219 | )}, | |
829e87e0 TI |
220 | /* ADC1/2 - Digital and Analog Soft Ramp */ |
221 | {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG}, | |
222 | {0x11, AC_VERB_SET_PROC_COEF, 0x000a}, | |
40c20fa0 | 223 | /* Beep */ |
5a83b4b5 | 224 | {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG}, |
40c20fa0 TI |
225 | {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */ |
226 | ||
227 | {} /* terminator */ | |
228 | }; | |
229 | ||
b5bf0a92 BW |
230 | static const struct hda_verb cs4208_coef_init_verbs[] = { |
231 | {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */ | |
232 | {0x24, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */ | |
233 | {0x24, AC_VERB_SET_COEF_INDEX, 0x0033}, | |
234 | {0x24, AC_VERB_SET_PROC_COEF, 0x0001}, /* A1 ICS */ | |
235 | {0x24, AC_VERB_SET_COEF_INDEX, 0x0034}, | |
236 | {0x24, AC_VERB_SET_PROC_COEF, 0x1C01}, /* A1 Enable, A Thresh = 300mV */ | |
237 | {} /* terminator */ | |
238 | }; | |
239 | ||
a769cbcf BA |
240 | /* Errata: CS4207 rev C0/C1/C2 Silicon |
241 | * | |
242 | * http://www.cirrus.com/en/pubs/errata/ER880C3.pdf | |
243 | * | |
244 | * 6. At high temperature (TA > +85°C), the digital supply current (IVD) | |
245 | * may be excessive (up to an additional 200 μA), which is most easily | |
246 | * observed while the part is being held in reset (RESET# active low). | |
247 | * | |
248 | * Root Cause: At initial powerup of the device, the logic that drives | |
249 | * the clock and write enable to the S/PDIF SRC RAMs is not properly | |
250 | * initialized. | |
251 | * Certain random patterns will cause a steady leakage current in those | |
252 | * RAM cells. The issue will resolve once the SRCs are used (turned on). | |
253 | * | |
254 | * Workaround: The following verb sequence briefly turns on the S/PDIF SRC | |
255 | * blocks, which will alleviate the issue. | |
256 | */ | |
257 | ||
c42d4782 | 258 | static const struct hda_verb cs_errata_init_verbs[] = { |
a769cbcf BA |
259 | {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */ |
260 | {0x11, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */ | |
261 | ||
262 | {0x11, AC_VERB_SET_COEF_INDEX, 0x0008}, | |
263 | {0x11, AC_VERB_SET_PROC_COEF, 0x9999}, | |
264 | {0x11, AC_VERB_SET_COEF_INDEX, 0x0017}, | |
265 | {0x11, AC_VERB_SET_PROC_COEF, 0xa412}, | |
266 | {0x11, AC_VERB_SET_COEF_INDEX, 0x0001}, | |
267 | {0x11, AC_VERB_SET_PROC_COEF, 0x0009}, | |
268 | ||
269 | {0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */ | |
270 | {0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */ | |
271 | ||
272 | {0x11, AC_VERB_SET_COEF_INDEX, 0x0017}, | |
273 | {0x11, AC_VERB_SET_PROC_COEF, 0x2412}, | |
274 | {0x11, AC_VERB_SET_COEF_INDEX, 0x0008}, | |
275 | {0x11, AC_VERB_SET_PROC_COEF, 0x0000}, | |
276 | {0x11, AC_VERB_SET_COEF_INDEX, 0x0001}, | |
277 | {0x11, AC_VERB_SET_PROC_COEF, 0x0008}, | |
278 | {0x11, AC_VERB_SET_PROC_STATE, 0x00}, | |
279 | ||
38c07641 | 280 | #if 0 /* Don't to set to D3 as we are in power-up sequence */ |
a769cbcf BA |
281 | {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */ |
282 | {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */ | |
283 | /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */ | |
38c07641 | 284 | #endif |
a769cbcf BA |
285 | |
286 | {} /* terminator */ | |
287 | }; | |
288 | ||
40c20fa0 | 289 | /* SPDIF setup */ |
1077a024 | 290 | static void init_digital_coef(struct hda_codec *codec) |
40c20fa0 TI |
291 | { |
292 | unsigned int coef; | |
293 | ||
294 | coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */ | |
295 | coef |= 0x0008; /* Replace with mute on error */ | |
296 | if (is_active_pin(codec, CS_DIG_OUT2_PIN_NID)) | |
297 | coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2 | |
298 | * SPDIF_OUT2 is shared with GPIO1 and | |
299 | * DMIC_SDA2. | |
300 | */ | |
301 | cs_vendor_coef_set(codec, IDX_SPDIF_CTL, coef); | |
e5f14248 TI |
302 | } |
303 | ||
304 | static int cs_init(struct hda_codec *codec) | |
305 | { | |
306 | struct cs_spec *spec = codec->spec; | |
307 | ||
be8cf445 TI |
308 | if (spec->vendor_nid == CS420X_VENDOR_NID) { |
309 | /* init_verb sequence for C0/C1/C2 errata*/ | |
310 | snd_hda_sequence_write(codec, cs_errata_init_verbs); | |
311 | snd_hda_sequence_write(codec, cs_coef_init_verbs); | |
b5bf0a92 BW |
312 | } else if (spec->vendor_nid == CS4208_VENDOR_NID) { |
313 | snd_hda_sequence_write(codec, cs4208_coef_init_verbs); | |
be8cf445 | 314 | } |
ed208255 | 315 | |
1077a024 | 316 | snd_hda_gen_init(codec); |
98415eac | 317 | |
ed208255 TI |
318 | if (spec->gpio_mask) { |
319 | snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK, | |
320 | spec->gpio_mask); | |
321 | snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION, | |
322 | spec->gpio_dir); | |
323 | snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, | |
324 | spec->gpio_data); | |
325 | } | |
326 | ||
be8cf445 TI |
327 | if (spec->vendor_nid == CS420X_VENDOR_NID) { |
328 | init_input_coef(codec); | |
329 | init_digital_coef(codec); | |
330 | } | |
01a61e12 TI |
331 | |
332 | return 0; | |
e5f14248 TI |
333 | } |
334 | ||
0c52db8c TI |
335 | static int cs_build_controls(struct hda_codec *codec) |
336 | { | |
337 | int err; | |
338 | ||
339 | err = snd_hda_gen_build_controls(codec); | |
340 | if (err < 0) | |
341 | return err; | |
342 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_BUILD); | |
343 | return 0; | |
344 | } | |
345 | ||
1077a024 | 346 | #define cs_free snd_hda_gen_free |
e5f14248 | 347 | |
c42d4782 | 348 | static const struct hda_codec_ops cs_patch_ops = { |
0c52db8c | 349 | .build_controls = cs_build_controls, |
1077a024 | 350 | .build_pcms = snd_hda_gen_build_pcms, |
e5f14248 TI |
351 | .init = cs_init, |
352 | .free = cs_free, | |
5c2e4e0a | 353 | .unsol_event = snd_hda_jack_unsol_event, |
e5f14248 TI |
354 | }; |
355 | ||
356 | static int cs_parse_auto_config(struct hda_codec *codec) | |
357 | { | |
358 | struct cs_spec *spec = codec->spec; | |
359 | int err; | |
360 | ||
1077a024 | 361 | err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0); |
ed208255 TI |
362 | if (err < 0) |
363 | return err; | |
364 | ||
1077a024 | 365 | err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg); |
e5f14248 TI |
366 | if (err < 0) |
367 | return err; | |
1077a024 | 368 | |
e5f14248 TI |
369 | return 0; |
370 | } | |
371 | ||
b35aabd7 TI |
372 | static const struct hda_model_fixup cs420x_models[] = { |
373 | { .id = CS420X_MBP53, .name = "mbp53" }, | |
374 | { .id = CS420X_MBP55, .name = "mbp55" }, | |
375 | { .id = CS420X_IMAC27, .name = "imac27" }, | |
376 | { .id = CS420X_IMAC27_122, .name = "imac27_122" }, | |
377 | { .id = CS420X_APPLE, .name = "apple" }, | |
ef596a57 | 378 | { .id = CS420X_MBP101, .name = "mbp101" }, |
ffe4d12b | 379 | { .id = CS420X_MBP81, .name = "mbp81" }, |
6ab982e8 | 380 | { .id = CS420X_MBA42, .name = "mba42" }, |
b35aabd7 | 381 | {} |
a6bae205 TI |
382 | }; |
383 | ||
b35aabd7 | 384 | static const struct snd_pci_quirk cs420x_fixup_tbl[] = { |
4e7d7c60 | 385 | SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53), |
87232dd4 | 386 | SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55), |
a6bae205 | 387 | SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55), |
f46119b7 | 388 | SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55), |
6dfeb703 TI |
389 | /* this conflicts with too many other models */ |
390 | /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/ | |
6dfeb703 | 391 | |
b35aabd7 | 392 | /* codec SSID */ |
ffe4d12b | 393 | SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81), |
7e5bea19 | 394 | SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122), |
ef596a57 | 395 | SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101), |
2ddee91a | 396 | SND_PCI_QUIRK(0x106b, 0x5600, "MacBookAir 5,2", CS420X_MBP81), |
6ab982e8 | 397 | SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42), |
6dfeb703 | 398 | SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE), |
a6bae205 TI |
399 | {} /* terminator */ |
400 | }; | |
401 | ||
b35aabd7 | 402 | static const struct hda_pintbl mbp53_pincfgs[] = { |
4e7d7c60 VW |
403 | { 0x09, 0x012b4050 }, |
404 | { 0x0a, 0x90100141 }, | |
405 | { 0x0b, 0x90100140 }, | |
406 | { 0x0c, 0x018b3020 }, | |
407 | { 0x0d, 0x90a00110 }, | |
408 | { 0x0e, 0x400000f0 }, | |
409 | { 0x0f, 0x01cbe030 }, | |
410 | { 0x10, 0x014be060 }, | |
411 | { 0x12, 0x400000f0 }, | |
412 | { 0x15, 0x400000f0 }, | |
413 | {} /* terminator */ | |
414 | }; | |
415 | ||
b35aabd7 | 416 | static const struct hda_pintbl mbp55_pincfgs[] = { |
a6bae205 TI |
417 | { 0x09, 0x012b4030 }, |
418 | { 0x0a, 0x90100121 }, | |
419 | { 0x0b, 0x90100120 }, | |
420 | { 0x0c, 0x400000f0 }, | |
421 | { 0x0d, 0x90a00110 }, | |
422 | { 0x0e, 0x400000f0 }, | |
423 | { 0x0f, 0x400000f0 }, | |
424 | { 0x10, 0x014be040 }, | |
425 | { 0x12, 0x400000f0 }, | |
426 | { 0x15, 0x400000f0 }, | |
427 | {} /* terminator */ | |
428 | }; | |
429 | ||
b35aabd7 | 430 | static const struct hda_pintbl imac27_pincfgs[] = { |
1a5ba2e9 RAE |
431 | { 0x09, 0x012b4050 }, |
432 | { 0x0a, 0x90100140 }, | |
433 | { 0x0b, 0x90100142 }, | |
434 | { 0x0c, 0x018b3020 }, | |
435 | { 0x0d, 0x90a00110 }, | |
436 | { 0x0e, 0x400000f0 }, | |
437 | { 0x0f, 0x01cbe030 }, | |
438 | { 0x10, 0x014be060 }, | |
439 | { 0x12, 0x01ab9070 }, | |
440 | { 0x15, 0x400000f0 }, | |
441 | {} /* terminator */ | |
442 | }; | |
443 | ||
ef596a57 TI |
444 | static const struct hda_pintbl mbp101_pincfgs[] = { |
445 | { 0x0d, 0x40ab90f0 }, | |
446 | { 0x0e, 0x90a600f0 }, | |
447 | { 0x12, 0x50a600f0 }, | |
448 | {} /* terminator */ | |
449 | }; | |
450 | ||
6ab982e8 TI |
451 | static const struct hda_pintbl mba42_pincfgs[] = { |
452 | { 0x09, 0x012b4030 }, /* HP */ | |
453 | { 0x0a, 0x400000f0 }, | |
454 | { 0x0b, 0x90100120 }, /* speaker */ | |
455 | { 0x0c, 0x400000f0 }, | |
456 | { 0x0d, 0x90a00110 }, /* mic */ | |
457 | { 0x0e, 0x400000f0 }, | |
458 | { 0x0f, 0x400000f0 }, | |
459 | { 0x10, 0x400000f0 }, | |
460 | { 0x12, 0x400000f0 }, | |
461 | { 0x15, 0x400000f0 }, | |
462 | {} /* terminator */ | |
463 | }; | |
464 | ||
b5bf0a92 BW |
465 | static const struct hda_pintbl mba6_pincfgs[] = { |
466 | { 0x10, 0x032120f0 }, /* HP */ | |
467 | { 0x11, 0x500000f0 }, | |
468 | { 0x12, 0x90100010 }, /* Speaker */ | |
469 | { 0x13, 0x500000f0 }, | |
470 | { 0x14, 0x500000f0 }, | |
471 | { 0x15, 0x770000f0 }, | |
472 | { 0x16, 0x770000f0 }, | |
473 | { 0x17, 0x430000f0 }, | |
474 | { 0x18, 0x43ab9030 }, /* Mic */ | |
475 | { 0x19, 0x770000f0 }, | |
476 | { 0x1a, 0x770000f0 }, | |
477 | { 0x1b, 0x770000f0 }, | |
478 | { 0x1c, 0x90a00090 }, | |
479 | { 0x1d, 0x500000f0 }, | |
480 | { 0x1e, 0x500000f0 }, | |
481 | { 0x1f, 0x500000f0 }, | |
482 | { 0x20, 0x500000f0 }, | |
483 | { 0x21, 0x430000f0 }, | |
484 | { 0x22, 0x430000f0 }, | |
485 | {} /* terminator */ | |
486 | }; | |
487 | ||
b35aabd7 TI |
488 | static void cs420x_fixup_gpio_13(struct hda_codec *codec, |
489 | const struct hda_fixup *fix, int action) | |
490 | { | |
491 | if (action == HDA_FIXUP_ACT_PRE_PROBE) { | |
492 | struct cs_spec *spec = codec->spec; | |
493 | spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */ | |
494 | spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */ | |
495 | spec->gpio_mask = spec->gpio_dir = | |
496 | spec->gpio_eapd_hp | spec->gpio_eapd_speaker; | |
497 | } | |
498 | } | |
a6bae205 | 499 | |
b35aabd7 TI |
500 | static void cs420x_fixup_gpio_23(struct hda_codec *codec, |
501 | const struct hda_fixup *fix, int action) | |
a6bae205 | 502 | { |
b35aabd7 TI |
503 | if (action == HDA_FIXUP_ACT_PRE_PROBE) { |
504 | struct cs_spec *spec = codec->spec; | |
505 | spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */ | |
506 | spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */ | |
507 | spec->gpio_mask = spec->gpio_dir = | |
508 | spec->gpio_eapd_hp | spec->gpio_eapd_speaker; | |
509 | } | |
a6bae205 TI |
510 | } |
511 | ||
b35aabd7 TI |
512 | static const struct hda_fixup cs420x_fixups[] = { |
513 | [CS420X_MBP53] = { | |
514 | .type = HDA_FIXUP_PINS, | |
515 | .v.pins = mbp53_pincfgs, | |
516 | .chained = true, | |
517 | .chain_id = CS420X_APPLE, | |
518 | }, | |
519 | [CS420X_MBP55] = { | |
520 | .type = HDA_FIXUP_PINS, | |
521 | .v.pins = mbp55_pincfgs, | |
522 | .chained = true, | |
523 | .chain_id = CS420X_GPIO_13, | |
524 | }, | |
525 | [CS420X_IMAC27] = { | |
526 | .type = HDA_FIXUP_PINS, | |
527 | .v.pins = imac27_pincfgs, | |
528 | .chained = true, | |
529 | .chain_id = CS420X_GPIO_13, | |
530 | }, | |
531 | [CS420X_GPIO_13] = { | |
532 | .type = HDA_FIXUP_FUNC, | |
533 | .v.func = cs420x_fixup_gpio_13, | |
534 | }, | |
535 | [CS420X_GPIO_23] = { | |
536 | .type = HDA_FIXUP_FUNC, | |
537 | .v.func = cs420x_fixup_gpio_23, | |
538 | }, | |
ef596a57 TI |
539 | [CS420X_MBP101] = { |
540 | .type = HDA_FIXUP_PINS, | |
541 | .v.pins = mbp101_pincfgs, | |
542 | .chained = true, | |
ef596a57 TI |
543 | .chain_id = CS420X_GPIO_13, |
544 | }, | |
ffe4d12b TI |
545 | [CS420X_MBP81] = { |
546 | .type = HDA_FIXUP_VERBS, | |
547 | .v.verbs = (const struct hda_verb[]) { | |
548 | /* internal mic ADC2: right only, single ended */ | |
549 | {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG}, | |
550 | {0x11, AC_VERB_SET_PROC_COEF, 0x102a}, | |
551 | {} | |
552 | }, | |
553 | .chained = true, | |
554 | .chain_id = CS420X_GPIO_13, | |
555 | }, | |
6ab982e8 TI |
556 | [CS420X_MBA42] = { |
557 | .type = HDA_FIXUP_PINS, | |
558 | .v.pins = mba42_pincfgs, | |
559 | .chained = true, | |
560 | .chain_id = CS420X_GPIO_13, | |
561 | }, | |
b35aabd7 TI |
562 | }; |
563 | ||
1077a024 | 564 | static struct cs_spec *cs_alloc_spec(struct hda_codec *codec, int vendor_nid) |
e5f14248 TI |
565 | { |
566 | struct cs_spec *spec; | |
e5f14248 TI |
567 | |
568 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
569 | if (!spec) | |
1077a024 | 570 | return NULL; |
e5f14248 | 571 | codec->spec = spec; |
1077a024 TI |
572 | spec->vendor_nid = vendor_nid; |
573 | snd_hda_gen_spec_init(&spec->gen); | |
574 | ||
575 | return spec; | |
576 | } | |
577 | ||
578 | static int patch_cs420x(struct hda_codec *codec) | |
579 | { | |
580 | struct cs_spec *spec; | |
581 | int err; | |
e5f14248 | 582 | |
1077a024 TI |
583 | spec = cs_alloc_spec(codec, CS420X_VENDOR_NID); |
584 | if (!spec) | |
585 | return -ENOMEM; | |
56487c27 | 586 | |
6d3073e1 | 587 | spec->gen.automute_hook = cs_automute; |
bad994f5 | 588 | codec->single_adc_amp = 1; |
6d3073e1 | 589 | |
b35aabd7 TI |
590 | snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl, |
591 | cs420x_fixups); | |
592 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); | |
e5f14248 | 593 | |
ed208255 | 594 | err = cs_parse_auto_config(codec); |
21a4dc43 TI |
595 | if (err < 0) |
596 | goto error; | |
597 | ||
e5f14248 TI |
598 | codec->patch_ops = cs_patch_ops; |
599 | ||
b35aabd7 TI |
600 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); |
601 | ||
e5f14248 TI |
602 | return 0; |
603 | ||
604 | error: | |
c5e0b6db | 605 | cs_free(codec); |
e5f14248 TI |
606 | return err; |
607 | } | |
608 | ||
be8cf445 TI |
609 | /* |
610 | * CS4208 support: | |
b5bf0a92 | 611 | * Its layout is no longer compatible with CS4206/CS4207 |
be8cf445 TI |
612 | */ |
613 | enum { | |
885845d7 | 614 | CS4208_MAC_AUTO, |
b5bf0a92 | 615 | CS4208_MBA6, |
0c52db8c | 616 | CS4208_MBP11, |
be8cf445 TI |
617 | CS4208_GPIO0, |
618 | }; | |
619 | ||
620 | static const struct hda_model_fixup cs4208_models[] = { | |
621 | { .id = CS4208_GPIO0, .name = "gpio0" }, | |
b5bf0a92 | 622 | { .id = CS4208_MBA6, .name = "mba6" }, |
0c52db8c | 623 | { .id = CS4208_MBP11, .name = "mbp11" }, |
be8cf445 TI |
624 | {} |
625 | }; | |
626 | ||
627 | static const struct snd_pci_quirk cs4208_fixup_tbl[] = { | |
885845d7 TI |
628 | SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS4208_MAC_AUTO), |
629 | {} /* terminator */ | |
630 | }; | |
631 | ||
632 | /* codec SSID matching */ | |
633 | static const struct snd_pci_quirk cs4208_mac_fixup_tbl[] = { | |
0c52db8c | 634 | SND_PCI_QUIRK(0x106b, 0x5e00, "MacBookPro 11,2", CS4208_MBP11), |
b5bf0a92 BW |
635 | SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6), |
636 | SND_PCI_QUIRK(0x106b, 0x7200, "MacBookAir 6,2", CS4208_MBA6), | |
be8cf445 TI |
637 | {} /* terminator */ |
638 | }; | |
639 | ||
640 | static void cs4208_fixup_gpio0(struct hda_codec *codec, | |
641 | const struct hda_fixup *fix, int action) | |
642 | { | |
643 | if (action == HDA_FIXUP_ACT_PRE_PROBE) { | |
644 | struct cs_spec *spec = codec->spec; | |
645 | spec->gpio_eapd_hp = 0; | |
646 | spec->gpio_eapd_speaker = 1; | |
647 | spec->gpio_mask = spec->gpio_dir = | |
648 | spec->gpio_eapd_hp | spec->gpio_eapd_speaker; | |
649 | } | |
650 | } | |
651 | ||
885845d7 TI |
652 | static const struct hda_fixup cs4208_fixups[]; |
653 | ||
654 | /* remap the fixup from codec SSID and apply it */ | |
655 | static void cs4208_fixup_mac(struct hda_codec *codec, | |
656 | const struct hda_fixup *fix, int action) | |
657 | { | |
658 | if (action != HDA_FIXUP_ACT_PRE_PROBE) | |
659 | return; | |
f5662e1c DH |
660 | |
661 | codec->fixup_id = HDA_FIXUP_ID_NOT_SET; | |
885845d7 | 662 | snd_hda_pick_fixup(codec, NULL, cs4208_mac_fixup_tbl, cs4208_fixups); |
f5662e1c | 663 | if (codec->fixup_id == HDA_FIXUP_ID_NOT_SET) |
885845d7 TI |
664 | codec->fixup_id = CS4208_GPIO0; /* default fixup */ |
665 | snd_hda_apply_fixup(codec, action); | |
666 | } | |
667 | ||
0c52db8c TI |
668 | static int cs4208_spdif_sw_put(struct snd_kcontrol *kcontrol, |
669 | struct snd_ctl_elem_value *ucontrol) | |
670 | { | |
671 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
672 | struct cs_spec *spec = codec->spec; | |
673 | hda_nid_t pin = spec->gen.autocfg.dig_out_pins[0]; | |
674 | int pinctl = ucontrol->value.integer.value[0] ? PIN_OUT : 0; | |
675 | ||
676 | snd_hda_set_pin_ctl_cache(codec, pin, pinctl); | |
677 | return spec->spdif_sw_put(kcontrol, ucontrol); | |
678 | } | |
679 | ||
680 | /* hook the SPDIF switch */ | |
681 | static void cs4208_fixup_spdif_switch(struct hda_codec *codec, | |
682 | const struct hda_fixup *fix, int action) | |
683 | { | |
684 | if (action == HDA_FIXUP_ACT_BUILD) { | |
685 | struct cs_spec *spec = codec->spec; | |
686 | struct snd_kcontrol *kctl; | |
687 | ||
688 | if (!spec->gen.autocfg.dig_out_pins[0]) | |
689 | return; | |
690 | kctl = snd_hda_find_mixer_ctl(codec, "IEC958 Playback Switch"); | |
691 | if (!kctl) | |
692 | return; | |
693 | spec->spdif_sw_put = kctl->put; | |
694 | kctl->put = cs4208_spdif_sw_put; | |
695 | } | |
696 | } | |
697 | ||
be8cf445 | 698 | static const struct hda_fixup cs4208_fixups[] = { |
b5bf0a92 BW |
699 | [CS4208_MBA6] = { |
700 | .type = HDA_FIXUP_PINS, | |
701 | .v.pins = mba6_pincfgs, | |
702 | .chained = true, | |
703 | .chain_id = CS4208_GPIO0, | |
704 | }, | |
0c52db8c TI |
705 | [CS4208_MBP11] = { |
706 | .type = HDA_FIXUP_FUNC, | |
707 | .v.func = cs4208_fixup_spdif_switch, | |
708 | .chained = true, | |
709 | .chain_id = CS4208_GPIO0, | |
710 | }, | |
be8cf445 TI |
711 | [CS4208_GPIO0] = { |
712 | .type = HDA_FIXUP_FUNC, | |
713 | .v.func = cs4208_fixup_gpio0, | |
714 | }, | |
885845d7 TI |
715 | [CS4208_MAC_AUTO] = { |
716 | .type = HDA_FIXUP_FUNC, | |
717 | .v.func = cs4208_fixup_mac, | |
718 | }, | |
be8cf445 TI |
719 | }; |
720 | ||
b5bf0a92 BW |
721 | /* correct the 0dB offset of input pins */ |
722 | static void cs4208_fix_amp_caps(struct hda_codec *codec, hda_nid_t adc) | |
723 | { | |
724 | unsigned int caps; | |
725 | ||
726 | caps = query_amp_caps(codec, adc, HDA_INPUT); | |
727 | caps &= ~(AC_AMPCAP_OFFSET); | |
728 | caps |= 0x02; | |
729 | snd_hda_override_amp_caps(codec, adc, HDA_INPUT, caps); | |
730 | } | |
731 | ||
be8cf445 TI |
732 | static int patch_cs4208(struct hda_codec *codec) |
733 | { | |
734 | struct cs_spec *spec; | |
735 | int err; | |
736 | ||
b5bf0a92 | 737 | spec = cs_alloc_spec(codec, CS4208_VENDOR_NID); |
be8cf445 TI |
738 | if (!spec) |
739 | return -ENOMEM; | |
740 | ||
741 | spec->gen.automute_hook = cs_automute; | |
a1114a8c TI |
742 | /* exclude NID 0x10 (HP) from output volumes due to different steps */ |
743 | spec->gen.out_vol_mask = 1ULL << 0x10; | |
be8cf445 TI |
744 | |
745 | snd_hda_pick_fixup(codec, cs4208_models, cs4208_fixup_tbl, | |
746 | cs4208_fixups); | |
747 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); | |
748 | ||
b5bf0a92 BW |
749 | snd_hda_override_wcaps(codec, 0x18, |
750 | get_wcaps(codec, 0x18) | AC_WCAP_STEREO); | |
751 | cs4208_fix_amp_caps(codec, 0x18); | |
752 | cs4208_fix_amp_caps(codec, 0x1b); | |
753 | cs4208_fix_amp_caps(codec, 0x1c); | |
754 | ||
be8cf445 TI |
755 | err = cs_parse_auto_config(codec); |
756 | if (err < 0) | |
757 | goto error; | |
758 | ||
759 | codec->patch_ops = cs_patch_ops; | |
760 | ||
761 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); | |
762 | ||
763 | return 0; | |
764 | ||
765 | error: | |
766 | cs_free(codec); | |
767 | return err; | |
768 | } | |
769 | ||
56487c27 TH |
770 | /* |
771 | * Cirrus Logic CS4210 | |
772 | * | |
773 | * 1 DAC => HP(sense) / Speakers, | |
774 | * 1 ADC <= LineIn(sense) / MicIn / DMicIn, | |
775 | * 1 SPDIF OUT => SPDIF Trasmitter(sense) | |
776 | */ | |
777 | ||
778 | /* CS4210 board names */ | |
b35aabd7 TI |
779 | static const struct hda_model_fixup cs421x_models[] = { |
780 | { .id = CS421X_CDB4210, .name = "cdb4210" }, | |
4af16107 | 781 | { .id = CS421X_STUMPY, .name = "stumpy" }, |
b35aabd7 | 782 | {} |
56487c27 TH |
783 | }; |
784 | ||
b35aabd7 | 785 | static const struct snd_pci_quirk cs421x_fixup_tbl[] = { |
56487c27 TH |
786 | /* Test Intel board + CDB2410 */ |
787 | SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210), | |
788 | {} /* terminator */ | |
789 | }; | |
790 | ||
791 | /* CS4210 board pinconfigs */ | |
792 | /* Default CS4210 (CDB4210)*/ | |
b35aabd7 | 793 | static const struct hda_pintbl cdb4210_pincfgs[] = { |
56487c27 TH |
794 | { 0x05, 0x0321401f }, |
795 | { 0x06, 0x90170010 }, | |
796 | { 0x07, 0x03813031 }, | |
797 | { 0x08, 0xb7a70037 }, | |
798 | { 0x09, 0xb7a6003e }, | |
799 | { 0x0a, 0x034510f0 }, | |
800 | {} /* terminator */ | |
801 | }; | |
802 | ||
4af16107 DR |
803 | /* Stumpy ChromeBox */ |
804 | static const struct hda_pintbl stumpy_pincfgs[] = { | |
805 | { 0x05, 0x022120f0 }, | |
806 | { 0x06, 0x901700f0 }, | |
807 | { 0x07, 0x02a120f0 }, | |
808 | { 0x08, 0x77a70037 }, | |
809 | { 0x09, 0x77a6003e }, | |
810 | { 0x0a, 0x434510f0 }, | |
811 | {} /* terminator */ | |
812 | }; | |
813 | ||
b35aabd7 TI |
814 | /* Setup GPIO/SENSE for each board (if used) */ |
815 | static void cs421x_fixup_sense_b(struct hda_codec *codec, | |
816 | const struct hda_fixup *fix, int action) | |
817 | { | |
818 | struct cs_spec *spec = codec->spec; | |
819 | if (action == HDA_FIXUP_ACT_PRE_PROBE) | |
820 | spec->sense_b = 1; | |
821 | } | |
822 | ||
823 | static const struct hda_fixup cs421x_fixups[] = { | |
824 | [CS421X_CDB4210] = { | |
825 | .type = HDA_FIXUP_PINS, | |
826 | .v.pins = cdb4210_pincfgs, | |
827 | .chained = true, | |
828 | .chain_id = CS421X_SENSE_B, | |
829 | }, | |
830 | [CS421X_SENSE_B] = { | |
831 | .type = HDA_FIXUP_FUNC, | |
832 | .v.func = cs421x_fixup_sense_b, | |
4af16107 DR |
833 | }, |
834 | [CS421X_STUMPY] = { | |
835 | .type = HDA_FIXUP_PINS, | |
836 | .v.pins = stumpy_pincfgs, | |
837 | }, | |
56487c27 TH |
838 | }; |
839 | ||
840 | static const struct hda_verb cs421x_coef_init_verbs[] = { | |
841 | {0x0B, AC_VERB_SET_PROC_STATE, 1}, | |
842 | {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG}, | |
843 | /* | |
844 | Disable Coefficient Index Auto-Increment(DAI)=1, | |
845 | PDREF=0 | |
846 | */ | |
847 | {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 }, | |
848 | ||
849 | {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG}, | |
850 | /* ADC SZCMode = Digital Soft Ramp */ | |
851 | {0x0B, AC_VERB_SET_PROC_COEF, 0x0002 }, | |
852 | ||
853 | {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG}, | |
854 | {0x0B, AC_VERB_SET_PROC_COEF, | |
855 | (0x0002 /* DAC SZCMode = Digital Soft Ramp */ | |
856 | | 0x0004 /* Mute DAC on FIFO error */ | |
857 | | 0x0008 /* Enable DAC High Pass Filter */ | |
858 | )}, | |
859 | {} /* terminator */ | |
860 | }; | |
861 | ||
862 | /* Errata: CS4210 rev A1 Silicon | |
863 | * | |
864 | * http://www.cirrus.com/en/pubs/errata/ | |
865 | * | |
866 | * Description: | |
867 | * 1. Performance degredation is present in the ADC. | |
868 | * 2. Speaker output is not completely muted upon HP detect. | |
869 | * 3. Noise is present when clipping occurs on the amplified | |
870 | * speaker outputs. | |
871 | * | |
872 | * Workaround: | |
873 | * The following verb sequence written to the registers during | |
874 | * initialization will correct the issues listed above. | |
875 | */ | |
876 | ||
877 | static const struct hda_verb cs421x_coef_init_verbs_A1_silicon_fixes[] = { | |
878 | {0x0B, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */ | |
879 | ||
880 | {0x0B, AC_VERB_SET_COEF_INDEX, 0x0006}, | |
881 | {0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */ | |
882 | ||
883 | {0x0B, AC_VERB_SET_COEF_INDEX, 0x000A}, | |
884 | {0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */ | |
885 | ||
886 | {0x0B, AC_VERB_SET_COEF_INDEX, 0x0011}, | |
887 | {0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */ | |
888 | ||
889 | {0x0B, AC_VERB_SET_COEF_INDEX, 0x001A}, | |
890 | {0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */ | |
891 | ||
892 | {0x0B, AC_VERB_SET_COEF_INDEX, 0x001B}, | |
893 | {0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */ | |
894 | ||
895 | {} /* terminator */ | |
896 | }; | |
897 | ||
898 | /* Speaker Amp Gain is controlled by the vendor widget's coef 4 */ | |
899 | static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0); | |
900 | ||
901 | static int cs421x_boost_vol_info(struct snd_kcontrol *kcontrol, | |
902 | struct snd_ctl_elem_info *uinfo) | |
903 | { | |
904 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
905 | uinfo->count = 1; | |
906 | uinfo->value.integer.min = 0; | |
907 | uinfo->value.integer.max = 3; | |
908 | return 0; | |
909 | } | |
910 | ||
911 | static int cs421x_boost_vol_get(struct snd_kcontrol *kcontrol, | |
912 | struct snd_ctl_elem_value *ucontrol) | |
913 | { | |
914 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
915 | ||
916 | ucontrol->value.integer.value[0] = | |
917 | cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003; | |
918 | return 0; | |
919 | } | |
920 | ||
921 | static int cs421x_boost_vol_put(struct snd_kcontrol *kcontrol, | |
922 | struct snd_ctl_elem_value *ucontrol) | |
923 | { | |
924 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
925 | ||
926 | unsigned int vol = ucontrol->value.integer.value[0]; | |
927 | unsigned int coef = | |
928 | cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL); | |
929 | unsigned int original_coef = coef; | |
930 | ||
931 | coef &= ~0x0003; | |
932 | coef |= (vol & 0x0003); | |
933 | if (original_coef == coef) | |
934 | return 0; | |
935 | else { | |
936 | cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef); | |
937 | return 1; | |
938 | } | |
939 | } | |
940 | ||
1077a024 | 941 | static const struct snd_kcontrol_new cs421x_speaker_boost_ctl = { |
56487c27 TH |
942 | |
943 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
944 | .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | | |
945 | SNDRV_CTL_ELEM_ACCESS_TLV_READ), | |
946 | .name = "Speaker Boost Playback Volume", | |
947 | .info = cs421x_boost_vol_info, | |
948 | .get = cs421x_boost_vol_get, | |
949 | .put = cs421x_boost_vol_put, | |
950 | .tlv = { .p = cs421x_speaker_boost_db_scale }, | |
951 | }; | |
952 | ||
5660ffd0 | 953 | static void cs4210_pinmux_init(struct hda_codec *codec) |
56487c27 TH |
954 | { |
955 | struct cs_spec *spec = codec->spec; | |
956 | unsigned int def_conf, coef; | |
957 | ||
958 | /* GPIO, DMIC_SCL, DMIC_SDA and SENSE_B are multiplexed */ | |
959 | coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG); | |
960 | ||
961 | if (spec->gpio_mask) | |
962 | coef |= 0x0008; /* B1,B2 are GPIOs */ | |
963 | else | |
964 | coef &= ~0x0008; | |
965 | ||
966 | if (spec->sense_b) | |
967 | coef |= 0x0010; /* B2 is SENSE_B, not inverted */ | |
968 | else | |
969 | coef &= ~0x0010; | |
970 | ||
971 | cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef); | |
972 | ||
973 | if ((spec->gpio_mask || spec->sense_b) && | |
974 | is_active_pin(codec, CS421X_DMIC_PIN_NID)) { | |
975 | ||
976 | /* | |
977 | GPIO or SENSE_B forced - disconnect the DMIC pin. | |
978 | */ | |
979 | def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID); | |
980 | def_conf &= ~AC_DEFCFG_PORT_CONN; | |
981 | def_conf |= (AC_JACK_PORT_NONE << AC_DEFCFG_PORT_CONN_SHIFT); | |
982 | snd_hda_codec_set_pincfg(codec, CS421X_DMIC_PIN_NID, def_conf); | |
983 | } | |
984 | } | |
985 | ||
1077a024 | 986 | static void cs4210_spdif_automute(struct hda_codec *codec, |
1a4f69d5 | 987 | struct hda_jack_callback *tbl) |
56487c27 TH |
988 | { |
989 | struct cs_spec *spec = codec->spec; | |
1077a024 TI |
990 | bool spdif_present = false; |
991 | hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0]; | |
992 | ||
993 | /* detect on spdif is specific to CS4210 */ | |
994 | if (!spec->spdif_detect || | |
995 | spec->vendor_nid != CS4210_VENDOR_NID) | |
996 | return; | |
997 | ||
998 | spdif_present = snd_hda_jack_detect(codec, spdif_pin); | |
999 | if (spdif_present == spec->spdif_present) | |
1000 | return; | |
1001 | ||
1002 | spec->spdif_present = spdif_present; | |
1003 | /* SPDIF TX on/off */ | |
1004 | if (spdif_present) | |
1005 | snd_hda_set_pin_ctl(codec, spdif_pin, | |
1006 | spdif_present ? PIN_OUT : 0); | |
56487c27 | 1007 | |
1077a024 TI |
1008 | cs_automute(codec); |
1009 | } | |
1010 | ||
1011 | static void parse_cs421x_digital(struct hda_codec *codec) | |
1012 | { | |
1013 | struct cs_spec *spec = codec->spec; | |
1014 | struct auto_pin_cfg *cfg = &spec->gen.autocfg; | |
1015 | int i; | |
56487c27 TH |
1016 | |
1017 | for (i = 0; i < cfg->dig_outs; i++) { | |
1018 | hda_nid_t nid = cfg->dig_out_pins[i]; | |
56487c27 | 1019 | if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) { |
56487c27 | 1020 | spec->spdif_detect = 1; |
1077a024 | 1021 | snd_hda_jack_detect_enable_callback(codec, nid, |
1077a024 | 1022 | cs4210_spdif_automute); |
56487c27 TH |
1023 | } |
1024 | } | |
1025 | } | |
1026 | ||
1027 | static int cs421x_init(struct hda_codec *codec) | |
1028 | { | |
1029 | struct cs_spec *spec = codec->spec; | |
1030 | ||
5660ffd0 DH |
1031 | if (spec->vendor_nid == CS4210_VENDOR_NID) { |
1032 | snd_hda_sequence_write(codec, cs421x_coef_init_verbs); | |
1033 | snd_hda_sequence_write(codec, cs421x_coef_init_verbs_A1_silicon_fixes); | |
1034 | cs4210_pinmux_init(codec); | |
1035 | } | |
56487c27 | 1036 | |
1077a024 TI |
1037 | snd_hda_gen_init(codec); |
1038 | ||
56487c27 TH |
1039 | if (spec->gpio_mask) { |
1040 | snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK, | |
1041 | spec->gpio_mask); | |
1042 | snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION, | |
1043 | spec->gpio_dir); | |
1044 | snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, | |
1045 | spec->gpio_data); | |
1046 | } | |
1047 | ||
1077a024 | 1048 | init_input_coef(codec); |
56487c27 | 1049 | |
1077a024 | 1050 | cs4210_spdif_automute(codec, NULL); |
56487c27 TH |
1051 | |
1052 | return 0; | |
1053 | } | |
1054 | ||
1077a024 | 1055 | static int cs421x_build_controls(struct hda_codec *codec) |
56487c27 | 1056 | { |
56487c27 | 1057 | struct cs_spec *spec = codec->spec; |
56487c27 | 1058 | int err; |
56487c27 | 1059 | |
1077a024 | 1060 | err = snd_hda_gen_build_controls(codec); |
56487c27 TH |
1061 | if (err < 0) |
1062 | return err; | |
56487c27 | 1063 | |
1077a024 TI |
1064 | if (spec->gen.autocfg.speaker_outs && |
1065 | spec->vendor_nid == CS4210_VENDOR_NID) { | |
56487c27 | 1066 | err = snd_hda_ctl_add(codec, 0, |
1077a024 | 1067 | snd_ctl_new1(&cs421x_speaker_boost_ctl, codec)); |
56487c27 TH |
1068 | if (err < 0) |
1069 | return err; | |
1070 | } | |
01a61e12 | 1071 | return 0; |
56487c27 TH |
1072 | } |
1073 | ||
1077a024 | 1074 | static void fix_volume_caps(struct hda_codec *codec, hda_nid_t dac) |
56487c27 | 1075 | { |
1077a024 | 1076 | unsigned int caps; |
56487c27 | 1077 | |
1077a024 TI |
1078 | /* set the upper-limit for mixer amp to 0dB */ |
1079 | caps = query_amp_caps(codec, dac, HDA_OUTPUT); | |
1080 | caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT); | |
1081 | caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f) | |
1082 | << AC_AMPCAP_NUM_STEPS_SHIFT; | |
1083 | snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps); | |
56487c27 TH |
1084 | } |
1085 | ||
1086 | static int cs421x_parse_auto_config(struct hda_codec *codec) | |
1087 | { | |
1088 | struct cs_spec *spec = codec->spec; | |
1077a024 | 1089 | hda_nid_t dac = CS4210_DAC_NID; |
56487c27 TH |
1090 | int err; |
1091 | ||
1077a024 TI |
1092 | fix_volume_caps(codec, dac); |
1093 | ||
1094 | err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0); | |
56487c27 TH |
1095 | if (err < 0) |
1096 | return err; | |
1077a024 TI |
1097 | |
1098 | err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg); | |
56487c27 TH |
1099 | if (err < 0) |
1100 | return err; | |
1077a024 TI |
1101 | |
1102 | parse_cs421x_digital(codec); | |
56487c27 TH |
1103 | return 0; |
1104 | } | |
1105 | ||
1106 | #ifdef CONFIG_PM | |
1107 | /* | |
1108 | Manage PDREF, when transitioning to D3hot | |
1109 | (DAC,ADC) -> D3, PDREF=1, AFG->D3 | |
1110 | */ | |
68cb2b55 | 1111 | static int cs421x_suspend(struct hda_codec *codec) |
56487c27 | 1112 | { |
5660ffd0 | 1113 | struct cs_spec *spec = codec->spec; |
56487c27 TH |
1114 | unsigned int coef; |
1115 | ||
1116 | snd_hda_shutup_pins(codec); | |
1117 | ||
1118 | snd_hda_codec_write(codec, CS4210_DAC_NID, 0, | |
1119 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); | |
1120 | snd_hda_codec_write(codec, CS4210_ADC_NID, 0, | |
1121 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); | |
1122 | ||
5660ffd0 DH |
1123 | if (spec->vendor_nid == CS4210_VENDOR_NID) { |
1124 | coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG); | |
1125 | coef |= 0x0004; /* PDREF */ | |
1126 | cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef); | |
1127 | } | |
56487c27 TH |
1128 | |
1129 | return 0; | |
1130 | } | |
1131 | #endif | |
1132 | ||
00e17f76 | 1133 | static const struct hda_codec_ops cs421x_patch_ops = { |
56487c27 | 1134 | .build_controls = cs421x_build_controls, |
1077a024 | 1135 | .build_pcms = snd_hda_gen_build_pcms, |
56487c27 TH |
1136 | .init = cs421x_init, |
1137 | .free = cs_free, | |
5c2e4e0a | 1138 | .unsol_event = snd_hda_jack_unsol_event, |
56487c27 TH |
1139 | #ifdef CONFIG_PM |
1140 | .suspend = cs421x_suspend, | |
1141 | #endif | |
1142 | }; | |
1143 | ||
5660ffd0 | 1144 | static int patch_cs4210(struct hda_codec *codec) |
56487c27 TH |
1145 | { |
1146 | struct cs_spec *spec; | |
1147 | int err; | |
1148 | ||
1077a024 | 1149 | spec = cs_alloc_spec(codec, CS4210_VENDOR_NID); |
56487c27 TH |
1150 | if (!spec) |
1151 | return -ENOMEM; | |
56487c27 | 1152 | |
6d3073e1 TI |
1153 | spec->gen.automute_hook = cs_automute; |
1154 | ||
b35aabd7 TI |
1155 | snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl, |
1156 | cs421x_fixups); | |
1157 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); | |
56487c27 TH |
1158 | |
1159 | /* | |
1160 | Update the GPIO/DMIC/SENSE_B pinmux before the configuration | |
1161 | is auto-parsed. If GPIO or SENSE_B is forced, DMIC input | |
1162 | is disabled. | |
1163 | */ | |
5660ffd0 | 1164 | cs4210_pinmux_init(codec); |
56487c27 TH |
1165 | |
1166 | err = cs421x_parse_auto_config(codec); | |
1167 | if (err < 0) | |
1168 | goto error; | |
1169 | ||
5660ffd0 DH |
1170 | codec->patch_ops = cs421x_patch_ops; |
1171 | ||
b35aabd7 TI |
1172 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); |
1173 | ||
5660ffd0 DH |
1174 | return 0; |
1175 | ||
1176 | error: | |
c5e0b6db | 1177 | cs_free(codec); |
5660ffd0 DH |
1178 | return err; |
1179 | } | |
1180 | ||
1181 | static int patch_cs4213(struct hda_codec *codec) | |
1182 | { | |
1183 | struct cs_spec *spec; | |
1184 | int err; | |
1185 | ||
1077a024 | 1186 | spec = cs_alloc_spec(codec, CS4213_VENDOR_NID); |
5660ffd0 DH |
1187 | if (!spec) |
1188 | return -ENOMEM; | |
5660ffd0 DH |
1189 | |
1190 | err = cs421x_parse_auto_config(codec); | |
1191 | if (err < 0) | |
1192 | goto error; | |
56487c27 | 1193 | |
5660ffd0 | 1194 | codec->patch_ops = cs421x_patch_ops; |
56487c27 TH |
1195 | return 0; |
1196 | ||
1197 | error: | |
c5e0b6db | 1198 | cs_free(codec); |
56487c27 TH |
1199 | return err; |
1200 | } | |
1201 | ||
e5f14248 TI |
1202 | |
1203 | /* | |
1204 | * patch entries | |
1205 | */ | |
c42d4782 | 1206 | static const struct hda_codec_preset snd_hda_preset_cirrus[] = { |
e5f14248 TI |
1207 | { .id = 0x10134206, .name = "CS4206", .patch = patch_cs420x }, |
1208 | { .id = 0x10134207, .name = "CS4207", .patch = patch_cs420x }, | |
be8cf445 | 1209 | { .id = 0x10134208, .name = "CS4208", .patch = patch_cs4208 }, |
5660ffd0 DH |
1210 | { .id = 0x10134210, .name = "CS4210", .patch = patch_cs4210 }, |
1211 | { .id = 0x10134213, .name = "CS4213", .patch = patch_cs4213 }, | |
e5f14248 TI |
1212 | {} /* terminator */ |
1213 | }; | |
1214 | ||
1215 | MODULE_ALIAS("snd-hda-codec-id:10134206"); | |
1216 | MODULE_ALIAS("snd-hda-codec-id:10134207"); | |
be8cf445 | 1217 | MODULE_ALIAS("snd-hda-codec-id:10134208"); |
56487c27 | 1218 | MODULE_ALIAS("snd-hda-codec-id:10134210"); |
5660ffd0 | 1219 | MODULE_ALIAS("snd-hda-codec-id:10134213"); |
e5f14248 TI |
1220 | |
1221 | MODULE_LICENSE("GPL"); | |
1222 | MODULE_DESCRIPTION("Cirrus Logic HD-audio codec"); | |
1223 | ||
1224 | static struct hda_codec_preset_list cirrus_list = { | |
1225 | .preset = snd_hda_preset_cirrus, | |
1226 | .owner = THIS_MODULE, | |
1227 | }; | |
1228 | ||
1229 | static int __init patch_cirrus_init(void) | |
1230 | { | |
1231 | return snd_hda_add_codec_preset(&cirrus_list); | |
1232 | } | |
1233 | ||
1234 | static void __exit patch_cirrus_exit(void) | |
1235 | { | |
1236 | snd_hda_delete_codec_preset(&cirrus_list); | |
1237 | } | |
1238 | ||
1239 | module_init(patch_cirrus_init) | |
1240 | module_exit(patch_cirrus_exit) |