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e5f14248 TI |
1 | /* |
2 | * HD audio interface patch for Cirrus Logic CS420x chip | |
3 | * | |
4 | * Copyright (c) 2009 Takashi Iwai <tiwai@suse.de> | |
5 | * | |
6 | * This driver is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This driver is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
21 | #include <linux/init.h> | |
e5f14248 | 22 | #include <linux/slab.h> |
da155d5b | 23 | #include <linux/module.h> |
e5f14248 | 24 | #include <sound/core.h> |
1077a024 | 25 | #include <sound/tlv.h> |
e5f14248 TI |
26 | #include "hda_codec.h" |
27 | #include "hda_local.h" | |
128bc4ba | 28 | #include "hda_auto_parser.h" |
1835a0f9 | 29 | #include "hda_jack.h" |
1077a024 | 30 | #include "hda_generic.h" |
e5f14248 TI |
31 | |
32 | /* | |
33 | */ | |
34 | ||
35 | struct cs_spec { | |
1077a024 | 36 | struct hda_gen_spec gen; |
e5f14248 | 37 | |
ed208255 TI |
38 | unsigned int gpio_mask; |
39 | unsigned int gpio_dir; | |
40 | unsigned int gpio_data; | |
6dfeb703 TI |
41 | unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */ |
42 | unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */ | |
ed208255 | 43 | |
56487c27 TH |
44 | /* CS421x */ |
45 | unsigned int spdif_detect:1; | |
1077a024 | 46 | unsigned int spdif_present:1; |
56487c27 TH |
47 | unsigned int sense_b:1; |
48 | hda_nid_t vendor_nid; | |
0c52db8c TI |
49 | |
50 | /* for MBP SPDIF control */ | |
51 | int (*spdif_sw_put)(struct snd_kcontrol *kcontrol, | |
52 | struct snd_ctl_elem_value *ucontrol); | |
e5f14248 TI |
53 | }; |
54 | ||
56487c27 | 55 | /* available models with CS420x */ |
a6bae205 | 56 | enum { |
4e7d7c60 | 57 | CS420X_MBP53, |
a6bae205 | 58 | CS420X_MBP55, |
1a5ba2e9 | 59 | CS420X_IMAC27, |
b35aabd7 TI |
60 | CS420X_GPIO_13, |
61 | CS420X_GPIO_23, | |
ef596a57 | 62 | CS420X_MBP101, |
ffe4d12b | 63 | CS420X_MBP81, |
6ab982e8 | 64 | CS420X_MBA42, |
a6bae205 | 65 | CS420X_AUTO, |
03efce75 TI |
66 | /* aliases */ |
67 | CS420X_IMAC27_122 = CS420X_GPIO_23, | |
68 | CS420X_APPLE = CS420X_GPIO_13, | |
a6bae205 TI |
69 | }; |
70 | ||
56487c27 TH |
71 | /* CS421x boards */ |
72 | enum { | |
73 | CS421X_CDB4210, | |
b35aabd7 | 74 | CS421X_SENSE_B, |
4af16107 | 75 | CS421X_STUMPY, |
56487c27 TH |
76 | }; |
77 | ||
40c20fa0 TI |
78 | /* Vendor-specific processing widget */ |
79 | #define CS420X_VENDOR_NID 0x11 | |
80 | #define CS_DIG_OUT1_PIN_NID 0x10 | |
81 | #define CS_DIG_OUT2_PIN_NID 0x15 | |
16337e02 DB |
82 | #define CS_DMIC1_PIN_NID 0x0e |
83 | #define CS_DMIC2_PIN_NID 0x12 | |
40c20fa0 TI |
84 | |
85 | /* coef indices */ | |
86 | #define IDX_SPDIF_STAT 0x0000 | |
87 | #define IDX_SPDIF_CTL 0x0001 | |
88 | #define IDX_ADC_CFG 0x0002 | |
89 | /* SZC bitmask, 4 modes below: | |
90 | * 0 = immediate, | |
91 | * 1 = digital immediate, analog zero-cross | |
92 | * 2 = digtail & analog soft-ramp | |
93 | * 3 = digital soft-ramp, analog zero-cross | |
94 | */ | |
95 | #define CS_COEF_ADC_SZC_MASK (3 << 0) | |
96 | #define CS_COEF_ADC_MIC_SZC_MODE (3 << 0) /* SZC setup for mic */ | |
97 | #define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */ | |
98 | /* PGA mode: 0 = differential, 1 = signle-ended */ | |
99 | #define CS_COEF_ADC_MIC_PGA_MODE (1 << 5) /* PGA setup for mic */ | |
100 | #define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */ | |
101 | #define IDX_DAC_CFG 0x0003 | |
102 | /* SZC bitmask, 4 modes below: | |
103 | * 0 = Immediate | |
104 | * 1 = zero-cross | |
105 | * 2 = soft-ramp | |
106 | * 3 = soft-ramp on zero-cross | |
107 | */ | |
108 | #define CS_COEF_DAC_HP_SZC_MODE (3 << 0) /* nid 0x02 */ | |
109 | #define CS_COEF_DAC_LO_SZC_MODE (3 << 2) /* nid 0x03 */ | |
110 | #define CS_COEF_DAC_SPK_SZC_MODE (3 << 4) /* nid 0x04 */ | |
111 | ||
112 | #define IDX_BEEP_CFG 0x0004 | |
113 | /* 0x0008 - test reg key */ | |
114 | /* 0x0009 - 0x0014 -> 12 test regs */ | |
115 | /* 0x0015 - visibility reg */ | |
116 | ||
b5bf0a92 BW |
117 | /* Cirrus Logic CS4208 */ |
118 | #define CS4208_VENDOR_NID 0x24 | |
119 | ||
56487c27 TH |
120 | /* |
121 | * Cirrus Logic CS4210 | |
122 | * | |
123 | * 1 DAC => HP(sense) / Speakers, | |
124 | * 1 ADC <= LineIn(sense) / MicIn / DMicIn, | |
125 | * 1 SPDIF OUT => SPDIF Trasmitter(sense) | |
126 | */ | |
127 | #define CS4210_DAC_NID 0x02 | |
128 | #define CS4210_ADC_NID 0x03 | |
5660ffd0 | 129 | #define CS4210_VENDOR_NID 0x0B |
56487c27 TH |
130 | #define CS421X_DMIC_PIN_NID 0x09 /* Port E */ |
131 | #define CS421X_SPDIF_PIN_NID 0x0A /* Port H */ | |
132 | ||
1077a024 TI |
133 | #define CS421X_IDX_DEV_CFG 0x01 |
134 | #define CS421X_IDX_ADC_CFG 0x02 | |
135 | #define CS421X_IDX_DAC_CFG 0x03 | |
136 | #define CS421X_IDX_SPK_CTL 0x04 | |
e5f14248 | 137 | |
1077a024 TI |
138 | /* Cirrus Logic CS4213 is like CS4210 but does not have SPDIF input/output */ |
139 | #define CS4213_VENDOR_NID 0x09 | |
e5f14248 | 140 | |
21a4dc43 | 141 | |
1077a024 | 142 | static inline int cs_vendor_coef_get(struct hda_codec *codec, unsigned int idx) |
e5f14248 TI |
143 | { |
144 | struct cs_spec *spec = codec->spec; | |
1077a024 TI |
145 | snd_hda_codec_write(codec, spec->vendor_nid, 0, |
146 | AC_VERB_SET_COEF_INDEX, idx); | |
147 | return snd_hda_codec_read(codec, spec->vendor_nid, 0, | |
148 | AC_VERB_GET_PROC_COEF, 0); | |
e5f14248 TI |
149 | } |
150 | ||
1077a024 TI |
151 | static inline void cs_vendor_coef_set(struct hda_codec *codec, unsigned int idx, |
152 | unsigned int coef) | |
e5f14248 TI |
153 | { |
154 | struct cs_spec *spec = codec->spec; | |
1077a024 TI |
155 | snd_hda_codec_write(codec, spec->vendor_nid, 0, |
156 | AC_VERB_SET_COEF_INDEX, idx); | |
157 | snd_hda_codec_write(codec, spec->vendor_nid, 0, | |
158 | AC_VERB_SET_PROC_COEF, coef); | |
e5f14248 TI |
159 | } |
160 | ||
21a4dc43 TI |
161 | /* |
162 | * auto-mute and auto-mic switching | |
56487c27 TH |
163 | * CS421x auto-output redirecting |
164 | * HP/SPK/SPDIF | |
21a4dc43 TI |
165 | */ |
166 | ||
1077a024 | 167 | static void cs_automute(struct hda_codec *codec) |
e5f14248 TI |
168 | { |
169 | struct cs_spec *spec = codec->spec; | |
e5f14248 | 170 | |
1077a024 TI |
171 | /* mute HPs if spdif jack (SENSE_B) is present */ |
172 | spec->gen.master_mute = !!(spec->spdif_present && spec->sense_b); | |
56487c27 | 173 | |
1077a024 | 174 | snd_hda_gen_update_outputs(codec); |
78e2a928 | 175 | |
be8cf445 | 176 | if (spec->gpio_eapd_hp || spec->gpio_eapd_speaker) { |
1f7c6658 TI |
177 | if (spec->gen.automute_speaker) |
178 | spec->gpio_data = spec->gen.hp_jack_present ? | |
179 | spec->gpio_eapd_hp : spec->gpio_eapd_speaker; | |
180 | else | |
181 | spec->gpio_data = | |
182 | spec->gpio_eapd_hp | spec->gpio_eapd_speaker; | |
3a385167 | 183 | snd_hda_codec_write(codec, 0x01, 0, |
039eb753 | 184 | AC_VERB_SET_GPIO_DATA, spec->gpio_data); |
3a385167 | 185 | } |
e5f14248 TI |
186 | } |
187 | ||
1077a024 | 188 | static bool is_active_pin(struct hda_codec *codec, hda_nid_t nid) |
e5f14248 | 189 | { |
1077a024 TI |
190 | unsigned int val; |
191 | val = snd_hda_codec_get_pincfg(codec, nid); | |
192 | return (get_defcfg_connect(val) != AC_JACK_PORT_NONE); | |
e5f14248 TI |
193 | } |
194 | ||
1077a024 | 195 | static void init_input_coef(struct hda_codec *codec) |
e5f14248 TI |
196 | { |
197 | struct cs_spec *spec = codec->spec; | |
40c20fa0 | 198 | unsigned int coef; |
e5f14248 | 199 | |
5660ffd0 DH |
200 | /* CS420x has multiple ADC, CS421x has single ADC */ |
201 | if (spec->vendor_nid == CS420X_VENDOR_NID) { | |
16337e02 | 202 | coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG); |
56487c27 | 203 | if (is_active_pin(codec, CS_DMIC2_PIN_NID)) |
16337e02 | 204 | coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */ |
56487c27 | 205 | if (is_active_pin(codec, CS_DMIC1_PIN_NID)) |
16337e02 | 206 | coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off |
56487c27 TH |
207 | * No effect if SPDIF_OUT2 is |
208 | * selected in IDX_SPDIF_CTL. | |
209 | */ | |
16337e02 DB |
210 | |
211 | cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef); | |
56487c27 | 212 | } |
40c20fa0 TI |
213 | } |
214 | ||
c42d4782 | 215 | static const struct hda_verb cs_coef_init_verbs[] = { |
40c20fa0 TI |
216 | {0x11, AC_VERB_SET_PROC_STATE, 1}, |
217 | {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG}, | |
218 | {0x11, AC_VERB_SET_PROC_COEF, | |
219 | (0x002a /* DAC1/2/3 SZCMode Soft Ramp */ | |
220 | | 0x0040 /* Mute DACs on FIFO error */ | |
221 | | 0x1000 /* Enable DACs High Pass Filter */ | |
222 | | 0x0400 /* Disable Coefficient Auto increment */ | |
223 | )}, | |
829e87e0 TI |
224 | /* ADC1/2 - Digital and Analog Soft Ramp */ |
225 | {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG}, | |
226 | {0x11, AC_VERB_SET_PROC_COEF, 0x000a}, | |
40c20fa0 | 227 | /* Beep */ |
5a83b4b5 | 228 | {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG}, |
40c20fa0 TI |
229 | {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */ |
230 | ||
231 | {} /* terminator */ | |
232 | }; | |
233 | ||
b5bf0a92 BW |
234 | static const struct hda_verb cs4208_coef_init_verbs[] = { |
235 | {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */ | |
236 | {0x24, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */ | |
237 | {0x24, AC_VERB_SET_COEF_INDEX, 0x0033}, | |
238 | {0x24, AC_VERB_SET_PROC_COEF, 0x0001}, /* A1 ICS */ | |
239 | {0x24, AC_VERB_SET_COEF_INDEX, 0x0034}, | |
240 | {0x24, AC_VERB_SET_PROC_COEF, 0x1C01}, /* A1 Enable, A Thresh = 300mV */ | |
241 | {} /* terminator */ | |
242 | }; | |
243 | ||
a769cbcf BA |
244 | /* Errata: CS4207 rev C0/C1/C2 Silicon |
245 | * | |
246 | * http://www.cirrus.com/en/pubs/errata/ER880C3.pdf | |
247 | * | |
248 | * 6. At high temperature (TA > +85°C), the digital supply current (IVD) | |
249 | * may be excessive (up to an additional 200 μA), which is most easily | |
250 | * observed while the part is being held in reset (RESET# active low). | |
251 | * | |
252 | * Root Cause: At initial powerup of the device, the logic that drives | |
253 | * the clock and write enable to the S/PDIF SRC RAMs is not properly | |
254 | * initialized. | |
255 | * Certain random patterns will cause a steady leakage current in those | |
256 | * RAM cells. The issue will resolve once the SRCs are used (turned on). | |
257 | * | |
258 | * Workaround: The following verb sequence briefly turns on the S/PDIF SRC | |
259 | * blocks, which will alleviate the issue. | |
260 | */ | |
261 | ||
c42d4782 | 262 | static const struct hda_verb cs_errata_init_verbs[] = { |
a769cbcf BA |
263 | {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */ |
264 | {0x11, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */ | |
265 | ||
266 | {0x11, AC_VERB_SET_COEF_INDEX, 0x0008}, | |
267 | {0x11, AC_VERB_SET_PROC_COEF, 0x9999}, | |
268 | {0x11, AC_VERB_SET_COEF_INDEX, 0x0017}, | |
269 | {0x11, AC_VERB_SET_PROC_COEF, 0xa412}, | |
270 | {0x11, AC_VERB_SET_COEF_INDEX, 0x0001}, | |
271 | {0x11, AC_VERB_SET_PROC_COEF, 0x0009}, | |
272 | ||
273 | {0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */ | |
274 | {0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */ | |
275 | ||
276 | {0x11, AC_VERB_SET_COEF_INDEX, 0x0017}, | |
277 | {0x11, AC_VERB_SET_PROC_COEF, 0x2412}, | |
278 | {0x11, AC_VERB_SET_COEF_INDEX, 0x0008}, | |
279 | {0x11, AC_VERB_SET_PROC_COEF, 0x0000}, | |
280 | {0x11, AC_VERB_SET_COEF_INDEX, 0x0001}, | |
281 | {0x11, AC_VERB_SET_PROC_COEF, 0x0008}, | |
282 | {0x11, AC_VERB_SET_PROC_STATE, 0x00}, | |
283 | ||
38c07641 | 284 | #if 0 /* Don't to set to D3 as we are in power-up sequence */ |
a769cbcf BA |
285 | {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */ |
286 | {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */ | |
287 | /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */ | |
38c07641 | 288 | #endif |
a769cbcf BA |
289 | |
290 | {} /* terminator */ | |
291 | }; | |
292 | ||
40c20fa0 | 293 | /* SPDIF setup */ |
1077a024 | 294 | static void init_digital_coef(struct hda_codec *codec) |
40c20fa0 TI |
295 | { |
296 | unsigned int coef; | |
297 | ||
298 | coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */ | |
299 | coef |= 0x0008; /* Replace with mute on error */ | |
300 | if (is_active_pin(codec, CS_DIG_OUT2_PIN_NID)) | |
301 | coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2 | |
302 | * SPDIF_OUT2 is shared with GPIO1 and | |
303 | * DMIC_SDA2. | |
304 | */ | |
305 | cs_vendor_coef_set(codec, IDX_SPDIF_CTL, coef); | |
e5f14248 TI |
306 | } |
307 | ||
308 | static int cs_init(struct hda_codec *codec) | |
309 | { | |
310 | struct cs_spec *spec = codec->spec; | |
311 | ||
be8cf445 TI |
312 | if (spec->vendor_nid == CS420X_VENDOR_NID) { |
313 | /* init_verb sequence for C0/C1/C2 errata*/ | |
314 | snd_hda_sequence_write(codec, cs_errata_init_verbs); | |
315 | snd_hda_sequence_write(codec, cs_coef_init_verbs); | |
b5bf0a92 BW |
316 | } else if (spec->vendor_nid == CS4208_VENDOR_NID) { |
317 | snd_hda_sequence_write(codec, cs4208_coef_init_verbs); | |
be8cf445 | 318 | } |
ed208255 | 319 | |
1077a024 | 320 | snd_hda_gen_init(codec); |
98415eac | 321 | |
ed208255 TI |
322 | if (spec->gpio_mask) { |
323 | snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK, | |
324 | spec->gpio_mask); | |
325 | snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION, | |
326 | spec->gpio_dir); | |
327 | snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, | |
328 | spec->gpio_data); | |
329 | } | |
330 | ||
be8cf445 TI |
331 | if (spec->vendor_nid == CS420X_VENDOR_NID) { |
332 | init_input_coef(codec); | |
333 | init_digital_coef(codec); | |
334 | } | |
01a61e12 TI |
335 | |
336 | return 0; | |
e5f14248 TI |
337 | } |
338 | ||
0c52db8c TI |
339 | static int cs_build_controls(struct hda_codec *codec) |
340 | { | |
341 | int err; | |
342 | ||
343 | err = snd_hda_gen_build_controls(codec); | |
344 | if (err < 0) | |
345 | return err; | |
346 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_BUILD); | |
347 | return 0; | |
348 | } | |
349 | ||
1077a024 | 350 | #define cs_free snd_hda_gen_free |
e5f14248 | 351 | |
c42d4782 | 352 | static const struct hda_codec_ops cs_patch_ops = { |
0c52db8c | 353 | .build_controls = cs_build_controls, |
1077a024 | 354 | .build_pcms = snd_hda_gen_build_pcms, |
e5f14248 TI |
355 | .init = cs_init, |
356 | .free = cs_free, | |
5c2e4e0a | 357 | .unsol_event = snd_hda_jack_unsol_event, |
e5f14248 TI |
358 | }; |
359 | ||
360 | static int cs_parse_auto_config(struct hda_codec *codec) | |
361 | { | |
362 | struct cs_spec *spec = codec->spec; | |
363 | int err; | |
de3df8a9 | 364 | int i; |
e5f14248 | 365 | |
1077a024 | 366 | err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0); |
ed208255 TI |
367 | if (err < 0) |
368 | return err; | |
369 | ||
1077a024 | 370 | err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg); |
e5f14248 TI |
371 | if (err < 0) |
372 | return err; | |
1077a024 | 373 | |
de3df8a9 TI |
374 | /* keep the ADCs powered up when it's dynamically switchable */ |
375 | if (spec->gen.dyn_adc_switch) { | |
376 | unsigned int done = 0; | |
377 | for (i = 0; i < spec->gen.input_mux.num_items; i++) { | |
378 | int idx = spec->gen.dyn_adc_idx[i]; | |
379 | if (done & (1 << idx)) | |
380 | continue; | |
381 | snd_hda_gen_fix_pin_power(codec, | |
382 | spec->gen.adc_nids[idx]); | |
383 | done |= 1 << idx; | |
384 | } | |
385 | } | |
386 | ||
e5f14248 TI |
387 | return 0; |
388 | } | |
389 | ||
b35aabd7 TI |
390 | static const struct hda_model_fixup cs420x_models[] = { |
391 | { .id = CS420X_MBP53, .name = "mbp53" }, | |
392 | { .id = CS420X_MBP55, .name = "mbp55" }, | |
393 | { .id = CS420X_IMAC27, .name = "imac27" }, | |
394 | { .id = CS420X_IMAC27_122, .name = "imac27_122" }, | |
395 | { .id = CS420X_APPLE, .name = "apple" }, | |
ef596a57 | 396 | { .id = CS420X_MBP101, .name = "mbp101" }, |
ffe4d12b | 397 | { .id = CS420X_MBP81, .name = "mbp81" }, |
6ab982e8 | 398 | { .id = CS420X_MBA42, .name = "mba42" }, |
b35aabd7 | 399 | {} |
a6bae205 TI |
400 | }; |
401 | ||
b35aabd7 | 402 | static const struct snd_pci_quirk cs420x_fixup_tbl[] = { |
4e7d7c60 | 403 | SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53), |
87232dd4 | 404 | SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55), |
a6bae205 | 405 | SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55), |
f46119b7 | 406 | SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55), |
6dfeb703 TI |
407 | /* this conflicts with too many other models */ |
408 | /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/ | |
6dfeb703 | 409 | |
b35aabd7 | 410 | /* codec SSID */ |
031f335c | 411 | SND_PCI_QUIRK(0x106b, 0x0600, "iMac 14,1", CS420X_IMAC27_122), |
ffe4d12b | 412 | SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81), |
7e5bea19 | 413 | SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122), |
ef596a57 | 414 | SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101), |
2ddee91a | 415 | SND_PCI_QUIRK(0x106b, 0x5600, "MacBookAir 5,2", CS420X_MBP81), |
6ab982e8 | 416 | SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42), |
6dfeb703 | 417 | SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE), |
a6bae205 TI |
418 | {} /* terminator */ |
419 | }; | |
420 | ||
b35aabd7 | 421 | static const struct hda_pintbl mbp53_pincfgs[] = { |
4e7d7c60 VW |
422 | { 0x09, 0x012b4050 }, |
423 | { 0x0a, 0x90100141 }, | |
424 | { 0x0b, 0x90100140 }, | |
425 | { 0x0c, 0x018b3020 }, | |
426 | { 0x0d, 0x90a00110 }, | |
427 | { 0x0e, 0x400000f0 }, | |
428 | { 0x0f, 0x01cbe030 }, | |
429 | { 0x10, 0x014be060 }, | |
430 | { 0x12, 0x400000f0 }, | |
431 | { 0x15, 0x400000f0 }, | |
432 | {} /* terminator */ | |
433 | }; | |
434 | ||
b35aabd7 | 435 | static const struct hda_pintbl mbp55_pincfgs[] = { |
a6bae205 TI |
436 | { 0x09, 0x012b4030 }, |
437 | { 0x0a, 0x90100121 }, | |
438 | { 0x0b, 0x90100120 }, | |
439 | { 0x0c, 0x400000f0 }, | |
440 | { 0x0d, 0x90a00110 }, | |
441 | { 0x0e, 0x400000f0 }, | |
442 | { 0x0f, 0x400000f0 }, | |
443 | { 0x10, 0x014be040 }, | |
444 | { 0x12, 0x400000f0 }, | |
445 | { 0x15, 0x400000f0 }, | |
446 | {} /* terminator */ | |
447 | }; | |
448 | ||
b35aabd7 | 449 | static const struct hda_pintbl imac27_pincfgs[] = { |
1a5ba2e9 RAE |
450 | { 0x09, 0x012b4050 }, |
451 | { 0x0a, 0x90100140 }, | |
452 | { 0x0b, 0x90100142 }, | |
453 | { 0x0c, 0x018b3020 }, | |
454 | { 0x0d, 0x90a00110 }, | |
455 | { 0x0e, 0x400000f0 }, | |
456 | { 0x0f, 0x01cbe030 }, | |
457 | { 0x10, 0x014be060 }, | |
458 | { 0x12, 0x01ab9070 }, | |
459 | { 0x15, 0x400000f0 }, | |
460 | {} /* terminator */ | |
461 | }; | |
462 | ||
ef596a57 TI |
463 | static const struct hda_pintbl mbp101_pincfgs[] = { |
464 | { 0x0d, 0x40ab90f0 }, | |
465 | { 0x0e, 0x90a600f0 }, | |
466 | { 0x12, 0x50a600f0 }, | |
467 | {} /* terminator */ | |
468 | }; | |
469 | ||
6ab982e8 TI |
470 | static const struct hda_pintbl mba42_pincfgs[] = { |
471 | { 0x09, 0x012b4030 }, /* HP */ | |
472 | { 0x0a, 0x400000f0 }, | |
473 | { 0x0b, 0x90100120 }, /* speaker */ | |
474 | { 0x0c, 0x400000f0 }, | |
475 | { 0x0d, 0x90a00110 }, /* mic */ | |
476 | { 0x0e, 0x400000f0 }, | |
477 | { 0x0f, 0x400000f0 }, | |
478 | { 0x10, 0x400000f0 }, | |
479 | { 0x12, 0x400000f0 }, | |
480 | { 0x15, 0x400000f0 }, | |
481 | {} /* terminator */ | |
482 | }; | |
483 | ||
b5bf0a92 BW |
484 | static const struct hda_pintbl mba6_pincfgs[] = { |
485 | { 0x10, 0x032120f0 }, /* HP */ | |
486 | { 0x11, 0x500000f0 }, | |
487 | { 0x12, 0x90100010 }, /* Speaker */ | |
488 | { 0x13, 0x500000f0 }, | |
489 | { 0x14, 0x500000f0 }, | |
490 | { 0x15, 0x770000f0 }, | |
491 | { 0x16, 0x770000f0 }, | |
492 | { 0x17, 0x430000f0 }, | |
493 | { 0x18, 0x43ab9030 }, /* Mic */ | |
494 | { 0x19, 0x770000f0 }, | |
495 | { 0x1a, 0x770000f0 }, | |
496 | { 0x1b, 0x770000f0 }, | |
497 | { 0x1c, 0x90a00090 }, | |
498 | { 0x1d, 0x500000f0 }, | |
499 | { 0x1e, 0x500000f0 }, | |
500 | { 0x1f, 0x500000f0 }, | |
501 | { 0x20, 0x500000f0 }, | |
502 | { 0x21, 0x430000f0 }, | |
503 | { 0x22, 0x430000f0 }, | |
504 | {} /* terminator */ | |
505 | }; | |
506 | ||
b35aabd7 TI |
507 | static void cs420x_fixup_gpio_13(struct hda_codec *codec, |
508 | const struct hda_fixup *fix, int action) | |
509 | { | |
510 | if (action == HDA_FIXUP_ACT_PRE_PROBE) { | |
511 | struct cs_spec *spec = codec->spec; | |
512 | spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */ | |
513 | spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */ | |
514 | spec->gpio_mask = spec->gpio_dir = | |
515 | spec->gpio_eapd_hp | spec->gpio_eapd_speaker; | |
516 | } | |
517 | } | |
a6bae205 | 518 | |
b35aabd7 TI |
519 | static void cs420x_fixup_gpio_23(struct hda_codec *codec, |
520 | const struct hda_fixup *fix, int action) | |
a6bae205 | 521 | { |
b35aabd7 TI |
522 | if (action == HDA_FIXUP_ACT_PRE_PROBE) { |
523 | struct cs_spec *spec = codec->spec; | |
524 | spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */ | |
525 | spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */ | |
526 | spec->gpio_mask = spec->gpio_dir = | |
527 | spec->gpio_eapd_hp | spec->gpio_eapd_speaker; | |
528 | } | |
a6bae205 TI |
529 | } |
530 | ||
b35aabd7 TI |
531 | static const struct hda_fixup cs420x_fixups[] = { |
532 | [CS420X_MBP53] = { | |
533 | .type = HDA_FIXUP_PINS, | |
534 | .v.pins = mbp53_pincfgs, | |
535 | .chained = true, | |
536 | .chain_id = CS420X_APPLE, | |
537 | }, | |
538 | [CS420X_MBP55] = { | |
539 | .type = HDA_FIXUP_PINS, | |
540 | .v.pins = mbp55_pincfgs, | |
541 | .chained = true, | |
542 | .chain_id = CS420X_GPIO_13, | |
543 | }, | |
544 | [CS420X_IMAC27] = { | |
545 | .type = HDA_FIXUP_PINS, | |
546 | .v.pins = imac27_pincfgs, | |
547 | .chained = true, | |
548 | .chain_id = CS420X_GPIO_13, | |
549 | }, | |
550 | [CS420X_GPIO_13] = { | |
551 | .type = HDA_FIXUP_FUNC, | |
552 | .v.func = cs420x_fixup_gpio_13, | |
553 | }, | |
554 | [CS420X_GPIO_23] = { | |
555 | .type = HDA_FIXUP_FUNC, | |
556 | .v.func = cs420x_fixup_gpio_23, | |
557 | }, | |
ef596a57 TI |
558 | [CS420X_MBP101] = { |
559 | .type = HDA_FIXUP_PINS, | |
560 | .v.pins = mbp101_pincfgs, | |
561 | .chained = true, | |
ef596a57 TI |
562 | .chain_id = CS420X_GPIO_13, |
563 | }, | |
ffe4d12b TI |
564 | [CS420X_MBP81] = { |
565 | .type = HDA_FIXUP_VERBS, | |
566 | .v.verbs = (const struct hda_verb[]) { | |
567 | /* internal mic ADC2: right only, single ended */ | |
568 | {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG}, | |
569 | {0x11, AC_VERB_SET_PROC_COEF, 0x102a}, | |
570 | {} | |
571 | }, | |
572 | .chained = true, | |
573 | .chain_id = CS420X_GPIO_13, | |
574 | }, | |
6ab982e8 TI |
575 | [CS420X_MBA42] = { |
576 | .type = HDA_FIXUP_PINS, | |
577 | .v.pins = mba42_pincfgs, | |
578 | .chained = true, | |
579 | .chain_id = CS420X_GPIO_13, | |
580 | }, | |
b35aabd7 TI |
581 | }; |
582 | ||
1077a024 | 583 | static struct cs_spec *cs_alloc_spec(struct hda_codec *codec, int vendor_nid) |
e5f14248 TI |
584 | { |
585 | struct cs_spec *spec; | |
e5f14248 TI |
586 | |
587 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
588 | if (!spec) | |
1077a024 | 589 | return NULL; |
e5f14248 | 590 | codec->spec = spec; |
1077a024 | 591 | spec->vendor_nid = vendor_nid; |
3e19fec3 | 592 | codec->power_save_node = 1; |
1077a024 TI |
593 | snd_hda_gen_spec_init(&spec->gen); |
594 | ||
595 | return spec; | |
596 | } | |
597 | ||
598 | static int patch_cs420x(struct hda_codec *codec) | |
599 | { | |
600 | struct cs_spec *spec; | |
601 | int err; | |
e5f14248 | 602 | |
1077a024 TI |
603 | spec = cs_alloc_spec(codec, CS420X_VENDOR_NID); |
604 | if (!spec) | |
605 | return -ENOMEM; | |
56487c27 | 606 | |
225068ab | 607 | codec->patch_ops = cs_patch_ops; |
6d3073e1 | 608 | spec->gen.automute_hook = cs_automute; |
bad994f5 | 609 | codec->single_adc_amp = 1; |
6d3073e1 | 610 | |
b35aabd7 TI |
611 | snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl, |
612 | cs420x_fixups); | |
613 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); | |
e5f14248 | 614 | |
ed208255 | 615 | err = cs_parse_auto_config(codec); |
21a4dc43 TI |
616 | if (err < 0) |
617 | goto error; | |
618 | ||
b35aabd7 TI |
619 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); |
620 | ||
e5f14248 TI |
621 | return 0; |
622 | ||
623 | error: | |
c5e0b6db | 624 | cs_free(codec); |
e5f14248 TI |
625 | return err; |
626 | } | |
627 | ||
be8cf445 TI |
628 | /* |
629 | * CS4208 support: | |
b5bf0a92 | 630 | * Its layout is no longer compatible with CS4206/CS4207 |
be8cf445 TI |
631 | */ |
632 | enum { | |
885845d7 | 633 | CS4208_MAC_AUTO, |
b5bf0a92 | 634 | CS4208_MBA6, |
0c52db8c | 635 | CS4208_MBP11, |
2154cc0e | 636 | CS4208_MACMINI, |
be8cf445 TI |
637 | CS4208_GPIO0, |
638 | }; | |
639 | ||
640 | static const struct hda_model_fixup cs4208_models[] = { | |
641 | { .id = CS4208_GPIO0, .name = "gpio0" }, | |
b5bf0a92 | 642 | { .id = CS4208_MBA6, .name = "mba6" }, |
0c52db8c | 643 | { .id = CS4208_MBP11, .name = "mbp11" }, |
2154cc0e | 644 | { .id = CS4208_MACMINI, .name = "macmini" }, |
be8cf445 TI |
645 | {} |
646 | }; | |
647 | ||
648 | static const struct snd_pci_quirk cs4208_fixup_tbl[] = { | |
885845d7 TI |
649 | SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS4208_MAC_AUTO), |
650 | {} /* terminator */ | |
651 | }; | |
652 | ||
653 | /* codec SSID matching */ | |
654 | static const struct snd_pci_quirk cs4208_mac_fixup_tbl[] = { | |
0c52db8c | 655 | SND_PCI_QUIRK(0x106b, 0x5e00, "MacBookPro 11,2", CS4208_MBP11), |
2154cc0e | 656 | SND_PCI_QUIRK(0x106b, 0x6c00, "MacMini 7,1", CS4208_MACMINI), |
b5bf0a92 BW |
657 | SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6), |
658 | SND_PCI_QUIRK(0x106b, 0x7200, "MacBookAir 6,2", CS4208_MBA6), | |
e8ff581f | 659 | SND_PCI_QUIRK(0x106b, 0x7b00, "MacBookPro 12,1", CS4208_MBP11), |
be8cf445 TI |
660 | {} /* terminator */ |
661 | }; | |
662 | ||
663 | static void cs4208_fixup_gpio0(struct hda_codec *codec, | |
664 | const struct hda_fixup *fix, int action) | |
665 | { | |
666 | if (action == HDA_FIXUP_ACT_PRE_PROBE) { | |
667 | struct cs_spec *spec = codec->spec; | |
668 | spec->gpio_eapd_hp = 0; | |
669 | spec->gpio_eapd_speaker = 1; | |
670 | spec->gpio_mask = spec->gpio_dir = | |
671 | spec->gpio_eapd_hp | spec->gpio_eapd_speaker; | |
672 | } | |
673 | } | |
674 | ||
885845d7 TI |
675 | static const struct hda_fixup cs4208_fixups[]; |
676 | ||
677 | /* remap the fixup from codec SSID and apply it */ | |
678 | static void cs4208_fixup_mac(struct hda_codec *codec, | |
679 | const struct hda_fixup *fix, int action) | |
680 | { | |
681 | if (action != HDA_FIXUP_ACT_PRE_PROBE) | |
682 | return; | |
f5662e1c DH |
683 | |
684 | codec->fixup_id = HDA_FIXUP_ID_NOT_SET; | |
885845d7 | 685 | snd_hda_pick_fixup(codec, NULL, cs4208_mac_fixup_tbl, cs4208_fixups); |
f5662e1c | 686 | if (codec->fixup_id == HDA_FIXUP_ID_NOT_SET) |
885845d7 TI |
687 | codec->fixup_id = CS4208_GPIO0; /* default fixup */ |
688 | snd_hda_apply_fixup(codec, action); | |
689 | } | |
690 | ||
2154cc0e TI |
691 | /* MacMini 7,1 has the inverted jack detection */ |
692 | static void cs4208_fixup_macmini(struct hda_codec *codec, | |
693 | const struct hda_fixup *fix, int action) | |
694 | { | |
695 | static const struct hda_pintbl pincfgs[] = { | |
696 | { 0x18, 0x00ab9150 }, /* mic (audio-in) jack: disable detect */ | |
697 | { 0x21, 0x004be140 }, /* SPDIF: disable detect */ | |
698 | { } | |
699 | }; | |
700 | ||
701 | if (action == HDA_FIXUP_ACT_PRE_PROBE) { | |
702 | /* HP pin (0x10) has an inverted detection */ | |
703 | codec->inv_jack_detect = 1; | |
704 | /* disable the bogus Mic and SPDIF jack detections */ | |
705 | snd_hda_apply_pincfgs(codec, pincfgs); | |
706 | } | |
707 | } | |
708 | ||
0c52db8c TI |
709 | static int cs4208_spdif_sw_put(struct snd_kcontrol *kcontrol, |
710 | struct snd_ctl_elem_value *ucontrol) | |
711 | { | |
712 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
713 | struct cs_spec *spec = codec->spec; | |
714 | hda_nid_t pin = spec->gen.autocfg.dig_out_pins[0]; | |
715 | int pinctl = ucontrol->value.integer.value[0] ? PIN_OUT : 0; | |
716 | ||
717 | snd_hda_set_pin_ctl_cache(codec, pin, pinctl); | |
718 | return spec->spdif_sw_put(kcontrol, ucontrol); | |
719 | } | |
720 | ||
721 | /* hook the SPDIF switch */ | |
722 | static void cs4208_fixup_spdif_switch(struct hda_codec *codec, | |
723 | const struct hda_fixup *fix, int action) | |
724 | { | |
725 | if (action == HDA_FIXUP_ACT_BUILD) { | |
726 | struct cs_spec *spec = codec->spec; | |
727 | struct snd_kcontrol *kctl; | |
728 | ||
729 | if (!spec->gen.autocfg.dig_out_pins[0]) | |
730 | return; | |
731 | kctl = snd_hda_find_mixer_ctl(codec, "IEC958 Playback Switch"); | |
732 | if (!kctl) | |
733 | return; | |
734 | spec->spdif_sw_put = kctl->put; | |
735 | kctl->put = cs4208_spdif_sw_put; | |
736 | } | |
737 | } | |
738 | ||
be8cf445 | 739 | static const struct hda_fixup cs4208_fixups[] = { |
b5bf0a92 BW |
740 | [CS4208_MBA6] = { |
741 | .type = HDA_FIXUP_PINS, | |
742 | .v.pins = mba6_pincfgs, | |
743 | .chained = true, | |
744 | .chain_id = CS4208_GPIO0, | |
745 | }, | |
0c52db8c TI |
746 | [CS4208_MBP11] = { |
747 | .type = HDA_FIXUP_FUNC, | |
748 | .v.func = cs4208_fixup_spdif_switch, | |
749 | .chained = true, | |
750 | .chain_id = CS4208_GPIO0, | |
751 | }, | |
2154cc0e TI |
752 | [CS4208_MACMINI] = { |
753 | .type = HDA_FIXUP_FUNC, | |
754 | .v.func = cs4208_fixup_macmini, | |
755 | .chained = true, | |
756 | .chain_id = CS4208_GPIO0, | |
757 | }, | |
be8cf445 TI |
758 | [CS4208_GPIO0] = { |
759 | .type = HDA_FIXUP_FUNC, | |
760 | .v.func = cs4208_fixup_gpio0, | |
761 | }, | |
885845d7 TI |
762 | [CS4208_MAC_AUTO] = { |
763 | .type = HDA_FIXUP_FUNC, | |
764 | .v.func = cs4208_fixup_mac, | |
765 | }, | |
be8cf445 TI |
766 | }; |
767 | ||
b5bf0a92 BW |
768 | /* correct the 0dB offset of input pins */ |
769 | static void cs4208_fix_amp_caps(struct hda_codec *codec, hda_nid_t adc) | |
770 | { | |
771 | unsigned int caps; | |
772 | ||
773 | caps = query_amp_caps(codec, adc, HDA_INPUT); | |
774 | caps &= ~(AC_AMPCAP_OFFSET); | |
775 | caps |= 0x02; | |
776 | snd_hda_override_amp_caps(codec, adc, HDA_INPUT, caps); | |
777 | } | |
778 | ||
be8cf445 TI |
779 | static int patch_cs4208(struct hda_codec *codec) |
780 | { | |
781 | struct cs_spec *spec; | |
782 | int err; | |
783 | ||
b5bf0a92 | 784 | spec = cs_alloc_spec(codec, CS4208_VENDOR_NID); |
be8cf445 TI |
785 | if (!spec) |
786 | return -ENOMEM; | |
787 | ||
225068ab | 788 | codec->patch_ops = cs_patch_ops; |
be8cf445 | 789 | spec->gen.automute_hook = cs_automute; |
a1114a8c TI |
790 | /* exclude NID 0x10 (HP) from output volumes due to different steps */ |
791 | spec->gen.out_vol_mask = 1ULL << 0x10; | |
be8cf445 TI |
792 | |
793 | snd_hda_pick_fixup(codec, cs4208_models, cs4208_fixup_tbl, | |
794 | cs4208_fixups); | |
795 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); | |
796 | ||
b5bf0a92 BW |
797 | snd_hda_override_wcaps(codec, 0x18, |
798 | get_wcaps(codec, 0x18) | AC_WCAP_STEREO); | |
799 | cs4208_fix_amp_caps(codec, 0x18); | |
800 | cs4208_fix_amp_caps(codec, 0x1b); | |
801 | cs4208_fix_amp_caps(codec, 0x1c); | |
802 | ||
be8cf445 TI |
803 | err = cs_parse_auto_config(codec); |
804 | if (err < 0) | |
805 | goto error; | |
806 | ||
be8cf445 TI |
807 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); |
808 | ||
809 | return 0; | |
810 | ||
811 | error: | |
812 | cs_free(codec); | |
813 | return err; | |
814 | } | |
815 | ||
56487c27 TH |
816 | /* |
817 | * Cirrus Logic CS4210 | |
818 | * | |
819 | * 1 DAC => HP(sense) / Speakers, | |
820 | * 1 ADC <= LineIn(sense) / MicIn / DMicIn, | |
821 | * 1 SPDIF OUT => SPDIF Trasmitter(sense) | |
822 | */ | |
823 | ||
824 | /* CS4210 board names */ | |
b35aabd7 TI |
825 | static const struct hda_model_fixup cs421x_models[] = { |
826 | { .id = CS421X_CDB4210, .name = "cdb4210" }, | |
4af16107 | 827 | { .id = CS421X_STUMPY, .name = "stumpy" }, |
b35aabd7 | 828 | {} |
56487c27 TH |
829 | }; |
830 | ||
b35aabd7 | 831 | static const struct snd_pci_quirk cs421x_fixup_tbl[] = { |
56487c27 TH |
832 | /* Test Intel board + CDB2410 */ |
833 | SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210), | |
834 | {} /* terminator */ | |
835 | }; | |
836 | ||
837 | /* CS4210 board pinconfigs */ | |
838 | /* Default CS4210 (CDB4210)*/ | |
b35aabd7 | 839 | static const struct hda_pintbl cdb4210_pincfgs[] = { |
56487c27 TH |
840 | { 0x05, 0x0321401f }, |
841 | { 0x06, 0x90170010 }, | |
842 | { 0x07, 0x03813031 }, | |
843 | { 0x08, 0xb7a70037 }, | |
844 | { 0x09, 0xb7a6003e }, | |
845 | { 0x0a, 0x034510f0 }, | |
846 | {} /* terminator */ | |
847 | }; | |
848 | ||
4af16107 DR |
849 | /* Stumpy ChromeBox */ |
850 | static const struct hda_pintbl stumpy_pincfgs[] = { | |
851 | { 0x05, 0x022120f0 }, | |
852 | { 0x06, 0x901700f0 }, | |
853 | { 0x07, 0x02a120f0 }, | |
854 | { 0x08, 0x77a70037 }, | |
855 | { 0x09, 0x77a6003e }, | |
856 | { 0x0a, 0x434510f0 }, | |
857 | {} /* terminator */ | |
858 | }; | |
859 | ||
b35aabd7 TI |
860 | /* Setup GPIO/SENSE for each board (if used) */ |
861 | static void cs421x_fixup_sense_b(struct hda_codec *codec, | |
862 | const struct hda_fixup *fix, int action) | |
863 | { | |
864 | struct cs_spec *spec = codec->spec; | |
865 | if (action == HDA_FIXUP_ACT_PRE_PROBE) | |
866 | spec->sense_b = 1; | |
867 | } | |
868 | ||
869 | static const struct hda_fixup cs421x_fixups[] = { | |
870 | [CS421X_CDB4210] = { | |
871 | .type = HDA_FIXUP_PINS, | |
872 | .v.pins = cdb4210_pincfgs, | |
873 | .chained = true, | |
874 | .chain_id = CS421X_SENSE_B, | |
875 | }, | |
876 | [CS421X_SENSE_B] = { | |
877 | .type = HDA_FIXUP_FUNC, | |
878 | .v.func = cs421x_fixup_sense_b, | |
4af16107 DR |
879 | }, |
880 | [CS421X_STUMPY] = { | |
881 | .type = HDA_FIXUP_PINS, | |
882 | .v.pins = stumpy_pincfgs, | |
883 | }, | |
56487c27 TH |
884 | }; |
885 | ||
886 | static const struct hda_verb cs421x_coef_init_verbs[] = { | |
887 | {0x0B, AC_VERB_SET_PROC_STATE, 1}, | |
888 | {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG}, | |
889 | /* | |
890 | Disable Coefficient Index Auto-Increment(DAI)=1, | |
891 | PDREF=0 | |
892 | */ | |
893 | {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 }, | |
894 | ||
895 | {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG}, | |
896 | /* ADC SZCMode = Digital Soft Ramp */ | |
897 | {0x0B, AC_VERB_SET_PROC_COEF, 0x0002 }, | |
898 | ||
899 | {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG}, | |
900 | {0x0B, AC_VERB_SET_PROC_COEF, | |
901 | (0x0002 /* DAC SZCMode = Digital Soft Ramp */ | |
902 | | 0x0004 /* Mute DAC on FIFO error */ | |
903 | | 0x0008 /* Enable DAC High Pass Filter */ | |
904 | )}, | |
905 | {} /* terminator */ | |
906 | }; | |
907 | ||
908 | /* Errata: CS4210 rev A1 Silicon | |
909 | * | |
910 | * http://www.cirrus.com/en/pubs/errata/ | |
911 | * | |
912 | * Description: | |
913 | * 1. Performance degredation is present in the ADC. | |
914 | * 2. Speaker output is not completely muted upon HP detect. | |
915 | * 3. Noise is present when clipping occurs on the amplified | |
916 | * speaker outputs. | |
917 | * | |
918 | * Workaround: | |
919 | * The following verb sequence written to the registers during | |
920 | * initialization will correct the issues listed above. | |
921 | */ | |
922 | ||
923 | static const struct hda_verb cs421x_coef_init_verbs_A1_silicon_fixes[] = { | |
924 | {0x0B, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */ | |
925 | ||
926 | {0x0B, AC_VERB_SET_COEF_INDEX, 0x0006}, | |
927 | {0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */ | |
928 | ||
929 | {0x0B, AC_VERB_SET_COEF_INDEX, 0x000A}, | |
930 | {0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */ | |
931 | ||
932 | {0x0B, AC_VERB_SET_COEF_INDEX, 0x0011}, | |
933 | {0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */ | |
934 | ||
935 | {0x0B, AC_VERB_SET_COEF_INDEX, 0x001A}, | |
936 | {0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */ | |
937 | ||
938 | {0x0B, AC_VERB_SET_COEF_INDEX, 0x001B}, | |
939 | {0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */ | |
940 | ||
941 | {} /* terminator */ | |
942 | }; | |
943 | ||
944 | /* Speaker Amp Gain is controlled by the vendor widget's coef 4 */ | |
945 | static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0); | |
946 | ||
947 | static int cs421x_boost_vol_info(struct snd_kcontrol *kcontrol, | |
948 | struct snd_ctl_elem_info *uinfo) | |
949 | { | |
950 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
951 | uinfo->count = 1; | |
952 | uinfo->value.integer.min = 0; | |
953 | uinfo->value.integer.max = 3; | |
954 | return 0; | |
955 | } | |
956 | ||
957 | static int cs421x_boost_vol_get(struct snd_kcontrol *kcontrol, | |
958 | struct snd_ctl_elem_value *ucontrol) | |
959 | { | |
960 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
961 | ||
962 | ucontrol->value.integer.value[0] = | |
963 | cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003; | |
964 | return 0; | |
965 | } | |
966 | ||
967 | static int cs421x_boost_vol_put(struct snd_kcontrol *kcontrol, | |
968 | struct snd_ctl_elem_value *ucontrol) | |
969 | { | |
970 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
971 | ||
972 | unsigned int vol = ucontrol->value.integer.value[0]; | |
973 | unsigned int coef = | |
974 | cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL); | |
975 | unsigned int original_coef = coef; | |
976 | ||
977 | coef &= ~0x0003; | |
978 | coef |= (vol & 0x0003); | |
979 | if (original_coef == coef) | |
980 | return 0; | |
981 | else { | |
982 | cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef); | |
983 | return 1; | |
984 | } | |
985 | } | |
986 | ||
1077a024 | 987 | static const struct snd_kcontrol_new cs421x_speaker_boost_ctl = { |
56487c27 TH |
988 | |
989 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
990 | .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | | |
991 | SNDRV_CTL_ELEM_ACCESS_TLV_READ), | |
992 | .name = "Speaker Boost Playback Volume", | |
993 | .info = cs421x_boost_vol_info, | |
994 | .get = cs421x_boost_vol_get, | |
995 | .put = cs421x_boost_vol_put, | |
996 | .tlv = { .p = cs421x_speaker_boost_db_scale }, | |
997 | }; | |
998 | ||
5660ffd0 | 999 | static void cs4210_pinmux_init(struct hda_codec *codec) |
56487c27 TH |
1000 | { |
1001 | struct cs_spec *spec = codec->spec; | |
1002 | unsigned int def_conf, coef; | |
1003 | ||
1004 | /* GPIO, DMIC_SCL, DMIC_SDA and SENSE_B are multiplexed */ | |
1005 | coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG); | |
1006 | ||
1007 | if (spec->gpio_mask) | |
1008 | coef |= 0x0008; /* B1,B2 are GPIOs */ | |
1009 | else | |
1010 | coef &= ~0x0008; | |
1011 | ||
1012 | if (spec->sense_b) | |
1013 | coef |= 0x0010; /* B2 is SENSE_B, not inverted */ | |
1014 | else | |
1015 | coef &= ~0x0010; | |
1016 | ||
1017 | cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef); | |
1018 | ||
1019 | if ((spec->gpio_mask || spec->sense_b) && | |
1020 | is_active_pin(codec, CS421X_DMIC_PIN_NID)) { | |
1021 | ||
1022 | /* | |
1023 | GPIO or SENSE_B forced - disconnect the DMIC pin. | |
1024 | */ | |
1025 | def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID); | |
1026 | def_conf &= ~AC_DEFCFG_PORT_CONN; | |
1027 | def_conf |= (AC_JACK_PORT_NONE << AC_DEFCFG_PORT_CONN_SHIFT); | |
1028 | snd_hda_codec_set_pincfg(codec, CS421X_DMIC_PIN_NID, def_conf); | |
1029 | } | |
1030 | } | |
1031 | ||
1077a024 | 1032 | static void cs4210_spdif_automute(struct hda_codec *codec, |
1a4f69d5 | 1033 | struct hda_jack_callback *tbl) |
56487c27 TH |
1034 | { |
1035 | struct cs_spec *spec = codec->spec; | |
1077a024 TI |
1036 | bool spdif_present = false; |
1037 | hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0]; | |
1038 | ||
1039 | /* detect on spdif is specific to CS4210 */ | |
1040 | if (!spec->spdif_detect || | |
1041 | spec->vendor_nid != CS4210_VENDOR_NID) | |
1042 | return; | |
1043 | ||
1044 | spdif_present = snd_hda_jack_detect(codec, spdif_pin); | |
1045 | if (spdif_present == spec->spdif_present) | |
1046 | return; | |
1047 | ||
1048 | spec->spdif_present = spdif_present; | |
1049 | /* SPDIF TX on/off */ | |
44008f08 | 1050 | snd_hda_set_pin_ctl(codec, spdif_pin, spdif_present ? PIN_OUT : 0); |
56487c27 | 1051 | |
1077a024 TI |
1052 | cs_automute(codec); |
1053 | } | |
1054 | ||
1055 | static void parse_cs421x_digital(struct hda_codec *codec) | |
1056 | { | |
1057 | struct cs_spec *spec = codec->spec; | |
1058 | struct auto_pin_cfg *cfg = &spec->gen.autocfg; | |
1059 | int i; | |
56487c27 TH |
1060 | |
1061 | for (i = 0; i < cfg->dig_outs; i++) { | |
1062 | hda_nid_t nid = cfg->dig_out_pins[i]; | |
56487c27 | 1063 | if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) { |
56487c27 | 1064 | spec->spdif_detect = 1; |
1077a024 | 1065 | snd_hda_jack_detect_enable_callback(codec, nid, |
1077a024 | 1066 | cs4210_spdif_automute); |
56487c27 TH |
1067 | } |
1068 | } | |
1069 | } | |
1070 | ||
1071 | static int cs421x_init(struct hda_codec *codec) | |
1072 | { | |
1073 | struct cs_spec *spec = codec->spec; | |
1074 | ||
5660ffd0 DH |
1075 | if (spec->vendor_nid == CS4210_VENDOR_NID) { |
1076 | snd_hda_sequence_write(codec, cs421x_coef_init_verbs); | |
1077 | snd_hda_sequence_write(codec, cs421x_coef_init_verbs_A1_silicon_fixes); | |
1078 | cs4210_pinmux_init(codec); | |
1079 | } | |
56487c27 | 1080 | |
1077a024 TI |
1081 | snd_hda_gen_init(codec); |
1082 | ||
56487c27 TH |
1083 | if (spec->gpio_mask) { |
1084 | snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK, | |
1085 | spec->gpio_mask); | |
1086 | snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION, | |
1087 | spec->gpio_dir); | |
1088 | snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, | |
1089 | spec->gpio_data); | |
1090 | } | |
1091 | ||
1077a024 | 1092 | init_input_coef(codec); |
56487c27 | 1093 | |
1077a024 | 1094 | cs4210_spdif_automute(codec, NULL); |
56487c27 TH |
1095 | |
1096 | return 0; | |
1097 | } | |
1098 | ||
1077a024 | 1099 | static int cs421x_build_controls(struct hda_codec *codec) |
56487c27 | 1100 | { |
56487c27 | 1101 | struct cs_spec *spec = codec->spec; |
56487c27 | 1102 | int err; |
56487c27 | 1103 | |
1077a024 | 1104 | err = snd_hda_gen_build_controls(codec); |
56487c27 TH |
1105 | if (err < 0) |
1106 | return err; | |
56487c27 | 1107 | |
1077a024 TI |
1108 | if (spec->gen.autocfg.speaker_outs && |
1109 | spec->vendor_nid == CS4210_VENDOR_NID) { | |
56487c27 | 1110 | err = snd_hda_ctl_add(codec, 0, |
1077a024 | 1111 | snd_ctl_new1(&cs421x_speaker_boost_ctl, codec)); |
56487c27 TH |
1112 | if (err < 0) |
1113 | return err; | |
1114 | } | |
01a61e12 | 1115 | return 0; |
56487c27 TH |
1116 | } |
1117 | ||
1077a024 | 1118 | static void fix_volume_caps(struct hda_codec *codec, hda_nid_t dac) |
56487c27 | 1119 | { |
1077a024 | 1120 | unsigned int caps; |
56487c27 | 1121 | |
1077a024 TI |
1122 | /* set the upper-limit for mixer amp to 0dB */ |
1123 | caps = query_amp_caps(codec, dac, HDA_OUTPUT); | |
1124 | caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT); | |
1125 | caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f) | |
1126 | << AC_AMPCAP_NUM_STEPS_SHIFT; | |
1127 | snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps); | |
56487c27 TH |
1128 | } |
1129 | ||
1130 | static int cs421x_parse_auto_config(struct hda_codec *codec) | |
1131 | { | |
1132 | struct cs_spec *spec = codec->spec; | |
1077a024 | 1133 | hda_nid_t dac = CS4210_DAC_NID; |
56487c27 TH |
1134 | int err; |
1135 | ||
1077a024 TI |
1136 | fix_volume_caps(codec, dac); |
1137 | ||
1138 | err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0); | |
56487c27 TH |
1139 | if (err < 0) |
1140 | return err; | |
1077a024 TI |
1141 | |
1142 | err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg); | |
56487c27 TH |
1143 | if (err < 0) |
1144 | return err; | |
1077a024 TI |
1145 | |
1146 | parse_cs421x_digital(codec); | |
56487c27 TH |
1147 | return 0; |
1148 | } | |
1149 | ||
1150 | #ifdef CONFIG_PM | |
1151 | /* | |
1152 | Manage PDREF, when transitioning to D3hot | |
1153 | (DAC,ADC) -> D3, PDREF=1, AFG->D3 | |
1154 | */ | |
68cb2b55 | 1155 | static int cs421x_suspend(struct hda_codec *codec) |
56487c27 | 1156 | { |
5660ffd0 | 1157 | struct cs_spec *spec = codec->spec; |
56487c27 TH |
1158 | unsigned int coef; |
1159 | ||
1160 | snd_hda_shutup_pins(codec); | |
1161 | ||
1162 | snd_hda_codec_write(codec, CS4210_DAC_NID, 0, | |
1163 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); | |
1164 | snd_hda_codec_write(codec, CS4210_ADC_NID, 0, | |
1165 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); | |
1166 | ||
5660ffd0 DH |
1167 | if (spec->vendor_nid == CS4210_VENDOR_NID) { |
1168 | coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG); | |
1169 | coef |= 0x0004; /* PDREF */ | |
1170 | cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef); | |
1171 | } | |
56487c27 TH |
1172 | |
1173 | return 0; | |
1174 | } | |
1175 | #endif | |
1176 | ||
00e17f76 | 1177 | static const struct hda_codec_ops cs421x_patch_ops = { |
56487c27 | 1178 | .build_controls = cs421x_build_controls, |
1077a024 | 1179 | .build_pcms = snd_hda_gen_build_pcms, |
56487c27 TH |
1180 | .init = cs421x_init, |
1181 | .free = cs_free, | |
5c2e4e0a | 1182 | .unsol_event = snd_hda_jack_unsol_event, |
56487c27 TH |
1183 | #ifdef CONFIG_PM |
1184 | .suspend = cs421x_suspend, | |
1185 | #endif | |
1186 | }; | |
1187 | ||
5660ffd0 | 1188 | static int patch_cs4210(struct hda_codec *codec) |
56487c27 TH |
1189 | { |
1190 | struct cs_spec *spec; | |
1191 | int err; | |
1192 | ||
1077a024 | 1193 | spec = cs_alloc_spec(codec, CS4210_VENDOR_NID); |
56487c27 TH |
1194 | if (!spec) |
1195 | return -ENOMEM; | |
56487c27 | 1196 | |
225068ab | 1197 | codec->patch_ops = cs421x_patch_ops; |
6d3073e1 TI |
1198 | spec->gen.automute_hook = cs_automute; |
1199 | ||
b35aabd7 TI |
1200 | snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl, |
1201 | cs421x_fixups); | |
1202 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); | |
56487c27 TH |
1203 | |
1204 | /* | |
1205 | Update the GPIO/DMIC/SENSE_B pinmux before the configuration | |
1206 | is auto-parsed. If GPIO or SENSE_B is forced, DMIC input | |
1207 | is disabled. | |
1208 | */ | |
5660ffd0 | 1209 | cs4210_pinmux_init(codec); |
56487c27 TH |
1210 | |
1211 | err = cs421x_parse_auto_config(codec); | |
1212 | if (err < 0) | |
1213 | goto error; | |
1214 | ||
b35aabd7 TI |
1215 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); |
1216 | ||
5660ffd0 DH |
1217 | return 0; |
1218 | ||
1219 | error: | |
c5e0b6db | 1220 | cs_free(codec); |
5660ffd0 DH |
1221 | return err; |
1222 | } | |
1223 | ||
1224 | static int patch_cs4213(struct hda_codec *codec) | |
1225 | { | |
1226 | struct cs_spec *spec; | |
1227 | int err; | |
1228 | ||
1077a024 | 1229 | spec = cs_alloc_spec(codec, CS4213_VENDOR_NID); |
5660ffd0 DH |
1230 | if (!spec) |
1231 | return -ENOMEM; | |
5660ffd0 | 1232 | |
225068ab TI |
1233 | codec->patch_ops = cs421x_patch_ops; |
1234 | ||
5660ffd0 DH |
1235 | err = cs421x_parse_auto_config(codec); |
1236 | if (err < 0) | |
1237 | goto error; | |
56487c27 TH |
1238 | |
1239 | return 0; | |
1240 | ||
1241 | error: | |
c5e0b6db | 1242 | cs_free(codec); |
56487c27 TH |
1243 | return err; |
1244 | } | |
1245 | ||
e5f14248 TI |
1246 | |
1247 | /* | |
1248 | * patch entries | |
1249 | */ | |
b9a94a9c TI |
1250 | static const struct hda_device_id snd_hda_id_cirrus[] = { |
1251 | HDA_CODEC_ENTRY(0x10134206, "CS4206", patch_cs420x), | |
1252 | HDA_CODEC_ENTRY(0x10134207, "CS4207", patch_cs420x), | |
1253 | HDA_CODEC_ENTRY(0x10134208, "CS4208", patch_cs4208), | |
1254 | HDA_CODEC_ENTRY(0x10134210, "CS4210", patch_cs4210), | |
1255 | HDA_CODEC_ENTRY(0x10134213, "CS4213", patch_cs4213), | |
e5f14248 TI |
1256 | {} /* terminator */ |
1257 | }; | |
b9a94a9c | 1258 | MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_cirrus); |
e5f14248 TI |
1259 | |
1260 | MODULE_LICENSE("GPL"); | |
1261 | MODULE_DESCRIPTION("Cirrus Logic HD-audio codec"); | |
1262 | ||
d8a766a1 | 1263 | static struct hda_codec_driver cirrus_driver = { |
b9a94a9c | 1264 | .id = snd_hda_id_cirrus, |
e5f14248 TI |
1265 | }; |
1266 | ||
d8a766a1 | 1267 | module_hda_codec_driver(cirrus_driver); |