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Merge remote-tracking branch 'regulator/topic/palmas' into v3.9-rc8
[mirror_ubuntu-hirsute-kernel.git] / sound / pci / hda / patch_cirrus.c
CommitLineData
e5f14248
TI		 1/*
2 * HD audio interface patch for Cirrus Logic CS420x chip
3 *
4 * Copyright (c) 2009 Takashi Iwai <tiwai@suse.de>
5 *
6 * This driver is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This driver is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/init.h>
e5f14248
TI		 22#include <linux/slab.h>
23#include <linux/pci.h>
da155d5b 24#include <linux/module.h>
e5f14248 25#include <sound/core.h>
1077a024 26#include <sound/tlv.h>
e5f14248
TI		 27#include "hda_codec.h"
28#include "hda_local.h"
128bc4ba 29#include "hda_auto_parser.h"
1835a0f9 30#include "hda_jack.h"
1077a024 31#include "hda_generic.h"
e5f14248
TI		 32
33/*
34 */
35
36struct cs_spec {
1077a024 37 struct hda_gen_spec gen;
e5f14248 38
ed208255
TI		 39 unsigned int gpio_mask;
40 unsigned int gpio_dir;
41 unsigned int gpio_data;
6dfeb703
TI		 42 unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */
43 unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */
ed208255 44
56487c27
TH		 45 /* CS421x */
46 unsigned int spdif_detect:1;
1077a024 47 unsigned int spdif_present:1;
56487c27
TH		 48 unsigned int sense_b:1;
49 hda_nid_t vendor_nid;
e5f14248
TI		 50};
51
56487c27 52/* available models with CS420x */
a6bae205 53enum {
4e7d7c60 54 CS420X_MBP53,
a6bae205 55 CS420X_MBP55,
1a5ba2e9 56 CS420X_IMAC27,
b35aabd7
TI		 57 CS420X_GPIO_13,
58 CS420X_GPIO_23,
ef596a57 59 CS420X_MBP101,
ffe4d12b 60 CS420X_MBP81,
a6bae205 61 CS420X_AUTO,
03efce75
TI		 62 /* aliases */
63 CS420X_IMAC27_122 = CS420X_GPIO_23,
64 CS420X_APPLE = CS420X_GPIO_13,
a6bae205
TI		 65};
66
56487c27
TH		 67/* CS421x boards */
68enum {
69 CS421X_CDB4210,
b35aabd7 70 CS421X_SENSE_B,
56487c27
TH		 71};
72
40c20fa0
TI		 73/* Vendor-specific processing widget */
74#define CS420X_VENDOR_NID 0x11
75#define CS_DIG_OUT1_PIN_NID 0x10
76#define CS_DIG_OUT2_PIN_NID 0x15
16337e02
DB		 77#define CS_DMIC1_PIN_NID 0x0e
78#define CS_DMIC2_PIN_NID 0x12
40c20fa0
TI		 79
80/* coef indices */
81#define IDX_SPDIF_STAT 0x0000
82#define IDX_SPDIF_CTL 0x0001
83#define IDX_ADC_CFG 0x0002
84/* SZC bitmask, 4 modes below:
85 * 0 = immediate,
86 * 1 = digital immediate, analog zero-cross
87 * 2 = digtail & analog soft-ramp
88 * 3 = digital soft-ramp, analog zero-cross
89 */
90#define CS_COEF_ADC_SZC_MASK (3 << 0)
91#define CS_COEF_ADC_MIC_SZC_MODE (3 << 0) /* SZC setup for mic */
92#define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
93/* PGA mode: 0 = differential, 1 = signle-ended */
94#define CS_COEF_ADC_MIC_PGA_MODE (1 << 5) /* PGA setup for mic */
95#define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */
96#define IDX_DAC_CFG 0x0003
97/* SZC bitmask, 4 modes below:
98 * 0 = Immediate
99 * 1 = zero-cross
100 * 2 = soft-ramp
101 * 3 = soft-ramp on zero-cross
102 */
103#define CS_COEF_DAC_HP_SZC_MODE (3 << 0) /* nid 0x02 */
104#define CS_COEF_DAC_LO_SZC_MODE (3 << 2) /* nid 0x03 */
105#define CS_COEF_DAC_SPK_SZC_MODE (3 << 4) /* nid 0x04 */
106
107#define IDX_BEEP_CFG 0x0004
108/* 0x0008 - test reg key */
109/* 0x0009 - 0x0014 -> 12 test regs */
110/* 0x0015 - visibility reg */
111
56487c27
TH		 112/*
113 * Cirrus Logic CS4210
114 *
115 * 1 DAC => HP(sense) / Speakers,
116 * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
117 * 1 SPDIF OUT => SPDIF Trasmitter(sense)
118*/
119#define CS4210_DAC_NID 0x02
120#define CS4210_ADC_NID 0x03
5660ffd0 121#define CS4210_VENDOR_NID 0x0B
56487c27
TH		 122#define CS421X_DMIC_PIN_NID 0x09 /* Port E */
123#define CS421X_SPDIF_PIN_NID 0x0A /* Port H */
124
1077a024
TI		 125#define CS421X_IDX_DEV_CFG 0x01
126#define CS421X_IDX_ADC_CFG 0x02
127#define CS421X_IDX_DAC_CFG 0x03
128#define CS421X_IDX_SPK_CTL 0x04
e5f14248 129
1077a024 130#define SPDIF_EVENT 0x04
6a92934d 131
1077a024
TI		 132/* Cirrus Logic CS4213 is like CS4210 but does not have SPDIF input/output */
133#define CS4213_VENDOR_NID 0x09
e5f14248 134
21a4dc43 135
1077a024 136static inline int cs_vendor_coef_get(struct hda_codec *codec, unsigned int idx)
e5f14248
TI		 137{
138 struct cs_spec *spec = codec->spec;
1077a024
TI		 139 snd_hda_codec_write(codec, spec->vendor_nid, 0,
140 AC_VERB_SET_COEF_INDEX, idx);
141 return snd_hda_codec_read(codec, spec->vendor_nid, 0,
142 AC_VERB_GET_PROC_COEF, 0);
e5f14248
TI		 143}
144
1077a024
TI		 145static inline void cs_vendor_coef_set(struct hda_codec *codec, unsigned int idx,
146 unsigned int coef)
e5f14248
TI		 147{
148 struct cs_spec *spec = codec->spec;
1077a024
TI		 149 snd_hda_codec_write(codec, spec->vendor_nid, 0,
150 AC_VERB_SET_COEF_INDEX, idx);
151 snd_hda_codec_write(codec, spec->vendor_nid, 0,
152 AC_VERB_SET_PROC_COEF, coef);
e5f14248
TI		 153}
154
21a4dc43
TI		 155/*
156 * auto-mute and auto-mic switching
56487c27
TH		 157 * CS421x auto-output redirecting
158 * HP/SPK/SPDIF
21a4dc43
TI		 159 */
160
1077a024 161static void cs_automute(struct hda_codec *codec)
e5f14248
TI		 162{
163 struct cs_spec *spec = codec->spec;
e5f14248 164
1077a024
TI		 165 /* mute HPs if spdif jack (SENSE_B) is present */
166 spec->gen.master_mute = !!(spec->spdif_present && spec->sense_b);
56487c27 167
1077a024 168 snd_hda_gen_update_outputs(codec);
78e2a928 169
6dfeb703 170 if (spec->gpio_eapd_hp) {
039eb753 171 spec->gpio_data = spec->gen.hp_jack_present ?
6dfeb703 172 spec->gpio_eapd_hp : spec->gpio_eapd_speaker;
3a385167 173 snd_hda_codec_write(codec, 0x01, 0,
039eb753 174 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
3a385167 175 }
e5f14248
TI		 176}
177
1077a024 178static bool is_active_pin(struct hda_codec *codec, hda_nid_t nid)
e5f14248 179{
1077a024
TI		 180 unsigned int val;
181 val = snd_hda_codec_get_pincfg(codec, nid);
182 return (get_defcfg_connect(val) != AC_JACK_PORT_NONE);
e5f14248
TI		 183}
184
1077a024 185static void init_input_coef(struct hda_codec *codec)
e5f14248
TI		 186{
187 struct cs_spec *spec = codec->spec;
40c20fa0 188 unsigned int coef;
e5f14248 189
5660ffd0
DH		 190 /* CS420x has multiple ADC, CS421x has single ADC */
191 if (spec->vendor_nid == CS420X_VENDOR_NID) {
16337e02 192 coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG);
56487c27 193 if (is_active_pin(codec, CS_DMIC2_PIN_NID))
16337e02 194 coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */
56487c27 195 if (is_active_pin(codec, CS_DMIC1_PIN_NID))
16337e02 196 coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off
56487c27
TH		 197 * No effect if SPDIF_OUT2 is
198 * selected in IDX_SPDIF_CTL.
199 */
16337e02
DB		 200
201 cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
56487c27 202 }
40c20fa0
TI		 203}
204
c42d4782 205static const struct hda_verb cs_coef_init_verbs[] = {
40c20fa0
TI		 206 {0x11, AC_VERB_SET_PROC_STATE, 1},
207 {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},
208 {0x11, AC_VERB_SET_PROC_COEF,
209 (0x002a /* DAC1/2/3 SZCMode Soft Ramp */
210 | 0x0040 /* Mute DACs on FIFO error */
211 | 0x1000 /* Enable DACs High Pass Filter */
212 | 0x0400 /* Disable Coefficient Auto increment */
213 )},
829e87e0
TI		 214 /* ADC1/2 - Digital and Analog Soft Ramp */
215 {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
216 {0x11, AC_VERB_SET_PROC_COEF, 0x000a},
40c20fa0 217 /* Beep */
5a83b4b5 218 {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
40c20fa0
TI		 219 {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
220
221 {} /* terminator */
222};
223
a769cbcf
BA		 224/* Errata: CS4207 rev C0/C1/C2 Silicon
225 *
226 * http://www.cirrus.com/en/pubs/errata/ER880C3.pdf
227 *
228 * 6. At high temperature (TA > +85°C), the digital supply current (IVD)
229 * may be excessive (up to an additional 200 μA), which is most easily
230 * observed while the part is being held in reset (RESET# active low).
231 *
232 * Root Cause: At initial powerup of the device, the logic that drives
233 * the clock and write enable to the S/PDIF SRC RAMs is not properly
234 * initialized.
235 * Certain random patterns will cause a steady leakage current in those
236 * RAM cells. The issue will resolve once the SRCs are used (turned on).
237 *
238 * Workaround: The following verb sequence briefly turns on the S/PDIF SRC
239 * blocks, which will alleviate the issue.
240 */
241
c42d4782 242static const struct hda_verb cs_errata_init_verbs[] = {
a769cbcf
BA		 243 {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
244 {0x11, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
245
246 {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
247 {0x11, AC_VERB_SET_PROC_COEF, 0x9999},
248 {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
249 {0x11, AC_VERB_SET_PROC_COEF, 0xa412},
250 {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
251 {0x11, AC_VERB_SET_PROC_COEF, 0x0009},
252
253 {0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */
254 {0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */
255
256 {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
257 {0x11, AC_VERB_SET_PROC_COEF, 0x2412},
258 {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
259 {0x11, AC_VERB_SET_PROC_COEF, 0x0000},
260 {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
261 {0x11, AC_VERB_SET_PROC_COEF, 0x0008},
262 {0x11, AC_VERB_SET_PROC_STATE, 0x00},
263
38c07641 264#if 0 /* Don't to set to D3 as we are in power-up sequence */
a769cbcf
BA		 265 {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */
266 {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */
267 /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */
38c07641 268#endif
a769cbcf
BA		 269
270 {} /* terminator */
271};
272
40c20fa0 273/* SPDIF setup */
1077a024 274static void init_digital_coef(struct hda_codec *codec)
40c20fa0
TI		 275{
276 unsigned int coef;
277
278 coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */
279 coef |= 0x0008; /* Replace with mute on error */
280 if (is_active_pin(codec, CS_DIG_OUT2_PIN_NID))
281 coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2
282 * SPDIF_OUT2 is shared with GPIO1 and
283 * DMIC_SDA2.
284 */
285 cs_vendor_coef_set(codec, IDX_SPDIF_CTL, coef);
e5f14248
TI		 286}
287
288static int cs_init(struct hda_codec *codec)
289{
290 struct cs_spec *spec = codec->spec;
291
a769cbcf
BA		 292 /* init_verb sequence for C0/C1/C2 errata*/
293 snd_hda_sequence_write(codec, cs_errata_init_verbs);
294
40c20fa0 295 snd_hda_sequence_write(codec, cs_coef_init_verbs);
ed208255 296
1077a024 297 snd_hda_gen_init(codec);
98415eac 298
ed208255
TI		 299 if (spec->gpio_mask) {
300 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
301 spec->gpio_mask);
302 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
303 spec->gpio_dir);
304 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
305 spec->gpio_data);
306 }
307
1077a024
TI		 308 init_input_coef(codec);
309 init_digital_coef(codec);
01a61e12
TI		 310
311 return 0;
e5f14248
TI		 312}
313
1077a024 314#define cs_free snd_hda_gen_free
e5f14248 315
c42d4782 316static const struct hda_codec_ops cs_patch_ops = {
1077a024
TI		 317 .build_controls = snd_hda_gen_build_controls,
318 .build_pcms = snd_hda_gen_build_pcms,
e5f14248
TI		 319 .init = cs_init,
320 .free = cs_free,
5c2e4e0a 321 .unsol_event = snd_hda_jack_unsol_event,
e5f14248
TI		 322};
323
324static int cs_parse_auto_config(struct hda_codec *codec)
325{
326 struct cs_spec *spec = codec->spec;
327 int err;
328
1077a024 329 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
ed208255
TI		 330 if (err < 0)
331 return err;
332
1077a024 333 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
e5f14248
TI		 334 if (err < 0)
335 return err;
1077a024 336
e5f14248
TI		 337 return 0;
338}
339
b35aabd7
TI		 340static const struct hda_model_fixup cs420x_models[] = {
341 { .id = CS420X_MBP53, .name = "mbp53" },
342 { .id = CS420X_MBP55, .name = "mbp55" },
343 { .id = CS420X_IMAC27, .name = "imac27" },
344 { .id = CS420X_IMAC27_122, .name = "imac27_122" },
345 { .id = CS420X_APPLE, .name = "apple" },
ef596a57 346 { .id = CS420X_MBP101, .name = "mbp101" },
ffe4d12b 347 { .id = CS420X_MBP81, .name = "mbp81" },
b35aabd7 348 {}
a6bae205
TI		 349};
350
b35aabd7 351static const struct snd_pci_quirk cs420x_fixup_tbl[] = {
4e7d7c60 352 SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53),
87232dd4 353 SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
a6bae205 354 SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
f46119b7 355 SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
6dfeb703
TI		 356 /* this conflicts with too many other models */
357 /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/
6dfeb703 358
b35aabd7 359 /* codec SSID */
ffe4d12b 360 SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
7e5bea19 361 SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
ef596a57 362 SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
6dfeb703 363 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
a6bae205
TI		 364 {} /* terminator */
365};
366
b35aabd7 367static const struct hda_pintbl mbp53_pincfgs[] = {
4e7d7c60
VW		 368 { 0x09, 0x012b4050 },
369 { 0x0a, 0x90100141 },
370 { 0x0b, 0x90100140 },
371 { 0x0c, 0x018b3020 },
372 { 0x0d, 0x90a00110 },
373 { 0x0e, 0x400000f0 },
374 { 0x0f, 0x01cbe030 },
375 { 0x10, 0x014be060 },
376 { 0x12, 0x400000f0 },
377 { 0x15, 0x400000f0 },
378 {} /* terminator */
379};
380
b35aabd7 381static const struct hda_pintbl mbp55_pincfgs[] = {
a6bae205
TI		 382 { 0x09, 0x012b4030 },
383 { 0x0a, 0x90100121 },
384 { 0x0b, 0x90100120 },
385 { 0x0c, 0x400000f0 },
386 { 0x0d, 0x90a00110 },
387 { 0x0e, 0x400000f0 },
388 { 0x0f, 0x400000f0 },
389 { 0x10, 0x014be040 },
390 { 0x12, 0x400000f0 },
391 { 0x15, 0x400000f0 },
392 {} /* terminator */
393};
394
b35aabd7 395static const struct hda_pintbl imac27_pincfgs[] = {
1a5ba2e9
RAE		 396 { 0x09, 0x012b4050 },
397 { 0x0a, 0x90100140 },
398 { 0x0b, 0x90100142 },
399 { 0x0c, 0x018b3020 },
400 { 0x0d, 0x90a00110 },
401 { 0x0e, 0x400000f0 },
402 { 0x0f, 0x01cbe030 },
403 { 0x10, 0x014be060 },
404 { 0x12, 0x01ab9070 },
405 { 0x15, 0x400000f0 },
406 {} /* terminator */
407};
408
ef596a57
TI		 409static const struct hda_pintbl mbp101_pincfgs[] = {
410 { 0x0d, 0x40ab90f0 },
411 { 0x0e, 0x90a600f0 },
412 { 0x12, 0x50a600f0 },
413 {} /* terminator */
414};
415
b35aabd7
TI		 416static void cs420x_fixup_gpio_13(struct hda_codec *codec,
417 const struct hda_fixup *fix, int action)
418{
419 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
420 struct cs_spec *spec = codec->spec;
421 spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */
422 spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
423 spec->gpio_mask = spec->gpio_dir =
424 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
425 }
426}
a6bae205 427
b35aabd7
TI		 428static void cs420x_fixup_gpio_23(struct hda_codec *codec,
429 const struct hda_fixup *fix, int action)
a6bae205 430{
b35aabd7
TI		 431 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
432 struct cs_spec *spec = codec->spec;
433 spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */
434 spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
435 spec->gpio_mask = spec->gpio_dir =
436 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
437 }
a6bae205
TI		 438}
439
b35aabd7
TI		 440static const struct hda_fixup cs420x_fixups[] = {
441 [CS420X_MBP53] = {
442 .type = HDA_FIXUP_PINS,
443 .v.pins = mbp53_pincfgs,
444 .chained = true,
445 .chain_id = CS420X_APPLE,
446 },
447 [CS420X_MBP55] = {
448 .type = HDA_FIXUP_PINS,
449 .v.pins = mbp55_pincfgs,
450 .chained = true,
451 .chain_id = CS420X_GPIO_13,
452 },
453 [CS420X_IMAC27] = {
454 .type = HDA_FIXUP_PINS,
455 .v.pins = imac27_pincfgs,
456 .chained = true,
457 .chain_id = CS420X_GPIO_13,
458 },
459 [CS420X_GPIO_13] = {
460 .type = HDA_FIXUP_FUNC,
461 .v.func = cs420x_fixup_gpio_13,
462 },
463 [CS420X_GPIO_23] = {
464 .type = HDA_FIXUP_FUNC,
465 .v.func = cs420x_fixup_gpio_23,
466 },
ef596a57
TI		 467 [CS420X_MBP101] = {
468 .type = HDA_FIXUP_PINS,
469 .v.pins = mbp101_pincfgs,
470 .chained = true,
ef596a57
TI		 471 .chain_id = CS420X_GPIO_13,
472 },
ffe4d12b
TI		 473 [CS420X_MBP81] = {
474 .type = HDA_FIXUP_VERBS,
475 .v.verbs = (const struct hda_verb[]) {
476 /* internal mic ADC2: right only, single ended */
477 {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
478 {0x11, AC_VERB_SET_PROC_COEF, 0x102a},
479 {}
480 },
481 .chained = true,
482 .chain_id = CS420X_GPIO_13,
483 },
b35aabd7
TI		 484};
485
1077a024 486static struct cs_spec *cs_alloc_spec(struct hda_codec *codec, int vendor_nid)
e5f14248
TI		 487{
488 struct cs_spec *spec;
e5f14248
TI		 489
490 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
491 if (!spec)
1077a024 492 return NULL;
e5f14248 493 codec->spec = spec;
1077a024
TI		 494 spec->vendor_nid = vendor_nid;
495 snd_hda_gen_spec_init(&spec->gen);
496
497 return spec;
498}
499
500static int patch_cs420x(struct hda_codec *codec)
501{
502 struct cs_spec *spec;
503 int err;
e5f14248 504
1077a024
TI		 505 spec = cs_alloc_spec(codec, CS420X_VENDOR_NID);
506 if (!spec)
507 return -ENOMEM;
56487c27 508
6d3073e1
TI		 509 spec->gen.automute_hook = cs_automute;
510
b35aabd7
TI		 511 snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl,
512 cs420x_fixups);
513 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
e5f14248 514
ed208255 515 err = cs_parse_auto_config(codec);
21a4dc43
TI		 516 if (err < 0)
517 goto error;
518
e5f14248
TI		 519 codec->patch_ops = cs_patch_ops;
520
b35aabd7
TI		 521 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
522
e5f14248
TI		 523 return 0;
524
525 error:
c5e0b6db 526 cs_free(codec);
e5f14248
TI		 527 return err;
528}
529
56487c27
TH		 530/*
531 * Cirrus Logic CS4210
532 *
533 * 1 DAC => HP(sense) / Speakers,
534 * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
535 * 1 SPDIF OUT => SPDIF Trasmitter(sense)
536*/
537
538/* CS4210 board names */
b35aabd7
TI		 539static const struct hda_model_fixup cs421x_models[] = {
540 { .id = CS421X_CDB4210, .name = "cdb4210" },
541 {}
56487c27
TH		 542};
543
b35aabd7 544static const struct snd_pci_quirk cs421x_fixup_tbl[] = {
56487c27
TH		 545 /* Test Intel board + CDB2410 */
546 SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210),
547 {} /* terminator */
548};
549
550/* CS4210 board pinconfigs */
551/* Default CS4210 (CDB4210)*/
b35aabd7 552static const struct hda_pintbl cdb4210_pincfgs[] = {
56487c27
TH		 553 { 0x05, 0x0321401f },
554 { 0x06, 0x90170010 },
555 { 0x07, 0x03813031 },
556 { 0x08, 0xb7a70037 },
557 { 0x09, 0xb7a6003e },
558 { 0x0a, 0x034510f0 },
559 {} /* terminator */
560};
561
b35aabd7
TI		 562/* Setup GPIO/SENSE for each board (if used) */
563static void cs421x_fixup_sense_b(struct hda_codec *codec,
564 const struct hda_fixup *fix, int action)
565{
566 struct cs_spec *spec = codec->spec;
567 if (action == HDA_FIXUP_ACT_PRE_PROBE)
568 spec->sense_b = 1;
569}
570
571static const struct hda_fixup cs421x_fixups[] = {
572 [CS421X_CDB4210] = {
573 .type = HDA_FIXUP_PINS,
574 .v.pins = cdb4210_pincfgs,
575 .chained = true,
576 .chain_id = CS421X_SENSE_B,
577 },
578 [CS421X_SENSE_B] = {
579 .type = HDA_FIXUP_FUNC,
580 .v.func = cs421x_fixup_sense_b,
581 }
56487c27
TH		 582};
583
584static const struct hda_verb cs421x_coef_init_verbs[] = {
585 {0x0B, AC_VERB_SET_PROC_STATE, 1},
586 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
587 /*
588 Disable Coefficient Index Auto-Increment(DAI)=1,
589 PDREF=0
590 */
591 {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
592
593 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG},
594 /* ADC SZCMode = Digital Soft Ramp */
595 {0x0B, AC_VERB_SET_PROC_COEF, 0x0002 },
596
597 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG},
598 {0x0B, AC_VERB_SET_PROC_COEF,
599 (0x0002 /* DAC SZCMode = Digital Soft Ramp */
600 | 0x0004 /* Mute DAC on FIFO error */
601 | 0x0008 /* Enable DAC High Pass Filter */
602 )},
603 {} /* terminator */
604};
605
606/* Errata: CS4210 rev A1 Silicon
607 *
608 * http://www.cirrus.com/en/pubs/errata/
609 *
610 * Description:
611 * 1. Performance degredation is present in the ADC.
612 * 2. Speaker output is not completely muted upon HP detect.
613 * 3. Noise is present when clipping occurs on the amplified
614 * speaker outputs.
615 *
616 * Workaround:
617 * The following verb sequence written to the registers during
618 * initialization will correct the issues listed above.
619 */
620
621static const struct hda_verb cs421x_coef_init_verbs_A1_silicon_fixes[] = {
622 {0x0B, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
623
624 {0x0B, AC_VERB_SET_COEF_INDEX, 0x0006},
625 {0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */
626
627 {0x0B, AC_VERB_SET_COEF_INDEX, 0x000A},
628 {0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */
629
630 {0x0B, AC_VERB_SET_COEF_INDEX, 0x0011},
631 {0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */
632
633 {0x0B, AC_VERB_SET_COEF_INDEX, 0x001A},
634 {0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */
635
636 {0x0B, AC_VERB_SET_COEF_INDEX, 0x001B},
637 {0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */
638
639 {} /* terminator */
640};
641
642/* Speaker Amp Gain is controlled by the vendor widget's coef 4 */
643static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0);
644
645static int cs421x_boost_vol_info(struct snd_kcontrol *kcontrol,
646 struct snd_ctl_elem_info *uinfo)
647{
648 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
649 uinfo->count = 1;
650 uinfo->value.integer.min = 0;
651 uinfo->value.integer.max = 3;
652 return 0;
653}
654
655static int cs421x_boost_vol_get(struct snd_kcontrol *kcontrol,
656 struct snd_ctl_elem_value *ucontrol)
657{
658 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
659
660 ucontrol->value.integer.value[0] =
661 cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003;
662 return 0;
663}
664
665static int cs421x_boost_vol_put(struct snd_kcontrol *kcontrol,
666 struct snd_ctl_elem_value *ucontrol)
667{
668 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
669
670 unsigned int vol = ucontrol->value.integer.value[0];
671 unsigned int coef =
672 cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL);
673 unsigned int original_coef = coef;
674
675 coef &= ~0x0003;
676 coef |= (vol & 0x0003);
677 if (original_coef == coef)
678 return 0;
679 else {
680 cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef);
681 return 1;
682 }
683}
684
1077a024 685static const struct snd_kcontrol_new cs421x_speaker_boost_ctl = {
56487c27
TH		 686
687 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
688 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
689 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
690 .name = "Speaker Boost Playback Volume",
691 .info = cs421x_boost_vol_info,
692 .get = cs421x_boost_vol_get,
693 .put = cs421x_boost_vol_put,
694 .tlv = { .p = cs421x_speaker_boost_db_scale },
695};
696
5660ffd0 697static void cs4210_pinmux_init(struct hda_codec *codec)
56487c27
TH		 698{
699 struct cs_spec *spec = codec->spec;
700 unsigned int def_conf, coef;
701
702 /* GPIO, DMIC_SCL, DMIC_SDA and SENSE_B are multiplexed */
703 coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
704
705 if (spec->gpio_mask)
706 coef |= 0x0008; /* B1,B2 are GPIOs */
707 else
708 coef &= ~0x0008;
709
710 if (spec->sense_b)
711 coef |= 0x0010; /* B2 is SENSE_B, not inverted */
712 else
713 coef &= ~0x0010;
714
715 cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
716
717 if ((spec->gpio_mask || spec->sense_b) &&
718 is_active_pin(codec, CS421X_DMIC_PIN_NID)) {
719
720 /*
721 GPIO or SENSE_B forced - disconnect the DMIC pin.
722 */
723 def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID);
724 def_conf &= ~AC_DEFCFG_PORT_CONN;
725 def_conf |= (AC_JACK_PORT_NONE << AC_DEFCFG_PORT_CONN_SHIFT);
726 snd_hda_codec_set_pincfg(codec, CS421X_DMIC_PIN_NID, def_conf);
727 }
728}
729
1077a024
TI		 730static void cs4210_spdif_automute(struct hda_codec *codec,
731 struct hda_jack_tbl *tbl)
56487c27
TH		 732{
733 struct cs_spec *spec = codec->spec;
1077a024
TI		 734 bool spdif_present = false;
735 hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0];
736
737 /* detect on spdif is specific to CS4210 */
738 if (!spec->spdif_detect ||
739 spec->vendor_nid != CS4210_VENDOR_NID)
740 return;
741
742 spdif_present = snd_hda_jack_detect(codec, spdif_pin);
743 if (spdif_present == spec->spdif_present)
744 return;
745
746 spec->spdif_present = spdif_present;
747 /* SPDIF TX on/off */
748 if (spdif_present)
749 snd_hda_set_pin_ctl(codec, spdif_pin,
750 spdif_present ? PIN_OUT : 0);
56487c27 751
1077a024
TI		 752 cs_automute(codec);
753}
754
755static void parse_cs421x_digital(struct hda_codec *codec)
756{
757 struct cs_spec *spec = codec->spec;
758 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
759 int i;
56487c27
TH		 760
761 for (i = 0; i < cfg->dig_outs; i++) {
762 hda_nid_t nid = cfg->dig_out_pins[i];
56487c27 763 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
56487c27 764 spec->spdif_detect = 1;
1077a024
TI		 765 snd_hda_jack_detect_enable_callback(codec, nid,
766 SPDIF_EVENT,
767 cs4210_spdif_automute);
56487c27
TH		 768 }
769 }
770}
771
772static int cs421x_init(struct hda_codec *codec)
773{
774 struct cs_spec *spec = codec->spec;
775
5660ffd0
DH		 776 if (spec->vendor_nid == CS4210_VENDOR_NID) {
777 snd_hda_sequence_write(codec, cs421x_coef_init_verbs);
778 snd_hda_sequence_write(codec, cs421x_coef_init_verbs_A1_silicon_fixes);
779 cs4210_pinmux_init(codec);
780 }
56487c27 781
1077a024
TI		 782 snd_hda_gen_init(codec);
783
56487c27
TH		 784 if (spec->gpio_mask) {
785 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
786 spec->gpio_mask);
787 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
788 spec->gpio_dir);
789 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
790 spec->gpio_data);
791 }
792
1077a024 793 init_input_coef(codec);
56487c27 794
1077a024 795 cs4210_spdif_automute(codec, NULL);
56487c27
TH		 796
797 return 0;
798}
799
1077a024 800static int cs421x_build_controls(struct hda_codec *codec)
56487c27 801{
56487c27 802 struct cs_spec *spec = codec->spec;
56487c27 803 int err;
56487c27 804
1077a024 805 err = snd_hda_gen_build_controls(codec);
56487c27
TH		 806 if (err < 0)
807 return err;
56487c27 808
1077a024
TI		 809 if (spec->gen.autocfg.speaker_outs &&
810 spec->vendor_nid == CS4210_VENDOR_NID) {
56487c27 811 err = snd_hda_ctl_add(codec, 0,
1077a024 812 snd_ctl_new1(&cs421x_speaker_boost_ctl, codec));
56487c27
TH		 813 if (err < 0)
814 return err;
815 }
01a61e12 816 return 0;
56487c27
TH		 817}
818
1077a024 819static void fix_volume_caps(struct hda_codec *codec, hda_nid_t dac)
56487c27 820{
1077a024 821 unsigned int caps;
56487c27 822
1077a024
TI		 823 /* set the upper-limit for mixer amp to 0dB */
824 caps = query_amp_caps(codec, dac, HDA_OUTPUT);
825 caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT);
826 caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f)
827 << AC_AMPCAP_NUM_STEPS_SHIFT;
828 snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps);
56487c27
TH		 829}
830
831static int cs421x_parse_auto_config(struct hda_codec *codec)
832{
833 struct cs_spec *spec = codec->spec;
1077a024 834 hda_nid_t dac = CS4210_DAC_NID;
56487c27
TH		 835 int err;
836
1077a024
TI		 837 fix_volume_caps(codec, dac);
838
839 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
56487c27
TH		 840 if (err < 0)
841 return err;
1077a024
TI		 842
843 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
56487c27
TH		 844 if (err < 0)
845 return err;
1077a024
TI		 846
847 parse_cs421x_digital(codec);
56487c27
TH		 848 return 0;
849}
850
851#ifdef CONFIG_PM
852/*
853 Manage PDREF, when transitioning to D3hot
854 (DAC,ADC) -> D3, PDREF=1, AFG->D3
855*/
68cb2b55 856static int cs421x_suspend(struct hda_codec *codec)
56487c27 857{
5660ffd0 858 struct cs_spec *spec = codec->spec;
56487c27
TH		 859 unsigned int coef;
860
861 snd_hda_shutup_pins(codec);
862
863 snd_hda_codec_write(codec, CS4210_DAC_NID, 0,
864 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
865 snd_hda_codec_write(codec, CS4210_ADC_NID, 0,
866 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
867
5660ffd0
DH		 868 if (spec->vendor_nid == CS4210_VENDOR_NID) {
869 coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
870 coef |= 0x0004; /* PDREF */
871 cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
872 }
56487c27
TH		 873
874 return 0;
875}
876#endif
877
00e17f76 878static const struct hda_codec_ops cs421x_patch_ops = {
56487c27 879 .build_controls = cs421x_build_controls,
1077a024 880 .build_pcms = snd_hda_gen_build_pcms,
56487c27
TH		 881 .init = cs421x_init,
882 .free = cs_free,
5c2e4e0a 883 .unsol_event = snd_hda_jack_unsol_event,
56487c27
TH		 884#ifdef CONFIG_PM
885 .suspend = cs421x_suspend,
886#endif
887};
888
5660ffd0 889static int patch_cs4210(struct hda_codec *codec)
56487c27
TH		 890{
891 struct cs_spec *spec;
892 int err;
893
1077a024 894 spec = cs_alloc_spec(codec, CS4210_VENDOR_NID);
56487c27
TH		 895 if (!spec)
896 return -ENOMEM;
56487c27 897
6d3073e1
TI		 898 spec->gen.automute_hook = cs_automute;
899
b35aabd7
TI		 900 snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl,
901 cs421x_fixups);
902 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
56487c27
TH		 903
904 /*
905 Update the GPIO/DMIC/SENSE_B pinmux before the configuration
906 is auto-parsed. If GPIO or SENSE_B is forced, DMIC input
907 is disabled.
908 */
5660ffd0 909 cs4210_pinmux_init(codec);
56487c27
TH		 910
911 err = cs421x_parse_auto_config(codec);
912 if (err < 0)
913 goto error;
914
5660ffd0
DH		 915 codec->patch_ops = cs421x_patch_ops;
916
b35aabd7
TI		 917 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
918
5660ffd0
DH		 919 return 0;
920
921 error:
c5e0b6db 922 cs_free(codec);
5660ffd0
DH		 923 return err;
924}
925
926static int patch_cs4213(struct hda_codec *codec)
927{
928 struct cs_spec *spec;
929 int err;
930
1077a024 931 spec = cs_alloc_spec(codec, CS4213_VENDOR_NID);
5660ffd0
DH		 932 if (!spec)
933 return -ENOMEM;
5660ffd0
DH		 934
935 err = cs421x_parse_auto_config(codec);
936 if (err < 0)
937 goto error;
56487c27 938
5660ffd0 939 codec->patch_ops = cs421x_patch_ops;
56487c27
TH		 940 return 0;
941
942 error:
c5e0b6db 943 cs_free(codec);
56487c27
TH		 944 return err;
945}
946
e5f14248
TI		 947
948/*
949 * patch entries
950 */
c42d4782 951static const struct hda_codec_preset snd_hda_preset_cirrus[] = {
e5f14248
TI		 952 { .id = 0x10134206, .name = "CS4206", .patch = patch_cs420x },
953 { .id = 0x10134207, .name = "CS4207", .patch = patch_cs420x },
5660ffd0
DH		 954 { .id = 0x10134210, .name = "CS4210", .patch = patch_cs4210 },
955 { .id = 0x10134213, .name = "CS4213", .patch = patch_cs4213 },
e5f14248
TI		 956 {} /* terminator */
957};
958
959MODULE_ALIAS("snd-hda-codec-id:10134206");
960MODULE_ALIAS("snd-hda-codec-id:10134207");
56487c27 961MODULE_ALIAS("snd-hda-codec-id:10134210");
5660ffd0 962MODULE_ALIAS("snd-hda-codec-id:10134213");
e5f14248
TI		 963
964MODULE_LICENSE("GPL");
965MODULE_DESCRIPTION("Cirrus Logic HD-audio codec");
966
967static struct hda_codec_preset_list cirrus_list = {
968 .preset = snd_hda_preset_cirrus,
969 .owner = THIS_MODULE,
970};
971
972static int __init patch_cirrus_init(void)
973{
974 return snd_hda_add_codec_preset(&cirrus_list);
975}
976
977static void __exit patch_cirrus_exit(void)
978{
979 snd_hda_delete_codec_preset(&cirrus_list);
980}
981
982module_init(patch_cirrus_init)
983module_exit(patch_cirrus_exit)
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