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Merge branch 'tip/perf/core' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt...
[mirror_ubuntu-eoan-kernel.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
da155d5b 32#include <linux/module.h>
2f2f4251 33#include <sound/core.h>
c7d4b2fa 34#include <sound/asoundef.h>
45a6ac16 35#include <sound/jack.h>
a74ccea5 36#include <sound/tlv.h>
2f2f4251
M		 37#include "hda_codec.h"
38#include "hda_local.h"
1cd2224c 39#include "hda_beep.h"
2f2f4251 40
c6e4c666
TI		 41enum {
42 STAC_VREF_EVENT = 1,
43 STAC_INSERT_EVENT,
44 STAC_PWR_EVENT,
45 STAC_HP_EVENT,
fefd67f3 46 STAC_LO_EVENT,
3d21d3f7 47 STAC_MIC_EVENT,
c6e4c666 48};
4e55096e 49
f5fcc13c 50enum {
1607b8ea 51 STAC_AUTO,
f5fcc13c 52 STAC_REF,
bf277785 53 STAC_9200_OQO,
dfe495d0
TI		 54 STAC_9200_DELL_D21,
55 STAC_9200_DELL_D22,
56 STAC_9200_DELL_D23,
57 STAC_9200_DELL_M21,
58 STAC_9200_DELL_M22,
59 STAC_9200_DELL_M23,
60 STAC_9200_DELL_M24,
61 STAC_9200_DELL_M25,
62 STAC_9200_DELL_M26,
63 STAC_9200_DELL_M27,
58eec423
MCC		 64 STAC_9200_M4,
65 STAC_9200_M4_2,
117f257d 66 STAC_9200_PANASONIC,
f5fcc13c
TI		 67 STAC_9200_MODELS
68};
69
70enum {
1607b8ea 71 STAC_9205_AUTO,
f5fcc13c 72 STAC_9205_REF,
dfe495d0 73 STAC_9205_DELL_M42,
ae0a8ed8
TD		 74 STAC_9205_DELL_M43,
75 STAC_9205_DELL_M44,
d9a4268e 76 STAC_9205_EAPD,
f5fcc13c
TI		 77 STAC_9205_MODELS
78};
79
e1f0d669 80enum {
1607b8ea 81 STAC_92HD73XX_AUTO,
9e43f0de 82 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 83 STAC_92HD73XX_REF,
ae709440 84 STAC_92HD73XX_INTEL,
661cd8fb
TI		 85 STAC_DELL_M6_AMIC,
86 STAC_DELL_M6_DMIC,
87 STAC_DELL_M6_BOTH,
6b3ab21e 88 STAC_DELL_EQ,
842ae638 89 STAC_ALIENWARE_M17X,
e1f0d669
MR		 90 STAC_92HD73XX_MODELS
91};
92
d0513fc6 93enum {
1607b8ea 94 STAC_92HD83XXX_AUTO,
d0513fc6 95 STAC_92HD83XXX_REF,
32ed3f46 96 STAC_92HD83XXX_PWR_REF,
8bb0ac55 97 STAC_DELL_S14,
f7f9bdfa 98 STAC_DELL_VOSTRO_3500,
b4e81876 99 STAC_92HD83XXX_HP,
0c27c180 100 STAC_92HD83XXX_HP_cNB11_INTQUAD,
48315590 101 STAC_HP_DV7_4000,
d0513fc6
MR		 102 STAC_92HD83XXX_MODELS
103};
104
e035b841 105enum {
1607b8ea 106 STAC_92HD71BXX_AUTO,
e035b841 107 STAC_92HD71BXX_REF,
a7662640
MR		 108 STAC_DELL_M4_1,
109 STAC_DELL_M4_2,
3a7abfd2 110 STAC_DELL_M4_3,
6a14f585 111 STAC_HP_M4,
2a6ce6e5 112 STAC_HP_DV4,
1b0652eb 113 STAC_HP_DV5,
ae6241fb 114 STAC_HP_HDX,
514bf54c 115 STAC_HP_DV4_1222NR,
e035b841
MR		 116 STAC_92HD71BXX_MODELS
117};
118
8e21c34c 119enum {
1607b8ea 120 STAC_925x_AUTO,
8e21c34c 121 STAC_925x_REF,
9cb36c2a
MCC		 122 STAC_M1,
123 STAC_M1_2,
124 STAC_M2,
8e21c34c 125 STAC_M2_2,
9cb36c2a
MCC		 126 STAC_M3,
127 STAC_M5,
128 STAC_M6,
8e21c34c
TD		 129 STAC_925x_MODELS
130};
131
f5fcc13c 132enum {
1607b8ea 133 STAC_922X_AUTO,
f5fcc13c
TI		 134 STAC_D945_REF,
135 STAC_D945GTP3,
136 STAC_D945GTP5,
5d5d3bc3
IZ		 137 STAC_INTEL_MAC_V1,
138 STAC_INTEL_MAC_V2,
139 STAC_INTEL_MAC_V3,
140 STAC_INTEL_MAC_V4,
141 STAC_INTEL_MAC_V5,
536319af
NB		 142 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
143 * is given, one of the above models will be
144 * chosen according to the subsystem id. */
dfe495d0 145 /* for backward compatibility */
f5fcc13c 146 STAC_MACMINI,
3fc24d85 147 STAC_MACBOOK,
6f0778d8
NB		 148 STAC_MACBOOK_PRO_V1,
149 STAC_MACBOOK_PRO_V2,
f16928fb 150 STAC_IMAC_INTEL,
0dae0f83 151 STAC_IMAC_INTEL_20,
8c650087 152 STAC_ECS_202,
dfe495d0
TI		 153 STAC_922X_DELL_D81,
154 STAC_922X_DELL_D82,
155 STAC_922X_DELL_M81,
156 STAC_922X_DELL_M82,
f5fcc13c
TI		 157 STAC_922X_MODELS
158};
159
160enum {
1607b8ea 161 STAC_927X_AUTO,
e28d8322 162 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 163 STAC_D965_REF,
164 STAC_D965_3ST,
165 STAC_D965_5ST,
679d92ed 166 STAC_D965_5ST_NO_FP,
4ff076e5 167 STAC_DELL_3ST,
8e9068b1 168 STAC_DELL_BIOS,
54930531 169 STAC_927X_VOLKNOB,
f5fcc13c
TI		 170 STAC_927X_MODELS
171};
403d1944 172
307282c8
TI		 173enum {
174 STAC_9872_AUTO,
175 STAC_9872_VAIO,
176 STAC_9872_MODELS
177};
178
74aeaabc
MR		 179struct sigmatel_event {
180 hda_nid_t nid;
c6e4c666
TI		 181 unsigned char type;
182 unsigned char tag;
74aeaabc
MR		 183 int data;
184};
185
3d21d3f7
TI		 186struct sigmatel_mic_route {
187 hda_nid_t pin;
02d33322
TI		 188 signed char mux_idx;
189 signed char dmux_idx;
3d21d3f7
TI		 190};
191
699d8995
VK		 192#define MAX_PINS_NUM 16
193#define MAX_ADCS_NUM 4
194#define MAX_DMICS_NUM 4
195
2f2f4251 196struct sigmatel_spec {
c8b6bf9b 197 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 198 unsigned int num_mixers;
199
403d1944 200 int board_config;
c0cea0d0 201 unsigned int eapd_switch: 1;
c7d4b2fa 202 unsigned int surr_switch: 1;
3cc08dc6 203 unsigned int alt_switch: 1;
82bc955f 204 unsigned int hp_detect: 1;
00ef50c2 205 unsigned int spdif_mute: 1;
7c7767eb 206 unsigned int check_volume_offset:1;
3d21d3f7 207 unsigned int auto_mic:1;
1b0e372d 208 unsigned int linear_tone_beep:1;
c7d4b2fa 209
4fe5195c 210 /* gpio lines */
0fc9dec4 211 unsigned int eapd_mask;
4fe5195c
MR		 212 unsigned int gpio_mask;
213 unsigned int gpio_dir;
214 unsigned int gpio_data;
215 unsigned int gpio_mute;
86d190e7 216 unsigned int gpio_led;
c357aab0 217 unsigned int gpio_led_polarity;
f1a73746 218 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
45eebda7 219 unsigned int vref_led;
4fe5195c 220
8daaaa97
MR		 221 /* stream */
222 unsigned int stream_delay;
223
4fe5195c 224 /* analog loopback */
2b63536f 225 const struct snd_kcontrol_new *aloopback_ctl;
e1f0d669
MR		 226 unsigned char aloopback_mask;
227 unsigned char aloopback_shift;
8259980e 228
a64135a2
MR		 229 /* power management */
230 unsigned int num_pwrs;
2b63536f
TI		 231 const hda_nid_t *pwr_nids;
232 const hda_nid_t *dac_list;
a64135a2 233
74aeaabc
MR		 234 /* events */
235 struct snd_array events;
236
2f2f4251 237 /* playback */
b22b4821
MR		 238 struct hda_input_mux *mono_mux;
239 unsigned int cur_mmux;
2f2f4251 240 struct hda_multi_out multiout;
3cc08dc6 241 hda_nid_t dac_nids[5];
c21ca4a8
TI		 242 hda_nid_t hp_dacs[5];
243 hda_nid_t speaker_dacs[5];
2f2f4251 244
7c7767eb
TI		 245 int volume_offset;
246
2f2f4251 247 /* capture */
2b63536f 248 const hda_nid_t *adc_nids;
2f2f4251 249 unsigned int num_adcs;
2b63536f 250 const hda_nid_t *mux_nids;
dabbed6f 251 unsigned int num_muxes;
2b63536f 252 const hda_nid_t *dmic_nids;
8b65727b 253 unsigned int num_dmics;
2b63536f 254 const hda_nid_t *dmux_nids;
1697055e 255 unsigned int num_dmuxes;
2b63536f 256 const hda_nid_t *smux_nids;
d9737751 257 unsigned int num_smuxes;
5207e10e 258 unsigned int num_analog_muxes;
6479c631 259
2b63536f
TI		 260 const unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
261 const unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
6479c631
TI		 262 unsigned int num_caps; /* number of capture volume/switch elements */
263
3d21d3f7
TI		 264 struct sigmatel_mic_route ext_mic;
265 struct sigmatel_mic_route int_mic;
9907790a 266 struct sigmatel_mic_route dock_mic;
3d21d3f7 267
ea734963 268 const char * const *spdif_labels;
d9737751 269
dabbed6f 270 hda_nid_t dig_in_nid;
b22b4821 271 hda_nid_t mono_nid;
1cd2224c
MR		 272 hda_nid_t anabeep_nid;
273 hda_nid_t digbeep_nid;
2f2f4251 274
2f2f4251 275 /* pin widgets */
2b63536f 276 const hda_nid_t *pin_nids;
2f2f4251 277 unsigned int num_pins;
2f2f4251
M		 278
279 /* codec specific stuff */
2b63536f
TI		 280 const struct hda_verb *init;
281 const struct snd_kcontrol_new *mixer;
2f2f4251
M		 282
283 /* capture source */
8b65727b 284 struct hda_input_mux *dinput_mux;
e1f0d669 285 unsigned int cur_dmux[2];
c7d4b2fa 286 struct hda_input_mux *input_mux;
3cc08dc6 287 unsigned int cur_mux[3];
d9737751
MR		 288 struct hda_input_mux *sinput_mux;
289 unsigned int cur_smux[2];
2a9c7816
MR		 290 unsigned int cur_amux;
291 hda_nid_t *amp_nids;
8daaaa97 292 unsigned int powerdown_adcs;
2f2f4251 293
403d1944
MP		 294 /* i/o switches */
295 unsigned int io_switch[2];
0fb87bb4 296 unsigned int clfe_swap;
c21ca4a8
TI		 297 hda_nid_t line_switch; /* shared line-in for input and output */
298 hda_nid_t mic_switch; /* shared mic-in for input and output */
299 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 300 unsigned int aloopback;
2f2f4251 301
c7d4b2fa
M		 302 struct hda_pcm pcm_rec[2]; /* PCM information */
303
304 /* dynamic controls and input_mux */
305 struct auto_pin_cfg autocfg;
603c4019 306 struct snd_array kctls;
8b65727b 307 struct hda_input_mux private_dimux;
c7d4b2fa 308 struct hda_input_mux private_imux;
d9737751 309 struct hda_input_mux private_smux;
b22b4821 310 struct hda_input_mux private_mono_mux;
699d8995
VK		 311
312 /* auto spec */
313 unsigned auto_pin_cnt;
314 hda_nid_t auto_pin_nids[MAX_PINS_NUM];
315 unsigned auto_adc_cnt;
316 hda_nid_t auto_adc_nids[MAX_ADCS_NUM];
317 hda_nid_t auto_mux_nids[MAX_ADCS_NUM];
318 hda_nid_t auto_dmux_nids[MAX_ADCS_NUM];
319 unsigned long auto_capvols[MAX_ADCS_NUM];
320 unsigned auto_dmic_cnt;
321 hda_nid_t auto_dmic_nids[MAX_DMICS_NUM];
2f2f4251
M		 322};
323
2b63536f 324static const hda_nid_t stac9200_adc_nids[1] = {
2f2f4251
M		 325 0x03,
326};
327
2b63536f 328static const hda_nid_t stac9200_mux_nids[1] = {
2f2f4251
M		 329 0x0c,
330};
331
2b63536f 332static const hda_nid_t stac9200_dac_nids[1] = {
2f2f4251
M		 333 0x02,
334};
335
2b63536f 336static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
a64135a2
MR		 337 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
338 0x0f, 0x10, 0x11
339};
340
2b63536f 341static const hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
0ffa9807
MR		 342 0x26, 0,
343};
344
2b63536f 345static const hda_nid_t stac92hd73xx_adc_nids[2] = {
e1f0d669
MR		 346 0x1a, 0x1b
347};
348
349#define STAC92HD73XX_NUM_DMICS 2
2b63536f 350static const hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
e1f0d669
MR		 351 0x13, 0x14, 0
352};
353
354#define STAC92HD73_DAC_COUNT 5
e1f0d669 355
2b63536f 356static const hda_nid_t stac92hd73xx_mux_nids[2] = {
e2aec171 357 0x20, 0x21,
e1f0d669
MR		 358};
359
2b63536f 360static const hda_nid_t stac92hd73xx_dmux_nids[2] = {
e1f0d669
MR		 361 0x20, 0x21,
362};
363
2b63536f 364static const hda_nid_t stac92hd73xx_smux_nids[2] = {
d9737751
MR		 365 0x22, 0x23,
366};
367
6479c631 368#define STAC92HD73XX_NUM_CAPS 2
2b63536f 369static const unsigned long stac92hd73xx_capvols[] = {
6479c631
TI		 370 HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
371 HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
372};
373#define stac92hd73xx_capsws stac92hd73xx_capvols
374
d0513fc6 375#define STAC92HD83_DAC_COUNT 3
d0513fc6 376
afef2cfa
CC		 377static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
378 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
379 0x0f, 0x10
d0513fc6
MR		 380};
381
2b63536f 382static const hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
0ffa9807
MR		 383 0x1e, 0,
384};
385
2b63536f 386static const hda_nid_t stac92hd83xxx_dmic_nids[] = {
699d8995 387 0x11, 0x20,
ab5a6ebe
VK		 388};
389
2b63536f 390static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
a64135a2
MR		 391 0x0a, 0x0d, 0x0f
392};
393
2b63536f 394static const hda_nid_t stac92hd71bxx_adc_nids[2] = {
e035b841
MR		 395 0x12, 0x13,
396};
397
2b63536f 398static const hda_nid_t stac92hd71bxx_mux_nids[2] = {
e035b841
MR		 399 0x1a, 0x1b
400};
401
2b63536f 402static const hda_nid_t stac92hd71bxx_dmux_nids[2] = {
4b33c767 403 0x1c, 0x1d,
e1f0d669
MR		 404};
405
2b63536f 406static const hda_nid_t stac92hd71bxx_smux_nids[2] = {
d9737751
MR		 407 0x24, 0x25,
408};
409
e035b841 410#define STAC92HD71BXX_NUM_DMICS 2
2b63536f 411static const hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
e035b841
MR		 412 0x18, 0x19, 0
413};
414
2b63536f
TI		 415static const hda_nid_t stac92hd71bxx_dmic_5port_nids[STAC92HD71BXX_NUM_DMICS] = {
416 0x18, 0
417};
418
419static const hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
0ffa9807
MR		 420 0x22, 0
421};
422
6479c631 423#define STAC92HD71BXX_NUM_CAPS 2
2b63536f 424static const unsigned long stac92hd71bxx_capvols[] = {
6479c631
TI		 425 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
426 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
427};
428#define stac92hd71bxx_capsws stac92hd71bxx_capvols
429
2b63536f 430static const hda_nid_t stac925x_adc_nids[1] = {
8e21c34c
TD		 431 0x03,
432};
433
2b63536f 434static const hda_nid_t stac925x_mux_nids[1] = {
8e21c34c
TD		 435 0x0f,
436};
437
2b63536f 438static const hda_nid_t stac925x_dac_nids[1] = {
8e21c34c
TD		 439 0x02,
440};
441
f6e9852a 442#define STAC925X_NUM_DMICS 1
2b63536f 443static const hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
f6e9852a 444 0x15, 0
2c11f955
TD		 445};
446
2b63536f 447static const hda_nid_t stac925x_dmux_nids[1] = {
1697055e
TI		 448 0x14,
449};
450
2b63536f 451static const unsigned long stac925x_capvols[] = {
6479c631
TI		 452 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
453};
2b63536f 454static const unsigned long stac925x_capsws[] = {
6479c631
TI		 455 HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
456};
457
2b63536f 458static const hda_nid_t stac922x_adc_nids[2] = {
2f2f4251
M		 459 0x06, 0x07,
460};
461
2b63536f 462static const hda_nid_t stac922x_mux_nids[2] = {
2f2f4251
M		 463 0x12, 0x13,
464};
465
6479c631 466#define STAC922X_NUM_CAPS 2
2b63536f 467static const unsigned long stac922x_capvols[] = {
6479c631
TI		 468 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
469 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
470};
471#define stac922x_capsws stac922x_capvols
472
2b63536f 473static const hda_nid_t stac927x_slave_dig_outs[2] = {
45c1d85b
MR		 474 0x1f, 0,
475};
476
2b63536f 477static const hda_nid_t stac927x_adc_nids[3] = {
3cc08dc6
MP		 478 0x07, 0x08, 0x09
479};
480
2b63536f 481static const hda_nid_t stac927x_mux_nids[3] = {
3cc08dc6
MP		 482 0x15, 0x16, 0x17
483};
484
2b63536f 485static const hda_nid_t stac927x_smux_nids[1] = {
d9737751
MR		 486 0x21,
487};
488
2b63536f 489static const hda_nid_t stac927x_dac_nids[6] = {
b76c850f
MR		 490 0x02, 0x03, 0x04, 0x05, 0x06, 0
491};
492
2b63536f 493static const hda_nid_t stac927x_dmux_nids[1] = {
e1f0d669
MR		 494 0x1b,
495};
496
7f16859a 497#define STAC927X_NUM_DMICS 2
2b63536f 498static const hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
7f16859a
MR		 499 0x13, 0x14, 0
500};
501
6479c631 502#define STAC927X_NUM_CAPS 3
2b63536f 503static const unsigned long stac927x_capvols[] = {
6479c631
TI		 504 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
505 HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
506 HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
507};
2b63536f 508static const unsigned long stac927x_capsws[] = {
6479c631
TI		 509 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
510 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
511 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
512};
513
ea734963 514static const char * const stac927x_spdif_labels[5] = {
65973632
MR		 515 "Digital Playback", "ADAT", "Analog Mux 1",
516 "Analog Mux 2", "Analog Mux 3"
517};
518
2b63536f 519static const hda_nid_t stac9205_adc_nids[2] = {
f3302a59
MP		 520 0x12, 0x13
521};
522
2b63536f 523static const hda_nid_t stac9205_mux_nids[2] = {
f3302a59
MP		 524 0x19, 0x1a
525};
526
2b63536f 527static const hda_nid_t stac9205_dmux_nids[1] = {
1697055e 528 0x1d,
e1f0d669
MR		 529};
530
2b63536f 531static const hda_nid_t stac9205_smux_nids[1] = {
d9737751
MR		 532 0x21,
533};
534
f6e9852a 535#define STAC9205_NUM_DMICS 2
2b63536f 536static const hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
f6e9852a 537 0x17, 0x18, 0
8b65727b
MP		 538};
539
6479c631 540#define STAC9205_NUM_CAPS 2
2b63536f 541static const unsigned long stac9205_capvols[] = {
6479c631
TI		 542 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
543 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
544};
2b63536f 545static const unsigned long stac9205_capsws[] = {
6479c631
TI		 546 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
547 HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
548};
549
2b63536f 550static const hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 551 0x08, 0x09, 0x0d, 0x0e,
552 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 553};
554
2b63536f 555static const hda_nid_t stac925x_pin_nids[8] = {
8e21c34c
TD		 556 0x07, 0x08, 0x0a, 0x0b,
557 0x0c, 0x0d, 0x10, 0x11,
558};
559
2b63536f 560static const hda_nid_t stac922x_pin_nids[10] = {
2f2f4251
M		 561 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
562 0x0f, 0x10, 0x11, 0x15, 0x1b,
563};
564
2b63536f 565static const hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 566 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
567 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 568 0x14, 0x22, 0x23
e1f0d669
MR		 569};
570
616f89e7 571#define STAC92HD71BXX_NUM_PINS 13
2b63536f 572static const hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
616f89e7
HRK		 573 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
574 0x00, 0x14, 0x18, 0x19, 0x1e,
575 0x1f, 0x20, 0x27
576};
2b63536f 577static const hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR		 578 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
579 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 580 0x1f, 0x20, 0x27
e035b841
MR		 581};
582
2b63536f 583static const hda_nid_t stac927x_pin_nids[14] = {
3cc08dc6
MP		 584 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
585 0x0f, 0x10, 0x11, 0x12, 0x13,
586 0x14, 0x21, 0x22, 0x23,
587};
588
2b63536f 589static const hda_nid_t stac9205_pin_nids[12] = {
f3302a59
MP		 590 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
591 0x0f, 0x14, 0x16, 0x17, 0x18,
592 0x21, 0x22,
f3302a59
MP		 593};
594
8b65727b
MP		 595static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
596 struct snd_ctl_elem_info *uinfo)
597{
598 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
599 struct sigmatel_spec *spec = codec->spec;
600 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
601}
602
603static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
604 struct snd_ctl_elem_value *ucontrol)
605{
606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
607 struct sigmatel_spec *spec = codec->spec;
e1f0d669 608 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 609
e1f0d669 610 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 611 return 0;
612}
613
614static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
615 struct snd_ctl_elem_value *ucontrol)
616{
617 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
618 struct sigmatel_spec *spec = codec->spec;
e1f0d669 619 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 620
621 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 622 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 623}
624
d9737751
MR		 625static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
626 struct snd_ctl_elem_info *uinfo)
627{
628 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
629 struct sigmatel_spec *spec = codec->spec;
630 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
631}
632
633static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
634 struct snd_ctl_elem_value *ucontrol)
635{
636 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
637 struct sigmatel_spec *spec = codec->spec;
638 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
639
640 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
641 return 0;
642}
643
644static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
645 struct snd_ctl_elem_value *ucontrol)
646{
647 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
648 struct sigmatel_spec *spec = codec->spec;
00ef50c2 649 struct hda_input_mux *smux = &spec->private_smux;
d9737751 650 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 651 int err, val;
652 hda_nid_t nid;
d9737751 653
00ef50c2 654 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 655 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 656 if (err < 0)
657 return err;
658
659 if (spec->spdif_mute) {
660 if (smux_idx == 0)
661 nid = spec->multiout.dig_out_nid;
662 else
663 nid = codec->slave_dig_outs[smux_idx - 1];
664 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 665 val = HDA_AMP_MUTE;
00ef50c2 666 else
c9b46f91 667 val = 0;
00ef50c2 668 /* un/mute SPDIF out */
c9b46f91
TI		 669 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
670 HDA_AMP_MUTE, val);
00ef50c2
MR		 671 }
672 return 0;
d9737751
MR		 673}
674
96b63597 675#ifdef CONFIG_SND_HDA_POWER_SAVE
45eebda7
VK		 676static int stac_vrefout_set(struct hda_codec *codec,
677 hda_nid_t nid, unsigned int new_vref)
678{
679 int error, pinctl;
680
681 snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
682 pinctl = snd_hda_codec_read(codec, nid, 0,
683 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
684
685 if (pinctl < 0)
686 return pinctl;
687
688 pinctl &= 0xff;
689 pinctl &= ~AC_PINCTL_VREFEN;
690 pinctl |= (new_vref & AC_PINCTL_VREFEN);
691
692 error = snd_hda_codec_write_cache(codec, nid, 0,
693 AC_VERB_SET_PIN_WIDGET_CONTROL, pinctl);
694 if (error < 0)
695 return error;
696
697 return 1;
698}
96b63597 699#endif
45eebda7 700
2fc99890
NL		 701static unsigned int stac92xx_vref_set(struct hda_codec *codec,
702 hda_nid_t nid, unsigned int new_vref)
703{
b8621516 704 int error;
2fc99890
NL		 705 unsigned int pincfg;
706 pincfg = snd_hda_codec_read(codec, nid, 0,
707 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
708
709 pincfg &= 0xff;
710 pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
711 pincfg |= new_vref;
712
713 if (new_vref == AC_PINCTL_VREF_HIZ)
714 pincfg |= AC_PINCTL_OUT_EN;
715 else
716 pincfg |= AC_PINCTL_IN_EN;
717
718 error = snd_hda_codec_write_cache(codec, nid, 0,
719 AC_VERB_SET_PIN_WIDGET_CONTROL, pincfg);
720 if (error < 0)
721 return error;
722 else
723 return 1;
724}
725
726static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
727{
728 unsigned int vref;
729 vref = snd_hda_codec_read(codec, nid, 0,
730 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
731 vref &= AC_PINCTL_VREFEN;
732 return vref;
733}
734
c8b6bf9b 735static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 736{
737 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
738 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 739 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 740}
741
c8b6bf9b 742static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 743{
744 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
745 struct sigmatel_spec *spec = codec->spec;
746 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
747
748 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
749 return 0;
750}
751
c8b6bf9b 752static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 753{
754 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
755 struct sigmatel_spec *spec = codec->spec;
756 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5207e10e 757 const struct hda_input_mux *imux = spec->input_mux;
094a4245 758 unsigned int idx, prev_idx, didx;
5207e10e
TI		 759
760 idx = ucontrol->value.enumerated.item[0];
761 if (idx >= imux->num_items)
762 idx = imux->num_items - 1;
763 prev_idx = spec->cur_mux[adc_idx];
764 if (prev_idx == idx)
765 return 0;
766 if (idx < spec->num_analog_muxes) {
767 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
768 AC_VERB_SET_CONNECT_SEL,
769 imux->items[idx].index);
094a4245
VK		 770 if (prev_idx >= spec->num_analog_muxes &&
771 spec->mux_nids[adc_idx] != spec->dmux_nids[adc_idx]) {
5207e10e
TI		 772 imux = spec->dinput_mux;
773 /* 0 = analog */
774 snd_hda_codec_write_cache(codec,
775 spec->dmux_nids[adc_idx], 0,
776 AC_VERB_SET_CONNECT_SEL,
777 imux->items[0].index);
778 }
779 } else {
780 imux = spec->dinput_mux;
094a4245
VK		 781 /* first dimux item is hardcoded to select analog imux,
782 * so lets skip it
783 */
784 didx = idx - spec->num_analog_muxes + 1;
5207e10e
TI		 785 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
786 AC_VERB_SET_CONNECT_SEL,
094a4245 787 imux->items[didx].index);
5207e10e
TI		 788 }
789 spec->cur_mux[adc_idx] = idx;
790 return 1;
2f2f4251
M		 791}
792
b22b4821
MR		 793static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
794 struct snd_ctl_elem_info *uinfo)
795{
796 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
797 struct sigmatel_spec *spec = codec->spec;
798 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
799}
800
801static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
802 struct snd_ctl_elem_value *ucontrol)
803{
804 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
805 struct sigmatel_spec *spec = codec->spec;
806
807 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
808 return 0;
809}
810
811static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
812 struct snd_ctl_elem_value *ucontrol)
813{
814 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
815 struct sigmatel_spec *spec = codec->spec;
816
817 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
818 spec->mono_nid, &spec->cur_mmux);
819}
820
5f10c4a9
ML		 821#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
822
823static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
824 struct snd_ctl_elem_value *ucontrol)
825{
826 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 827 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 828 struct sigmatel_spec *spec = codec->spec;
829
e1f0d669
MR		 830 ucontrol->value.integer.value[0] = !!(spec->aloopback &
831 (spec->aloopback_mask << idx));
5f10c4a9
ML		 832 return 0;
833}
834
835static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
836 struct snd_ctl_elem_value *ucontrol)
837{
838 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
839 struct sigmatel_spec *spec = codec->spec;
e1f0d669 840 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 841 unsigned int dac_mode;
e1f0d669 842 unsigned int val, idx_val;
5f10c4a9 843
e1f0d669
MR		 844 idx_val = spec->aloopback_mask << idx;
845 if (ucontrol->value.integer.value[0])
846 val = spec->aloopback | idx_val;
847 else
848 val = spec->aloopback & ~idx_val;
68ea7b2f 849 if (spec->aloopback == val)
5f10c4a9
ML		 850 return 0;
851
68ea7b2f 852 spec->aloopback = val;
5f10c4a9 853
e1f0d669
MR		 854 /* Only return the bits defined by the shift value of the
855 * first two bytes of the mask
856 */
5f10c4a9 857 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 858 kcontrol->private_value & 0xFFFF, 0x0);
859 dac_mode >>= spec->aloopback_shift;
5f10c4a9 860
e1f0d669 861 if (spec->aloopback & idx_val) {
5f10c4a9 862 snd_hda_power_up(codec);
e1f0d669 863 dac_mode |= idx_val;
5f10c4a9
ML		 864 } else {
865 snd_hda_power_down(codec);
e1f0d669 866 dac_mode &= ~idx_val;
5f10c4a9
ML		 867 }
868
869 snd_hda_codec_write_cache(codec, codec->afg, 0,
870 kcontrol->private_value >> 16, dac_mode);
871
872 return 1;
873}
874
2b63536f 875static const struct hda_verb stac9200_core_init[] = {
2f2f4251 876 /* set dac0mux for dac converter */
c7d4b2fa 877 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 878 {}
879};
880
2b63536f 881static const struct hda_verb stac9200_eapd_init[] = {
1194b5b7
TI		 882 /* set dac0mux for dac converter */
883 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
884 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
885 {}
886};
887
2b63536f 888static const struct hda_verb dell_eq_core_init[] = {
d654a660
MR		 889 /* set master volume to max value without distortion
890 * and direct control */
891 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
e1f0d669
MR		 892 {}
893};
894
2b63536f 895static const struct hda_verb stac92hd73xx_core_init[] = {
e1f0d669
MR		 896 /* set master volume and direct control */
897 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 898 {}
899};
900
2b63536f 901static const struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 902 /* power state controls amps */
903 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 904 {}
d0513fc6
MR		 905};
906
2b63536f 907static const struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 908 /* set master volume and direct control */
909 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 910 {}
541eee87
MR		 911};
912
2b63536f 913static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
ca8d33fc
MR		 914 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
915 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 916 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
917 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 918 {}
919};
920
2b63536f 921static const struct hda_verb stac925x_core_init[] = {
8e21c34c
TD		 922 /* set dac0mux for dac converter */
923 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 924 /* mute the master volume */
925 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 926 {}
927};
928
2b63536f 929static const struct hda_verb stac922x_core_init[] = {
2f2f4251 930 /* set master volume and direct control */
c7d4b2fa 931 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 932 {}
933};
934
2b63536f 935static const struct hda_verb d965_core_init[] = {
19039bd0 936 /* set master volume and direct control */
93ed1503 937 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 938 /* unmute node 0x1b */
939 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
940 /* select node 0x03 as DAC */
941 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
942 {}
943};
944
2b63536f 945static const struct hda_verb dell_3st_core_init[] = {
ccca7cdc
TI		 946 /* don't set delta bit */
947 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
948 /* unmute node 0x1b */
949 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
950 /* select node 0x03 as DAC */
951 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
952 {}
953};
954
2b63536f 955static const struct hda_verb stac927x_core_init[] = {
3cc08dc6
MP		 956 /* set master volume and direct control */
957 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 958 /* enable analog pc beep path */
959 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 960 {}
961};
962
2b63536f 963static const struct hda_verb stac927x_volknob_core_init[] = {
54930531
TI		 964 /* don't set delta bit */
965 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
966 /* enable analog pc beep path */
967 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
968 {}
969};
970
2b63536f 971static const struct hda_verb stac9205_core_init[] = {
f3302a59
MP		 972 /* set master volume and direct control */
973 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 974 /* enable analog pc beep path */
975 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 976 {}
977};
978
b22b4821
MR		 979#define STAC_MONO_MUX \
980 { \
981 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
982 .name = "Mono Mux", \
983 .count = 1, \
984 .info = stac92xx_mono_mux_enum_info, \
985 .get = stac92xx_mono_mux_enum_get, \
986 .put = stac92xx_mono_mux_enum_put, \
987 }
988
e1f0d669 989#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 990 { \
991 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
992 .name = "Analog Loopback", \
e1f0d669 993 .count = cnt, \
5f10c4a9
ML		 994 .info = stac92xx_aloopback_info, \
995 .get = stac92xx_aloopback_get, \
996 .put = stac92xx_aloopback_put, \
997 .private_value = verb_read | (verb_write << 16), \
998 }
999
2fc99890
NL		 1000#define DC_BIAS(xname, idx, nid) \
1001 { \
1002 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1003 .name = xname, \
1004 .index = idx, \
1005 .info = stac92xx_dc_bias_info, \
1006 .get = stac92xx_dc_bias_get, \
1007 .put = stac92xx_dc_bias_put, \
1008 .private_value = nid, \
1009 }
1010
2b63536f 1011static const struct snd_kcontrol_new stac9200_mixer[] = {
de8c85f7 1012 HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
2f2f4251 1013 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M		 1014 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1015 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 1016 { } /* end */
1017};
1018
2b63536f 1019static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
d78d7a90
TI		 1020 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1021 {}
1022};
1023
2b63536f 1024static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 1025 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI		 1026 {}
1027};
e1f0d669 1028
2b63536f 1029static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
d78d7a90
TI		 1030 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1031 {}
1032};
1033
d0513fc6 1034
2b63536f 1035static const struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
d78d7a90
TI		 1036 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
1037};
541eee87 1038
2b63536f 1039static const struct snd_kcontrol_new stac925x_mixer[] = {
de8c85f7 1040 HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xe, 0, HDA_OUTPUT),
c9280d68 1041 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
2f2f4251
M		 1042 { } /* end */
1043};
1044
2b63536f 1045static const struct snd_kcontrol_new stac9205_loopback[] = {
d78d7a90
TI		 1046 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
1047 {}
1048};
1049
2b63536f 1050static const struct snd_kcontrol_new stac927x_loopback[] = {
d78d7a90
TI		 1051 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
1052 {}
1053};
1054
1697055e
TI		 1055static struct snd_kcontrol_new stac_dmux_mixer = {
1056 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1057 .name = "Digital Input Source",
1058 /* count set later */
1059 .info = stac92xx_dmux_enum_info,
1060 .get = stac92xx_dmux_enum_get,
1061 .put = stac92xx_dmux_enum_put,
1062};
1063
d9737751
MR		 1064static struct snd_kcontrol_new stac_smux_mixer = {
1065 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1066 .name = "IEC958 Playback Source",
d9737751
MR		 1067 /* count set later */
1068 .info = stac92xx_smux_enum_info,
1069 .get = stac92xx_smux_enum_get,
1070 .put = stac92xx_smux_enum_put,
1071};
1072
ea734963 1073static const char * const slave_vols[] = {
2134ea4f
TI		 1074 "Front Playback Volume",
1075 "Surround Playback Volume",
1076 "Center Playback Volume",
1077 "LFE Playback Volume",
1078 "Side Playback Volume",
1079 "Headphone Playback Volume",
2134ea4f 1080 "Speaker Playback Volume",
2134ea4f
TI		 1081 NULL
1082};
1083
ea734963 1084static const char * const slave_sws[] = {
2134ea4f
TI		 1085 "Front Playback Switch",
1086 "Surround Playback Switch",
1087 "Center Playback Switch",
1088 "LFE Playback Switch",
1089 "Side Playback Switch",
1090 "Headphone Playback Switch",
2134ea4f 1091 "Speaker Playback Switch",
edb54a55 1092 "IEC958 Playback Switch",
2134ea4f
TI		 1093 NULL
1094};
1095
603c4019 1096static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1097static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1098
2f2f4251
M		 1099static int stac92xx_build_controls(struct hda_codec *codec)
1100{
1101 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1102 struct auto_pin_cfg *cfg = &spec->autocfg;
1103 hda_nid_t nid;
2f2f4251 1104 int err;
c7d4b2fa 1105 int i;
2f2f4251 1106
6479c631
TI		 1107 if (spec->mixer) {
1108 err = snd_hda_add_new_ctls(codec, spec->mixer);
1109 if (err < 0)
1110 return err;
1111 }
c7d4b2fa
M		 1112
1113 for (i = 0; i < spec->num_mixers; i++) {
1114 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1115 if (err < 0)
1116 return err;
1117 }
5207e10e
TI		 1118 if (!spec->auto_mic && spec->num_dmuxes > 0 &&
1119 snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
1697055e 1120 stac_dmux_mixer.count = spec->num_dmuxes;
3911a4c1 1121 err = snd_hda_ctl_add(codec, 0,
1697055e
TI		 1122 snd_ctl_new1(&stac_dmux_mixer, codec));
1123 if (err < 0)
1124 return err;
1125 }
d9737751 1126 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1127 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1128 struct hda_input_mux *smux = &spec->private_smux;
1129 /* check for mute support on SPDIF out */
1130 if (wcaps & AC_WCAP_OUT_AMP) {
10a20af7 1131 snd_hda_add_imux_item(smux, "Off", 0, NULL);
00ef50c2
MR		 1132 spec->spdif_mute = 1;
1133 }
d9737751 1134 stac_smux_mixer.count = spec->num_smuxes;
3911a4c1 1135 err = snd_hda_ctl_add(codec, 0,
d9737751
MR		 1136 snd_ctl_new1(&stac_smux_mixer, codec));
1137 if (err < 0)
1138 return err;
1139 }
c7d4b2fa 1140
dabbed6f 1141 if (spec->multiout.dig_out_nid) {
74b654c9
SW		 1142 err = snd_hda_create_spdif_out_ctls(codec,
1143 spec->multiout.dig_out_nid,
1144 spec->multiout.dig_out_nid);
dabbed6f
M		 1145 if (err < 0)
1146 return err;
9a08160b
TI		 1147 err = snd_hda_create_spdif_share_sw(codec,
1148 &spec->multiout);
1149 if (err < 0)
1150 return err;
1151 spec->multiout.share_spdif = 1;
dabbed6f 1152 }
da74ae3e 1153 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1154 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1155 if (err < 0)
1156 return err;
1157 }
2134ea4f
TI		 1158
1159 /* if we have no master control, let's create it */
1160 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1161 unsigned int vmaster_tlv[4];
2134ea4f 1162 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1163 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI		 1164 /* correct volume offset */
1165 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
de8c85f7 1166 /* minimum value is actually mute */
a74ccea5 1167 vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
2134ea4f 1168 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1169 vmaster_tlv, slave_vols);
2134ea4f
TI		 1170 if (err < 0)
1171 return err;
1172 }
1173 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1174 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1175 NULL, slave_sws);
1176 if (err < 0)
1177 return err;
1178 }
1179
d78d7a90
TI		 1180 if (spec->aloopback_ctl &&
1181 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1182 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1183 if (err < 0)
1184 return err;
1185 }
1186
603c4019 1187 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1188
1189 /* create jack input elements */
1190 if (spec->hp_detect) {
1191 for (i = 0; i < cfg->hp_outs; i++) {
1192 int type = SND_JACK_HEADPHONE;
1193 nid = cfg->hp_pins[i];
1194 /* jack detection */
1195 if (cfg->hp_outs == i)
1196 type |= SND_JACK_LINEOUT;
1197 err = stac92xx_add_jack(codec, nid, type);
1198 if (err < 0)
1199 return err;
1200 }
1201 }
1202 for (i = 0; i < cfg->line_outs; i++) {
1203 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1204 SND_JACK_LINEOUT);
1205 if (err < 0)
1206 return err;
1207 }
eea7dc93
TI		 1208 for (i = 0; i < cfg->num_inputs; i++) {
1209 nid = cfg->inputs[i].pin;
1210 err = stac92xx_add_jack(codec, nid, SND_JACK_MICROPHONE);
1211 if (err < 0)
1212 return err;
e4973e1e
TI		 1213 }
1214
dabbed6f 1215 return 0;
2f2f4251
M		 1216}
1217
2b63536f 1218static const unsigned int ref9200_pin_configs[8] = {
dabbed6f 1219 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1220 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1221};
1222
2b63536f 1223static const unsigned int gateway9200_m4_pin_configs[8] = {
58eec423
MCC		 1224 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1225 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1226};
2b63536f 1227static const unsigned int gateway9200_m4_2_pin_configs[8] = {
58eec423
MCC		 1228 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1229 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1230};
1231
1232/*
dfe495d0
TI		 1233 STAC 9200 pin configs for
1234 102801A8
1235 102801DE
1236 102801E8
1237*/
2b63536f 1238static const unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1239 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1240 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1241};
1242
1243/*
1244 STAC 9200 pin configs for
1245 102801C0
1246 102801C1
1247*/
2b63536f 1248static const unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1249 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1250 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1251};
1252
1253/*
1254 STAC 9200 pin configs for
1255 102801C4 (Dell Dimension E310)
1256 102801C5
1257 102801C7
1258 102801D9
1259 102801DA
1260 102801E3
1261*/
2b63536f 1262static const unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1263 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1264 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1265};
1266
1267
1268/*
1269 STAC 9200-32 pin configs for
1270 102801B5 (Dell Inspiron 630m)
1271 102801D8 (Dell Inspiron 640m)
1272*/
2b63536f 1273static const unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1274 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1275 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1276};
1277
1278/*
1279 STAC 9200-32 pin configs for
1280 102801C2 (Dell Latitude D620)
1281 102801C8
1282 102801CC (Dell Latitude D820)
1283 102801D4
1284 102801D6
1285*/
2b63536f 1286static const unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1287 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1288 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1289};
1290
1291/*
1292 STAC 9200-32 pin configs for
1293 102801CE (Dell XPS M1710)
1294 102801CF (Dell Precision M90)
1295*/
2b63536f 1296static const unsigned int dell9200_m23_pin_configs[8] = {
dfe495d0
TI		 1297 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1298 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1299};
1300
1301/*
1302 STAC 9200-32 pin configs for
1303 102801C9
1304 102801CA
1305 102801CB (Dell Latitude 120L)
1306 102801D3
1307*/
2b63536f 1308static const unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1309 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1310 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1311};
1312
1313/*
1314 STAC 9200-32 pin configs for
1315 102801BD (Dell Inspiron E1505n)
1316 102801EE
1317 102801EF
1318*/
2b63536f 1319static const unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1320 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1321 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1322};
1323
1324/*
1325 STAC 9200-32 pin configs for
1326 102801F5 (Dell Inspiron 1501)
1327 102801F6
1328*/
2b63536f 1329static const unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1330 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1331 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1332};
1333
1334/*
1335 STAC 9200-32
1336 102801CD (Dell Inspiron E1705/9400)
1337*/
2b63536f 1338static const unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1339 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1340 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1341};
1342
2b63536f 1343static const unsigned int oqo9200_pin_configs[8] = {
bf277785
TD		 1344 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1345 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1346};
1347
dfe495d0 1348
2b63536f 1349static const unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
f5fcc13c 1350 [STAC_REF] = ref9200_pin_configs,
bf277785 1351 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1352 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1353 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1354 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1355 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1356 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1357 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1358 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1359 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1360 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1361 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1362 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1363 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1364 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1365};
1366
ea734963 1367static const char * const stac9200_models[STAC_9200_MODELS] = {
1607b8ea 1368 [STAC_AUTO] = "auto",
f5fcc13c 1369 [STAC_REF] = "ref",
bf277785 1370 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1371 [STAC_9200_DELL_D21] = "dell-d21",
1372 [STAC_9200_DELL_D22] = "dell-d22",
1373 [STAC_9200_DELL_D23] = "dell-d23",
1374 [STAC_9200_DELL_M21] = "dell-m21",
1375 [STAC_9200_DELL_M22] = "dell-m22",
1376 [STAC_9200_DELL_M23] = "dell-m23",
1377 [STAC_9200_DELL_M24] = "dell-m24",
1378 [STAC_9200_DELL_M25] = "dell-m25",
1379 [STAC_9200_DELL_M26] = "dell-m26",
1380 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1381 [STAC_9200_M4] = "gateway-m4",
1382 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1383 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1384};
1385
2b63536f 1386static const struct snd_pci_quirk stac9200_cfg_tbl[] = {
f5fcc13c
TI		 1387 /* SigmaTel reference board */
1388 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1389 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1390 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1391 "DFI LanParty", STAC_REF),
e7377071 1392 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1393 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1394 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1395 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1396 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1397 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1398 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1399 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1400 "unknown Dell", STAC_9200_DELL_D22),
1401 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1402 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1403 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1404 "Dell Latitude D620", STAC_9200_DELL_M22),
1405 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1406 "unknown Dell", STAC_9200_DELL_D23),
1407 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1408 "unknown Dell", STAC_9200_DELL_D23),
1409 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1410 "unknown Dell", STAC_9200_DELL_M22),
1411 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1412 "unknown Dell", STAC_9200_DELL_M24),
1413 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1414 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1415 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1416 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1417 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1418 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1419 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1420 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1421 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1422 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1423 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1424 "Dell Precision M90", STAC_9200_DELL_M23),
1425 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1426 "unknown Dell", STAC_9200_DELL_M22),
1427 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1428 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1429 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1430 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1431 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1432 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1433 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1434 "unknown Dell", STAC_9200_DELL_D23),
1435 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1436 "unknown Dell", STAC_9200_DELL_D23),
1437 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1438 "unknown Dell", STAC_9200_DELL_D21),
1439 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1440 "unknown Dell", STAC_9200_DELL_D23),
1441 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1442 "unknown Dell", STAC_9200_DELL_D21),
1443 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1444 "unknown Dell", STAC_9200_DELL_M25),
1445 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1446 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1447 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1448 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1449 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1450 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1451 /* Panasonic */
117f257d 1452 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1453 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1454 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1455 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1456 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1457 /* OQO Mobile */
1458 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1459 {} /* terminator */
1460};
1461
2b63536f 1462static const unsigned int ref925x_pin_configs[8] = {
8e21c34c 1463 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1464 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1465};
1466
2b63536f 1467static const unsigned int stac925xM1_pin_configs[8] = {
9cb36c2a
MCC		 1468 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1469 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1470};
1471
2b63536f 1472static const unsigned int stac925xM1_2_pin_configs[8] = {
9cb36c2a
MCC		 1473 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1474 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1475};
58eec423 1476
2b63536f 1477static const unsigned int stac925xM2_pin_configs[8] = {
9cb36c2a
MCC		 1478 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1479 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1480};
1481
2b63536f 1482static const unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1483 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1484 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1485};
1486
2b63536f 1487static const unsigned int stac925xM3_pin_configs[8] = {
9cb36c2a
MCC		 1488 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1489 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1490};
58eec423 1491
2b63536f 1492static const unsigned int stac925xM5_pin_configs[8] = {
9cb36c2a
MCC		 1493 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1494 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1495};
1496
2b63536f 1497static const unsigned int stac925xM6_pin_configs[8] = {
9cb36c2a
MCC		 1498 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1499 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1500};
1501
2b63536f 1502static const unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
8e21c34c 1503 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1504 [STAC_M1] = stac925xM1_pin_configs,
1505 [STAC_M1_2] = stac925xM1_2_pin_configs,
1506 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1507 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1508 [STAC_M3] = stac925xM3_pin_configs,
1509 [STAC_M5] = stac925xM5_pin_configs,
1510 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1511};
1512
ea734963 1513static const char * const stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1514 [STAC_925x_AUTO] = "auto",
8e21c34c 1515 [STAC_REF] = "ref",
9cb36c2a
MCC		 1516 [STAC_M1] = "m1",
1517 [STAC_M1_2] = "m1-2",
1518 [STAC_M2] = "m2",
8e21c34c 1519 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1520 [STAC_M3] = "m3",
1521 [STAC_M5] = "m5",
1522 [STAC_M6] = "m6",
8e21c34c
TD		 1523};
1524
2b63536f 1525static const struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1526 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1527 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1528 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1529 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1530 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1531 /* Not sure about the brand name for those */
1532 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1533 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1534 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1535 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1536 {} /* terminator */
8e21c34c
TD		 1537};
1538
2b63536f 1539static const struct snd_pci_quirk stac925x_cfg_tbl[] = {
8e21c34c
TD		 1540 /* SigmaTel reference board */
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1543 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1544
1545 /* Default table for unknown ID */
1546 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1547
8e21c34c
TD		 1548 {} /* terminator */
1549};
1550
2b63536f 1551static const unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1552 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1553 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1554 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1555 0x01452050,
1556};
1557
2b63536f 1558static const unsigned int dell_m6_pin_configs[13] = {
a7662640 1559 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1560 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1561 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1562 0x4f0000f0,
e1f0d669
MR		 1563};
1564
2b63536f 1565static const unsigned int alienware_m17x_pin_configs[13] = {
842ae638
TI		 1566 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020,
1567 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0,
1568 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1569 0x904601b0,
1570};
1571
2b63536f 1572static const unsigned int intel_dg45id_pin_configs[13] = {
52dc4386 1573 0x02214230, 0x02A19240, 0x01013214, 0x01014210,
4d26f446 1574 0x01A19250, 0x01011212, 0x01016211
52dc4386
OR		 1575};
1576
2b63536f 1577static const unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1578 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1579 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1580 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1581 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1582 [STAC_DELL_EQ] = dell_m6_pin_configs,
842ae638 1583 [STAC_ALIENWARE_M17X] = alienware_m17x_pin_configs,
52dc4386 1584 [STAC_92HD73XX_INTEL] = intel_dg45id_pin_configs,
e1f0d669
MR		 1585};
1586
ea734963 1587static const char * const stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1588 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1589 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1590 [STAC_92HD73XX_REF] = "ref",
ae709440 1591 [STAC_92HD73XX_INTEL] = "intel",
661cd8fb
TI		 1592 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1593 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1594 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1595 [STAC_DELL_EQ] = "dell-eq",
842ae638 1596 [STAC_ALIENWARE_M17X] = "alienware",
e1f0d669
MR		 1597};
1598
2b63536f 1599static const struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
e1f0d669
MR		 1600 /* SigmaTel reference board */
1601 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1602 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1603 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1604 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF		 1605 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1606 "Intel DG45ID", STAC_92HD73XX_INTEL),
1607 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1608 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1609 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1610 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1611 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1612 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1613 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1614 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1615 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1616 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1617 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1618 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1619 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1620 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1621 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1622 "unknown Dell", STAC_DELL_M6_DMIC),
1623 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1624 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1625 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1626 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1628 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1629 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1630 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB		 1631 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1632 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf
DC		 1633 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1634 "Dell Studio XPS 1645", STAC_DELL_M6_BOTH),
5c1bccf6 1635 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
e033ebfb 1636 "Dell Studio 1558", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1637 {} /* terminator */
1638};
1639
2b63536f 1640static const struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
842ae638
TI		 1641 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1642 "Alienware M17x", STAC_ALIENWARE_M17X),
0defe09c
DC		 1643 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1644 "Alienware M17x", STAC_ALIENWARE_M17X),
dbd1b547
TI		 1645 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
1646 "Alienware M17x", STAC_ALIENWARE_M17X),
842ae638
TI		 1647 {} /* terminator */
1648};
1649
2b63536f 1650static const unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR		 1651 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1652 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR		 1653 0x01451160, 0x98560170,
1654};
1655
2b63536f 1656static const unsigned int dell_s14_pin_configs[10] = {
69b5655a
TI		 1657 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110,
1658 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160,
8bb0ac55
MR		 1659 0x40f000f0, 0x40f000f0,
1660};
1661
f7f9bdfa
JW		 1662static const unsigned int dell_vostro_3500_pin_configs[10] = {
1663 0x02a11020, 0x0221101f, 0x400000f0, 0x90170110,
1664 0x400000f1, 0x400000f2, 0x400000f3, 0x90a60160,
1665 0x400000f4, 0x400000f5,
1666};
1667
2b63536f 1668static const unsigned int hp_dv7_4000_pin_configs[10] = {
48315590
SE		 1669 0x03a12050, 0x0321201f, 0x40f000f0, 0x90170110,
1670 0x40f000f0, 0x40f000f0, 0x90170110, 0xd5a30140,
1671 0x40f000f0, 0x40f000f0,
1672};
1673
0c27c180
VK		 1674static const unsigned int hp_cNB11_intquad_pin_configs[10] = {
1675 0x40f000f0, 0x0221101f, 0x02a11020, 0x92170110,
1676 0x40f000f0, 0x92170110, 0x40f000f0, 0xd5a30130,
1677 0x40f000f0, 0x40f000f0,
1678};
1679
2b63536f 1680static const unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
d0513fc6 1681 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1682 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1683 [STAC_DELL_S14] = dell_s14_pin_configs,
f7f9bdfa 1684 [STAC_DELL_VOSTRO_3500] = dell_vostro_3500_pin_configs,
0c27c180 1685 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = hp_cNB11_intquad_pin_configs,
48315590 1686 [STAC_HP_DV7_4000] = hp_dv7_4000_pin_configs,
d0513fc6
MR		 1687};
1688
ea734963 1689static const char * const stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1690 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1691 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1692 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1693 [STAC_DELL_S14] = "dell-s14",
f7f9bdfa 1694 [STAC_DELL_VOSTRO_3500] = "dell-vostro-3500",
b4e81876 1695 [STAC_92HD83XXX_HP] = "hp",
0c27c180 1696 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = "hp_cNB11_intquad",
48315590 1697 [STAC_HP_DV7_4000] = "hp-dv7-4000",
d0513fc6
MR		 1698};
1699
2b63536f 1700static const struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
d0513fc6
MR		 1701 /* SigmaTel reference board */
1702 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1703 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 1704 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1705 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 1706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1707 "unknown Dell", STAC_DELL_S14),
f7f9bdfa
JW		 1708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
1709 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
b4e81876 1710 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x3600,
0c27c180
VK		 1711 "HP", STAC_92HD83XXX_HP),
1712 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
1713 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1714 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
1715 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1716 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
1717 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1718 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
1719 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1720 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
1721 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1722 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
1723 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1724 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
1725 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1726 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
1727 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1728 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
1729 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1730 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
1731 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1732 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
1733 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1734 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
1735 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1736 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
1737 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1738 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
1739 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1740 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
1741 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1742 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
1743 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1744 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
1745 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1746 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
1747 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1748 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
1749 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1750 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
1751 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
574f3c4f 1752 {} /* terminator */
d0513fc6
MR		 1753};
1754
2b63536f 1755static const unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1756 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1757 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK		 1758 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1759 0x00000000
e035b841
MR		 1760};
1761
2b63536f 1762static const unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1763 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1764 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1765 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1766 0x00000000
a7662640
MR		 1767};
1768
2b63536f 1769static const unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR		 1770 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1771 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK		 1772 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1773 0x00000000
a7662640
MR		 1774};
1775
2b63536f 1776static const unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR		 1777 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1778 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1779 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1780 0x00000000
3a7abfd2
MR		 1781};
1782
2b63536f 1783static const unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
e035b841 1784 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1785 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1786 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1787 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1788 [STAC_HP_M4] = NULL,
2a6ce6e5 1789 [STAC_HP_DV4] = NULL,
1b0652eb 1790 [STAC_HP_DV5] = NULL,
ae6241fb 1791 [STAC_HP_HDX] = NULL,
514bf54c 1792 [STAC_HP_DV4_1222NR] = NULL,
e035b841
MR		 1793};
1794
ea734963 1795static const char * const stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1796 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1797 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1798 [STAC_DELL_M4_1] = "dell-m4-1",
1799 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1800 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1801 [STAC_HP_M4] = "hp-m4",
2a6ce6e5 1802 [STAC_HP_DV4] = "hp-dv4",
1b0652eb 1803 [STAC_HP_DV5] = "hp-dv5",
ae6241fb 1804 [STAC_HP_HDX] = "hp-hdx",
514bf54c 1805 [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
e035b841
MR		 1806};
1807
2b63536f 1808static const struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
e035b841
MR		 1809 /* SigmaTel reference board */
1810 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1811 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 1812 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1813 "DFI LanParty", STAC_92HD71BXX_REF),
514bf54c
JG		 1814 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
1815 "HP dv4-1222nr", STAC_HP_DV4_1222NR),
5bdaaada
VK		 1816 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
1817 "HP", STAC_HP_DV5),
58d8395b
TI		 1818 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
1819 "HP", STAC_HP_DV5),
2ae466f8 1820 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 1821 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI		 1822 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
1823 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 1824 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
1825 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 1826 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 1827 "HP mini 1000", STAC_HP_M4),
ae6241fb 1828 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 1829 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 1830 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
1831 "HP dv6", STAC_HP_DV5),
e3d2530a
KG		 1832 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
1833 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY		 1834 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
1835 "HP DV6", STAC_HP_DV5),
1972d025
TI		 1836 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
1837 "HP", STAC_HP_DV5),
a7662640
MR		 1838 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1839 "unknown Dell", STAC_DELL_M4_1),
1840 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1841 "unknown Dell", STAC_DELL_M4_1),
1842 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1843 "unknown Dell", STAC_DELL_M4_1),
1844 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1845 "unknown Dell", STAC_DELL_M4_1),
1846 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1847 "unknown Dell", STAC_DELL_M4_1),
1848 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1849 "unknown Dell", STAC_DELL_M4_1),
1850 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1851 "unknown Dell", STAC_DELL_M4_1),
1852 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1853 "unknown Dell", STAC_DELL_M4_2),
1854 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1855 "unknown Dell", STAC_DELL_M4_2),
1856 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1857 "unknown Dell", STAC_DELL_M4_2),
1858 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1859 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1860 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1861 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1862 {} /* terminator */
1863};
1864
2b63536f 1865static const unsigned int ref922x_pin_configs[10] = {
403d1944
MP		 1866 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1867 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1868 0x40000100, 0x40000100,
1869};
1870
dfe495d0
TI		 1871/*
1872 STAC 922X pin configs for
1873 102801A7
1874 102801AB
1875 102801A9
1876 102801D1
1877 102801D2
1878*/
2b63536f 1879static const unsigned int dell_922x_d81_pin_configs[10] = {
dfe495d0
TI		 1880 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1881 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1882 0x01813122, 0x400001f2,
1883};
1884
1885/*
1886 STAC 922X pin configs for
1887 102801AC
1888 102801D0
1889*/
2b63536f 1890static const unsigned int dell_922x_d82_pin_configs[10] = {
dfe495d0
TI		 1891 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1892 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1893 0x01813122, 0x400001f1,
1894};
1895
1896/*
1897 STAC 922X pin configs for
1898 102801BF
1899*/
2b63536f 1900static const unsigned int dell_922x_m81_pin_configs[10] = {
dfe495d0
TI		 1901 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1902 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1903 0x40C003f1, 0x405003f0,
1904};
1905
1906/*
1907 STAC 9221 A1 pin configs for
1908 102801D7 (Dell XPS M1210)
1909*/
2b63536f 1910static const unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1911 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1912 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1913 0x508003f3, 0x405003f4,
1914};
1915
2b63536f 1916static const unsigned int d945gtp3_pin_configs[10] = {
869264c4 1917 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1918 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1919 0x02a19120, 0x40000100,
1920};
1921
2b63536f 1922static const unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1923 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1924 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1925 0x02a19320, 0x40000100,
1926};
1927
2b63536f 1928static const unsigned int intel_mac_v1_pin_configs[10] = {
5d5d3bc3
IZ		 1929 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1930 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1931 0x400000fc, 0x400000fb,
1932};
1933
2b63536f 1934static const unsigned int intel_mac_v2_pin_configs[10] = {
5d5d3bc3
IZ		 1935 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1936 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1937 0x400000fc, 0x400000fb,
6f0778d8
NB		 1938};
1939
2b63536f 1940static const unsigned int intel_mac_v3_pin_configs[10] = {
5d5d3bc3
IZ		 1941 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1942 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1943 0x400000fc, 0x400000fb,
1944};
1945
2b63536f 1946static const unsigned int intel_mac_v4_pin_configs[10] = {
5d5d3bc3
IZ		 1947 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1948 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1949 0x400000fc, 0x400000fb,
1950};
1951
2b63536f 1952static const unsigned int intel_mac_v5_pin_configs[10] = {
5d5d3bc3
IZ		 1953 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1954 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1955 0x400000fc, 0x400000fb,
0dae0f83
TI		 1956};
1957
2b63536f 1958static const unsigned int ecs202_pin_configs[10] = {
8c650087
MCC		 1959 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1960 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1961 0x9037012e, 0x40e000f2,
1962};
76c08828 1963
2b63536f 1964static const unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1965 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1966 [STAC_D945GTP3] = d945gtp3_pin_configs,
1967 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1968 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1969 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1970 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1971 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1972 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1973 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1974 /* for backward compatibility */
5d5d3bc3
IZ		 1975 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1976 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1977 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1978 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1979 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1980 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1981 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1982 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1983 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1984 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1985 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1986};
1987
ea734963 1988static const char * const stac922x_models[STAC_922X_MODELS] = {
1607b8ea 1989 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI		 1990 [STAC_D945_REF] = "ref",
1991 [STAC_D945GTP5] = "5stack",
1992 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1993 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1994 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1995 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1996 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1997 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1998 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1999 /* for backward compatibility */
f5fcc13c 2000 [STAC_MACMINI] = "macmini",
3fc24d85 2001 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 2002 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
2003 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 2004 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 2005 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 2006 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 2007 [STAC_922X_DELL_D81] = "dell-d81",
2008 [STAC_922X_DELL_D82] = "dell-d82",
2009 [STAC_922X_DELL_M81] = "dell-m81",
2010 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 2011};
2012
2b63536f 2013static const struct snd_pci_quirk stac922x_cfg_tbl[] = {
f5fcc13c
TI		 2014 /* SigmaTel reference board */
2015 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2016 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 2017 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2018 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 2019 /* Intel 945G based systems */
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
2021 "Intel D945G", STAC_D945GTP3),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
2023 "Intel D945G", STAC_D945GTP3),
2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2025 "Intel D945G", STAC_D945GTP3),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2027 "Intel D945G", STAC_D945GTP3),
2028 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2029 "Intel D945G", STAC_D945GTP3),
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2031 "Intel D945G", STAC_D945GTP3),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2033 "Intel D945G", STAC_D945GTP3),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2035 "Intel D945G", STAC_D945GTP3),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2037 "Intel D945G", STAC_D945GTP3),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2039 "Intel D945G", STAC_D945GTP3),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2041 "Intel D945G", STAC_D945GTP3),
2042 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2043 "Intel D945G", STAC_D945GTP3),
2044 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2045 "Intel D945G", STAC_D945GTP3),
2046 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2047 "Intel D945G", STAC_D945GTP3),
2048 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2049 "Intel D945G", STAC_D945GTP3),
2050 /* Intel D945G 5-stack systems */
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2052 "Intel D945G", STAC_D945GTP5),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2054 "Intel D945G", STAC_D945GTP5),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2056 "Intel D945G", STAC_D945GTP5),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2058 "Intel D945G", STAC_D945GTP5),
2059 /* Intel 945P based systems */
2060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2061 "Intel D945P", STAC_D945GTP3),
2062 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2063 "Intel D945P", STAC_D945GTP3),
2064 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2065 "Intel D945P", STAC_D945GTP3),
2066 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2067 "Intel D945P", STAC_D945GTP3),
2068 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2069 "Intel D945P", STAC_D945GTP3),
2070 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2071 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 2072 /* other intel */
2073 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2074 "Intel D945", STAC_D945_REF),
f5fcc13c 2075 /* other systems */
536319af 2076 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2077 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2078 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2079 /* Dell systems */
2080 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2081 "unknown Dell", STAC_922X_DELL_D81),
2082 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2083 "unknown Dell", STAC_922X_DELL_D81),
2084 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2085 "unknown Dell", STAC_922X_DELL_D81),
2086 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2087 "unknown Dell", STAC_922X_DELL_D82),
2088 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2089 "unknown Dell", STAC_922X_DELL_M81),
2090 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2091 "unknown Dell", STAC_922X_DELL_D82),
2092 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2093 "unknown Dell", STAC_922X_DELL_D81),
2094 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2095 "unknown Dell", STAC_922X_DELL_D81),
2096 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2097 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 2098 /* ECS/PC Chips boards */
dea0a509 2099 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 2100 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2101 {} /* terminator */
2102};
2103
2b63536f 2104static const unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2105 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2106 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2107 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2108 0x01c42190, 0x40000100,
3cc08dc6
MP		 2109};
2110
2b63536f 2111static const unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2112 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2113 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2114 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2115 0x40000100, 0x40000100
2116};
2117
2b63536f 2118static const unsigned int d965_5st_pin_configs[14] = {
93ed1503
TD		 2119 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2120 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2121 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2122 0x40000100, 0x40000100
2123};
2124
2b63536f 2125static const unsigned int d965_5st_no_fp_pin_configs[14] = {
679d92ed
TI		 2126 0x40000100, 0x40000100, 0x0181304e, 0x01014010,
2127 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2128 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2129 0x40000100, 0x40000100
2130};
2131
2b63536f 2132static const unsigned int dell_3st_pin_configs[14] = {
4ff076e5
TD		 2133 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2134 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2135 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2136 0x40c003fc, 0x40000100
2137};
2138
2b63536f 2139static const unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2140 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2141 [STAC_D965_REF] = ref927x_pin_configs,
2142 [STAC_D965_3ST] = d965_3st_pin_configs,
2143 [STAC_D965_5ST] = d965_5st_pin_configs,
679d92ed 2144 [STAC_D965_5ST_NO_FP] = d965_5st_no_fp_pin_configs,
8e9068b1
MR		 2145 [STAC_DELL_3ST] = dell_3st_pin_configs,
2146 [STAC_DELL_BIOS] = NULL,
54930531 2147 [STAC_927X_VOLKNOB] = NULL,
3cc08dc6
MP		 2148};
2149
ea734963 2150static const char * const stac927x_models[STAC_927X_MODELS] = {
1607b8ea 2151 [STAC_927X_AUTO] = "auto",
e28d8322 2152 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2153 [STAC_D965_REF] = "ref",
2154 [STAC_D965_3ST] = "3stack",
2155 [STAC_D965_5ST] = "5stack",
679d92ed 2156 [STAC_D965_5ST_NO_FP] = "5stack-no-fp",
8e9068b1
MR		 2157 [STAC_DELL_3ST] = "dell-3stack",
2158 [STAC_DELL_BIOS] = "dell-bios",
54930531 2159 [STAC_927X_VOLKNOB] = "volknob",
f5fcc13c
TI		 2160};
2161
2b63536f 2162static const struct snd_pci_quirk stac927x_cfg_tbl[] = {
f5fcc13c
TI		 2163 /* SigmaTel reference board */
2164 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2165 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 2166 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2167 "DFI LanParty", STAC_D965_REF),
81d3dbde 2168 /* Intel 946 based systems */
f5fcc13c
TI		 2169 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2170 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2171 /* 965 based 3 stack systems */
dea0a509
TI		 2172 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2173 "Intel D965", STAC_D965_3ST),
2174 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2175 "Intel D965", STAC_D965_3ST),
4ff076e5 2176 /* Dell 3 stack systems */
dfe495d0 2177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2180 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 2181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 2182 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 2183 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2184 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
84d3dc20 2185 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 2186 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2187 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2189 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2190 /* 965 based 5 stack systems */
dea0a509
TI		 2191 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2192 "Intel D965", STAC_D965_5ST),
2193 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2194 "Intel D965", STAC_D965_5ST),
54930531
TI		 2195 /* volume-knob fixes */
2196 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP		 2197 {} /* terminator */
2198};
2199
2b63536f 2200static const unsigned int ref9205_pin_configs[12] = {
f3302a59 2201 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2202 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2203 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2204};
2205
dfe495d0
TI		 2206/*
2207 STAC 9205 pin configs for
2208 102801F1
2209 102801F2
2210 102801FC
2211 102801FD
2212 10280204
2213 1028021F
3fa2ef74 2214 10280228 (Dell Vostro 1500)
95e70e87 2215 10280229 (Dell Vostro 1700)
dfe495d0 2216*/
2b63536f 2217static const unsigned int dell_9205_m42_pin_configs[12] = {
dfe495d0
TI		 2218 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2219 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2220 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2221};
2222
2223/*
2224 STAC 9205 pin configs for
2225 102801F9
2226 102801FA
2227 102801FE
2228 102801FF (Dell Precision M4300)
2229 10280206
2230 10280200
2231 10280201
2232*/
2b63536f 2233static const unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2234 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2235 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2236 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2237};
2238
2b63536f 2239static const unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2240 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2241 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2242 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2243};
2244
2b63536f 2245static const unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2246 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2247 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2248 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2249 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2250 [STAC_9205_EAPD] = NULL,
f3302a59
MP		 2251};
2252
ea734963 2253static const char * const stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2254 [STAC_9205_AUTO] = "auto",
f5fcc13c 2255 [STAC_9205_REF] = "ref",
dfe495d0 2256 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2257 [STAC_9205_DELL_M43] = "dell-m43",
2258 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2259 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI		 2260};
2261
2b63536f 2262static const struct snd_pci_quirk stac9205_cfg_tbl[] = {
f5fcc13c
TI		 2263 /* SigmaTel reference board */
2264 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2265 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 2266 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
2267 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 2268 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2269 "DFI LanParty", STAC_9205_REF),
d9a4268e 2270 /* Dell */
dfe495d0
TI		 2271 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2272 "unknown Dell", STAC_9205_DELL_M42),
2273 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2274 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2275 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2276 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2277 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2278 "Dell Precision", STAC_9205_DELL_M43),
2279 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2280 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2281 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2282 "unknown Dell", STAC_9205_DELL_M42),
2283 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2284 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2285 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2286 "Dell Precision", STAC_9205_DELL_M43),
2287 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2288 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2289 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2290 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2291 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2292 "Dell Precision", STAC_9205_DELL_M43),
2293 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2294 "Dell Precision", STAC_9205_DELL_M43),
2295 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2296 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2297 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2298 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2299 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2300 "Dell Vostro 1500", STAC_9205_DELL_M42),
95e70e87
AA		 2301 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
2302 "Dell Vostro 1700", STAC_9205_DELL_M42),
d9a4268e 2303 /* Gateway */
42b95f0c 2304 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
d9a4268e 2305 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP		 2306 {} /* terminator */
2307};
2308
330ee995 2309static void stac92xx_set_config_regs(struct hda_codec *codec,
2b63536f 2310 const unsigned int *pincfgs)
11b44bbd
RF		 2311{
2312 int i;
2313 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2314
330ee995
TI		 2315 if (!pincfgs)
2316 return;
11b44bbd 2317
87d48363 2318 for (i = 0; i < spec->num_pins; i++)
330ee995
TI		 2319 if (spec->pin_nids[i] && pincfgs[i])
2320 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2321 pincfgs[i]);
af9f341a
TI		 2322}
2323
dabbed6f 2324/*
c7d4b2fa 2325 * Analog playback callbacks
dabbed6f 2326 */
c7d4b2fa
M		 2327static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2328 struct hda_codec *codec,
c8b6bf9b 2329 struct snd_pcm_substream *substream)
2f2f4251 2330{
dabbed6f 2331 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2332 if (spec->stream_delay)
2333 msleep(spec->stream_delay);
9a08160b
TI		 2334 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2335 hinfo);
2f2f4251
M		 2336}
2337
2f2f4251
M		 2338static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2339 struct hda_codec *codec,
2340 unsigned int stream_tag,
2341 unsigned int format,
c8b6bf9b 2342 struct snd_pcm_substream *substream)
2f2f4251
M		 2343{
2344 struct sigmatel_spec *spec = codec->spec;
403d1944 2345 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2346}
2347
2348static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2349 struct hda_codec *codec,
c8b6bf9b 2350 struct snd_pcm_substream *substream)
2f2f4251
M		 2351{
2352 struct sigmatel_spec *spec = codec->spec;
2353 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2354}
2355
dabbed6f
M		 2356/*
2357 * Digital playback callbacks
2358 */
2359static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2360 struct hda_codec *codec,
c8b6bf9b 2361 struct snd_pcm_substream *substream)
dabbed6f
M		 2362{
2363 struct sigmatel_spec *spec = codec->spec;
2364 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2365}
2366
2367static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2368 struct hda_codec *codec,
c8b6bf9b 2369 struct snd_pcm_substream *substream)
dabbed6f
M		 2370{
2371 struct sigmatel_spec *spec = codec->spec;
2372 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2373}
2374
6b97eb45
TI		 2375static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2376 struct hda_codec *codec,
2377 unsigned int stream_tag,
2378 unsigned int format,
2379 struct snd_pcm_substream *substream)
2380{
2381 struct sigmatel_spec *spec = codec->spec;
2382 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2383 stream_tag, format, substream);
2384}
2385
9411e21c
TI		 2386static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2387 struct hda_codec *codec,
2388 struct snd_pcm_substream *substream)
2389{
2390 struct sigmatel_spec *spec = codec->spec;
2391 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2392}
2393
dabbed6f 2394
2f2f4251
M		 2395/*
2396 * Analog capture callbacks
2397 */
2398static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2399 struct hda_codec *codec,
2400 unsigned int stream_tag,
2401 unsigned int format,
c8b6bf9b 2402 struct snd_pcm_substream *substream)
2f2f4251
M		 2403{
2404 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2405 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2406
8daaaa97
MR		 2407 if (spec->powerdown_adcs) {
2408 msleep(40);
8c2f767b 2409 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2410 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2411 }
2412 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2413 return 0;
2414}
2415
2416static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2417 struct hda_codec *codec,
c8b6bf9b 2418 struct snd_pcm_substream *substream)
2f2f4251
M		 2419{
2420 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2421 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2422
8daaaa97
MR		 2423 snd_hda_codec_cleanup_stream(codec, nid);
2424 if (spec->powerdown_adcs)
8c2f767b 2425 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2426 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2427 return 0;
2428}
2429
2b63536f 2430static const struct hda_pcm_stream stac92xx_pcm_digital_playback = {
dabbed6f
M		 2431 .substreams = 1,
2432 .channels_min = 2,
2433 .channels_max = 2,
2434 /* NID is set in stac92xx_build_pcms */
2435 .ops = {
2436 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2437 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI		 2438 .prepare = stac92xx_dig_playback_pcm_prepare,
2439 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M		 2440 },
2441};
2442
2b63536f 2443static const struct hda_pcm_stream stac92xx_pcm_digital_capture = {
dabbed6f
M		 2444 .substreams = 1,
2445 .channels_min = 2,
2446 .channels_max = 2,
2447 /* NID is set in stac92xx_build_pcms */
2448};
2449
2b63536f 2450static const struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2f2f4251
M		 2451 .substreams = 1,
2452 .channels_min = 2,
c7d4b2fa 2453 .channels_max = 8,
2f2f4251
M		 2454 .nid = 0x02, /* NID to query formats and rates */
2455 .ops = {
2456 .open = stac92xx_playback_pcm_open,
2457 .prepare = stac92xx_playback_pcm_prepare,
2458 .cleanup = stac92xx_playback_pcm_cleanup
2459 },
2460};
2461
2b63536f 2462static const struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
3cc08dc6
MP		 2463 .substreams = 1,
2464 .channels_min = 2,
2465 .channels_max = 2,
2466 .nid = 0x06, /* NID to query formats and rates */
2467 .ops = {
2468 .open = stac92xx_playback_pcm_open,
2469 .prepare = stac92xx_playback_pcm_prepare,
2470 .cleanup = stac92xx_playback_pcm_cleanup
2471 },
2472};
2473
2b63536f 2474static const struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2475 .channels_min = 2,
2476 .channels_max = 2,
9e05b7a3 2477 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2478 .ops = {
2479 .prepare = stac92xx_capture_pcm_prepare,
2480 .cleanup = stac92xx_capture_pcm_cleanup
2481 },
2482};
2483
2484static int stac92xx_build_pcms(struct hda_codec *codec)
2485{
2486 struct sigmatel_spec *spec = codec->spec;
2487 struct hda_pcm *info = spec->pcm_rec;
2488
2489 codec->num_pcms = 1;
2490 codec->pcm_info = info;
2491
c7d4b2fa 2492 info->name = "STAC92xx Analog";
2f2f4251 2493 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI		 2494 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2495 spec->multiout.dac_nids[0];
2f2f4251 2496 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2497 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2498 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2499
2500 if (spec->alt_switch) {
2501 codec->num_pcms++;
2502 info++;
2503 info->name = "STAC92xx Analog Alt";
2504 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2505 }
2f2f4251 2506
dabbed6f
M		 2507 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2508 codec->num_pcms++;
2509 info++;
2510 info->name = "STAC92xx Digital";
0852d7a6 2511 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M		 2512 if (spec->multiout.dig_out_nid) {
2513 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2514 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2515 }
2516 if (spec->dig_in_nid) {
2517 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2518 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2519 }
2520 }
2521
2f2f4251
M		 2522 return 0;
2523}
2524
7c922de7
NL		 2525static unsigned int stac92xx_get_default_vref(struct hda_codec *codec,
2526 hda_nid_t nid)
c960a03b 2527{
1327a32b 2528 unsigned int pincap = snd_hda_query_pin_caps(codec, nid);
c960a03b
TI		 2529 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2530 if (pincap & AC_PINCAP_VREF_100)
2531 return AC_PINCTL_VREF_100;
2532 if (pincap & AC_PINCAP_VREF_80)
2533 return AC_PINCTL_VREF_80;
2534 if (pincap & AC_PINCAP_VREF_50)
2535 return AC_PINCTL_VREF_50;
2536 if (pincap & AC_PINCAP_VREF_GRD)
2537 return AC_PINCTL_VREF_GRD;
2538 return 0;
2539}
2540
403d1944
MP		 2541static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2542
2543{
82beb8fd
TI		 2544 snd_hda_codec_write_cache(codec, nid, 0,
2545 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2546}
2547
7c2ba97b
MR		 2548#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2549
2550static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2551 struct snd_ctl_elem_value *ucontrol)
2552{
2553 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2554 struct sigmatel_spec *spec = codec->spec;
2555
d7a89436 2556 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2557 return 0;
2558}
2559
62558ce1 2560static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid);
c6e4c666 2561
7c2ba97b
MR		 2562static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2563 struct snd_ctl_elem_value *ucontrol)
2564{
2565 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2566 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2567 int nid = kcontrol->private_value;
2568
2569 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b 2570
25985edc 2571 /* check to be sure that the ports are up to date with
7c2ba97b
MR		 2572 * switch changes
2573 */
62558ce1 2574 stac_issue_unsol_event(codec, nid);
7c2ba97b
MR		 2575
2576 return 1;
2577}
2578
7c922de7
NL		 2579static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol,
2580 struct snd_ctl_elem_info *uinfo)
2581{
2582 int i;
2b63536f 2583 static const char * const texts[] = {
7c922de7
NL		 2584 "Mic In", "Line In", "Line Out"
2585 };
2586
2587 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2588 struct sigmatel_spec *spec = codec->spec;
2589 hda_nid_t nid = kcontrol->private_value;
2590
2591 if (nid == spec->mic_switch || nid == spec->line_switch)
2592 i = 3;
2593 else
2594 i = 2;
2595
2596 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2597 uinfo->value.enumerated.items = i;
2598 uinfo->count = 1;
2599 if (uinfo->value.enumerated.item >= i)
2600 uinfo->value.enumerated.item = i-1;
2601 strcpy(uinfo->value.enumerated.name,
2602 texts[uinfo->value.enumerated.item]);
2603
2604 return 0;
2605}
2606
2607static int stac92xx_dc_bias_get(struct snd_kcontrol *kcontrol,
2608 struct snd_ctl_elem_value *ucontrol)
2609{
2610 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2611 hda_nid_t nid = kcontrol->private_value;
2612 unsigned int vref = stac92xx_vref_get(codec, nid);
2613
2614 if (vref == stac92xx_get_default_vref(codec, nid))
2615 ucontrol->value.enumerated.item[0] = 0;
2616 else if (vref == AC_PINCTL_VREF_GRD)
2617 ucontrol->value.enumerated.item[0] = 1;
2618 else if (vref == AC_PINCTL_VREF_HIZ)
2619 ucontrol->value.enumerated.item[0] = 2;
2620
2621 return 0;
2622}
2623
2624static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol,
2625 struct snd_ctl_elem_value *ucontrol)
2626{
2627 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2628 unsigned int new_vref = 0;
b8621516 2629 int error;
7c922de7
NL		 2630 hda_nid_t nid = kcontrol->private_value;
2631
2632 if (ucontrol->value.enumerated.item[0] == 0)
2633 new_vref = stac92xx_get_default_vref(codec, nid);
2634 else if (ucontrol->value.enumerated.item[0] == 1)
2635 new_vref = AC_PINCTL_VREF_GRD;
2636 else if (ucontrol->value.enumerated.item[0] == 2)
2637 new_vref = AC_PINCTL_VREF_HIZ;
2638 else
2639 return 0;
2640
2641 if (new_vref != stac92xx_vref_get(codec, nid)) {
2642 error = stac92xx_vref_set(codec, nid, new_vref);
2643 return error;
2644 }
2645
2646 return 0;
2647}
2648
2649static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol,
2650 struct snd_ctl_elem_info *uinfo)
2651{
2b63536f 2652 char *texts[2];
7c922de7
NL		 2653 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2654 struct sigmatel_spec *spec = codec->spec;
2655
2656 if (kcontrol->private_value == spec->line_switch)
2657 texts[0] = "Line In";
2658 else
2659 texts[0] = "Mic In";
2660 texts[1] = "Line Out";
2661 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2662 uinfo->value.enumerated.items = 2;
2663 uinfo->count = 1;
2664
2665 if (uinfo->value.enumerated.item >= 2)
2666 uinfo->value.enumerated.item = 1;
2667 strcpy(uinfo->value.enumerated.name,
2668 texts[uinfo->value.enumerated.item]);
2669
2670 return 0;
2671}
403d1944
MP		 2672
2673static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2674{
2675 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2676 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2677 hda_nid_t nid = kcontrol->private_value;
2678 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
403d1944 2679
7c922de7 2680 ucontrol->value.enumerated.item[0] = spec->io_switch[io_idx];
403d1944
MP		 2681 return 0;
2682}
2683
2684static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2685{
2686 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2687 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2688 hda_nid_t nid = kcontrol->private_value;
2689 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
2690 unsigned short val = !!ucontrol->value.enumerated.item[0];
403d1944
MP		 2691
2692 spec->io_switch[io_idx] = val;
2693
2694 if (val)
2695 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2696 else {
2697 unsigned int pinctl = AC_PINCTL_IN_EN;
2698 if (io_idx) /* set VREF for mic */
7c922de7 2699 pinctl |= stac92xx_get_default_vref(codec, nid);
c960a03b
TI		 2700 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2701 }
40c1d308
JZ		 2702
2703 /* check the auto-mute again: we need to mute/unmute the speaker
2704 * appropriately according to the pin direction
2705 */
2706 if (spec->hp_detect)
62558ce1 2707 stac_issue_unsol_event(codec, nid);
40c1d308 2708
403d1944
MP		 2709 return 1;
2710}
2711
0fb87bb4
ML		 2712#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2713
2714static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2715 struct snd_ctl_elem_value *ucontrol)
2716{
2717 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2718 struct sigmatel_spec *spec = codec->spec;
2719
2720 ucontrol->value.integer.value[0] = spec->clfe_swap;
2721 return 0;
2722}
2723
2724static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2725 struct snd_ctl_elem_value *ucontrol)
2726{
2727 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2728 struct sigmatel_spec *spec = codec->spec;
2729 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2730 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2731
68ea7b2f 2732 if (spec->clfe_swap == val)
0fb87bb4
ML		 2733 return 0;
2734
68ea7b2f 2735 spec->clfe_swap = val;
0fb87bb4
ML		 2736
2737 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2738 spec->clfe_swap ? 0x4 : 0x0);
2739
2740 return 1;
2741}
2742
7c2ba97b
MR		 2743#define STAC_CODEC_HP_SWITCH(xname) \
2744 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2745 .name = xname, \
2746 .index = 0, \
2747 .info = stac92xx_hp_switch_info, \
2748 .get = stac92xx_hp_switch_get, \
2749 .put = stac92xx_hp_switch_put, \
2750 }
2751
403d1944
MP		 2752#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2753 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2754 .name = xname, \
2755 .index = 0, \
2756 .info = stac92xx_io_switch_info, \
2757 .get = stac92xx_io_switch_get, \
2758 .put = stac92xx_io_switch_put, \
2759 .private_value = xpval, \
2760 }
2761
0fb87bb4
ML		 2762#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2763 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2764 .name = xname, \
2765 .index = 0, \
2766 .info = stac92xx_clfe_switch_info, \
2767 .get = stac92xx_clfe_switch_get, \
2768 .put = stac92xx_clfe_switch_put, \
2769 .private_value = xpval, \
2770 }
403d1944 2771
c7d4b2fa
M		 2772enum {
2773 STAC_CTL_WIDGET_VOL,
2774 STAC_CTL_WIDGET_MUTE,
123c07ae 2775 STAC_CTL_WIDGET_MUTE_BEEP,
09a99959 2776 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2777 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2778 STAC_CTL_WIDGET_IO_SWITCH,
2fc99890
NL		 2779 STAC_CTL_WIDGET_CLFE_SWITCH,
2780 STAC_CTL_WIDGET_DC_BIAS
c7d4b2fa
M		 2781};
2782
2b63536f 2783static const struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2784 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2785 HDA_CODEC_MUTE(NULL, 0, 0, 0),
123c07ae 2786 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0),
09a99959 2787 STAC_MONO_MUX,
7c2ba97b 2788 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2789 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2790 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2fc99890 2791 DC_BIAS(NULL, 0, 0),
c7d4b2fa
M		 2792};
2793
2794/* add dynamic controls */
e3c75964
TI		 2795static struct snd_kcontrol_new *
2796stac_control_new(struct sigmatel_spec *spec,
2b63536f 2797 const struct snd_kcontrol_new *ktemp,
4d02d1b6 2798 const char *name,
5e26dfd0 2799 unsigned int subdev)
c7d4b2fa 2800{
c8b6bf9b 2801 struct snd_kcontrol_new *knew;
c7d4b2fa 2802
603c4019
TI		 2803 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2804 knew = snd_array_new(&spec->kctls);
2805 if (!knew)
e3c75964 2806 return NULL;
4d4e9bb3 2807 *knew = *ktemp;
82fe0c58 2808 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI		 2809 if (!knew->name) {
2810 /* roolback */
2811 memset(knew, 0, sizeof(*knew));
2812 spec->kctls.alloced--;
2813 return NULL;
2814 }
5e26dfd0 2815 knew->subdevice = subdev;
e3c75964
TI		 2816 return knew;
2817}
2818
2819static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2b63536f 2820 const struct snd_kcontrol_new *ktemp,
e3c75964
TI		 2821 int idx, const char *name,
2822 unsigned long val)
2823{
4d02d1b6 2824 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name,
5e26dfd0 2825 HDA_SUBDEV_AMP_FLAG);
e3c75964 2826 if (!knew)
c7d4b2fa 2827 return -ENOMEM;
e3c75964 2828 knew->index = idx;
c7d4b2fa 2829 knew->private_value = val;
c7d4b2fa
M		 2830 return 0;
2831}
2832
4d4e9bb3
TI		 2833static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2834 int type, int idx, const char *name,
2835 unsigned long val)
2836{
2837 return stac92xx_add_control_temp(spec,
2838 &stac92xx_control_templates[type],
2839 idx, name, val);
2840}
2841
4682eee0
MR		 2842
2843/* add dynamic controls */
4d4e9bb3
TI		 2844static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2845 const char *name, unsigned long val)
4682eee0
MR		 2846{
2847 return stac92xx_add_control_idx(spec, type, 0, name, val);
2848}
2849
2b63536f 2850static const struct snd_kcontrol_new stac_input_src_temp = {
e3c75964
TI		 2851 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2852 .name = "Input Source",
2853 .info = stac92xx_mux_enum_info,
2854 .get = stac92xx_mux_enum_get,
2855 .put = stac92xx_mux_enum_put,
2856};
2857
7c922de7
NL		 2858static inline int stac92xx_add_jack_mode_control(struct hda_codec *codec,
2859 hda_nid_t nid, int idx)
2860{
2861 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
2862 int control = 0;
2863 struct sigmatel_spec *spec = codec->spec;
2864 char name[22];
2865
99ae28be 2866 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
7c922de7
NL		 2867 if (stac92xx_get_default_vref(codec, nid) == AC_PINCTL_VREF_GRD
2868 && nid == spec->line_switch)
2869 control = STAC_CTL_WIDGET_IO_SWITCH;
2870 else if (snd_hda_query_pin_caps(codec, nid)
2871 & (AC_PINCAP_VREF_GRD << AC_PINCAP_VREF_SHIFT))
2872 control = STAC_CTL_WIDGET_DC_BIAS;
2873 else if (nid == spec->mic_switch)
2874 control = STAC_CTL_WIDGET_IO_SWITCH;
2875 }
2876
2877 if (control) {
10a20af7 2878 strcpy(name, hda_get_input_pin_label(codec, nid, 1));
7c922de7
NL		 2879 return stac92xx_add_control(codec->spec, control,
2880 strcat(name, " Jack Mode"), nid);
2881 }
2882
2883 return 0;
2884}
2885
e3c75964
TI		 2886static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2887{
2888 struct snd_kcontrol_new *knew;
2889 struct hda_input_mux *imux = &spec->private_imux;
2890
3d21d3f7
TI		 2891 if (spec->auto_mic)
2892 return 0; /* no need for input source */
e3c75964
TI		 2893 if (!spec->num_adcs || imux->num_items <= 1)
2894 return 0; /* no need for input source control */
2895 knew = stac_control_new(spec, &stac_input_src_temp,
4d02d1b6 2896 stac_input_src_temp.name, 0);
e3c75964
TI		 2897 if (!knew)
2898 return -ENOMEM;
2899 knew->count = spec->num_adcs;
2900 return 0;
2901}
2902
c21ca4a8
TI		 2903/* check whether the line-input can be used as line-out */
2904static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2905{
2906 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2907 struct auto_pin_cfg *cfg = &spec->autocfg;
2908 hda_nid_t nid;
2909 unsigned int pincap;
eea7dc93 2910 int i;
8e9068b1 2911
c21ca4a8
TI		 2912 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2913 return 0;
eea7dc93 2914 for (i = 0; i < cfg->num_inputs; i++) {
86e2959a 2915 if (cfg->inputs[i].type == AUTO_PIN_LINE_IN) {
eea7dc93
TI		 2916 nid = cfg->inputs[i].pin;
2917 pincap = snd_hda_query_pin_caps(codec, nid);
2918 if (pincap & AC_PINCAP_OUT)
2919 return nid;
2920 }
2921 }
c21ca4a8
TI		 2922 return 0;
2923}
403d1944 2924
eea7dc93
TI		 2925static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid);
2926
c21ca4a8 2927/* check whether the mic-input can be used as line-out */
eea7dc93 2928static hda_nid_t check_mic_out_switch(struct hda_codec *codec, hda_nid_t *dac)
c21ca4a8
TI		 2929{
2930 struct sigmatel_spec *spec = codec->spec;
2931 struct auto_pin_cfg *cfg = &spec->autocfg;
2932 unsigned int def_conf, pincap;
86e2959a 2933 int i;
c21ca4a8 2934
eea7dc93 2935 *dac = 0;
c21ca4a8
TI		 2936 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2937 return 0;
eea7dc93
TI		 2938 for (i = 0; i < cfg->num_inputs; i++) {
2939 hda_nid_t nid = cfg->inputs[i].pin;
86e2959a 2940 if (cfg->inputs[i].type != AUTO_PIN_MIC)
eea7dc93 2941 continue;
330ee995 2942 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI		 2943 /* some laptops have an internal analog microphone
2944 * which can't be used as a output */
99ae28be 2945 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
1327a32b 2946 pincap = snd_hda_query_pin_caps(codec, nid);
eea7dc93
TI		 2947 if (pincap & AC_PINCAP_OUT) {
2948 *dac = get_unassigned_dac(codec, nid);
2949 if (*dac)
2950 return nid;
2951 }
403d1944 2952 }
403d1944 2953 }
403d1944
MP		 2954 return 0;
2955}
2956
7b043899
SL		 2957static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2958{
2959 int i;
2960
2961 for (i = 0; i < spec->multiout.num_dacs; i++) {
2962 if (spec->multiout.dac_nids[i] == nid)
2963 return 1;
2964 }
2965
2966 return 0;
2967}
2968
c21ca4a8
TI		 2969static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2970{
2971 int i;
2972 if (is_in_dac_nids(spec, nid))
2973 return 1;
2974 for (i = 0; i < spec->autocfg.hp_outs; i++)
2975 if (spec->hp_dacs[i] == nid)
2976 return 1;
2977 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2978 if (spec->speaker_dacs[i] == nid)
2979 return 1;
2980 return 0;
2981}
2982
2983static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2984{
2985 struct sigmatel_spec *spec = codec->spec;
48718eab 2986 struct auto_pin_cfg *cfg = &spec->autocfg;
c21ca4a8 2987 int j, conn_len;
48718eab 2988 hda_nid_t conn[HDA_MAX_CONNECTIONS], fallback_dac;
c21ca4a8
TI		 2989 unsigned int wcaps, wtype;
2990
2991 conn_len = snd_hda_get_connections(codec, nid, conn,
2992 HDA_MAX_CONNECTIONS);
36706005
CC		 2993 /* 92HD88: trace back up the link of nids to find the DAC */
2994 while (conn_len == 1 && (get_wcaps_type(get_wcaps(codec, conn[0]))
2995 != AC_WID_AUD_OUT)) {
2996 nid = conn[0];
2997 conn_len = snd_hda_get_connections(codec, nid, conn,
2998 HDA_MAX_CONNECTIONS);
2999 }
c21ca4a8 3000 for (j = 0; j < conn_len; j++) {
14bafe32 3001 wcaps = get_wcaps(codec, conn[j]);
a22d543a 3002 wtype = get_wcaps_type(wcaps);
c21ca4a8
TI		 3003 /* we check only analog outputs */
3004 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
3005 continue;
3006 /* if this route has a free DAC, assign it */
3007 if (!check_all_dac_nids(spec, conn[j])) {
3008 if (conn_len > 1) {
3009 /* select this DAC in the pin's input mux */
3010 snd_hda_codec_write_cache(codec, nid, 0,
3011 AC_VERB_SET_CONNECT_SEL, j);
3012 }
3013 return conn[j];
3014 }
3015 }
48718eab
DH		 3016
3017 /* if all DACs are already assigned, connect to the primary DAC,
3018 unless we're assigning a secondary headphone */
3019 fallback_dac = spec->multiout.dac_nids[0];
3020 if (spec->multiout.hp_nid) {
3021 for (j = 0; j < cfg->hp_outs; j++)
3022 if (cfg->hp_pins[j] == nid) {
3023 fallback_dac = spec->multiout.hp_nid;
3024 break;
3025 }
3026 }
3027
ee58a7ca
TI		 3028 if (conn_len > 1) {
3029 for (j = 0; j < conn_len; j++) {
48718eab 3030 if (conn[j] == fallback_dac) {
ee58a7ca
TI		 3031 snd_hda_codec_write_cache(codec, nid, 0,
3032 AC_VERB_SET_CONNECT_SEL, j);
3033 break;
3034 }
3035 }
3036 }
c21ca4a8
TI		 3037 return 0;
3038}
3039
3040static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
3041static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
3042
3cc08dc6 3043/*
7b043899
SL		 3044 * Fill in the dac_nids table from the parsed pin configuration
3045 * This function only works when every pin in line_out_pins[]
3046 * contains atleast one DAC in its connection list. Some 92xx
3047 * codecs are not connected directly to a DAC, such as the 9200
3048 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 3049 */
c21ca4a8 3050static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 3051{
3052 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 3053 struct auto_pin_cfg *cfg = &spec->autocfg;
3054 int i;
3055 hda_nid_t nid, dac;
7b043899 3056
c7d4b2fa
M		 3057 for (i = 0; i < cfg->line_outs; i++) {
3058 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 3059 dac = get_unassigned_dac(codec, nid);
3060 if (!dac) {
df802952
TI		 3061 if (spec->multiout.num_dacs > 0) {
3062 /* we have already working output pins,
3063 * so let's drop the broken ones again
3064 */
3065 cfg->line_outs = spec->multiout.num_dacs;
3066 break;
3067 }
7b043899
SL		 3068 /* error out, no available DAC found */
3069 snd_printk(KERN_ERR
3070 "%s: No available DAC for pin 0x%x\n",
3071 __func__, nid);
3072 return -ENODEV;
3073 }
c21ca4a8
TI		 3074 add_spec_dacs(spec, dac);
3075 }
7b043899 3076
139e071b
TI		 3077 for (i = 0; i < cfg->hp_outs; i++) {
3078 nid = cfg->hp_pins[i];
3079 dac = get_unassigned_dac(codec, nid);
3080 if (dac) {
3081 if (!spec->multiout.hp_nid)
3082 spec->multiout.hp_nid = dac;
3083 else
3084 add_spec_extra_dacs(spec, dac);
3085 }
3086 spec->hp_dacs[i] = dac;
3087 }
3088
3089 for (i = 0; i < cfg->speaker_outs; i++) {
3090 nid = cfg->speaker_pins[i];
3091 dac = get_unassigned_dac(codec, nid);
3092 if (dac)
3093 add_spec_extra_dacs(spec, dac);
3094 spec->speaker_dacs[i] = dac;
3095 }
3096
c21ca4a8
TI		 3097 /* add line-in as output */
3098 nid = check_line_out_switch(codec);
3099 if (nid) {
3100 dac = get_unassigned_dac(codec, nid);
3101 if (dac) {
3102 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
3103 nid, cfg->line_outs);
3104 cfg->line_out_pins[cfg->line_outs] = nid;
3105 cfg->line_outs++;
3106 spec->line_switch = nid;
3107 add_spec_dacs(spec, dac);
3108 }
3109 }
3110 /* add mic as output */
eea7dc93
TI		 3111 nid = check_mic_out_switch(codec, &dac);
3112 if (nid && dac) {
3113 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
3114 nid, cfg->line_outs);
3115 cfg->line_out_pins[cfg->line_outs] = nid;
3116 cfg->line_outs++;
3117 spec->mic_switch = nid;
3118 add_spec_dacs(spec, dac);
c21ca4a8 3119 }
c7d4b2fa 3120
c21ca4a8 3121 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 3122 spec->multiout.num_dacs,
3123 spec->multiout.dac_nids[0],
3124 spec->multiout.dac_nids[1],
3125 spec->multiout.dac_nids[2],
3126 spec->multiout.dac_nids[3],
3127 spec->multiout.dac_nids[4]);
c21ca4a8 3128
c7d4b2fa
M		 3129 return 0;
3130}
3131
eb06ed8f 3132/* create volume control/switch for the given prefx type */
668b9652
TI		 3133static int create_controls_idx(struct hda_codec *codec, const char *pfx,
3134 int idx, hda_nid_t nid, int chs)
eb06ed8f 3135{
7c7767eb 3136 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI		 3137 char name[32];
3138 int err;
3139
7c7767eb
TI		 3140 if (!spec->check_volume_offset) {
3141 unsigned int caps, step, nums, db_scale;
3142 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3143 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3144 AC_AMPCAP_STEP_SIZE_SHIFT;
3145 step = (step + 1) * 25; /* in .01dB unit */
3146 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3147 AC_AMPCAP_NUM_STEPS_SHIFT;
3148 db_scale = nums * step;
3149 /* if dB scale is over -64dB, and finer enough,
3150 * let's reduce it to half
3151 */
3152 if (db_scale > 6400 && nums >= 0x1f)
3153 spec->volume_offset = nums / 2;
3154 spec->check_volume_offset = 1;
3155 }
3156
eb06ed8f 3157 sprintf(name, "%s Playback Volume", pfx);
668b9652 3158 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI		 3159 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3160 spec->volume_offset));
eb06ed8f
TI		 3161 if (err < 0)
3162 return err;
3163 sprintf(name, "%s Playback Switch", pfx);
668b9652 3164 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI		 3165 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3166 if (err < 0)
3167 return err;
3168 return 0;
3169}
3170
668b9652
TI		 3171#define create_controls(codec, pfx, nid, chs) \
3172 create_controls_idx(codec, pfx, 0, nid, chs)
3173
ae0afd81
MR		 3174static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3175{
c21ca4a8 3176 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3177 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3178 return 1;
3179 } else {
dda14410
TI		 3180 snd_BUG_ON(spec->multiout.dac_nids != spec->dac_nids);
3181 spec->dac_nids[spec->multiout.num_dacs] = nid;
ae0afd81
MR		 3182 spec->multiout.num_dacs++;
3183 }
3184 return 0;
3185}
3186
c21ca4a8 3187static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3188{
c21ca4a8
TI		 3189 int i;
3190 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3191 if (!spec->multiout.extra_out_nid[i]) {
3192 spec->multiout.extra_out_nid[i] = nid;
3193 return 0;
3194 }
3195 }
3196 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3197 return 1;
ae0afd81
MR		 3198}
3199
dc04d1b4
TI		 3200/* Create output controls
3201 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3202 */
3203static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3204 const hda_nid_t *pins,
3205 const hda_nid_t *dac_nids,
3206 int type)
c7d4b2fa 3207{
76624534 3208 struct sigmatel_spec *spec = codec->spec;
ea734963 3209 static const char * const chname[4] = {
19039bd0
TI		 3210 "Front", "Surround", NULL /*CLFE*/, "Side"
3211 };
dc04d1b4 3212 hda_nid_t nid;
91589232
TI		 3213 int i, err;
3214 unsigned int wid_caps;
0fb87bb4 3215
dc04d1b4 3216 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
ffd0e56c 3217 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
e35d9d6a 3218 if (is_jack_detectable(codec, pins[i]))
ffd0e56c
TI		 3219 spec->hp_detect = 1;
3220 }
dc04d1b4
TI		 3221 nid = dac_nids[i];
3222 if (!nid)
3223 continue;
3224 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3225 /* Center/LFE */
7c7767eb 3226 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3227 if (err < 0)
c7d4b2fa 3228 return err;
7c7767eb 3229 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3230 if (err < 0)
c7d4b2fa 3231 return err;
0fb87bb4
ML		 3232
3233 wid_caps = get_wcaps(codec, nid);
3234
3235 if (wid_caps & AC_WCAP_LR_SWAP) {
3236 err = stac92xx_add_control(spec,
3237 STAC_CTL_WIDGET_CLFE_SWITCH,
3238 "Swap Center/LFE Playback Switch", nid);
3239
3240 if (err < 0)
3241 return err;
3242 }
3243
c7d4b2fa 3244 } else {
dc04d1b4 3245 const char *name;
668b9652 3246 int idx;
dc04d1b4
TI		 3247 switch (type) {
3248 case AUTO_PIN_HP_OUT:
668b9652
TI		 3249 name = "Headphone";
3250 idx = i;
dc04d1b4
TI		 3251 break;
3252 case AUTO_PIN_SPEAKER_OUT:
668b9652
TI		 3253 name = "Speaker";
3254 idx = i;
dc04d1b4
TI		 3255 break;
3256 default:
3257 name = chname[i];
668b9652 3258 idx = 0;
dc04d1b4 3259 break;
76624534 3260 }
668b9652 3261 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3262 if (err < 0)
c7d4b2fa
M		 3263 return err;
3264 }
3265 }
dc04d1b4
TI		 3266 return 0;
3267}
3268
6479c631
TI		 3269static int stac92xx_add_capvol_ctls(struct hda_codec *codec, unsigned long vol,
3270 unsigned long sw, int idx)
3271{
3272 int err;
3273 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx,
bf677bd8 3274 "Capture Volume", vol);
6479c631
TI		 3275 if (err < 0)
3276 return err;
3277 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_MUTE, idx,
bf677bd8 3278 "Capture Switch", sw);
6479c631
TI		 3279 if (err < 0)
3280 return err;
3281 return 0;
3282}
3283
dc04d1b4
TI		 3284/* add playback controls from the parsed DAC table */
3285static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3286 const struct auto_pin_cfg *cfg)
3287{
3288 struct sigmatel_spec *spec = codec->spec;
7c922de7 3289 hda_nid_t nid;
dc04d1b4 3290 int err;
7c922de7 3291 int idx;
dc04d1b4
TI		 3292
3293 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3294 spec->multiout.dac_nids,
3295 cfg->line_out_type);
3296 if (err < 0)
3297 return err;
c7d4b2fa 3298
a9cb5c90 3299 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3300 err = stac92xx_add_control(spec,
3301 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3302 "Headphone as Line Out Switch",
3303 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3304 if (err < 0)
3305 return err;
3306 }
3307
eea7dc93 3308 for (idx = 0; idx < cfg->num_inputs; idx++) {
86e2959a 3309 if (cfg->inputs[idx].type > AUTO_PIN_LINE_IN)
eea7dc93
TI		 3310 break;
3311 nid = cfg->inputs[idx].pin;
3312 err = stac92xx_add_jack_mode_control(codec, nid, idx);
3313 if (err < 0)
3314 return err;
b5895dc8 3315 }
403d1944 3316
c7d4b2fa
M		 3317 return 0;
3318}
3319
eb06ed8f
TI		 3320/* add playback controls for Speaker and HP outputs */
3321static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3322 struct auto_pin_cfg *cfg)
3323{
3324 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI		 3325 int err;
3326
3327 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3328 spec->hp_dacs, AUTO_PIN_HP_OUT);
3329 if (err < 0)
3330 return err;
3331
3332 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3333 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3334 if (err < 0)
3335 return err;
eb06ed8f 3336
c7d4b2fa
M		 3337 return 0;
3338}
3339
b22b4821 3340/* labels for mono mux outputs */
ea734963 3341static const char * const stac92xx_mono_labels[4] = {
d0513fc6 3342 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3343};
3344
3345/* create mono mux for mono out on capable codecs */
3346static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3347{
3348 struct sigmatel_spec *spec = codec->spec;
3349 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3350 int i, num_cons;
3351 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3352
3353 num_cons = snd_hda_get_connections(codec,
3354 spec->mono_nid,
3355 con_lst,
3356 HDA_MAX_NUM_INPUTS);
16a433d8 3357 if (num_cons <= 0 || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
b22b4821
MR		 3358 return -EINVAL;
3359
10a20af7
TI		 3360 for (i = 0; i < num_cons; i++)
3361 snd_hda_add_imux_item(mono_mux, stac92xx_mono_labels[i], i,
3362 NULL);
09a99959
MR		 3363
3364 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3365 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3366}
3367
1cd2224c
MR		 3368/* create PC beep volume controls */
3369static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3370 hda_nid_t nid)
3371{
3372 struct sigmatel_spec *spec = codec->spec;
3373 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
123c07ae
JK		 3374 int err, type = STAC_CTL_WIDGET_MUTE_BEEP;
3375
3376 if (spec->anabeep_nid == nid)
3377 type = STAC_CTL_WIDGET_MUTE;
1cd2224c
MR		 3378
3379 /* check for mute support for the the amp */
3380 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
123c07ae 3381 err = stac92xx_add_control(spec, type,
d355c82a 3382 "Beep Playback Switch",
1cd2224c
MR		 3383 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3384 if (err < 0)
3385 return err;
3386 }
3387
3388 /* check to see if there is volume support for the amp */
3389 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3390 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
d355c82a 3391 "Beep Playback Volume",
1cd2224c
MR		 3392 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3393 if (err < 0)
3394 return err;
3395 }
3396 return 0;
3397}
3398
4d4e9bb3
TI		 3399#ifdef CONFIG_SND_HDA_INPUT_BEEP
3400#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3401
3402static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3403 struct snd_ctl_elem_value *ucontrol)
3404{
3405 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3406 ucontrol->value.integer.value[0] = codec->beep->enabled;
3407 return 0;
3408}
3409
3410static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3411 struct snd_ctl_elem_value *ucontrol)
3412{
3413 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
123c07ae 3414 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
4d4e9bb3
TI		 3415}
3416
2b63536f 3417static const struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
4d4e9bb3
TI		 3418 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3419 .info = stac92xx_dig_beep_switch_info,
3420 .get = stac92xx_dig_beep_switch_get,
3421 .put = stac92xx_dig_beep_switch_put,
3422};
3423
3424static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3425{
3426 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
d355c82a 3427 0, "Beep Playback Switch", 0);
4d4e9bb3
TI		 3428}
3429#endif
3430
4682eee0
MR		 3431static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3432{
3433 struct sigmatel_spec *spec = codec->spec;
667067d8 3434 int i, j, err = 0;
4682eee0
MR		 3435
3436 for (i = 0; i < spec->num_muxes; i++) {
667067d8
TI		 3437 hda_nid_t nid;
3438 unsigned int wcaps;
3439 unsigned long val;
3440
4682eee0
MR		 3441 nid = spec->mux_nids[i];
3442 wcaps = get_wcaps(codec, nid);
667067d8
TI		 3443 if (!(wcaps & AC_WCAP_OUT_AMP))
3444 continue;
4682eee0 3445
667067d8
TI		 3446 /* check whether already the same control was created as
3447 * normal Capture Volume.
3448 */
3449 val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
3450 for (j = 0; j < spec->num_caps; j++) {
3451 if (spec->capvols[j] == val)
3452 break;
4682eee0 3453 }
667067d8
TI		 3454 if (j < spec->num_caps)
3455 continue;
3456
3457 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, i,
3458 "Mux Capture Volume", val);
3459 if (err < 0)
3460 return err;
4682eee0
MR		 3461 }
3462 return 0;
3463};
3464
ea734963 3465static const char * const stac92xx_spdif_labels[3] = {
65973632 3466 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3467};
3468
3469static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3470{
3471 struct sigmatel_spec *spec = codec->spec;
3472 struct hda_input_mux *spdif_mux = &spec->private_smux;
ea734963 3473 const char * const *labels = spec->spdif_labels;
d9737751 3474 int i, num_cons;
65973632 3475 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3476
3477 num_cons = snd_hda_get_connections(codec,
3478 spec->smux_nids[0],
3479 con_lst,
3480 HDA_MAX_NUM_INPUTS);
16a433d8 3481 if (num_cons <= 0)
d9737751
MR		 3482 return -EINVAL;
3483
65973632
MR		 3484 if (!labels)
3485 labels = stac92xx_spdif_labels;
3486
10a20af7
TI		 3487 for (i = 0; i < num_cons; i++)
3488 snd_hda_add_imux_item(spdif_mux, labels[i], i, NULL);
d9737751
MR		 3489
3490 return 0;
3491}
3492
8b65727b 3493/* labels for dmic mux inputs */
ea734963 3494static const char * const stac92xx_dmic_labels[5] = {
8b65727b
MP		 3495 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3496 "Digital Mic 3", "Digital Mic 4"
3497};
3498
699d8995
VK		 3499static hda_nid_t get_connected_node(struct hda_codec *codec, hda_nid_t mux,
3500 int idx)
3501{
3502 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3503 int nums;
3504 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3505 if (idx >= 0 && idx < nums)
3506 return conn[idx];
3507 return 0;
3508}
3509
8d087c76
TI		 3510/* look for NID recursively */
3511#define get_connection_index(codec, mux, nid) \
3512 snd_hda_get_conn_index(codec, mux, nid, 1)
3d21d3f7 3513
667067d8 3514/* create a volume assigned to the given pin (only if supported) */
96f845de 3515/* return 1 if the volume control is created */
667067d8 3516static int create_elem_capture_vol(struct hda_codec *codec, hda_nid_t nid,
eea7dc93 3517 const char *label, int idx, int direction)
667067d8
TI		 3518{
3519 unsigned int caps, nums;
3520 char name[32];
96f845de 3521 int err;
667067d8 3522
96f845de
TI		 3523 if (direction == HDA_OUTPUT)
3524 caps = AC_WCAP_OUT_AMP;
3525 else
3526 caps = AC_WCAP_IN_AMP;
3527 if (!(get_wcaps(codec, nid) & caps))
667067d8 3528 return 0;
96f845de 3529 caps = query_amp_caps(codec, nid, direction);
667067d8
TI		 3530 nums = (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT;
3531 if (!nums)
3532 return 0;
3533 snprintf(name, sizeof(name), "%s Capture Volume", label);
eea7dc93
TI		 3534 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx, name,
3535 HDA_COMPOSE_AMP_VAL(nid, 3, 0, direction));
96f845de
TI		 3536 if (err < 0)
3537 return err;
3538 return 1;
667067d8
TI		 3539}
3540
8b65727b
MP		 3541/* create playback/capture controls for input pins on dmic capable codecs */
3542static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3543 const struct auto_pin_cfg *cfg)
3544{
3545 struct sigmatel_spec *spec = codec->spec;
5207e10e 3546 struct hda_input_mux *imux = &spec->private_imux;
8b65727b 3547 struct hda_input_mux *dimux = &spec->private_dimux;
263d0328 3548 int err, i;
5207e10e 3549 unsigned int def_conf;
8b65727b 3550
10a20af7 3551 snd_hda_add_imux_item(dimux, stac92xx_dmic_labels[0], 0, NULL);
5207e10e 3552
8b65727b 3553 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3554 hda_nid_t nid;
10a20af7 3555 int index, type_idx;
5207e10e 3556 const char *label;
8b65727b 3557
667067d8
TI		 3558 nid = spec->dmic_nids[i];
3559 if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
3560 continue;
3561 def_conf = snd_hda_codec_get_pincfg(codec, nid);
8b65727b
MP		 3562 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3563 continue;
3564
3d21d3f7
TI		 3565 index = get_connection_index(codec, spec->dmux_nids[0], nid);
3566 if (index < 0)
3567 continue;
3568
10a20af7
TI		 3569 label = hda_get_input_pin_label(codec, nid, 1);
3570 snd_hda_add_imux_item(dimux, label, index, &type_idx);
2d7ec12b
TI		 3571 if (snd_hda_get_bool_hint(codec, "separate_dmux") != 1)
3572 snd_hda_add_imux_item(imux, label, index, &type_idx);
5207e10e 3573
10a20af7
TI		 3574 err = create_elem_capture_vol(codec, nid, label, type_idx,
3575 HDA_INPUT);
667067d8
TI		 3576 if (err < 0)
3577 return err;
96f845de
TI		 3578 if (!err) {
3579 err = create_elem_capture_vol(codec, nid, label,
10a20af7 3580 type_idx, HDA_OUTPUT);
96f845de
TI		 3581 if (err < 0)
3582 return err;
699d8995
VK		 3583 if (!err) {
3584 nid = get_connected_node(codec,
3585 spec->dmux_nids[0], index);
3586 if (nid)
3587 err = create_elem_capture_vol(codec,
3588 nid, label,
3589 type_idx, HDA_INPUT);
3590 if (err < 0)
3591 return err;
3592 }
96f845de 3593 }
8b65727b
MP		 3594 }
3595
3596 return 0;
3597}
3598
3d21d3f7 3599static int check_mic_pin(struct hda_codec *codec, hda_nid_t nid,
9907790a 3600 hda_nid_t *fixed, hda_nid_t *ext, hda_nid_t *dock)
3d21d3f7
TI		 3601{
3602 unsigned int cfg;
1f83ac5a 3603 unsigned int type;
3d21d3f7
TI		 3604
3605 if (!nid)
3606 return 0;
3607 cfg = snd_hda_codec_get_pincfg(codec, nid);
1f83ac5a 3608 type = get_defcfg_device(cfg);
99ae28be
TI		 3609 switch (snd_hda_get_input_pin_attr(cfg)) {
3610 case INPUT_PIN_ATTR_INT:
3d21d3f7
TI		 3611 if (*fixed)
3612 return 1; /* already occupied */
1f83ac5a
TI		 3613 if (type != AC_JACK_MIC_IN)
3614 return 1; /* invalid type */
3d21d3f7
TI		 3615 *fixed = nid;
3616 break;
99ae28be
TI		 3617 case INPUT_PIN_ATTR_UNUSED:
3618 break;
3619 case INPUT_PIN_ATTR_DOCK:
3620 if (*dock)
3621 return 1; /* already occupied */
1f83ac5a
TI		 3622 if (type != AC_JACK_MIC_IN && type != AC_JACK_LINE_IN)
3623 return 1; /* invalid type */
99ae28be
TI		 3624 *dock = nid;
3625 break;
3626 default:
3d21d3f7
TI		 3627 if (*ext)
3628 return 1; /* already occupied */
1f83ac5a
TI		 3629 if (type != AC_JACK_MIC_IN)
3630 return 1; /* invalid type */
3d21d3f7
TI		 3631 *ext = nid;
3632 break;
3633 }
3634 return 0;
3635}
3636
3637static int set_mic_route(struct hda_codec *codec,
3638 struct sigmatel_mic_route *mic,
3639 hda_nid_t pin)
3640{
3641 struct sigmatel_spec *spec = codec->spec;
3642 struct auto_pin_cfg *cfg = &spec->autocfg;
3643 int i;
3644
3645 mic->pin = pin;
9907790a
CC		 3646 if (pin == 0)
3647 return 0;
eea7dc93
TI		 3648 for (i = 0; i < cfg->num_inputs; i++) {
3649 if (pin == cfg->inputs[i].pin)
3d21d3f7 3650 break;
eea7dc93 3651 }
86e2959a 3652 if (i < cfg->num_inputs && cfg->inputs[i].type == AUTO_PIN_MIC) {
3d21d3f7 3653 /* analog pin */
3d21d3f7
TI		 3654 i = get_connection_index(codec, spec->mux_nids[0], pin);
3655 if (i < 0)
3656 return -1;
3657 mic->mux_idx = i;
02d33322
TI		 3658 mic->dmux_idx = -1;
3659 if (spec->dmux_nids)
3660 mic->dmux_idx = get_connection_index(codec,
3661 spec->dmux_nids[0],
3662 spec->mux_nids[0]);
da2a2aaa 3663 } else if (spec->dmux_nids) {
3d21d3f7 3664 /* digital pin */
3d21d3f7
TI		 3665 i = get_connection_index(codec, spec->dmux_nids[0], pin);
3666 if (i < 0)
3667 return -1;
3668 mic->dmux_idx = i;
02d33322
TI		 3669 mic->mux_idx = -1;
3670 if (spec->mux_nids)
3671 mic->mux_idx = get_connection_index(codec,
3672 spec->mux_nids[0],
3673 spec->dmux_nids[0]);
3d21d3f7
TI		 3674 }
3675 return 0;
3676}
3677
3678/* return non-zero if the device is for automatic mic switch */
3679static int stac_check_auto_mic(struct hda_codec *codec)
3680{
3681 struct sigmatel_spec *spec = codec->spec;
3682 struct auto_pin_cfg *cfg = &spec->autocfg;
9907790a 3683 hda_nid_t fixed, ext, dock;
3d21d3f7
TI		 3684 int i;
3685
9907790a 3686 fixed = ext = dock = 0;
eea7dc93 3687 for (i = 0; i < cfg->num_inputs; i++)
9907790a
CC		 3688 if (check_mic_pin(codec, cfg->inputs[i].pin,
3689 &fixed, &ext, &dock))
3d21d3f7
TI		 3690 return 0;
3691 for (i = 0; i < spec->num_dmics; i++)
9907790a
CC		 3692 if (check_mic_pin(codec, spec->dmic_nids[i],
3693 &fixed, &ext, &dock))
3d21d3f7 3694 return 0;
80c67852 3695 if (!fixed || (!ext && !dock))
9907790a 3696 return 0; /* no input to switch */
e35d9d6a 3697 if (!is_jack_detectable(codec, ext))
3d21d3f7
TI		 3698 return 0; /* no unsol support */
3699 if (set_mic_route(codec, &spec->ext_mic, ext) ||
9907790a
CC		 3700 set_mic_route(codec, &spec->int_mic, fixed) ||
3701 set_mic_route(codec, &spec->dock_mic, dock))
3d21d3f7
TI		 3702 return 0; /* something is wrong */
3703 return 1;
3704}
3705
c7d4b2fa
M		 3706/* create playback/capture controls for input pins */
3707static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3708{
3709 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 3710 struct hda_input_mux *imux = &spec->private_imux;
667067d8 3711 int i, j;
263d0328 3712 const char *label;
c7d4b2fa 3713
eea7dc93
TI		 3714 for (i = 0; i < cfg->num_inputs; i++) {
3715 hda_nid_t nid = cfg->inputs[i].pin;
10a20af7 3716 int index, err, type_idx;
314634bc 3717
314634bc
TI		 3718 index = -1;
3719 for (j = 0; j < spec->num_muxes; j++) {
667067d8
TI		 3720 index = get_connection_index(codec, spec->mux_nids[j],
3721 nid);
3722 if (index >= 0)
3723 break;
c7d4b2fa 3724 }
667067d8
TI		 3725 if (index < 0)
3726 continue;
3727
10a20af7
TI		 3728 label = hda_get_autocfg_input_label(codec, cfg, i);
3729 snd_hda_add_imux_item(imux, label, index, &type_idx);
263d0328 3730
667067d8 3731 err = create_elem_capture_vol(codec, nid,
263d0328 3732 label, type_idx,
96f845de 3733 HDA_INPUT);
667067d8
TI		 3734 if (err < 0)
3735 return err;
c7d4b2fa 3736 }
5207e10e 3737 spec->num_analog_muxes = imux->num_items;
c7d4b2fa 3738
7b043899 3739 if (imux->num_items) {
62fe78e9
SR		 3740 /*
3741 * Set the current input for the muxes.
3742 * The STAC9221 has two input muxes with identical source
3743 * NID lists. Hopefully this won't get confused.
3744 */
3745 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3746 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3747 AC_VERB_SET_CONNECT_SEL,
3748 imux->items[0].index);
62fe78e9
SR		 3749 }
3750 }
3751
c7d4b2fa
M		 3752 return 0;
3753}
3754
c7d4b2fa
M		 3755static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3756{
3757 struct sigmatel_spec *spec = codec->spec;
3758 int i;
3759
3760 for (i = 0; i < spec->autocfg.line_outs; i++) {
3761 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3762 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3763 }
3764}
3765
3766static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3767{
3768 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3769 int i;
c7d4b2fa 3770
eb06ed8f
TI		 3771 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3772 hda_nid_t pin;
3773 pin = spec->autocfg.hp_pins[i];
3774 if (pin) /* connect to front */
3775 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3776 }
3777 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3778 hda_nid_t pin;
3779 pin = spec->autocfg.speaker_pins[i];
3780 if (pin) /* connect to front */
3781 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3782 }
c7d4b2fa
M		 3783}
3784
8af3aeb4
TI		 3785static int is_dual_headphones(struct hda_codec *codec)
3786{
3787 struct sigmatel_spec *spec = codec->spec;
3788 int i, valid_hps;
3789
3790 if (spec->autocfg.line_out_type != AUTO_PIN_SPEAKER_OUT ||
3791 spec->autocfg.hp_outs <= 1)
3792 return 0;
3793 valid_hps = 0;
3794 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3795 hda_nid_t nid = spec->autocfg.hp_pins[i];
3796 unsigned int cfg = snd_hda_codec_get_pincfg(codec, nid);
3797 if (get_defcfg_location(cfg) & AC_JACK_LOC_SEPARATE)
3798 continue;
3799 valid_hps++;
3800 }
3801 return (valid_hps > 1);
3802}
3803
3804
9009b0e4 3805static int stac92xx_parse_auto_config(struct hda_codec *codec)
c7d4b2fa
M		 3806{
3807 struct sigmatel_spec *spec = codec->spec;
9009b0e4 3808 hda_nid_t dig_out = 0, dig_in = 0;
dc04d1b4 3809 int hp_swap = 0;
6479c631 3810 int i, err;
c7d4b2fa 3811
8b65727b
MP		 3812 if ((err = snd_hda_parse_pin_def_config(codec,
3813 &spec->autocfg,
3814 spec->dmic_nids)) < 0)
c7d4b2fa 3815 return err;
82bc955f 3816 if (! spec->autocfg.line_outs)
869264c4 3817 return 0; /* can't find valid pin config */
19039bd0 3818
bcecd9bd
JZ		 3819 /* If we have no real line-out pin and multiple hp-outs, HPs should
3820 * be set up as multi-channel outputs.
3821 */
8af3aeb4 3822 if (is_dual_headphones(codec)) {
bcecd9bd
JZ		 3823 /* Copy hp_outs to line_outs, backup line_outs in
3824 * speaker_outs so that the following routines can handle
3825 * HP pins as primary outputs.
3826 */
c21ca4a8 3827 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3828 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3829 sizeof(spec->autocfg.line_out_pins));
3830 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3831 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3832 sizeof(spec->autocfg.hp_pins));
3833 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3834 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3835 spec->autocfg.hp_outs = 0;
dc04d1b4 3836 hp_swap = 1;
bcecd9bd 3837 }
09a99959 3838 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3839 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3840 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3841 u32 caps = query_amp_caps(codec,
3842 spec->autocfg.mono_out_pin, dir);
3843 hda_nid_t conn_list[1];
3844
3845 /* get the mixer node and then the mono mux if it exists */
3846 if (snd_hda_get_connections(codec,
3847 spec->autocfg.mono_out_pin, conn_list, 1) &&
3848 snd_hda_get_connections(codec, conn_list[0],
16a433d8 3849 conn_list, 1) > 0) {
09a99959
MR		 3850
3851 int wcaps = get_wcaps(codec, conn_list[0]);
a22d543a 3852 int wid_type = get_wcaps_type(wcaps);
09a99959
MR		 3853 /* LR swap check, some stac925x have a mux that
3854 * changes the DACs output path instead of the
3855 * mono-mux path.
3856 */
3857 if (wid_type == AC_WID_AUD_SEL &&
3858 !(wcaps & AC_WCAP_LR_SWAP))
3859 spec->mono_nid = conn_list[0];
3860 }
d0513fc6
MR		 3861 if (dir) {
3862 hda_nid_t nid = spec->autocfg.mono_out_pin;
3863
3864 /* most mono outs have a least a mute/unmute switch */
3865 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3866 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3867 "Mono Playback Switch",
3868 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3869 if (err < 0)
3870 return err;
d0513fc6
MR		 3871 /* check for volume support for the amp */
3872 if ((caps & AC_AMPCAP_NUM_STEPS)
3873 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3874 err = stac92xx_add_control(spec,
3875 STAC_CTL_WIDGET_VOL,
3876 "Mono Playback Volume",
3877 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3878 if (err < 0)
3879 return err;
3880 }
09a99959
MR		 3881 }
3882
3883 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3884 AC_PINCTL_OUT_EN);
3885 }
bcecd9bd 3886
c21ca4a8
TI		 3887 if (!spec->multiout.num_dacs) {
3888 err = stac92xx_auto_fill_dac_nids(codec);
3889 if (err < 0)
19039bd0 3890 return err;
c9280d68
TI		 3891 err = stac92xx_auto_create_multi_out_ctls(codec,
3892 &spec->autocfg);
3893 if (err < 0)
3894 return err;
c21ca4a8 3895 }
c7d4b2fa 3896
1cd2224c
MR		 3897 /* setup analog beep controls */
3898 if (spec->anabeep_nid > 0) {
3899 err = stac92xx_auto_create_beep_ctls(codec,
3900 spec->anabeep_nid);
3901 if (err < 0)
3902 return err;
3903 }
3904
3905 /* setup digital beep controls and input device */
3906#ifdef CONFIG_SND_HDA_INPUT_BEEP
3907 if (spec->digbeep_nid > 0) {
3908 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3909 unsigned int caps;
1cd2224c
MR		 3910
3911 err = stac92xx_auto_create_beep_ctls(codec, nid);
3912 if (err < 0)
3913 return err;
3914 err = snd_hda_attach_beep_device(codec, nid);
3915 if (err < 0)
3916 return err;
d8d881dd
TI		 3917 if (codec->beep) {
3918 /* IDT/STAC codecs have linear beep tone parameter */
1b0e372d 3919 codec->beep->linear_tone = spec->linear_tone_beep;
d8d881dd
TI		 3920 /* if no beep switch is available, make its own one */
3921 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3922 if (!(caps & AC_AMPCAP_MUTE)) {
3923 err = stac92xx_beep_switch_ctl(codec);
3924 if (err < 0)
3925 return err;
3926 }
4d4e9bb3 3927 }
1cd2224c
MR		 3928 }
3929#endif
3930
0fb87bb4 3931 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML		 3932 if (err < 0)
3933 return err;
3934
dc04d1b4
TI		 3935 /* All output parsing done, now restore the swapped hp pins */
3936 if (hp_swap) {
3937 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3938 sizeof(spec->autocfg.hp_pins));
3939 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3940 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3941 spec->autocfg.line_outs = 0;
3942 }
0fb87bb4 3943
3d21d3f7
TI		 3944 if (stac_check_auto_mic(codec)) {
3945 spec->auto_mic = 1;
3946 /* only one capture for auto-mic */
3947 spec->num_adcs = 1;
3948 spec->num_caps = 1;
3949 spec->num_muxes = 1;
3950 }
3951
6479c631
TI		 3952 for (i = 0; i < spec->num_caps; i++) {
3953 err = stac92xx_add_capvol_ctls(codec, spec->capvols[i],
3954 spec->capsws[i], i);
3955 if (err < 0)
3956 return err;
3957 }
3958
dc04d1b4 3959 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 3960 if (err < 0)
c7d4b2fa
M		 3961 return err;
3962
b22b4821
MR		 3963 if (spec->mono_nid > 0) {
3964 err = stac92xx_auto_create_mono_output_ctls(codec);
3965 if (err < 0)
3966 return err;
3967 }
2a9c7816 3968 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3969 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3970 &spec->autocfg)) < 0)
3971 return err;
4682eee0
MR		 3972 if (spec->num_muxes > 0) {
3973 err = stac92xx_auto_create_mux_input_ctls(codec);
3974 if (err < 0)
3975 return err;
3976 }
d9737751
MR		 3977 if (spec->num_smuxes > 0) {
3978 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3979 if (err < 0)
3980 return err;
3981 }
8b65727b 3982
e3c75964
TI		 3983 err = stac92xx_add_input_source(spec);
3984 if (err < 0)
3985 return err;
3986
c7d4b2fa 3987 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3988 if (spec->multiout.max_channels > 2)
c7d4b2fa 3989 spec->surr_switch = 1;
c7d4b2fa 3990
9009b0e4
CC		 3991 /* find digital out and in converters */
3992 for (i = codec->start_nid; i < codec->start_nid + codec->num_nodes; i++) {
3993 unsigned int wid_caps = get_wcaps(codec, i);
3994 if (wid_caps & AC_WCAP_DIGITAL) {
3995 switch (get_wcaps_type(wid_caps)) {
3996 case AC_WID_AUD_OUT:
3997 if (!dig_out)
3998 dig_out = i;
3999 break;
4000 case AC_WID_AUD_IN:
4001 if (!dig_in)
4002 dig_in = i;
4003 break;
4004 }
4005 }
4006 }
0852d7a6 4007 if (spec->autocfg.dig_outs)
3cc08dc6 4008 spec->multiout.dig_out_nid = dig_out;
d0513fc6 4009 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 4010 spec->dig_in_nid = dig_in;
c7d4b2fa 4011
603c4019
TI		 4012 if (spec->kctls.list)
4013 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 4014
4015 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 4016 if (!spec->dinput_mux)
4017 spec->dinput_mux = &spec->private_dimux;
d9737751 4018 spec->sinput_mux = &spec->private_smux;
b22b4821 4019 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 4020 return 1;
4021}
4022
82bc955f
TI		 4023/* add playback controls for HP output */
4024static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
4025 struct auto_pin_cfg *cfg)
4026{
4027 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 4028 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 4029
4030 if (! pin)
4031 return 0;
4032
e35d9d6a 4033 if (is_jack_detectable(codec, pin))
82bc955f 4034 spec->hp_detect = 1;
82bc955f
TI		 4035
4036 return 0;
4037}
4038
160ea0dc
RF		 4039/* add playback controls for LFE output */
4040static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
4041 struct auto_pin_cfg *cfg)
4042{
4043 struct sigmatel_spec *spec = codec->spec;
4044 int err;
4045 hda_nid_t lfe_pin = 0x0;
4046 int i;
4047
4048 /*
4049 * search speaker outs and line outs for a mono speaker pin
4050 * with an amp. If one is found, add LFE controls
4051 * for it.
4052 */
4053 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
4054 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 4055 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 4056 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4057 if (wcaps == AC_WCAP_OUT_AMP)
4058 /* found a mono speaker with an amp, must be lfe */
4059 lfe_pin = pin;
4060 }
4061
4062 /* if speaker_outs is 0, then speakers may be in line_outs */
4063 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
4064 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
4065 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 4066 unsigned int defcfg;
330ee995 4067 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 4068 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 4069 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 4070 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4071 if (wcaps == AC_WCAP_OUT_AMP)
4072 /* found a mono speaker with an amp,
4073 must be lfe */
4074 lfe_pin = pin;
4075 }
4076 }
4077 }
4078
4079 if (lfe_pin) {
7c7767eb 4080 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF		 4081 if (err < 0)
4082 return err;
4083 }
4084
4085 return 0;
4086}
4087
c7d4b2fa
M		 4088static int stac9200_parse_auto_config(struct hda_codec *codec)
4089{
4090 struct sigmatel_spec *spec = codec->spec;
4091 int err;
4092
df694daa 4093 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 4094 return err;
4095
4096 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
4097 return err;
4098
82bc955f
TI		 4099 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
4100 return err;
4101
160ea0dc
RF		 4102 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
4103 return err;
4104
355a0ec4
TI		 4105 if (spec->num_muxes > 0) {
4106 err = stac92xx_auto_create_mux_input_ctls(codec);
4107 if (err < 0)
4108 return err;
4109 }
4110
e3c75964
TI		 4111 err = stac92xx_add_input_source(spec);
4112 if (err < 0)
4113 return err;
4114
0852d7a6 4115 if (spec->autocfg.dig_outs)
c7d4b2fa 4116 spec->multiout.dig_out_nid = 0x05;
82bc955f 4117 if (spec->autocfg.dig_in_pin)
c7d4b2fa 4118 spec->dig_in_nid = 0x04;
c7d4b2fa 4119
603c4019
TI		 4120 if (spec->kctls.list)
4121 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 4122
4123 spec->input_mux = &spec->private_imux;
8b65727b 4124 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 4125
4126 return 1;
4127}
4128
62fe78e9
SR		 4129/*
4130 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
4131 * funky external mute control using GPIO pins.
4132 */
4133
76e1ddfb 4134static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 4135 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 4136{
4137 unsigned int gpiostate, gpiomask, gpiodir;
4138
45eebda7
VK		 4139 snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
4140
62fe78e9
SR		 4141 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
4142 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 4143 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 4144
4145 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
4146 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 4147 gpiomask |= mask;
62fe78e9
SR		 4148
4149 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
4150 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 4151 gpiodir |= dir_mask;
62fe78e9 4152
76e1ddfb 4153 /* Configure GPIOx as CMOS */
62fe78e9
SR		 4154 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
4155
4156 snd_hda_codec_write(codec, codec->afg, 0,
4157 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 4158 snd_hda_codec_read(codec, codec->afg, 0,
4159 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 4160
4161 msleep(1);
4162
76e1ddfb
TI		 4163 snd_hda_codec_read(codec, codec->afg, 0,
4164 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 4165}
4166
74aeaabc
MR		 4167static int stac92xx_add_jack(struct hda_codec *codec,
4168 hda_nid_t nid, int type)
4169{
8c8145b8 4170#ifdef CONFIG_SND_HDA_INPUT_JACK
330ee995 4171 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
74aeaabc 4172 int connectivity = get_defcfg_connect(def_conf);
74aeaabc
MR		 4173
4174 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
4175 return 0;
4176
eb335a40
DH		 4177 return snd_hda_input_jack_add(codec, nid, type, NULL);
4178#else
95c09099 4179 return 0;
eb335a40 4180#endif /* CONFIG_SND_HDA_INPUT_JACK */
74aeaabc
MR		 4181}
4182
c6e4c666
TI		 4183static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
4184 unsigned char type, int data)
74aeaabc
MR		 4185{
4186 struct sigmatel_event *event;
4187
4188 snd_array_init(&spec->events, sizeof(*event), 32);
4189 event = snd_array_new(&spec->events);
4190 if (!event)
4191 return -ENOMEM;
4192 event->nid = nid;
c6e4c666
TI		 4193 event->type = type;
4194 event->tag = spec->events.used;
74aeaabc
MR		 4195 event->data = data;
4196
c6e4c666 4197 return event->tag;
74aeaabc
MR		 4198}
4199
c6e4c666 4200static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
62558ce1 4201 hda_nid_t nid)
74aeaabc
MR		 4202{
4203 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4204 struct sigmatel_event *event = spec->events.list;
4205 int i;
4206
4207 for (i = 0; i < spec->events.used; i++, event++) {
62558ce1 4208 if (event->nid == nid)
c6e4c666 4209 return event;
74aeaabc 4210 }
c6e4c666 4211 return NULL;
74aeaabc
MR		 4212}
4213
c6e4c666
TI		 4214static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
4215 unsigned char tag)
314634bc 4216{
c6e4c666
TI		 4217 struct sigmatel_spec *spec = codec->spec;
4218 struct sigmatel_event *event = spec->events.list;
4219 int i;
4220
4221 for (i = 0; i < spec->events.used; i++, event++) {
4222 if (event->tag == tag)
4223 return event;
74aeaabc 4224 }
c6e4c666
TI		 4225 return NULL;
4226}
4227
62558ce1
TI		 4228/* check if given nid is a valid pin and no other events are assigned
4229 * to it. If OK, assign the event, set the unsol flag, and returns 1.
4230 * Otherwise, returns zero.
4231 */
4232static int enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
4233 unsigned int type)
c6e4c666
TI		 4234{
4235 struct sigmatel_event *event;
4236 int tag;
4237
e35d9d6a 4238 if (!is_jack_detectable(codec, nid))
62558ce1
TI		 4239 return 0;
4240 event = stac_get_event(codec, nid);
4241 if (event) {
4242 if (event->type != type)
4243 return 0;
c6e4c666 4244 tag = event->tag;
62558ce1 4245 } else {
c6e4c666 4246 tag = stac_add_event(codec->spec, nid, type, 0);
62558ce1
TI		 4247 if (tag < 0)
4248 return 0;
4249 }
c6e4c666
TI		 4250 snd_hda_codec_write_cache(codec, nid, 0,
4251 AC_VERB_SET_UNSOLICITED_ENABLE,
4252 AC_USRSP_EN | tag);
62558ce1 4253 return 1;
314634bc
TI		 4254}
4255
a64135a2
MR		 4256static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
4257{
4258 int i;
4259 for (i = 0; i < cfg->hp_outs; i++)
4260 if (cfg->hp_pins[i] == nid)
4261 return 1; /* nid is a HP-Out */
4262
4263 return 0; /* nid is not a HP-Out */
4264};
4265
b76c850f
MR		 4266static void stac92xx_power_down(struct hda_codec *codec)
4267{
4268 struct sigmatel_spec *spec = codec->spec;
4269
4270 /* power down inactive DACs */
2b63536f 4271 const hda_nid_t *dac;
b76c850f 4272 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4273 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4274 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 4275 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4276}
4277
f73d3585
TI		 4278static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4279 int enable);
4280
014c41fc
TI		 4281static inline int get_int_hint(struct hda_codec *codec, const char *key,
4282 int *valp)
4283{
4284 const char *p;
4285 p = snd_hda_get_hint(codec, key);
4286 if (p) {
4287 unsigned long val;
4288 if (!strict_strtoul(p, 0, &val)) {
4289 *valp = val;
4290 return 1;
4291 }
4292 }
4293 return 0;
4294}
4295
6565e4fa
TI		 4296/* override some hints from the hwdep entry */
4297static void stac_store_hints(struct hda_codec *codec)
4298{
4299 struct sigmatel_spec *spec = codec->spec;
6565e4fa
TI		 4300 int val;
4301
4302 val = snd_hda_get_bool_hint(codec, "hp_detect");
4303 if (val >= 0)
4304 spec->hp_detect = val;
014c41fc 4305 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
6565e4fa
TI		 4306 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
4307 spec->gpio_mask;
4308 }
014c41fc
TI		 4309 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
4310 spec->gpio_mask &= spec->gpio_mask;
4311 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
4312 spec->gpio_dir &= spec->gpio_mask;
4313 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
4314 spec->eapd_mask &= spec->gpio_mask;
4315 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
4316 spec->gpio_mute &= spec->gpio_mask;
6565e4fa
TI		 4317 val = snd_hda_get_bool_hint(codec, "eapd_switch");
4318 if (val >= 0)
4319 spec->eapd_switch = val;
014c41fc
TI		 4320 get_int_hint(codec, "gpio_led_polarity", &spec->gpio_led_polarity);
4321 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
f1a73746
TI		 4322 spec->gpio_mask |= spec->gpio_led;
4323 spec->gpio_dir |= spec->gpio_led;
4324 if (spec->gpio_led_polarity)
4325 spec->gpio_data |= spec->gpio_led;
043958e6 4326 }
6565e4fa
TI		 4327}
4328
c7d4b2fa
M		 4329static int stac92xx_init(struct hda_codec *codec)
4330{
4331 struct sigmatel_spec *spec = codec->spec;
82bc955f 4332 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4333 unsigned int gpio;
e4973e1e 4334 int i;
c7d4b2fa 4335
c7d4b2fa
M		 4336 snd_hda_sequence_write(codec, spec->init);
4337
8daaaa97
MR		 4338 /* power down adcs initially */
4339 if (spec->powerdown_adcs)
4340 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4341 snd_hda_codec_write(codec,
8daaaa97
MR		 4342 spec->adc_nids[i], 0,
4343 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4344
6565e4fa
TI		 4345 /* override some hints */
4346 stac_store_hints(codec);
4347
f73d3585
TI		 4348 /* set up GPIO */
4349 gpio = spec->gpio_data;
4350 /* turn on EAPD statically when spec->eapd_switch isn't set.
4351 * otherwise, unsol event will turn it on/off dynamically
4352 */
4353 if (!spec->eapd_switch)
4354 gpio |= spec->eapd_mask;
4355 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4356
82bc955f
TI		 4357 /* set up pins */
4358 if (spec->hp_detect) {
505cb341 4359 /* Enable unsolicited responses on the HP widget */
74aeaabc 4360 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4361 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4362 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4363 }
1c4bdf9b
TI		 4364 if (cfg->line_out_type == AUTO_PIN_LINE_OUT &&
4365 cfg->speaker_outs > 0) {
fefd67f3 4366 /* enable pin-detect for line-outs as well */
15cfa2b3
TI		 4367 for (i = 0; i < cfg->line_outs; i++) {
4368 hda_nid_t nid = cfg->line_out_pins[i];
fefd67f3
TI		 4369 enable_pin_detect(codec, nid, STAC_LO_EVENT);
4370 }
4371 }
4372
0a07acaf
TI		 4373 /* force to enable the first line-out; the others are set up
4374 * in unsol_event
4375 */
4376 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4377 AC_PINCTL_OUT_EN);
82bc955f 4378 /* fake event to set up pins */
5f380eb1
TI		 4379 if (cfg->hp_pins[0])
4380 stac_issue_unsol_event(codec, cfg->hp_pins[0]);
4381 else if (cfg->line_out_pins[0])
4382 stac_issue_unsol_event(codec, cfg->line_out_pins[0]);
82bc955f
TI		 4383 } else {
4384 stac92xx_auto_init_multi_out(codec);
4385 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 4386 for (i = 0; i < cfg->hp_outs; i++)
4387 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f 4388 }
3d21d3f7 4389 if (spec->auto_mic) {
15b4f296 4390 /* initialize connection to analog input */
da2a2aaa
TI		 4391 if (spec->dmux_nids)
4392 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
15b4f296 4393 AC_VERB_SET_CONNECT_SEL, 0);
3d21d3f7
TI		 4394 if (enable_pin_detect(codec, spec->ext_mic.pin, STAC_MIC_EVENT))
4395 stac_issue_unsol_event(codec, spec->ext_mic.pin);
9907790a
CC		 4396 if (enable_pin_detect(codec, spec->dock_mic.pin,
4397 STAC_MIC_EVENT))
4398 stac_issue_unsol_event(codec, spec->dock_mic.pin);
3d21d3f7 4399 }
eea7dc93
TI		 4400 for (i = 0; i < cfg->num_inputs; i++) {
4401 hda_nid_t nid = cfg->inputs[i].pin;
4402 int type = cfg->inputs[i].type;
4403 unsigned int pinctl, conf;
86e2959a 4404 if (type == AUTO_PIN_MIC) {
eea7dc93
TI		 4405 /* for mic pins, force to initialize */
4406 pinctl = stac92xx_get_default_vref(codec, nid);
4407 pinctl |= AC_PINCTL_IN_EN;
4408 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4409 } else {
4410 pinctl = snd_hda_codec_read(codec, nid, 0,
4411 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4412 /* if PINCTL already set then skip */
4413 /* Also, if both INPUT and OUTPUT are set,
4414 * it must be a BIOS bug; need to override, too
4415 */
4416 if (!(pinctl & AC_PINCTL_IN_EN) ||
4417 (pinctl & AC_PINCTL_OUT_EN)) {
4418 pinctl &= ~AC_PINCTL_OUT_EN;
12dde4c6
TI		 4419 pinctl |= AC_PINCTL_IN_EN;
4420 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3 4421 }
c960a03b 4422 }
eea7dc93
TI		 4423 conf = snd_hda_codec_get_pincfg(codec, nid);
4424 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4425 if (enable_pin_detect(codec, nid, STAC_INSERT_EVENT))
4426 stac_issue_unsol_event(codec, nid);
4427 }
82bc955f 4428 }
a64135a2
MR		 4429 for (i = 0; i < spec->num_dmics; i++)
4430 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4431 AC_PINCTL_IN_EN);
0852d7a6
TI		 4432 if (cfg->dig_out_pins[0])
4433 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI		 4434 AC_PINCTL_OUT_EN);
4435 if (cfg->dig_in_pin)
4436 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4437 AC_PINCTL_IN_EN);
a64135a2 4438 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4439 hda_nid_t nid = spec->pwr_nids[i];
4440 int pinctl, def_conf;
f73d3585 4441
eb632128 4442 /* power on when no jack detection is available */
542c9a0a
TI		 4443 /* or when the VREF is used for controlling LED */
4444 if (!spec->hp_detect ||
a0204283 4445 spec->vref_mute_led_nid == nid) {
eb632128
TI		 4446 stac_toggle_power_map(codec, nid, 1);
4447 continue;
4448 }
4449
4450 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI		 4451 continue; /* already has an unsol event */
4452
4453 pinctl = snd_hda_codec_read(codec, nid, 0,
4454 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4455 /* outputs are only ports capable of power management
4456 * any attempts on powering down a input port cause the
4457 * referenced VREF to act quirky.
4458 */
eb632128
TI		 4459 if (pinctl & AC_PINCTL_IN_EN) {
4460 stac_toggle_power_map(codec, nid, 1);
a64135a2 4461 continue;
eb632128 4462 }
330ee995 4463 def_conf = snd_hda_codec_get_pincfg(codec, nid);
f73d3585 4464 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4465 /* skip any ports that don't have jacks since presence
4466 * detection is useless */
f73d3585
TI		 4467 if (def_conf != AC_JACK_PORT_COMPLEX) {
4468 if (def_conf != AC_JACK_PORT_NONE)
4469 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4470 continue;
f73d3585 4471 }
afef2cfa 4472 if (enable_pin_detect(codec, nid, STAC_PWR_EVENT)) {
62558ce1 4473 stac_issue_unsol_event(codec, nid);
afef2cfa
CC		 4474 continue;
4475 }
4476 /* none of the above, turn the port OFF */
4477 stac_toggle_power_map(codec, nid, 0);
a64135a2 4478 }
c21bd025 4479
c21bd025 4480 /* sync mute LED */
9e5341b9
TI		 4481 if (spec->gpio_led)
4482 hda_call_check_power_status(codec, 0x01);
b76c850f
MR		 4483 if (spec->dac_list)
4484 stac92xx_power_down(codec);
c7d4b2fa
M		 4485 return 0;
4486}
4487
603c4019
TI		 4488static void stac92xx_free_kctls(struct hda_codec *codec)
4489{
4490 struct sigmatel_spec *spec = codec->spec;
4491
4492 if (spec->kctls.list) {
4493 struct snd_kcontrol_new *kctl = spec->kctls.list;
4494 int i;
4495 for (i = 0; i < spec->kctls.used; i++)
4496 kfree(kctl[i].name);
4497 }
4498 snd_array_free(&spec->kctls);
4499}
4500
45eebda7
VK		 4501static void stac92xx_shutup_pins(struct hda_codec *codec)
4502{
4503 unsigned int i, def_conf;
4504
4505 if (codec->bus->shutdown)
4506 return;
4507 for (i = 0; i < codec->init_pins.used; i++) {
4508 struct hda_pincfg *pin = snd_array_elem(&codec->init_pins, i);
4509 def_conf = snd_hda_codec_get_pincfg(codec, pin->nid);
4510 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE)
4511 snd_hda_codec_write(codec, pin->nid, 0,
4512 AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
4513 }
4514}
4515
167eae5a
TI		 4516static void stac92xx_shutup(struct hda_codec *codec)
4517{
4518 struct sigmatel_spec *spec = codec->spec;
167eae5a 4519
45eebda7 4520 stac92xx_shutup_pins(codec);
167eae5a
TI		 4521
4522 if (spec->eapd_mask)
4523 stac_gpio_set(codec, spec->gpio_mask,
4524 spec->gpio_dir, spec->gpio_data &
4525 ~spec->eapd_mask);
4526}
4527
2f2f4251
M		 4528static void stac92xx_free(struct hda_codec *codec)
4529{
c7d4b2fa 4530 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4531
4532 if (! spec)
4533 return;
4534
167eae5a 4535 stac92xx_shutup(codec);
cd372fb3 4536 snd_hda_input_jack_free(codec);
74aeaabc 4537 snd_array_free(&spec->events);
11b44bbd 4538
c7d4b2fa 4539 kfree(spec);
1cd2224c 4540 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4541}
4542
4e55096e
M		 4543static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4544 unsigned int flag)
4545{
8ce84198
TI		 4546 unsigned int old_ctl, pin_ctl;
4547
4548 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4549 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4550
f9acba43
TI		 4551 if (pin_ctl & AC_PINCTL_IN_EN) {
4552 /*
4553 * we need to check the current set-up direction of
4554 * shared input pins since they can be switched via
4555 * "xxx as Output" mixer switch
4556 */
4557 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4558 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4559 return;
4560 }
4561
8ce84198 4562 old_ctl = pin_ctl;
7b043899
SL		 4563 /* if setting pin direction bits, clear the current
4564 direction bits first */
4565 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4566 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4567
8ce84198
TI		 4568 pin_ctl |= flag;
4569 if (old_ctl != pin_ctl)
4570 snd_hda_codec_write_cache(codec, nid, 0,
4571 AC_VERB_SET_PIN_WIDGET_CONTROL,
4572 pin_ctl);
4e55096e
M		 4573}
4574
4575static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4576 unsigned int flag)
4577{
4578 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4579 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI		 4580 if (pin_ctl & flag)
4581 snd_hda_codec_write_cache(codec, nid, 0,
4582 AC_VERB_SET_PIN_WIDGET_CONTROL,
4583 pin_ctl & ~flag);
4e55096e
M		 4584}
4585
d56757ab 4586static inline int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4587{
4588 if (!nid)
4589 return 0;
a252c81a 4590 return snd_hda_jack_detect(codec, nid);
314634bc
TI		 4591}
4592
fefd67f3
TI		 4593static void stac92xx_line_out_detect(struct hda_codec *codec,
4594 int presence)
4595{
4596 struct sigmatel_spec *spec = codec->spec;
4597 struct auto_pin_cfg *cfg = &spec->autocfg;
4598 int i;
4599
4600 for (i = 0; i < cfg->line_outs; i++) {
4601 if (presence)
4602 break;
4603 presence = get_pin_presence(codec, cfg->line_out_pins[i]);
4604 if (presence) {
4605 unsigned int pinctl;
4606 pinctl = snd_hda_codec_read(codec,
4607 cfg->line_out_pins[i], 0,
4608 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4609 if (pinctl & AC_PINCTL_IN_EN)
4610 presence = 0; /* mic- or line-input */
4611 }
4612 }
4613
4614 if (presence) {
4615 /* disable speakers */
4616 for (i = 0; i < cfg->speaker_outs; i++)
4617 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4618 AC_PINCTL_OUT_EN);
4619 if (spec->eapd_mask && spec->eapd_switch)
4620 stac_gpio_set(codec, spec->gpio_mask,
4621 spec->gpio_dir, spec->gpio_data &
4622 ~spec->eapd_mask);
4623 } else {
4624 /* enable speakers */
4625 for (i = 0; i < cfg->speaker_outs; i++)
4626 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4627 AC_PINCTL_OUT_EN);
4628 if (spec->eapd_mask && spec->eapd_switch)
4629 stac_gpio_set(codec, spec->gpio_mask,
4630 spec->gpio_dir, spec->gpio_data |
4631 spec->eapd_mask);
4632 }
4633}
4634
d7a89436
TI		 4635/* return non-zero if the hp-pin of the given array index isn't
4636 * a jack-detection target
4637 */
4638static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4639{
4640 struct auto_pin_cfg *cfg = &spec->autocfg;
4641
4642 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4643 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4644 return 1;
c21ca4a8 4645 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4646 return 1;
4647 /* ignore if the pin is set as line-out */
4648 if (cfg->hp_pins[i] == spec->hp_switch)
4649 return 1;
4650 return 0;
4651}
4652
c6e4c666 4653static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4654{
4655 struct sigmatel_spec *spec = codec->spec;
4656 struct auto_pin_cfg *cfg = &spec->autocfg;
4657 int i, presence;
4658
eb06ed8f 4659 presence = 0;
4fe5195c
MR		 4660 if (spec->gpio_mute)
4661 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4662 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4663
eb06ed8f 4664 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4665 if (presence)
4666 break;
d7a89436
TI		 4667 if (no_hp_sensing(spec, i))
4668 continue;
e6e3ea25
TI		 4669 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4670 if (presence) {
4671 unsigned int pinctl;
4672 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4673 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4674 if (pinctl & AC_PINCTL_IN_EN)
4675 presence = 0; /* mic- or line-input */
4676 }
eb06ed8f 4677 }
4e55096e
M		 4678
4679 if (presence) {
d7a89436 4680 /* disable lineouts */
7c2ba97b 4681 if (spec->hp_switch)
d7a89436
TI		 4682 stac92xx_reset_pinctl(codec, spec->hp_switch,
4683 AC_PINCTL_OUT_EN);
4e55096e
M		 4684 for (i = 0; i < cfg->line_outs; i++)
4685 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4686 AC_PINCTL_OUT_EN);
4e55096e 4687 } else {
d7a89436 4688 /* enable lineouts */
7c2ba97b 4689 if (spec->hp_switch)
d7a89436
TI		 4690 stac92xx_set_pinctl(codec, spec->hp_switch,
4691 AC_PINCTL_OUT_EN);
4e55096e
M		 4692 for (i = 0; i < cfg->line_outs; i++)
4693 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4694 AC_PINCTL_OUT_EN);
4e55096e 4695 }
fefd67f3 4696 stac92xx_line_out_detect(codec, presence);
d7a89436
TI		 4697 /* toggle hp outs */
4698 for (i = 0; i < cfg->hp_outs; i++) {
4699 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4700 if (no_hp_sensing(spec, i))
4701 continue;
4702 if (presence)
4703 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4704#if 0 /* FIXME */
4705/* Resetting the pinctl like below may lead to (a sort of) regressions
4706 * on some devices since they use the HP pin actually for line/speaker
4707 * outs although the default pin config shows a different pin (that is
4708 * wrong and useless).
4709 *
4710 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4711 * But, disabling the code below just works around it, and I'm too tired of
4712 * bug reports with such devices...
4713 */
d7a89436
TI		 4714 else
4715 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4716#endif /* FIXME */
d7a89436 4717 }
4e55096e
M		 4718}
4719
f73d3585
TI		 4720static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4721 int enable)
a64135a2
MR		 4722{
4723 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4724 unsigned int idx, val;
4725
4726 for (idx = 0; idx < spec->num_pwrs; idx++) {
4727 if (spec->pwr_nids[idx] == nid)
4728 break;
4729 }
4730 if (idx >= spec->num_pwrs)
4731 return;
d0513fc6 4732
afef2cfa 4733 idx = 1 << idx;
a64135a2 4734
f73d3585
TI		 4735 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4736 if (enable)
a64135a2
MR		 4737 val &= ~idx;
4738 else
4739 val |= idx;
4740
4741 /* power down unused output ports */
4742 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4743}
4744
f73d3585
TI		 4745static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4746{
e6e3ea25 4747 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4748}
a64135a2 4749
ab5a6ebe
VK		 4750/* get the pin connection (fixed, none, etc) */
4751static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
4752{
4753 struct sigmatel_spec *spec = codec->spec;
4754 unsigned int cfg;
4755
4756 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
4757 return get_defcfg_connect(cfg);
4758}
4759
4760static int stac92xx_connected_ports(struct hda_codec *codec,
2b63536f 4761 const hda_nid_t *nids, int num_nids)
ab5a6ebe
VK		 4762{
4763 struct sigmatel_spec *spec = codec->spec;
4764 int idx, num;
4765 unsigned int def_conf;
4766
4767 for (num = 0; num < num_nids; num++) {
4768 for (idx = 0; idx < spec->num_pins; idx++)
4769 if (spec->pin_nids[idx] == nids[num])
4770 break;
4771 if (idx >= spec->num_pins)
4772 break;
4773 def_conf = stac_get_defcfg_connect(codec, idx);
4774 if (def_conf == AC_JACK_PORT_NONE)
4775 break;
4776 }
4777 return num;
4778}
4779
3d21d3f7
TI		 4780static void stac92xx_mic_detect(struct hda_codec *codec)
4781{
4782 struct sigmatel_spec *spec = codec->spec;
4783 struct sigmatel_mic_route *mic;
4784
4785 if (get_pin_presence(codec, spec->ext_mic.pin))
4786 mic = &spec->ext_mic;
9907790a
CC		 4787 else if (get_pin_presence(codec, spec->dock_mic.pin))
4788 mic = &spec->dock_mic;
3d21d3f7
TI		 4789 else
4790 mic = &spec->int_mic;
02d33322 4791 if (mic->dmux_idx >= 0)
3d21d3f7
TI		 4792 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
4793 AC_VERB_SET_CONNECT_SEL,
4794 mic->dmux_idx);
02d33322 4795 if (mic->mux_idx >= 0)
3d21d3f7
TI		 4796 snd_hda_codec_write_cache(codec, spec->mux_nids[0], 0,
4797 AC_VERB_SET_CONNECT_SEL,
4798 mic->mux_idx);
4799}
4800
62558ce1 4801static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid)
c6e4c666 4802{
62558ce1 4803 struct sigmatel_event *event = stac_get_event(codec, nid);
c6e4c666
TI		 4804 if (!event)
4805 return;
4806 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4807}
4808
314634bc
TI		 4809static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4810{
a64135a2 4811 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4812 struct sigmatel_event *event;
4813 int tag, data;
a64135a2 4814
c6e4c666
TI		 4815 tag = (res >> 26) & 0x7f;
4816 event = stac_get_event_from_tag(codec, tag);
4817 if (!event)
4818 return;
4819
4820 switch (event->type) {
314634bc 4821 case STAC_HP_EVENT:
fefd67f3 4822 case STAC_LO_EVENT:
16ffe32c 4823 stac92xx_hp_detect(codec);
fefd67f3 4824 break;
3d21d3f7
TI		 4825 case STAC_MIC_EVENT:
4826 stac92xx_mic_detect(codec);
4827 break;
4828 }
4829
4830 switch (event->type) {
4831 case STAC_HP_EVENT:
fefd67f3 4832 case STAC_LO_EVENT:
3d21d3f7 4833 case STAC_MIC_EVENT:
74aeaabc 4834 case STAC_INSERT_EVENT:
a64135a2 4835 case STAC_PWR_EVENT:
c6e4c666
TI		 4836 if (spec->num_pwrs > 0)
4837 stac92xx_pin_sense(codec, event->nid);
cd372fb3 4838 snd_hda_input_jack_report(codec, event->nid);
fd60cc89
MR		 4839
4840 switch (codec->subsystem_id) {
4841 case 0x103c308f:
4842 if (event->nid == 0xb) {
4843 int pin = AC_PINCTL_IN_EN;
4844
4845 if (get_pin_presence(codec, 0xa)
4846 && get_pin_presence(codec, 0xb))
4847 pin |= AC_PINCTL_VREF_80;
4848 if (!get_pin_presence(codec, 0xb))
4849 pin |= AC_PINCTL_VREF_80;
4850
4851 /* toggle VREF state based on mic + hp pin
4852 * status
4853 */
4854 stac92xx_auto_set_pinctl(codec, 0x0a, pin);
4855 }
4856 }
72474be6 4857 break;
c6e4c666
TI		 4858 case STAC_VREF_EVENT:
4859 data = snd_hda_codec_read(codec, codec->afg, 0,
4860 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4861 /* toggle VREF state based on GPIOx status */
4862 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4863 !!(data & (1 << event->data)));
72474be6 4864 break;
314634bc
TI		 4865 }
4866}
4867
d38cce70
KG		 4868static int hp_blike_system(u32 subsystem_id);
4869
4870static void set_hp_led_gpio(struct hda_codec *codec)
4871{
4872 struct sigmatel_spec *spec = codec->spec;
07f80449
TI		 4873 unsigned int gpio;
4874
26ebe0a2
TI		 4875 if (spec->gpio_led)
4876 return;
4877
07f80449
TI		 4878 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
4879 gpio &= AC_GPIO_IO_COUNT;
4880 if (gpio > 3)
4881 spec->gpio_led = 0x08; /* GPIO 3 */
4882 else
4883 spec->gpio_led = 0x01; /* GPIO 0 */
d38cce70
KG		 4884}
4885
c357aab0
VK		 4886/*
4887 * This method searches for the mute LED GPIO configuration
4888 * provided as OEM string in SMBIOS. The format of that string
4889 * is HP_Mute_LED_P_G or HP_Mute_LED_P
4890 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
4891 * that corresponds to the NOT muted state of the master volume
4892 * and G is the index of the GPIO to use as the mute LED control (0..9)
4893 * If _G portion is missing it is assigned based on the codec ID
4894 *
4895 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
4896 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
d38cce70
KG		 4897 *
4898 *
4899 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
4900 * SMBIOS - at least the ones I have seen do not have them - which include
4901 * my own system (HP Pavilion dv6-1110ax) and my cousin's
4902 * HP Pavilion dv9500t CTO.
4903 * Need more information on whether it is true across the entire series.
4904 * -- kunal
c357aab0 4905 */
dce17d4f 4906static int find_mute_led_gpio(struct hda_codec *codec, int default_polarity)
c357aab0
VK		 4907{
4908 struct sigmatel_spec *spec = codec->spec;
4909 const struct dmi_device *dev = NULL;
4910
4911 if ((codec->subsystem_id >> 16) == PCI_VENDOR_ID_HP) {
4912 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING,
4913 NULL, dev))) {
45eebda7 4914 if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
d38cce70
KG		 4915 &spec->gpio_led_polarity,
4916 &spec->gpio_led) == 2) {
f1a73746
TI		 4917 unsigned int max_gpio;
4918 max_gpio = snd_hda_param_read(codec, codec->afg,
4919 AC_PAR_GPIO_CAP);
4920 max_gpio &= AC_GPIO_IO_COUNT;
4921 if (spec->gpio_led < max_gpio)
45eebda7 4922 spec->gpio_led = 1 << spec->gpio_led;
f1a73746
TI		 4923 else
4924 spec->vref_mute_led_nid = spec->gpio_led;
c357aab0
VK		 4925 return 1;
4926 }
4927 if (sscanf(dev->name, "HP_Mute_LED_%d",
d38cce70
KG		 4928 &spec->gpio_led_polarity) == 1) {
4929 set_hp_led_gpio(codec);
4930 return 1;
c357aab0 4931 }
e2ef36c6
GMDV		 4932 /* BIOS bug: unfilled OEM string */
4933 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
4934 set_hp_led_gpio(codec);
4935 spec->gpio_led_polarity = 1;
4936 return 1;
4937 }
c357aab0 4938 }
d38cce70
KG		 4939
4940 /*
4941 * Fallback case - if we don't find the DMI strings,
4942 * we statically set the GPIO - if not a B-series system.
4943 */
4944 if (!hp_blike_system(codec->subsystem_id)) {
4945 set_hp_led_gpio(codec);
dce17d4f 4946 spec->gpio_led_polarity = default_polarity;
d38cce70
KG		 4947 return 1;
4948 }
c357aab0
VK		 4949 }
4950 return 0;
4951}
4952
4953static int hp_blike_system(u32 subsystem_id)
78987bdc
RD		 4954{
4955 switch (subsystem_id) {
c357aab0
VK		 4956 case 0x103c1520:
4957 case 0x103c1521:
4958 case 0x103c1523:
4959 case 0x103c1524:
4960 case 0x103c1525:
78987bdc
RD		 4961 case 0x103c1722:
4962 case 0x103c1723:
4963 case 0x103c1724:
4964 case 0x103c1725:
4965 case 0x103c1726:
4966 case 0x103c1727:
4967 case 0x103c1728:
4968 case 0x103c1729:
c357aab0
VK		 4969 case 0x103c172a:
4970 case 0x103c172b:
4971 case 0x103c307e:
4972 case 0x103c307f:
4973 case 0x103c3080:
4974 case 0x103c3081:
4975 case 0x103c7007:
4976 case 0x103c7008:
78987bdc
RD		 4977 return 1;
4978 }
4979 return 0;
4980}
4981
2d34e1b3
TI		 4982#ifdef CONFIG_PROC_FS
4983static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4984 struct hda_codec *codec, hda_nid_t nid)
4985{
4986 if (nid == codec->afg)
4987 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4988 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4989}
4990
4991static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4992 struct hda_codec *codec,
4993 unsigned int verb)
4994{
4995 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4996 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4997}
4998
4999/* stac92hd71bxx, stac92hd73xx */
5000static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
5001 struct hda_codec *codec, hda_nid_t nid)
5002{
5003 stac92hd_proc_hook(buffer, codec, nid);
5004 if (nid == codec->afg)
5005 analog_loop_proc_hook(buffer, codec, 0xfa0);
5006}
5007
5008static void stac9205_proc_hook(struct snd_info_buffer *buffer,
5009 struct hda_codec *codec, hda_nid_t nid)
5010{
5011 if (nid == codec->afg)
5012 analog_loop_proc_hook(buffer, codec, 0xfe0);
5013}
5014
5015static void stac927x_proc_hook(struct snd_info_buffer *buffer,
5016 struct hda_codec *codec, hda_nid_t nid)
5017{
5018 if (nid == codec->afg)
5019 analog_loop_proc_hook(buffer, codec, 0xfeb);
5020}
5021#else
5022#define stac92hd_proc_hook NULL
5023#define stac92hd7x_proc_hook NULL
5024#define stac9205_proc_hook NULL
5025#define stac927x_proc_hook NULL
5026#endif
5027
2a43952a 5028#ifdef CONFIG_PM
ff6fdc37
M		 5029static int stac92xx_resume(struct hda_codec *codec)
5030{
dc81bed1
TI		 5031 struct sigmatel_spec *spec = codec->spec;
5032
2c885878 5033 stac92xx_init(codec);
82beb8fd
TI		 5034 snd_hda_codec_resume_amp(codec);
5035 snd_hda_codec_resume_cache(codec);
2c885878 5036 /* fake event to set up pins again to override cached values */
5f380eb1
TI		 5037 if (spec->hp_detect) {
5038 if (spec->autocfg.hp_pins[0])
5039 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0]);
5040 else if (spec->autocfg.line_out_pins[0])
5041 stac_issue_unsol_event(codec,
5042 spec->autocfg.line_out_pins[0]);
5043 }
ff6fdc37
M		 5044 return 0;
5045}
c6798d2b 5046
45eebda7
VK		 5047static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
5048{
5049 stac92xx_shutup(codec);
5050 return 0;
5051}
5052
7df1ce1a 5053#ifdef CONFIG_SND_HDA_POWER_SAVE
45eebda7
VK		 5054static int stac92xx_pre_resume(struct hda_codec *codec)
5055{
5056 struct sigmatel_spec *spec = codec->spec;
5057
5058 /* sync mute LED */
f1a73746
TI		 5059 if (spec->vref_mute_led_nid)
5060 stac_vrefout_set(codec, spec->vref_mute_led_nid,
5061 spec->vref_led);
5062 else if (spec->gpio_led)
5063 stac_gpio_set(codec, spec->gpio_mask,
5064 spec->gpio_dir, spec->gpio_data);
45eebda7
VK		 5065 return 0;
5066}
5067
45eebda7
VK		 5068static void stac92xx_set_power_state(struct hda_codec *codec, hda_nid_t fg,
5069 unsigned int power_state)
5070{
5071 unsigned int afg_power_state = power_state;
5072 struct sigmatel_spec *spec = codec->spec;
5073
5074 if (power_state == AC_PWRST_D3) {
f1a73746 5075 if (spec->vref_mute_led_nid) {
45eebda7
VK		 5076 /* with vref-out pin used for mute led control
5077 * codec AFG is prevented from D3 state
5078 */
5079 afg_power_state = AC_PWRST_D1;
5080 }
5081 /* this delay seems necessary to avoid click noise at power-down */
5082 msleep(100);
5083 }
5084 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
5085 afg_power_state);
5086 snd_hda_codec_set_power_to_all(codec, fg, power_state, true);
5087}
5088
ae6241fb 5089/*
7df1ce1a
VK		 5090 * For this feature CONFIG_SND_HDA_POWER_SAVE is needed
5091 * as mute LED state is updated in check_power_status hook
ae6241fb 5092 */
7df1ce1a 5093static int stac92xx_update_led_status(struct hda_codec *codec)
ae6241fb
CP		 5094{
5095 struct sigmatel_spec *spec = codec->spec;
7df1ce1a 5096 int i, num_ext_dacs, muted = 1;
45eebda7 5097 unsigned int muted_lvl, notmtd_lvl;
7df1ce1a 5098 hda_nid_t nid;
6fce61ae 5099
45eebda7
VK		 5100 if (!spec->gpio_led)
5101 return 0;
5102
c21bd025
TI		 5103 for (i = 0; i < spec->multiout.num_dacs; i++) {
5104 nid = spec->multiout.dac_nids[i];
5105 if (!(snd_hda_codec_amp_read(codec, nid, 0, HDA_OUTPUT, 0) &
5106 HDA_AMP_MUTE)) {
5107 muted = 0; /* something heard */
5108 break;
5bdaaada 5109 }
ae6241fb 5110 }
7df1ce1a
VK		 5111 if (muted && spec->multiout.hp_nid)
5112 if (!(snd_hda_codec_amp_read(codec,
5113 spec->multiout.hp_nid, 0, HDA_OUTPUT, 0) &
5114 HDA_AMP_MUTE)) {
5115 muted = 0; /* HP is not muted */
5116 }
5117 num_ext_dacs = ARRAY_SIZE(spec->multiout.extra_out_nid);
5118 for (i = 0; muted && i < num_ext_dacs; i++) {
5119 nid = spec->multiout.extra_out_nid[i];
5120 if (nid == 0)
5121 break;
5122 if (!(snd_hda_codec_amp_read(codec, nid, 0, HDA_OUTPUT, 0) &
5123 HDA_AMP_MUTE)) {
5124 muted = 0; /* extra output is not muted */
5125 }
5126 }
45eebda7 5127 /*polarity defines *not* muted state level*/
f1a73746 5128 if (!spec->vref_mute_led_nid) {
45eebda7
VK		 5129 if (muted)
5130 spec->gpio_data &= ~spec->gpio_led; /* orange */
5131 else
5132 spec->gpio_data |= spec->gpio_led; /* white */
ae6241fb 5133
45eebda7
VK		 5134 if (!spec->gpio_led_polarity) {
5135 /* LED state is inverted on these systems */
5136 spec->gpio_data ^= spec->gpio_led;
5137 }
5138 stac_gpio_set(codec, spec->gpio_mask,
5139 spec->gpio_dir, spec->gpio_data);
5140 } else {
5141 notmtd_lvl = spec->gpio_led_polarity ?
5142 AC_PINCTL_VREF_HIZ : AC_PINCTL_VREF_GRD;
5143 muted_lvl = spec->gpio_led_polarity ?
5144 AC_PINCTL_VREF_GRD : AC_PINCTL_VREF_HIZ;
5145 spec->vref_led = muted ? muted_lvl : notmtd_lvl;
f1a73746
TI		 5146 stac_vrefout_set(codec, spec->vref_mute_led_nid,
5147 spec->vref_led);
c21bd025 5148 }
b4e81876
TI		 5149 return 0;
5150}
7df1ce1a
VK		 5151
5152/*
5153 * use power check for controlling mute led of HP notebooks
5154 */
5155static int stac92xx_check_power_status(struct hda_codec *codec,
5156 hda_nid_t nid)
5157{
5158 stac92xx_update_led_status(codec);
5159
5160 return 0;
5161}
45eebda7 5162#endif /* CONFIG_SND_HDA_POWER_SAVE */
2a43952a 5163#endif /* CONFIG_PM */
ff6fdc37 5164
2b63536f 5165static const struct hda_codec_ops stac92xx_patch_ops = {
2f2f4251
M		 5166 .build_controls = stac92xx_build_controls,
5167 .build_pcms = stac92xx_build_pcms,
5168 .init = stac92xx_init,
5169 .free = stac92xx_free,
4e55096e 5170 .unsol_event = stac92xx_unsol_event,
2a43952a 5171#ifdef CONFIG_PM
c6798d2b 5172 .suspend = stac92xx_suspend,
ff6fdc37
M		 5173 .resume = stac92xx_resume,
5174#endif
fb8d1a34 5175 .reboot_notify = stac92xx_shutup,
2f2f4251
M		 5176};
5177
5178static int patch_stac9200(struct hda_codec *codec)
5179{
5180 struct sigmatel_spec *spec;
c7d4b2fa 5181 int err;
2f2f4251 5182
e560d8d8 5183 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5184 if (spec == NULL)
5185 return -ENOMEM;
5186
a252c81a 5187 codec->no_trigger_sense = 1;
2f2f4251 5188 codec->spec = spec;
1b0e372d 5189 spec->linear_tone_beep = 1;
a4eed138 5190 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 5191 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 5192 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
5193 stac9200_models,
5194 stac9200_cfg_tbl);
330ee995 5195 if (spec->board_config < 0)
9a11f1aa
TI		 5196 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5197 codec->chip_name);
330ee995
TI		 5198 else
5199 stac92xx_set_config_regs(codec,
af9f341a 5200 stac9200_brd_tbl[spec->board_config]);
2f2f4251
M		 5201
5202 spec->multiout.max_channels = 2;
5203 spec->multiout.num_dacs = 1;
5204 spec->multiout.dac_nids = stac9200_dac_nids;
5205 spec->adc_nids = stac9200_adc_nids;
5206 spec->mux_nids = stac9200_mux_nids;
dabbed6f 5207 spec->num_muxes = 1;
8b65727b 5208 spec->num_dmics = 0;
9e05b7a3 5209 spec->num_adcs = 1;
a64135a2 5210 spec->num_pwrs = 0;
c7d4b2fa 5211
58eec423
MCC		 5212 if (spec->board_config == STAC_9200_M4 ||
5213 spec->board_config == STAC_9200_M4_2 ||
bf277785 5214 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 5215 spec->init = stac9200_eapd_init;
5216 else
5217 spec->init = stac9200_core_init;
2f2f4251 5218 spec->mixer = stac9200_mixer;
c7d4b2fa 5219
117f257d
TI		 5220 if (spec->board_config == STAC_9200_PANASONIC) {
5221 spec->gpio_mask = spec->gpio_dir = 0x09;
5222 spec->gpio_data = 0x00;
5223 }
5224
c7d4b2fa
M		 5225 err = stac9200_parse_auto_config(codec);
5226 if (err < 0) {
5227 stac92xx_free(codec);
5228 return err;
5229 }
2f2f4251 5230
2acc9dcb
TI		 5231 /* CF-74 has no headphone detection, and the driver should *NOT*
5232 * do detection and HP/speaker toggle because the hardware does it.
5233 */
5234 if (spec->board_config == STAC_9200_PANASONIC)
5235 spec->hp_detect = 0;
5236
2f2f4251
M		 5237 codec->patch_ops = stac92xx_patch_ops;
5238
5239 return 0;
5240}
5241
8e21c34c
TD		 5242static int patch_stac925x(struct hda_codec *codec)
5243{
5244 struct sigmatel_spec *spec;
5245 int err;
5246
5247 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5248 if (spec == NULL)
5249 return -ENOMEM;
5250
a252c81a 5251 codec->no_trigger_sense = 1;
8e21c34c 5252 codec->spec = spec;
1b0e372d 5253 spec->linear_tone_beep = 1;
a4eed138 5254 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 5255 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 5256
5257 /* Check first for codec ID */
5258 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
5259 STAC_925x_MODELS,
5260 stac925x_models,
5261 stac925x_codec_id_cfg_tbl);
5262
5263 /* Now checks for PCI ID, if codec ID is not found */
5264 if (spec->board_config < 0)
5265 spec->board_config = snd_hda_check_board_config(codec,
5266 STAC_925x_MODELS,
8e21c34c
TD		 5267 stac925x_models,
5268 stac925x_cfg_tbl);
9e507abd 5269 again:
330ee995 5270 if (spec->board_config < 0)
9a11f1aa
TI		 5271 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5272 codec->chip_name);
330ee995
TI		 5273 else
5274 stac92xx_set_config_regs(codec,
af9f341a 5275 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD		 5276
5277 spec->multiout.max_channels = 2;
5278 spec->multiout.num_dacs = 1;
5279 spec->multiout.dac_nids = stac925x_dac_nids;
5280 spec->adc_nids = stac925x_adc_nids;
5281 spec->mux_nids = stac925x_mux_nids;
5282 spec->num_muxes = 1;
9e05b7a3 5283 spec->num_adcs = 1;
a64135a2 5284 spec->num_pwrs = 0;
2c11f955
TD		 5285 switch (codec->vendor_id) {
5286 case 0x83847632: /* STAC9202 */
5287 case 0x83847633: /* STAC9202D */
5288 case 0x83847636: /* STAC9251 */
5289 case 0x83847637: /* STAC9251D */
f6e9852a 5290 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 5291 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 5292 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
5293 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 5294 break;
5295 default:
5296 spec->num_dmics = 0;
5297 break;
5298 }
8e21c34c
TD		 5299
5300 spec->init = stac925x_core_init;
5301 spec->mixer = stac925x_mixer;
6479c631
TI		 5302 spec->num_caps = 1;
5303 spec->capvols = stac925x_capvols;
5304 spec->capsws = stac925x_capsws;
8e21c34c 5305
9009b0e4 5306 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 5307 if (!err) {
5308 if (spec->board_config < 0) {
5309 printk(KERN_WARNING "hda_codec: No auto-config is "
5310 "available, default to model=ref\n");
5311 spec->board_config = STAC_925x_REF;
5312 goto again;
5313 }
5314 err = -EINVAL;
5315 }
8e21c34c
TD		 5316 if (err < 0) {
5317 stac92xx_free(codec);
5318 return err;
5319 }
5320
5321 codec->patch_ops = stac92xx_patch_ops;
5322
5323 return 0;
5324}
5325
e1f0d669
MR		 5326static int patch_stac92hd73xx(struct hda_codec *codec)
5327{
5328 struct sigmatel_spec *spec;
5329 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
5330 int err = 0;
c21ca4a8 5331 int num_dacs;
e1f0d669
MR		 5332
5333 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5334 if (spec == NULL)
5335 return -ENOMEM;
5336
a252c81a 5337 codec->no_trigger_sense = 1;
e1f0d669 5338 codec->spec = spec;
1b0e372d 5339 spec->linear_tone_beep = 0;
e99d32b3 5340 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 5341 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
5342 spec->pin_nids = stac92hd73xx_pin_nids;
5343 spec->board_config = snd_hda_check_board_config(codec,
5344 STAC_92HD73XX_MODELS,
5345 stac92hd73xx_models,
5346 stac92hd73xx_cfg_tbl);
842ae638
TI		 5347 /* check codec subsystem id if not found */
5348 if (spec->board_config < 0)
5349 spec->board_config =
5350 snd_hda_check_board_codec_sid_config(codec,
5351 STAC_92HD73XX_MODELS, stac92hd73xx_models,
5352 stac92hd73xx_codec_id_cfg_tbl);
e1f0d669 5353again:
330ee995 5354 if (spec->board_config < 0)
9a11f1aa
TI		 5355 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5356 codec->chip_name);
330ee995
TI		 5357 else
5358 stac92xx_set_config_regs(codec,
af9f341a 5359 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 5360
c21ca4a8 5361 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 5362 conn, STAC92HD73_DAC_COUNT + 2) - 1;
5363
c21ca4a8 5364 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 5365 printk(KERN_WARNING "hda_codec: Could not determine "
5366 "number of channels defaulting to DAC count\n");
c21ca4a8 5367 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 5368 }
e2aec171 5369 spec->init = stac92hd73xx_core_init;
c21ca4a8 5370 switch (num_dacs) {
e1f0d669 5371 case 0x3: /* 6 Channel */
d78d7a90 5372 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR		 5373 break;
5374 case 0x4: /* 8 Channel */
d78d7a90 5375 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR		 5376 break;
5377 case 0x5: /* 10 Channel */
d78d7a90
TI		 5378 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
5379 break;
c21ca4a8
TI		 5380 }
5381 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 5382
e1f0d669
MR		 5383 spec->aloopback_mask = 0x01;
5384 spec->aloopback_shift = 8;
5385
1cd2224c 5386 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 5387 spec->mux_nids = stac92hd73xx_mux_nids;
5388 spec->adc_nids = stac92hd73xx_adc_nids;
5389 spec->dmic_nids = stac92hd73xx_dmic_nids;
5390 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 5391 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR		 5392
5393 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
5394 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 5395 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816 5396
6479c631
TI		 5397 spec->num_caps = STAC92HD73XX_NUM_CAPS;
5398 spec->capvols = stac92hd73xx_capvols;
5399 spec->capsws = stac92hd73xx_capsws;
5400
a7662640 5401 switch (spec->board_config) {
6b3ab21e 5402 case STAC_DELL_EQ:
d654a660 5403 spec->init = dell_eq_core_init;
6b3ab21e 5404 /* fallthru */
661cd8fb
TI		 5405 case STAC_DELL_M6_AMIC:
5406 case STAC_DELL_M6_DMIC:
5407 case STAC_DELL_M6_BOTH:
2a9c7816 5408 spec->num_smuxes = 0;
c0cea0d0 5409 spec->eapd_switch = 0;
6b3ab21e 5410
661cd8fb
TI		 5411 switch (spec->board_config) {
5412 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 5413 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640
MR		 5414 spec->num_dmics = 0;
5415 break;
661cd8fb 5416 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 5417 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5418 spec->num_dmics = 1;
5419 break;
661cd8fb 5420 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI		 5421 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
5422 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5423 spec->num_dmics = 1;
5424 break;
5425 }
5426 break;
842ae638
TI		 5427 case STAC_ALIENWARE_M17X:
5428 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
5429 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
5430 spec->eapd_switch = 0;
5431 break;
a7662640
MR		 5432 default:
5433 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 5434 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 5435 spec->eapd_switch = 1;
5207e10e 5436 break;
a7662640 5437 }
af6ee302 5438 if (spec->board_config != STAC_92HD73XX_REF) {
b2c4f4d7
MR		 5439 /* GPIO0 High = Enable EAPD */
5440 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
5441 spec->gpio_data = 0x01;
5442 }
a7662640 5443
a64135a2
MR		 5444 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
5445 spec->pwr_nids = stac92hd73xx_pwr_nids;
5446
9009b0e4 5447 err = stac92xx_parse_auto_config(codec);
e1f0d669
MR		 5448
5449 if (!err) {
5450 if (spec->board_config < 0) {
5451 printk(KERN_WARNING "hda_codec: No auto-config is "
5452 "available, default to model=ref\n");
5453 spec->board_config = STAC_92HD73XX_REF;
5454 goto again;
5455 }
5456 err = -EINVAL;
5457 }
5458
5459 if (err < 0) {
5460 stac92xx_free(codec);
5461 return err;
5462 }
5463
9e43f0de
TI		 5464 if (spec->board_config == STAC_92HD73XX_NO_JD)
5465 spec->hp_detect = 0;
5466
e1f0d669
MR		 5467 codec->patch_ops = stac92xx_patch_ops;
5468
2d34e1b3
TI		 5469 codec->proc_widget_hook = stac92hd7x_proc_hook;
5470
e1f0d669
MR		 5471 return 0;
5472}
5473
cbbf50b2 5474static int hp_bnb2011_with_dock(struct hda_codec *codec)
335e3b86
VK		 5475{
5476 if (codec->vendor_id != 0x111d7605 &&
5477 codec->vendor_id != 0x111d76d1)
5478 return 0;
5479
5480 switch (codec->subsystem_id) {
5481 case 0x103c1618:
5482 case 0x103c1619:
5483 case 0x103c161a:
5484 case 0x103c161b:
5485 case 0x103c161c:
5486 case 0x103c161d:
5487 case 0x103c161e:
5488 case 0x103c161f:
335e3b86
VK		 5489
5490 case 0x103c162a:
5491 case 0x103c162b:
5492
5493 case 0x103c1630:
5494 case 0x103c1631:
5495
5496 case 0x103c1633:
cbbf50b2 5497 case 0x103c1634:
335e3b86
VK		 5498 case 0x103c1635:
5499
335e3b86
VK		 5500 case 0x103c3587:
5501 case 0x103c3588:
5502 case 0x103c3589:
5503 case 0x103c358a:
5504
5505 case 0x103c3667:
5506 case 0x103c3668:
cbbf50b2
VK		 5507 case 0x103c3669:
5508
5509 return 1;
335e3b86
VK		 5510 }
5511 return 0;
5512}
5513
699d8995
VK		 5514static void stac92hd8x_add_pin(struct hda_codec *codec, hda_nid_t nid)
5515{
5516 struct sigmatel_spec *spec = codec->spec;
5517 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
5518 int i;
5519
5520 spec->auto_pin_nids[spec->auto_pin_cnt] = nid;
5521 spec->auto_pin_cnt++;
5522
5523 if (get_defcfg_device(def_conf) == AC_JACK_MIC_IN &&
5524 get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE) {
5525 for (i = 0; i < ARRAY_SIZE(stac92hd83xxx_dmic_nids); i++) {
5526 if (nid == stac92hd83xxx_dmic_nids[i]) {
5527 spec->auto_dmic_nids[spec->auto_dmic_cnt] = nid;
5528 spec->auto_dmic_cnt++;
5529 }
5530 }
5531 }
5532}
5533
5534static void stac92hd8x_add_adc(struct hda_codec *codec, hda_nid_t nid)
5535{
5536 struct sigmatel_spec *spec = codec->spec;
5537
5538 spec->auto_adc_nids[spec->auto_adc_cnt] = nid;
5539 spec->auto_adc_cnt++;
5540}
5541
5542static void stac92hd8x_add_mux(struct hda_codec *codec, hda_nid_t nid)
5543{
5544 int i, j;
5545 struct sigmatel_spec *spec = codec->spec;
5546
5547 for (i = 0; i < spec->auto_adc_cnt; i++) {
5548 if (get_connection_index(codec,
5549 spec->auto_adc_nids[i], nid) >= 0) {
5550 /* mux and volume for adc_nids[i] */
5551 if (!spec->auto_mux_nids[i]) {
5552 spec->auto_mux_nids[i] = nid;
5553 /* 92hd codecs capture volume is in mux */
5554 spec->auto_capvols[i] = HDA_COMPOSE_AMP_VAL(nid,
5555 3, 0, HDA_OUTPUT);
5556 }
5557 for (j = 0; j < spec->auto_dmic_cnt; j++) {
5558 if (get_connection_index(codec, nid,
5559 spec->auto_dmic_nids[j]) >= 0) {
5560 /* dmux for adc_nids[i] */
5561 if (!spec->auto_dmux_nids[i])
5562 spec->auto_dmux_nids[i] = nid;
5563 break;
5564 }
5565 }
5566 break;
5567 }
5568 }
5569}
5570
5571static void stac92hd8x_fill_auto_spec(struct hda_codec *codec)
5572{
5573 hda_nid_t nid, end_nid;
5574 unsigned int wid_caps, wid_type;
5575 struct sigmatel_spec *spec = codec->spec;
5576
5577 end_nid = codec->start_nid + codec->num_nodes;
5578
5579 for (nid = codec->start_nid; nid < end_nid; nid++) {
5580 wid_caps = get_wcaps(codec, nid);
5581 wid_type = get_wcaps_type(wid_caps);
5582
5583 if (wid_type == AC_WID_PIN)
5584 stac92hd8x_add_pin(codec, nid);
5585
5586 if (wid_type == AC_WID_AUD_IN && !(wid_caps & AC_WCAP_DIGITAL))
5587 stac92hd8x_add_adc(codec, nid);
5588 }
5589
5590 for (nid = codec->start_nid; nid < end_nid; nid++) {
5591 wid_caps = get_wcaps(codec, nid);
5592 wid_type = get_wcaps_type(wid_caps);
5593
5594 if (wid_type == AC_WID_AUD_SEL)
5595 stac92hd8x_add_mux(codec, nid);
5596 }
5597
5598 spec->pin_nids = spec->auto_pin_nids;
5599 spec->num_pins = spec->auto_pin_cnt;
5600 spec->adc_nids = spec->auto_adc_nids;
5601 spec->num_adcs = spec->auto_adc_cnt;
5602 spec->capvols = spec->auto_capvols;
5603 spec->capsws = spec->auto_capvols;
5604 spec->num_caps = spec->auto_adc_cnt;
5605 spec->mux_nids = spec->auto_mux_nids;
5606 spec->num_muxes = spec->auto_adc_cnt;
5607 spec->dmux_nids = spec->auto_dmux_nids;
5608 spec->num_dmuxes = spec->auto_adc_cnt;
5609 spec->dmic_nids = spec->auto_dmic_nids;
5610 spec->num_dmics = spec->auto_dmic_cnt;
5611}
5612
d0513fc6
MR		 5613static int patch_stac92hd83xxx(struct hda_codec *codec)
5614{
5615 struct sigmatel_spec *spec;
5616 int err;
5617
5618 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5619 if (spec == NULL)
5620 return -ENOMEM;
5621
cbbf50b2
VK		 5622 if (hp_bnb2011_with_dock(codec)) {
5623 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
5624 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
5625 }
5626
a252c81a 5627 codec->no_trigger_sense = 1;
d0513fc6 5628 codec->spec = spec;
699d8995
VK		 5629
5630 stac92hd8x_fill_auto_spec(codec);
5631
1db7ccdb 5632 spec->linear_tone_beep = 0;
0ffa9807 5633 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6 5634 spec->digbeep_nid = 0x21;
d0513fc6 5635 spec->pwr_nids = stac92hd83xxx_pwr_nids;
d0513fc6 5636 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 5637 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 5638 spec->init = stac92hd83xxx_core_init;
6479c631 5639
d0513fc6
MR		 5640 spec->board_config = snd_hda_check_board_config(codec,
5641 STAC_92HD83XXX_MODELS,
5642 stac92hd83xxx_models,
5643 stac92hd83xxx_cfg_tbl);
5644again:
330ee995 5645 if (spec->board_config < 0)
9a11f1aa
TI		 5646 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5647 codec->chip_name);
330ee995
TI		 5648 else
5649 stac92xx_set_config_regs(codec,
af9f341a 5650 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 5651
b4e81876
TI		 5652 codec->patch_ops = stac92xx_patch_ops;
5653
dce17d4f 5654 if (find_mute_led_gpio(codec, 0))
e108c7b7
VK		 5655 snd_printd("mute LED gpio %d polarity %d\n",
5656 spec->gpio_led,
5657 spec->gpio_led_polarity);
5658
b4e81876
TI		 5659#ifdef CONFIG_SND_HDA_POWER_SAVE
5660 if (spec->gpio_led) {
f1a73746 5661 if (!spec->vref_mute_led_nid) {
45eebda7
VK		 5662 spec->gpio_mask |= spec->gpio_led;
5663 spec->gpio_dir |= spec->gpio_led;
5664 spec->gpio_data |= spec->gpio_led;
5665 } else {
5666 codec->patch_ops.set_power_state =
5667 stac92xx_set_power_state;
45eebda7
VK		 5668 }
5669 codec->patch_ops.pre_resume = stac92xx_pre_resume;
b4e81876 5670 codec->patch_ops.check_power_status =
7df1ce1a 5671 stac92xx_check_power_status;
b4e81876
TI		 5672 }
5673#endif
5674
9009b0e4 5675 err = stac92xx_parse_auto_config(codec);
d0513fc6
MR		 5676 if (!err) {
5677 if (spec->board_config < 0) {
5678 printk(KERN_WARNING "hda_codec: No auto-config is "
5679 "available, default to model=ref\n");
5680 spec->board_config = STAC_92HD83XXX_REF;
5681 goto again;
5682 }
5683 err = -EINVAL;
5684 }
5685
5686 if (err < 0) {
5687 stac92xx_free(codec);
5688 return err;
5689 }
5690
2d34e1b3
TI		 5691 codec->proc_widget_hook = stac92hd_proc_hook;
5692
d0513fc6
MR		 5693 return 0;
5694}
5695
6df703ae
HRK		 5696static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
5697 hda_nid_t dig0pin)
5698{
5699 struct sigmatel_spec *spec = codec->spec;
5700 int idx;
5701
5702 for (idx = 0; idx < spec->num_pins; idx++)
5703 if (spec->pin_nids[idx] == dig0pin)
5704 break;
5705 if ((idx + 2) >= spec->num_pins)
5706 return 0;
5707
5708 /* dig1pin case */
330ee995 5709 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5710 return 2;
5711
5712 /* dig0pin + dig2pin case */
330ee995 5713 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 5714 return 2;
330ee995 5715 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5716 return 1;
5717 else
5718 return 0;
5719}
5720
75d1aeb9
TI		 5721/* HP dv7 bass switch - GPIO5 */
5722#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
5723static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
5724 struct snd_ctl_elem_value *ucontrol)
5725{
5726 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5727 struct sigmatel_spec *spec = codec->spec;
5728 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
5729 return 0;
5730}
5731
5732static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
5733 struct snd_ctl_elem_value *ucontrol)
5734{
5735 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5736 struct sigmatel_spec *spec = codec->spec;
5737 unsigned int gpio_data;
5738
5739 gpio_data = (spec->gpio_data & ~0x20) |
5740 (ucontrol->value.integer.value[0] ? 0x20 : 0);
5741 if (gpio_data == spec->gpio_data)
5742 return 0;
5743 spec->gpio_data = gpio_data;
5744 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
5745 return 1;
5746}
5747
2b63536f 5748static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
75d1aeb9
TI		 5749 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5750 .info = stac_hp_bass_gpio_info,
5751 .get = stac_hp_bass_gpio_get,
5752 .put = stac_hp_bass_gpio_put,
5753};
5754
5755static int stac_add_hp_bass_switch(struct hda_codec *codec)
5756{
5757 struct sigmatel_spec *spec = codec->spec;
5758
5759 if (!stac_control_new(spec, &stac_hp_bass_sw_ctrl,
5760 "Bass Speaker Playback Switch", 0))
5761 return -ENOMEM;
5762
5763 spec->gpio_mask |= 0x20;
5764 spec->gpio_dir |= 0x20;
5765 spec->gpio_data |= 0x20;
5766 return 0;
5767}
5768
e035b841
MR		 5769static int patch_stac92hd71bxx(struct hda_codec *codec)
5770{
5771 struct sigmatel_spec *spec;
2b63536f 5772 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
5bdaaada 5773 unsigned int pin_cfg;
e035b841
MR		 5774 int err = 0;
5775
5776 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5777 if (spec == NULL)
5778 return -ENOMEM;
5779
a252c81a 5780 codec->no_trigger_sense = 1;
e035b841 5781 codec->spec = spec;
1b0e372d 5782 spec->linear_tone_beep = 0;
8daaaa97 5783 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK		 5784 spec->num_pins = STAC92HD71BXX_NUM_PINS;
5785 switch (codec->vendor_id) {
5786 case 0x111d76b6:
5787 case 0x111d76b7:
5788 spec->pin_nids = stac92hd71bxx_pin_nids_4port;
5789 break;
5790 case 0x111d7603:
5791 case 0x111d7608:
5792 /* On 92HD75Bx 0x27 isn't a pin nid */
5793 spec->num_pins--;
5794 /* fallthrough */
5795 default:
5796 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5797 }
aafc4412 5798 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 5799 spec->board_config = snd_hda_check_board_config(codec,
5800 STAC_92HD71BXX_MODELS,
5801 stac92hd71bxx_models,
5802 stac92hd71bxx_cfg_tbl);
5803again:
330ee995 5804 if (spec->board_config < 0)
9a11f1aa
TI		 5805 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5806 codec->chip_name);
330ee995
TI		 5807 else
5808 stac92xx_set_config_regs(codec,
af9f341a 5809 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5810
fc64b26c 5811 if (spec->board_config != STAC_92HD71BXX_REF) {
41c3b648
TI		 5812 /* GPIO0 = EAPD */
5813 spec->gpio_mask = 0x01;
5814 spec->gpio_dir = 0x01;
5815 spec->gpio_data = 0x01;
5816 }
5817
6df703ae
HRK		 5818 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5819 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5820
6479c631
TI		 5821 spec->num_caps = STAC92HD71BXX_NUM_CAPS;
5822 spec->capvols = stac92hd71bxx_capvols;
5823 spec->capsws = stac92hd71bxx_capsws;
5824
541eee87
MR		 5825 switch (codec->vendor_id) {
5826 case 0x111d76b6: /* 4 Port without Analog Mixer */
5827 case 0x111d76b7:
23c7b521
HRK		 5828 unmute_init++;
5829 /* fallthru */
541eee87
MR		 5830 case 0x111d76b4: /* 6 Port without Analog Mixer */
5831 case 0x111d76b5:
541eee87 5832 spec->init = stac92hd71bxx_core_init;
0ffa9807 5833 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5834 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5835 stac92hd71bxx_dmic_nids,
5836 STAC92HD71BXX_NUM_DMICS);
541eee87 5837 break;
aafc4412 5838 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 5839 switch (spec->board_config) {
5840 case STAC_HP_M4:
72474be6 5841 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 5842 err = stac_add_event(spec, codec->afg,
5843 STAC_VREF_EVENT, 0x02);
5844 if (err < 0)
5845 return err;
c5d08bb5 5846 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 5847 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
5848 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 5849 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 5850 AC_USRSP_EN | err);
72474be6
MR		 5851 spec->gpio_mask |= 0x02;
5852 break;
5853 }
8daaaa97 5854 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5855 (codec->revision_id & 0xf) == 1)
8daaaa97 5856 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5857
aafc4412 5858 /* disable VSW */
26a27980 5859 spec->init = stac92hd71bxx_core_init;
ca8d33fc 5860 unmute_init++;
330ee995
TI		 5861 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
5862 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
2b63536f 5863 spec->dmic_nids = stac92hd71bxx_dmic_5port_nids;
ab5a6ebe 5864 spec->num_dmics = stac92xx_connected_ports(codec,
2b63536f 5865 stac92hd71bxx_dmic_5port_nids,
6df703ae 5866 STAC92HD71BXX_NUM_DMICS - 1);
aafc4412
MR		 5867 break;
5868 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5869 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5870 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5871
aafc4412 5872 /* fallthru */
541eee87 5873 default:
26a27980 5874 spec->init = stac92hd71bxx_core_init;
0ffa9807 5875 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5876 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5877 stac92hd71bxx_dmic_nids,
5878 STAC92HD71BXX_NUM_DMICS);
5207e10e 5879 break;
541eee87
MR		 5880 }
5881
ca8d33fc
MR		 5882 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5883 snd_hda_sequence_write_cache(codec, unmute_init);
5884
d78d7a90 5885 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 5886 spec->aloopback_mask = 0x50;
541eee87
MR		 5887 spec->aloopback_shift = 0;
5888
8daaaa97 5889 spec->powerdown_adcs = 1;
1cd2224c 5890 spec->digbeep_nid = 0x26;
e035b841
MR		 5891 spec->mux_nids = stac92hd71bxx_mux_nids;
5892 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5893 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5894 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 5895
5896 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5897 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
5207e10e 5898 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
6df703ae 5899 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5900
d38cce70
KG		 5901 snd_printdd("Found board config: %d\n", spec->board_config);
5902
6a14f585
MR		 5903 switch (spec->board_config) {
5904 case STAC_HP_M4:
6a14f585 5905 /* enable internal microphone */
330ee995 5906 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR		 5907 stac92xx_auto_set_pinctl(codec, 0x0e,
5908 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 5909 /* fallthru */
5910 case STAC_DELL_M4_2:
5911 spec->num_dmics = 0;
5912 spec->num_smuxes = 0;
5913 spec->num_dmuxes = 0;
5914 break;
5915 case STAC_DELL_M4_1:
5916 case STAC_DELL_M4_3:
5917 spec->num_dmics = 1;
5918 spec->num_smuxes = 0;
ea18aa46 5919 spec->num_dmuxes = 1;
6a14f585 5920 break;
514bf54c
JG		 5921 case STAC_HP_DV4_1222NR:
5922 spec->num_dmics = 1;
5923 /* I don't know if it needs 1 or 2 smuxes - will wait for
5924 * bug reports to fix if needed
5925 */
5926 spec->num_smuxes = 1;
5927 spec->num_dmuxes = 1;
514bf54c 5928 /* fallthrough */
2a6ce6e5
TI		 5929 case STAC_HP_DV4:
5930 spec->gpio_led = 0x01;
5931 /* fallthrough */
e2ea57a8 5932 case STAC_HP_DV5:
330ee995 5933 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8 5934 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
6e34c033
TI		 5935 /* HP dv6 gives the headphone pin as a line-out. Thus we
5936 * need to set hp_detect flag here to force to enable HP
5937 * detection.
5938 */
5939 spec->hp_detect = 1;
e2ea57a8 5940 break;
ae6241fb
CP		 5941 case STAC_HP_HDX:
5942 spec->num_dmics = 1;
5943 spec->num_dmuxes = 1;
5944 spec->num_smuxes = 1;
26ebe0a2 5945 spec->gpio_led = 0x08;
86d190e7
TI		 5946 break;
5947 }
443e26d0 5948
c357aab0 5949 if (hp_blike_system(codec->subsystem_id)) {
5bdaaada
VK		 5950 pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
5951 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
5952 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
5953 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
5954 /* It was changed in the BIOS to just satisfy MS DTM.
5955 * Lets turn it back into slaved HP
5956 */
5957 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
5958 | (AC_JACK_HP_OUT <<
5959 AC_DEFCFG_DEVICE_SHIFT);
5960 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
5961 | AC_DEFCFG_SEQUENCE)))
5962 | 0x1f;
5963 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
5964 }
5965 }
5966
dce17d4f 5967 if (find_mute_led_gpio(codec, 1))
c357aab0
VK		 5968 snd_printd("mute LED gpio %d polarity %d\n",
5969 spec->gpio_led,
5970 spec->gpio_led_polarity);
5bdaaada 5971
86d190e7
TI		 5972#ifdef CONFIG_SND_HDA_POWER_SAVE
5973 if (spec->gpio_led) {
f1a73746 5974 if (!spec->vref_mute_led_nid) {
45eebda7
VK		 5975 spec->gpio_mask |= spec->gpio_led;
5976 spec->gpio_dir |= spec->gpio_led;
5977 spec->gpio_data |= spec->gpio_led;
5978 } else {
5979 codec->patch_ops.set_power_state =
5980 stac92xx_set_power_state;
45eebda7
VK		 5981 }
5982 codec->patch_ops.pre_resume = stac92xx_pre_resume;
6fce61ae 5983 codec->patch_ops.check_power_status =
7df1ce1a 5984 stac92xx_check_power_status;
86d190e7 5985 }
443e26d0 5986#endif
6a14f585 5987
c21ca4a8 5988 spec->multiout.dac_nids = spec->dac_nids;
e035b841 5989
9009b0e4 5990 err = stac92xx_parse_auto_config(codec);
e035b841
MR		 5991 if (!err) {
5992 if (spec->board_config < 0) {
5993 printk(KERN_WARNING "hda_codec: No auto-config is "
5994 "available, default to model=ref\n");
5995 spec->board_config = STAC_92HD71BXX_REF;
5996 goto again;
5997 }
5998 err = -EINVAL;
5999 }
6000
6001 if (err < 0) {
6002 stac92xx_free(codec);
6003 return err;
6004 }
6005
75d1aeb9 6006 /* enable bass on HP dv7 */
2a6ce6e5
TI		 6007 if (spec->board_config == STAC_HP_DV4 ||
6008 spec->board_config == STAC_HP_DV5) {
75d1aeb9
TI		 6009 unsigned int cap;
6010 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
6011 cap &= AC_GPIO_IO_COUNT;
6012 if (cap >= 6)
6013 stac_add_hp_bass_switch(codec);
6014 }
6015
2d34e1b3
TI		 6016 codec->proc_widget_hook = stac92hd7x_proc_hook;
6017
e035b841 6018 return 0;
86d190e7 6019}
e035b841 6020
2f2f4251
M		 6021static int patch_stac922x(struct hda_codec *codec)
6022{
6023 struct sigmatel_spec *spec;
c7d4b2fa 6024 int err;
2f2f4251 6025
e560d8d8 6026 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 6027 if (spec == NULL)
6028 return -ENOMEM;
6029
a252c81a 6030 codec->no_trigger_sense = 1;
2f2f4251 6031 codec->spec = spec;
1b0e372d 6032 spec->linear_tone_beep = 1;
a4eed138 6033 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 6034 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 6035 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
6036 stac922x_models,
6037 stac922x_cfg_tbl);
536319af 6038 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 6039 spec->gpio_mask = spec->gpio_dir = 0x03;
6040 spec->gpio_data = 0x03;
3fc24d85
TI		 6041 /* Intel Macs have all same PCI SSID, so we need to check
6042 * codec SSID to distinguish the exact models
6043 */
6f0778d8 6044 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 6045 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 6046
6047 case 0x106b0800:
6048 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 6049 break;
5d5d3bc3
IZ		 6050 case 0x106b0600:
6051 case 0x106b0700:
6052 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 6053 break;
5d5d3bc3
IZ		 6054 case 0x106b0e00:
6055 case 0x106b0f00:
6056 case 0x106b1600:
6057 case 0x106b1700:
6058 case 0x106b0200:
6059 case 0x106b1e00:
6060 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 6061 break;
5d5d3bc3
IZ		 6062 case 0x106b1a00:
6063 case 0x00000100:
6064 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 6065 break;
5d5d3bc3
IZ		 6066 case 0x106b0a00:
6067 case 0x106b2200:
6068 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 6069 break;
536319af
NB		 6070 default:
6071 spec->board_config = STAC_INTEL_MAC_V3;
6072 break;
3fc24d85
TI		 6073 }
6074 }
6075
9e507abd 6076 again:
330ee995 6077 if (spec->board_config < 0)
9a11f1aa
TI		 6078 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6079 codec->chip_name);
330ee995
TI		 6080 else
6081 stac92xx_set_config_regs(codec,
af9f341a 6082 stac922x_brd_tbl[spec->board_config]);
2f2f4251 6083
c7d4b2fa
M		 6084 spec->adc_nids = stac922x_adc_nids;
6085 spec->mux_nids = stac922x_mux_nids;
2549413e 6086 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 6087 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 6088 spec->num_dmics = 0;
a64135a2 6089 spec->num_pwrs = 0;
c7d4b2fa
M		 6090
6091 spec->init = stac922x_core_init;
6479c631
TI		 6092
6093 spec->num_caps = STAC922X_NUM_CAPS;
6094 spec->capvols = stac922x_capvols;
6095 spec->capsws = stac922x_capsws;
c7d4b2fa
M		 6096
6097 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 6098
9009b0e4 6099 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 6100 if (!err) {
6101 if (spec->board_config < 0) {
6102 printk(KERN_WARNING "hda_codec: No auto-config is "
6103 "available, default to model=ref\n");
6104 spec->board_config = STAC_D945_REF;
6105 goto again;
6106 }
6107 err = -EINVAL;
6108 }
3cc08dc6
MP		 6109 if (err < 0) {
6110 stac92xx_free(codec);
6111 return err;
6112 }
6113
6114 codec->patch_ops = stac92xx_patch_ops;
6115
807a4636
TI		 6116 /* Fix Mux capture level; max to 2 */
6117 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
6118 (0 << AC_AMPCAP_OFFSET_SHIFT) |
6119 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
6120 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
6121 (0 << AC_AMPCAP_MUTE_SHIFT));
6122
3cc08dc6
MP		 6123 return 0;
6124}
6125
6126static int patch_stac927x(struct hda_codec *codec)
6127{
6128 struct sigmatel_spec *spec;
6129 int err;
6130
6131 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6132 if (spec == NULL)
6133 return -ENOMEM;
6134
a252c81a 6135 codec->no_trigger_sense = 1;
3cc08dc6 6136 codec->spec = spec;
1b0e372d 6137 spec->linear_tone_beep = 1;
45c1d85b 6138 codec->slave_dig_outs = stac927x_slave_dig_outs;
a4eed138 6139 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 6140 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 6141 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
6142 stac927x_models,
6143 stac927x_cfg_tbl);
9e507abd 6144 again:
330ee995 6145 if (spec->board_config < 0)
9a11f1aa
TI		 6146 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6147 codec->chip_name);
330ee995
TI		 6148 else
6149 stac92xx_set_config_regs(codec,
af9f341a 6150 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 6151
1cd2224c 6152 spec->digbeep_nid = 0x23;
8e9068b1
MR		 6153 spec->adc_nids = stac927x_adc_nids;
6154 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
6155 spec->mux_nids = stac927x_mux_nids;
6156 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 6157 spec->smux_nids = stac927x_smux_nids;
6158 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 6159 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 6160 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 6161 spec->multiout.dac_nids = spec->dac_nids;
6162
af6ee302
TI		 6163 if (spec->board_config != STAC_D965_REF) {
6164 /* GPIO0 High = Enable EAPD */
6165 spec->eapd_mask = spec->gpio_mask = 0x01;
6166 spec->gpio_dir = spec->gpio_data = 0x01;
6167 }
6168
81d3dbde 6169 switch (spec->board_config) {
93ed1503 6170 case STAC_D965_3ST:
93ed1503 6171 case STAC_D965_5ST:
8e9068b1 6172 /* GPIO0 High = Enable EAPD */
8e9068b1 6173 spec->num_dmics = 0;
93ed1503 6174 spec->init = d965_core_init;
81d3dbde 6175 break;
8e9068b1 6176 case STAC_DELL_BIOS:
780c8be4
MR		 6177 switch (codec->subsystem_id) {
6178 case 0x10280209:
6179 case 0x1028022e:
6180 /* correct the device field to SPDIF out */
330ee995 6181 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4 6182 break;
86d190e7 6183 }
03d7ca17 6184 /* configure the analog microphone on some laptops */
330ee995 6185 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 6186 /* correct the front output jack as a hp out */
330ee995 6187 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 6188 /* correct the front input jack as a mic */
330ee995 6189 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 6190 /* fallthru */
8e9068b1 6191 case STAC_DELL_3ST:
af6ee302
TI		 6192 if (codec->subsystem_id != 0x1028022f) {
6193 /* GPIO2 High = Enable EAPD */
6194 spec->eapd_mask = spec->gpio_mask = 0x04;
6195 spec->gpio_dir = spec->gpio_data = 0x04;
6196 }
7f16859a
MR		 6197 spec->dmic_nids = stac927x_dmic_nids;
6198 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 6199
ccca7cdc 6200 spec->init = dell_3st_core_init;
8e9068b1 6201 spec->dmux_nids = stac927x_dmux_nids;
1697055e 6202 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a 6203 break;
54930531
TI		 6204 case STAC_927X_VOLKNOB:
6205 spec->num_dmics = 0;
6206 spec->init = stac927x_volknob_core_init;
6207 break;
7f16859a 6208 default:
8e9068b1 6209 spec->num_dmics = 0;
8e9068b1 6210 spec->init = stac927x_core_init;
af6ee302 6211 break;
7f16859a
MR		 6212 }
6213
6479c631
TI		 6214 spec->num_caps = STAC927X_NUM_CAPS;
6215 spec->capvols = stac927x_capvols;
6216 spec->capsws = stac927x_capsws;
6217
a64135a2 6218 spec->num_pwrs = 0;
d78d7a90 6219 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR		 6220 spec->aloopback_mask = 0x40;
6221 spec->aloopback_shift = 0;
c0cea0d0 6222 spec->eapd_switch = 1;
8e9068b1 6223
9009b0e4 6224 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 6225 if (!err) {
6226 if (spec->board_config < 0) {
6227 printk(KERN_WARNING "hda_codec: No auto-config is "
6228 "available, default to model=ref\n");
6229 spec->board_config = STAC_D965_REF;
6230 goto again;
6231 }
6232 err = -EINVAL;
6233 }
c7d4b2fa
M		 6234 if (err < 0) {
6235 stac92xx_free(codec);
6236 return err;
6237 }
2f2f4251
M		 6238
6239 codec->patch_ops = stac92xx_patch_ops;
6240
2d34e1b3
TI		 6241 codec->proc_widget_hook = stac927x_proc_hook;
6242
52987656
TI		 6243 /*
6244 * !!FIXME!!
6245 * The STAC927x seem to require fairly long delays for certain
6246 * command sequences. With too short delays (even if the answer
6247 * is set to RIRB properly), it results in the silence output
6248 * on some hardwares like Dell.
6249 *
6250 * The below flag enables the longer delay (see get_response
6251 * in hda_intel.c).
6252 */
6253 codec->bus->needs_damn_long_delay = 1;
6254
e28d8322
TI		 6255 /* no jack detecion for ref-no-jd model */
6256 if (spec->board_config == STAC_D965_REF_NO_JD)
6257 spec->hp_detect = 0;
6258
2f2f4251
M		 6259 return 0;
6260}
6261
f3302a59
MP		 6262static int patch_stac9205(struct hda_codec *codec)
6263{
6264 struct sigmatel_spec *spec;
8259980e 6265 int err;
f3302a59
MP		 6266
6267 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6268 if (spec == NULL)
6269 return -ENOMEM;
6270
a252c81a 6271 codec->no_trigger_sense = 1;
f3302a59 6272 codec->spec = spec;
1b0e372d 6273 spec->linear_tone_beep = 1;
a4eed138 6274 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 6275 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 6276 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
6277 stac9205_models,
6278 stac9205_cfg_tbl);
9e507abd 6279 again:
330ee995 6280 if (spec->board_config < 0)
9a11f1aa
TI		 6281 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6282 codec->chip_name);
330ee995
TI		 6283 else
6284 stac92xx_set_config_regs(codec,
af9f341a 6285 stac9205_brd_tbl[spec->board_config]);
f3302a59 6286
1cd2224c 6287 spec->digbeep_nid = 0x23;
f3302a59 6288 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 6289 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 6290 spec->mux_nids = stac9205_mux_nids;
2549413e 6291 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 6292 spec->smux_nids = stac9205_smux_nids;
6293 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 6294 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 6295 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 6296 spec->dmux_nids = stac9205_dmux_nids;
1697055e 6297 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 6298 spec->num_pwrs = 0;
f3302a59
MP		 6299
6300 spec->init = stac9205_core_init;
d78d7a90 6301 spec->aloopback_ctl = stac9205_loopback;
f3302a59 6302
6479c631
TI		 6303 spec->num_caps = STAC9205_NUM_CAPS;
6304 spec->capvols = stac9205_capvols;
6305 spec->capsws = stac9205_capsws;
6306
e1f0d669
MR		 6307 spec->aloopback_mask = 0x40;
6308 spec->aloopback_shift = 0;
d9a4268e
TI		 6309 /* Turn on/off EAPD per HP plugging */
6310 if (spec->board_config != STAC_9205_EAPD)
6311 spec->eapd_switch = 1;
f3302a59 6312 spec->multiout.dac_nids = spec->dac_nids;
87d48363 6313
ae0a8ed8 6314 switch (spec->board_config){
ae0a8ed8 6315 case STAC_9205_DELL_M43:
87d48363 6316 /* Enable SPDIF in/out */
330ee995
TI		 6317 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
6318 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 6319
4fe5195c 6320 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 6321 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
6322 if (err < 0)
6323 return err;
c5d08bb5 6324 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 6325 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
6326 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 6327 AC_VERB_SET_UNSOLICITED_ENABLE,
6328 AC_USRSP_EN | err);
4fe5195c
MR		 6329
6330 spec->gpio_dir = 0x0b;
0fc9dec4 6331 spec->eapd_mask = 0x01;
4fe5195c
MR		 6332 spec->gpio_mask = 0x1b;
6333 spec->gpio_mute = 0x10;
e2e7d624 6334 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 6335 * GPIO3 Low = DRM
87d48363 6336 */
4fe5195c 6337 spec->gpio_data = 0x01;
ae0a8ed8 6338 break;
b2c4f4d7
MR		 6339 case STAC_9205_REF:
6340 /* SPDIF-In enabled */
6341 break;
ae0a8ed8
TD		 6342 default:
6343 /* GPIO0 High = EAPD */
0fc9dec4 6344 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 6345 spec->gpio_data = 0x01;
ae0a8ed8
TD		 6346 break;
6347 }
33382403 6348
9009b0e4 6349 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 6350 if (!err) {
6351 if (spec->board_config < 0) {
6352 printk(KERN_WARNING "hda_codec: No auto-config is "
6353 "available, default to model=ref\n");
6354 spec->board_config = STAC_9205_REF;
6355 goto again;
6356 }
6357 err = -EINVAL;
6358 }
f3302a59
MP		 6359 if (err < 0) {
6360 stac92xx_free(codec);
6361 return err;
6362 }
6363
6364 codec->patch_ops = stac92xx_patch_ops;
6365
2d34e1b3
TI		 6366 codec->proc_widget_hook = stac9205_proc_hook;
6367
f3302a59
MP		 6368 return 0;
6369}
6370
db064e50 6371/*
6d859065 6372 * STAC9872 hack
db064e50
TI		 6373 */
6374
2b63536f 6375static const struct hda_verb stac9872_core_init[] = {
1624cb9a 6376 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 6377 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
6378 {}
6379};
6380
2b63536f 6381static const hda_nid_t stac9872_pin_nids[] = {
caa10b6e
TI		 6382 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
6383 0x11, 0x13, 0x14,
6384};
6385
2b63536f 6386static const hda_nid_t stac9872_adc_nids[] = {
caa10b6e
TI		 6387 0x8 /*,0x6*/
6388};
6389
2b63536f 6390static const hda_nid_t stac9872_mux_nids[] = {
caa10b6e
TI		 6391 0x15
6392};
6393
2b63536f 6394static const unsigned long stac9872_capvols[] = {
6479c631
TI		 6395 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT),
6396};
6397#define stac9872_capsws stac9872_capvols
6398
2b63536f 6399static const unsigned int stac9872_vaio_pin_configs[9] = {
307282c8
TI		 6400 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
6401 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
6402 0x90a7013e
6403};
6404
ea734963 6405static const char * const stac9872_models[STAC_9872_MODELS] = {
307282c8
TI		 6406 [STAC_9872_AUTO] = "auto",
6407 [STAC_9872_VAIO] = "vaio",
6408};
6409
2b63536f 6410static const unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
307282c8
TI		 6411 [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
6412};
6413
2b63536f 6414static const struct snd_pci_quirk stac9872_cfg_tbl[] = {
b04add95
TI		 6415 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
6416 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 6417 {} /* terminator */
6418};
6419
6d859065 6420static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 6421{
6422 struct sigmatel_spec *spec;
1e137f92 6423 int err;
db064e50 6424
db064e50
TI		 6425 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6426 if (spec == NULL)
6427 return -ENOMEM;
a252c81a 6428 codec->no_trigger_sense = 1;
db064e50 6429 codec->spec = spec;
1b0e372d 6430 spec->linear_tone_beep = 1;
b04add95
TI		 6431 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
6432 spec->pin_nids = stac9872_pin_nids;
caa10b6e
TI		 6433
6434 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
6435 stac9872_models,
6436 stac9872_cfg_tbl);
307282c8 6437 if (spec->board_config < 0)
9a11f1aa
TI		 6438 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6439 codec->chip_name);
307282c8
TI		 6440 else
6441 stac92xx_set_config_regs(codec,
6442 stac9872_brd_tbl[spec->board_config]);
db064e50 6443
1e137f92
TI		 6444 spec->multiout.dac_nids = spec->dac_nids;
6445 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
6446 spec->adc_nids = stac9872_adc_nids;
6447 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
6448 spec->mux_nids = stac9872_mux_nids;
1e137f92 6449 spec->init = stac9872_core_init;
6479c631
TI		 6450 spec->num_caps = 1;
6451 spec->capvols = stac9872_capvols;
6452 spec->capsws = stac9872_capsws;
1e137f92 6453
9009b0e4 6454 err = stac92xx_parse_auto_config(codec);
1e137f92
TI		 6455 if (err < 0) {
6456 stac92xx_free(codec);
6457 return -EINVAL;
6458 }
6459 spec->input_mux = &spec->private_imux;
6460 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI		 6461 return 0;
6462}
6463
6464
2f2f4251
M		 6465/*
6466 * patch entries
6467 */
2b63536f 6468static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 6469 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
6470 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
6471 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
6472 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
6473 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
6474 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
6475 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 6476 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
6477 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
6478 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
6479 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
6480 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
6481 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 6482 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
6483 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
6484 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
6485 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
6486 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
6487 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
6488 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
6489 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
6490 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
6491 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 6492 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
6493 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
6494 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
6495 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
6496 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
6497 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 6498 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
6499 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 6500 /* The following does not take into account .id=0x83847661 when subsys =
6501 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
6502 * currently not fully supported.
6503 */
6504 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
6505 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
6506 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 6507 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP		 6508 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
6509 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
6510 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
6511 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
6512 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
6513 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
6514 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
6515 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 6516 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6 6517 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
a9694faa 6518 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
d0513fc6 6519 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 6520 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
8a345a04
CC		 6521 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
6522 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
36706005
CC		 6523 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
6524 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
6525 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
6526 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
aafc4412 6527 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 6528 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
6529 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 6530 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 6531 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6532 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6533 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6534 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6535 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6536 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6537 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
6538 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4d8ec5f3
CC		 6539 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
6540 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
6541 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
6542 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
6543 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
6544 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
6545 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
6546 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
6547 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
6548 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
6549 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
6550 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
6551 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
6552 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
6553 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
46724c2e 6554 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 6555 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4dfb8a45
VK		 6556 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
6557 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 6558 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
ad5d8755
CC		 6559 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
6560 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
6561 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
6562 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
6563 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
6564 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
6565 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
6566 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
6567 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
6568 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
6569 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
6570 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
2f2f4251
M		 6571 {} /* terminator */
6572};
1289e9e8
TI		 6573
6574MODULE_ALIAS("snd-hda-codec-id:8384*");
6575MODULE_ALIAS("snd-hda-codec-id:111d*");
6576
6577MODULE_LICENSE("GPL");
6578MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
6579
6580static struct hda_codec_preset_list sigmatel_list = {
6581 .preset = snd_hda_preset_sigmatel,
6582 .owner = THIS_MODULE,
6583};
6584
6585static int __init patch_sigmatel_init(void)
6586{
6587 return snd_hda_add_codec_preset(&sigmatel_list);
6588}
6589
6590static void __exit patch_sigmatel_exit(void)
6591{
6592 snd_hda_delete_codec_preset(&sigmatel_list);
6593}
6594
6595module_init(patch_sigmatel_init)
6596module_exit(patch_sigmatel_exit)
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