]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - sound/pci/hda/patch_sigmatel.c
projects / mirror_ubuntu-artful-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[ALSA] hda: Enable SPDIF in/out on some stac9205 boards
[mirror_ubuntu-artful-kernel.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <sound/driver.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/pci.h>
32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
36
4e55096e
M		 37#define NUM_CONTROL_ALLOC 32
38#define STAC_HP_EVENT 0x37
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
42 STAC_9200_MODELS
43};
44
45enum {
46 STAC_9205_REF,
87d48363 47 STAC_M43xx,
f5fcc13c
TI		 48 STAC_9205_MODELS
49};
50
8e21c34c
TD		 51enum {
52 STAC_925x_REF,
53 STAC_M2_2,
54 STAC_MA6,
2c11f955 55 STAC_PA6,
8e21c34c
TD		 56 STAC_925x_MODELS
57};
58
f5fcc13c
TI		 59enum {
60 STAC_D945_REF,
61 STAC_D945GTP3,
62 STAC_D945GTP5,
76c08828 63 STAC_922X_DELL,
5d5d3bc3
IZ		 64 STAC_INTEL_MAC_V1,
65 STAC_INTEL_MAC_V2,
66 STAC_INTEL_MAC_V3,
67 STAC_INTEL_MAC_V4,
68 STAC_INTEL_MAC_V5,
69 /* for backward compitability */
f5fcc13c 70 STAC_MACMINI,
3fc24d85 71 STAC_MACBOOK,
6f0778d8
NB		 72 STAC_MACBOOK_PRO_V1,
73 STAC_MACBOOK_PRO_V2,
f16928fb 74 STAC_IMAC_INTEL,
0dae0f83 75 STAC_IMAC_INTEL_20,
f5fcc13c
TI		 76 STAC_922X_MODELS
77};
78
79enum {
80 STAC_D965_REF,
81 STAC_D965_3ST,
82 STAC_D965_5ST,
83 STAC_927X_MODELS
84};
403d1944 85
2f2f4251 86struct sigmatel_spec {
c8b6bf9b 87 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 88 unsigned int num_mixers;
89
403d1944 90 int board_config;
c7d4b2fa 91 unsigned int surr_switch: 1;
403d1944
MP		 92 unsigned int line_switch: 1;
93 unsigned int mic_switch: 1;
3cc08dc6 94 unsigned int alt_switch: 1;
82bc955f 95 unsigned int hp_detect: 1;
62fe78e9 96 unsigned int gpio_mute: 1;
c7d4b2fa 97
2f2f4251
M		 98 /* playback */
99 struct hda_multi_out multiout;
3cc08dc6 100 hda_nid_t dac_nids[5];
2f2f4251
M		 101
102 /* capture */
103 hda_nid_t *adc_nids;
2f2f4251 104 unsigned int num_adcs;
dabbed6f
M		 105 hda_nid_t *mux_nids;
106 unsigned int num_muxes;
8b65727b
MP		 107 hda_nid_t *dmic_nids;
108 unsigned int num_dmics;
109 hda_nid_t dmux_nid;
dabbed6f 110 hda_nid_t dig_in_nid;
2f2f4251 111
2f2f4251
M		 112 /* pin widgets */
113 hda_nid_t *pin_nids;
114 unsigned int num_pins;
2f2f4251 115 unsigned int *pin_configs;
11b44bbd 116 unsigned int *bios_pin_configs;
2f2f4251
M		 117
118 /* codec specific stuff */
119 struct hda_verb *init;
c8b6bf9b 120 struct snd_kcontrol_new *mixer;
2f2f4251
M		 121
122 /* capture source */
8b65727b
MP		 123 struct hda_input_mux *dinput_mux;
124 unsigned int cur_dmux;
c7d4b2fa 125 struct hda_input_mux *input_mux;
3cc08dc6 126 unsigned int cur_mux[3];
2f2f4251 127
403d1944
MP		 128 /* i/o switches */
129 unsigned int io_switch[2];
2f2f4251 130
c7d4b2fa
M		 131 struct hda_pcm pcm_rec[2]; /* PCM information */
132
133 /* dynamic controls and input_mux */
134 struct auto_pin_cfg autocfg;
135 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 136 struct snd_kcontrol_new *kctl_alloc;
8b65727b 137 struct hda_input_mux private_dimux;
c7d4b2fa 138 struct hda_input_mux private_imux;
2f2f4251
M		 139};
140
141static hda_nid_t stac9200_adc_nids[1] = {
142 0x03,
143};
144
145static hda_nid_t stac9200_mux_nids[1] = {
146 0x0c,
147};
148
149static hda_nid_t stac9200_dac_nids[1] = {
150 0x02,
151};
152
8e21c34c
TD		 153static hda_nid_t stac925x_adc_nids[1] = {
154 0x03,
155};
156
157static hda_nid_t stac925x_mux_nids[1] = {
158 0x0f,
159};
160
161static hda_nid_t stac925x_dac_nids[1] = {
162 0x02,
163};
164
2c11f955
TD		 165static hda_nid_t stac925x_dmic_nids[1] = {
166 0x15,
167};
168
2f2f4251
M		 169static hda_nid_t stac922x_adc_nids[2] = {
170 0x06, 0x07,
171};
172
173static hda_nid_t stac922x_mux_nids[2] = {
174 0x12, 0x13,
175};
176
3cc08dc6
MP		 177static hda_nid_t stac927x_adc_nids[3] = {
178 0x07, 0x08, 0x09
179};
180
181static hda_nid_t stac927x_mux_nids[3] = {
182 0x15, 0x16, 0x17
183};
184
f3302a59
MP		 185static hda_nid_t stac9205_adc_nids[2] = {
186 0x12, 0x13
187};
188
189static hda_nid_t stac9205_mux_nids[2] = {
190 0x19, 0x1a
191};
192
2549413e
TI		 193static hda_nid_t stac9205_dmic_nids[2] = {
194 0x17, 0x18,
8b65727b
MP		 195};
196
c7d4b2fa 197static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 198 0x08, 0x09, 0x0d, 0x0e,
199 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 200};
201
8e21c34c
TD		 202static hda_nid_t stac925x_pin_nids[8] = {
203 0x07, 0x08, 0x0a, 0x0b,
204 0x0c, 0x0d, 0x10, 0x11,
205};
206
2f2f4251
M		 207static hda_nid_t stac922x_pin_nids[10] = {
208 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
209 0x0f, 0x10, 0x11, 0x15, 0x1b,
210};
211
3cc08dc6
MP		 212static hda_nid_t stac927x_pin_nids[14] = {
213 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
214 0x0f, 0x10, 0x11, 0x12, 0x13,
215 0x14, 0x21, 0x22, 0x23,
216};
217
f3302a59
MP		 218static hda_nid_t stac9205_pin_nids[12] = {
219 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
220 0x0f, 0x14, 0x16, 0x17, 0x18,
221 0x21, 0x22,
f3302a59
MP		 222};
223
8b65727b
MP		 224static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
225 struct snd_ctl_elem_info *uinfo)
226{
227 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
228 struct sigmatel_spec *spec = codec->spec;
229 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
230}
231
232static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
233 struct snd_ctl_elem_value *ucontrol)
234{
235 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
236 struct sigmatel_spec *spec = codec->spec;
237
238 ucontrol->value.enumerated.item[0] = spec->cur_dmux;
239 return 0;
240}
241
242static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
243 struct snd_ctl_elem_value *ucontrol)
244{
245 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
246 struct sigmatel_spec *spec = codec->spec;
247
248 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
249 spec->dmux_nid, &spec->cur_dmux);
250}
251
c8b6bf9b 252static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 253{
254 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
255 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 256 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 257}
258
c8b6bf9b 259static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 260{
261 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
262 struct sigmatel_spec *spec = codec->spec;
263 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
264
265 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
266 return 0;
267}
268
c8b6bf9b 269static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 270{
271 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
272 struct sigmatel_spec *spec = codec->spec;
273 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
274
c7d4b2fa 275 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 276 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
277}
278
c7d4b2fa 279static struct hda_verb stac9200_core_init[] = {
2f2f4251 280 /* set dac0mux for dac converter */
c7d4b2fa 281 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 282 {}
283};
284
8e21c34c
TD		 285static struct hda_verb stac925x_core_init[] = {
286 /* set dac0mux for dac converter */
287 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
288 {}
289};
290
c7d4b2fa 291static struct hda_verb stac922x_core_init[] = {
2f2f4251 292 /* set master volume and direct control */
c7d4b2fa 293 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 294 {}
295};
296
93ed1503 297static struct hda_verb d965_core_init[] = {
19039bd0 298 /* set master volume and direct control */
93ed1503 299 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 300 /* unmute node 0x1b */
301 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
302 /* select node 0x03 as DAC */
303 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
304 {}
305};
306
3cc08dc6
MP		 307static struct hda_verb stac927x_core_init[] = {
308 /* set master volume and direct control */
309 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
310 {}
311};
312
f3302a59
MP		 313static struct hda_verb stac9205_core_init[] = {
314 /* set master volume and direct control */
315 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
316 {}
317};
318
c8b6bf9b 319static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 320 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
321 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
322 {
323 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
324 .name = "Input Source",
325 .count = 1,
326 .info = stac92xx_mux_enum_info,
327 .get = stac92xx_mux_enum_get,
328 .put = stac92xx_mux_enum_put,
329 },
330 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
331 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 332 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 333 { } /* end */
334};
335
8e21c34c 336static struct snd_kcontrol_new stac925x_mixer[] = {
8e21c34c
TD		 337 {
338 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
339 .name = "Input Source",
340 .count = 1,
341 .info = stac92xx_mux_enum_info,
342 .get = stac92xx_mux_enum_get,
343 .put = stac92xx_mux_enum_put,
344 },
345 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
346 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
347 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
348 { } /* end */
349};
350
c7d4b2fa 351/* This needs to be generated dynamically based on sequence */
c8b6bf9b 352static struct snd_kcontrol_new stac922x_mixer[] = {
2f2f4251
M		 353 {
354 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
355 .name = "Input Source",
356 .count = 1,
357 .info = stac92xx_mux_enum_info,
358 .get = stac92xx_mux_enum_get,
359 .put = stac92xx_mux_enum_put,
360 },
361 HDA_CODEC_VOLUME("Capture Volume", 0x17, 0x0, HDA_INPUT),
0fd1708a 362 HDA_CODEC_MUTE("Capture Switch", 0x17, 0x0, HDA_INPUT),
2f2f4251
M		 363 HDA_CODEC_VOLUME("Mux Capture Volume", 0x12, 0x0, HDA_OUTPUT),
364 { } /* end */
365};
366
19039bd0
TI		 367/* This needs to be generated dynamically based on sequence */
368static struct snd_kcontrol_new stac9227_mixer[] = {
369 {
370 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
371 .name = "Input Source",
372 .count = 1,
373 .info = stac92xx_mux_enum_info,
374 .get = stac92xx_mux_enum_get,
375 .put = stac92xx_mux_enum_put,
376 },
377 HDA_CODEC_VOLUME("Capture Volume", 0x15, 0x0, HDA_OUTPUT),
378 HDA_CODEC_MUTE("Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
379 { } /* end */
380};
381
d1d985f0 382static struct snd_kcontrol_new stac927x_mixer[] = {
3cc08dc6
MP		 383 {
384 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
385 .name = "Input Source",
386 .count = 1,
387 .info = stac92xx_mux_enum_info,
388 .get = stac92xx_mux_enum_get,
389 .put = stac92xx_mux_enum_put,
390 },
391 HDA_CODEC_VOLUME("InMux Capture Volume", 0x15, 0x0, HDA_OUTPUT),
392 HDA_CODEC_VOLUME("InVol Capture Volume", 0x18, 0x0, HDA_INPUT),
393 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
394 { } /* end */
395};
396
d1d985f0 397static struct snd_kcontrol_new stac9205_mixer[] = {
8b65727b
MP		 398 {
399 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
400 .name = "Digital Input Source",
401 .count = 1,
402 .info = stac92xx_dmux_enum_info,
403 .get = stac92xx_dmux_enum_get,
404 .put = stac92xx_dmux_enum_put,
405 },
f3302a59
MP		 406 {
407 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
408 .name = "Input Source",
409 .count = 1,
410 .info = stac92xx_mux_enum_info,
411 .get = stac92xx_mux_enum_get,
412 .put = stac92xx_mux_enum_put,
413 },
414 HDA_CODEC_VOLUME("InMux Capture Volume", 0x19, 0x0, HDA_OUTPUT),
415 HDA_CODEC_VOLUME("InVol Capture Volume", 0x1b, 0x0, HDA_INPUT),
416 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1d, 0x0, HDA_OUTPUT),
417 { } /* end */
418};
419
2f2f4251
M		 420static int stac92xx_build_controls(struct hda_codec *codec)
421{
422 struct sigmatel_spec *spec = codec->spec;
423 int err;
c7d4b2fa 424 int i;
2f2f4251
M		 425
426 err = snd_hda_add_new_ctls(codec, spec->mixer);
427 if (err < 0)
428 return err;
c7d4b2fa
M		 429
430 for (i = 0; i < spec->num_mixers; i++) {
431 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
432 if (err < 0)
433 return err;
434 }
435
dabbed6f
M		 436 if (spec->multiout.dig_out_nid) {
437 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
438 if (err < 0)
439 return err;
440 }
441 if (spec->dig_in_nid) {
442 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
443 if (err < 0)
444 return err;
445 }
446 return 0;
2f2f4251
M		 447}
448
403d1944 449static unsigned int ref9200_pin_configs[8] = {
dabbed6f 450 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 451 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
452};
453
f5fcc13c
TI		 454static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
455 [STAC_REF] = ref9200_pin_configs,
403d1944
MP		 456};
457
f5fcc13c
TI		 458static const char *stac9200_models[STAC_9200_MODELS] = {
459 [STAC_REF] = "ref",
460};
461
462static struct snd_pci_quirk stac9200_cfg_tbl[] = {
463 /* SigmaTel reference board */
464 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
465 "DFI LanParty", STAC_REF),
e7377071 466 /* Dell laptops have BIOS problem */
f5fcc13c
TI		 467 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
468 "Dell Inspiron 630m", STAC_REF),
469 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
470 "Dell Latitude D620", STAC_REF),
471 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
472 "Dell Latitude 120L", STAC_REF),
877b866d
CT		 473 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
474 "Dell Latitude D820", STAC_REF),
46f02ca3
MN		 475 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
476 "Dell Inspiron E1705/9400", STAC_REF),
477 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
478 "Dell XPS M1710", STAC_REF),
f0f96745
TI		 479 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
480 "Dell Precision M90", STAC_REF),
8286c53e
DC		 481 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
482 "unknown Dell", STAC_REF),
49c605db
TD		 483 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
484 "Dell Inspiron 640m", STAC_REF),
485 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
486 "Dell Inspiron 1501", STAC_REF),
487
488 /* Panasonic */
489 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
490
403d1944
MP		 491 {} /* terminator */
492};
493
8e21c34c
TD		 494static unsigned int ref925x_pin_configs[8] = {
495 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
496 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
497};
498
499static unsigned int stac925x_MA6_pin_configs[8] = {
500 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
501 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
502};
503
2c11f955
TD		 504static unsigned int stac925x_PA6_pin_configs[8] = {
505 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
506 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
507};
508
8e21c34c 509static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 510 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
511 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 512};
513
514static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
515 [STAC_REF] = ref925x_pin_configs,
516 [STAC_M2_2] = stac925xM2_2_pin_configs,
517 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 518 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 519};
520
521static const char *stac925x_models[STAC_925x_MODELS] = {
522 [STAC_REF] = "ref",
523 [STAC_M2_2] = "m2-2",
524 [STAC_MA6] = "m6",
2c11f955 525 [STAC_PA6] = "pa6",
8e21c34c
TD		 526};
527
528static struct snd_pci_quirk stac925x_cfg_tbl[] = {
529 /* SigmaTel reference board */
530 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 531 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 532 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
533 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
534 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 535 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 536 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
537 {} /* terminator */
538};
539
403d1944
MP		 540static unsigned int ref922x_pin_configs[10] = {
541 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
542 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 543 0x40000100, 0x40000100,
544};
545
403d1944 546static unsigned int d945gtp3_pin_configs[10] = {
869264c4 547 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 548 0x40000100, 0x40000100, 0x40000100, 0x40000100,
549 0x02a19120, 0x40000100,
550};
551
552static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 553 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
554 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 555 0x02a19320, 0x40000100,
556};
557
5d5d3bc3
IZ		 558static unsigned int intel_mac_v1_pin_configs[10] = {
559 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
560 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
561 0x400000fc, 0x400000fb,
562};
563
564static unsigned int intel_mac_v2_pin_configs[10] = {
565 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
566 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
567 0x400000fc, 0x400000fb,
6f0778d8
NB		 568};
569
5d5d3bc3
IZ		 570static unsigned int intel_mac_v3_pin_configs[10] = {
571 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
572 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 573 0x400000fc, 0x400000fb,
574};
575
5d5d3bc3
IZ		 576static unsigned int intel_mac_v4_pin_configs[10] = {
577 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
578 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 579 0x400000fc, 0x400000fb,
580};
581
5d5d3bc3
IZ		 582static unsigned int intel_mac_v5_pin_configs[10] = {
583 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
584 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
585 0x400000fc, 0x400000fb,
0dae0f83
TI		 586};
587
76c08828
TI		 588static unsigned int stac922x_dell_pin_configs[10] = {
589 0x0221121e, 0x408103ff, 0x02a1123e, 0x90100310,
590 0x408003f1, 0x0221122f, 0x03451340, 0x40c003f2,
591 0x50a003f3, 0x405003f4
592};
593
19039bd0 594static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 595 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 596 [STAC_D945GTP3] = d945gtp3_pin_configs,
597 [STAC_D945GTP5] = d945gtp5_pin_configs,
76c08828 598 [STAC_922X_DELL] = stac922x_dell_pin_configs,
5d5d3bc3
IZ		 599 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
600 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
601 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
602 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
603 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
604 /* for backward compitability */
605 [STAC_MACMINI] = intel_mac_v3_pin_configs,
606 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
607 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
608 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
609 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
610 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
403d1944
MP		 611};
612
f5fcc13c
TI		 613static const char *stac922x_models[STAC_922X_MODELS] = {
614 [STAC_D945_REF] = "ref",
615 [STAC_D945GTP5] = "5stack",
616 [STAC_D945GTP3] = "3stack",
76c08828 617 [STAC_922X_DELL] = "dell",
5d5d3bc3
IZ		 618 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
619 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
620 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
621 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
622 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
623 /* for backward compitability */
f5fcc13c 624 [STAC_MACMINI] = "macmini",
3fc24d85 625 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 626 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
627 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 628 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 629 [STAC_IMAC_INTEL_20] = "imac-intel-20",
f5fcc13c
TI		 630};
631
632static struct snd_pci_quirk stac922x_cfg_tbl[] = {
633 /* SigmaTel reference board */
634 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
635 "DFI LanParty", STAC_D945_REF),
636 /* Intel 945G based systems */
637 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
638 "Intel D945G", STAC_D945GTP3),
639 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
640 "Intel D945G", STAC_D945GTP3),
641 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
642 "Intel D945G", STAC_D945GTP3),
643 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
644 "Intel D945G", STAC_D945GTP3),
645 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
646 "Intel D945G", STAC_D945GTP3),
647 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
648 "Intel D945G", STAC_D945GTP3),
649 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
650 "Intel D945G", STAC_D945GTP3),
651 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
652 "Intel D945G", STAC_D945GTP3),
653 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
654 "Intel D945G", STAC_D945GTP3),
655 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
656 "Intel D945G", STAC_D945GTP3),
657 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
658 "Intel D945G", STAC_D945GTP3),
659 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
660 "Intel D945G", STAC_D945GTP3),
661 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
662 "Intel D945G", STAC_D945GTP3),
663 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
664 "Intel D945G", STAC_D945GTP3),
665 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
666 "Intel D945G", STAC_D945GTP3),
667 /* Intel D945G 5-stack systems */
668 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
669 "Intel D945G", STAC_D945GTP5),
670 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
671 "Intel D945G", STAC_D945GTP5),
672 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
673 "Intel D945G", STAC_D945GTP5),
674 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
675 "Intel D945G", STAC_D945GTP5),
676 /* Intel 945P based systems */
677 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
678 "Intel D945P", STAC_D945GTP3),
679 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
680 "Intel D945P", STAC_D945GTP3),
681 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
682 "Intel D945P", STAC_D945GTP3),
683 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
684 "Intel D945P", STAC_D945GTP3),
685 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
686 "Intel D945P", STAC_D945GTP3),
687 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
688 "Intel D945P", STAC_D945GTP5),
689 /* other systems */
690 /* Apple Mac Mini (early 2006) */
691 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 692 "Mac Mini", STAC_INTEL_MAC_V3),
76c08828
TI		 693 /* Dell */
694 SND_PCI_QUIRK(0x1028, 0x01d7, "Dell XPS M1210", STAC_922X_DELL),
695
403d1944
MP		 696 {} /* terminator */
697};
698
3cc08dc6 699static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 700 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
701 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
702 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
703 0x01c42190, 0x40000100,
3cc08dc6
MP		 704};
705
93ed1503 706static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 707 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
708 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
709 0x40000100, 0x40000100, 0x40000100, 0x40000100,
710 0x40000100, 0x40000100
711};
712
93ed1503
TD		 713static unsigned int d965_5st_pin_configs[14] = {
714 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
715 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
716 0x40000100, 0x40000100, 0x40000100, 0x01442070,
717 0x40000100, 0x40000100
718};
719
720static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
f5fcc13c 721 [STAC_D965_REF] = ref927x_pin_configs,
93ed1503
TD		 722 [STAC_D965_3ST] = d965_3st_pin_configs,
723 [STAC_D965_5ST] = d965_5st_pin_configs,
3cc08dc6
MP		 724};
725
f5fcc13c
TI		 726static const char *stac927x_models[STAC_927X_MODELS] = {
727 [STAC_D965_REF] = "ref",
728 [STAC_D965_3ST] = "3stack",
729 [STAC_D965_5ST] = "5stack",
730};
731
732static struct snd_pci_quirk stac927x_cfg_tbl[] = {
733 /* SigmaTel reference board */
734 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
735 "DFI LanParty", STAC_D965_REF),
81d3dbde 736 /* Intel 946 based systems */
f5fcc13c
TI		 737 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
738 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 739 /* 965 based 3 stack systems */
f5fcc13c
TI		 740 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
741 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
742 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
743 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
744 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
745 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
746 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
747 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
748 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
749 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
750 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
751 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
752 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
753 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
754 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
755 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
93ed1503 756 /* 965 based 5 stack systems */
f5fcc13c
TI		 757 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
758 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
759 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
760 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
761 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
762 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
763 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
764 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
765 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 766 {} /* terminator */
767};
768
f3302a59
MP		 769static unsigned int ref9205_pin_configs[12] = {
770 0x40000100, 0x40000100, 0x01016011, 0x01014010,
8b65727b
MP		 771 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
772 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 773};
774
f5fcc13c 775static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
87d48363
MR		 776 [STAC_REF] = ref9205_pin_configs,
777 [STAC_M43xx] = NULL,
f3302a59
MP		 778};
779
f5fcc13c
TI		 780static const char *stac9205_models[STAC_9205_MODELS] = {
781 [STAC_9205_REF] = "ref",
782};
783
784static struct snd_pci_quirk stac9205_cfg_tbl[] = {
785 /* SigmaTel reference board */
786 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
787 "DFI LanParty", STAC_9205_REF),
87d48363
MR		 788 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x01f8,
789 "Dell Precision", STAC_M43xx),
790 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x01ff,
791 "Dell Precision", STAC_M43xx),
f3302a59
MP		 792 {} /* terminator */
793};
794
11b44bbd
RF		 795static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
796{
797 int i;
798 struct sigmatel_spec *spec = codec->spec;
799
800 if (! spec->bios_pin_configs) {
801 spec->bios_pin_configs = kcalloc(spec->num_pins,
802 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
803 if (! spec->bios_pin_configs)
804 return -ENOMEM;
805 }
806
807 for (i = 0; i < spec->num_pins; i++) {
808 hda_nid_t nid = spec->pin_nids[i];
809 unsigned int pin_cfg;
810
811 pin_cfg = snd_hda_codec_read(codec, nid, 0,
812 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
813 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
814 nid, pin_cfg);
815 spec->bios_pin_configs[i] = pin_cfg;
816 }
817
818 return 0;
819}
820
87d48363
MR		 821static void stac92xx_set_config_reg(struct hda_codec *codec,
822 hda_nid_t pin_nid, unsigned int pin_config)
823{
824 int i;
825 snd_hda_codec_write(codec, pin_nid, 0,
826 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
827 pin_config & 0x000000ff);
828 snd_hda_codec_write(codec, pin_nid, 0,
829 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
830 (pin_config & 0x0000ff00) >> 8);
831 snd_hda_codec_write(codec, pin_nid, 0,
832 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
833 (pin_config & 0x00ff0000) >> 16);
834 snd_hda_codec_write(codec, pin_nid, 0,
835 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
836 pin_config >> 24);
837 i = snd_hda_codec_read(codec, pin_nid, 0,
838 AC_VERB_GET_CONFIG_DEFAULT,
839 0x00);
840 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
841 pin_nid, i);
842}
843
2f2f4251
M		 844static void stac92xx_set_config_regs(struct hda_codec *codec)
845{
846 int i;
847 struct sigmatel_spec *spec = codec->spec;
2f2f4251 848
87d48363
MR		 849 if (!spec->pin_configs)
850 return;
11b44bbd 851
87d48363
MR		 852 for (i = 0; i < spec->num_pins; i++)
853 stac92xx_set_config_reg(codec, spec->pin_nids[i],
854 spec->pin_configs[i]);
2f2f4251 855}
2f2f4251 856
87d48363
MR		 857static void stac92xx_enable_gpio_mask(struct hda_codec *codec,
858 int gpio_mask, int gpio_data)
92a22beb 859{
87d48363 860 /* Configure GPIOx as output */
92a22beb 861 snd_hda_codec_write(codec, codec->afg, 0,
87d48363
MR		 862 AC_VERB_SET_GPIO_DIRECTION, gpio_mask);
863 /* Configure GPIOx as CMOS */
92a22beb 864 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0x00000000);
87d48363 865 /* Assert GPIOx */
92a22beb 866 snd_hda_codec_write(codec, codec->afg, 0,
87d48363
MR		 867 AC_VERB_SET_GPIO_DATA, gpio_data);
868 /* Enable GPIOx */
92a22beb 869 snd_hda_codec_write(codec, codec->afg, 0,
87d48363 870 AC_VERB_SET_GPIO_MASK, gpio_mask);
92a22beb
MR		 871}
872
dabbed6f 873/*
c7d4b2fa 874 * Analog playback callbacks
dabbed6f 875 */
c7d4b2fa
M		 876static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
877 struct hda_codec *codec,
c8b6bf9b 878 struct snd_pcm_substream *substream)
2f2f4251 879{
dabbed6f 880 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 881 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 882}
883
2f2f4251
M		 884static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
885 struct hda_codec *codec,
886 unsigned int stream_tag,
887 unsigned int format,
c8b6bf9b 888 struct snd_pcm_substream *substream)
2f2f4251
M		 889{
890 struct sigmatel_spec *spec = codec->spec;
403d1944 891 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 892}
893
894static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
895 struct hda_codec *codec,
c8b6bf9b 896 struct snd_pcm_substream *substream)
2f2f4251
M		 897{
898 struct sigmatel_spec *spec = codec->spec;
899 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
900}
901
dabbed6f
M		 902/*
903 * Digital playback callbacks
904 */
905static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
906 struct hda_codec *codec,
c8b6bf9b 907 struct snd_pcm_substream *substream)
dabbed6f
M		 908{
909 struct sigmatel_spec *spec = codec->spec;
910 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
911}
912
913static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
914 struct hda_codec *codec,
c8b6bf9b 915 struct snd_pcm_substream *substream)
dabbed6f
M		 916{
917 struct sigmatel_spec *spec = codec->spec;
918 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
919}
920
6b97eb45
TI		 921static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
922 struct hda_codec *codec,
923 unsigned int stream_tag,
924 unsigned int format,
925 struct snd_pcm_substream *substream)
926{
927 struct sigmatel_spec *spec = codec->spec;
928 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
929 stream_tag, format, substream);
930}
931
dabbed6f 932
2f2f4251
M		 933/*
934 * Analog capture callbacks
935 */
936static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
937 struct hda_codec *codec,
938 unsigned int stream_tag,
939 unsigned int format,
c8b6bf9b 940 struct snd_pcm_substream *substream)
2f2f4251
M		 941{
942 struct sigmatel_spec *spec = codec->spec;
943
944 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
945 stream_tag, 0, format);
946 return 0;
947}
948
949static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
950 struct hda_codec *codec,
c8b6bf9b 951 struct snd_pcm_substream *substream)
2f2f4251
M		 952{
953 struct sigmatel_spec *spec = codec->spec;
954
955 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
956 return 0;
957}
958
dabbed6f
M		 959static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
960 .substreams = 1,
961 .channels_min = 2,
962 .channels_max = 2,
963 /* NID is set in stac92xx_build_pcms */
964 .ops = {
965 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 966 .close = stac92xx_dig_playback_pcm_close,
967 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 968 },
969};
970
971static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
972 .substreams = 1,
973 .channels_min = 2,
974 .channels_max = 2,
975 /* NID is set in stac92xx_build_pcms */
976};
977
2f2f4251
M		 978static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
979 .substreams = 1,
980 .channels_min = 2,
c7d4b2fa 981 .channels_max = 8,
2f2f4251
M		 982 .nid = 0x02, /* NID to query formats and rates */
983 .ops = {
984 .open = stac92xx_playback_pcm_open,
985 .prepare = stac92xx_playback_pcm_prepare,
986 .cleanup = stac92xx_playback_pcm_cleanup
987 },
988};
989
3cc08dc6
MP		 990static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
991 .substreams = 1,
992 .channels_min = 2,
993 .channels_max = 2,
994 .nid = 0x06, /* NID to query formats and rates */
995 .ops = {
996 .open = stac92xx_playback_pcm_open,
997 .prepare = stac92xx_playback_pcm_prepare,
998 .cleanup = stac92xx_playback_pcm_cleanup
999 },
1000};
1001
2f2f4251
M		 1002static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
1003 .substreams = 2,
1004 .channels_min = 2,
1005 .channels_max = 2,
3cc08dc6 1006 /* NID is set in stac92xx_build_pcms */
2f2f4251
M		 1007 .ops = {
1008 .prepare = stac92xx_capture_pcm_prepare,
1009 .cleanup = stac92xx_capture_pcm_cleanup
1010 },
1011};
1012
1013static int stac92xx_build_pcms(struct hda_codec *codec)
1014{
1015 struct sigmatel_spec *spec = codec->spec;
1016 struct hda_pcm *info = spec->pcm_rec;
1017
1018 codec->num_pcms = 1;
1019 codec->pcm_info = info;
1020
c7d4b2fa 1021 info->name = "STAC92xx Analog";
2f2f4251 1022 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1023 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6
MP		 1024 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
1025
1026 if (spec->alt_switch) {
1027 codec->num_pcms++;
1028 info++;
1029 info->name = "STAC92xx Analog Alt";
1030 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1031 }
2f2f4251 1032
dabbed6f
M		 1033 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1034 codec->num_pcms++;
1035 info++;
1036 info->name = "STAC92xx Digital";
1037 if (spec->multiout.dig_out_nid) {
1038 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1039 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1040 }
1041 if (spec->dig_in_nid) {
1042 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1043 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1044 }
1045 }
1046
2f2f4251
M		 1047 return 0;
1048}
1049
c960a03b
TI		 1050static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1051{
1052 unsigned int pincap = snd_hda_param_read(codec, nid,
1053 AC_PAR_PIN_CAP);
1054 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1055 if (pincap & AC_PINCAP_VREF_100)
1056 return AC_PINCTL_VREF_100;
1057 if (pincap & AC_PINCAP_VREF_80)
1058 return AC_PINCTL_VREF_80;
1059 if (pincap & AC_PINCAP_VREF_50)
1060 return AC_PINCTL_VREF_50;
1061 if (pincap & AC_PINCAP_VREF_GRD)
1062 return AC_PINCTL_VREF_GRD;
1063 return 0;
1064}
1065
403d1944
MP		 1066static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1067
1068{
1069 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
1070}
1071
1072static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1073{
1074 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1075 uinfo->count = 1;
1076 uinfo->value.integer.min = 0;
1077 uinfo->value.integer.max = 1;
1078 return 0;
1079}
1080
1081static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1082{
1083 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1084 struct sigmatel_spec *spec = codec->spec;
1085 int io_idx = kcontrol-> private_value & 0xff;
1086
1087 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1088 return 0;
1089}
1090
1091static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1092{
1093 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1094 struct sigmatel_spec *spec = codec->spec;
1095 hda_nid_t nid = kcontrol->private_value >> 8;
1096 int io_idx = kcontrol-> private_value & 0xff;
1097 unsigned short val = ucontrol->value.integer.value[0];
1098
1099 spec->io_switch[io_idx] = val;
1100
1101 if (val)
1102 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1103 else {
1104 unsigned int pinctl = AC_PINCTL_IN_EN;
1105 if (io_idx) /* set VREF for mic */
1106 pinctl |= stac92xx_get_vref(codec, nid);
1107 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1108 }
403d1944
MP		 1109 return 1;
1110}
1111
1112#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1113 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1114 .name = xname, \
1115 .index = 0, \
1116 .info = stac92xx_io_switch_info, \
1117 .get = stac92xx_io_switch_get, \
1118 .put = stac92xx_io_switch_put, \
1119 .private_value = xpval, \
1120 }
1121
1122
c7d4b2fa
M		 1123enum {
1124 STAC_CTL_WIDGET_VOL,
1125 STAC_CTL_WIDGET_MUTE,
403d1944 1126 STAC_CTL_WIDGET_IO_SWITCH,
c7d4b2fa
M		 1127};
1128
c8b6bf9b 1129static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 1130 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
1131 HDA_CODEC_MUTE(NULL, 0, 0, 0),
403d1944 1132 STAC_CODEC_IO_SWITCH(NULL, 0),
c7d4b2fa
M		 1133};
1134
1135/* add dynamic controls */
1136static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
1137{
c8b6bf9b 1138 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 1139
1140 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
1141 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
1142
1143 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
1144 if (! knew)
1145 return -ENOMEM;
1146 if (spec->kctl_alloc) {
1147 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
1148 kfree(spec->kctl_alloc);
1149 }
1150 spec->kctl_alloc = knew;
1151 spec->num_kctl_alloc = num;
1152 }
1153
1154 knew = &spec->kctl_alloc[spec->num_kctl_used];
1155 *knew = stac92xx_control_templates[type];
82fe0c58 1156 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 1157 if (! knew->name)
1158 return -ENOMEM;
1159 knew->private_value = val;
1160 spec->num_kctl_used++;
1161 return 0;
1162}
1163
403d1944
MP		 1164/* flag inputs as additional dynamic lineouts */
1165static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
1166{
1167 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1168 unsigned int wcaps, wtype;
1169 int i, num_dacs = 0;
1170
1171 /* use the wcaps cache to count all DACs available for line-outs */
1172 for (i = 0; i < codec->num_nodes; i++) {
1173 wcaps = codec->wcaps[i];
1174 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1175 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
1176 num_dacs++;
1177 }
403d1944 1178
7b043899
SL		 1179 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
1180
403d1944
MP		 1181 switch (cfg->line_outs) {
1182 case 3:
1183 /* add line-in as side */
7b043899 1184 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
403d1944
MP		 1185 cfg->line_out_pins[3] = cfg->input_pins[AUTO_PIN_LINE];
1186 spec->line_switch = 1;
1187 cfg->line_outs++;
1188 }
1189 break;
1190 case 2:
1191 /* add line-in as clfe and mic as side */
7b043899 1192 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
403d1944
MP		 1193 cfg->line_out_pins[2] = cfg->input_pins[AUTO_PIN_LINE];
1194 spec->line_switch = 1;
1195 cfg->line_outs++;
1196 }
7b043899 1197 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
403d1944
MP		 1198 cfg->line_out_pins[3] = cfg->input_pins[AUTO_PIN_MIC];
1199 spec->mic_switch = 1;
1200 cfg->line_outs++;
1201 }
1202 break;
1203 case 1:
1204 /* add line-in as surr and mic as clfe */
7b043899 1205 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
403d1944
MP		 1206 cfg->line_out_pins[1] = cfg->input_pins[AUTO_PIN_LINE];
1207 spec->line_switch = 1;
1208 cfg->line_outs++;
1209 }
7b043899 1210 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
403d1944
MP		 1211 cfg->line_out_pins[2] = cfg->input_pins[AUTO_PIN_MIC];
1212 spec->mic_switch = 1;
1213 cfg->line_outs++;
1214 }
1215 break;
1216 }
1217
1218 return 0;
1219}
1220
7b043899
SL		 1221
1222static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
1223{
1224 int i;
1225
1226 for (i = 0; i < spec->multiout.num_dacs; i++) {
1227 if (spec->multiout.dac_nids[i] == nid)
1228 return 1;
1229 }
1230
1231 return 0;
1232}
1233
3cc08dc6 1234/*
7b043899
SL		 1235 * Fill in the dac_nids table from the parsed pin configuration
1236 * This function only works when every pin in line_out_pins[]
1237 * contains atleast one DAC in its connection list. Some 92xx
1238 * codecs are not connected directly to a DAC, such as the 9200
1239 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 1240 */
19039bd0 1241static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 1242 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 1243{
1244 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1245 int i, j, conn_len = 0;
1246 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
1247 unsigned int wcaps, wtype;
1248
c7d4b2fa
M		 1249 for (i = 0; i < cfg->line_outs; i++) {
1250 nid = cfg->line_out_pins[i];
7b043899
SL		 1251 conn_len = snd_hda_get_connections(codec, nid, conn,
1252 HDA_MAX_CONNECTIONS);
1253 for (j = 0; j < conn_len; j++) {
1254 wcaps = snd_hda_param_read(codec, conn[j],
1255 AC_PAR_AUDIO_WIDGET_CAP);
1256 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1257
1258 if (wtype != AC_WID_AUD_OUT ||
1259 (wcaps & AC_WCAP_DIGITAL))
1260 continue;
1261 /* conn[j] is a DAC routed to this line-out */
1262 if (!is_in_dac_nids(spec, conn[j]))
1263 break;
1264 }
1265
1266 if (j == conn_len) {
df802952
TI		 1267 if (spec->multiout.num_dacs > 0) {
1268 /* we have already working output pins,
1269 * so let's drop the broken ones again
1270 */
1271 cfg->line_outs = spec->multiout.num_dacs;
1272 break;
1273 }
7b043899
SL		 1274 /* error out, no available DAC found */
1275 snd_printk(KERN_ERR
1276 "%s: No available DAC for pin 0x%x\n",
1277 __func__, nid);
1278 return -ENODEV;
1279 }
1280
1281 spec->multiout.dac_nids[i] = conn[j];
1282 spec->multiout.num_dacs++;
1283 if (conn_len > 1) {
1284 /* select this DAC in the pin's input mux */
1285 snd_hda_codec_write(codec, nid, 0,
1286 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 1287
7b043899
SL		 1288 }
1289 }
c7d4b2fa 1290
7b043899
SL		 1291 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
1292 spec->multiout.num_dacs,
1293 spec->multiout.dac_nids[0],
1294 spec->multiout.dac_nids[1],
1295 spec->multiout.dac_nids[2],
1296 spec->multiout.dac_nids[3],
1297 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 1298 return 0;
1299}
1300
eb06ed8f
TI		 1301/* create volume control/switch for the given prefx type */
1302static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
1303{
1304 char name[32];
1305 int err;
1306
1307 sprintf(name, "%s Playback Volume", pfx);
1308 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
1309 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1310 if (err < 0)
1311 return err;
1312 sprintf(name, "%s Playback Switch", pfx);
1313 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
1314 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1315 if (err < 0)
1316 return err;
1317 return 0;
1318}
1319
c7d4b2fa 1320/* add playback controls from the parsed DAC table */
19039bd0
TI		 1321static int stac92xx_auto_create_multi_out_ctls(struct sigmatel_spec *spec,
1322 const struct auto_pin_cfg *cfg)
c7d4b2fa 1323{
19039bd0
TI		 1324 static const char *chname[4] = {
1325 "Front", "Surround", NULL /*CLFE*/, "Side"
1326 };
c7d4b2fa
M		 1327 hda_nid_t nid;
1328 int i, err;
1329
1330 for (i = 0; i < cfg->line_outs; i++) {
403d1944 1331 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 1332 continue;
1333
1334 nid = spec->multiout.dac_nids[i];
1335
1336 if (i == 2) {
1337 /* Center/LFE */
eb06ed8f
TI		 1338 err = create_controls(spec, "Center", nid, 1);
1339 if (err < 0)
c7d4b2fa 1340 return err;
eb06ed8f
TI		 1341 err = create_controls(spec, "LFE", nid, 2);
1342 if (err < 0)
c7d4b2fa
M		 1343 return err;
1344 } else {
eb06ed8f
TI		 1345 err = create_controls(spec, chname[i], nid, 3);
1346 if (err < 0)
c7d4b2fa
M		 1347 return err;
1348 }
1349 }
1350
403d1944
MP		 1351 if (spec->line_switch)
1352 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
1353 return err;
1354
1355 if (spec->mic_switch)
1356 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
1357 return err;
1358
c7d4b2fa
M		 1359 return 0;
1360}
1361
eb06ed8f 1362static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 1363{
7b043899
SL		 1364 if (is_in_dac_nids(spec, nid))
1365 return 1;
eb06ed8f
TI		 1366 if (spec->multiout.hp_nid == nid)
1367 return 1;
1368 return 0;
1369}
c7d4b2fa 1370
eb06ed8f
TI		 1371static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
1372{
1373 if (!spec->multiout.hp_nid)
1374 spec->multiout.hp_nid = nid;
1375 else if (spec->multiout.num_dacs > 4) {
1376 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
1377 return 1;
1378 } else {
1379 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
1380 spec->multiout.num_dacs++;
1381 }
1382 return 0;
1383}
4e55096e 1384
eb06ed8f
TI		 1385/* add playback controls for Speaker and HP outputs */
1386static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
1387 struct auto_pin_cfg *cfg)
1388{
1389 struct sigmatel_spec *spec = codec->spec;
1390 hda_nid_t nid;
1391 int i, old_num_dacs, err;
1392
1393 old_num_dacs = spec->multiout.num_dacs;
1394 for (i = 0; i < cfg->hp_outs; i++) {
1395 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
1396 if (wid_caps & AC_WCAP_UNSOL_CAP)
1397 spec->hp_detect = 1;
1398 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
1399 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1400 if (check_in_dac_nids(spec, nid))
1401 nid = 0;
1402 if (! nid)
c7d4b2fa 1403 continue;
eb06ed8f
TI		 1404 add_spec_dacs(spec, nid);
1405 }
1406 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 1407 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 1408 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1409 if (check_in_dac_nids(spec, nid))
1410 nid = 0;
eb06ed8f
TI		 1411 if (! nid)
1412 continue;
1413 add_spec_dacs(spec, nid);
c7d4b2fa 1414 }
1b290a51
MR		 1415 for (i = 0; i < cfg->line_outs; i++) {
1416 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
1417 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1418 if (check_in_dac_nids(spec, nid))
1419 nid = 0;
1420 if (! nid)
1421 continue;
1422 add_spec_dacs(spec, nid);
1423 }
eb06ed8f
TI		 1424 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
1425 static const char *pfxs[] = {
1426 "Speaker", "External Speaker", "Speaker2",
1427 };
1428 err = create_controls(spec, pfxs[i - old_num_dacs],
1429 spec->multiout.dac_nids[i], 3);
1430 if (err < 0)
1431 return err;
1432 }
1433 if (spec->multiout.hp_nid) {
1434 const char *pfx;
1435 if (old_num_dacs == spec->multiout.num_dacs)
1436 pfx = "Master";
1437 else
1438 pfx = "Headphone";
1439 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
1440 if (err < 0)
1441 return err;
1442 }
c7d4b2fa
M		 1443
1444 return 0;
1445}
1446
8b65727b 1447/* labels for dmic mux inputs */
ddc2cec4 1448static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 1449 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
1450 "Digital Mic 3", "Digital Mic 4"
1451};
1452
1453/* create playback/capture controls for input pins on dmic capable codecs */
1454static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
1455 const struct auto_pin_cfg *cfg)
1456{
1457 struct sigmatel_spec *spec = codec->spec;
1458 struct hda_input_mux *dimux = &spec->private_dimux;
1459 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1460 int i, j;
1461
1462 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
1463 dimux->items[dimux->num_items].index = 0;
1464 dimux->num_items++;
1465
1466 for (i = 0; i < spec->num_dmics; i++) {
1467 int index;
1468 int num_cons;
1469 unsigned int def_conf;
1470
1471 def_conf = snd_hda_codec_read(codec,
1472 spec->dmic_nids[i],
1473 0,
1474 AC_VERB_GET_CONFIG_DEFAULT,
1475 0);
1476 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
1477 continue;
1478
1479 num_cons = snd_hda_get_connections(codec,
1480 spec->dmux_nid,
1481 con_lst,
1482 HDA_MAX_NUM_INPUTS);
1483 for (j = 0; j < num_cons; j++)
1484 if (con_lst[j] == spec->dmic_nids[i]) {
1485 index = j;
1486 goto found;
1487 }
1488 continue;
1489found:
1490 dimux->items[dimux->num_items].label =
1491 stac92xx_dmic_labels[dimux->num_items];
1492 dimux->items[dimux->num_items].index = index;
1493 dimux->num_items++;
1494 }
1495
1496 return 0;
1497}
1498
c7d4b2fa
M		 1499/* create playback/capture controls for input pins */
1500static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
1501{
1502 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 1503 struct hda_input_mux *imux = &spec->private_imux;
1504 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1505 int i, j, k;
1506
1507 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 1508 int index;
1509
1510 if (!cfg->input_pins[i])
1511 continue;
1512 index = -1;
1513 for (j = 0; j < spec->num_muxes; j++) {
1514 int num_cons;
1515 num_cons = snd_hda_get_connections(codec,
1516 spec->mux_nids[j],
1517 con_lst,
1518 HDA_MAX_NUM_INPUTS);
1519 for (k = 0; k < num_cons; k++)
1520 if (con_lst[k] == cfg->input_pins[i]) {
1521 index = k;
1522 goto found;
1523 }
c7d4b2fa 1524 }
314634bc
TI		 1525 continue;
1526 found:
1527 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
1528 imux->items[imux->num_items].index = index;
1529 imux->num_items++;
c7d4b2fa
M		 1530 }
1531
7b043899 1532 if (imux->num_items) {
62fe78e9
SR		 1533 /*
1534 * Set the current input for the muxes.
1535 * The STAC9221 has two input muxes with identical source
1536 * NID lists. Hopefully this won't get confused.
1537 */
1538 for (i = 0; i < spec->num_muxes; i++) {
1539 snd_hda_codec_write(codec, spec->mux_nids[i], 0,
1540 AC_VERB_SET_CONNECT_SEL,
1541 imux->items[0].index);
1542 }
1543 }
1544
c7d4b2fa
M		 1545 return 0;
1546}
1547
c7d4b2fa
M		 1548static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
1549{
1550 struct sigmatel_spec *spec = codec->spec;
1551 int i;
1552
1553 for (i = 0; i < spec->autocfg.line_outs; i++) {
1554 hda_nid_t nid = spec->autocfg.line_out_pins[i];
1555 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
1556 }
1557}
1558
1559static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
1560{
1561 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 1562 int i;
c7d4b2fa 1563
eb06ed8f
TI		 1564 for (i = 0; i < spec->autocfg.hp_outs; i++) {
1565 hda_nid_t pin;
1566 pin = spec->autocfg.hp_pins[i];
1567 if (pin) /* connect to front */
1568 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
1569 }
1570 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
1571 hda_nid_t pin;
1572 pin = spec->autocfg.speaker_pins[i];
1573 if (pin) /* connect to front */
1574 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
1575 }
c7d4b2fa
M		 1576}
1577
3cc08dc6 1578static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 1579{
1580 struct sigmatel_spec *spec = codec->spec;
1581 int err;
1582
8b65727b
MP		 1583 if ((err = snd_hda_parse_pin_def_config(codec,
1584 &spec->autocfg,
1585 spec->dmic_nids)) < 0)
c7d4b2fa 1586 return err;
82bc955f 1587 if (! spec->autocfg.line_outs)
869264c4 1588 return 0; /* can't find valid pin config */
19039bd0 1589
403d1944
MP		 1590 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
1591 return err;
19039bd0
TI		 1592 if (spec->multiout.num_dacs == 0)
1593 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
1594 return err;
c7d4b2fa
M		 1595
1596 if ((err = stac92xx_auto_create_multi_out_ctls(spec, &spec->autocfg)) < 0 ||
1597 (err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg)) < 0 ||
1598 (err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
1599 return err;
1600
8b65727b
MP		 1601 if (spec->num_dmics > 0)
1602 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
1603 &spec->autocfg)) < 0)
1604 return err;
1605
c7d4b2fa 1606 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 1607 if (spec->multiout.max_channels > 2)
c7d4b2fa 1608 spec->surr_switch = 1;
c7d4b2fa 1609
82bc955f 1610 if (spec->autocfg.dig_out_pin)
3cc08dc6 1611 spec->multiout.dig_out_nid = dig_out;
82bc955f 1612 if (spec->autocfg.dig_in_pin)
3cc08dc6 1613 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 1614
1615 if (spec->kctl_alloc)
1616 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
1617
1618 spec->input_mux = &spec->private_imux;
8b65727b 1619 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 1620
1621 return 1;
1622}
1623
82bc955f
TI		 1624/* add playback controls for HP output */
1625static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
1626 struct auto_pin_cfg *cfg)
1627{
1628 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 1629 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 1630 unsigned int wid_caps;
1631
1632 if (! pin)
1633 return 0;
1634
1635 wid_caps = get_wcaps(codec, pin);
505cb341 1636 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 1637 spec->hp_detect = 1;
82bc955f
TI		 1638
1639 return 0;
1640}
1641
160ea0dc
RF		 1642/* add playback controls for LFE output */
1643static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
1644 struct auto_pin_cfg *cfg)
1645{
1646 struct sigmatel_spec *spec = codec->spec;
1647 int err;
1648 hda_nid_t lfe_pin = 0x0;
1649 int i;
1650
1651 /*
1652 * search speaker outs and line outs for a mono speaker pin
1653 * with an amp. If one is found, add LFE controls
1654 * for it.
1655 */
1656 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
1657 hda_nid_t pin = spec->autocfg.speaker_pins[i];
1658 unsigned long wcaps = get_wcaps(codec, pin);
1659 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
1660 if (wcaps == AC_WCAP_OUT_AMP)
1661 /* found a mono speaker with an amp, must be lfe */
1662 lfe_pin = pin;
1663 }
1664
1665 /* if speaker_outs is 0, then speakers may be in line_outs */
1666 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
1667 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
1668 hda_nid_t pin = spec->autocfg.line_out_pins[i];
1669 unsigned long cfg;
1670 cfg = snd_hda_codec_read(codec, pin, 0,
1671 AC_VERB_GET_CONFIG_DEFAULT,
1672 0x00);
1673 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
1674 unsigned long wcaps = get_wcaps(codec, pin);
1675 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
1676 if (wcaps == AC_WCAP_OUT_AMP)
1677 /* found a mono speaker with an amp,
1678 must be lfe */
1679 lfe_pin = pin;
1680 }
1681 }
1682 }
1683
1684 if (lfe_pin) {
eb06ed8f 1685 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 1686 if (err < 0)
1687 return err;
1688 }
1689
1690 return 0;
1691}
1692
c7d4b2fa
M		 1693static int stac9200_parse_auto_config(struct hda_codec *codec)
1694{
1695 struct sigmatel_spec *spec = codec->spec;
1696 int err;
1697
df694daa 1698 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 1699 return err;
1700
1701 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
1702 return err;
1703
82bc955f
TI		 1704 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
1705 return err;
1706
160ea0dc
RF		 1707 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
1708 return err;
1709
82bc955f 1710 if (spec->autocfg.dig_out_pin)
c7d4b2fa 1711 spec->multiout.dig_out_nid = 0x05;
82bc955f 1712 if (spec->autocfg.dig_in_pin)
c7d4b2fa 1713 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 1714
1715 if (spec->kctl_alloc)
1716 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
1717
1718 spec->input_mux = &spec->private_imux;
8b65727b 1719 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 1720
1721 return 1;
1722}
1723
62fe78e9
SR		 1724/*
1725 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
1726 * funky external mute control using GPIO pins.
1727 */
1728
1729static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
1730{
1731 unsigned int gpiostate, gpiomask, gpiodir;
1732
1733 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
1734 AC_VERB_GET_GPIO_DATA, 0);
1735
1736 if (!muted)
1737 gpiostate |= (1 << pin);
1738 else
1739 gpiostate &= ~(1 << pin);
1740
1741 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
1742 AC_VERB_GET_GPIO_MASK, 0);
1743 gpiomask |= (1 << pin);
1744
1745 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
1746 AC_VERB_GET_GPIO_DIRECTION, 0);
1747 gpiodir |= (1 << pin);
1748
1749 /* AppleHDA seems to do this -- WTF is this verb?? */
1750 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
1751
1752 snd_hda_codec_write(codec, codec->afg, 0,
1753 AC_VERB_SET_GPIO_MASK, gpiomask);
1754 snd_hda_codec_write(codec, codec->afg, 0,
1755 AC_VERB_SET_GPIO_DIRECTION, gpiodir);
1756
1757 msleep(1);
1758
1759 snd_hda_codec_write(codec, codec->afg, 0,
1760 AC_VERB_SET_GPIO_DATA, gpiostate);
1761}
1762
314634bc
TI		 1763static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
1764 unsigned int event)
1765{
1766 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
1767 snd_hda_codec_write(codec, nid, 0,
1768 AC_VERB_SET_UNSOLICITED_ENABLE,
1769 (AC_USRSP_EN | event));
1770}
1771
c7d4b2fa
M		 1772static int stac92xx_init(struct hda_codec *codec)
1773{
1774 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 1775 struct auto_pin_cfg *cfg = &spec->autocfg;
1776 int i;
c7d4b2fa 1777
c7d4b2fa
M		 1778 snd_hda_sequence_write(codec, spec->init);
1779
82bc955f
TI		 1780 /* set up pins */
1781 if (spec->hp_detect) {
505cb341 1782 /* Enable unsolicited responses on the HP widget */
eb06ed8f 1783 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 1784 enable_pin_detect(codec, cfg->hp_pins[i],
1785 STAC_HP_EVENT);
0a07acaf
TI		 1786 /* force to enable the first line-out; the others are set up
1787 * in unsol_event
1788 */
1789 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
1790 AC_PINCTL_OUT_EN);
eb995a8c 1791 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 1792 /* fake event to set up pins */
1793 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
1794 } else {
1795 stac92xx_auto_init_multi_out(codec);
1796 stac92xx_auto_init_hp_out(codec);
1797 }
1798 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 1799 hda_nid_t nid = cfg->input_pins[i];
1800 if (nid) {
1801 unsigned int pinctl = AC_PINCTL_IN_EN;
1802 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
1803 pinctl |= stac92xx_get_vref(codec, nid);
1804 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1805 }
82bc955f 1806 }
8b65727b
MP		 1807 if (spec->num_dmics > 0)
1808 for (i = 0; i < spec->num_dmics; i++)
1809 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
1810 AC_PINCTL_IN_EN);
1811
82bc955f
TI		 1812 if (cfg->dig_out_pin)
1813 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
1814 AC_PINCTL_OUT_EN);
1815 if (cfg->dig_in_pin)
1816 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
1817 AC_PINCTL_IN_EN);
1818
62fe78e9
SR		 1819 if (spec->gpio_mute) {
1820 stac922x_gpio_mute(codec, 0, 0);
1821 stac922x_gpio_mute(codec, 1, 0);
1822 }
1823
c7d4b2fa
M		 1824 return 0;
1825}
1826
2f2f4251
M		 1827static void stac92xx_free(struct hda_codec *codec)
1828{
c7d4b2fa
M		 1829 struct sigmatel_spec *spec = codec->spec;
1830 int i;
1831
1832 if (! spec)
1833 return;
1834
1835 if (spec->kctl_alloc) {
1836 for (i = 0; i < spec->num_kctl_used; i++)
1837 kfree(spec->kctl_alloc[i].name);
1838 kfree(spec->kctl_alloc);
1839 }
1840
11b44bbd
RF		 1841 if (spec->bios_pin_configs)
1842 kfree(spec->bios_pin_configs);
1843
c7d4b2fa 1844 kfree(spec);
2f2f4251
M		 1845}
1846
4e55096e
M		 1847static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
1848 unsigned int flag)
1849{
1850 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
1851 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 1852
f9acba43
TI		 1853 if (pin_ctl & AC_PINCTL_IN_EN) {
1854 /*
1855 * we need to check the current set-up direction of
1856 * shared input pins since they can be switched via
1857 * "xxx as Output" mixer switch
1858 */
1859 struct sigmatel_spec *spec = codec->spec;
1860 struct auto_pin_cfg *cfg = &spec->autocfg;
1861 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
1862 spec->line_switch) ||
1863 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
1864 spec->mic_switch))
1865 return;
1866 }
1867
7b043899
SL		 1868 /* if setting pin direction bits, clear the current
1869 direction bits first */
1870 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
1871 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
1872
4e55096e
M		 1873 snd_hda_codec_write(codec, nid, 0,
1874 AC_VERB_SET_PIN_WIDGET_CONTROL,
1875 pin_ctl | flag);
1876}
1877
1878static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
1879 unsigned int flag)
1880{
1881 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
1882 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
1883 snd_hda_codec_write(codec, nid, 0,
1884 AC_VERB_SET_PIN_WIDGET_CONTROL,
1885 pin_ctl & ~flag);
1886}
1887
314634bc
TI		 1888static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
1889{
1890 if (!nid)
1891 return 0;
1892 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
1893 & (1 << 31))
1894 return 1;
1895 return 0;
1896}
1897
1898static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 1899{
1900 struct sigmatel_spec *spec = codec->spec;
1901 struct auto_pin_cfg *cfg = &spec->autocfg;
1902 int i, presence;
1903
eb06ed8f
TI		 1904 presence = 0;
1905 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 1906 presence = get_pin_presence(codec, cfg->hp_pins[i]);
1907 if (presence)
1908 break;
eb06ed8f 1909 }
4e55096e
M		 1910
1911 if (presence) {
1912 /* disable lineouts, enable hp */
1913 for (i = 0; i < cfg->line_outs; i++)
1914 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
1915 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 1916 for (i = 0; i < cfg->speaker_outs; i++)
1917 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
1918 AC_PINCTL_OUT_EN);
4e55096e
M		 1919 } else {
1920 /* enable lineouts, disable hp */
1921 for (i = 0; i < cfg->line_outs; i++)
1922 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
1923 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 1924 for (i = 0; i < cfg->speaker_outs; i++)
1925 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
1926 AC_PINCTL_OUT_EN);
4e55096e
M		 1927 }
1928}
1929
314634bc
TI		 1930static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
1931{
1932 switch (res >> 26) {
1933 case STAC_HP_EVENT:
1934 stac92xx_hp_detect(codec, res);
1935 break;
1936 }
1937}
1938
ff6fdc37
M		 1939#ifdef CONFIG_PM
1940static int stac92xx_resume(struct hda_codec *codec)
1941{
1942 struct sigmatel_spec *spec = codec->spec;
1943 int i;
1944
1945 stac92xx_init(codec);
11b44bbd 1946 stac92xx_set_config_regs(codec);
5d403b19 1947 snd_hda_resume_ctls(codec, spec->mixer);
ff6fdc37
M		 1948 for (i = 0; i < spec->num_mixers; i++)
1949 snd_hda_resume_ctls(codec, spec->mixers[i]);
1950 if (spec->multiout.dig_out_nid)
1951 snd_hda_resume_spdif_out(codec);
1952 if (spec->dig_in_nid)
1953 snd_hda_resume_spdif_in(codec);
1954
1955 return 0;
1956}
1957#endif
1958
2f2f4251
M		 1959static struct hda_codec_ops stac92xx_patch_ops = {
1960 .build_controls = stac92xx_build_controls,
1961 .build_pcms = stac92xx_build_pcms,
1962 .init = stac92xx_init,
1963 .free = stac92xx_free,
4e55096e 1964 .unsol_event = stac92xx_unsol_event,
ff6fdc37
M		 1965#ifdef CONFIG_PM
1966 .resume = stac92xx_resume,
1967#endif
2f2f4251
M		 1968};
1969
1970static int patch_stac9200(struct hda_codec *codec)
1971{
1972 struct sigmatel_spec *spec;
c7d4b2fa 1973 int err;
2f2f4251 1974
e560d8d8 1975 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 1976 if (spec == NULL)
1977 return -ENOMEM;
1978
1979 codec->spec = spec;
a4eed138 1980 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 1981 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 1982 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
1983 stac9200_models,
1984 stac9200_cfg_tbl);
11b44bbd
RF		 1985 if (spec->board_config < 0) {
1986 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
1987 err = stac92xx_save_bios_config_regs(codec);
1988 if (err < 0) {
1989 stac92xx_free(codec);
1990 return err;
1991 }
1992 spec->pin_configs = spec->bios_pin_configs;
1993 } else {
403d1944
MP		 1994 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
1995 stac92xx_set_config_regs(codec);
1996 }
2f2f4251
M		 1997
1998 spec->multiout.max_channels = 2;
1999 spec->multiout.num_dacs = 1;
2000 spec->multiout.dac_nids = stac9200_dac_nids;
2001 spec->adc_nids = stac9200_adc_nids;
2002 spec->mux_nids = stac9200_mux_nids;
dabbed6f 2003 spec->num_muxes = 1;
8b65727b 2004 spec->num_dmics = 0;
c7d4b2fa
M		 2005
2006 spec->init = stac9200_core_init;
2f2f4251 2007 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 2008
2009 err = stac9200_parse_auto_config(codec);
2010 if (err < 0) {
2011 stac92xx_free(codec);
2012 return err;
2013 }
2f2f4251
M		 2014
2015 codec->patch_ops = stac92xx_patch_ops;
2016
2017 return 0;
2018}
2019
8e21c34c
TD		 2020static int patch_stac925x(struct hda_codec *codec)
2021{
2022 struct sigmatel_spec *spec;
2023 int err;
2024
2025 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2026 if (spec == NULL)
2027 return -ENOMEM;
2028
2029 codec->spec = spec;
a4eed138 2030 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 2031 spec->pin_nids = stac925x_pin_nids;
2032 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
2033 stac925x_models,
2034 stac925x_cfg_tbl);
9e507abd 2035 again:
8e21c34c 2036 if (spec->board_config < 0) {
2c11f955
TD		 2037 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2038 "using BIOS defaults\n");
8e21c34c
TD		 2039 err = stac92xx_save_bios_config_regs(codec);
2040 if (err < 0) {
2041 stac92xx_free(codec);
2042 return err;
2043 }
2044 spec->pin_configs = spec->bios_pin_configs;
2045 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
2046 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
2047 stac92xx_set_config_regs(codec);
2048 }
2049
2050 spec->multiout.max_channels = 2;
2051 spec->multiout.num_dacs = 1;
2052 spec->multiout.dac_nids = stac925x_dac_nids;
2053 spec->adc_nids = stac925x_adc_nids;
2054 spec->mux_nids = stac925x_mux_nids;
2055 spec->num_muxes = 1;
2c11f955
TD		 2056 switch (codec->vendor_id) {
2057 case 0x83847632: /* STAC9202 */
2058 case 0x83847633: /* STAC9202D */
2059 case 0x83847636: /* STAC9251 */
2060 case 0x83847637: /* STAC9251D */
2061 spec->num_dmics = 1;
2062 spec->dmic_nids = stac925x_dmic_nids;
2063 break;
2064 default:
2065 spec->num_dmics = 0;
2066 break;
2067 }
8e21c34c
TD		 2068
2069 spec->init = stac925x_core_init;
2070 spec->mixer = stac925x_mixer;
2071
2072 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 2073 if (!err) {
2074 if (spec->board_config < 0) {
2075 printk(KERN_WARNING "hda_codec: No auto-config is "
2076 "available, default to model=ref\n");
2077 spec->board_config = STAC_925x_REF;
2078 goto again;
2079 }
2080 err = -EINVAL;
2081 }
8e21c34c
TD		 2082 if (err < 0) {
2083 stac92xx_free(codec);
2084 return err;
2085 }
2086
2087 codec->patch_ops = stac92xx_patch_ops;
2088
2089 return 0;
2090}
2091
2f2f4251
M		 2092static int patch_stac922x(struct hda_codec *codec)
2093{
2094 struct sigmatel_spec *spec;
c7d4b2fa 2095 int err;
2f2f4251 2096
e560d8d8 2097 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2098 if (spec == NULL)
2099 return -ENOMEM;
2100
2101 codec->spec = spec;
a4eed138 2102 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 2103 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 2104 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
2105 stac922x_models,
2106 stac922x_cfg_tbl);
5d5d3bc3 2107 if (spec->board_config == STAC_INTEL_MAC_V3) {
3fc24d85
TI		 2108 spec->gpio_mute = 1;
2109 /* Intel Macs have all same PCI SSID, so we need to check
2110 * codec SSID to distinguish the exact models
2111 */
6f0778d8 2112 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 2113 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 2114
2115 case 0x106b0800:
2116 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 2117 break;
5d5d3bc3
IZ		 2118 case 0x106b0600:
2119 case 0x106b0700:
2120 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 2121 break;
5d5d3bc3
IZ		 2122 case 0x106b0e00:
2123 case 0x106b0f00:
2124 case 0x106b1600:
2125 case 0x106b1700:
2126 case 0x106b0200:
2127 case 0x106b1e00:
2128 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 2129 break;
5d5d3bc3
IZ		 2130 case 0x106b1a00:
2131 case 0x00000100:
2132 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 2133 break;
5d5d3bc3
IZ		 2134 case 0x106b0a00:
2135 case 0x106b2200:
2136 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 2137 break;
3fc24d85
TI		 2138 }
2139 }
2140
9e507abd 2141 again:
11b44bbd
RF		 2142 if (spec->board_config < 0) {
2143 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
2144 "using BIOS defaults\n");
2145 err = stac92xx_save_bios_config_regs(codec);
2146 if (err < 0) {
2147 stac92xx_free(codec);
2148 return err;
2149 }
2150 spec->pin_configs = spec->bios_pin_configs;
2151 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 2152 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
2153 stac92xx_set_config_regs(codec);
2154 }
2f2f4251 2155
c7d4b2fa
M		 2156 spec->adc_nids = stac922x_adc_nids;
2157 spec->mux_nids = stac922x_mux_nids;
2549413e 2158 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
8b65727b 2159 spec->num_dmics = 0;
c7d4b2fa
M		 2160
2161 spec->init = stac922x_core_init;
2f2f4251 2162 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 2163
2164 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 2165
3cc08dc6 2166 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 2167 if (!err) {
2168 if (spec->board_config < 0) {
2169 printk(KERN_WARNING "hda_codec: No auto-config is "
2170 "available, default to model=ref\n");
2171 spec->board_config = STAC_D945_REF;
2172 goto again;
2173 }
2174 err = -EINVAL;
2175 }
3cc08dc6
MP		 2176 if (err < 0) {
2177 stac92xx_free(codec);
2178 return err;
2179 }
2180
2181 codec->patch_ops = stac92xx_patch_ops;
2182
807a4636
TI		 2183 /* Fix Mux capture level; max to 2 */
2184 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
2185 (0 << AC_AMPCAP_OFFSET_SHIFT) |
2186 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
2187 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
2188 (0 << AC_AMPCAP_MUTE_SHIFT));
2189
3cc08dc6
MP		 2190 return 0;
2191}
2192
2193static int patch_stac927x(struct hda_codec *codec)
2194{
2195 struct sigmatel_spec *spec;
2196 int err;
2197
2198 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2199 if (spec == NULL)
2200 return -ENOMEM;
2201
2202 codec->spec = spec;
a4eed138 2203 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 2204 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 2205 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
2206 stac927x_models,
2207 stac927x_cfg_tbl);
9e507abd 2208 again:
11b44bbd 2209 if (spec->board_config < 0) {
3cc08dc6 2210 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n");
11b44bbd
RF		 2211 err = stac92xx_save_bios_config_regs(codec);
2212 if (err < 0) {
2213 stac92xx_free(codec);
2214 return err;
2215 }
2216 spec->pin_configs = spec->bios_pin_configs;
2217 } else if (stac927x_brd_tbl[spec->board_config] != NULL) {
3cc08dc6
MP		 2218 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
2219 stac92xx_set_config_regs(codec);
2220 }
2221
81d3dbde 2222 switch (spec->board_config) {
93ed1503 2223 case STAC_D965_3ST:
81d3dbde
TD		 2224 spec->adc_nids = stac927x_adc_nids;
2225 spec->mux_nids = stac927x_mux_nids;
2549413e 2226 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
8b65727b 2227 spec->num_dmics = 0;
93ed1503 2228 spec->init = d965_core_init;
81d3dbde
TD		 2229 spec->mixer = stac9227_mixer;
2230 break;
93ed1503
TD		 2231 case STAC_D965_5ST:
2232 spec->adc_nids = stac927x_adc_nids;
2233 spec->mux_nids = stac927x_mux_nids;
2549413e 2234 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
8b65727b 2235 spec->num_dmics = 0;
93ed1503 2236 spec->init = d965_core_init;
81d3dbde
TD		 2237 spec->mixer = stac9227_mixer;
2238 break;
2239 default:
2240 spec->adc_nids = stac927x_adc_nids;
2241 spec->mux_nids = stac927x_mux_nids;
2549413e 2242 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
8b65727b 2243 spec->num_dmics = 0;
81d3dbde
TD		 2244 spec->init = stac927x_core_init;
2245 spec->mixer = stac927x_mixer;
2246 }
3cc08dc6
MP		 2247
2248 spec->multiout.dac_nids = spec->dac_nids;
87d48363
MR		 2249 /* GPIO0 High = Enable EAPD */
2250 stac92xx_enable_gpio_mask(codec, 0x00000001, 0x00000001);
92a22beb 2251
3cc08dc6 2252 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 2253 if (!err) {
2254 if (spec->board_config < 0) {
2255 printk(KERN_WARNING "hda_codec: No auto-config is "
2256 "available, default to model=ref\n");
2257 spec->board_config = STAC_D965_REF;
2258 goto again;
2259 }
2260 err = -EINVAL;
2261 }
c7d4b2fa
M		 2262 if (err < 0) {
2263 stac92xx_free(codec);
2264 return err;
2265 }
2f2f4251
M		 2266
2267 codec->patch_ops = stac92xx_patch_ops;
2268
897cc188
TI		 2269 /* Fix Mux capture level; max to 2 */
2270 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
2271 (0 << AC_AMPCAP_OFFSET_SHIFT) |
2272 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
2273 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
2274 (0 << AC_AMPCAP_MUTE_SHIFT));
2275
2f2f4251
M		 2276 return 0;
2277}
2278
f3302a59
MP		 2279static int patch_stac9205(struct hda_codec *codec)
2280{
2281 struct sigmatel_spec *spec;
87d48363 2282 int err, gpio_mask, gpio_data;
f3302a59
MP		 2283
2284 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2285 if (spec == NULL)
2286 return -ENOMEM;
2287
2288 codec->spec = spec;
a4eed138 2289 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 2290 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 2291 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
2292 stac9205_models,
2293 stac9205_cfg_tbl);
9e507abd 2294 again:
11b44bbd
RF		 2295 if (spec->board_config < 0) {
2296 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
2297 err = stac92xx_save_bios_config_regs(codec);
2298 if (err < 0) {
2299 stac92xx_free(codec);
2300 return err;
2301 }
2302 spec->pin_configs = spec->bios_pin_configs;
2303 } else {
f3302a59
MP		 2304 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
2305 stac92xx_set_config_regs(codec);
2306 }
2307
2308 spec->adc_nids = stac9205_adc_nids;
2309 spec->mux_nids = stac9205_mux_nids;
2549413e 2310 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 2311 spec->dmic_nids = stac9205_dmic_nids;
2549413e 2312 spec->num_dmics = ARRAY_SIZE(stac9205_dmic_nids);
8b65727b 2313 spec->dmux_nid = 0x1d;
f3302a59
MP		 2314
2315 spec->init = stac9205_core_init;
2316 spec->mixer = stac9205_mixer;
2317
2318 spec->multiout.dac_nids = spec->dac_nids;
87d48363
MR		 2319
2320 if (spec->board_config == STAC_M43xx) {
2321 /* Enable SPDIF in/out */
2322 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
2323 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
2324
2325 gpio_mask = 0x00000007; /* GPIO0-2 */
2326 /* GPIO0 High = EAPD, GPIO1 Low = DRM,
2327 * GPIO2 High = Headphone Mute
2328 */
2329 gpio_data = 0x00000005;
2330 } else
2331 gpio_mask = gpio_data = 0x00000001; /* GPIO0 High = EAPD */
33382403 2332
87d48363 2333 stac92xx_enable_gpio_mask(codec, gpio_mask, gpio_data);
f3302a59 2334 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 2335 if (!err) {
2336 if (spec->board_config < 0) {
2337 printk(KERN_WARNING "hda_codec: No auto-config is "
2338 "available, default to model=ref\n");
2339 spec->board_config = STAC_9205_REF;
2340 goto again;
2341 }
2342 err = -EINVAL;
2343 }
f3302a59
MP		 2344 if (err < 0) {
2345 stac92xx_free(codec);
2346 return err;
2347 }
2348
2349 codec->patch_ops = stac92xx_patch_ops;
2350
2351 return 0;
2352}
2353
db064e50 2354/*
6d859065 2355 * STAC9872 hack
db064e50
TI		 2356 */
2357
99ccc560 2358/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 2359static hda_nid_t vaio_dacs[] = { 0x2 };
2360#define VAIO_HP_DAC 0x5
2361static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
2362static hda_nid_t vaio_mux_nids[] = { 0x15 };
2363
2364static struct hda_input_mux vaio_mux = {
2365 .num_items = 2,
2366 .items = {
d773781c 2367 /* { "HP", 0x0 }, */
1624cb9a
TI		 2368 { "Mic Jack", 0x1 },
2369 { "Internal Mic", 0x2 },
db064e50
TI		 2370 { "PCM", 0x3 },
2371 }
2372};
2373
2374static struct hda_verb vaio_init[] = {
2375 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
2376 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2377 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2378 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2379 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2380 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 2381 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2382 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2383 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2384 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2385 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2386 {}
2387};
2388
6d859065
GM		 2389static struct hda_verb vaio_ar_init[] = {
2390 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
2391 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2392 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2393 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2394/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
2395 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2396 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 2397 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2398 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2399/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
2400 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2401 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2402 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2403 {}
2404};
2405
db064e50
TI		 2406/* bind volumes of both NID 0x02 and 0x05 */
2407static int vaio_master_vol_put(struct snd_kcontrol *kcontrol,
2408 struct snd_ctl_elem_value *ucontrol)
2409{
2410 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2411 long *valp = ucontrol->value.integer.value;
2412 int change;
2413
2414 change = snd_hda_codec_amp_update(codec, 0x02, 0, HDA_OUTPUT, 0,
2415 0x7f, valp[0] & 0x7f);
2416 change |= snd_hda_codec_amp_update(codec, 0x02, 1, HDA_OUTPUT, 0,
2417 0x7f, valp[1] & 0x7f);
2418 snd_hda_codec_amp_update(codec, 0x05, 0, HDA_OUTPUT, 0,
2419 0x7f, valp[0] & 0x7f);
2420 snd_hda_codec_amp_update(codec, 0x05, 1, HDA_OUTPUT, 0,
2421 0x7f, valp[1] & 0x7f);
2422 return change;
2423}
2424
2425/* bind volumes of both NID 0x02 and 0x05 */
2426static int vaio_master_sw_put(struct snd_kcontrol *kcontrol,
2427 struct snd_ctl_elem_value *ucontrol)
2428{
2429 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2430 long *valp = ucontrol->value.integer.value;
2431 int change;
2432
2433 change = snd_hda_codec_amp_update(codec, 0x02, 0, HDA_OUTPUT, 0,
a9393d70 2434 0x80, (valp[0] ? 0 : 0x80));
db064e50 2435 change |= snd_hda_codec_amp_update(codec, 0x02, 1, HDA_OUTPUT, 0,
a9393d70 2436 0x80, (valp[1] ? 0 : 0x80));
db064e50 2437 snd_hda_codec_amp_update(codec, 0x05, 0, HDA_OUTPUT, 0,
a9393d70 2438 0x80, (valp[0] ? 0 : 0x80));
db064e50 2439 snd_hda_codec_amp_update(codec, 0x05, 1, HDA_OUTPUT, 0,
a9393d70 2440 0x80, (valp[1] ? 0 : 0x80));
db064e50
TI		 2441 return change;
2442}
2443
2444static struct snd_kcontrol_new vaio_mixer[] = {
2445 {
2446 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2447 .name = "Master Playback Volume",
2448 .info = snd_hda_mixer_amp_volume_info,
2449 .get = snd_hda_mixer_amp_volume_get,
2450 .put = vaio_master_vol_put,
c2566524 2451 .tlv = { .c = snd_hda_mixer_amp_tlv },
db064e50
TI		 2452 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2453 },
2454 {
2455 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2456 .name = "Master Playback Switch",
2457 .info = snd_hda_mixer_amp_switch_info,
2458 .get = snd_hda_mixer_amp_switch_get,
2459 .put = vaio_master_sw_put,
2460 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2461 },
2462 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2463 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2464 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2465 {
2466 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2467 .name = "Capture Source",
2468 .count = 1,
2469 .info = stac92xx_mux_enum_info,
2470 .get = stac92xx_mux_enum_get,
2471 .put = stac92xx_mux_enum_put,
2472 },
2473 {}
2474};
2475
6d859065
GM		 2476static struct snd_kcontrol_new vaio_ar_mixer[] = {
2477 {
2478 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2479 .name = "Master Playback Volume",
2480 .info = snd_hda_mixer_amp_volume_info,
2481 .get = snd_hda_mixer_amp_volume_get,
2482 .put = vaio_master_vol_put,
2483 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2484 },
2485 {
2486 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2487 .name = "Master Playback Switch",
2488 .info = snd_hda_mixer_amp_switch_info,
2489 .get = snd_hda_mixer_amp_switch_get,
2490 .put = vaio_master_sw_put,
2491 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2492 },
2493 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2494 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2495 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2496 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
2497 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
2498 {
2499 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2500 .name = "Capture Source",
2501 .count = 1,
2502 .info = stac92xx_mux_enum_info,
2503 .get = stac92xx_mux_enum_get,
2504 .put = stac92xx_mux_enum_put,
2505 },
2506 {}
2507};
2508
2509static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 2510 .build_controls = stac92xx_build_controls,
2511 .build_pcms = stac92xx_build_pcms,
2512 .init = stac92xx_init,
2513 .free = stac92xx_free,
2514#ifdef CONFIG_PM
2515 .resume = stac92xx_resume,
2516#endif
2517};
2518
6d859065
GM		 2519enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
2520 CXD9872RD_VAIO,
2521 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
2522 STAC9872AK_VAIO,
2523 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
2524 STAC9872K_VAIO,
2525 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 2526 CXD9872AKD_VAIO,
2527 STAC_9872_MODELS,
2528};
2529
2530static const char *stac9872_models[STAC_9872_MODELS] = {
2531 [CXD9872RD_VAIO] = "vaio",
2532 [CXD9872AKD_VAIO] = "vaio-ar",
2533};
2534
2535static struct snd_pci_quirk stac9872_cfg_tbl[] = {
2536 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
2537 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
2538 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 2539 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 2540 {}
2541};
2542
6d859065 2543static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 2544{
2545 struct sigmatel_spec *spec;
2546 int board_config;
2547
f5fcc13c
TI		 2548 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
2549 stac9872_models,
2550 stac9872_cfg_tbl);
db064e50
TI		 2551 if (board_config < 0)
2552 /* unknown config, let generic-parser do its job... */
2553 return snd_hda_parse_generic_codec(codec);
2554
2555 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2556 if (spec == NULL)
2557 return -ENOMEM;
2558
2559 codec->spec = spec;
2560 switch (board_config) {
6d859065
GM		 2561 case CXD9872RD_VAIO:
2562 case STAC9872AK_VAIO:
2563 case STAC9872K_VAIO:
db064e50
TI		 2564 spec->mixer = vaio_mixer;
2565 spec->init = vaio_init;
2566 spec->multiout.max_channels = 2;
2567 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
2568 spec->multiout.dac_nids = vaio_dacs;
2569 spec->multiout.hp_nid = VAIO_HP_DAC;
2570 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
2571 spec->adc_nids = vaio_adcs;
2572 spec->input_mux = &vaio_mux;
2573 spec->mux_nids = vaio_mux_nids;
2574 break;
6d859065
GM		 2575
2576 case CXD9872AKD_VAIO:
2577 spec->mixer = vaio_ar_mixer;
2578 spec->init = vaio_ar_init;
2579 spec->multiout.max_channels = 2;
2580 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
2581 spec->multiout.dac_nids = vaio_dacs;
2582 spec->multiout.hp_nid = VAIO_HP_DAC;
2583 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
2584 spec->adc_nids = vaio_adcs;
2585 spec->input_mux = &vaio_mux;
2586 spec->mux_nids = vaio_mux_nids;
2587 break;
db064e50
TI		 2588 }
2589
6d859065 2590 codec->patch_ops = stac9872_patch_ops;
db064e50
TI		 2591 return 0;
2592}
2593
2594
2f2f4251
M		 2595/*
2596 * patch entries
2597 */
2598struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2599 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
2600 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
2601 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
2602 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
2603 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
2604 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
2605 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 2606 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
2607 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
2608 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
2609 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
2610 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
2611 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 2612 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
2613 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
2614 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
2615 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
2616 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
2617 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
2618 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
2619 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
2620 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
2621 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 2622 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
2623 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
2624 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
2625 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
2626 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
2627 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 2628 /* The following does not take into account .id=0x83847661 when subsys =
2629 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
2630 * currently not fully supported.
2631 */
2632 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
2633 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
2634 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 2635 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
2636 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
2637 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
2638 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
2639 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
2640 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
2641 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
2642 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
2f2f4251
M		 2643 {} /* terminator */
2644};
Ubuntu Artful kernel mirror