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[ALSA] hda-codec - restore HDA sigmatel pin configs on resume
[mirror_ubuntu-bionic-kernel.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <sound/driver.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/pci.h>
32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
36
4e55096e
M		 37#define NUM_CONTROL_ALLOC 32
38#define STAC_HP_EVENT 0x37
39#define STAC_UNSOL_ENABLE (AC_USRSP_EN | STAC_HP_EVENT)
40
403d1944
MP		 41#define STAC_REF 0
42#define STAC_D945GTP3 1
43#define STAC_D945GTP5 2
62fe78e9 44#define STAC_MACMINI 3
19039bd0
TI		 45#define STAC_D965_2112 4
46#define STAC_D965_284B 5
47#define STAC_922X_MODELS 6 /* number of 922x models */
403d1944 48
2f2f4251 49struct sigmatel_spec {
c8b6bf9b 50 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 51 unsigned int num_mixers;
52
403d1944 53 int board_config;
c7d4b2fa 54 unsigned int surr_switch: 1;
403d1944
MP		 55 unsigned int line_switch: 1;
56 unsigned int mic_switch: 1;
3cc08dc6 57 unsigned int alt_switch: 1;
82bc955f 58 unsigned int hp_detect: 1;
62fe78e9 59 unsigned int gpio_mute: 1;
c7d4b2fa 60
2f2f4251
M		 61 /* playback */
62 struct hda_multi_out multiout;
3cc08dc6 63 hda_nid_t dac_nids[5];
2f2f4251
M		 64
65 /* capture */
66 hda_nid_t *adc_nids;
2f2f4251 67 unsigned int num_adcs;
dabbed6f
M		 68 hda_nid_t *mux_nids;
69 unsigned int num_muxes;
dabbed6f 70 hda_nid_t dig_in_nid;
2f2f4251 71
2f2f4251
M		 72 /* pin widgets */
73 hda_nid_t *pin_nids;
74 unsigned int num_pins;
2f2f4251 75 unsigned int *pin_configs;
11b44bbd 76 unsigned int *bios_pin_configs;
2f2f4251
M		 77
78 /* codec specific stuff */
79 struct hda_verb *init;
c8b6bf9b 80 struct snd_kcontrol_new *mixer;
2f2f4251
M		 81
82 /* capture source */
c7d4b2fa 83 struct hda_input_mux *input_mux;
3cc08dc6 84 unsigned int cur_mux[3];
2f2f4251 85
403d1944
MP		 86 /* i/o switches */
87 unsigned int io_switch[2];
2f2f4251 88
c7d4b2fa
M		 89 struct hda_pcm pcm_rec[2]; /* PCM information */
90
91 /* dynamic controls and input_mux */
92 struct auto_pin_cfg autocfg;
93 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 94 struct snd_kcontrol_new *kctl_alloc;
c7d4b2fa 95 struct hda_input_mux private_imux;
2f2f4251
M		 96};
97
98static hda_nid_t stac9200_adc_nids[1] = {
99 0x03,
100};
101
102static hda_nid_t stac9200_mux_nids[1] = {
103 0x0c,
104};
105
106static hda_nid_t stac9200_dac_nids[1] = {
107 0x02,
108};
109
2f2f4251
M		 110static hda_nid_t stac922x_adc_nids[2] = {
111 0x06, 0x07,
112};
113
19039bd0
TI		 114static hda_nid_t stac9227_adc_nids[2] = {
115 0x07, 0x08,
116};
117
118#if 0
119static hda_nid_t d965_2112_dac_nids[3] = {
120 0x02, 0x03, 0x05,
121};
122#endif
123
2f2f4251
M		 124static hda_nid_t stac922x_mux_nids[2] = {
125 0x12, 0x13,
126};
127
19039bd0
TI		 128static hda_nid_t stac9227_mux_nids[2] = {
129 0x15, 0x16,
130};
131
3cc08dc6
MP		 132static hda_nid_t stac927x_adc_nids[3] = {
133 0x07, 0x08, 0x09
134};
135
136static hda_nid_t stac927x_mux_nids[3] = {
137 0x15, 0x16, 0x17
138};
139
f3302a59
MP		 140static hda_nid_t stac9205_adc_nids[2] = {
141 0x12, 0x13
142};
143
144static hda_nid_t stac9205_mux_nids[2] = {
145 0x19, 0x1a
146};
147
c7d4b2fa
M		 148static hda_nid_t stac9200_pin_nids[8] = {
149 0x08, 0x09, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 150};
151
152static hda_nid_t stac922x_pin_nids[10] = {
153 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
154 0x0f, 0x10, 0x11, 0x15, 0x1b,
155};
156
3cc08dc6
MP		 157static hda_nid_t stac927x_pin_nids[14] = {
158 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
159 0x0f, 0x10, 0x11, 0x12, 0x13,
160 0x14, 0x21, 0x22, 0x23,
161};
162
f3302a59
MP		 163static hda_nid_t stac9205_pin_nids[12] = {
164 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
165 0x0f, 0x14, 0x16, 0x17, 0x18,
166 0x21, 0x22,
167
168};
169
c8b6bf9b 170static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 171{
172 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
173 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 174 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 175}
176
c8b6bf9b 177static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 178{
179 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
180 struct sigmatel_spec *spec = codec->spec;
181 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
182
183 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
184 return 0;
185}
186
c8b6bf9b 187static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 188{
189 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
190 struct sigmatel_spec *spec = codec->spec;
191 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
192
c7d4b2fa 193 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 194 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
195}
196
c7d4b2fa 197static struct hda_verb stac9200_core_init[] = {
2f2f4251 198 /* set dac0mux for dac converter */
c7d4b2fa 199 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 200 {}
201};
202
c7d4b2fa 203static struct hda_verb stac922x_core_init[] = {
2f2f4251 204 /* set master volume and direct control */
c7d4b2fa 205 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 206 {}
207};
208
19039bd0
TI		 209static struct hda_verb stac9227_core_init[] = {
210 /* set master volume and direct control */
211 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
212 /* unmute node 0x1b */
213 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
214 {}
215};
216
217static struct hda_verb d965_2112_core_init[] = {
218 /* set master volume and direct control */
219 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
220 /* unmute node 0x1b */
221 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
222 /* select node 0x03 as DAC */
223 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
224 {}
225};
226
3cc08dc6
MP		 227static struct hda_verb stac927x_core_init[] = {
228 /* set master volume and direct control */
229 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
230 {}
231};
232
f3302a59
MP		 233static struct hda_verb stac9205_core_init[] = {
234 /* set master volume and direct control */
235 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
236 {}
237};
238
c8b6bf9b 239static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 240 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
241 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
242 {
243 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
244 .name = "Input Source",
245 .count = 1,
246 .info = stac92xx_mux_enum_info,
247 .get = stac92xx_mux_enum_get,
248 .put = stac92xx_mux_enum_put,
249 },
250 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
251 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 252 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 253 { } /* end */
254};
255
c7d4b2fa 256/* This needs to be generated dynamically based on sequence */
c8b6bf9b 257static struct snd_kcontrol_new stac922x_mixer[] = {
2f2f4251
M		 258 {
259 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
260 .name = "Input Source",
261 .count = 1,
262 .info = stac92xx_mux_enum_info,
263 .get = stac92xx_mux_enum_get,
264 .put = stac92xx_mux_enum_put,
265 },
266 HDA_CODEC_VOLUME("Capture Volume", 0x17, 0x0, HDA_INPUT),
0fd1708a 267 HDA_CODEC_MUTE("Capture Switch", 0x17, 0x0, HDA_INPUT),
2f2f4251
M		 268 HDA_CODEC_VOLUME("Mux Capture Volume", 0x12, 0x0, HDA_OUTPUT),
269 { } /* end */
270};
271
19039bd0
TI		 272/* This needs to be generated dynamically based on sequence */
273static struct snd_kcontrol_new stac9227_mixer[] = {
274 {
275 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
276 .name = "Input Source",
277 .count = 1,
278 .info = stac92xx_mux_enum_info,
279 .get = stac92xx_mux_enum_get,
280 .put = stac92xx_mux_enum_put,
281 },
282 HDA_CODEC_VOLUME("Capture Volume", 0x15, 0x0, HDA_OUTPUT),
283 HDA_CODEC_MUTE("Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
284 { } /* end */
285};
286
3cc08dc6
MP		 287static snd_kcontrol_new_t stac927x_mixer[] = {
288 {
289 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
290 .name = "Input Source",
291 .count = 1,
292 .info = stac92xx_mux_enum_info,
293 .get = stac92xx_mux_enum_get,
294 .put = stac92xx_mux_enum_put,
295 },
296 HDA_CODEC_VOLUME("InMux Capture Volume", 0x15, 0x0, HDA_OUTPUT),
297 HDA_CODEC_VOLUME("InVol Capture Volume", 0x18, 0x0, HDA_INPUT),
298 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
299 { } /* end */
300};
301
f3302a59
MP		 302static snd_kcontrol_new_t stac9205_mixer[] = {
303 {
304 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
305 .name = "Input Source",
306 .count = 1,
307 .info = stac92xx_mux_enum_info,
308 .get = stac92xx_mux_enum_get,
309 .put = stac92xx_mux_enum_put,
310 },
311 HDA_CODEC_VOLUME("InMux Capture Volume", 0x19, 0x0, HDA_OUTPUT),
312 HDA_CODEC_VOLUME("InVol Capture Volume", 0x1b, 0x0, HDA_INPUT),
313 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1d, 0x0, HDA_OUTPUT),
314 { } /* end */
315};
316
2f2f4251
M		 317static int stac92xx_build_controls(struct hda_codec *codec)
318{
319 struct sigmatel_spec *spec = codec->spec;
320 int err;
c7d4b2fa 321 int i;
2f2f4251
M		 322
323 err = snd_hda_add_new_ctls(codec, spec->mixer);
324 if (err < 0)
325 return err;
c7d4b2fa
M		 326
327 for (i = 0; i < spec->num_mixers; i++) {
328 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
329 if (err < 0)
330 return err;
331 }
332
dabbed6f
M		 333 if (spec->multiout.dig_out_nid) {
334 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
335 if (err < 0)
336 return err;
337 }
338 if (spec->dig_in_nid) {
339 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
340 if (err < 0)
341 return err;
342 }
343 return 0;
2f2f4251
M		 344}
345
403d1944 346static unsigned int ref9200_pin_configs[8] = {
dabbed6f 347 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 348 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
349};
350
403d1944
MP		 351static unsigned int *stac9200_brd_tbl[] = {
352 ref9200_pin_configs,
353};
354
355static struct hda_board_config stac9200_cfg_tbl[] = {
356 { .modelname = "ref",
357 .pci_subvendor = PCI_VENDOR_ID_INTEL,
358 .pci_subdevice = 0x2668, /* DFI LanParty */
359 .config = STAC_REF },
360 {} /* terminator */
361};
362
363static unsigned int ref922x_pin_configs[10] = {
364 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
365 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 366 0x40000100, 0x40000100,
367};
368
403d1944 369static unsigned int d945gtp3_pin_configs[10] = {
869264c4 370 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 371 0x40000100, 0x40000100, 0x40000100, 0x40000100,
372 0x02a19120, 0x40000100,
373};
374
375static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 376 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
377 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 378 0x02a19320, 0x40000100,
379};
380
19039bd0
TI		 381static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
382 [STAC_REF] = ref922x_pin_configs,
383 [STAC_D945GTP3] = d945gtp3_pin_configs,
384 [STAC_D945GTP5] = d945gtp5_pin_configs,
7c3dec06 385 [STAC_MACMINI] = d945gtp5_pin_configs,
403d1944
MP		 386};
387
388static struct hda_board_config stac922x_cfg_tbl[] = {
389 { .modelname = "ref",
390 .pci_subvendor = PCI_VENDOR_ID_INTEL,
391 .pci_subdevice = 0x2668, /* DFI LanParty */
392 .config = STAC_REF }, /* SigmaTel reference board */
948a4db2 393 /* Intel 945G based systems */
403d1944
MP		 394 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
395 .pci_subdevice = 0x0101,
396 .config = STAC_D945GTP3 }, /* Intel D945GTP - 3 Stack */
353b9e66
TI		 397 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
398 .pci_subdevice = 0x0202,
948a4db2 399 .config = STAC_D945GTP3 }, /* Intel D945GNT - 3 Stack */
353b9e66 400 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
948a4db2
TD		 401 .pci_subdevice = 0x0606,
402 .config = STAC_D945GTP3 }, /* Intel D945GTP - 3 Stack */
403 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
404 .pci_subdevice = 0x0601,
405 .config = STAC_D945GTP3 }, /* Intel D945GTP - 3 Stack */
406 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
407 .pci_subdevice = 0x0111,
408 .config = STAC_D945GTP3 }, /* Intel D945GZP - 3 Stack */
409 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
410 .pci_subdevice = 0x1115,
411 .config = STAC_D945GTP3 }, /* Intel D945GPM - 3 Stack */
412 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
413 .pci_subdevice = 0x1116,
414 .config = STAC_D945GTP3 }, /* Intel D945GBO - 3 Stack */
415 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
416 .pci_subdevice = 0x1117,
417 .config = STAC_D945GTP3 }, /* Intel D945GPM - 3 Stack */
418 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
419 .pci_subdevice = 0x1118,
420 .config = STAC_D945GTP3 }, /* Intel D945GPM - 3 Stack */
421 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
422 .pci_subdevice = 0x1119,
423 .config = STAC_D945GTP3 }, /* Intel D945GPM - 3 Stack */
424 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
425 .pci_subdevice = 0x8826,
426 .config = STAC_D945GTP3 }, /* Intel D945GPM - 3 Stack */
427 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
428 .pci_subdevice = 0x5049,
429 .config = STAC_D945GTP3 }, /* Intel D945GCZ - 3 Stack */
430 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
431 .pci_subdevice = 0x5055,
432 .config = STAC_D945GTP3 }, /* Intel D945GCZ - 3 Stack */
433 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
434 .pci_subdevice = 0x5048,
435 .config = STAC_D945GTP3 }, /* Intel D945GPB - 3 Stack */
436 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
437 .pci_subdevice = 0x0110,
438 .config = STAC_D945GTP3 }, /* Intel D945GLR - 3 Stack */
403d1944
MP		 439 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
440 .pci_subdevice = 0x0404,
441 .config = STAC_D945GTP5 }, /* Intel D945GTP - 5 Stack */
442 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
443 .pci_subdevice = 0x0303,
444 .config = STAC_D945GTP5 }, /* Intel D945GNT - 5 Stack */
445 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
446 .pci_subdevice = 0x0013,
447 .config = STAC_D945GTP5 }, /* Intel D955XBK - 5 Stack */
d62c40e0
MP		 448 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
449 .pci_subdevice = 0x0417,
450 .config = STAC_D945GTP5 }, /* Intel D975XBK - 5 Stack */
948a4db2
TD		 451 /* Intel 945P based systems */
452 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
453 .pci_subdevice = 0x0b0b,
454 .config = STAC_D945GTP3 }, /* Intel D945PSN - 3 Stack */
455 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
456 .pci_subdevice = 0x0112,
457 .config = STAC_D945GTP3 }, /* Intel D945PLN - 3 Stack */
458 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
459 .pci_subdevice = 0x0d0d,
460 .config = STAC_D945GTP3 }, /* Intel D945PLM - 3 Stack */
461 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
462 .pci_subdevice = 0x0909,
463 .config = STAC_D945GTP3 }, /* Intel D945PAW - 3 Stack */
464 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
465 .pci_subdevice = 0x0505,
466 .config = STAC_D945GTP3 }, /* Intel D945PLM - 3 Stack */
467 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
468 .pci_subdevice = 0x0707,
469 .config = STAC_D945GTP5 }, /* Intel D945PSV - 5 Stack */
470 /* other systems */
62fe78e9
SR		 471 { .pci_subvendor = 0x8384,
472 .pci_subdevice = 0x7680,
473 .config = STAC_MACMINI }, /* Apple Mac Mini (early 2006) */
19039bd0
TI		 474 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
475 .pci_subdevice = 0x2112,
476 .config = STAC_D965_2112 },
477 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
478 .pci_subdevice = 0x284b,
479 .config = STAC_D965_284B },
403d1944
MP		 480 {} /* terminator */
481};
482
3cc08dc6
MP		 483static unsigned int ref927x_pin_configs[14] = {
484 0x01813122, 0x01a19021, 0x01014010, 0x01016011,
485 0x01012012, 0x01011014, 0x40000100, 0x40000100,
486 0x40000100, 0x40000100, 0x40000100, 0x01441030,
487 0x01c41030, 0x40000100,
488};
489
81d3dbde
TD		 490static unsigned int d965_2112_pin_configs[14] = {
491 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
492 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
493 0x40000100, 0x40000100, 0x40000100, 0x40000100,
494 0x40000100, 0x40000100
495};
496
3cc08dc6 497static unsigned int *stac927x_brd_tbl[] = {
81d3dbde
TD		 498 [STAC_REF] = ref927x_pin_configs,
499 [STAC_D965_2112] = d965_2112_pin_configs,
3cc08dc6
MP		 500};
501
502static struct hda_board_config stac927x_cfg_tbl[] = {
503 { .modelname = "ref",
504 .pci_subvendor = PCI_VENDOR_ID_INTEL,
505 .pci_subdevice = 0x2668, /* DFI LanParty */
506 .config = STAC_REF }, /* SigmaTel reference board */
81d3dbde
TD		 507 /* SigmaTel 9227 reference board */
508 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
509 .pci_subdevice = 0x284b,
510 .config = STAC_D965_284B },
511 /* Intel 946 based systems */
512 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
513 .pci_subdevice = 0x3d01,
514 .config = STAC_D965_2112 }, /* D946 configuration */
515 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
516 .pci_subdevice = 0xa301,
517 .config = STAC_D965_2112 }, /* Intel D946GZT - 3 stack */
518 /* 965 based systems */
519 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
520 .pci_subdevice = 0x2116,
521 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
522 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
523 .pci_subdevice = 0x2115,
524 .config = STAC_D965_2112 }, /* Intel DQ965WC - 3 Stack */
525 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
526 .pci_subdevice = 0x2114,
527 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
528 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
529 .pci_subdevice = 0x2113,
530 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
531 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
532 .pci_subdevice = 0x2112,
533 .config = STAC_D965_2112 }, /* Intel DG965MS - 3 Stack */
534 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
535 .pci_subdevice = 0x2111,
536 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
537 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
538 .pci_subdevice = 0x2110,
539 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
540 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
541 .pci_subdevice = 0x2009,
542 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
543 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
544 .pci_subdevice = 0x2008,
545 .config = STAC_D965_2112 }, /* Intel DQ965GF - 3 Stack */
546 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
547 .pci_subdevice = 0x2007,
548 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
549 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
550 .pci_subdevice = 0x2006,
551 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
552 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
553 .pci_subdevice = 0x2005,
554 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
555 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
556 .pci_subdevice = 0x2004,
557 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
558 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
559 .pci_subdevice = 0x2003,
560 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
561 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
562 .pci_subdevice = 0x2002,
563 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
564 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
565 .pci_subdevice = 0x2001,
566 .config = STAC_D965_2112 }, /* Intel DQ965GF - 3 Stackg */
3cc08dc6
MP		 567 {} /* terminator */
568};
569
f3302a59
MP		 570static unsigned int ref9205_pin_configs[12] = {
571 0x40000100, 0x40000100, 0x01016011, 0x01014010,
572 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
573 0x40000100, 0x40000100, 0x01441030, 0x01c41030
574};
575
576static unsigned int *stac9205_brd_tbl[] = {
577 ref9205_pin_configs,
578};
579
580static struct hda_board_config stac9205_cfg_tbl[] = {
581 { .modelname = "ref",
582 .pci_subvendor = PCI_VENDOR_ID_INTEL,
583 .pci_subdevice = 0x2668, /* DFI LanParty */
584 .config = STAC_REF }, /* SigmaTel reference board */
585 {} /* terminator */
586};
587
11b44bbd
RF		 588static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
589{
590 int i;
591 struct sigmatel_spec *spec = codec->spec;
592
593 if (! spec->bios_pin_configs) {
594 spec->bios_pin_configs = kcalloc(spec->num_pins,
595 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
596 if (! spec->bios_pin_configs)
597 return -ENOMEM;
598 }
599
600 for (i = 0; i < spec->num_pins; i++) {
601 hda_nid_t nid = spec->pin_nids[i];
602 unsigned int pin_cfg;
603
604 pin_cfg = snd_hda_codec_read(codec, nid, 0,
605 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
606 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
607 nid, pin_cfg);
608 spec->bios_pin_configs[i] = pin_cfg;
609 }
610
611 return 0;
612}
613
2f2f4251
M		 614static void stac92xx_set_config_regs(struct hda_codec *codec)
615{
616 int i;
617 struct sigmatel_spec *spec = codec->spec;
618 unsigned int pin_cfg;
619
11b44bbd
RF		 620 if (! spec->pin_nids || ! spec->pin_configs)
621 return;
622
623 for (i = 0; i < spec->num_pins; i++) {
2f2f4251
M		 624 snd_hda_codec_write(codec, spec->pin_nids[i], 0,
625 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
626 spec->pin_configs[i] & 0x000000ff);
627 snd_hda_codec_write(codec, spec->pin_nids[i], 0,
628 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
629 (spec->pin_configs[i] & 0x0000ff00) >> 8);
630 snd_hda_codec_write(codec, spec->pin_nids[i], 0,
631 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
632 (spec->pin_configs[i] & 0x00ff0000) >> 16);
633 snd_hda_codec_write(codec, spec->pin_nids[i], 0,
634 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
635 spec->pin_configs[i] >> 24);
636 pin_cfg = snd_hda_codec_read(codec, spec->pin_nids[i], 0,
637 AC_VERB_GET_CONFIG_DEFAULT,
638 0x00);
403d1944 639 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n", spec->pin_nids[i], pin_cfg);
2f2f4251
M		 640 }
641}
2f2f4251 642
dabbed6f 643/*
c7d4b2fa 644 * Analog playback callbacks
dabbed6f 645 */
c7d4b2fa
M		 646static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
647 struct hda_codec *codec,
c8b6bf9b 648 struct snd_pcm_substream *substream)
2f2f4251 649{
dabbed6f 650 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 651 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 652}
653
2f2f4251
M		 654static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
655 struct hda_codec *codec,
656 unsigned int stream_tag,
657 unsigned int format,
c8b6bf9b 658 struct snd_pcm_substream *substream)
2f2f4251
M		 659{
660 struct sigmatel_spec *spec = codec->spec;
403d1944 661 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 662}
663
664static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
665 struct hda_codec *codec,
c8b6bf9b 666 struct snd_pcm_substream *substream)
2f2f4251
M		 667{
668 struct sigmatel_spec *spec = codec->spec;
669 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
670}
671
dabbed6f
M		 672/*
673 * Digital playback callbacks
674 */
675static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
676 struct hda_codec *codec,
c8b6bf9b 677 struct snd_pcm_substream *substream)
dabbed6f
M		 678{
679 struct sigmatel_spec *spec = codec->spec;
680 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
681}
682
683static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
684 struct hda_codec *codec,
c8b6bf9b 685 struct snd_pcm_substream *substream)
dabbed6f
M		 686{
687 struct sigmatel_spec *spec = codec->spec;
688 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
689}
690
691
2f2f4251
M		 692/*
693 * Analog capture callbacks
694 */
695static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
696 struct hda_codec *codec,
697 unsigned int stream_tag,
698 unsigned int format,
c8b6bf9b 699 struct snd_pcm_substream *substream)
2f2f4251
M		 700{
701 struct sigmatel_spec *spec = codec->spec;
702
703 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
704 stream_tag, 0, format);
705 return 0;
706}
707
708static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
709 struct hda_codec *codec,
c8b6bf9b 710 struct snd_pcm_substream *substream)
2f2f4251
M		 711{
712 struct sigmatel_spec *spec = codec->spec;
713
714 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
715 return 0;
716}
717
dabbed6f
M		 718static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
719 .substreams = 1,
720 .channels_min = 2,
721 .channels_max = 2,
722 /* NID is set in stac92xx_build_pcms */
723 .ops = {
724 .open = stac92xx_dig_playback_pcm_open,
725 .close = stac92xx_dig_playback_pcm_close
726 },
727};
728
729static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
730 .substreams = 1,
731 .channels_min = 2,
732 .channels_max = 2,
733 /* NID is set in stac92xx_build_pcms */
734};
735
2f2f4251
M		 736static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
737 .substreams = 1,
738 .channels_min = 2,
c7d4b2fa 739 .channels_max = 8,
2f2f4251
M		 740 .nid = 0x02, /* NID to query formats and rates */
741 .ops = {
742 .open = stac92xx_playback_pcm_open,
743 .prepare = stac92xx_playback_pcm_prepare,
744 .cleanup = stac92xx_playback_pcm_cleanup
745 },
746};
747
3cc08dc6
MP		 748static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
749 .substreams = 1,
750 .channels_min = 2,
751 .channels_max = 2,
752 .nid = 0x06, /* NID to query formats and rates */
753 .ops = {
754 .open = stac92xx_playback_pcm_open,
755 .prepare = stac92xx_playback_pcm_prepare,
756 .cleanup = stac92xx_playback_pcm_cleanup
757 },
758};
759
2f2f4251
M		 760static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
761 .substreams = 2,
762 .channels_min = 2,
763 .channels_max = 2,
3cc08dc6 764 /* NID is set in stac92xx_build_pcms */
2f2f4251
M		 765 .ops = {
766 .prepare = stac92xx_capture_pcm_prepare,
767 .cleanup = stac92xx_capture_pcm_cleanup
768 },
769};
770
771static int stac92xx_build_pcms(struct hda_codec *codec)
772{
773 struct sigmatel_spec *spec = codec->spec;
774 struct hda_pcm *info = spec->pcm_rec;
775
776 codec->num_pcms = 1;
777 codec->pcm_info = info;
778
c7d4b2fa 779 info->name = "STAC92xx Analog";
2f2f4251 780 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 781 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6
MP		 782 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
783
784 if (spec->alt_switch) {
785 codec->num_pcms++;
786 info++;
787 info->name = "STAC92xx Analog Alt";
788 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
789 }
2f2f4251 790
dabbed6f
M		 791 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
792 codec->num_pcms++;
793 info++;
794 info->name = "STAC92xx Digital";
795 if (spec->multiout.dig_out_nid) {
796 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
797 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
798 }
799 if (spec->dig_in_nid) {
800 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
801 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
802 }
803 }
804
2f2f4251
M		 805 return 0;
806}
807
c960a03b
TI		 808static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
809{
810 unsigned int pincap = snd_hda_param_read(codec, nid,
811 AC_PAR_PIN_CAP);
812 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
813 if (pincap & AC_PINCAP_VREF_100)
814 return AC_PINCTL_VREF_100;
815 if (pincap & AC_PINCAP_VREF_80)
816 return AC_PINCTL_VREF_80;
817 if (pincap & AC_PINCAP_VREF_50)
818 return AC_PINCTL_VREF_50;
819 if (pincap & AC_PINCAP_VREF_GRD)
820 return AC_PINCTL_VREF_GRD;
821 return 0;
822}
823
403d1944
MP		 824static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
825
826{
827 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
828}
829
830static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
831{
832 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
833 uinfo->count = 1;
834 uinfo->value.integer.min = 0;
835 uinfo->value.integer.max = 1;
836 return 0;
837}
838
839static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
840{
841 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
842 struct sigmatel_spec *spec = codec->spec;
843 int io_idx = kcontrol-> private_value & 0xff;
844
845 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
846 return 0;
847}
848
849static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
850{
851 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
852 struct sigmatel_spec *spec = codec->spec;
853 hda_nid_t nid = kcontrol->private_value >> 8;
854 int io_idx = kcontrol-> private_value & 0xff;
855 unsigned short val = ucontrol->value.integer.value[0];
856
857 spec->io_switch[io_idx] = val;
858
859 if (val)
860 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 861 else {
862 unsigned int pinctl = AC_PINCTL_IN_EN;
863 if (io_idx) /* set VREF for mic */
864 pinctl |= stac92xx_get_vref(codec, nid);
865 stac92xx_auto_set_pinctl(codec, nid, pinctl);
866 }
403d1944
MP		 867 return 1;
868}
869
870#define STAC_CODEC_IO_SWITCH(xname, xpval) \
871 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
872 .name = xname, \
873 .index = 0, \
874 .info = stac92xx_io_switch_info, \
875 .get = stac92xx_io_switch_get, \
876 .put = stac92xx_io_switch_put, \
877 .private_value = xpval, \
878 }
879
880
c7d4b2fa
M		 881enum {
882 STAC_CTL_WIDGET_VOL,
883 STAC_CTL_WIDGET_MUTE,
403d1944 884 STAC_CTL_WIDGET_IO_SWITCH,
c7d4b2fa
M		 885};
886
c8b6bf9b 887static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 888 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
889 HDA_CODEC_MUTE(NULL, 0, 0, 0),
403d1944 890 STAC_CODEC_IO_SWITCH(NULL, 0),
c7d4b2fa
M		 891};
892
893/* add dynamic controls */
894static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
895{
c8b6bf9b 896 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 897
898 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
899 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
900
901 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
902 if (! knew)
903 return -ENOMEM;
904 if (spec->kctl_alloc) {
905 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
906 kfree(spec->kctl_alloc);
907 }
908 spec->kctl_alloc = knew;
909 spec->num_kctl_alloc = num;
910 }
911
912 knew = &spec->kctl_alloc[spec->num_kctl_used];
913 *knew = stac92xx_control_templates[type];
82fe0c58 914 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 915 if (! knew->name)
916 return -ENOMEM;
917 knew->private_value = val;
918 spec->num_kctl_used++;
919 return 0;
920}
921
403d1944
MP		 922/* flag inputs as additional dynamic lineouts */
923static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
924{
925 struct sigmatel_spec *spec = codec->spec;
926
927 switch (cfg->line_outs) {
928 case 3:
929 /* add line-in as side */
930 if (cfg->input_pins[AUTO_PIN_LINE]) {
931 cfg->line_out_pins[3] = cfg->input_pins[AUTO_PIN_LINE];
932 spec->line_switch = 1;
933 cfg->line_outs++;
934 }
935 break;
936 case 2:
937 /* add line-in as clfe and mic as side */
938 if (cfg->input_pins[AUTO_PIN_LINE]) {
939 cfg->line_out_pins[2] = cfg->input_pins[AUTO_PIN_LINE];
940 spec->line_switch = 1;
941 cfg->line_outs++;
942 }
943 if (cfg->input_pins[AUTO_PIN_MIC]) {
944 cfg->line_out_pins[3] = cfg->input_pins[AUTO_PIN_MIC];
945 spec->mic_switch = 1;
946 cfg->line_outs++;
947 }
948 break;
949 case 1:
950 /* add line-in as surr and mic as clfe */
951 if (cfg->input_pins[AUTO_PIN_LINE]) {
952 cfg->line_out_pins[1] = cfg->input_pins[AUTO_PIN_LINE];
953 spec->line_switch = 1;
954 cfg->line_outs++;
955 }
956 if (cfg->input_pins[AUTO_PIN_MIC]) {
957 cfg->line_out_pins[2] = cfg->input_pins[AUTO_PIN_MIC];
958 spec->mic_switch = 1;
959 cfg->line_outs++;
960 }
961 break;
962 }
963
964 return 0;
965}
966
3cc08dc6
MP		 967/*
968 * XXX The line_out pin widget connection list may not be set to the
969 * desired DAC nid. This is the case on 927x where ports A and B can
970 * be routed to several DACs.
971 *
972 * This requires an analysis of the line-out/hp pin configuration
973 * to provide a best fit for pin/DAC configurations that are routable.
974 * For now, 927x DAC4 is not supported and 927x DAC1 output to ports
975 * A and B is not supported.
976 */
c7d4b2fa 977/* fill in the dac_nids table from the parsed pin configuration */
19039bd0
TI		 978static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
979 const struct auto_pin_cfg *cfg)
c7d4b2fa
M		 980{
981 struct sigmatel_spec *spec = codec->spec;
982 hda_nid_t nid;
983 int i;
984
985 /* check the pins hardwired to audio widget */
986 for (i = 0; i < cfg->line_outs; i++) {
987 nid = cfg->line_out_pins[i];
988 spec->multiout.dac_nids[i] = snd_hda_codec_read(codec, nid, 0,
989 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
990 }
991
82bc955f 992 spec->multiout.num_dacs = cfg->line_outs;
c7d4b2fa
M		 993
994 return 0;
995}
996
997/* add playback controls from the parsed DAC table */
19039bd0
TI		 998static int stac92xx_auto_create_multi_out_ctls(struct sigmatel_spec *spec,
999 const struct auto_pin_cfg *cfg)
c7d4b2fa
M		 1000{
1001 char name[32];
19039bd0
TI		 1002 static const char *chname[4] = {
1003 "Front", "Surround", NULL /*CLFE*/, "Side"
1004 };
c7d4b2fa
M		 1005 hda_nid_t nid;
1006 int i, err;
1007
1008 for (i = 0; i < cfg->line_outs; i++) {
403d1944 1009 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 1010 continue;
1011
1012 nid = spec->multiout.dac_nids[i];
1013
1014 if (i == 2) {
1015 /* Center/LFE */
1016 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, "Center Playback Volume",
1017 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT))) < 0)
1018 return err;
1019 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, "LFE Playback Volume",
1020 HDA_COMPOSE_AMP_VAL(nid, 2, 0, HDA_OUTPUT))) < 0)
1021 return err;
1022 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, "Center Playback Switch",
1023 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT))) < 0)
1024 return err;
1025 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, "LFE Playback Switch",
1026 HDA_COMPOSE_AMP_VAL(nid, 2, 0, HDA_OUTPUT))) < 0)
1027 return err;
1028 } else {
1029 sprintf(name, "%s Playback Volume", chname[i]);
1030 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
1031 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT))) < 0)
1032 return err;
1033 sprintf(name, "%s Playback Switch", chname[i]);
1034 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
1035 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT))) < 0)
1036 return err;
1037 }
1038 }
1039
403d1944
MP		 1040 if (spec->line_switch)
1041 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
1042 return err;
1043
1044 if (spec->mic_switch)
1045 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
1046 return err;
1047
c7d4b2fa
M		 1048 return 0;
1049}
1050
1051/* add playback controls for HP output */
1052static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec, struct auto_pin_cfg *cfg)
1053{
1054 struct sigmatel_spec *spec = codec->spec;
1055 hda_nid_t pin = cfg->hp_pin;
1056 hda_nid_t nid;
1057 int i, err;
4e55096e 1058 unsigned int wid_caps;
c7d4b2fa
M		 1059
1060 if (! pin)
1061 return 0;
1062
54d17403 1063 wid_caps = get_wcaps(codec, pin);
505cb341 1064 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 1065 spec->hp_detect = 1;
4e55096e 1066
c7d4b2fa
M		 1067 nid = snd_hda_codec_read(codec, pin, 0, AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1068 for (i = 0; i < cfg->line_outs; i++) {
1069 if (! spec->multiout.dac_nids[i])
1070 continue;
1071 if (spec->multiout.dac_nids[i] == nid)
1072 return 0;
1073 }
1074
1075 spec->multiout.hp_nid = nid;
1076
1077 /* control HP volume/switch on the output mixer amp */
1078 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, "Headphone Playback Volume",
1079 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT))) < 0)
1080 return err;
1081 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, "Headphone Playback Switch",
1082 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT))) < 0)
1083 return err;
1084
1085 return 0;
1086}
1087
1088/* create playback/capture controls for input pins */
1089static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
1090{
1091 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 1092 struct hda_input_mux *imux = &spec->private_imux;
1093 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1094 int i, j, k;
1095
1096 for (i = 0; i < AUTO_PIN_LAST; i++) {
1097 int index = -1;
1098 if (cfg->input_pins[i]) {
4a471b7d 1099 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
c7d4b2fa
M		 1100
1101 for (j=0; j<spec->num_muxes; j++) {
1102 int num_cons = snd_hda_get_connections(codec, spec->mux_nids[j], con_lst, HDA_MAX_NUM_INPUTS);
1103 for (k=0; k<num_cons; k++)
1104 if (con_lst[k] == cfg->input_pins[i]) {
1105 index = k;
1106 break;
1107 }
1108 if (index >= 0)
1109 break;
1110 }
1111 imux->items[imux->num_items].index = index;
1112 imux->num_items++;
1113 }
1114 }
1115
62fe78e9
SR		 1116 if (imux->num_items == 1) {
1117 /*
1118 * Set the current input for the muxes.
1119 * The STAC9221 has two input muxes with identical source
1120 * NID lists. Hopefully this won't get confused.
1121 */
1122 for (i = 0; i < spec->num_muxes; i++) {
1123 snd_hda_codec_write(codec, spec->mux_nids[i], 0,
1124 AC_VERB_SET_CONNECT_SEL,
1125 imux->items[0].index);
1126 }
1127 }
1128
c7d4b2fa
M		 1129 return 0;
1130}
1131
c7d4b2fa
M		 1132static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
1133{
1134 struct sigmatel_spec *spec = codec->spec;
1135 int i;
1136
1137 for (i = 0; i < spec->autocfg.line_outs; i++) {
1138 hda_nid_t nid = spec->autocfg.line_out_pins[i];
1139 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
1140 }
1141}
1142
1143static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
1144{
1145 struct sigmatel_spec *spec = codec->spec;
1146 hda_nid_t pin;
1147
1148 pin = spec->autocfg.hp_pin;
1149 if (pin) /* connect to front */
1150 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
1151}
1152
3cc08dc6 1153static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 1154{
1155 struct sigmatel_spec *spec = codec->spec;
1156 int err;
1157
df694daa 1158 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa 1159 return err;
82bc955f 1160 if (! spec->autocfg.line_outs)
869264c4 1161 return 0; /* can't find valid pin config */
19039bd0 1162
403d1944
MP		 1163 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
1164 return err;
19039bd0
TI		 1165 if (spec->multiout.num_dacs == 0)
1166 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
1167 return err;
c7d4b2fa
M		 1168
1169 if ((err = stac92xx_auto_create_multi_out_ctls(spec, &spec->autocfg)) < 0 ||
1170 (err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg)) < 0 ||
1171 (err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
1172 return err;
1173
1174 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 1175 if (spec->multiout.max_channels > 2)
c7d4b2fa 1176 spec->surr_switch = 1;
c7d4b2fa 1177
82bc955f 1178 if (spec->autocfg.dig_out_pin)
3cc08dc6 1179 spec->multiout.dig_out_nid = dig_out;
82bc955f 1180 if (spec->autocfg.dig_in_pin)
3cc08dc6 1181 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 1182
1183 if (spec->kctl_alloc)
1184 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
1185
1186 spec->input_mux = &spec->private_imux;
1187
1188 return 1;
1189}
1190
82bc955f
TI		 1191/* add playback controls for HP output */
1192static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
1193 struct auto_pin_cfg *cfg)
1194{
1195 struct sigmatel_spec *spec = codec->spec;
1196 hda_nid_t pin = cfg->hp_pin;
1197 unsigned int wid_caps;
1198
1199 if (! pin)
1200 return 0;
1201
1202 wid_caps = get_wcaps(codec, pin);
505cb341 1203 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 1204 spec->hp_detect = 1;
82bc955f
TI		 1205
1206 return 0;
1207}
1208
c7d4b2fa
M		 1209static int stac9200_parse_auto_config(struct hda_codec *codec)
1210{
1211 struct sigmatel_spec *spec = codec->spec;
1212 int err;
1213
df694daa 1214 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 1215 return err;
1216
1217 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
1218 return err;
1219
82bc955f
TI		 1220 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
1221 return err;
1222
1223 if (spec->autocfg.dig_out_pin)
c7d4b2fa 1224 spec->multiout.dig_out_nid = 0x05;
82bc955f 1225 if (spec->autocfg.dig_in_pin)
c7d4b2fa 1226 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 1227
1228 if (spec->kctl_alloc)
1229 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
1230
1231 spec->input_mux = &spec->private_imux;
1232
1233 return 1;
1234}
1235
62fe78e9
SR		 1236/*
1237 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
1238 * funky external mute control using GPIO pins.
1239 */
1240
1241static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
1242{
1243 unsigned int gpiostate, gpiomask, gpiodir;
1244
1245 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
1246 AC_VERB_GET_GPIO_DATA, 0);
1247
1248 if (!muted)
1249 gpiostate |= (1 << pin);
1250 else
1251 gpiostate &= ~(1 << pin);
1252
1253 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
1254 AC_VERB_GET_GPIO_MASK, 0);
1255 gpiomask |= (1 << pin);
1256
1257 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
1258 AC_VERB_GET_GPIO_DIRECTION, 0);
1259 gpiodir |= (1 << pin);
1260
1261 /* AppleHDA seems to do this -- WTF is this verb?? */
1262 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
1263
1264 snd_hda_codec_write(codec, codec->afg, 0,
1265 AC_VERB_SET_GPIO_MASK, gpiomask);
1266 snd_hda_codec_write(codec, codec->afg, 0,
1267 AC_VERB_SET_GPIO_DIRECTION, gpiodir);
1268
1269 msleep(1);
1270
1271 snd_hda_codec_write(codec, codec->afg, 0,
1272 AC_VERB_SET_GPIO_DATA, gpiostate);
1273}
1274
c7d4b2fa
M		 1275static int stac92xx_init(struct hda_codec *codec)
1276{
1277 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 1278 struct auto_pin_cfg *cfg = &spec->autocfg;
1279 int i;
c7d4b2fa 1280
c7d4b2fa
M		 1281 snd_hda_sequence_write(codec, spec->init);
1282
82bc955f
TI		 1283 /* set up pins */
1284 if (spec->hp_detect) {
505cb341
TI		 1285 /* Enable unsolicited responses on the HP widget */
1286 snd_hda_codec_write(codec, cfg->hp_pin, 0,
1287 AC_VERB_SET_UNSOLICITED_ENABLE,
1288 STAC_UNSOL_ENABLE);
82bc955f
TI		 1289 /* fake event to set up pins */
1290 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
68a6abd9
TD		 1291 /* enable the headphones by default. If/when unsol_event detection works, this will be ignored */
1292 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 1293 } else {
1294 stac92xx_auto_init_multi_out(codec);
1295 stac92xx_auto_init_hp_out(codec);
1296 }
1297 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 1298 hda_nid_t nid = cfg->input_pins[i];
1299 if (nid) {
1300 unsigned int pinctl = AC_PINCTL_IN_EN;
1301 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
1302 pinctl |= stac92xx_get_vref(codec, nid);
1303 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1304 }
82bc955f
TI		 1305 }
1306 if (cfg->dig_out_pin)
1307 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
1308 AC_PINCTL_OUT_EN);
1309 if (cfg->dig_in_pin)
1310 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
1311 AC_PINCTL_IN_EN);
1312
62fe78e9
SR		 1313 if (spec->gpio_mute) {
1314 stac922x_gpio_mute(codec, 0, 0);
1315 stac922x_gpio_mute(codec, 1, 0);
1316 }
1317
c7d4b2fa
M		 1318 return 0;
1319}
1320
2f2f4251
M		 1321static void stac92xx_free(struct hda_codec *codec)
1322{
c7d4b2fa
M		 1323 struct sigmatel_spec *spec = codec->spec;
1324 int i;
1325
1326 if (! spec)
1327 return;
1328
1329 if (spec->kctl_alloc) {
1330 for (i = 0; i < spec->num_kctl_used; i++)
1331 kfree(spec->kctl_alloc[i].name);
1332 kfree(spec->kctl_alloc);
1333 }
1334
11b44bbd
RF		 1335 if (spec->bios_pin_configs)
1336 kfree(spec->bios_pin_configs);
1337
c7d4b2fa 1338 kfree(spec);
2f2f4251
M		 1339}
1340
4e55096e
M		 1341static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
1342 unsigned int flag)
1343{
1344 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
1345 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
1346 snd_hda_codec_write(codec, nid, 0,
1347 AC_VERB_SET_PIN_WIDGET_CONTROL,
1348 pin_ctl | flag);
1349}
1350
1351static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
1352 unsigned int flag)
1353{
1354 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
1355 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
1356 snd_hda_codec_write(codec, nid, 0,
1357 AC_VERB_SET_PIN_WIDGET_CONTROL,
1358 pin_ctl & ~flag);
1359}
1360
1361static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
1362{
1363 struct sigmatel_spec *spec = codec->spec;
1364 struct auto_pin_cfg *cfg = &spec->autocfg;
1365 int i, presence;
1366
1367 if ((res >> 26) != STAC_HP_EVENT)
1368 return;
1369
1370 presence = snd_hda_codec_read(codec, cfg->hp_pin, 0,
1371 AC_VERB_GET_PIN_SENSE, 0x00) >> 31;
1372
1373 if (presence) {
1374 /* disable lineouts, enable hp */
1375 for (i = 0; i < cfg->line_outs; i++)
1376 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
1377 AC_PINCTL_OUT_EN);
1378 stac92xx_set_pinctl(codec, cfg->hp_pin, AC_PINCTL_OUT_EN);
1379 } else {
1380 /* enable lineouts, disable hp */
1381 for (i = 0; i < cfg->line_outs; i++)
1382 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
1383 AC_PINCTL_OUT_EN);
1384 stac92xx_reset_pinctl(codec, cfg->hp_pin, AC_PINCTL_OUT_EN);
1385 }
1386}
1387
ff6fdc37
M		 1388#ifdef CONFIG_PM
1389static int stac92xx_resume(struct hda_codec *codec)
1390{
1391 struct sigmatel_spec *spec = codec->spec;
1392 int i;
1393
1394 stac92xx_init(codec);
11b44bbd 1395 stac92xx_set_config_regs(codec);
ff6fdc37
M		 1396 for (i = 0; i < spec->num_mixers; i++)
1397 snd_hda_resume_ctls(codec, spec->mixers[i]);
1398 if (spec->multiout.dig_out_nid)
1399 snd_hda_resume_spdif_out(codec);
1400 if (spec->dig_in_nid)
1401 snd_hda_resume_spdif_in(codec);
1402
1403 return 0;
1404}
1405#endif
1406
2f2f4251
M		 1407static struct hda_codec_ops stac92xx_patch_ops = {
1408 .build_controls = stac92xx_build_controls,
1409 .build_pcms = stac92xx_build_pcms,
1410 .init = stac92xx_init,
1411 .free = stac92xx_free,
4e55096e 1412 .unsol_event = stac92xx_unsol_event,
ff6fdc37
M		 1413#ifdef CONFIG_PM
1414 .resume = stac92xx_resume,
1415#endif
2f2f4251
M		 1416};
1417
1418static int patch_stac9200(struct hda_codec *codec)
1419{
1420 struct sigmatel_spec *spec;
c7d4b2fa 1421 int err;
2f2f4251 1422
e560d8d8 1423 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 1424 if (spec == NULL)
1425 return -ENOMEM;
1426
1427 codec->spec = spec;
11b44bbd
RF		 1428 spec->num_pins = 8;
1429 spec->pin_nids = stac9200_pin_nids;
403d1944 1430 spec->board_config = snd_hda_check_board_config(codec, stac9200_cfg_tbl);
11b44bbd
RF		 1431 if (spec->board_config < 0) {
1432 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
1433 err = stac92xx_save_bios_config_regs(codec);
1434 if (err < 0) {
1435 stac92xx_free(codec);
1436 return err;
1437 }
1438 spec->pin_configs = spec->bios_pin_configs;
1439 } else {
403d1944
MP		 1440 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
1441 stac92xx_set_config_regs(codec);
1442 }
2f2f4251
M		 1443
1444 spec->multiout.max_channels = 2;
1445 spec->multiout.num_dacs = 1;
1446 spec->multiout.dac_nids = stac9200_dac_nids;
1447 spec->adc_nids = stac9200_adc_nids;
1448 spec->mux_nids = stac9200_mux_nids;
dabbed6f 1449 spec->num_muxes = 1;
c7d4b2fa
M		 1450
1451 spec->init = stac9200_core_init;
2f2f4251 1452 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 1453
1454 err = stac9200_parse_auto_config(codec);
1455 if (err < 0) {
1456 stac92xx_free(codec);
1457 return err;
1458 }
2f2f4251
M		 1459
1460 codec->patch_ops = stac92xx_patch_ops;
1461
1462 return 0;
1463}
1464
1465static int patch_stac922x(struct hda_codec *codec)
1466{
1467 struct sigmatel_spec *spec;
c7d4b2fa 1468 int err;
2f2f4251 1469
e560d8d8 1470 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 1471 if (spec == NULL)
1472 return -ENOMEM;
1473
1474 codec->spec = spec;
11b44bbd
RF		 1475 spec->num_pins = 10;
1476 spec->pin_nids = stac922x_pin_nids;
403d1944 1477 spec->board_config = snd_hda_check_board_config(codec, stac922x_cfg_tbl);
11b44bbd
RF		 1478 if (spec->board_config < 0) {
1479 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
1480 "using BIOS defaults\n");
1481 err = stac92xx_save_bios_config_regs(codec);
1482 if (err < 0) {
1483 stac92xx_free(codec);
1484 return err;
1485 }
1486 spec->pin_configs = spec->bios_pin_configs;
1487 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 1488 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
1489 stac92xx_set_config_regs(codec);
1490 }
2f2f4251 1491
c7d4b2fa
M		 1492 spec->adc_nids = stac922x_adc_nids;
1493 spec->mux_nids = stac922x_mux_nids;
1494 spec->num_muxes = 2;
1495
1496 spec->init = stac922x_core_init;
2f2f4251 1497 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 1498
1499 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 1500
3cc08dc6
MP		 1501 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
1502 if (err < 0) {
1503 stac92xx_free(codec);
1504 return err;
1505 }
1506
62fe78e9
SR		 1507 if (spec->board_config == STAC_MACMINI)
1508 spec->gpio_mute = 1;
1509
3cc08dc6
MP		 1510 codec->patch_ops = stac92xx_patch_ops;
1511
1512 return 0;
1513}
1514
1515static int patch_stac927x(struct hda_codec *codec)
1516{
1517 struct sigmatel_spec *spec;
1518 int err;
1519
1520 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1521 if (spec == NULL)
1522 return -ENOMEM;
1523
1524 codec->spec = spec;
11b44bbd
RF		 1525 spec->num_pins = 14;
1526 spec->pin_nids = stac927x_pin_nids;
3cc08dc6 1527 spec->board_config = snd_hda_check_board_config(codec, stac927x_cfg_tbl);
11b44bbd 1528 if (spec->board_config < 0) {
3cc08dc6 1529 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n");
11b44bbd
RF		 1530 err = stac92xx_save_bios_config_regs(codec);
1531 if (err < 0) {
1532 stac92xx_free(codec);
1533 return err;
1534 }
1535 spec->pin_configs = spec->bios_pin_configs;
1536 } else if (stac927x_brd_tbl[spec->board_config] != NULL) {
3cc08dc6
MP		 1537 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
1538 stac92xx_set_config_regs(codec);
1539 }
1540
81d3dbde
TD		 1541 switch (spec->board_config) {
1542 case STAC_D965_2112:
1543 spec->adc_nids = stac927x_adc_nids;
1544 spec->mux_nids = stac927x_mux_nids;
1545 spec->num_muxes = 3;
1546 spec->init = d965_2112_core_init;
1547 spec->mixer = stac9227_mixer;
1548 break;
1549 case STAC_D965_284B:
1550 spec->adc_nids = stac9227_adc_nids;
1551 spec->mux_nids = stac9227_mux_nids;
1552 spec->num_muxes = 2;
1553 spec->init = stac9227_core_init;
1554 spec->mixer = stac9227_mixer;
1555 break;
1556 default:
1557 spec->adc_nids = stac927x_adc_nids;
1558 spec->mux_nids = stac927x_mux_nids;
1559 spec->num_muxes = 3;
1560 spec->init = stac927x_core_init;
1561 spec->mixer = stac927x_mixer;
1562 }
3cc08dc6
MP		 1563
1564 spec->multiout.dac_nids = spec->dac_nids;
1565
1566 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
c7d4b2fa
M		 1567 if (err < 0) {
1568 stac92xx_free(codec);
1569 return err;
1570 }
2f2f4251
M		 1571
1572 codec->patch_ops = stac92xx_patch_ops;
1573
1574 return 0;
1575}
1576
f3302a59
MP		 1577static int patch_stac9205(struct hda_codec *codec)
1578{
1579 struct sigmatel_spec *spec;
1580 int err;
1581
1582 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1583 if (spec == NULL)
1584 return -ENOMEM;
1585
1586 codec->spec = spec;
11b44bbd
RF		 1587 spec->num_pins = 14;
1588 spec->pin_nids = stac9205_pin_nids;
f3302a59 1589 spec->board_config = snd_hda_check_board_config(codec, stac9205_cfg_tbl);
11b44bbd
RF		 1590 if (spec->board_config < 0) {
1591 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
1592 err = stac92xx_save_bios_config_regs(codec);
1593 if (err < 0) {
1594 stac92xx_free(codec);
1595 return err;
1596 }
1597 spec->pin_configs = spec->bios_pin_configs;
1598 } else {
f3302a59
MP		 1599 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
1600 stac92xx_set_config_regs(codec);
1601 }
1602
1603 spec->adc_nids = stac9205_adc_nids;
1604 spec->mux_nids = stac9205_mux_nids;
1605 spec->num_muxes = 3;
1606
1607 spec->init = stac9205_core_init;
1608 spec->mixer = stac9205_mixer;
1609
1610 spec->multiout.dac_nids = spec->dac_nids;
1611
1612 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
1613 if (err < 0) {
1614 stac92xx_free(codec);
1615 return err;
1616 }
1617
1618 codec->patch_ops = stac92xx_patch_ops;
1619
1620 return 0;
1621}
1622
db064e50 1623/*
6d859065 1624 * STAC9872 hack
db064e50
TI		 1625 */
1626
99ccc560 1627/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 1628static hda_nid_t vaio_dacs[] = { 0x2 };
1629#define VAIO_HP_DAC 0x5
1630static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
1631static hda_nid_t vaio_mux_nids[] = { 0x15 };
1632
1633static struct hda_input_mux vaio_mux = {
1634 .num_items = 2,
1635 .items = {
d773781c
TI		 1636 /* { "HP", 0x0 }, */
1637 { "Line", 0x1 },
db064e50
TI		 1638 { "Mic", 0x2 },
1639 { "PCM", 0x3 },
1640 }
1641};
1642
1643static struct hda_verb vaio_init[] = {
1644 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
1645 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
1646 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
1647 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
1648 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1649 {0x15, AC_VERB_SET_CONNECT_SEL, 0x2}, /* mic-sel: 0a,0d,14,02 */
1650 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
1651 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
1652 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
1653 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
1654 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
1655 {}
1656};
1657
6d859065
GM		 1658static struct hda_verb vaio_ar_init[] = {
1659 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
1660 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
1661 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
1662 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
1663/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
1664 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1665 {0x15, AC_VERB_SET_CONNECT_SEL, 0x2}, /* mic-sel: 0a,0d,14,02 */
1666 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
1667 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
1668/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
1669 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
1670 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
1671 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
1672 {}
1673};
1674
db064e50
TI		 1675/* bind volumes of both NID 0x02 and 0x05 */
1676static int vaio_master_vol_put(struct snd_kcontrol *kcontrol,
1677 struct snd_ctl_elem_value *ucontrol)
1678{
1679 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1680 long *valp = ucontrol->value.integer.value;
1681 int change;
1682
1683 change = snd_hda_codec_amp_update(codec, 0x02, 0, HDA_OUTPUT, 0,
1684 0x7f, valp[0] & 0x7f);
1685 change |= snd_hda_codec_amp_update(codec, 0x02, 1, HDA_OUTPUT, 0,
1686 0x7f, valp[1] & 0x7f);
1687 snd_hda_codec_amp_update(codec, 0x05, 0, HDA_OUTPUT, 0,
1688 0x7f, valp[0] & 0x7f);
1689 snd_hda_codec_amp_update(codec, 0x05, 1, HDA_OUTPUT, 0,
1690 0x7f, valp[1] & 0x7f);
1691 return change;
1692}
1693
1694/* bind volumes of both NID 0x02 and 0x05 */
1695static int vaio_master_sw_put(struct snd_kcontrol *kcontrol,
1696 struct snd_ctl_elem_value *ucontrol)
1697{
1698 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1699 long *valp = ucontrol->value.integer.value;
1700 int change;
1701
1702 change = snd_hda_codec_amp_update(codec, 0x02, 0, HDA_OUTPUT, 0,
a9393d70 1703 0x80, (valp[0] ? 0 : 0x80));
db064e50 1704 change |= snd_hda_codec_amp_update(codec, 0x02, 1, HDA_OUTPUT, 0,
a9393d70 1705 0x80, (valp[1] ? 0 : 0x80));
db064e50 1706 snd_hda_codec_amp_update(codec, 0x05, 0, HDA_OUTPUT, 0,
a9393d70 1707 0x80, (valp[0] ? 0 : 0x80));
db064e50 1708 snd_hda_codec_amp_update(codec, 0x05, 1, HDA_OUTPUT, 0,
a9393d70 1709 0x80, (valp[1] ? 0 : 0x80));
db064e50
TI		 1710 return change;
1711}
1712
1713static struct snd_kcontrol_new vaio_mixer[] = {
1714 {
1715 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1716 .name = "Master Playback Volume",
1717 .info = snd_hda_mixer_amp_volume_info,
1718 .get = snd_hda_mixer_amp_volume_get,
1719 .put = vaio_master_vol_put,
c2566524 1720 .tlv = { .c = snd_hda_mixer_amp_tlv },
db064e50
TI		 1721 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
1722 },
1723 {
1724 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1725 .name = "Master Playback Switch",
1726 .info = snd_hda_mixer_amp_switch_info,
1727 .get = snd_hda_mixer_amp_switch_get,
1728 .put = vaio_master_sw_put,
1729 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
1730 },
1731 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
1732 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
1733 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
1734 {
1735 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1736 .name = "Capture Source",
1737 .count = 1,
1738 .info = stac92xx_mux_enum_info,
1739 .get = stac92xx_mux_enum_get,
1740 .put = stac92xx_mux_enum_put,
1741 },
1742 {}
1743};
1744
6d859065
GM		 1745static struct snd_kcontrol_new vaio_ar_mixer[] = {
1746 {
1747 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1748 .name = "Master Playback Volume",
1749 .info = snd_hda_mixer_amp_volume_info,
1750 .get = snd_hda_mixer_amp_volume_get,
1751 .put = vaio_master_vol_put,
1752 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
1753 },
1754 {
1755 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1756 .name = "Master Playback Switch",
1757 .info = snd_hda_mixer_amp_switch_info,
1758 .get = snd_hda_mixer_amp_switch_get,
1759 .put = vaio_master_sw_put,
1760 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
1761 },
1762 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
1763 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
1764 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
1765 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
1766 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
1767 {
1768 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1769 .name = "Capture Source",
1770 .count = 1,
1771 .info = stac92xx_mux_enum_info,
1772 .get = stac92xx_mux_enum_get,
1773 .put = stac92xx_mux_enum_put,
1774 },
1775 {}
1776};
1777
1778static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 1779 .build_controls = stac92xx_build_controls,
1780 .build_pcms = stac92xx_build_pcms,
1781 .init = stac92xx_init,
1782 .free = stac92xx_free,
1783#ifdef CONFIG_PM
1784 .resume = stac92xx_resume,
1785#endif
1786};
1787
6d859065
GM		 1788enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
1789 CXD9872RD_VAIO,
1790 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
1791 STAC9872AK_VAIO,
1792 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
1793 STAC9872K_VAIO,
1794 /* AR Series. id=0x83847664 and subsys=104D1300 */
1795 CXD9872AKD_VAIO
1796 };
1797
1798static struct hda_board_config stac9872_cfg_tbl[] = {
1799 { .modelname = "vaio", .config = CXD9872RD_VAIO },
1800 { .modelname = "vaio-ar", .config = CXD9872AKD_VAIO },
db064e50 1801 { .pci_subvendor = 0x104d, .pci_subdevice = 0x81e6,
6d859065 1802 .config = CXD9872RD_VAIO },
db064e50 1803 { .pci_subvendor = 0x104d, .pci_subdevice = 0x81ef,
6d859065 1804 .config = CXD9872RD_VAIO },
99ccc560 1805 { .pci_subvendor = 0x104d, .pci_subdevice = 0x81fd,
6d859065 1806 .config = CXD9872AKD_VAIO },
db064e50
TI		 1807 {}
1808};
1809
6d859065 1810static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 1811{
1812 struct sigmatel_spec *spec;
1813 int board_config;
1814
6d859065 1815 board_config = snd_hda_check_board_config(codec, stac9872_cfg_tbl);
db064e50
TI		 1816 if (board_config < 0)
1817 /* unknown config, let generic-parser do its job... */
1818 return snd_hda_parse_generic_codec(codec);
1819
1820 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1821 if (spec == NULL)
1822 return -ENOMEM;
1823
1824 codec->spec = spec;
1825 switch (board_config) {
6d859065
GM		 1826 case CXD9872RD_VAIO:
1827 case STAC9872AK_VAIO:
1828 case STAC9872K_VAIO:
db064e50
TI		 1829 spec->mixer = vaio_mixer;
1830 spec->init = vaio_init;
1831 spec->multiout.max_channels = 2;
1832 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
1833 spec->multiout.dac_nids = vaio_dacs;
1834 spec->multiout.hp_nid = VAIO_HP_DAC;
1835 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
1836 spec->adc_nids = vaio_adcs;
1837 spec->input_mux = &vaio_mux;
1838 spec->mux_nids = vaio_mux_nids;
1839 break;
6d859065
GM		 1840
1841 case CXD9872AKD_VAIO:
1842 spec->mixer = vaio_ar_mixer;
1843 spec->init = vaio_ar_init;
1844 spec->multiout.max_channels = 2;
1845 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
1846 spec->multiout.dac_nids = vaio_dacs;
1847 spec->multiout.hp_nid = VAIO_HP_DAC;
1848 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
1849 spec->adc_nids = vaio_adcs;
1850 spec->input_mux = &vaio_mux;
1851 spec->mux_nids = vaio_mux_nids;
1852 break;
db064e50
TI		 1853 }
1854
6d859065 1855 codec->patch_ops = stac9872_patch_ops;
db064e50
TI		 1856 return 0;
1857}
1858
1859
2f2f4251
M		 1860/*
1861 * patch entries
1862 */
1863struct hda_codec_preset snd_hda_preset_sigmatel[] = {
1864 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
1865 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
1866 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
1867 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
1868 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
1869 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
1870 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 1871 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
1872 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
1873 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
1874 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
1875 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
1876 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 1877 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
1878 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
1879 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
1880 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
1881 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
1882 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
1883 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
1884 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
1885 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
1886 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
6d859065
GM		 1887 /* The following does not take into account .id=0x83847661 when subsys =
1888 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
1889 * currently not fully supported.
1890 */
1891 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
1892 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
1893 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 1894 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
1895 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
1896 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
1897 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
1898 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
1899 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
1900 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
1901 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
2f2f4251
M		 1902 {} /* terminator */
1903};
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