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Merge branch 'test/hda-vol-ofs' into next/hda
[mirror_ubuntu-zesty-kernel.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
TI		 38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
58eec423
MCC		 58 STAC_9200_M4,
59 STAC_9200_M4_2,
117f257d 60 STAC_9200_PANASONIC,
f5fcc13c
TI		 61 STAC_9200_MODELS
62};
63
64enum {
65 STAC_9205_REF,
dfe495d0 66 STAC_9205_DELL_M42,
ae0a8ed8
TD		 67 STAC_9205_DELL_M43,
68 STAC_9205_DELL_M44,
f5fcc13c
TI		 69 STAC_9205_MODELS
70};
71
e1f0d669 72enum {
9e43f0de 73 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 74 STAC_92HD73XX_REF,
661cd8fb
TI		 75 STAC_DELL_M6_AMIC,
76 STAC_DELL_M6_DMIC,
77 STAC_DELL_M6_BOTH,
6b3ab21e 78 STAC_DELL_EQ,
e1f0d669
MR		 79 STAC_92HD73XX_MODELS
80};
81
d0513fc6
MR		 82enum {
83 STAC_92HD83XXX_REF,
84 STAC_92HD83XXX_MODELS
85};
86
e035b841
MR		 87enum {
88 STAC_92HD71BXX_REF,
a7662640
MR		 89 STAC_DELL_M4_1,
90 STAC_DELL_M4_2,
3a7abfd2 91 STAC_DELL_M4_3,
6a14f585 92 STAC_HP_M4,
1b0652eb 93 STAC_HP_DV5,
e035b841
MR		 94 STAC_92HD71BXX_MODELS
95};
96
8e21c34c
TD		 97enum {
98 STAC_925x_REF,
9cb36c2a
MCC		 99 STAC_M1,
100 STAC_M1_2,
101 STAC_M2,
8e21c34c 102 STAC_M2_2,
9cb36c2a
MCC		 103 STAC_M3,
104 STAC_M5,
105 STAC_M6,
8e21c34c
TD		 106 STAC_925x_MODELS
107};
108
f5fcc13c
TI		 109enum {
110 STAC_D945_REF,
111 STAC_D945GTP3,
112 STAC_D945GTP5,
5d5d3bc3
IZ		 113 STAC_INTEL_MAC_V1,
114 STAC_INTEL_MAC_V2,
115 STAC_INTEL_MAC_V3,
116 STAC_INTEL_MAC_V4,
117 STAC_INTEL_MAC_V5,
536319af
NB		 118 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
119 * is given, one of the above models will be
120 * chosen according to the subsystem id. */
dfe495d0 121 /* for backward compatibility */
f5fcc13c 122 STAC_MACMINI,
3fc24d85 123 STAC_MACBOOK,
6f0778d8
NB		 124 STAC_MACBOOK_PRO_V1,
125 STAC_MACBOOK_PRO_V2,
f16928fb 126 STAC_IMAC_INTEL,
0dae0f83 127 STAC_IMAC_INTEL_20,
8c650087 128 STAC_ECS_202,
dfe495d0
TI		 129 STAC_922X_DELL_D81,
130 STAC_922X_DELL_D82,
131 STAC_922X_DELL_M81,
132 STAC_922X_DELL_M82,
f5fcc13c
TI		 133 STAC_922X_MODELS
134};
135
136enum {
e28d8322 137 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 138 STAC_D965_REF,
139 STAC_D965_3ST,
140 STAC_D965_5ST,
4ff076e5 141 STAC_DELL_3ST,
8e9068b1 142 STAC_DELL_BIOS,
f5fcc13c
TI		 143 STAC_927X_MODELS
144};
403d1944 145
74aeaabc
MR		 146struct sigmatel_event {
147 hda_nid_t nid;
c6e4c666
TI		 148 unsigned char type;
149 unsigned char tag;
74aeaabc
MR		 150 int data;
151};
152
153struct sigmatel_jack {
154 hda_nid_t nid;
155 int type;
156 struct snd_jack *jack;
157};
158
2f2f4251 159struct sigmatel_spec {
c8b6bf9b 160 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 161 unsigned int num_mixers;
162
403d1944 163 int board_config;
c0cea0d0 164 unsigned int eapd_switch: 1;
c7d4b2fa 165 unsigned int surr_switch: 1;
3cc08dc6 166 unsigned int alt_switch: 1;
82bc955f 167 unsigned int hp_detect: 1;
00ef50c2 168 unsigned int spdif_mute: 1;
7c7767eb 169 unsigned int check_volume_offset:1;
c7d4b2fa 170
4fe5195c 171 /* gpio lines */
0fc9dec4 172 unsigned int eapd_mask;
4fe5195c
MR		 173 unsigned int gpio_mask;
174 unsigned int gpio_dir;
175 unsigned int gpio_data;
176 unsigned int gpio_mute;
177
8daaaa97
MR		 178 /* stream */
179 unsigned int stream_delay;
180
4fe5195c 181 /* analog loopback */
e1f0d669
MR		 182 unsigned char aloopback_mask;
183 unsigned char aloopback_shift;
8259980e 184
a64135a2
MR		 185 /* power management */
186 unsigned int num_pwrs;
d0513fc6 187 unsigned int *pwr_mapping;
a64135a2 188 hda_nid_t *pwr_nids;
b76c850f 189 hda_nid_t *dac_list;
a64135a2 190
74aeaabc
MR		 191 /* jack detection */
192 struct snd_array jacks;
193
194 /* events */
195 struct snd_array events;
196
2f2f4251 197 /* playback */
b22b4821 198 struct hda_input_mux *mono_mux;
89385035 199 struct hda_input_mux *amp_mux;
b22b4821 200 unsigned int cur_mmux;
2f2f4251 201 struct hda_multi_out multiout;
3cc08dc6 202 hda_nid_t dac_nids[5];
c21ca4a8
TI		 203 hda_nid_t hp_dacs[5];
204 hda_nid_t speaker_dacs[5];
2f2f4251 205
7c7767eb
TI		 206 int volume_offset;
207
2f2f4251
M		 208 /* capture */
209 hda_nid_t *adc_nids;
2f2f4251 210 unsigned int num_adcs;
dabbed6f
M		 211 hda_nid_t *mux_nids;
212 unsigned int num_muxes;
8b65727b
MP		 213 hda_nid_t *dmic_nids;
214 unsigned int num_dmics;
e1f0d669 215 hda_nid_t *dmux_nids;
1697055e 216 unsigned int num_dmuxes;
d9737751
MR		 217 hda_nid_t *smux_nids;
218 unsigned int num_smuxes;
65973632 219 const char **spdif_labels;
d9737751 220
dabbed6f 221 hda_nid_t dig_in_nid;
b22b4821 222 hda_nid_t mono_nid;
1cd2224c
MR		 223 hda_nid_t anabeep_nid;
224 hda_nid_t digbeep_nid;
2f2f4251 225
2f2f4251
M		 226 /* pin widgets */
227 hda_nid_t *pin_nids;
228 unsigned int num_pins;
2f2f4251 229 unsigned int *pin_configs;
2f2f4251
M		 230
231 /* codec specific stuff */
232 struct hda_verb *init;
c8b6bf9b 233 struct snd_kcontrol_new *mixer;
2f2f4251
M		 234
235 /* capture source */
8b65727b 236 struct hda_input_mux *dinput_mux;
e1f0d669 237 unsigned int cur_dmux[2];
c7d4b2fa 238 struct hda_input_mux *input_mux;
3cc08dc6 239 unsigned int cur_mux[3];
d9737751
MR		 240 struct hda_input_mux *sinput_mux;
241 unsigned int cur_smux[2];
2a9c7816
MR		 242 unsigned int cur_amux;
243 hda_nid_t *amp_nids;
244 unsigned int num_amps;
8daaaa97 245 unsigned int powerdown_adcs;
2f2f4251 246
403d1944
MP		 247 /* i/o switches */
248 unsigned int io_switch[2];
0fb87bb4 249 unsigned int clfe_swap;
c21ca4a8
TI		 250 hda_nid_t line_switch; /* shared line-in for input and output */
251 hda_nid_t mic_switch; /* shared mic-in for input and output */
252 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 253 unsigned int aloopback;
2f2f4251 254
c7d4b2fa
M		 255 struct hda_pcm pcm_rec[2]; /* PCM information */
256
257 /* dynamic controls and input_mux */
258 struct auto_pin_cfg autocfg;
603c4019 259 struct snd_array kctls;
8b65727b 260 struct hda_input_mux private_dimux;
c7d4b2fa 261 struct hda_input_mux private_imux;
d9737751 262 struct hda_input_mux private_smux;
89385035 263 struct hda_input_mux private_amp_mux;
b22b4821 264 struct hda_input_mux private_mono_mux;
2f2f4251
M		 265};
266
267static hda_nid_t stac9200_adc_nids[1] = {
268 0x03,
269};
270
271static hda_nid_t stac9200_mux_nids[1] = {
272 0x0c,
273};
274
275static hda_nid_t stac9200_dac_nids[1] = {
276 0x02,
277};
278
a64135a2
MR		 279static hda_nid_t stac92hd73xx_pwr_nids[8] = {
280 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
281 0x0f, 0x10, 0x11
282};
283
0ffa9807
MR		 284static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
285 0x26, 0,
286};
287
e1f0d669
MR		 288static hda_nid_t stac92hd73xx_adc_nids[2] = {
289 0x1a, 0x1b
290};
291
2a9c7816
MR		 292#define DELL_M6_AMP 2
293static hda_nid_t stac92hd73xx_amp_nids[3] = {
294 0x0b, 0x0c, 0x0e
89385035
MR		 295};
296
e1f0d669
MR		 297#define STAC92HD73XX_NUM_DMICS 2
298static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
299 0x13, 0x14, 0
300};
301
302#define STAC92HD73_DAC_COUNT 5
e1f0d669
MR		 303
304static hda_nid_t stac92hd73xx_mux_nids[4] = {
305 0x28, 0x29, 0x2a, 0x2b,
306};
307
308static hda_nid_t stac92hd73xx_dmux_nids[2] = {
309 0x20, 0x21,
310};
311
d9737751
MR		 312static hda_nid_t stac92hd73xx_smux_nids[2] = {
313 0x22, 0x23,
314};
315
d0513fc6
MR		 316#define STAC92HD83XXX_NUM_DMICS 2
317static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
318 0x11, 0x12, 0
319};
320
d0513fc6 321#define STAC92HD83_DAC_COUNT 3
d0513fc6
MR		 322
323static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
324 0x17, 0x18,
325};
326
327static hda_nid_t stac92hd83xxx_adc_nids[2] = {
328 0x15, 0x16,
329};
330
331static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
332 0xa, 0xb, 0xd, 0xe,
333};
334
0ffa9807
MR		 335static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
336 0x1e, 0,
337};
338
d0513fc6 339static unsigned int stac92hd83xxx_pwr_mapping[4] = {
989738c4 340 0x03, 0x0c, 0x20, 0x80,
d0513fc6
MR		 341};
342
9248f269 343static hda_nid_t stac92hd83xxx_amp_nids[1] = {
c15c5060
MR		 344 0xc,
345};
346
a64135a2
MR		 347static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
348 0x0a, 0x0d, 0x0f
349};
350
e035b841
MR		 351static hda_nid_t stac92hd71bxx_adc_nids[2] = {
352 0x12, 0x13,
353};
354
355static hda_nid_t stac92hd71bxx_mux_nids[2] = {
356 0x1a, 0x1b
357};
358
4b33c767
MR		 359static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
360 0x1c, 0x1d,
e1f0d669
MR		 361};
362
d9737751
MR		 363static hda_nid_t stac92hd71bxx_smux_nids[2] = {
364 0x24, 0x25,
365};
366
e035b841
MR		 367#define STAC92HD71BXX_NUM_DMICS 2
368static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
369 0x18, 0x19, 0
370};
371
0ffa9807
MR		 372static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
373 0x22, 0
374};
375
8e21c34c
TD		 376static hda_nid_t stac925x_adc_nids[1] = {
377 0x03,
378};
379
380static hda_nid_t stac925x_mux_nids[1] = {
381 0x0f,
382};
383
384static hda_nid_t stac925x_dac_nids[1] = {
385 0x02,
386};
387
f6e9852a
TI		 388#define STAC925X_NUM_DMICS 1
389static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
390 0x15, 0
2c11f955
TD		 391};
392
1697055e
TI		 393static hda_nid_t stac925x_dmux_nids[1] = {
394 0x14,
395};
396
2f2f4251
M		 397static hda_nid_t stac922x_adc_nids[2] = {
398 0x06, 0x07,
399};
400
401static hda_nid_t stac922x_mux_nids[2] = {
402 0x12, 0x13,
403};
404
3cc08dc6
MP		 405static hda_nid_t stac927x_adc_nids[3] = {
406 0x07, 0x08, 0x09
407};
408
409static hda_nid_t stac927x_mux_nids[3] = {
410 0x15, 0x16, 0x17
411};
412
d9737751
MR		 413static hda_nid_t stac927x_smux_nids[1] = {
414 0x21,
415};
416
b76c850f
MR		 417static hda_nid_t stac927x_dac_nids[6] = {
418 0x02, 0x03, 0x04, 0x05, 0x06, 0
419};
420
e1f0d669
MR		 421static hda_nid_t stac927x_dmux_nids[1] = {
422 0x1b,
423};
424
7f16859a
MR		 425#define STAC927X_NUM_DMICS 2
426static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
427 0x13, 0x14, 0
428};
429
65973632
MR		 430static const char *stac927x_spdif_labels[5] = {
431 "Digital Playback", "ADAT", "Analog Mux 1",
432 "Analog Mux 2", "Analog Mux 3"
433};
434
f3302a59
MP		 435static hda_nid_t stac9205_adc_nids[2] = {
436 0x12, 0x13
437};
438
439static hda_nid_t stac9205_mux_nids[2] = {
440 0x19, 0x1a
441};
442
e1f0d669 443static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 444 0x1d,
e1f0d669
MR		 445};
446
d9737751
MR		 447static hda_nid_t stac9205_smux_nids[1] = {
448 0x21,
449};
450
f6e9852a
TI		 451#define STAC9205_NUM_DMICS 2
452static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
453 0x17, 0x18, 0
8b65727b
MP		 454};
455
c7d4b2fa 456static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 457 0x08, 0x09, 0x0d, 0x0e,
458 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 459};
460
8e21c34c
TD		 461static hda_nid_t stac925x_pin_nids[8] = {
462 0x07, 0x08, 0x0a, 0x0b,
463 0x0c, 0x0d, 0x10, 0x11,
464};
465
2f2f4251
M		 466static hda_nid_t stac922x_pin_nids[10] = {
467 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
468 0x0f, 0x10, 0x11, 0x15, 0x1b,
469};
470
a7662640 471static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 472 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
473 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 474 0x14, 0x22, 0x23
e1f0d669
MR		 475};
476
d0513fc6
MR		 477static hda_nid_t stac92hd83xxx_pin_nids[14] = {
478 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
479 0x0f, 0x10, 0x11, 0x12, 0x13,
480 0x1d, 0x1e, 0x1f, 0x20
481};
0ffa9807 482static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 483 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
484 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 485 0x1f,
e035b841
MR		 486};
487
3cc08dc6
MP		 488static hda_nid_t stac927x_pin_nids[14] = {
489 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
490 0x0f, 0x10, 0x11, 0x12, 0x13,
491 0x14, 0x21, 0x22, 0x23,
492};
493
f3302a59
MP		 494static hda_nid_t stac9205_pin_nids[12] = {
495 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
496 0x0f, 0x14, 0x16, 0x17, 0x18,
497 0x21, 0x22,
f3302a59
MP		 498};
499
89385035
MR		 500#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
501
502static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
503 struct snd_ctl_elem_value *ucontrol)
504{
505 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
506 struct sigmatel_spec *spec = codec->spec;
507 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
508
509 kcontrol->private_value ^= get_amp_nid(kcontrol);
510 kcontrol->private_value |= nid;
511
512 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
513}
514
515static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
516 struct snd_ctl_elem_value *ucontrol)
517{
518 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
519 struct sigmatel_spec *spec = codec->spec;
520 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
521
522 kcontrol->private_value ^= get_amp_nid(kcontrol);
523 kcontrol->private_value |= nid;
524
525 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
526}
527
8b65727b
MP		 528static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
529 struct snd_ctl_elem_info *uinfo)
530{
531 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
532 struct sigmatel_spec *spec = codec->spec;
533 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
534}
535
536static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
537 struct snd_ctl_elem_value *ucontrol)
538{
539 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
540 struct sigmatel_spec *spec = codec->spec;
e1f0d669 541 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 542
e1f0d669 543 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 544 return 0;
545}
546
547static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
548 struct snd_ctl_elem_value *ucontrol)
549{
550 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
551 struct sigmatel_spec *spec = codec->spec;
e1f0d669 552 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 553
554 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 555 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 556}
557
d9737751
MR		 558static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
559 struct snd_ctl_elem_info *uinfo)
560{
561 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
562 struct sigmatel_spec *spec = codec->spec;
563 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
564}
565
566static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
567 struct snd_ctl_elem_value *ucontrol)
568{
569 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
570 struct sigmatel_spec *spec = codec->spec;
571 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
572
573 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
574 return 0;
575}
576
577static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
578 struct snd_ctl_elem_value *ucontrol)
579{
580 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
581 struct sigmatel_spec *spec = codec->spec;
00ef50c2 582 struct hda_input_mux *smux = &spec->private_smux;
d9737751 583 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 584 int err, val;
585 hda_nid_t nid;
d9737751 586
00ef50c2 587 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 588 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 589 if (err < 0)
590 return err;
591
592 if (spec->spdif_mute) {
593 if (smux_idx == 0)
594 nid = spec->multiout.dig_out_nid;
595 else
596 nid = codec->slave_dig_outs[smux_idx - 1];
597 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 598 val = HDA_AMP_MUTE;
00ef50c2 599 else
c9b46f91 600 val = 0;
00ef50c2 601 /* un/mute SPDIF out */
c9b46f91
TI		 602 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
603 HDA_AMP_MUTE, val);
00ef50c2
MR		 604 }
605 return 0;
d9737751
MR		 606}
607
c8b6bf9b 608static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 609{
610 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
611 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 612 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 613}
614
c8b6bf9b 615static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 616{
617 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
618 struct sigmatel_spec *spec = codec->spec;
619 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
620
621 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
622 return 0;
623}
624
c8b6bf9b 625static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 626{
627 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
628 struct sigmatel_spec *spec = codec->spec;
629 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
630
c7d4b2fa 631 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 632 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
633}
634
b22b4821
MR		 635static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
636 struct snd_ctl_elem_info *uinfo)
637{
638 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
639 struct sigmatel_spec *spec = codec->spec;
640 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
641}
642
643static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
644 struct snd_ctl_elem_value *ucontrol)
645{
646 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
647 struct sigmatel_spec *spec = codec->spec;
648
649 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
650 return 0;
651}
652
653static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
654 struct snd_ctl_elem_value *ucontrol)
655{
656 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
657 struct sigmatel_spec *spec = codec->spec;
658
659 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
660 spec->mono_nid, &spec->cur_mmux);
661}
662
89385035
MR		 663static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
664 struct snd_ctl_elem_info *uinfo)
665{
666 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
667 struct sigmatel_spec *spec = codec->spec;
668 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
669}
670
671static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
672 struct snd_ctl_elem_value *ucontrol)
673{
674 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
675 struct sigmatel_spec *spec = codec->spec;
676
677 ucontrol->value.enumerated.item[0] = spec->cur_amux;
678 return 0;
679}
680
681static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
682 struct snd_ctl_elem_value *ucontrol)
683{
684 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
685 struct sigmatel_spec *spec = codec->spec;
686 struct snd_kcontrol *ctl =
687 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
688 if (!ctl)
689 return -EINVAL;
690
691 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
692 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
693
694 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
695 0, &spec->cur_amux);
696}
697
5f10c4a9
ML		 698#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
699
700static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
701 struct snd_ctl_elem_value *ucontrol)
702{
703 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 704 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 705 struct sigmatel_spec *spec = codec->spec;
706
e1f0d669
MR		 707 ucontrol->value.integer.value[0] = !!(spec->aloopback &
708 (spec->aloopback_mask << idx));
5f10c4a9
ML		 709 return 0;
710}
711
712static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
713 struct snd_ctl_elem_value *ucontrol)
714{
715 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
716 struct sigmatel_spec *spec = codec->spec;
e1f0d669 717 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 718 unsigned int dac_mode;
e1f0d669 719 unsigned int val, idx_val;
5f10c4a9 720
e1f0d669
MR		 721 idx_val = spec->aloopback_mask << idx;
722 if (ucontrol->value.integer.value[0])
723 val = spec->aloopback | idx_val;
724 else
725 val = spec->aloopback & ~idx_val;
68ea7b2f 726 if (spec->aloopback == val)
5f10c4a9
ML		 727 return 0;
728
68ea7b2f 729 spec->aloopback = val;
5f10c4a9 730
e1f0d669
MR		 731 /* Only return the bits defined by the shift value of the
732 * first two bytes of the mask
733 */
5f10c4a9 734 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 735 kcontrol->private_value & 0xFFFF, 0x0);
736 dac_mode >>= spec->aloopback_shift;
5f10c4a9 737
e1f0d669 738 if (spec->aloopback & idx_val) {
5f10c4a9 739 snd_hda_power_up(codec);
e1f0d669 740 dac_mode |= idx_val;
5f10c4a9
ML		 741 } else {
742 snd_hda_power_down(codec);
e1f0d669 743 dac_mode &= ~idx_val;
5f10c4a9
ML		 744 }
745
746 snd_hda_codec_write_cache(codec, codec->afg, 0,
747 kcontrol->private_value >> 16, dac_mode);
748
749 return 1;
750}
751
c7d4b2fa 752static struct hda_verb stac9200_core_init[] = {
2f2f4251 753 /* set dac0mux for dac converter */
c7d4b2fa 754 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 755 {}
756};
757
1194b5b7
TI		 758static struct hda_verb stac9200_eapd_init[] = {
759 /* set dac0mux for dac converter */
760 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
761 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
762 {}
763};
764
e1f0d669
MR		 765static struct hda_verb stac92hd73xx_6ch_core_init[] = {
766 /* set master volume and direct control */
767 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 768 /* setup adcs to point to mixer */
769 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
770 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 771 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
772 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
773 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
774 /* setup import muxs */
775 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
776 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
777 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
778 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
779 {}
780};
781
d654a660
MR		 782static struct hda_verb dell_eq_core_init[] = {
783 /* set master volume to max value without distortion
784 * and direct control */
785 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR		 786 /* setup adcs to point to mixer */
787 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
788 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
789 /* setup import muxs */
790 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
791 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
792 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
793 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
794 {}
795};
796
52fe0f9d 797static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 798 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR		 799 /* setup adcs to point to mixer */
800 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
801 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
802 /* setup import muxs */
803 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
804 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
805 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
806 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
807 {}
808};
809
e1f0d669
MR		 810static struct hda_verb stac92hd73xx_8ch_core_init[] = {
811 /* set master volume and direct control */
812 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 813 /* setup adcs to point to mixer */
814 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
815 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 816 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
817 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
818 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
819 /* setup import muxs */
820 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
821 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
822 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
823 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
824 {}
825};
826
827static struct hda_verb stac92hd73xx_10ch_core_init[] = {
828 /* set master volume and direct control */
829 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 830 /* dac3 is connected to import3 mux */
831 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR		 832 /* setup adcs to point to mixer */
833 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
834 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 835 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
836 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
837 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
838 /* setup import muxs */
839 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
840 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
841 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
842 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
843 {}
844};
845
d0513fc6 846static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 847 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
848 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
849 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
850
851 /* power state controls amps */
852 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 853 {}
d0513fc6
MR		 854};
855
e035b841 856static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 857 /* set master volume and direct control */
858 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
541eee87
MR		 859 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
860 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
861 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
862 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
574f3c4f 863 {}
541eee87
MR		 864};
865
4b33c767 866#define HD_DISABLE_PORTF 2
541eee87 867static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 868 /* start of config #1 */
869
870 /* connect port 0f to audio mixer */
871 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 872 /* unmute right and left channels for node 0x0f */
873 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
874 /* start of config #2 */
875
e035b841
MR		 876 /* set master volume and direct control */
877 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
aafc4412 878 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 879 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
880 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 881 {}
882};
883
8e21c34c
TD		 884static struct hda_verb stac925x_core_init[] = {
885 /* set dac0mux for dac converter */
886 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 887 /* mute the master volume */
888 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 889 {}
890};
891
c7d4b2fa 892static struct hda_verb stac922x_core_init[] = {
2f2f4251 893 /* set master volume and direct control */
c7d4b2fa 894 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 895 {}
896};
897
93ed1503 898static struct hda_verb d965_core_init[] = {
19039bd0 899 /* set master volume and direct control */
93ed1503 900 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 901 /* unmute node 0x1b */
902 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
903 /* select node 0x03 as DAC */
904 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
905 {}
906};
907
3cc08dc6
MP		 908static struct hda_verb stac927x_core_init[] = {
909 /* set master volume and direct control */
910 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 911 /* enable analog pc beep path */
912 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 913 {}
914};
915
f3302a59
MP		 916static struct hda_verb stac9205_core_init[] = {
917 /* set master volume and direct control */
918 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 919 /* enable analog pc beep path */
920 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 921 {}
922};
923
b22b4821
MR		 924#define STAC_MONO_MUX \
925 { \
926 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
927 .name = "Mono Mux", \
928 .count = 1, \
929 .info = stac92xx_mono_mux_enum_info, \
930 .get = stac92xx_mono_mux_enum_get, \
931 .put = stac92xx_mono_mux_enum_put, \
932 }
933
89385035
MR		 934#define STAC_AMP_MUX \
935 { \
936 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
937 .name = "Amp Selector Capture Switch", \
938 .count = 1, \
939 .info = stac92xx_amp_mux_enum_info, \
940 .get = stac92xx_amp_mux_enum_get, \
941 .put = stac92xx_amp_mux_enum_put, \
942 }
943
944#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
945 { \
946 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
947 .name = xname, \
948 .index = 0, \
949 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
950 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
951 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
952 .info = stac92xx_amp_volume_info, \
953 .get = stac92xx_amp_volume_get, \
954 .put = stac92xx_amp_volume_put, \
955 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
956 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
957 }
958
9e05b7a3 959#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 960 { \
961 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
962 .name = "Input Source", \
9e05b7a3 963 .count = cnt, \
ca7c5a8b
ML		 964 .info = stac92xx_mux_enum_info, \
965 .get = stac92xx_mux_enum_get, \
966 .put = stac92xx_mux_enum_put, \
967 }
968
e1f0d669 969#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 970 { \
971 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
972 .name = "Analog Loopback", \
e1f0d669 973 .count = cnt, \
5f10c4a9
ML		 974 .info = stac92xx_aloopback_info, \
975 .get = stac92xx_aloopback_get, \
976 .put = stac92xx_aloopback_put, \
977 .private_value = verb_read | (verb_write << 16), \
978 }
979
c8b6bf9b 980static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 981 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
982 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 983 STAC_INPUT_SOURCE(1),
2f2f4251
M		 984 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
985 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 986 { } /* end */
987};
988
2a9c7816 989#define DELL_M6_MIXER 6
e1f0d669 990static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 991 /* start of config #1 */
e1f0d669
MR		 992 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
993 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
994
e1f0d669
MR		 995 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
996 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
997
2a9c7816
MR		 998 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
999 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1000
1001 /* start of config #2 */
1002 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1003 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1004
e1f0d669
MR		 1005 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1006 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1007
2a9c7816
MR		 1008 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1009
1010 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1011 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1012
1013 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1014 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1015
e1f0d669
MR		 1016 { } /* end */
1017};
1018
1019static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1020 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1021
e1f0d669
MR		 1022 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1023 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1024
1025 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1026 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1027
1028 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1029 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1030
1031 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1032 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1033
1034 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1035 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1036
1037 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1038 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1039
1040 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1041 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1042 { } /* end */
1043};
1044
1045static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1046 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1047
e1f0d669
MR		 1048 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1049 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1050
1051 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1052 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1053
1054 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1055 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1056
1057 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1058 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1059
1060 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1061 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1062
1063 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1064 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1065
1066 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1067 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1068 { } /* end */
1069};
1070
d0513fc6
MR		 1071
1072static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1073 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1074 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1075
1076 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1077 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1078
74b7ff48
MR		 1079 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT),
1080 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT),
d0513fc6 1081
74b7ff48
MR		 1082 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT),
1083 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT),
d0513fc6 1084
74b7ff48
MR		 1085 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT),
1086 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT),
d0513fc6 1087
74b7ff48
MR		 1088 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT),
1089 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT),
d0513fc6
MR		 1090
1091 /*
74b7ff48
MR		 1092 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT),
1093 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT),
d0513fc6
MR		 1094 */
1095 { } /* end */
1096};
1097
541eee87 1098static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1099 STAC_INPUT_SOURCE(2),
4b33c767 1100 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1101
9b35947f
MR		 1102 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1103 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1104
1105 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1106 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1107 /* analog pc-beep replaced with digital beep support */
1108 /*
f7c5dda2
MR		 1109 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1110 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1111 */
f7c5dda2 1112
687cb98e
MR		 1113 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1114 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1115
687cb98e
MR		 1116 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1117 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1118
1119 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1120 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1121
1122 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1123 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1124 { } /* end */
1125};
1126
541eee87 1127static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1128 STAC_INPUT_SOURCE(2),
1129 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1130
541eee87
MR		 1131 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1132 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1133
1134 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1135 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1136 { } /* end */
1137};
1138
8e21c34c 1139static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI		 1140 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
1141 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
9e05b7a3 1142 STAC_INPUT_SOURCE(1),
8e21c34c 1143 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1144 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1145 { } /* end */
1146};
1147
9e05b7a3 1148static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1149 STAC_INPUT_SOURCE(2),
e1f0d669 1150 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1151
1152 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1153 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1154
1155 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1156 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1157 { } /* end */
1158};
1159
19039bd0 1160/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1161static struct snd_kcontrol_new stac922x_mixer[] = {
1162 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1163 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1164 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1165
1166 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1167 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1168 { } /* end */
1169};
1170
9e05b7a3 1171
d1d985f0 1172static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1173 STAC_INPUT_SOURCE(3),
e1f0d669 1174 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1175
9e05b7a3
ML		 1176 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1177 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1178
1179 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1180 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1181
1182 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1183 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1184 { } /* end */
1185};
1186
1697055e
TI		 1187static struct snd_kcontrol_new stac_dmux_mixer = {
1188 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1189 .name = "Digital Input Source",
1190 /* count set later */
1191 .info = stac92xx_dmux_enum_info,
1192 .get = stac92xx_dmux_enum_get,
1193 .put = stac92xx_dmux_enum_put,
1194};
1195
d9737751
MR		 1196static struct snd_kcontrol_new stac_smux_mixer = {
1197 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1198 .name = "IEC958 Playback Source",
d9737751
MR		 1199 /* count set later */
1200 .info = stac92xx_smux_enum_info,
1201 .get = stac92xx_smux_enum_get,
1202 .put = stac92xx_smux_enum_put,
1203};
1204
2134ea4f
TI		 1205static const char *slave_vols[] = {
1206 "Front Playback Volume",
1207 "Surround Playback Volume",
1208 "Center Playback Volume",
1209 "LFE Playback Volume",
1210 "Side Playback Volume",
1211 "Headphone Playback Volume",
1212 "Headphone Playback Volume",
1213 "Speaker Playback Volume",
1214 "External Speaker Playback Volume",
1215 "Speaker2 Playback Volume",
1216 NULL
1217};
1218
1219static const char *slave_sws[] = {
1220 "Front Playback Switch",
1221 "Surround Playback Switch",
1222 "Center Playback Switch",
1223 "LFE Playback Switch",
1224 "Side Playback Switch",
1225 "Headphone Playback Switch",
1226 "Headphone Playback Switch",
1227 "Speaker Playback Switch",
1228 "External Speaker Playback Switch",
1229 "Speaker2 Playback Switch",
edb54a55 1230 "IEC958 Playback Switch",
2134ea4f
TI		 1231 NULL
1232};
1233
603c4019 1234static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1235static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1236
2f2f4251
M		 1237static int stac92xx_build_controls(struct hda_codec *codec)
1238{
1239 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1240 struct auto_pin_cfg *cfg = &spec->autocfg;
1241 hda_nid_t nid;
2f2f4251 1242 int err;
c7d4b2fa 1243 int i;
2f2f4251
M		 1244
1245 err = snd_hda_add_new_ctls(codec, spec->mixer);
1246 if (err < 0)
1247 return err;
c7d4b2fa
M		 1248
1249 for (i = 0; i < spec->num_mixers; i++) {
1250 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1251 if (err < 0)
1252 return err;
1253 }
1697055e
TI		 1254 if (spec->num_dmuxes > 0) {
1255 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1256 err = snd_hda_ctl_add(codec,
1697055e
TI		 1257 snd_ctl_new1(&stac_dmux_mixer, codec));
1258 if (err < 0)
1259 return err;
1260 }
d9737751 1261 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1262 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1263 struct hda_input_mux *smux = &spec->private_smux;
1264 /* check for mute support on SPDIF out */
1265 if (wcaps & AC_WCAP_OUT_AMP) {
1266 smux->items[smux->num_items].label = "Off";
1267 smux->items[smux->num_items].index = 0;
1268 smux->num_items++;
1269 spec->spdif_mute = 1;
1270 }
d9737751 1271 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1272 err = snd_hda_ctl_add(codec,
d9737751
MR		 1273 snd_ctl_new1(&stac_smux_mixer, codec));
1274 if (err < 0)
1275 return err;
1276 }
c7d4b2fa 1277
dabbed6f
M		 1278 if (spec->multiout.dig_out_nid) {
1279 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1280 if (err < 0)
1281 return err;
9a08160b
TI		 1282 err = snd_hda_create_spdif_share_sw(codec,
1283 &spec->multiout);
1284 if (err < 0)
1285 return err;
1286 spec->multiout.share_spdif = 1;
dabbed6f 1287 }
da74ae3e 1288 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1289 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1290 if (err < 0)
1291 return err;
1292 }
2134ea4f
TI		 1293
1294 /* if we have no master control, let's create it */
1295 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1296 unsigned int vmaster_tlv[4];
2134ea4f 1297 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1298 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI		 1299 /* correct volume offset */
1300 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
2134ea4f 1301 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1302 vmaster_tlv, slave_vols);
2134ea4f
TI		 1303 if (err < 0)
1304 return err;
1305 }
1306 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1307 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1308 NULL, slave_sws);
1309 if (err < 0)
1310 return err;
1311 }
1312
603c4019 1313 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1314
1315 /* create jack input elements */
1316 if (spec->hp_detect) {
1317 for (i = 0; i < cfg->hp_outs; i++) {
1318 int type = SND_JACK_HEADPHONE;
1319 nid = cfg->hp_pins[i];
1320 /* jack detection */
1321 if (cfg->hp_outs == i)
1322 type |= SND_JACK_LINEOUT;
1323 err = stac92xx_add_jack(codec, nid, type);
1324 if (err < 0)
1325 return err;
1326 }
1327 }
1328 for (i = 0; i < cfg->line_outs; i++) {
1329 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1330 SND_JACK_LINEOUT);
1331 if (err < 0)
1332 return err;
1333 }
1334 for (i = 0; i < AUTO_PIN_LAST; i++) {
1335 nid = cfg->input_pins[i];
1336 if (nid) {
1337 err = stac92xx_add_jack(codec, nid,
1338 SND_JACK_MICROPHONE);
1339 if (err < 0)
1340 return err;
1341 }
1342 }
1343
dabbed6f 1344 return 0;
2f2f4251
M		 1345}
1346
403d1944 1347static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1348 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1349 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1350};
1351
58eec423
MCC		 1352static unsigned int gateway9200_m4_pin_configs[8] = {
1353 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1354 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1355};
1356static unsigned int gateway9200_m4_2_pin_configs[8] = {
1357 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1358 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1359};
1360
1361/*
dfe495d0
TI		 1362 STAC 9200 pin configs for
1363 102801A8
1364 102801DE
1365 102801E8
1366*/
1367static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1368 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1369 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1370};
1371
1372/*
1373 STAC 9200 pin configs for
1374 102801C0
1375 102801C1
1376*/
1377static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1378 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1379 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1380};
1381
1382/*
1383 STAC 9200 pin configs for
1384 102801C4 (Dell Dimension E310)
1385 102801C5
1386 102801C7
1387 102801D9
1388 102801DA
1389 102801E3
1390*/
1391static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1392 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1393 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1394};
1395
1396
1397/*
1398 STAC 9200-32 pin configs for
1399 102801B5 (Dell Inspiron 630m)
1400 102801D8 (Dell Inspiron 640m)
1401*/
1402static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1403 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1404 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1405};
1406
1407/*
1408 STAC 9200-32 pin configs for
1409 102801C2 (Dell Latitude D620)
1410 102801C8
1411 102801CC (Dell Latitude D820)
1412 102801D4
1413 102801D6
1414*/
1415static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1416 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1417 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1418};
1419
1420/*
1421 STAC 9200-32 pin configs for
1422 102801CE (Dell XPS M1710)
1423 102801CF (Dell Precision M90)
1424*/
1425static unsigned int dell9200_m23_pin_configs[8] = {
1426 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1427 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1428};
1429
1430/*
1431 STAC 9200-32 pin configs for
1432 102801C9
1433 102801CA
1434 102801CB (Dell Latitude 120L)
1435 102801D3
1436*/
1437static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1438 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1439 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1440};
1441
1442/*
1443 STAC 9200-32 pin configs for
1444 102801BD (Dell Inspiron E1505n)
1445 102801EE
1446 102801EF
1447*/
1448static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1449 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1450 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1451};
1452
1453/*
1454 STAC 9200-32 pin configs for
1455 102801F5 (Dell Inspiron 1501)
1456 102801F6
1457*/
1458static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1459 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1460 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1461};
1462
1463/*
1464 STAC 9200-32
1465 102801CD (Dell Inspiron E1705/9400)
1466*/
1467static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1468 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1469 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1470};
1471
bf277785
TD		 1472static unsigned int oqo9200_pin_configs[8] = {
1473 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1474 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1475};
1476
dfe495d0 1477
f5fcc13c
TI		 1478static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1479 [STAC_REF] = ref9200_pin_configs,
bf277785 1480 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1481 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1482 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1483 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1484 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1485 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1486 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1487 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1488 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1489 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1490 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1491 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1492 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1493 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1494};
1495
f5fcc13c
TI		 1496static const char *stac9200_models[STAC_9200_MODELS] = {
1497 [STAC_REF] = "ref",
bf277785 1498 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1499 [STAC_9200_DELL_D21] = "dell-d21",
1500 [STAC_9200_DELL_D22] = "dell-d22",
1501 [STAC_9200_DELL_D23] = "dell-d23",
1502 [STAC_9200_DELL_M21] = "dell-m21",
1503 [STAC_9200_DELL_M22] = "dell-m22",
1504 [STAC_9200_DELL_M23] = "dell-m23",
1505 [STAC_9200_DELL_M24] = "dell-m24",
1506 [STAC_9200_DELL_M25] = "dell-m25",
1507 [STAC_9200_DELL_M26] = "dell-m26",
1508 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1509 [STAC_9200_M4] = "gateway-m4",
1510 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1511 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1512};
1513
1514static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1515 /* SigmaTel reference board */
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1517 "DFI LanParty", STAC_REF),
e7377071 1518 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1520 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1522 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1524 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1526 "unknown Dell", STAC_9200_DELL_D22),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1528 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1530 "Dell Latitude D620", STAC_9200_DELL_M22),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1532 "unknown Dell", STAC_9200_DELL_D23),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1534 "unknown Dell", STAC_9200_DELL_D23),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1536 "unknown Dell", STAC_9200_DELL_M22),
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1538 "unknown Dell", STAC_9200_DELL_M24),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1540 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1542 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1544 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1546 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1548 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1550 "Dell Precision M90", STAC_9200_DELL_M23),
1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1552 "unknown Dell", STAC_9200_DELL_M22),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1554 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1556 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1558 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1560 "unknown Dell", STAC_9200_DELL_D23),
1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1562 "unknown Dell", STAC_9200_DELL_D23),
1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1564 "unknown Dell", STAC_9200_DELL_D21),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1566 "unknown Dell", STAC_9200_DELL_D23),
1567 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1568 "unknown Dell", STAC_9200_DELL_D21),
1569 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1570 "unknown Dell", STAC_9200_DELL_M25),
1571 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1572 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1573 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1574 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1575 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1576 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1577 /* Panasonic */
117f257d 1578 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1579 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1580 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1581 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1582 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1583 /* OQO Mobile */
1584 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1585 {} /* terminator */
1586};
1587
8e21c34c
TD		 1588static unsigned int ref925x_pin_configs[8] = {
1589 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1590 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1591};
1592
9cb36c2a
MCC		 1593static unsigned int stac925xM1_pin_configs[8] = {
1594 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1595 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1596};
1597
9cb36c2a
MCC		 1598static unsigned int stac925xM1_2_pin_configs[8] = {
1599 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1600 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1601};
58eec423 1602
9cb36c2a
MCC		 1603static unsigned int stac925xM2_pin_configs[8] = {
1604 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1605 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1606};
1607
8e21c34c 1608static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1609 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1610 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1611};
1612
9cb36c2a
MCC		 1613static unsigned int stac925xM3_pin_configs[8] = {
1614 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1615 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1616};
58eec423 1617
9cb36c2a
MCC		 1618static unsigned int stac925xM5_pin_configs[8] = {
1619 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1620 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1621};
1622
9cb36c2a
MCC		 1623static unsigned int stac925xM6_pin_configs[8] = {
1624 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1625 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1626};
1627
1628static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1629 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1630 [STAC_M1] = stac925xM1_pin_configs,
1631 [STAC_M1_2] = stac925xM1_2_pin_configs,
1632 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1633 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1634 [STAC_M3] = stac925xM3_pin_configs,
1635 [STAC_M5] = stac925xM5_pin_configs,
1636 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1637};
1638
1639static const char *stac925x_models[STAC_925x_MODELS] = {
1640 [STAC_REF] = "ref",
9cb36c2a
MCC		 1641 [STAC_M1] = "m1",
1642 [STAC_M1_2] = "m1-2",
1643 [STAC_M2] = "m2",
8e21c34c 1644 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1645 [STAC_M3] = "m3",
1646 [STAC_M5] = "m5",
1647 [STAC_M6] = "m6",
8e21c34c
TD		 1648};
1649
9cb36c2a 1650static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1651 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1652 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1653 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1654 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1655 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1656 /* Not sure about the brand name for those */
1657 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1658 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1659 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1660 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1661 {} /* terminator */
8e21c34c
TD		 1662};
1663
1664static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1665 /* SigmaTel reference board */
1666 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1667 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1668
1669 /* Default table for unknown ID */
1670 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1671
8e21c34c
TD		 1672 {} /* terminator */
1673};
1674
a7662640 1675static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1676 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1677 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1678 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1679 0x01452050,
1680};
1681
1682static unsigned int dell_m6_pin_configs[13] = {
1683 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1684 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1685 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1686 0x4f0000f0,
e1f0d669
MR		 1687};
1688
1689static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1690 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1691 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1692 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1693 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1694 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1695};
1696
1697static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1698 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1699 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI		 1700 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1701 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1702 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1703 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1704};
1705
1706static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1707 /* SigmaTel reference board */
1708 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1709 "DFI LanParty", STAC_92HD73XX_REF),
1710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1711 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1713 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1715 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1717 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1719 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1721 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1723 "unknown Dell", STAC_DELL_M6_DMIC),
1724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1725 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1726 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1727 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1728 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1729 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1730 {} /* terminator */
1731};
1732
d0513fc6
MR		 1733static unsigned int ref92hd83xxx_pin_configs[14] = {
1734 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1735 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1736 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1737 0x01451160, 0x98560170,
1738};
1739
1740static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1741 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1742};
1743
1744static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1745 [STAC_92HD83XXX_REF] = "ref",
1746};
1747
1748static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1749 /* SigmaTel reference board */
1750 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1751 "DFI LanParty", STAC_92HD83XXX_REF),
574f3c4f 1752 {} /* terminator */
d0513fc6
MR		 1753};
1754
0ffa9807 1755static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1756 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1757 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1758 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1759};
1760
0ffa9807 1761static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1762 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1763 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1764 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1765};
1766
0ffa9807 1767static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1768 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1769 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1770 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1771};
1772
3a7abfd2
MR		 1773static unsigned int dell_m4_3_pin_configs[11] = {
1774 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1775 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1776 0x40f000f0, 0x044413b0, 0x044413b0,
1777};
1778
e035b841
MR		 1779static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1780 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1781 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1782 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1783 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1784 [STAC_HP_M4] = NULL,
1b0652eb 1785 [STAC_HP_DV5] = NULL,
e035b841
MR		 1786};
1787
1788static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1789 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1790 [STAC_DELL_M4_1] = "dell-m4-1",
1791 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1792 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1793 [STAC_HP_M4] = "hp-m4",
1b0652eb 1794 [STAC_HP_DV5] = "hp-dv5",
e035b841
MR		 1795};
1796
1797static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1798 /* SigmaTel reference board */
1799 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1800 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1801 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1802 "HP dv5", STAC_HP_M4),
1803 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1804 "HP dv7", STAC_HP_M4),
69dfaefe
TI		 1805 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc,
1806 "HP dv7", STAC_HP_M4),
dafb70ce 1807 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603,
1b0652eb 1808 "HP dv5", STAC_HP_DV5),
9a9e2359
MR		 1809 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1810 "unknown HP", STAC_HP_M4),
a7662640
MR		 1811 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1812 "unknown Dell", STAC_DELL_M4_1),
1813 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1814 "unknown Dell", STAC_DELL_M4_1),
1815 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1816 "unknown Dell", STAC_DELL_M4_1),
1817 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1818 "unknown Dell", STAC_DELL_M4_1),
1819 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1820 "unknown Dell", STAC_DELL_M4_1),
1821 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1822 "unknown Dell", STAC_DELL_M4_1),
1823 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1824 "unknown Dell", STAC_DELL_M4_1),
1825 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1826 "unknown Dell", STAC_DELL_M4_2),
1827 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1828 "unknown Dell", STAC_DELL_M4_2),
1829 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1830 "unknown Dell", STAC_DELL_M4_2),
1831 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1832 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1833 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1834 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1835 {} /* terminator */
1836};
1837
403d1944
MP		 1838static unsigned int ref922x_pin_configs[10] = {
1839 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1840 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1841 0x40000100, 0x40000100,
1842};
1843
dfe495d0
TI		 1844/*
1845 STAC 922X pin configs for
1846 102801A7
1847 102801AB
1848 102801A9
1849 102801D1
1850 102801D2
1851*/
1852static unsigned int dell_922x_d81_pin_configs[10] = {
1853 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1854 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1855 0x01813122, 0x400001f2,
1856};
1857
1858/*
1859 STAC 922X pin configs for
1860 102801AC
1861 102801D0
1862*/
1863static unsigned int dell_922x_d82_pin_configs[10] = {
1864 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1865 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1866 0x01813122, 0x400001f1,
1867};
1868
1869/*
1870 STAC 922X pin configs for
1871 102801BF
1872*/
1873static unsigned int dell_922x_m81_pin_configs[10] = {
1874 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1875 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1876 0x40C003f1, 0x405003f0,
1877};
1878
1879/*
1880 STAC 9221 A1 pin configs for
1881 102801D7 (Dell XPS M1210)
1882*/
1883static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1884 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1885 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1886 0x508003f3, 0x405003f4,
1887};
1888
403d1944 1889static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1890 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1891 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1892 0x02a19120, 0x40000100,
1893};
1894
1895static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1896 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1897 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1898 0x02a19320, 0x40000100,
1899};
1900
5d5d3bc3
IZ		 1901static unsigned int intel_mac_v1_pin_configs[10] = {
1902 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1903 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1904 0x400000fc, 0x400000fb,
1905};
1906
1907static unsigned int intel_mac_v2_pin_configs[10] = {
1908 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1909 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1910 0x400000fc, 0x400000fb,
6f0778d8
NB		 1911};
1912
5d5d3bc3
IZ		 1913static unsigned int intel_mac_v3_pin_configs[10] = {
1914 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1915 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1916 0x400000fc, 0x400000fb,
1917};
1918
5d5d3bc3
IZ		 1919static unsigned int intel_mac_v4_pin_configs[10] = {
1920 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1921 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1922 0x400000fc, 0x400000fb,
1923};
1924
5d5d3bc3
IZ		 1925static unsigned int intel_mac_v5_pin_configs[10] = {
1926 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1927 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1928 0x400000fc, 0x400000fb,
0dae0f83
TI		 1929};
1930
8c650087
MCC		 1931static unsigned int ecs202_pin_configs[10] = {
1932 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1933 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1934 0x9037012e, 0x40e000f2,
1935};
76c08828 1936
19039bd0 1937static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1938 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1939 [STAC_D945GTP3] = d945gtp3_pin_configs,
1940 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1941 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1942 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1943 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1944 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1945 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1946 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1947 /* for backward compatibility */
5d5d3bc3
IZ		 1948 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1949 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1950 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1951 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1952 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1953 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1954 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1955 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1956 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1957 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1958 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1959};
1960
f5fcc13c
TI		 1961static const char *stac922x_models[STAC_922X_MODELS] = {
1962 [STAC_D945_REF] = "ref",
1963 [STAC_D945GTP5] = "5stack",
1964 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1965 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1966 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1967 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1968 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1969 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1970 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1971 /* for backward compatibility */
f5fcc13c 1972 [STAC_MACMINI] = "macmini",
3fc24d85 1973 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1974 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1975 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1976 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1977 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1978 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1979 [STAC_922X_DELL_D81] = "dell-d81",
1980 [STAC_922X_DELL_D82] = "dell-d82",
1981 [STAC_922X_DELL_M81] = "dell-m81",
1982 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1983};
1984
1985static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1986 /* SigmaTel reference board */
1987 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1988 "DFI LanParty", STAC_D945_REF),
1989 /* Intel 945G based systems */
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1991 "Intel D945G", STAC_D945GTP3),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1993 "Intel D945G", STAC_D945GTP3),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1995 "Intel D945G", STAC_D945GTP3),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1997 "Intel D945G", STAC_D945GTP3),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1999 "Intel D945G", STAC_D945GTP3),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2001 "Intel D945G", STAC_D945GTP3),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2003 "Intel D945G", STAC_D945GTP3),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2005 "Intel D945G", STAC_D945GTP3),
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2007 "Intel D945G", STAC_D945GTP3),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2009 "Intel D945G", STAC_D945GTP3),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2011 "Intel D945G", STAC_D945GTP3),
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2013 "Intel D945G", STAC_D945GTP3),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2015 "Intel D945G", STAC_D945GTP3),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2017 "Intel D945G", STAC_D945GTP3),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2019 "Intel D945G", STAC_D945GTP3),
2020 /* Intel D945G 5-stack systems */
2021 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2022 "Intel D945G", STAC_D945GTP5),
2023 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2024 "Intel D945G", STAC_D945GTP5),
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2026 "Intel D945G", STAC_D945GTP5),
2027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2028 "Intel D945G", STAC_D945GTP5),
2029 /* Intel 945P based systems */
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2031 "Intel D945P", STAC_D945GTP3),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2033 "Intel D945P", STAC_D945GTP3),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2035 "Intel D945P", STAC_D945GTP3),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2037 "Intel D945P", STAC_D945GTP3),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2039 "Intel D945P", STAC_D945GTP3),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2041 "Intel D945P", STAC_D945GTP5),
2042 /* other systems */
536319af 2043 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2044 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2045 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2046 /* Dell systems */
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2048 "unknown Dell", STAC_922X_DELL_D81),
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2050 "unknown Dell", STAC_922X_DELL_D81),
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2052 "unknown Dell", STAC_922X_DELL_D81),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2054 "unknown Dell", STAC_922X_DELL_D82),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2056 "unknown Dell", STAC_922X_DELL_M81),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2058 "unknown Dell", STAC_922X_DELL_D82),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2060 "unknown Dell", STAC_922X_DELL_D81),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2062 "unknown Dell", STAC_922X_DELL_D81),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2064 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 2065 /* ECS/PC Chips boards */
2066 SND_PCI_QUIRK(0x1019, 0x2144,
2067 "ECS/PC chips", STAC_ECS_202),
2068 SND_PCI_QUIRK(0x1019, 0x2608,
2069 "ECS/PC chips", STAC_ECS_202),
2070 SND_PCI_QUIRK(0x1019, 0x2633,
2071 "ECS/PC chips P17G/1333", STAC_ECS_202),
2072 SND_PCI_QUIRK(0x1019, 0x2811,
2073 "ECS/PC chips", STAC_ECS_202),
2074 SND_PCI_QUIRK(0x1019, 0x2812,
2075 "ECS/PC chips", STAC_ECS_202),
2076 SND_PCI_QUIRK(0x1019, 0x2813,
2077 "ECS/PC chips", STAC_ECS_202),
2078 SND_PCI_QUIRK(0x1019, 0x2814,
2079 "ECS/PC chips", STAC_ECS_202),
2080 SND_PCI_QUIRK(0x1019, 0x2815,
2081 "ECS/PC chips", STAC_ECS_202),
2082 SND_PCI_QUIRK(0x1019, 0x2816,
2083 "ECS/PC chips", STAC_ECS_202),
2084 SND_PCI_QUIRK(0x1019, 0x2817,
2085 "ECS/PC chips", STAC_ECS_202),
2086 SND_PCI_QUIRK(0x1019, 0x2818,
2087 "ECS/PC chips", STAC_ECS_202),
2088 SND_PCI_QUIRK(0x1019, 0x2819,
2089 "ECS/PC chips", STAC_ECS_202),
2090 SND_PCI_QUIRK(0x1019, 0x2820,
2091 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2092 {} /* terminator */
2093};
2094
3cc08dc6 2095static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2096 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2097 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2098 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2099 0x01c42190, 0x40000100,
3cc08dc6
MP		 2100};
2101
93ed1503 2102static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2103 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2104 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2105 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2106 0x40000100, 0x40000100
2107};
2108
93ed1503
TD		 2109static unsigned int d965_5st_pin_configs[14] = {
2110 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2111 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2112 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2113 0x40000100, 0x40000100
2114};
2115
4ff076e5
TD		 2116static unsigned int dell_3st_pin_configs[14] = {
2117 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2118 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2119 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2120 0x40c003fc, 0x40000100
2121};
2122
93ed1503 2123static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2124 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2125 [STAC_D965_REF] = ref927x_pin_configs,
2126 [STAC_D965_3ST] = d965_3st_pin_configs,
2127 [STAC_D965_5ST] = d965_5st_pin_configs,
2128 [STAC_DELL_3ST] = dell_3st_pin_configs,
2129 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2130};
2131
f5fcc13c 2132static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2133 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2134 [STAC_D965_REF] = "ref",
2135 [STAC_D965_3ST] = "3stack",
2136 [STAC_D965_5ST] = "5stack",
2137 [STAC_DELL_3ST] = "dell-3stack",
2138 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2139};
2140
2141static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2142 /* SigmaTel reference board */
2143 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2144 "DFI LanParty", STAC_D965_REF),
81d3dbde 2145 /* Intel 946 based systems */
f5fcc13c
TI		 2146 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2147 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2148 /* 965 based 3 stack systems */
f5fcc13c
TI		 2149 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2150 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2151 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2152 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2153 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2154 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2155 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2157 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2158 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2159 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2160 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2161 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2163 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2164 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2165 /* Dell 3 stack systems */
8e9068b1 2166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2167 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2170 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2179 /* 965 based 5 stack systems */
f5fcc13c
TI		 2180 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2181 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2182 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2183 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2184 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2185 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2186 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2187 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2188 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2189 {} /* terminator */
2190};
2191
f3302a59
MP		 2192static unsigned int ref9205_pin_configs[12] = {
2193 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2194 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2195 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2196};
2197
dfe495d0
TI		 2198/*
2199 STAC 9205 pin configs for
2200 102801F1
2201 102801F2
2202 102801FC
2203 102801FD
2204 10280204
2205 1028021F
3fa2ef74 2206 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2207*/
2208static unsigned int dell_9205_m42_pin_configs[12] = {
2209 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2210 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2211 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2212};
2213
2214/*
2215 STAC 9205 pin configs for
2216 102801F9
2217 102801FA
2218 102801FE
2219 102801FF (Dell Precision M4300)
2220 10280206
2221 10280200
2222 10280201
2223*/
2224static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2225 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2226 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2227 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2228};
2229
dfe495d0 2230static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2231 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2232 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2233 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2234};
2235
f5fcc13c 2236static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2237 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2238 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2239 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2240 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2241};
2242
f5fcc13c
TI		 2243static const char *stac9205_models[STAC_9205_MODELS] = {
2244 [STAC_9205_REF] = "ref",
dfe495d0 2245 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2246 [STAC_9205_DELL_M43] = "dell-m43",
2247 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2248};
2249
2250static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2251 /* SigmaTel reference board */
2252 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2253 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2254 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2255 "unknown Dell", STAC_9205_DELL_M42),
2256 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2257 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2258 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2259 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2260 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2261 "Dell Precision", STAC_9205_DELL_M43),
2262 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2263 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2264 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2265 "unknown Dell", STAC_9205_DELL_M42),
2266 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2267 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2268 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2269 "Dell Precision", STAC_9205_DELL_M43),
2270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2271 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2273 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2275 "Dell Precision", STAC_9205_DELL_M43),
2276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2277 "Dell Precision", STAC_9205_DELL_M43),
2278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2279 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2281 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2283 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2284 {} /* terminator */
2285};
2286
11b44bbd
RF		 2287static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2288{
2289 int i;
2290 struct sigmatel_spec *spec = codec->spec;
2291
af9f341a
TI		 2292 kfree(spec->pin_configs);
2293 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2294 GFP_KERNEL);
2295 if (!spec->pin_configs)
2296 return -ENOMEM;
11b44bbd
RF		 2297
2298 for (i = 0; i < spec->num_pins; i++) {
2299 hda_nid_t nid = spec->pin_nids[i];
2300 unsigned int pin_cfg;
2301
2302 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2303 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2304 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2305 nid, pin_cfg);
af9f341a 2306 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF		 2307 }
2308
2309 return 0;
2310}
2311
87d48363
MR		 2312static void stac92xx_set_config_reg(struct hda_codec *codec,
2313 hda_nid_t pin_nid, unsigned int pin_config)
2314{
2315 int i;
2316 snd_hda_codec_write(codec, pin_nid, 0,
2317 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2318 pin_config & 0x000000ff);
2319 snd_hda_codec_write(codec, pin_nid, 0,
2320 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2321 (pin_config & 0x0000ff00) >> 8);
2322 snd_hda_codec_write(codec, pin_nid, 0,
2323 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2324 (pin_config & 0x00ff0000) >> 16);
2325 snd_hda_codec_write(codec, pin_nid, 0,
2326 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2327 pin_config >> 24);
2328 i = snd_hda_codec_read(codec, pin_nid, 0,
2329 AC_VERB_GET_CONFIG_DEFAULT,
2330 0x00);
2331 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2332 pin_nid, i);
2333}
2334
2f2f4251
M		 2335static void stac92xx_set_config_regs(struct hda_codec *codec)
2336{
2337 int i;
2338 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2339
87d48363
MR		 2340 if (!spec->pin_configs)
2341 return;
11b44bbd 2342
87d48363
MR		 2343 for (i = 0; i < spec->num_pins; i++)
2344 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2345 spec->pin_configs[i]);
2f2f4251 2346}
2f2f4251 2347
af9f341a
TI		 2348static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2349{
2350 struct sigmatel_spec *spec = codec->spec;
2351
2352 if (!pins)
2353 return stac92xx_save_bios_config_regs(codec);
2354
2355 kfree(spec->pin_configs);
2356 spec->pin_configs = kmemdup(pins,
2357 spec->num_pins * sizeof(*pins),
2358 GFP_KERNEL);
2359 if (!spec->pin_configs)
2360 return -ENOMEM;
2361
2362 stac92xx_set_config_regs(codec);
2363 return 0;
2364}
2365
2366static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2367 unsigned int cfg)
2368{
2369 struct sigmatel_spec *spec = codec->spec;
2370 int i;
2371
2372 for (i = 0; i < spec->num_pins; i++) {
2373 if (spec->pin_nids[i] == nid) {
2374 spec->pin_configs[i] = cfg;
2375 stac92xx_set_config_reg(codec, nid, cfg);
2376 break;
2377 }
2378 }
2379}
2380
dabbed6f 2381/*
c7d4b2fa 2382 * Analog playback callbacks
dabbed6f 2383 */
c7d4b2fa
M		 2384static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2385 struct hda_codec *codec,
c8b6bf9b 2386 struct snd_pcm_substream *substream)
2f2f4251 2387{
dabbed6f 2388 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2389 if (spec->stream_delay)
2390 msleep(spec->stream_delay);
9a08160b
TI		 2391 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2392 hinfo);
2f2f4251
M		 2393}
2394
2f2f4251
M		 2395static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2396 struct hda_codec *codec,
2397 unsigned int stream_tag,
2398 unsigned int format,
c8b6bf9b 2399 struct snd_pcm_substream *substream)
2f2f4251
M		 2400{
2401 struct sigmatel_spec *spec = codec->spec;
403d1944 2402 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2403}
2404
2405static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2406 struct hda_codec *codec,
c8b6bf9b 2407 struct snd_pcm_substream *substream)
2f2f4251
M		 2408{
2409 struct sigmatel_spec *spec = codec->spec;
2410 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2411}
2412
dabbed6f
M		 2413/*
2414 * Digital playback callbacks
2415 */
2416static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2417 struct hda_codec *codec,
c8b6bf9b 2418 struct snd_pcm_substream *substream)
dabbed6f
M		 2419{
2420 struct sigmatel_spec *spec = codec->spec;
2421 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2422}
2423
2424static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2425 struct hda_codec *codec,
c8b6bf9b 2426 struct snd_pcm_substream *substream)
dabbed6f
M		 2427{
2428 struct sigmatel_spec *spec = codec->spec;
2429 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2430}
2431
6b97eb45
TI		 2432static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2433 struct hda_codec *codec,
2434 unsigned int stream_tag,
2435 unsigned int format,
2436 struct snd_pcm_substream *substream)
2437{
2438 struct sigmatel_spec *spec = codec->spec;
2439 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2440 stream_tag, format, substream);
2441}
2442
dabbed6f 2443
2f2f4251
M		 2444/*
2445 * Analog capture callbacks
2446 */
2447static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2448 struct hda_codec *codec,
2449 unsigned int stream_tag,
2450 unsigned int format,
c8b6bf9b 2451 struct snd_pcm_substream *substream)
2f2f4251
M		 2452{
2453 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2454 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2455
8daaaa97
MR		 2456 if (spec->powerdown_adcs) {
2457 msleep(40);
8c2f767b 2458 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2459 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2460 }
2461 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2462 return 0;
2463}
2464
2465static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2466 struct hda_codec *codec,
c8b6bf9b 2467 struct snd_pcm_substream *substream)
2f2f4251
M		 2468{
2469 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2470 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2471
8daaaa97
MR		 2472 snd_hda_codec_cleanup_stream(codec, nid);
2473 if (spec->powerdown_adcs)
8c2f767b 2474 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2475 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2476 return 0;
2477}
2478
dabbed6f
M		 2479static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2480 .substreams = 1,
2481 .channels_min = 2,
2482 .channels_max = 2,
2483 /* NID is set in stac92xx_build_pcms */
2484 .ops = {
2485 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2486 .close = stac92xx_dig_playback_pcm_close,
2487 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2488 },
2489};
2490
2491static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2492 .substreams = 1,
2493 .channels_min = 2,
2494 .channels_max = 2,
2495 /* NID is set in stac92xx_build_pcms */
2496};
2497
2f2f4251
M		 2498static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2499 .substreams = 1,
2500 .channels_min = 2,
c7d4b2fa 2501 .channels_max = 8,
2f2f4251
M		 2502 .nid = 0x02, /* NID to query formats and rates */
2503 .ops = {
2504 .open = stac92xx_playback_pcm_open,
2505 .prepare = stac92xx_playback_pcm_prepare,
2506 .cleanup = stac92xx_playback_pcm_cleanup
2507 },
2508};
2509
3cc08dc6
MP		 2510static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2511 .substreams = 1,
2512 .channels_min = 2,
2513 .channels_max = 2,
2514 .nid = 0x06, /* NID to query formats and rates */
2515 .ops = {
2516 .open = stac92xx_playback_pcm_open,
2517 .prepare = stac92xx_playback_pcm_prepare,
2518 .cleanup = stac92xx_playback_pcm_cleanup
2519 },
2520};
2521
2f2f4251 2522static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2523 .channels_min = 2,
2524 .channels_max = 2,
9e05b7a3 2525 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2526 .ops = {
2527 .prepare = stac92xx_capture_pcm_prepare,
2528 .cleanup = stac92xx_capture_pcm_cleanup
2529 },
2530};
2531
2532static int stac92xx_build_pcms(struct hda_codec *codec)
2533{
2534 struct sigmatel_spec *spec = codec->spec;
2535 struct hda_pcm *info = spec->pcm_rec;
2536
2537 codec->num_pcms = 1;
2538 codec->pcm_info = info;
2539
c7d4b2fa 2540 info->name = "STAC92xx Analog";
2f2f4251 2541 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2542 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2543 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2544 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2545
2546 if (spec->alt_switch) {
2547 codec->num_pcms++;
2548 info++;
2549 info->name = "STAC92xx Analog Alt";
2550 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2551 }
2f2f4251 2552
dabbed6f
M		 2553 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2554 codec->num_pcms++;
2555 info++;
2556 info->name = "STAC92xx Digital";
8c441982 2557 info->pcm_type = spec->autocfg.dig_out_type;
dabbed6f
M		 2558 if (spec->multiout.dig_out_nid) {
2559 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2560 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2561 }
2562 if (spec->dig_in_nid) {
2563 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2564 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2565 }
2566 }
2567
2f2f4251
M		 2568 return 0;
2569}
2570
c960a03b
TI		 2571static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2572{
2573 unsigned int pincap = snd_hda_param_read(codec, nid,
2574 AC_PAR_PIN_CAP);
2575 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2576 if (pincap & AC_PINCAP_VREF_100)
2577 return AC_PINCTL_VREF_100;
2578 if (pincap & AC_PINCAP_VREF_80)
2579 return AC_PINCTL_VREF_80;
2580 if (pincap & AC_PINCAP_VREF_50)
2581 return AC_PINCTL_VREF_50;
2582 if (pincap & AC_PINCAP_VREF_GRD)
2583 return AC_PINCTL_VREF_GRD;
2584 return 0;
2585}
2586
403d1944
MP		 2587static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2588
2589{
82beb8fd
TI		 2590 snd_hda_codec_write_cache(codec, nid, 0,
2591 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2592}
2593
7c2ba97b
MR		 2594#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2595
2596static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2597 struct snd_ctl_elem_value *ucontrol)
2598{
2599 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2600 struct sigmatel_spec *spec = codec->spec;
2601
d7a89436 2602 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2603 return 0;
2604}
2605
c6e4c666
TI		 2606static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2607 unsigned char type);
2608
7c2ba97b
MR		 2609static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2610 struct snd_ctl_elem_value *ucontrol)
2611{
2612 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2613 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2614 int nid = kcontrol->private_value;
2615
2616 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2617
2618 /* check to be sure that the ports are upto date with
2619 * switch changes
2620 */
c6e4c666 2621 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR		 2622
2623 return 1;
2624}
2625
a5ce8890 2626#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2627
2628static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2629{
2630 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2631 struct sigmatel_spec *spec = codec->spec;
2632 int io_idx = kcontrol-> private_value & 0xff;
2633
2634 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2635 return 0;
2636}
2637
2638static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2639{
2640 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2641 struct sigmatel_spec *spec = codec->spec;
2642 hda_nid_t nid = kcontrol->private_value >> 8;
2643 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2644 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2645
2646 spec->io_switch[io_idx] = val;
2647
2648 if (val)
2649 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2650 else {
2651 unsigned int pinctl = AC_PINCTL_IN_EN;
2652 if (io_idx) /* set VREF for mic */
2653 pinctl |= stac92xx_get_vref(codec, nid);
2654 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2655 }
40c1d308
JZ		 2656
2657 /* check the auto-mute again: we need to mute/unmute the speaker
2658 * appropriately according to the pin direction
2659 */
2660 if (spec->hp_detect)
c6e4c666 2661 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2662
403d1944
MP		 2663 return 1;
2664}
2665
0fb87bb4
ML		 2666#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2667
2668static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2669 struct snd_ctl_elem_value *ucontrol)
2670{
2671 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2672 struct sigmatel_spec *spec = codec->spec;
2673
2674 ucontrol->value.integer.value[0] = spec->clfe_swap;
2675 return 0;
2676}
2677
2678static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2679 struct snd_ctl_elem_value *ucontrol)
2680{
2681 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2682 struct sigmatel_spec *spec = codec->spec;
2683 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2684 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2685
68ea7b2f 2686 if (spec->clfe_swap == val)
0fb87bb4
ML		 2687 return 0;
2688
68ea7b2f 2689 spec->clfe_swap = val;
0fb87bb4
ML		 2690
2691 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2692 spec->clfe_swap ? 0x4 : 0x0);
2693
2694 return 1;
2695}
2696
7c2ba97b
MR		 2697#define STAC_CODEC_HP_SWITCH(xname) \
2698 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2699 .name = xname, \
2700 .index = 0, \
2701 .info = stac92xx_hp_switch_info, \
2702 .get = stac92xx_hp_switch_get, \
2703 .put = stac92xx_hp_switch_put, \
2704 }
2705
403d1944
MP		 2706#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2707 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2708 .name = xname, \
2709 .index = 0, \
2710 .info = stac92xx_io_switch_info, \
2711 .get = stac92xx_io_switch_get, \
2712 .put = stac92xx_io_switch_put, \
2713 .private_value = xpval, \
2714 }
2715
0fb87bb4
ML		 2716#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2717 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2718 .name = xname, \
2719 .index = 0, \
2720 .info = stac92xx_clfe_switch_info, \
2721 .get = stac92xx_clfe_switch_get, \
2722 .put = stac92xx_clfe_switch_put, \
2723 .private_value = xpval, \
2724 }
403d1944 2725
c7d4b2fa
M		 2726enum {
2727 STAC_CTL_WIDGET_VOL,
2728 STAC_CTL_WIDGET_MUTE,
09a99959 2729 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2730 STAC_CTL_WIDGET_AMP_MUX,
2731 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2732 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2733 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2734 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2735};
2736
c8b6bf9b 2737static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2738 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2739 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2740 STAC_MONO_MUX,
89385035
MR		 2741 STAC_AMP_MUX,
2742 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2743 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2744 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2745 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2746};
2747
2748/* add dynamic controls */
4d4e9bb3
TI		 2749static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2750 struct snd_kcontrol_new *ktemp,
2751 int idx, const char *name,
2752 unsigned long val)
c7d4b2fa 2753{
c8b6bf9b 2754 struct snd_kcontrol_new *knew;
c7d4b2fa 2755
603c4019
TI		 2756 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2757 knew = snd_array_new(&spec->kctls);
2758 if (!knew)
2759 return -ENOMEM;
4d4e9bb3 2760 *knew = *ktemp;
4682eee0 2761 knew->index = idx;
82fe0c58 2762 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2763 if (!knew->name)
c7d4b2fa
M		 2764 return -ENOMEM;
2765 knew->private_value = val;
c7d4b2fa
M		 2766 return 0;
2767}
2768
4d4e9bb3
TI		 2769static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2770 int type, int idx, const char *name,
2771 unsigned long val)
2772{
2773 return stac92xx_add_control_temp(spec,
2774 &stac92xx_control_templates[type],
2775 idx, name, val);
2776}
2777
4682eee0
MR		 2778
2779/* add dynamic controls */
4d4e9bb3
TI		 2780static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2781 const char *name, unsigned long val)
4682eee0
MR		 2782{
2783 return stac92xx_add_control_idx(spec, type, 0, name, val);
2784}
2785
c21ca4a8
TI		 2786/* check whether the line-input can be used as line-out */
2787static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2788{
2789 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2790 struct auto_pin_cfg *cfg = &spec->autocfg;
2791 hda_nid_t nid;
2792 unsigned int pincap;
8e9068b1 2793
c21ca4a8
TI		 2794 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2795 return 0;
2796 nid = cfg->input_pins[AUTO_PIN_LINE];
2797 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2798 if (pincap & AC_PINCAP_OUT)
2799 return nid;
2800 return 0;
2801}
403d1944 2802
c21ca4a8
TI		 2803/* check whether the mic-input can be used as line-out */
2804static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2805{
2806 struct sigmatel_spec *spec = codec->spec;
2807 struct auto_pin_cfg *cfg = &spec->autocfg;
2808 unsigned int def_conf, pincap;
2809 unsigned int mic_pin;
2810
2811 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2812 return 0;
2813 mic_pin = AUTO_PIN_MIC;
2814 for (;;) {
2815 hda_nid_t nid = cfg->input_pins[mic_pin];
2816 def_conf = snd_hda_codec_read(codec, nid, 0,
2817 AC_VERB_GET_CONFIG_DEFAULT, 0);
2818 /* some laptops have an internal analog microphone
2819 * which can't be used as a output */
2820 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2821 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2822 if (pincap & AC_PINCAP_OUT)
2823 return nid;
403d1944 2824 }
c21ca4a8
TI		 2825 if (mic_pin == AUTO_PIN_MIC)
2826 mic_pin = AUTO_PIN_FRONT_MIC;
2827 else
2828 break;
403d1944 2829 }
403d1944
MP		 2830 return 0;
2831}
2832
7b043899
SL		 2833static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2834{
2835 int i;
2836
2837 for (i = 0; i < spec->multiout.num_dacs; i++) {
2838 if (spec->multiout.dac_nids[i] == nid)
2839 return 1;
2840 }
2841
2842 return 0;
2843}
2844
c21ca4a8
TI		 2845static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2846{
2847 int i;
2848 if (is_in_dac_nids(spec, nid))
2849 return 1;
2850 for (i = 0; i < spec->autocfg.hp_outs; i++)
2851 if (spec->hp_dacs[i] == nid)
2852 return 1;
2853 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2854 if (spec->speaker_dacs[i] == nid)
2855 return 1;
2856 return 0;
2857}
2858
2859static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2860{
2861 struct sigmatel_spec *spec = codec->spec;
2862 int j, conn_len;
2863 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2864 unsigned int wcaps, wtype;
2865
2866 conn_len = snd_hda_get_connections(codec, nid, conn,
2867 HDA_MAX_CONNECTIONS);
2868 for (j = 0; j < conn_len; j++) {
2869 wcaps = snd_hda_param_read(codec, conn[j],
2870 AC_PAR_AUDIO_WIDGET_CAP);
2871 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2872 /* we check only analog outputs */
2873 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2874 continue;
2875 /* if this route has a free DAC, assign it */
2876 if (!check_all_dac_nids(spec, conn[j])) {
2877 if (conn_len > 1) {
2878 /* select this DAC in the pin's input mux */
2879 snd_hda_codec_write_cache(codec, nid, 0,
2880 AC_VERB_SET_CONNECT_SEL, j);
2881 }
2882 return conn[j];
2883 }
2884 }
2885 return 0;
2886}
2887
2888static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2889static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2890
3cc08dc6 2891/*
7b043899
SL		 2892 * Fill in the dac_nids table from the parsed pin configuration
2893 * This function only works when every pin in line_out_pins[]
2894 * contains atleast one DAC in its connection list. Some 92xx
2895 * codecs are not connected directly to a DAC, such as the 9200
2896 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2897 */
c21ca4a8 2898static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 2899{
2900 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2901 struct auto_pin_cfg *cfg = &spec->autocfg;
2902 int i;
2903 hda_nid_t nid, dac;
7b043899 2904
c7d4b2fa
M		 2905 for (i = 0; i < cfg->line_outs; i++) {
2906 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 2907 dac = get_unassigned_dac(codec, nid);
2908 if (!dac) {
df802952
TI		 2909 if (spec->multiout.num_dacs > 0) {
2910 /* we have already working output pins,
2911 * so let's drop the broken ones again
2912 */
2913 cfg->line_outs = spec->multiout.num_dacs;
2914 break;
2915 }
7b043899
SL		 2916 /* error out, no available DAC found */
2917 snd_printk(KERN_ERR
2918 "%s: No available DAC for pin 0x%x\n",
2919 __func__, nid);
2920 return -ENODEV;
2921 }
c21ca4a8
TI		 2922 add_spec_dacs(spec, dac);
2923 }
7b043899 2924
c21ca4a8
TI		 2925 /* add line-in as output */
2926 nid = check_line_out_switch(codec);
2927 if (nid) {
2928 dac = get_unassigned_dac(codec, nid);
2929 if (dac) {
2930 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2931 nid, cfg->line_outs);
2932 cfg->line_out_pins[cfg->line_outs] = nid;
2933 cfg->line_outs++;
2934 spec->line_switch = nid;
2935 add_spec_dacs(spec, dac);
2936 }
2937 }
2938 /* add mic as output */
2939 nid = check_mic_out_switch(codec);
2940 if (nid) {
2941 dac = get_unassigned_dac(codec, nid);
2942 if (dac) {
2943 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2944 nid, cfg->line_outs);
2945 cfg->line_out_pins[cfg->line_outs] = nid;
2946 cfg->line_outs++;
2947 spec->mic_switch = nid;
2948 add_spec_dacs(spec, dac);
2949 }
2950 }
c7d4b2fa 2951
c21ca4a8
TI		 2952 for (i = 0; i < cfg->hp_outs; i++) {
2953 nid = cfg->hp_pins[i];
2954 dac = get_unassigned_dac(codec, nid);
2955 if (dac) {
2956 if (!spec->multiout.hp_nid)
2957 spec->multiout.hp_nid = dac;
2958 else
2959 add_spec_extra_dacs(spec, dac);
7b043899 2960 }
c21ca4a8
TI		 2961 spec->hp_dacs[i] = dac;
2962 }
2963
2964 for (i = 0; i < cfg->speaker_outs; i++) {
2965 nid = cfg->speaker_pins[i];
2966 dac = get_unassigned_dac(codec, nid);
2967 if (dac)
2968 add_spec_extra_dacs(spec, dac);
2969 spec->speaker_dacs[i] = dac;
7b043899 2970 }
c7d4b2fa 2971
c21ca4a8 2972 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 2973 spec->multiout.num_dacs,
2974 spec->multiout.dac_nids[0],
2975 spec->multiout.dac_nids[1],
2976 spec->multiout.dac_nids[2],
2977 spec->multiout.dac_nids[3],
2978 spec->multiout.dac_nids[4]);
c21ca4a8 2979
c7d4b2fa
M		 2980 return 0;
2981}
2982
eb06ed8f 2983/* create volume control/switch for the given prefx type */
7c7767eb
TI		 2984static int create_controls(struct hda_codec *codec, const char *pfx,
2985 hda_nid_t nid, int chs)
eb06ed8f 2986{
7c7767eb 2987 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI		 2988 char name[32];
2989 int err;
2990
7c7767eb
TI		 2991 if (!spec->check_volume_offset) {
2992 unsigned int caps, step, nums, db_scale;
2993 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
2994 step = (caps & AC_AMPCAP_STEP_SIZE) >>
2995 AC_AMPCAP_STEP_SIZE_SHIFT;
2996 step = (step + 1) * 25; /* in .01dB unit */
2997 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
2998 AC_AMPCAP_NUM_STEPS_SHIFT;
2999 db_scale = nums * step;
3000 /* if dB scale is over -64dB, and finer enough,
3001 * let's reduce it to half
3002 */
3003 if (db_scale > 6400 && nums >= 0x1f)
3004 spec->volume_offset = nums / 2;
3005 spec->check_volume_offset = 1;
3006 }
3007
eb06ed8f
TI		 3008 sprintf(name, "%s Playback Volume", pfx);
3009 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
7c7767eb
TI		 3010 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3011 spec->volume_offset));
eb06ed8f
TI		 3012 if (err < 0)
3013 return err;
3014 sprintf(name, "%s Playback Switch", pfx);
3015 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
3016 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3017 if (err < 0)
3018 return err;
3019 return 0;
3020}
3021
ae0afd81
MR		 3022static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3023{
c21ca4a8 3024 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3025 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3026 return 1;
3027 } else {
3028 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3029 spec->multiout.num_dacs++;
3030 }
3031 return 0;
3032}
3033
c21ca4a8 3034static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3035{
c21ca4a8
TI		 3036 int i;
3037 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3038 if (!spec->multiout.extra_out_nid[i]) {
3039 spec->multiout.extra_out_nid[i] = nid;
3040 return 0;
3041 }
3042 }
3043 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3044 return 1;
ae0afd81
MR		 3045}
3046
76624534
TI		 3047static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid)
3048{
3049 int i;
3050
3051 if (spec->autocfg.line_outs != 1)
3052 return 0;
3053 if (spec->multiout.hp_nid == nid)
3054 return 0;
3055 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++)
3056 if (spec->multiout.extra_out_nid[i] == nid)
3057 return 0;
3058 return 1;
3059}
3060
c7d4b2fa 3061/* add playback controls from the parsed DAC table */
0fb87bb4 3062static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 3063 const struct auto_pin_cfg *cfg)
c7d4b2fa 3064{
76624534 3065 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI		 3066 static const char *chname[4] = {
3067 "Front", "Surround", NULL /*CLFE*/, "Side"
3068 };
d21995e3 3069 hda_nid_t nid = 0;
91589232
TI		 3070 int i, err;
3071 unsigned int wid_caps;
0fb87bb4 3072
c21ca4a8 3073 for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
c7d4b2fa 3074 nid = spec->multiout.dac_nids[i];
c7d4b2fa
M		 3075 if (i == 2) {
3076 /* Center/LFE */
7c7767eb 3077 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3078 if (err < 0)
c7d4b2fa 3079 return err;
7c7767eb 3080 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3081 if (err < 0)
c7d4b2fa 3082 return err;
0fb87bb4
ML		 3083
3084 wid_caps = get_wcaps(codec, nid);
3085
3086 if (wid_caps & AC_WCAP_LR_SWAP) {
3087 err = stac92xx_add_control(spec,
3088 STAC_CTL_WIDGET_CLFE_SWITCH,
3089 "Swap Center/LFE Playback Switch", nid);
3090
3091 if (err < 0)
3092 return err;
3093 }
3094
c7d4b2fa 3095 } else {
76624534
TI		 3096 const char *name = chname[i];
3097 /* if it's a single DAC, assign a better name */
3098 if (!i && is_unique_dac(spec, nid)) {
3099 switch (cfg->line_out_type) {
3100 case AUTO_PIN_HP_OUT:
3101 name = "Headphone";
3102 break;
3103 case AUTO_PIN_SPEAKER_OUT:
3104 name = "Speaker";
3105 break;
3106 }
3107 }
7c7767eb 3108 err = create_controls(codec, name, nid, 3);
eb06ed8f 3109 if (err < 0)
c7d4b2fa
M		 3110 return err;
3111 }
3112 }
3113
a9cb5c90 3114 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3115 err = stac92xx_add_control(spec,
3116 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3117 "Headphone as Line Out Switch",
3118 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3119 if (err < 0)
3120 return err;
3121 }
3122
b5895dc8 3123 if (spec->line_switch) {
c21ca4a8
TI		 3124 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3125 "Line In as Output Switch",
3126 spec->line_switch << 8);
3127 if (err < 0)
3128 return err;
b5895dc8 3129 }
403d1944 3130
b5895dc8 3131 if (spec->mic_switch) {
c21ca4a8
TI		 3132 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3133 "Mic as Output Switch",
3134 (spec->mic_switch << 8) | 1);
3135 if (err < 0)
3136 return err;
b5895dc8 3137 }
403d1944 3138
c7d4b2fa
M		 3139 return 0;
3140}
3141
eb06ed8f
TI		 3142/* add playback controls for Speaker and HP outputs */
3143static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3144 struct auto_pin_cfg *cfg)
3145{
3146 struct sigmatel_spec *spec = codec->spec;
3147 hda_nid_t nid;
c21ca4a8 3148 int i, err, nums;
eb06ed8f 3149
c21ca4a8 3150 nums = 0;
eb06ed8f 3151 for (i = 0; i < cfg->hp_outs; i++) {
c21ca4a8
TI		 3152 static const char *pfxs[] = {
3153 "Headphone", "Headphone2", "Headphone3",
3154 };
eb06ed8f
TI		 3155 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3156 if (wid_caps & AC_WCAP_UNSOL_CAP)
3157 spec->hp_detect = 1;
c21ca4a8 3158 if (nums >= ARRAY_SIZE(pfxs))
c7d4b2fa 3159 continue;
c21ca4a8
TI		 3160 nid = spec->hp_dacs[i];
3161 if (!nid)
eb06ed8f 3162 continue;
7c7767eb 3163 err = create_controls(codec, pfxs[nums++], nid, 3);
c21ca4a8
TI		 3164 if (err < 0)
3165 return err;
1b290a51 3166 }
c21ca4a8
TI		 3167 nums = 0;
3168 for (i = 0; i < cfg->speaker_outs; i++) {
eb06ed8f
TI		 3169 static const char *pfxs[] = {
3170 "Speaker", "External Speaker", "Speaker2",
3171 };
c21ca4a8
TI		 3172 if (nums >= ARRAY_SIZE(pfxs))
3173 continue;
3174 nid = spec->speaker_dacs[i];
3175 if (!nid)
3176 continue;
7c7767eb 3177 err = create_controls(codec, pfxs[nums++], nid, 3);
eb06ed8f
TI		 3178 if (err < 0)
3179 return err;
3180 }
c7d4b2fa
M		 3181 return 0;
3182}
3183
b22b4821 3184/* labels for mono mux outputs */
d0513fc6
MR		 3185static const char *stac92xx_mono_labels[4] = {
3186 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3187};
3188
3189/* create mono mux for mono out on capable codecs */
3190static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3191{
3192 struct sigmatel_spec *spec = codec->spec;
3193 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3194 int i, num_cons;
3195 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3196
3197 num_cons = snd_hda_get_connections(codec,
3198 spec->mono_nid,
3199 con_lst,
3200 HDA_MAX_NUM_INPUTS);
3201 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3202 return -EINVAL;
3203
3204 for (i = 0; i < num_cons; i++) {
3205 mono_mux->items[mono_mux->num_items].label =
3206 stac92xx_mono_labels[i];
3207 mono_mux->items[mono_mux->num_items].index = i;
3208 mono_mux->num_items++;
3209 }
09a99959
MR		 3210
3211 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3212 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3213}
3214
89385035
MR		 3215/* labels for amp mux outputs */
3216static const char *stac92xx_amp_labels[3] = {
4b33c767 3217 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3218};
3219
3220/* create amp out controls mux on capable codecs */
3221static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3222{
3223 struct sigmatel_spec *spec = codec->spec;
3224 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3225 int i, err;
3226
2a9c7816 3227 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3228 amp_mux->items[amp_mux->num_items].label =
3229 stac92xx_amp_labels[i];
3230 amp_mux->items[amp_mux->num_items].index = i;
3231 amp_mux->num_items++;
3232 }
3233
2a9c7816
MR		 3234 if (spec->num_amps > 1) {
3235 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3236 "Amp Selector Capture Switch", 0);
3237 if (err < 0)
3238 return err;
3239 }
89385035
MR		 3240 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3241 "Amp Capture Volume",
3242 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3243}
3244
3245
1cd2224c
MR		 3246/* create PC beep volume controls */
3247static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3248 hda_nid_t nid)
3249{
3250 struct sigmatel_spec *spec = codec->spec;
3251 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3252 int err;
3253
3254 /* check for mute support for the the amp */
3255 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3256 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3257 "PC Beep Playback Switch",
3258 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3259 if (err < 0)
3260 return err;
3261 }
3262
3263 /* check to see if there is volume support for the amp */
3264 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3265 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3266 "PC Beep Playback Volume",
3267 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3268 if (err < 0)
3269 return err;
3270 }
3271 return 0;
3272}
3273
4d4e9bb3
TI		 3274#ifdef CONFIG_SND_HDA_INPUT_BEEP
3275#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3276
3277static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3278 struct snd_ctl_elem_value *ucontrol)
3279{
3280 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3281 ucontrol->value.integer.value[0] = codec->beep->enabled;
3282 return 0;
3283}
3284
3285static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3286 struct snd_ctl_elem_value *ucontrol)
3287{
3288 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3289 int enabled = !!ucontrol->value.integer.value[0];
3290 if (codec->beep->enabled != enabled) {
3291 codec->beep->enabled = enabled;
3292 return 1;
3293 }
3294 return 0;
3295}
3296
3297static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3298 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3299 .info = stac92xx_dig_beep_switch_info,
3300 .get = stac92xx_dig_beep_switch_get,
3301 .put = stac92xx_dig_beep_switch_put,
3302};
3303
3304static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3305{
3306 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3307 0, "PC Beep Playback Switch", 0);
3308}
3309#endif
3310
4682eee0
MR		 3311static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3312{
3313 struct sigmatel_spec *spec = codec->spec;
3314 int wcaps, nid, i, err = 0;
3315
3316 for (i = 0; i < spec->num_muxes; i++) {
3317 nid = spec->mux_nids[i];
3318 wcaps = get_wcaps(codec, nid);
3319
3320 if (wcaps & AC_WCAP_OUT_AMP) {
3321 err = stac92xx_add_control_idx(spec,
3322 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3323 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3324 if (err < 0)
3325 return err;
3326 }
3327 }
3328 return 0;
3329};
3330
d9737751 3331static const char *stac92xx_spdif_labels[3] = {
65973632 3332 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3333};
3334
3335static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3336{
3337 struct sigmatel_spec *spec = codec->spec;
3338 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3339 const char **labels = spec->spdif_labels;
d9737751 3340 int i, num_cons;
65973632 3341 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3342
3343 num_cons = snd_hda_get_connections(codec,
3344 spec->smux_nids[0],
3345 con_lst,
3346 HDA_MAX_NUM_INPUTS);
65973632 3347 if (!num_cons)
d9737751
MR		 3348 return -EINVAL;
3349
65973632
MR		 3350 if (!labels)
3351 labels = stac92xx_spdif_labels;
3352
d9737751 3353 for (i = 0; i < num_cons; i++) {
65973632 3354 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3355 spdif_mux->items[spdif_mux->num_items].index = i;
3356 spdif_mux->num_items++;
3357 }
3358
3359 return 0;
3360}
3361
8b65727b 3362/* labels for dmic mux inputs */
ddc2cec4 3363static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3364 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3365 "Digital Mic 3", "Digital Mic 4"
3366};
3367
3368/* create playback/capture controls for input pins on dmic capable codecs */
3369static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3370 const struct auto_pin_cfg *cfg)
3371{
3372 struct sigmatel_spec *spec = codec->spec;
3373 struct hda_input_mux *dimux = &spec->private_dimux;
3374 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3375 int err, i, j;
3376 char name[32];
8b65727b
MP		 3377
3378 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3379 dimux->items[dimux->num_items].index = 0;
3380 dimux->num_items++;
3381
3382 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3383 hda_nid_t nid;
8b65727b
MP		 3384 int index;
3385 int num_cons;
0678accd 3386 unsigned int wcaps;
8b65727b
MP		 3387 unsigned int def_conf;
3388
3389 def_conf = snd_hda_codec_read(codec,
3390 spec->dmic_nids[i],
3391 0,
3392 AC_VERB_GET_CONFIG_DEFAULT,
3393 0);
3394 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3395 continue;
3396
0678accd 3397 nid = spec->dmic_nids[i];
8b65727b 3398 num_cons = snd_hda_get_connections(codec,
e1f0d669 3399 spec->dmux_nids[0],
8b65727b
MP		 3400 con_lst,
3401 HDA_MAX_NUM_INPUTS);
3402 for (j = 0; j < num_cons; j++)
0678accd 3403 if (con_lst[j] == nid) {
8b65727b
MP		 3404 index = j;
3405 goto found;
3406 }
3407 continue;
3408found:
d0513fc6
MR		 3409 wcaps = get_wcaps(codec, nid) &
3410 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3411
d0513fc6 3412 if (wcaps) {
0678accd
MR		 3413 sprintf(name, "%s Capture Volume",
3414 stac92xx_dmic_labels[dimux->num_items]);
3415
3416 err = stac92xx_add_control(spec,
3417 STAC_CTL_WIDGET_VOL,
3418 name,
d0513fc6
MR		 3419 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3420 (wcaps & AC_WCAP_OUT_AMP) ?
3421 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3422 if (err < 0)
3423 return err;
3424 }
3425
8b65727b
MP		 3426 dimux->items[dimux->num_items].label =
3427 stac92xx_dmic_labels[dimux->num_items];
3428 dimux->items[dimux->num_items].index = index;
3429 dimux->num_items++;
3430 }
3431
3432 return 0;
3433}
3434
c7d4b2fa
M		 3435/* create playback/capture controls for input pins */
3436static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3437{
3438 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3439 struct hda_input_mux *imux = &spec->private_imux;
3440 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3441 int i, j, k;
3442
3443 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3444 int index;
3445
3446 if (!cfg->input_pins[i])
3447 continue;
3448 index = -1;
3449 for (j = 0; j < spec->num_muxes; j++) {
3450 int num_cons;
3451 num_cons = snd_hda_get_connections(codec,
3452 spec->mux_nids[j],
3453 con_lst,
3454 HDA_MAX_NUM_INPUTS);
3455 for (k = 0; k < num_cons; k++)
3456 if (con_lst[k] == cfg->input_pins[i]) {
3457 index = k;
3458 goto found;
3459 }
c7d4b2fa 3460 }
314634bc
TI		 3461 continue;
3462 found:
3463 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3464 imux->items[imux->num_items].index = index;
3465 imux->num_items++;
c7d4b2fa
M		 3466 }
3467
7b043899 3468 if (imux->num_items) {
62fe78e9
SR		 3469 /*
3470 * Set the current input for the muxes.
3471 * The STAC9221 has two input muxes with identical source
3472 * NID lists. Hopefully this won't get confused.
3473 */
3474 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3475 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3476 AC_VERB_SET_CONNECT_SEL,
3477 imux->items[0].index);
62fe78e9
SR		 3478 }
3479 }
3480
c7d4b2fa
M		 3481 return 0;
3482}
3483
c7d4b2fa
M		 3484static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3485{
3486 struct sigmatel_spec *spec = codec->spec;
3487 int i;
3488
3489 for (i = 0; i < spec->autocfg.line_outs; i++) {
3490 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3491 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3492 }
3493}
3494
3495static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3496{
3497 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3498 int i;
c7d4b2fa 3499
eb06ed8f
TI		 3500 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3501 hda_nid_t pin;
3502 pin = spec->autocfg.hp_pins[i];
3503 if (pin) /* connect to front */
3504 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3505 }
3506 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3507 hda_nid_t pin;
3508 pin = spec->autocfg.speaker_pins[i];
3509 if (pin) /* connect to front */
3510 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3511 }
c7d4b2fa
M		 3512}
3513
3cc08dc6 3514static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3515{
3516 struct sigmatel_spec *spec = codec->spec;
3517 int err;
3518
8b65727b
MP		 3519 if ((err = snd_hda_parse_pin_def_config(codec,
3520 &spec->autocfg,
3521 spec->dmic_nids)) < 0)
c7d4b2fa 3522 return err;
82bc955f 3523 if (! spec->autocfg.line_outs)
869264c4 3524 return 0; /* can't find valid pin config */
19039bd0 3525
bcecd9bd
JZ		 3526 /* If we have no real line-out pin and multiple hp-outs, HPs should
3527 * be set up as multi-channel outputs.
3528 */
3529 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3530 spec->autocfg.hp_outs > 1) {
3531 /* Copy hp_outs to line_outs, backup line_outs in
3532 * speaker_outs so that the following routines can handle
3533 * HP pins as primary outputs.
3534 */
c21ca4a8 3535 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3536 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3537 sizeof(spec->autocfg.line_out_pins));
3538 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3539 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3540 sizeof(spec->autocfg.hp_pins));
3541 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3542 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3543 spec->autocfg.hp_outs = 0;
bcecd9bd 3544 }
09a99959 3545 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3546 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3547 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3548 u32 caps = query_amp_caps(codec,
3549 spec->autocfg.mono_out_pin, dir);
3550 hda_nid_t conn_list[1];
3551
3552 /* get the mixer node and then the mono mux if it exists */
3553 if (snd_hda_get_connections(codec,
3554 spec->autocfg.mono_out_pin, conn_list, 1) &&
3555 snd_hda_get_connections(codec, conn_list[0],
3556 conn_list, 1)) {
3557
3558 int wcaps = get_wcaps(codec, conn_list[0]);
3559 int wid_type = (wcaps & AC_WCAP_TYPE)
3560 >> AC_WCAP_TYPE_SHIFT;
3561 /* LR swap check, some stac925x have a mux that
3562 * changes the DACs output path instead of the
3563 * mono-mux path.
3564 */
3565 if (wid_type == AC_WID_AUD_SEL &&
3566 !(wcaps & AC_WCAP_LR_SWAP))
3567 spec->mono_nid = conn_list[0];
3568 }
d0513fc6
MR		 3569 if (dir) {
3570 hda_nid_t nid = spec->autocfg.mono_out_pin;
3571
3572 /* most mono outs have a least a mute/unmute switch */
3573 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3574 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3575 "Mono Playback Switch",
3576 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3577 if (err < 0)
3578 return err;
d0513fc6
MR		 3579 /* check for volume support for the amp */
3580 if ((caps & AC_AMPCAP_NUM_STEPS)
3581 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3582 err = stac92xx_add_control(spec,
3583 STAC_CTL_WIDGET_VOL,
3584 "Mono Playback Volume",
3585 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3586 if (err < 0)
3587 return err;
3588 }
09a99959
MR		 3589 }
3590
3591 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3592 AC_PINCTL_OUT_EN);
3593 }
bcecd9bd 3594
c21ca4a8
TI		 3595 if (!spec->multiout.num_dacs) {
3596 err = stac92xx_auto_fill_dac_nids(codec);
3597 if (err < 0)
19039bd0 3598 return err;
c9280d68
TI		 3599 err = stac92xx_auto_create_multi_out_ctls(codec,
3600 &spec->autocfg);
3601 if (err < 0)
3602 return err;
c21ca4a8 3603 }
c7d4b2fa 3604
1cd2224c
MR		 3605 /* setup analog beep controls */
3606 if (spec->anabeep_nid > 0) {
3607 err = stac92xx_auto_create_beep_ctls(codec,
3608 spec->anabeep_nid);
3609 if (err < 0)
3610 return err;
3611 }
3612
3613 /* setup digital beep controls and input device */
3614#ifdef CONFIG_SND_HDA_INPUT_BEEP
3615 if (spec->digbeep_nid > 0) {
3616 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3617 unsigned int caps;
1cd2224c
MR		 3618
3619 err = stac92xx_auto_create_beep_ctls(codec, nid);
3620 if (err < 0)
3621 return err;
3622 err = snd_hda_attach_beep_device(codec, nid);
3623 if (err < 0)
3624 return err;
4d4e9bb3
TI		 3625 /* if no beep switch is available, make its own one */
3626 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3627 if (codec->beep &&
3628 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3629 err = stac92xx_beep_switch_ctl(codec);
3630 if (err < 0)
3631 return err;
3632 }
1cd2224c
MR		 3633 }
3634#endif
3635
0fb87bb4
ML		 3636 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3637
3638 if (err < 0)
3639 return err;
3640
3641 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3642
3643 if (err < 0)
c7d4b2fa
M		 3644 return err;
3645
b22b4821
MR		 3646 if (spec->mono_nid > 0) {
3647 err = stac92xx_auto_create_mono_output_ctls(codec);
3648 if (err < 0)
3649 return err;
3650 }
2a9c7816 3651 if (spec->num_amps > 0) {
89385035
MR		 3652 err = stac92xx_auto_create_amp_output_ctls(codec);
3653 if (err < 0)
3654 return err;
3655 }
2a9c7816 3656 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3657 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3658 &spec->autocfg)) < 0)
3659 return err;
4682eee0
MR		 3660 if (spec->num_muxes > 0) {
3661 err = stac92xx_auto_create_mux_input_ctls(codec);
3662 if (err < 0)
3663 return err;
3664 }
d9737751
MR		 3665 if (spec->num_smuxes > 0) {
3666 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3667 if (err < 0)
3668 return err;
3669 }
8b65727b 3670
c7d4b2fa 3671 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3672 if (spec->multiout.max_channels > 2)
c7d4b2fa 3673 spec->surr_switch = 1;
c7d4b2fa 3674
82bc955f 3675 if (spec->autocfg.dig_out_pin)
3cc08dc6 3676 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3677 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3678 spec->dig_in_nid = dig_in;
c7d4b2fa 3679
603c4019
TI		 3680 if (spec->kctls.list)
3681 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3682
3683 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3684 if (!spec->dinput_mux)
3685 spec->dinput_mux = &spec->private_dimux;
d9737751 3686 spec->sinput_mux = &spec->private_smux;
b22b4821 3687 spec->mono_mux = &spec->private_mono_mux;
89385035 3688 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3689 return 1;
3690}
3691
82bc955f
TI		 3692/* add playback controls for HP output */
3693static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3694 struct auto_pin_cfg *cfg)
3695{
3696 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3697 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3698 unsigned int wid_caps;
3699
3700 if (! pin)
3701 return 0;
3702
3703 wid_caps = get_wcaps(codec, pin);
505cb341 3704 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3705 spec->hp_detect = 1;
82bc955f
TI		 3706
3707 return 0;
3708}
3709
160ea0dc
RF		 3710/* add playback controls for LFE output */
3711static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3712 struct auto_pin_cfg *cfg)
3713{
3714 struct sigmatel_spec *spec = codec->spec;
3715 int err;
3716 hda_nid_t lfe_pin = 0x0;
3717 int i;
3718
3719 /*
3720 * search speaker outs and line outs for a mono speaker pin
3721 * with an amp. If one is found, add LFE controls
3722 * for it.
3723 */
3724 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3725 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3726 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3727 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3728 if (wcaps == AC_WCAP_OUT_AMP)
3729 /* found a mono speaker with an amp, must be lfe */
3730 lfe_pin = pin;
3731 }
3732
3733 /* if speaker_outs is 0, then speakers may be in line_outs */
3734 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3735 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3736 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3737 unsigned int defcfg;
8b551785 3738 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3739 AC_VERB_GET_CONFIG_DEFAULT,
3740 0x00);
8b551785 3741 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3742 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3743 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3744 if (wcaps == AC_WCAP_OUT_AMP)
3745 /* found a mono speaker with an amp,
3746 must be lfe */
3747 lfe_pin = pin;
3748 }
3749 }
3750 }
3751
3752 if (lfe_pin) {
7c7767eb 3753 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3754 if (err < 0)
3755 return err;
3756 }
3757
3758 return 0;
3759}
3760
c7d4b2fa
M		 3761static int stac9200_parse_auto_config(struct hda_codec *codec)
3762{
3763 struct sigmatel_spec *spec = codec->spec;
3764 int err;
3765
df694daa 3766 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3767 return err;
3768
3769 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3770 return err;
3771
82bc955f
TI		 3772 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3773 return err;
3774
160ea0dc
RF		 3775 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3776 return err;
3777
355a0ec4
TI		 3778 if (spec->num_muxes > 0) {
3779 err = stac92xx_auto_create_mux_input_ctls(codec);
3780 if (err < 0)
3781 return err;
3782 }
3783
82bc955f 3784 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3785 spec->multiout.dig_out_nid = 0x05;
82bc955f 3786 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3787 spec->dig_in_nid = 0x04;
c7d4b2fa 3788
603c4019
TI		 3789 if (spec->kctls.list)
3790 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3791
3792 spec->input_mux = &spec->private_imux;
8b65727b 3793 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3794
3795 return 1;
3796}
3797
62fe78e9
SR		 3798/*
3799 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3800 * funky external mute control using GPIO pins.
3801 */
3802
76e1ddfb 3803static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3804 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3805{
3806 unsigned int gpiostate, gpiomask, gpiodir;
3807
3808 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3809 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3810 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3811
3812 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3813 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3814 gpiomask |= mask;
62fe78e9
SR		 3815
3816 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3817 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3818 gpiodir |= dir_mask;
62fe78e9 3819
76e1ddfb 3820 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3821 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3822
3823 snd_hda_codec_write(codec, codec->afg, 0,
3824 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3825 snd_hda_codec_read(codec, codec->afg, 0,
3826 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3827
3828 msleep(1);
3829
76e1ddfb
TI		 3830 snd_hda_codec_read(codec, codec->afg, 0,
3831 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3832}
3833
74aeaabc
MR		 3834static int stac92xx_add_jack(struct hda_codec *codec,
3835 hda_nid_t nid, int type)
3836{
e4973e1e 3837#ifdef CONFIG_SND_JACK
74aeaabc
MR		 3838 struct sigmatel_spec *spec = codec->spec;
3839 struct sigmatel_jack *jack;
3840 int def_conf = snd_hda_codec_read(codec, nid,
3841 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3842 int connectivity = get_defcfg_connect(def_conf);
3843 char name[32];
3844
3845 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3846 return 0;
3847
3848 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3849 jack = snd_array_new(&spec->jacks);
3850 if (!jack)
3851 return -ENOMEM;
3852 jack->nid = nid;
3853 jack->type = type;
3854
3855 sprintf(name, "%s at %s %s Jack",
3856 snd_hda_get_jack_type(def_conf),
3857 snd_hda_get_jack_connectivity(def_conf),
3858 snd_hda_get_jack_location(def_conf));
3859
3860 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI		 3861#else
3862 return 0;
3863#endif
74aeaabc
MR		 3864}
3865
c6e4c666
TI		 3866static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3867 unsigned char type, int data)
74aeaabc
MR		 3868{
3869 struct sigmatel_event *event;
3870
3871 snd_array_init(&spec->events, sizeof(*event), 32);
3872 event = snd_array_new(&spec->events);
3873 if (!event)
3874 return -ENOMEM;
3875 event->nid = nid;
c6e4c666
TI		 3876 event->type = type;
3877 event->tag = spec->events.used;
74aeaabc
MR		 3878 event->data = data;
3879
c6e4c666 3880 return event->tag;
74aeaabc
MR		 3881}
3882
c6e4c666
TI		 3883static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3884 hda_nid_t nid, unsigned char type)
74aeaabc
MR		 3885{
3886 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 3887 struct sigmatel_event *event = spec->events.list;
3888 int i;
3889
3890 for (i = 0; i < spec->events.used; i++, event++) {
3891 if (event->nid == nid && event->type == type)
3892 return event;
74aeaabc 3893 }
c6e4c666 3894 return NULL;
74aeaabc
MR		 3895}
3896
c6e4c666
TI		 3897static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3898 unsigned char tag)
314634bc 3899{
c6e4c666
TI		 3900 struct sigmatel_spec *spec = codec->spec;
3901 struct sigmatel_event *event = spec->events.list;
3902 int i;
3903
3904 for (i = 0; i < spec->events.used; i++, event++) {
3905 if (event->tag == tag)
3906 return event;
74aeaabc 3907 }
c6e4c666
TI		 3908 return NULL;
3909}
3910
3911static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3912 unsigned int type)
3913{
3914 struct sigmatel_event *event;
3915 int tag;
3916
3917 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3918 return;
3919 event = stac_get_event(codec, nid, type);
3920 if (event)
3921 tag = event->tag;
3922 else
3923 tag = stac_add_event(codec->spec, nid, type, 0);
3924 if (tag < 0)
3925 return;
3926 snd_hda_codec_write_cache(codec, nid, 0,
3927 AC_VERB_SET_UNSOLICITED_ENABLE,
3928 AC_USRSP_EN | tag);
314634bc
TI		 3929}
3930
a64135a2
MR		 3931static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3932{
3933 int i;
3934 for (i = 0; i < cfg->hp_outs; i++)
3935 if (cfg->hp_pins[i] == nid)
3936 return 1; /* nid is a HP-Out */
3937
3938 return 0; /* nid is not a HP-Out */
3939};
3940
b76c850f
MR		 3941static void stac92xx_power_down(struct hda_codec *codec)
3942{
3943 struct sigmatel_spec *spec = codec->spec;
3944
3945 /* power down inactive DACs */
3946 hda_nid_t *dac;
3947 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 3948 if (!check_all_dac_nids(spec, *dac))
8c2f767b 3949 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 3950 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3951}
3952
f73d3585
TI		 3953static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3954 int enable);
3955
c7d4b2fa
M		 3956static int stac92xx_init(struct hda_codec *codec)
3957{
3958 struct sigmatel_spec *spec = codec->spec;
82bc955f 3959 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3960 unsigned int gpio;
e4973e1e 3961 int i;
c7d4b2fa 3962
c7d4b2fa
M		 3963 snd_hda_sequence_write(codec, spec->init);
3964
8daaaa97
MR		 3965 /* power down adcs initially */
3966 if (spec->powerdown_adcs)
3967 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 3968 snd_hda_codec_write(codec,
8daaaa97
MR		 3969 spec->adc_nids[i], 0,
3970 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI		 3971
3972 /* set up GPIO */
3973 gpio = spec->gpio_data;
3974 /* turn on EAPD statically when spec->eapd_switch isn't set.
3975 * otherwise, unsol event will turn it on/off dynamically
3976 */
3977 if (!spec->eapd_switch)
3978 gpio |= spec->eapd_mask;
3979 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3980
82bc955f
TI		 3981 /* set up pins */
3982 if (spec->hp_detect) {
505cb341 3983 /* Enable unsolicited responses on the HP widget */
74aeaabc 3984 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 3985 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 3986 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 3987 }
0a07acaf
TI		 3988 /* force to enable the first line-out; the others are set up
3989 * in unsol_event
3990 */
3991 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3992 AC_PINCTL_OUT_EN);
82bc955f 3993 /* fake event to set up pins */
c6e4c666
TI		 3994 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
3995 STAC_HP_EVENT);
82bc955f
TI		 3996 } else {
3997 stac92xx_auto_init_multi_out(codec);
3998 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 3999 for (i = 0; i < cfg->hp_outs; i++)
4000 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI		 4001 }
4002 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 4003 hda_nid_t nid = cfg->input_pins[i];
4004 if (nid) {
12dde4c6 4005 unsigned int pinctl, conf;
4f1e6bc3
TI		 4006 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
4007 /* for mic pins, force to initialize */
4008 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI		 4009 pinctl |= AC_PINCTL_IN_EN;
4010 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI		 4011 } else {
4012 pinctl = snd_hda_codec_read(codec, nid, 0,
4013 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4014 /* if PINCTL already set then skip */
12dde4c6
TI		 4015 if (!(pinctl & AC_PINCTL_IN_EN)) {
4016 pinctl |= AC_PINCTL_IN_EN;
4017 stac92xx_auto_set_pinctl(codec, nid,
4018 pinctl);
4019 }
4020 }
4021 conf = snd_hda_codec_read(codec, nid, 0,
4022 AC_VERB_GET_CONFIG_DEFAULT, 0);
4023 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4024 enable_pin_detect(codec, nid,
4025 STAC_INSERT_EVENT);
4026 stac_issue_unsol_event(codec, nid,
4027 STAC_INSERT_EVENT);
4f1e6bc3 4028 }
c960a03b 4029 }
82bc955f 4030 }
a64135a2
MR		 4031 for (i = 0; i < spec->num_dmics; i++)
4032 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4033 AC_PINCTL_IN_EN);
f73d3585
TI		 4034 if (cfg->dig_out_pin)
4035 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
4036 AC_PINCTL_OUT_EN);
4037 if (cfg->dig_in_pin)
4038 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4039 AC_PINCTL_IN_EN);
a64135a2 4040 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4041 hda_nid_t nid = spec->pwr_nids[i];
4042 int pinctl, def_conf;
f73d3585 4043
eb632128
TI		 4044 /* power on when no jack detection is available */
4045 if (!spec->hp_detect) {
4046 stac_toggle_power_map(codec, nid, 1);
4047 continue;
4048 }
4049
4050 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI		 4051 continue; /* already has an unsol event */
4052
4053 pinctl = snd_hda_codec_read(codec, nid, 0,
4054 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4055 /* outputs are only ports capable of power management
4056 * any attempts on powering down a input port cause the
4057 * referenced VREF to act quirky.
4058 */
eb632128
TI		 4059 if (pinctl & AC_PINCTL_IN_EN) {
4060 stac_toggle_power_map(codec, nid, 1);
a64135a2 4061 continue;
eb632128 4062 }
f73d3585
TI		 4063 def_conf = snd_hda_codec_read(codec, nid, 0,
4064 AC_VERB_GET_CONFIG_DEFAULT, 0);
4065 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4066 /* skip any ports that don't have jacks since presence
4067 * detection is useless */
f73d3585
TI		 4068 if (def_conf != AC_JACK_PORT_COMPLEX) {
4069 if (def_conf != AC_JACK_PORT_NONE)
4070 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4071 continue;
f73d3585 4072 }
12dde4c6
TI		 4073 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
4074 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4075 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
4076 }
a64135a2 4077 }
b76c850f
MR		 4078 if (spec->dac_list)
4079 stac92xx_power_down(codec);
c7d4b2fa
M		 4080 return 0;
4081}
4082
74aeaabc
MR		 4083static void stac92xx_free_jacks(struct hda_codec *codec)
4084{
e4973e1e 4085#ifdef CONFIG_SND_JACK
b94d3539 4086 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4087 struct sigmatel_spec *spec = codec->spec;
b94d3539 4088 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 4089 struct sigmatel_jack *jacks = spec->jacks.list;
4090 int i;
4091 for (i = 0; i < spec->jacks.used; i++)
4092 snd_device_free(codec->bus->card, &jacks[i].jack);
4093 }
4094 snd_array_free(&spec->jacks);
e4973e1e 4095#endif
74aeaabc
MR		 4096}
4097
603c4019
TI		 4098static void stac92xx_free_kctls(struct hda_codec *codec)
4099{
4100 struct sigmatel_spec *spec = codec->spec;
4101
4102 if (spec->kctls.list) {
4103 struct snd_kcontrol_new *kctl = spec->kctls.list;
4104 int i;
4105 for (i = 0; i < spec->kctls.used; i++)
4106 kfree(kctl[i].name);
4107 }
4108 snd_array_free(&spec->kctls);
4109}
4110
2f2f4251
M		 4111static void stac92xx_free(struct hda_codec *codec)
4112{
c7d4b2fa 4113 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4114
4115 if (! spec)
4116 return;
4117
af9f341a 4118 kfree(spec->pin_configs);
74aeaabc
MR		 4119 stac92xx_free_jacks(codec);
4120 snd_array_free(&spec->events);
11b44bbd 4121
c7d4b2fa 4122 kfree(spec);
1cd2224c 4123 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4124}
4125
4e55096e
M		 4126static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4127 unsigned int flag)
4128{
4129 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4130 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4131
f9acba43
TI		 4132 if (pin_ctl & AC_PINCTL_IN_EN) {
4133 /*
4134 * we need to check the current set-up direction of
4135 * shared input pins since they can be switched via
4136 * "xxx as Output" mixer switch
4137 */
4138 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4139 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4140 return;
4141 }
4142
7b043899
SL		 4143 /* if setting pin direction bits, clear the current
4144 direction bits first */
4145 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4146 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4147
82beb8fd 4148 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4149 AC_VERB_SET_PIN_WIDGET_CONTROL,
4150 pin_ctl | flag);
4151}
4152
4153static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4154 unsigned int flag)
4155{
4156 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4157 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 4158 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4159 AC_VERB_SET_PIN_WIDGET_CONTROL,
4160 pin_ctl & ~flag);
4161}
4162
e6e3ea25 4163static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4164{
4165 if (!nid)
4166 return 0;
4167 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI		 4168 & (1 << 31))
4169 return 1;
314634bc
TI		 4170 return 0;
4171}
4172
d7a89436
TI		 4173/* return non-zero if the hp-pin of the given array index isn't
4174 * a jack-detection target
4175 */
4176static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4177{
4178 struct auto_pin_cfg *cfg = &spec->autocfg;
4179
4180 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4181 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4182 return 1;
c21ca4a8 4183 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4184 return 1;
4185 /* ignore if the pin is set as line-out */
4186 if (cfg->hp_pins[i] == spec->hp_switch)
4187 return 1;
4188 return 0;
4189}
4190
c6e4c666 4191static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4192{
4193 struct sigmatel_spec *spec = codec->spec;
4194 struct auto_pin_cfg *cfg = &spec->autocfg;
4195 int i, presence;
4196
eb06ed8f 4197 presence = 0;
4fe5195c
MR		 4198 if (spec->gpio_mute)
4199 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4200 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4201
eb06ed8f 4202 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4203 if (presence)
4204 break;
d7a89436
TI		 4205 if (no_hp_sensing(spec, i))
4206 continue;
e6e3ea25
TI		 4207 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4208 if (presence) {
4209 unsigned int pinctl;
4210 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4211 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4212 if (pinctl & AC_PINCTL_IN_EN)
4213 presence = 0; /* mic- or line-input */
4214 }
eb06ed8f 4215 }
4e55096e
M		 4216
4217 if (presence) {
d7a89436 4218 /* disable lineouts */
7c2ba97b 4219 if (spec->hp_switch)
d7a89436
TI		 4220 stac92xx_reset_pinctl(codec, spec->hp_switch,
4221 AC_PINCTL_OUT_EN);
4e55096e
M		 4222 for (i = 0; i < cfg->line_outs; i++)
4223 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4224 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4225 for (i = 0; i < cfg->speaker_outs; i++)
4226 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4227 AC_PINCTL_OUT_EN);
c0cea0d0 4228 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4229 stac_gpio_set(codec, spec->gpio_mask,
4230 spec->gpio_dir, spec->gpio_data &
4231 ~spec->eapd_mask);
4e55096e 4232 } else {
d7a89436 4233 /* enable lineouts */
7c2ba97b 4234 if (spec->hp_switch)
d7a89436
TI		 4235 stac92xx_set_pinctl(codec, spec->hp_switch,
4236 AC_PINCTL_OUT_EN);
4e55096e
M		 4237 for (i = 0; i < cfg->line_outs; i++)
4238 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4239 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4240 for (i = 0; i < cfg->speaker_outs; i++)
4241 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4242 AC_PINCTL_OUT_EN);
c0cea0d0 4243 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4244 stac_gpio_set(codec, spec->gpio_mask,
4245 spec->gpio_dir, spec->gpio_data |
4246 spec->eapd_mask);
4e55096e 4247 }
d7a89436
TI		 4248 /* toggle hp outs */
4249 for (i = 0; i < cfg->hp_outs; i++) {
4250 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4251 if (no_hp_sensing(spec, i))
4252 continue;
4253 if (presence)
4254 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4255#if 0 /* FIXME */
4256/* Resetting the pinctl like below may lead to (a sort of) regressions
4257 * on some devices since they use the HP pin actually for line/speaker
4258 * outs although the default pin config shows a different pin (that is
4259 * wrong and useless).
4260 *
4261 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4262 * But, disabling the code below just works around it, and I'm too tired of
4263 * bug reports with such devices...
4264 */
d7a89436
TI		 4265 else
4266 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4267#endif /* FIXME */
d7a89436 4268 }
4e55096e
M		 4269}
4270
f73d3585
TI		 4271static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4272 int enable)
a64135a2
MR		 4273{
4274 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4275 unsigned int idx, val;
4276
4277 for (idx = 0; idx < spec->num_pwrs; idx++) {
4278 if (spec->pwr_nids[idx] == nid)
4279 break;
4280 }
4281 if (idx >= spec->num_pwrs)
4282 return;
d0513fc6
MR		 4283
4284 /* several codecs have two power down bits */
4285 if (spec->pwr_mapping)
4286 idx = spec->pwr_mapping[idx];
4287 else
4288 idx = 1 << idx;
a64135a2 4289
f73d3585
TI		 4290 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4291 if (enable)
a64135a2
MR		 4292 val &= ~idx;
4293 else
4294 val |= idx;
4295
4296 /* power down unused output ports */
4297 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4298}
4299
f73d3585
TI		 4300static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4301{
e6e3ea25 4302 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4303}
a64135a2 4304
74aeaabc
MR		 4305static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4306{
4307 struct sigmatel_spec *spec = codec->spec;
4308 struct sigmatel_jack *jacks = spec->jacks.list;
4309
4310 if (jacks) {
4311 int i;
4312 for (i = 0; i < spec->jacks.used; i++) {
4313 if (jacks->nid == nid) {
4314 unsigned int pin_ctl =
4315 snd_hda_codec_read(codec, nid,
4316 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4317 0x00);
4318 int type = jacks->type;
4319 if (type == (SND_JACK_LINEOUT
4320 | SND_JACK_HEADPHONE))
4321 type = (pin_ctl & AC_PINCTL_HP_EN)
4322 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4323 snd_jack_report(jacks->jack,
e6e3ea25 4324 get_pin_presence(codec, nid)
74aeaabc
MR		 4325 ? type : 0);
4326 }
4327 jacks++;
4328 }
4329 }
4330}
a64135a2 4331
c6e4c666
TI		 4332static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4333 unsigned char type)
4334{
4335 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4336 if (!event)
4337 return;
4338 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4339}
4340
314634bc
TI		 4341static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4342{
a64135a2 4343 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4344 struct sigmatel_event *event;
4345 int tag, data;
a64135a2 4346
c6e4c666
TI		 4347 tag = (res >> 26) & 0x7f;
4348 event = stac_get_event_from_tag(codec, tag);
4349 if (!event)
4350 return;
4351
4352 switch (event->type) {
314634bc 4353 case STAC_HP_EVENT:
c6e4c666 4354 stac92xx_hp_detect(codec);
a64135a2 4355 /* fallthru */
74aeaabc 4356 case STAC_INSERT_EVENT:
a64135a2 4357 case STAC_PWR_EVENT:
c6e4c666
TI		 4358 if (spec->num_pwrs > 0)
4359 stac92xx_pin_sense(codec, event->nid);
4360 stac92xx_report_jack(codec, event->nid);
72474be6 4361 break;
c6e4c666
TI		 4362 case STAC_VREF_EVENT:
4363 data = snd_hda_codec_read(codec, codec->afg, 0,
4364 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4365 /* toggle VREF state based on GPIOx status */
4366 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4367 !!(data & (1 << event->data)));
72474be6 4368 break;
314634bc
TI		 4369 }
4370}
4371
2d34e1b3
TI		 4372#ifdef CONFIG_PROC_FS
4373static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4374 struct hda_codec *codec, hda_nid_t nid)
4375{
4376 if (nid == codec->afg)
4377 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4378 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4379}
4380
4381static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4382 struct hda_codec *codec,
4383 unsigned int verb)
4384{
4385 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4386 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4387}
4388
4389/* stac92hd71bxx, stac92hd73xx */
4390static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4391 struct hda_codec *codec, hda_nid_t nid)
4392{
4393 stac92hd_proc_hook(buffer, codec, nid);
4394 if (nid == codec->afg)
4395 analog_loop_proc_hook(buffer, codec, 0xfa0);
4396}
4397
4398static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4399 struct hda_codec *codec, hda_nid_t nid)
4400{
4401 if (nid == codec->afg)
4402 analog_loop_proc_hook(buffer, codec, 0xfe0);
4403}
4404
4405static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4406 struct hda_codec *codec, hda_nid_t nid)
4407{
4408 if (nid == codec->afg)
4409 analog_loop_proc_hook(buffer, codec, 0xfeb);
4410}
4411#else
4412#define stac92hd_proc_hook NULL
4413#define stac92hd7x_proc_hook NULL
4414#define stac9205_proc_hook NULL
4415#define stac927x_proc_hook NULL
4416#endif
4417
cb53c626 4418#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4419static int stac92xx_resume(struct hda_codec *codec)
4420{
dc81bed1
TI		 4421 struct sigmatel_spec *spec = codec->spec;
4422
11b44bbd 4423 stac92xx_set_config_regs(codec);
2c885878 4424 stac92xx_init(codec);
82beb8fd
TI		 4425 snd_hda_codec_resume_amp(codec);
4426 snd_hda_codec_resume_cache(codec);
2c885878 4427 /* fake event to set up pins again to override cached values */
dc81bed1 4428 if (spec->hp_detect)
c6e4c666
TI		 4429 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4430 STAC_HP_EVENT);
ff6fdc37
M		 4431 return 0;
4432}
c6798d2b
MR		 4433
4434static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4435{
4436 struct sigmatel_spec *spec = codec->spec;
4437 if (spec->eapd_mask)
4438 stac_gpio_set(codec, spec->gpio_mask,
4439 spec->gpio_dir, spec->gpio_data &
4440 ~spec->eapd_mask);
4441 return 0;
4442}
ff6fdc37
M		 4443#endif
4444
2f2f4251
M		 4445static struct hda_codec_ops stac92xx_patch_ops = {
4446 .build_controls = stac92xx_build_controls,
4447 .build_pcms = stac92xx_build_pcms,
4448 .init = stac92xx_init,
4449 .free = stac92xx_free,
4e55096e 4450 .unsol_event = stac92xx_unsol_event,
cb53c626 4451#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4452 .suspend = stac92xx_suspend,
ff6fdc37
M		 4453 .resume = stac92xx_resume,
4454#endif
2f2f4251
M		 4455};
4456
4457static int patch_stac9200(struct hda_codec *codec)
4458{
4459 struct sigmatel_spec *spec;
c7d4b2fa 4460 int err;
2f2f4251 4461
e560d8d8 4462 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4463 if (spec == NULL)
4464 return -ENOMEM;
4465
4466 codec->spec = spec;
a4eed138 4467 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4468 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4469 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4470 stac9200_models,
4471 stac9200_cfg_tbl);
11b44bbd
RF		 4472 if (spec->board_config < 0) {
4473 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4474 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4475 } else
4476 err = stac_save_pin_cfgs(codec,
4477 stac9200_brd_tbl[spec->board_config]);
4478 if (err < 0) {
4479 stac92xx_free(codec);
4480 return err;
403d1944 4481 }
2f2f4251
M		 4482
4483 spec->multiout.max_channels = 2;
4484 spec->multiout.num_dacs = 1;
4485 spec->multiout.dac_nids = stac9200_dac_nids;
4486 spec->adc_nids = stac9200_adc_nids;
4487 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4488 spec->num_muxes = 1;
8b65727b 4489 spec->num_dmics = 0;
9e05b7a3 4490 spec->num_adcs = 1;
a64135a2 4491 spec->num_pwrs = 0;
c7d4b2fa 4492
58eec423
MCC		 4493 if (spec->board_config == STAC_9200_M4 ||
4494 spec->board_config == STAC_9200_M4_2 ||
bf277785 4495 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4496 spec->init = stac9200_eapd_init;
4497 else
4498 spec->init = stac9200_core_init;
2f2f4251 4499 spec->mixer = stac9200_mixer;
c7d4b2fa 4500
117f257d
TI		 4501 if (spec->board_config == STAC_9200_PANASONIC) {
4502 spec->gpio_mask = spec->gpio_dir = 0x09;
4503 spec->gpio_data = 0x00;
4504 }
4505
c7d4b2fa
M		 4506 err = stac9200_parse_auto_config(codec);
4507 if (err < 0) {
4508 stac92xx_free(codec);
4509 return err;
4510 }
2f2f4251 4511
2acc9dcb
TI		 4512 /* CF-74 has no headphone detection, and the driver should *NOT*
4513 * do detection and HP/speaker toggle because the hardware does it.
4514 */
4515 if (spec->board_config == STAC_9200_PANASONIC)
4516 spec->hp_detect = 0;
4517
2f2f4251
M		 4518 codec->patch_ops = stac92xx_patch_ops;
4519
4520 return 0;
4521}
4522
8e21c34c
TD		 4523static int patch_stac925x(struct hda_codec *codec)
4524{
4525 struct sigmatel_spec *spec;
4526 int err;
4527
4528 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4529 if (spec == NULL)
4530 return -ENOMEM;
4531
4532 codec->spec = spec;
a4eed138 4533 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4534 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 4535
4536 /* Check first for codec ID */
4537 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4538 STAC_925x_MODELS,
4539 stac925x_models,
4540 stac925x_codec_id_cfg_tbl);
4541
4542 /* Now checks for PCI ID, if codec ID is not found */
4543 if (spec->board_config < 0)
4544 spec->board_config = snd_hda_check_board_config(codec,
4545 STAC_925x_MODELS,
8e21c34c
TD		 4546 stac925x_models,
4547 stac925x_cfg_tbl);
9e507abd 4548 again:
8e21c34c 4549 if (spec->board_config < 0) {
9cb36c2a 4550 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4551 "using BIOS defaults\n");
8e21c34c 4552 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4553 } else
4554 err = stac_save_pin_cfgs(codec,
4555 stac925x_brd_tbl[spec->board_config]);
4556 if (err < 0) {
4557 stac92xx_free(codec);
4558 return err;
8e21c34c
TD		 4559 }
4560
4561 spec->multiout.max_channels = 2;
4562 spec->multiout.num_dacs = 1;
4563 spec->multiout.dac_nids = stac925x_dac_nids;
4564 spec->adc_nids = stac925x_adc_nids;
4565 spec->mux_nids = stac925x_mux_nids;
4566 spec->num_muxes = 1;
9e05b7a3 4567 spec->num_adcs = 1;
a64135a2 4568 spec->num_pwrs = 0;
2c11f955
TD		 4569 switch (codec->vendor_id) {
4570 case 0x83847632: /* STAC9202 */
4571 case 0x83847633: /* STAC9202D */
4572 case 0x83847636: /* STAC9251 */
4573 case 0x83847637: /* STAC9251D */
f6e9852a 4574 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4575 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4576 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4577 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4578 break;
4579 default:
4580 spec->num_dmics = 0;
4581 break;
4582 }
8e21c34c
TD		 4583
4584 spec->init = stac925x_core_init;
4585 spec->mixer = stac925x_mixer;
4586
4587 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4588 if (!err) {
4589 if (spec->board_config < 0) {
4590 printk(KERN_WARNING "hda_codec: No auto-config is "
4591 "available, default to model=ref\n");
4592 spec->board_config = STAC_925x_REF;
4593 goto again;
4594 }
4595 err = -EINVAL;
4596 }
8e21c34c
TD		 4597 if (err < 0) {
4598 stac92xx_free(codec);
4599 return err;
4600 }
4601
4602 codec->patch_ops = stac92xx_patch_ops;
4603
4604 return 0;
4605}
4606
e1f0d669
MR		 4607static struct hda_input_mux stac92hd73xx_dmux = {
4608 .num_items = 4,
4609 .items = {
4610 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4611 { "Digital Mic 1", 0x09 },
4612 { "Digital Mic 2", 0x0a },
2a9c7816 4613 { "CD", 0x08 },
e1f0d669
MR		 4614 }
4615};
4616
4617static int patch_stac92hd73xx(struct hda_codec *codec)
4618{
4619 struct sigmatel_spec *spec;
4620 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4621 int err = 0;
c21ca4a8 4622 int num_dacs;
e1f0d669
MR		 4623
4624 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4625 if (spec == NULL)
4626 return -ENOMEM;
4627
4628 codec->spec = spec;
e99d32b3 4629 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4630 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4631 spec->pin_nids = stac92hd73xx_pin_nids;
4632 spec->board_config = snd_hda_check_board_config(codec,
4633 STAC_92HD73XX_MODELS,
4634 stac92hd73xx_models,
4635 stac92hd73xx_cfg_tbl);
4636again:
4637 if (spec->board_config < 0) {
4638 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4639 " STAC92HD73XX, using BIOS defaults\n");
4640 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4641 } else
4642 err = stac_save_pin_cfgs(codec,
4643 stac92hd73xx_brd_tbl[spec->board_config]);
4644 if (err < 0) {
4645 stac92xx_free(codec);
4646 return err;
e1f0d669
MR		 4647 }
4648
c21ca4a8 4649 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 4650 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4651
c21ca4a8 4652 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 4653 printk(KERN_WARNING "hda_codec: Could not determine "
4654 "number of channels defaulting to DAC count\n");
c21ca4a8 4655 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4656 }
c21ca4a8 4657 switch (num_dacs) {
e1f0d669
MR		 4658 case 0x3: /* 6 Channel */
4659 spec->mixer = stac92hd73xx_6ch_mixer;
4660 spec->init = stac92hd73xx_6ch_core_init;
4661 break;
4662 case 0x4: /* 8 Channel */
e1f0d669
MR		 4663 spec->mixer = stac92hd73xx_8ch_mixer;
4664 spec->init = stac92hd73xx_8ch_core_init;
4665 break;
4666 case 0x5: /* 10 Channel */
e1f0d669
MR		 4667 spec->mixer = stac92hd73xx_10ch_mixer;
4668 spec->init = stac92hd73xx_10ch_core_init;
c21ca4a8
TI		 4669 }
4670 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4671
e1f0d669
MR		 4672 spec->aloopback_mask = 0x01;
4673 spec->aloopback_shift = 8;
4674
1cd2224c 4675 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4676 spec->mux_nids = stac92hd73xx_mux_nids;
4677 spec->adc_nids = stac92hd73xx_adc_nids;
4678 spec->dmic_nids = stac92hd73xx_dmic_nids;
4679 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4680 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4681 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4682 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4683
4684 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4685 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4686 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4687 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4688 sizeof(stac92hd73xx_dmux));
4689
a7662640 4690 switch (spec->board_config) {
6b3ab21e 4691 case STAC_DELL_EQ:
d654a660 4692 spec->init = dell_eq_core_init;
6b3ab21e 4693 /* fallthru */
661cd8fb
TI		 4694 case STAC_DELL_M6_AMIC:
4695 case STAC_DELL_M6_DMIC:
4696 case STAC_DELL_M6_BOTH:
2a9c7816 4697 spec->num_smuxes = 0;
2a9c7816
MR		 4698 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4699 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4700 spec->eapd_switch = 0;
2a9c7816 4701 spec->num_amps = 1;
6b3ab21e 4702
c21ca4a8 4703 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4704 spec->init = dell_m6_core_init;
661cd8fb
TI		 4705 switch (spec->board_config) {
4706 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR		 4707 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4708 spec->num_dmics = 0;
2a9c7816 4709 spec->private_dimux.num_items = 1;
a7662640 4710 break;
661cd8fb 4711 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR		 4712 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4713 spec->num_dmics = 1;
2a9c7816 4714 spec->private_dimux.num_items = 2;
a7662640 4715 break;
661cd8fb 4716 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR		 4717 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4718 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4719 spec->num_dmics = 1;
2a9c7816 4720 spec->private_dimux.num_items = 2;
a7662640
MR		 4721 break;
4722 }
4723 break;
4724 default:
4725 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4726 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4727 spec->eapd_switch = 1;
a7662640 4728 }
b2c4f4d7
MR		 4729 if (spec->board_config > STAC_92HD73XX_REF) {
4730 /* GPIO0 High = Enable EAPD */
4731 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4732 spec->gpio_data = 0x01;
4733 }
2a9c7816 4734 spec->dinput_mux = &spec->private_dimux;
a7662640 4735
a64135a2
MR		 4736 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4737 spec->pwr_nids = stac92hd73xx_pwr_nids;
4738
d9737751 4739 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4740
4741 if (!err) {
4742 if (spec->board_config < 0) {
4743 printk(KERN_WARNING "hda_codec: No auto-config is "
4744 "available, default to model=ref\n");
4745 spec->board_config = STAC_92HD73XX_REF;
4746 goto again;
4747 }
4748 err = -EINVAL;
4749 }
4750
4751 if (err < 0) {
4752 stac92xx_free(codec);
4753 return err;
4754 }
4755
9e43f0de
TI		 4756 if (spec->board_config == STAC_92HD73XX_NO_JD)
4757 spec->hp_detect = 0;
4758
e1f0d669
MR		 4759 codec->patch_ops = stac92xx_patch_ops;
4760
2d34e1b3
TI		 4761 codec->proc_widget_hook = stac92hd7x_proc_hook;
4762
e1f0d669
MR		 4763 return 0;
4764}
4765
d0513fc6
MR		 4766static struct hda_input_mux stac92hd83xxx_dmux = {
4767 .num_items = 3,
4768 .items = {
4769 { "Analog Inputs", 0x03 },
4770 { "Digital Mic 1", 0x04 },
4771 { "Digital Mic 2", 0x05 },
4772 }
4773};
4774
4775static int patch_stac92hd83xxx(struct hda_codec *codec)
4776{
4777 struct sigmatel_spec *spec;
65557f35 4778 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 4779 int err;
65557f35 4780 int num_dacs;
d0513fc6
MR		 4781
4782 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4783 if (spec == NULL)
4784 return -ENOMEM;
4785
4786 codec->spec = spec;
0ffa9807 4787 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4788 spec->mono_nid = 0x19;
4789 spec->digbeep_nid = 0x21;
4790 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4791 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4792 spec->adc_nids = stac92hd83xxx_adc_nids;
4793 spec->pwr_nids = stac92hd83xxx_pwr_nids;
c15c5060 4794 spec->amp_nids = stac92hd83xxx_amp_nids;
d0513fc6
MR		 4795 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4796 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4797 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 4798
65557f35
MR		 4799
4800 /* set port 0xe to select the last DAC
4801 */
4802 num_dacs = snd_hda_get_connections(codec, 0x0e,
4803 conn, STAC92HD83_DAC_COUNT + 1) - 1;
4804
4805 snd_hda_codec_write_cache(codec, 0xe, 0,
4806 AC_VERB_SET_CONNECT_SEL, num_dacs);
4807
d0513fc6
MR		 4808 spec->init = stac92hd83xxx_core_init;
4809 switch (codec->vendor_id) {
4810 case 0x111d7605:
d0513fc6
MR		 4811 break;
4812 default:
4813 spec->num_pwrs--;
d0513fc6
MR		 4814 }
4815
4816 spec->mixer = stac92hd83xxx_mixer;
4817 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4818 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4819 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
c15c5060 4820 spec->num_amps = ARRAY_SIZE(stac92hd83xxx_amp_nids);
d0513fc6
MR		 4821 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4822 spec->dinput_mux = &stac92hd83xxx_dmux;
4823 spec->pin_nids = stac92hd83xxx_pin_nids;
4824 spec->board_config = snd_hda_check_board_config(codec,
4825 STAC_92HD83XXX_MODELS,
4826 stac92hd83xxx_models,
4827 stac92hd83xxx_cfg_tbl);
4828again:
4829 if (spec->board_config < 0) {
4830 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4831 " STAC92HD83XXX, using BIOS defaults\n");
4832 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4833 } else
4834 err = stac_save_pin_cfgs(codec,
4835 stac92hd83xxx_brd_tbl[spec->board_config]);
4836 if (err < 0) {
4837 stac92xx_free(codec);
4838 return err;
d0513fc6
MR		 4839 }
4840
4841 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4842 if (!err) {
4843 if (spec->board_config < 0) {
4844 printk(KERN_WARNING "hda_codec: No auto-config is "
4845 "available, default to model=ref\n");
4846 spec->board_config = STAC_92HD83XXX_REF;
4847 goto again;
4848 }
4849 err = -EINVAL;
4850 }
4851
4852 if (err < 0) {
4853 stac92xx_free(codec);
4854 return err;
4855 }
4856
4857 codec->patch_ops = stac92xx_patch_ops;
4858
2d34e1b3
TI		 4859 codec->proc_widget_hook = stac92hd_proc_hook;
4860
d0513fc6
MR		 4861 return 0;
4862}
4863
4b33c767
MR		 4864static struct hda_input_mux stac92hd71bxx_dmux = {
4865 .num_items = 4,
4866 .items = {
4867 { "Analog Inputs", 0x00 },
4868 { "Mixer", 0x01 },
4869 { "Digital Mic 1", 0x02 },
4870 { "Digital Mic 2", 0x03 },
4871 }
4872};
4873
e035b841
MR		 4874static int patch_stac92hd71bxx(struct hda_codec *codec)
4875{
4876 struct sigmatel_spec *spec;
4877 int err = 0;
4878
4879 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4880 if (spec == NULL)
4881 return -ENOMEM;
4882
4883 codec->spec = spec;
8daaaa97 4884 codec->patch_ops = stac92xx_patch_ops;
e035b841 4885 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4886 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4887 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4888 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4889 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4890 spec->board_config = snd_hda_check_board_config(codec,
4891 STAC_92HD71BXX_MODELS,
4892 stac92hd71bxx_models,
4893 stac92hd71bxx_cfg_tbl);
4894again:
4895 if (spec->board_config < 0) {
4896 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4897 " STAC92HD71BXX, using BIOS defaults\n");
4898 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4899 } else
4900 err = stac_save_pin_cfgs(codec,
4901 stac92hd71bxx_brd_tbl[spec->board_config]);
4902 if (err < 0) {
4903 stac92xx_free(codec);
4904 return err;
e035b841
MR		 4905 }
4906
41c3b648
TI		 4907 if (spec->board_config > STAC_92HD71BXX_REF) {
4908 /* GPIO0 = EAPD */
4909 spec->gpio_mask = 0x01;
4910 spec->gpio_dir = 0x01;
4911 spec->gpio_data = 0x01;
4912 }
4913
541eee87
MR		 4914 switch (codec->vendor_id) {
4915 case 0x111d76b6: /* 4 Port without Analog Mixer */
4916 case 0x111d76b7:
4917 case 0x111d76b4: /* 6 Port without Analog Mixer */
4918 case 0x111d76b5:
4919 spec->mixer = stac92hd71bxx_mixer;
4920 spec->init = stac92hd71bxx_core_init;
0ffa9807 4921 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4922 break;
aafc4412 4923 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4924 switch (spec->board_config) {
4925 case STAC_HP_M4:
72474be6 4926 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 4927 err = stac_add_event(spec, codec->afg,
4928 STAC_VREF_EVENT, 0x02);
4929 if (err < 0)
4930 return err;
c5d08bb5 4931 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4932 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4933 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4934 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4935 AC_USRSP_EN | err);
72474be6
MR		 4936 spec->gpio_mask |= 0x02;
4937 break;
4938 }
8daaaa97 4939 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4940 (codec->revision_id & 0xf) == 1)
8daaaa97 4941 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4942
aafc4412
MR		 4943 /* no output amps */
4944 spec->num_pwrs = 0;
4945 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4946 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4947
4948 /* disable VSW */
4949 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4950 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR		 4951 break;
4952 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4953 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4954 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4955
aafc4412
MR		 4956 /* no output amps */
4957 spec->num_pwrs = 0;
4958 /* fallthru */
541eee87 4959 default:
4b33c767 4960 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4961 spec->mixer = stac92hd71bxx_analog_mixer;
4962 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4963 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4964 }
4965
4b33c767 4966 spec->aloopback_mask = 0x50;
541eee87
MR		 4967 spec->aloopback_shift = 0;
4968
8daaaa97 4969 spec->powerdown_adcs = 1;
1cd2224c 4970 spec->digbeep_nid = 0x26;
e035b841
MR		 4971 spec->mux_nids = stac92hd71bxx_mux_nids;
4972 spec->adc_nids = stac92hd71bxx_adc_nids;
4973 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4974 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4975 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4976 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4977
4978 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4979 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4980
6a14f585
MR		 4981 switch (spec->board_config) {
4982 case STAC_HP_M4:
6a14f585 4983 /* enable internal microphone */
af9f341a 4984 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR		 4985 stac92xx_auto_set_pinctl(codec, 0x0e,
4986 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4987 /* fallthru */
4988 case STAC_DELL_M4_2:
4989 spec->num_dmics = 0;
4990 spec->num_smuxes = 0;
4991 spec->num_dmuxes = 0;
4992 break;
4993 case STAC_DELL_M4_1:
4994 case STAC_DELL_M4_3:
4995 spec->num_dmics = 1;
4996 spec->num_smuxes = 0;
4997 spec->num_dmuxes = 0;
6a14f585
MR		 4998 break;
4999 default:
5000 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
5001 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
5002 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
5003 };
5004
c21ca4a8 5005 spec->multiout.dac_nids = spec->dac_nids;
4b33c767
MR		 5006 if (spec->dinput_mux)
5007 spec->private_dimux.num_items +=
5008 spec->num_dmics -
5009 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 5010
5011 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
5012 if (!err) {
5013 if (spec->board_config < 0) {
5014 printk(KERN_WARNING "hda_codec: No auto-config is "
5015 "available, default to model=ref\n");
5016 spec->board_config = STAC_92HD71BXX_REF;
5017 goto again;
5018 }
5019 err = -EINVAL;
5020 }
5021
5022 if (err < 0) {
5023 stac92xx_free(codec);
5024 return err;
5025 }
5026
2d34e1b3
TI		 5027 codec->proc_widget_hook = stac92hd7x_proc_hook;
5028
e035b841
MR		 5029 return 0;
5030};
5031
2f2f4251
M		 5032static int patch_stac922x(struct hda_codec *codec)
5033{
5034 struct sigmatel_spec *spec;
c7d4b2fa 5035 int err;
2f2f4251 5036
e560d8d8 5037 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5038 if (spec == NULL)
5039 return -ENOMEM;
5040
5041 codec->spec = spec;
a4eed138 5042 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5043 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 5044 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5045 stac922x_models,
5046 stac922x_cfg_tbl);
536319af 5047 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 5048 spec->gpio_mask = spec->gpio_dir = 0x03;
5049 spec->gpio_data = 0x03;
3fc24d85
TI		 5050 /* Intel Macs have all same PCI SSID, so we need to check
5051 * codec SSID to distinguish the exact models
5052 */
6f0778d8 5053 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5054 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 5055
5056 case 0x106b0800:
5057 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5058 break;
5d5d3bc3
IZ		 5059 case 0x106b0600:
5060 case 0x106b0700:
5061 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5062 break;
5d5d3bc3
IZ		 5063 case 0x106b0e00:
5064 case 0x106b0f00:
5065 case 0x106b1600:
5066 case 0x106b1700:
5067 case 0x106b0200:
5068 case 0x106b1e00:
5069 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5070 break;
5d5d3bc3
IZ		 5071 case 0x106b1a00:
5072 case 0x00000100:
5073 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5074 break;
5d5d3bc3
IZ		 5075 case 0x106b0a00:
5076 case 0x106b2200:
5077 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5078 break;
536319af
NB		 5079 default:
5080 spec->board_config = STAC_INTEL_MAC_V3;
5081 break;
3fc24d85
TI		 5082 }
5083 }
5084
9e507abd 5085 again:
11b44bbd
RF		 5086 if (spec->board_config < 0) {
5087 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5088 "using BIOS defaults\n");
5089 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5090 } else
5091 err = stac_save_pin_cfgs(codec,
5092 stac922x_brd_tbl[spec->board_config]);
5093 if (err < 0) {
5094 stac92xx_free(codec);
5095 return err;
403d1944 5096 }
2f2f4251 5097
c7d4b2fa
M		 5098 spec->adc_nids = stac922x_adc_nids;
5099 spec->mux_nids = stac922x_mux_nids;
2549413e 5100 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5101 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5102 spec->num_dmics = 0;
a64135a2 5103 spec->num_pwrs = 0;
c7d4b2fa
M		 5104
5105 spec->init = stac922x_core_init;
2f2f4251 5106 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 5107
5108 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5109
3cc08dc6 5110 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 5111 if (!err) {
5112 if (spec->board_config < 0) {
5113 printk(KERN_WARNING "hda_codec: No auto-config is "
5114 "available, default to model=ref\n");
5115 spec->board_config = STAC_D945_REF;
5116 goto again;
5117 }
5118 err = -EINVAL;
5119 }
3cc08dc6
MP		 5120 if (err < 0) {
5121 stac92xx_free(codec);
5122 return err;
5123 }
5124
5125 codec->patch_ops = stac92xx_patch_ops;
5126
807a4636
TI		 5127 /* Fix Mux capture level; max to 2 */
5128 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5129 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5130 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5131 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5132 (0 << AC_AMPCAP_MUTE_SHIFT));
5133
3cc08dc6
MP		 5134 return 0;
5135}
5136
5137static int patch_stac927x(struct hda_codec *codec)
5138{
5139 struct sigmatel_spec *spec;
5140 int err;
5141
5142 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5143 if (spec == NULL)
5144 return -ENOMEM;
5145
5146 codec->spec = spec;
a4eed138 5147 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5148 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 5149 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5150 stac927x_models,
5151 stac927x_cfg_tbl);
9e507abd 5152 again:
8e9068b1
MR		 5153 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5154 if (spec->board_config < 0)
5155 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5156 "STAC927x, using BIOS defaults\n");
11b44bbd 5157 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5158 } else
5159 err = stac_save_pin_cfgs(codec,
5160 stac927x_brd_tbl[spec->board_config]);
5161 if (err < 0) {
5162 stac92xx_free(codec);
5163 return err;
3cc08dc6
MP		 5164 }
5165
1cd2224c 5166 spec->digbeep_nid = 0x23;
8e9068b1
MR		 5167 spec->adc_nids = stac927x_adc_nids;
5168 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5169 spec->mux_nids = stac927x_mux_nids;
5170 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 5171 spec->smux_nids = stac927x_smux_nids;
5172 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5173 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5174 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 5175 spec->multiout.dac_nids = spec->dac_nids;
5176
81d3dbde 5177 switch (spec->board_config) {
93ed1503 5178 case STAC_D965_3ST:
93ed1503 5179 case STAC_D965_5ST:
8e9068b1 5180 /* GPIO0 High = Enable EAPD */
0fc9dec4 5181 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5182 spec->gpio_data = 0x01;
8e9068b1
MR		 5183 spec->num_dmics = 0;
5184
93ed1503 5185 spec->init = d965_core_init;
9e05b7a3 5186 spec->mixer = stac927x_mixer;
81d3dbde 5187 break;
8e9068b1 5188 case STAC_DELL_BIOS:
780c8be4
MR		 5189 switch (codec->subsystem_id) {
5190 case 0x10280209:
5191 case 0x1028022e:
5192 /* correct the device field to SPDIF out */
af9f341a 5193 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR		 5194 break;
5195 };
03d7ca17 5196 /* configure the analog microphone on some laptops */
af9f341a 5197 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5198 /* correct the front output jack as a hp out */
af9f341a 5199 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5200 /* correct the front input jack as a mic */
af9f341a 5201 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5202 /* fallthru */
8e9068b1
MR		 5203 case STAC_DELL_3ST:
5204 /* GPIO2 High = Enable EAPD */
0fc9dec4 5205 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5206 spec->gpio_data = 0x04;
7f16859a
MR		 5207 spec->dmic_nids = stac927x_dmic_nids;
5208 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5209
8e9068b1
MR		 5210 spec->init = d965_core_init;
5211 spec->mixer = stac927x_mixer;
5212 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5213 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 5214 break;
5215 default:
b2c4f4d7
MR		 5216 if (spec->board_config > STAC_D965_REF) {
5217 /* GPIO0 High = Enable EAPD */
5218 spec->eapd_mask = spec->gpio_mask = 0x01;
5219 spec->gpio_dir = spec->gpio_data = 0x01;
5220 }
8e9068b1
MR		 5221 spec->num_dmics = 0;
5222
5223 spec->init = stac927x_core_init;
5224 spec->mixer = stac927x_mixer;
7f16859a
MR		 5225 }
5226
a64135a2 5227 spec->num_pwrs = 0;
e1f0d669
MR		 5228 spec->aloopback_mask = 0x40;
5229 spec->aloopback_shift = 0;
c0cea0d0 5230 spec->eapd_switch = 1;
8e9068b1 5231
3cc08dc6 5232 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5233 if (!err) {
5234 if (spec->board_config < 0) {
5235 printk(KERN_WARNING "hda_codec: No auto-config is "
5236 "available, default to model=ref\n");
5237 spec->board_config = STAC_D965_REF;
5238 goto again;
5239 }
5240 err = -EINVAL;
5241 }
c7d4b2fa
M		 5242 if (err < 0) {
5243 stac92xx_free(codec);
5244 return err;
5245 }
2f2f4251
M		 5246
5247 codec->patch_ops = stac92xx_patch_ops;
5248
2d34e1b3
TI		 5249 codec->proc_widget_hook = stac927x_proc_hook;
5250
52987656
TI		 5251 /*
5252 * !!FIXME!!
5253 * The STAC927x seem to require fairly long delays for certain
5254 * command sequences. With too short delays (even if the answer
5255 * is set to RIRB properly), it results in the silence output
5256 * on some hardwares like Dell.
5257 *
5258 * The below flag enables the longer delay (see get_response
5259 * in hda_intel.c).
5260 */
5261 codec->bus->needs_damn_long_delay = 1;
5262
e28d8322
TI		 5263 /* no jack detecion for ref-no-jd model */
5264 if (spec->board_config == STAC_D965_REF_NO_JD)
5265 spec->hp_detect = 0;
5266
2f2f4251
M		 5267 return 0;
5268}
5269
f3302a59
MP		 5270static int patch_stac9205(struct hda_codec *codec)
5271{
5272 struct sigmatel_spec *spec;
8259980e 5273 int err;
f3302a59
MP		 5274
5275 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5276 if (spec == NULL)
5277 return -ENOMEM;
5278
5279 codec->spec = spec;
a4eed138 5280 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5281 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 5282 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5283 stac9205_models,
5284 stac9205_cfg_tbl);
9e507abd 5285 again:
11b44bbd
RF		 5286 if (spec->board_config < 0) {
5287 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5288 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5289 } else
5290 err = stac_save_pin_cfgs(codec,
5291 stac9205_brd_tbl[spec->board_config]);
5292 if (err < 0) {
5293 stac92xx_free(codec);
5294 return err;
f3302a59
MP		 5295 }
5296
1cd2224c 5297 spec->digbeep_nid = 0x23;
f3302a59 5298 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5299 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5300 spec->mux_nids = stac9205_mux_nids;
2549413e 5301 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 5302 spec->smux_nids = stac9205_smux_nids;
5303 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5304 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5305 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5306 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5307 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5308 spec->num_pwrs = 0;
f3302a59
MP		 5309
5310 spec->init = stac9205_core_init;
5311 spec->mixer = stac9205_mixer;
5312
e1f0d669
MR		 5313 spec->aloopback_mask = 0x40;
5314 spec->aloopback_shift = 0;
c0cea0d0 5315 spec->eapd_switch = 1;
f3302a59 5316 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5317
ae0a8ed8 5318 switch (spec->board_config){
ae0a8ed8 5319 case STAC_9205_DELL_M43:
87d48363 5320 /* Enable SPDIF in/out */
af9f341a
TI		 5321 stac_change_pin_config(codec, 0x1f, 0x01441030);
5322 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5323
4fe5195c 5324 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 5325 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5326 if (err < 0)
5327 return err;
c5d08bb5 5328 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 5329 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5330 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 5331 AC_VERB_SET_UNSOLICITED_ENABLE,
5332 AC_USRSP_EN | err);
4fe5195c
MR		 5333
5334 spec->gpio_dir = 0x0b;
0fc9dec4 5335 spec->eapd_mask = 0x01;
4fe5195c
MR		 5336 spec->gpio_mask = 0x1b;
5337 spec->gpio_mute = 0x10;
e2e7d624 5338 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5339 * GPIO3 Low = DRM
87d48363 5340 */
4fe5195c 5341 spec->gpio_data = 0x01;
ae0a8ed8 5342 break;
b2c4f4d7
MR		 5343 case STAC_9205_REF:
5344 /* SPDIF-In enabled */
5345 break;
ae0a8ed8
TD		 5346 default:
5347 /* GPIO0 High = EAPD */
0fc9dec4 5348 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5349 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5350 break;
5351 }
33382403 5352
f3302a59 5353 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5354 if (!err) {
5355 if (spec->board_config < 0) {
5356 printk(KERN_WARNING "hda_codec: No auto-config is "
5357 "available, default to model=ref\n");
5358 spec->board_config = STAC_9205_REF;
5359 goto again;
5360 }
5361 err = -EINVAL;
5362 }
f3302a59
MP		 5363 if (err < 0) {
5364 stac92xx_free(codec);
5365 return err;
5366 }
5367
5368 codec->patch_ops = stac92xx_patch_ops;
5369
2d34e1b3
TI		 5370 codec->proc_widget_hook = stac9205_proc_hook;
5371
f3302a59
MP		 5372 return 0;
5373}
5374
db064e50 5375/*
6d859065 5376 * STAC9872 hack
db064e50
TI		 5377 */
5378
1e137f92 5379static struct hda_verb stac9872_core_init[] = {
1624cb9a 5380 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5381 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5382 {}
5383};
5384
caa10b6e
TI		 5385static struct snd_kcontrol_new stac9872_mixer[] = {
5386 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5387 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5388 STAC_INPUT_SOURCE(1),
5389 { } /* end */
5390};
5391
5392static hda_nid_t stac9872_pin_nids[] = {
5393 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
5394 0x11, 0x13, 0x14,
5395};
5396
5397static hda_nid_t stac9872_adc_nids[] = {
5398 0x8 /*,0x6*/
5399};
5400
5401static hda_nid_t stac9872_mux_nids[] = {
5402 0x15
5403};
5404
6d859065 5405static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5406{
5407 struct sigmatel_spec *spec;
1e137f92 5408 int err;
db064e50 5409
db064e50
TI		 5410 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5411 if (spec == NULL)
5412 return -ENOMEM;
db064e50 5413 codec->spec = spec;
caa10b6e 5414
1e137f92 5415#if 0 /* no model right now */
caa10b6e
TI		 5416 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5417 stac9872_models,
5418 stac9872_cfg_tbl);
1e137f92 5419#endif
db064e50 5420
1e137f92
TI		 5421 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
5422 spec->pin_nids = stac9872_pin_nids;
5423 spec->multiout.dac_nids = spec->dac_nids;
5424 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
5425 spec->adc_nids = stac9872_adc_nids;
5426 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
5427 spec->mux_nids = stac9872_mux_nids;
5428 spec->mixer = stac9872_mixer;
5429 spec->init = stac9872_core_init;
5430
5431 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
5432 if (err < 0) {
5433 stac92xx_free(codec);
5434 return -EINVAL;
5435 }
5436 spec->input_mux = &spec->private_imux;
5437 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI		 5438 return 0;
5439}
5440
5441
2f2f4251
M		 5442/*
5443 * patch entries
5444 */
1289e9e8 5445static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 5446 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5447 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5448 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5449 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5450 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5451 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5452 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5453 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5454 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5455 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5456 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5457 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5458 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5459 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5460 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5461 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5462 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5463 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5464 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5465 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5466 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5467 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5468 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5469 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5470 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5471 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5472 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5473 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5474 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5475 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5476 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5477 /* The following does not take into account .id=0x83847661 when subsys =
5478 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5479 * currently not fully supported.
5480 */
5481 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5482 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5483 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5484 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5485 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5486 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5487 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5488 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5489 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5490 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5491 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5492 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5493 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5494 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5495 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5496 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5497 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5498 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5499 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5500 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5501 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5502 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5503 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5504 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5505 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5506 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5507 {} /* terminator */
5508};
1289e9e8
TI		 5509
5510MODULE_ALIAS("snd-hda-codec-id:8384*");
5511MODULE_ALIAS("snd-hda-codec-id:111d*");
5512
5513MODULE_LICENSE("GPL");
5514MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5515
5516static struct hda_codec_preset_list sigmatel_list = {
5517 .preset = snd_hda_preset_sigmatel,
5518 .owner = THIS_MODULE,
5519};
5520
5521static int __init patch_sigmatel_init(void)
5522{
5523 return snd_hda_add_codec_preset(&sigmatel_list);
5524}
5525
5526static void __exit patch_sigmatel_exit(void)
5527{
5528 snd_hda_delete_codec_preset(&sigmatel_list);
5529}
5530
5531module_init(patch_sigmatel_init)
5532module_exit(patch_sigmatel_exit)
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