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ALSA: hda - Fix missing initialization of NID 0x0e for STAC925x
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1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
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8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
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27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
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34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
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38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
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45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
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48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
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MCC
58 STAC_9200_M4,
59 STAC_9200_M4_2,
117f257d 60 STAC_9200_PANASONIC,
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61 STAC_9200_MODELS
62};
63
64enum {
65 STAC_9205_REF,
dfe495d0 66 STAC_9205_DELL_M42,
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67 STAC_9205_DELL_M43,
68 STAC_9205_DELL_M44,
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69 STAC_9205_MODELS
70};
71
e1f0d669 72enum {
9e43f0de 73 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 74 STAC_92HD73XX_REF,
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75 STAC_DELL_M6_AMIC,
76 STAC_DELL_M6_DMIC,
77 STAC_DELL_M6_BOTH,
6b3ab21e 78 STAC_DELL_EQ,
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79 STAC_92HD73XX_MODELS
80};
81
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82enum {
83 STAC_92HD83XXX_REF,
84 STAC_92HD83XXX_MODELS
85};
86
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87enum {
88 STAC_92HD71BXX_REF,
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89 STAC_DELL_M4_1,
90 STAC_DELL_M4_2,
3a7abfd2 91 STAC_DELL_M4_3,
6a14f585 92 STAC_HP_M4,
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93 STAC_92HD71BXX_MODELS
94};
95
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96enum {
97 STAC_925x_REF,
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98 STAC_M1,
99 STAC_M1_2,
100 STAC_M2,
8e21c34c 101 STAC_M2_2,
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102 STAC_M3,
103 STAC_M5,
104 STAC_M6,
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105 STAC_925x_MODELS
106};
107
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108enum {
109 STAC_D945_REF,
110 STAC_D945GTP3,
111 STAC_D945GTP5,
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112 STAC_INTEL_MAC_V1,
113 STAC_INTEL_MAC_V2,
114 STAC_INTEL_MAC_V3,
115 STAC_INTEL_MAC_V4,
116 STAC_INTEL_MAC_V5,
536319af
NB
117 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
118 * is given, one of the above models will be
119 * chosen according to the subsystem id. */
dfe495d0 120 /* for backward compatibility */
f5fcc13c 121 STAC_MACMINI,
3fc24d85 122 STAC_MACBOOK,
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NB
123 STAC_MACBOOK_PRO_V1,
124 STAC_MACBOOK_PRO_V2,
f16928fb 125 STAC_IMAC_INTEL,
0dae0f83 126 STAC_IMAC_INTEL_20,
8c650087 127 STAC_ECS_202,
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128 STAC_922X_DELL_D81,
129 STAC_922X_DELL_D82,
130 STAC_922X_DELL_M81,
131 STAC_922X_DELL_M82,
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132 STAC_922X_MODELS
133};
134
135enum {
e28d8322 136 STAC_D965_REF_NO_JD, /* no jack-detection */
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137 STAC_D965_REF,
138 STAC_D965_3ST,
139 STAC_D965_5ST,
4ff076e5 140 STAC_DELL_3ST,
8e9068b1 141 STAC_DELL_BIOS,
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142 STAC_927X_MODELS
143};
403d1944 144
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145struct sigmatel_event {
146 hda_nid_t nid;
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147 unsigned char type;
148 unsigned char tag;
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149 int data;
150};
151
152struct sigmatel_jack {
153 hda_nid_t nid;
154 int type;
155 struct snd_jack *jack;
156};
157
2f2f4251 158struct sigmatel_spec {
c8b6bf9b 159 struct snd_kcontrol_new *mixers[4];
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160 unsigned int num_mixers;
161
403d1944 162 int board_config;
c0cea0d0 163 unsigned int eapd_switch: 1;
c7d4b2fa 164 unsigned int surr_switch: 1;
3cc08dc6 165 unsigned int alt_switch: 1;
82bc955f 166 unsigned int hp_detect: 1;
00ef50c2 167 unsigned int spdif_mute: 1;
c7d4b2fa 168
4fe5195c 169 /* gpio lines */
0fc9dec4 170 unsigned int eapd_mask;
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171 unsigned int gpio_mask;
172 unsigned int gpio_dir;
173 unsigned int gpio_data;
174 unsigned int gpio_mute;
175
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176 /* stream */
177 unsigned int stream_delay;
178
4fe5195c 179 /* analog loopback */
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180 unsigned char aloopback_mask;
181 unsigned char aloopback_shift;
8259980e 182
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183 /* power management */
184 unsigned int num_pwrs;
d0513fc6 185 unsigned int *pwr_mapping;
a64135a2 186 hda_nid_t *pwr_nids;
b76c850f 187 hda_nid_t *dac_list;
a64135a2 188
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189 /* jack detection */
190 struct snd_array jacks;
191
192 /* events */
193 struct snd_array events;
194
2f2f4251 195 /* playback */
b22b4821 196 struct hda_input_mux *mono_mux;
89385035 197 struct hda_input_mux *amp_mux;
b22b4821 198 unsigned int cur_mmux;
2f2f4251 199 struct hda_multi_out multiout;
3cc08dc6 200 hda_nid_t dac_nids[5];
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TI
201 hda_nid_t hp_dacs[5];
202 hda_nid_t speaker_dacs[5];
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203
204 /* capture */
205 hda_nid_t *adc_nids;
2f2f4251 206 unsigned int num_adcs;
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207 hda_nid_t *mux_nids;
208 unsigned int num_muxes;
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209 hda_nid_t *dmic_nids;
210 unsigned int num_dmics;
e1f0d669 211 hda_nid_t *dmux_nids;
1697055e 212 unsigned int num_dmuxes;
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213 hda_nid_t *smux_nids;
214 unsigned int num_smuxes;
65973632 215 const char **spdif_labels;
d9737751 216
dabbed6f 217 hda_nid_t dig_in_nid;
b22b4821 218 hda_nid_t mono_nid;
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219 hda_nid_t anabeep_nid;
220 hda_nid_t digbeep_nid;
2f2f4251 221
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222 /* pin widgets */
223 hda_nid_t *pin_nids;
224 unsigned int num_pins;
2f2f4251 225 unsigned int *pin_configs;
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226
227 /* codec specific stuff */
228 struct hda_verb *init;
c8b6bf9b 229 struct snd_kcontrol_new *mixer;
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230
231 /* capture source */
8b65727b 232 struct hda_input_mux *dinput_mux;
e1f0d669 233 unsigned int cur_dmux[2];
c7d4b2fa 234 struct hda_input_mux *input_mux;
3cc08dc6 235 unsigned int cur_mux[3];
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236 struct hda_input_mux *sinput_mux;
237 unsigned int cur_smux[2];
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238 unsigned int cur_amux;
239 hda_nid_t *amp_nids;
240 unsigned int num_amps;
8daaaa97 241 unsigned int powerdown_adcs;
2f2f4251 242
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243 /* i/o switches */
244 unsigned int io_switch[2];
0fb87bb4 245 unsigned int clfe_swap;
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TI
246 hda_nid_t line_switch; /* shared line-in for input and output */
247 hda_nid_t mic_switch; /* shared mic-in for input and output */
248 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 249 unsigned int aloopback;
2f2f4251 250
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M
251 struct hda_pcm pcm_rec[2]; /* PCM information */
252
253 /* dynamic controls and input_mux */
254 struct auto_pin_cfg autocfg;
603c4019 255 struct snd_array kctls;
8b65727b 256 struct hda_input_mux private_dimux;
c7d4b2fa 257 struct hda_input_mux private_imux;
d9737751 258 struct hda_input_mux private_smux;
89385035 259 struct hda_input_mux private_amp_mux;
b22b4821 260 struct hda_input_mux private_mono_mux;
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261};
262
263static hda_nid_t stac9200_adc_nids[1] = {
264 0x03,
265};
266
267static hda_nid_t stac9200_mux_nids[1] = {
268 0x0c,
269};
270
271static hda_nid_t stac9200_dac_nids[1] = {
272 0x02,
273};
274
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MR
275static hda_nid_t stac92hd73xx_pwr_nids[8] = {
276 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
277 0x0f, 0x10, 0x11
278};
279
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280static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
281 0x26, 0,
282};
283
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284static hda_nid_t stac92hd73xx_adc_nids[2] = {
285 0x1a, 0x1b
286};
287
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288#define DELL_M6_AMP 2
289static hda_nid_t stac92hd73xx_amp_nids[3] = {
290 0x0b, 0x0c, 0x0e
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MR
291};
292
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293#define STAC92HD73XX_NUM_DMICS 2
294static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
295 0x13, 0x14, 0
296};
297
298#define STAC92HD73_DAC_COUNT 5
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299
300static hda_nid_t stac92hd73xx_mux_nids[4] = {
301 0x28, 0x29, 0x2a, 0x2b,
302};
303
304static hda_nid_t stac92hd73xx_dmux_nids[2] = {
305 0x20, 0x21,
306};
307
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308static hda_nid_t stac92hd73xx_smux_nids[2] = {
309 0x22, 0x23,
310};
311
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312#define STAC92HD83XXX_NUM_DMICS 2
313static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
314 0x11, 0x12, 0
315};
316
d0513fc6 317#define STAC92HD83_DAC_COUNT 3
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MR
318
319static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
320 0x17, 0x18,
321};
322
323static hda_nid_t stac92hd83xxx_adc_nids[2] = {
324 0x15, 0x16,
325};
326
327static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
328 0xa, 0xb, 0xd, 0xe,
329};
330
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331static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
332 0x1e, 0,
333};
334
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335static unsigned int stac92hd83xxx_pwr_mapping[4] = {
336 0x03, 0x0c, 0x10, 0x40,
337};
338
9248f269 339static hda_nid_t stac92hd83xxx_amp_nids[1] = {
c15c5060
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340 0xc,
341};
342
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343static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
344 0x0a, 0x0d, 0x0f
345};
346
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347static hda_nid_t stac92hd71bxx_adc_nids[2] = {
348 0x12, 0x13,
349};
350
351static hda_nid_t stac92hd71bxx_mux_nids[2] = {
352 0x1a, 0x1b
353};
354
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MR
355static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
356 0x1c, 0x1d,
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357};
358
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359static hda_nid_t stac92hd71bxx_smux_nids[2] = {
360 0x24, 0x25,
361};
362
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363#define STAC92HD71BXX_NUM_DMICS 2
364static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
365 0x18, 0x19, 0
366};
367
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368static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
369 0x22, 0
370};
371
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TD
372static hda_nid_t stac925x_adc_nids[1] = {
373 0x03,
374};
375
376static hda_nid_t stac925x_mux_nids[1] = {
377 0x0f,
378};
379
380static hda_nid_t stac925x_dac_nids[1] = {
381 0x02,
382};
383
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TI
384#define STAC925X_NUM_DMICS 1
385static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
386 0x15, 0
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TD
387};
388
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TI
389static hda_nid_t stac925x_dmux_nids[1] = {
390 0x14,
391};
392
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393static hda_nid_t stac922x_adc_nids[2] = {
394 0x06, 0x07,
395};
396
397static hda_nid_t stac922x_mux_nids[2] = {
398 0x12, 0x13,
399};
400
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MP
401static hda_nid_t stac927x_adc_nids[3] = {
402 0x07, 0x08, 0x09
403};
404
405static hda_nid_t stac927x_mux_nids[3] = {
406 0x15, 0x16, 0x17
407};
408
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409static hda_nid_t stac927x_smux_nids[1] = {
410 0x21,
411};
412
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413static hda_nid_t stac927x_dac_nids[6] = {
414 0x02, 0x03, 0x04, 0x05, 0x06, 0
415};
416
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417static hda_nid_t stac927x_dmux_nids[1] = {
418 0x1b,
419};
420
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421#define STAC927X_NUM_DMICS 2
422static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
423 0x13, 0x14, 0
424};
425
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MR
426static const char *stac927x_spdif_labels[5] = {
427 "Digital Playback", "ADAT", "Analog Mux 1",
428 "Analog Mux 2", "Analog Mux 3"
429};
430
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MP
431static hda_nid_t stac9205_adc_nids[2] = {
432 0x12, 0x13
433};
434
435static hda_nid_t stac9205_mux_nids[2] = {
436 0x19, 0x1a
437};
438
e1f0d669 439static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 440 0x1d,
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MR
441};
442
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443static hda_nid_t stac9205_smux_nids[1] = {
444 0x21,
445};
446
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447#define STAC9205_NUM_DMICS 2
448static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
449 0x17, 0x18, 0
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MP
450};
451
c7d4b2fa 452static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD
453 0x08, 0x09, 0x0d, 0x0e,
454 0x0f, 0x10, 0x11, 0x12,
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455};
456
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TD
457static hda_nid_t stac925x_pin_nids[8] = {
458 0x07, 0x08, 0x0a, 0x0b,
459 0x0c, 0x0d, 0x10, 0x11,
460};
461
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462static hda_nid_t stac922x_pin_nids[10] = {
463 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
464 0x0f, 0x10, 0x11, 0x15, 0x1b,
465};
466
a7662640 467static hda_nid_t stac92hd73xx_pin_nids[13] = {
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468 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
469 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 470 0x14, 0x22, 0x23
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471};
472
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473static hda_nid_t stac92hd83xxx_pin_nids[14] = {
474 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
475 0x0f, 0x10, 0x11, 0x12, 0x13,
476 0x1d, 0x1e, 0x1f, 0x20
477};
0ffa9807 478static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR
479 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
480 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 481 0x1f,
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482};
483
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MP
484static hda_nid_t stac927x_pin_nids[14] = {
485 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
486 0x0f, 0x10, 0x11, 0x12, 0x13,
487 0x14, 0x21, 0x22, 0x23,
488};
489
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490static hda_nid_t stac9205_pin_nids[12] = {
491 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
492 0x0f, 0x14, 0x16, 0x17, 0x18,
493 0x21, 0x22,
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494};
495
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496#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
497
498static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
499 struct snd_ctl_elem_value *ucontrol)
500{
501 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
502 struct sigmatel_spec *spec = codec->spec;
503 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
504
505 kcontrol->private_value ^= get_amp_nid(kcontrol);
506 kcontrol->private_value |= nid;
507
508 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
509}
510
511static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
512 struct snd_ctl_elem_value *ucontrol)
513{
514 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
515 struct sigmatel_spec *spec = codec->spec;
516 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
517
518 kcontrol->private_value ^= get_amp_nid(kcontrol);
519 kcontrol->private_value |= nid;
520
521 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
522}
523
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524static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
525 struct snd_ctl_elem_info *uinfo)
526{
527 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
528 struct sigmatel_spec *spec = codec->spec;
529 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
530}
531
532static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
533 struct snd_ctl_elem_value *ucontrol)
534{
535 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
536 struct sigmatel_spec *spec = codec->spec;
e1f0d669 537 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 538
e1f0d669 539 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
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MP
540 return 0;
541}
542
543static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
544 struct snd_ctl_elem_value *ucontrol)
545{
546 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
547 struct sigmatel_spec *spec = codec->spec;
e1f0d669 548 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP
549
550 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 551 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP
552}
553
d9737751
MR
554static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
555 struct snd_ctl_elem_info *uinfo)
556{
557 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
558 struct sigmatel_spec *spec = codec->spec;
559 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
560}
561
562static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
563 struct snd_ctl_elem_value *ucontrol)
564{
565 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
566 struct sigmatel_spec *spec = codec->spec;
567 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
568
569 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
570 return 0;
571}
572
573static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
574 struct snd_ctl_elem_value *ucontrol)
575{
576 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
577 struct sigmatel_spec *spec = codec->spec;
00ef50c2 578 struct hda_input_mux *smux = &spec->private_smux;
d9737751 579 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR
580 int err, val;
581 hda_nid_t nid;
d9737751 582
00ef50c2 583 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 584 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR
585 if (err < 0)
586 return err;
587
588 if (spec->spdif_mute) {
589 if (smux_idx == 0)
590 nid = spec->multiout.dig_out_nid;
591 else
592 nid = codec->slave_dig_outs[smux_idx - 1];
593 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 594 val = HDA_AMP_MUTE;
00ef50c2 595 else
c9b46f91 596 val = 0;
00ef50c2 597 /* un/mute SPDIF out */
c9b46f91
TI
598 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
599 HDA_AMP_MUTE, val);
00ef50c2
MR
600 }
601 return 0;
d9737751
MR
602}
603
c8b6bf9b 604static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M
605{
606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
607 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 608 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M
609}
610
c8b6bf9b 611static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
612{
613 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
614 struct sigmatel_spec *spec = codec->spec;
615 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
616
617 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
618 return 0;
619}
620
c8b6bf9b 621static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
622{
623 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
624 struct sigmatel_spec *spec = codec->spec;
625 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
626
c7d4b2fa 627 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M
628 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
629}
630
b22b4821
MR
631static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
632 struct snd_ctl_elem_info *uinfo)
633{
634 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
635 struct sigmatel_spec *spec = codec->spec;
636 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
637}
638
639static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
640 struct snd_ctl_elem_value *ucontrol)
641{
642 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
643 struct sigmatel_spec *spec = codec->spec;
644
645 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
646 return 0;
647}
648
649static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
650 struct snd_ctl_elem_value *ucontrol)
651{
652 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
653 struct sigmatel_spec *spec = codec->spec;
654
655 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
656 spec->mono_nid, &spec->cur_mmux);
657}
658
89385035
MR
659static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
660 struct snd_ctl_elem_info *uinfo)
661{
662 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
663 struct sigmatel_spec *spec = codec->spec;
664 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
665}
666
667static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
668 struct snd_ctl_elem_value *ucontrol)
669{
670 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
671 struct sigmatel_spec *spec = codec->spec;
672
673 ucontrol->value.enumerated.item[0] = spec->cur_amux;
674 return 0;
675}
676
677static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
678 struct snd_ctl_elem_value *ucontrol)
679{
680 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
681 struct sigmatel_spec *spec = codec->spec;
682 struct snd_kcontrol *ctl =
683 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
684 if (!ctl)
685 return -EINVAL;
686
687 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
688 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
689
690 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
691 0, &spec->cur_amux);
692}
693
5f10c4a9
ML
694#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
695
696static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
697 struct snd_ctl_elem_value *ucontrol)
698{
699 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 700 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML
701 struct sigmatel_spec *spec = codec->spec;
702
e1f0d669
MR
703 ucontrol->value.integer.value[0] = !!(spec->aloopback &
704 (spec->aloopback_mask << idx));
5f10c4a9
ML
705 return 0;
706}
707
708static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
709 struct snd_ctl_elem_value *ucontrol)
710{
711 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
712 struct sigmatel_spec *spec = codec->spec;
e1f0d669 713 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 714 unsigned int dac_mode;
e1f0d669 715 unsigned int val, idx_val;
5f10c4a9 716
e1f0d669
MR
717 idx_val = spec->aloopback_mask << idx;
718 if (ucontrol->value.integer.value[0])
719 val = spec->aloopback | idx_val;
720 else
721 val = spec->aloopback & ~idx_val;
68ea7b2f 722 if (spec->aloopback == val)
5f10c4a9
ML
723 return 0;
724
68ea7b2f 725 spec->aloopback = val;
5f10c4a9 726
e1f0d669
MR
727 /* Only return the bits defined by the shift value of the
728 * first two bytes of the mask
729 */
5f10c4a9 730 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR
731 kcontrol->private_value & 0xFFFF, 0x0);
732 dac_mode >>= spec->aloopback_shift;
5f10c4a9 733
e1f0d669 734 if (spec->aloopback & idx_val) {
5f10c4a9 735 snd_hda_power_up(codec);
e1f0d669 736 dac_mode |= idx_val;
5f10c4a9
ML
737 } else {
738 snd_hda_power_down(codec);
e1f0d669 739 dac_mode &= ~idx_val;
5f10c4a9
ML
740 }
741
742 snd_hda_codec_write_cache(codec, codec->afg, 0,
743 kcontrol->private_value >> 16, dac_mode);
744
745 return 1;
746}
747
c7d4b2fa 748static struct hda_verb stac9200_core_init[] = {
2f2f4251 749 /* set dac0mux for dac converter */
c7d4b2fa 750 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M
751 {}
752};
753
1194b5b7
TI
754static struct hda_verb stac9200_eapd_init[] = {
755 /* set dac0mux for dac converter */
756 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
757 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
758 {}
759};
760
e1f0d669
MR
761static struct hda_verb stac92hd73xx_6ch_core_init[] = {
762 /* set master volume and direct control */
763 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
764 /* setup adcs to point to mixer */
765 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
766 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
767 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
768 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
769 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
770 /* setup import muxs */
771 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
772 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
773 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
774 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
775 {}
776};
777
d654a660
MR
778static struct hda_verb dell_eq_core_init[] = {
779 /* set master volume to max value without distortion
780 * and direct control */
781 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR
782 /* setup adcs to point to mixer */
783 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
784 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
785 /* setup import muxs */
786 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
787 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
788 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
789 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
790 {}
791};
792
52fe0f9d 793static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 794 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR
795 /* setup adcs to point to mixer */
796 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
797 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
798 /* setup import muxs */
799 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
800 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
801 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
802 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
803 {}
804};
805
e1f0d669
MR
806static struct hda_verb stac92hd73xx_8ch_core_init[] = {
807 /* set master volume and direct control */
808 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
809 /* setup adcs to point to mixer */
810 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
811 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
812 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
813 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
814 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
815 /* setup import muxs */
816 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
817 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
818 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
819 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
820 {}
821};
822
823static struct hda_verb stac92hd73xx_10ch_core_init[] = {
824 /* set master volume and direct control */
825 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
826 /* dac3 is connected to import3 mux */
827 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR
828 /* setup adcs to point to mixer */
829 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
830 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
831 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
832 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
833 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
834 /* setup import muxs */
835 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
836 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
837 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
838 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
839 {}
840};
841
d0513fc6
MR
842static struct hda_verb stac92hd83xxx_core_init[] = {
843 /* start of config #1 */
844 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
845
846 /* start of config #2 */
847 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
848 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
849 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
850
851 /* power state controls amps */
852 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 853 {}
d0513fc6
MR
854};
855
e035b841 856static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR
857 /* set master volume and direct control */
858 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
541eee87
MR
859 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
860 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
861 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
862 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
574f3c4f 863 {}
541eee87
MR
864};
865
4b33c767 866#define HD_DISABLE_PORTF 2
541eee87 867static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR
868 /* start of config #1 */
869
870 /* connect port 0f to audio mixer */
871 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR
872 /* unmute right and left channels for node 0x0f */
873 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
874 /* start of config #2 */
875
e035b841
MR
876 /* set master volume and direct control */
877 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
aafc4412 878 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR
879 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
880 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
881 {}
882};
883
8e21c34c
TD
884static struct hda_verb stac925x_core_init[] = {
885 /* set dac0mux for dac converter */
886 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
2465fb66
TI
887 /* unmute and set max the selector */
888 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f },
8e21c34c
TD
889 {}
890};
891
c7d4b2fa 892static struct hda_verb stac922x_core_init[] = {
2f2f4251 893 /* set master volume and direct control */
c7d4b2fa 894 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M
895 {}
896};
897
93ed1503 898static struct hda_verb d965_core_init[] = {
19039bd0 899 /* set master volume and direct control */
93ed1503 900 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI
901 /* unmute node 0x1b */
902 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
903 /* select node 0x03 as DAC */
904 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
905 {}
906};
907
3cc08dc6
MP
908static struct hda_verb stac927x_core_init[] = {
909 /* set master volume and direct control */
910 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR
911 /* enable analog pc beep path */
912 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP
913 {}
914};
915
f3302a59
MP
916static struct hda_verb stac9205_core_init[] = {
917 /* set master volume and direct control */
918 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR
919 /* enable analog pc beep path */
920 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP
921 {}
922};
923
b22b4821
MR
924#define STAC_MONO_MUX \
925 { \
926 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
927 .name = "Mono Mux", \
928 .count = 1, \
929 .info = stac92xx_mono_mux_enum_info, \
930 .get = stac92xx_mono_mux_enum_get, \
931 .put = stac92xx_mono_mux_enum_put, \
932 }
933
89385035
MR
934#define STAC_AMP_MUX \
935 { \
936 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
937 .name = "Amp Selector Capture Switch", \
938 .count = 1, \
939 .info = stac92xx_amp_mux_enum_info, \
940 .get = stac92xx_amp_mux_enum_get, \
941 .put = stac92xx_amp_mux_enum_put, \
942 }
943
944#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
945 { \
946 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
947 .name = xname, \
948 .index = 0, \
949 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
950 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
951 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
952 .info = stac92xx_amp_volume_info, \
953 .get = stac92xx_amp_volume_get, \
954 .put = stac92xx_amp_volume_put, \
955 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
956 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
957 }
958
9e05b7a3 959#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML
960 { \
961 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
962 .name = "Input Source", \
9e05b7a3 963 .count = cnt, \
ca7c5a8b
ML
964 .info = stac92xx_mux_enum_info, \
965 .get = stac92xx_mux_enum_get, \
966 .put = stac92xx_mux_enum_put, \
967 }
968
e1f0d669 969#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML
970 { \
971 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
972 .name = "Analog Loopback", \
e1f0d669 973 .count = cnt, \
5f10c4a9
ML
974 .info = stac92xx_aloopback_info, \
975 .get = stac92xx_aloopback_get, \
976 .put = stac92xx_aloopback_put, \
977 .private_value = verb_read | (verb_write << 16), \
978 }
979
c8b6bf9b 980static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M
981 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
982 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 983 STAC_INPUT_SOURCE(1),
2f2f4251
M
984 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
985 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M
986 { } /* end */
987};
988
2a9c7816 989#define DELL_M6_MIXER 6
e1f0d669 990static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 991 /* start of config #1 */
e1f0d669
MR
992 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
993 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
994
e1f0d669
MR
995 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
996 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
997
2a9c7816
MR
998 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
999 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1000
1001 /* start of config #2 */
1002 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1003 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1004
e1f0d669
MR
1005 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1006 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1007
2a9c7816
MR
1008 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1009
1010 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1011 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1012
1013 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1014 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1015
e1f0d669
MR
1016 { } /* end */
1017};
1018
1019static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR
1020 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1021
e1f0d669
MR
1022 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1023 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1024
1025 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1026 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1027
1028 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1029 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1030
1031 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1032 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1033
1034 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1035 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1036
1037 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1038 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1039
1040 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1041 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1042 { } /* end */
1043};
1044
1045static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR
1046 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1047
e1f0d669
MR
1048 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1049 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1050
1051 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1052 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1053
1054 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1055 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1056
1057 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1058 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1059
1060 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1061 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1062
1063 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1064 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1065
1066 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1067 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1068 { } /* end */
1069};
1070
d0513fc6
MR
1071
1072static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1073 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1074 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1075
1076 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1077 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1078
74b7ff48
MR
1079 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT),
1080 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT),
d0513fc6 1081
74b7ff48
MR
1082 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT),
1083 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT),
d0513fc6 1084
74b7ff48
MR
1085 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT),
1086 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT),
d0513fc6 1087
74b7ff48
MR
1088 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT),
1089 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT),
d0513fc6
MR
1090
1091 /*
74b7ff48
MR
1092 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT),
1093 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT),
d0513fc6
MR
1094 */
1095 { } /* end */
1096};
1097
541eee87 1098static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1099 STAC_INPUT_SOURCE(2),
4b33c767 1100 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1101
9b35947f
MR
1102 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1103 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR
1104
1105 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1106 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR
1107 /* analog pc-beep replaced with digital beep support */
1108 /*
f7c5dda2
MR
1109 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1110 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1111 */
f7c5dda2 1112
687cb98e
MR
1113 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1114 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1115
687cb98e
MR
1116 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1117 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR
1118
1119 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1120 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1121
1122 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1123 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR
1124 { } /* end */
1125};
1126
541eee87 1127static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR
1128 STAC_INPUT_SOURCE(2),
1129 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1130
541eee87
MR
1131 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1132 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR
1133
1134 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1135 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR
1136 { } /* end */
1137};
1138
8e21c34c 1139static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1140 STAC_INPUT_SOURCE(1),
8e21c34c 1141 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1142 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD
1143 { } /* end */
1144};
1145
9e05b7a3 1146static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1147 STAC_INPUT_SOURCE(2),
e1f0d669 1148 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML
1149
1150 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1151 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1152
1153 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1154 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M
1155 { } /* end */
1156};
1157
19039bd0 1158/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML
1159static struct snd_kcontrol_new stac922x_mixer[] = {
1160 STAC_INPUT_SOURCE(2),
9e05b7a3
ML
1161 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1162 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML
1163
1164 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1165 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI
1166 { } /* end */
1167};
1168
9e05b7a3 1169
d1d985f0 1170static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1171 STAC_INPUT_SOURCE(3),
e1f0d669 1172 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1173
9e05b7a3
ML
1174 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1175 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1176
1177 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1178 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1179
1180 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1181 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP
1182 { } /* end */
1183};
1184
1697055e
TI
1185static struct snd_kcontrol_new stac_dmux_mixer = {
1186 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1187 .name = "Digital Input Source",
1188 /* count set later */
1189 .info = stac92xx_dmux_enum_info,
1190 .get = stac92xx_dmux_enum_get,
1191 .put = stac92xx_dmux_enum_put,
1192};
1193
d9737751
MR
1194static struct snd_kcontrol_new stac_smux_mixer = {
1195 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1196 .name = "IEC958 Playback Source",
d9737751
MR
1197 /* count set later */
1198 .info = stac92xx_smux_enum_info,
1199 .get = stac92xx_smux_enum_get,
1200 .put = stac92xx_smux_enum_put,
1201};
1202
2134ea4f
TI
1203static const char *slave_vols[] = {
1204 "Front Playback Volume",
1205 "Surround Playback Volume",
1206 "Center Playback Volume",
1207 "LFE Playback Volume",
1208 "Side Playback Volume",
1209 "Headphone Playback Volume",
1210 "Headphone Playback Volume",
1211 "Speaker Playback Volume",
1212 "External Speaker Playback Volume",
1213 "Speaker2 Playback Volume",
1214 NULL
1215};
1216
1217static const char *slave_sws[] = {
1218 "Front Playback Switch",
1219 "Surround Playback Switch",
1220 "Center Playback Switch",
1221 "LFE Playback Switch",
1222 "Side Playback Switch",
1223 "Headphone Playback Switch",
1224 "Headphone Playback Switch",
1225 "Speaker Playback Switch",
1226 "External Speaker Playback Switch",
1227 "Speaker2 Playback Switch",
edb54a55 1228 "IEC958 Playback Switch",
2134ea4f
TI
1229 NULL
1230};
1231
603c4019 1232static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1233static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1234
2f2f4251
M
1235static int stac92xx_build_controls(struct hda_codec *codec)
1236{
1237 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI
1238 struct auto_pin_cfg *cfg = &spec->autocfg;
1239 hda_nid_t nid;
2f2f4251 1240 int err;
c7d4b2fa 1241 int i;
2f2f4251
M
1242
1243 err = snd_hda_add_new_ctls(codec, spec->mixer);
1244 if (err < 0)
1245 return err;
c7d4b2fa
M
1246
1247 for (i = 0; i < spec->num_mixers; i++) {
1248 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1249 if (err < 0)
1250 return err;
1251 }
1697055e
TI
1252 if (spec->num_dmuxes > 0) {
1253 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1254 err = snd_hda_ctl_add(codec,
1697055e
TI
1255 snd_ctl_new1(&stac_dmux_mixer, codec));
1256 if (err < 0)
1257 return err;
1258 }
d9737751 1259 if (spec->num_smuxes > 0) {
00ef50c2
MR
1260 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1261 struct hda_input_mux *smux = &spec->private_smux;
1262 /* check for mute support on SPDIF out */
1263 if (wcaps & AC_WCAP_OUT_AMP) {
1264 smux->items[smux->num_items].label = "Off";
1265 smux->items[smux->num_items].index = 0;
1266 smux->num_items++;
1267 spec->spdif_mute = 1;
1268 }
d9737751 1269 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1270 err = snd_hda_ctl_add(codec,
d9737751
MR
1271 snd_ctl_new1(&stac_smux_mixer, codec));
1272 if (err < 0)
1273 return err;
1274 }
c7d4b2fa 1275
dabbed6f
M
1276 if (spec->multiout.dig_out_nid) {
1277 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1278 if (err < 0)
1279 return err;
9a08160b
TI
1280 err = snd_hda_create_spdif_share_sw(codec,
1281 &spec->multiout);
1282 if (err < 0)
1283 return err;
1284 spec->multiout.share_spdif = 1;
dabbed6f 1285 }
da74ae3e 1286 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M
1287 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1288 if (err < 0)
1289 return err;
1290 }
2134ea4f
TI
1291
1292 /* if we have no master control, let's create it */
1293 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1294 unsigned int vmaster_tlv[4];
2134ea4f 1295 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1296 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1297 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1298 vmaster_tlv, slave_vols);
2134ea4f
TI
1299 if (err < 0)
1300 return err;
1301 }
1302 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1303 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1304 NULL, slave_sws);
1305 if (err < 0)
1306 return err;
1307 }
1308
603c4019 1309 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI
1310
1311 /* create jack input elements */
1312 if (spec->hp_detect) {
1313 for (i = 0; i < cfg->hp_outs; i++) {
1314 int type = SND_JACK_HEADPHONE;
1315 nid = cfg->hp_pins[i];
1316 /* jack detection */
1317 if (cfg->hp_outs == i)
1318 type |= SND_JACK_LINEOUT;
1319 err = stac92xx_add_jack(codec, nid, type);
1320 if (err < 0)
1321 return err;
1322 }
1323 }
1324 for (i = 0; i < cfg->line_outs; i++) {
1325 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1326 SND_JACK_LINEOUT);
1327 if (err < 0)
1328 return err;
1329 }
1330 for (i = 0; i < AUTO_PIN_LAST; i++) {
1331 nid = cfg->input_pins[i];
1332 if (nid) {
1333 err = stac92xx_add_jack(codec, nid,
1334 SND_JACK_MICROPHONE);
1335 if (err < 0)
1336 return err;
1337 }
1338 }
1339
dabbed6f 1340 return 0;
2f2f4251
M
1341}
1342
403d1944 1343static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1344 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M
1345 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1346};
1347
58eec423
MCC
1348static unsigned int gateway9200_m4_pin_configs[8] = {
1349 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1350 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1351};
1352static unsigned int gateway9200_m4_2_pin_configs[8] = {
1353 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1354 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1355};
1356
1357/*
dfe495d0
TI
1358 STAC 9200 pin configs for
1359 102801A8
1360 102801DE
1361 102801E8
1362*/
1363static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI
1364 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1365 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI
1366};
1367
1368/*
1369 STAC 9200 pin configs for
1370 102801C0
1371 102801C1
1372*/
1373static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI
1374 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1375 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1376};
1377
1378/*
1379 STAC 9200 pin configs for
1380 102801C4 (Dell Dimension E310)
1381 102801C5
1382 102801C7
1383 102801D9
1384 102801DA
1385 102801E3
1386*/
1387static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI
1388 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1389 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1390};
1391
1392
1393/*
1394 STAC 9200-32 pin configs for
1395 102801B5 (Dell Inspiron 630m)
1396 102801D8 (Dell Inspiron 640m)
1397*/
1398static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI
1399 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1400 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1401};
1402
1403/*
1404 STAC 9200-32 pin configs for
1405 102801C2 (Dell Latitude D620)
1406 102801C8
1407 102801CC (Dell Latitude D820)
1408 102801D4
1409 102801D6
1410*/
1411static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI
1412 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1413 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI
1414};
1415
1416/*
1417 STAC 9200-32 pin configs for
1418 102801CE (Dell XPS M1710)
1419 102801CF (Dell Precision M90)
1420*/
1421static unsigned int dell9200_m23_pin_configs[8] = {
1422 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1423 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1424};
1425
1426/*
1427 STAC 9200-32 pin configs for
1428 102801C9
1429 102801CA
1430 102801CB (Dell Latitude 120L)
1431 102801D3
1432*/
1433static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI
1434 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1435 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1436};
1437
1438/*
1439 STAC 9200-32 pin configs for
1440 102801BD (Dell Inspiron E1505n)
1441 102801EE
1442 102801EF
1443*/
1444static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI
1445 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1446 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1447};
1448
1449/*
1450 STAC 9200-32 pin configs for
1451 102801F5 (Dell Inspiron 1501)
1452 102801F6
1453*/
1454static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI
1455 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1456 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1457};
1458
1459/*
1460 STAC 9200-32
1461 102801CD (Dell Inspiron E1705/9400)
1462*/
1463static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI
1464 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1465 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI
1466};
1467
bf277785
TD
1468static unsigned int oqo9200_pin_configs[8] = {
1469 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1470 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1471};
1472
dfe495d0 1473
f5fcc13c
TI
1474static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1475 [STAC_REF] = ref9200_pin_configs,
bf277785 1476 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI
1477 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1478 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1479 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1480 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1481 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1482 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1483 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1484 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1485 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1486 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC
1487 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1488 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1489 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP
1490};
1491
f5fcc13c
TI
1492static const char *stac9200_models[STAC_9200_MODELS] = {
1493 [STAC_REF] = "ref",
bf277785 1494 [STAC_9200_OQO] = "oqo",
dfe495d0
TI
1495 [STAC_9200_DELL_D21] = "dell-d21",
1496 [STAC_9200_DELL_D22] = "dell-d22",
1497 [STAC_9200_DELL_D23] = "dell-d23",
1498 [STAC_9200_DELL_M21] = "dell-m21",
1499 [STAC_9200_DELL_M22] = "dell-m22",
1500 [STAC_9200_DELL_M23] = "dell-m23",
1501 [STAC_9200_DELL_M24] = "dell-m24",
1502 [STAC_9200_DELL_M25] = "dell-m25",
1503 [STAC_9200_DELL_M26] = "dell-m26",
1504 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC
1505 [STAC_9200_M4] = "gateway-m4",
1506 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1507 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI
1508};
1509
1510static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1511 /* SigmaTel reference board */
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1513 "DFI LanParty", STAC_REF),
e7377071 1514 /* Dell laptops have BIOS problem */
dfe495d0
TI
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1516 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI
1518 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1520 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1522 "unknown Dell", STAC_9200_DELL_D22),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1524 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI
1526 "Dell Latitude D620", STAC_9200_DELL_M22),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1528 "unknown Dell", STAC_9200_DELL_D23),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1530 "unknown Dell", STAC_9200_DELL_D23),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1532 "unknown Dell", STAC_9200_DELL_M22),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1534 "unknown Dell", STAC_9200_DELL_M24),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1536 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1538 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1540 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1542 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1544 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI
1546 "Dell Precision M90", STAC_9200_DELL_M23),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1548 "unknown Dell", STAC_9200_DELL_M22),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1550 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1552 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI
1554 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1556 "unknown Dell", STAC_9200_DELL_D23),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1558 "unknown Dell", STAC_9200_DELL_D23),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1560 "unknown Dell", STAC_9200_DELL_D21),
1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1562 "unknown Dell", STAC_9200_DELL_D23),
1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1564 "unknown Dell", STAC_9200_DELL_D21),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1566 "unknown Dell", STAC_9200_DELL_M25),
1567 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1568 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1569 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI
1570 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1571 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1572 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1573 /* Panasonic */
117f257d 1574 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1575 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC
1576 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1577 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1578 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD
1579 /* OQO Mobile */
1580 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP
1581 {} /* terminator */
1582};
1583
8e21c34c
TD
1584static unsigned int ref925x_pin_configs[8] = {
1585 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1586 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD
1587};
1588
9cb36c2a
MCC
1589static unsigned int stac925xM1_pin_configs[8] = {
1590 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1591 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD
1592};
1593
9cb36c2a
MCC
1594static unsigned int stac925xM1_2_pin_configs[8] = {
1595 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1596 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1597};
58eec423 1598
9cb36c2a
MCC
1599static unsigned int stac925xM2_pin_configs[8] = {
1600 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1601 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD
1602};
1603
8e21c34c 1604static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC
1605 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1606 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1607};
1608
9cb36c2a
MCC
1609static unsigned int stac925xM3_pin_configs[8] = {
1610 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1611 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1612};
58eec423 1613
9cb36c2a
MCC
1614static unsigned int stac925xM5_pin_configs[8] = {
1615 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1616 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1617};
1618
9cb36c2a
MCC
1619static unsigned int stac925xM6_pin_configs[8] = {
1620 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1621 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD
1622};
1623
1624static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1625 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC
1626 [STAC_M1] = stac925xM1_pin_configs,
1627 [STAC_M1_2] = stac925xM1_2_pin_configs,
1628 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1629 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC
1630 [STAC_M3] = stac925xM3_pin_configs,
1631 [STAC_M5] = stac925xM5_pin_configs,
1632 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD
1633};
1634
1635static const char *stac925x_models[STAC_925x_MODELS] = {
1636 [STAC_REF] = "ref",
9cb36c2a
MCC
1637 [STAC_M1] = "m1",
1638 [STAC_M1_2] = "m1-2",
1639 [STAC_M2] = "m2",
8e21c34c 1640 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC
1641 [STAC_M3] = "m3",
1642 [STAC_M5] = "m5",
1643 [STAC_M6] = "m6",
8e21c34c
TD
1644};
1645
9cb36c2a 1646static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC
1647 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1648 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1649 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1650 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1651 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC
1652 /* Not sure about the brand name for those */
1653 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1654 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1655 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1656 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1657 {} /* terminator */
8e21c34c
TD
1658};
1659
1660static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1661 /* SigmaTel reference board */
1662 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1663 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC
1664
1665 /* Default table for unknown ID */
1666 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1667
8e21c34c
TD
1668 {} /* terminator */
1669};
1670
a7662640 1671static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR
1672 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1673 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1674 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR
1675 0x01452050,
1676};
1677
1678static unsigned int dell_m6_pin_configs[13] = {
1679 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1680 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1681 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1682 0x4f0000f0,
e1f0d669
MR
1683};
1684
1685static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1686 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI
1687 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1688 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1689 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1690 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR
1691};
1692
1693static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1694 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1695 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI
1696 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1697 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1698 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1699 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR
1700};
1701
1702static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1703 /* SigmaTel reference board */
1704 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR
1705 "DFI LanParty", STAC_92HD73XX_REF),
1706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1707 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1709 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1711 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1713 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1715 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1717 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI
1719 "unknown Dell", STAC_DELL_M6_DMIC),
1720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1721 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1723 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS
1724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1725 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR
1726 {} /* terminator */
1727};
1728
d0513fc6
MR
1729static unsigned int ref92hd83xxx_pin_configs[14] = {
1730 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1731 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1732 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1733 0x01451160, 0x98560170,
1734};
1735
1736static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1737 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1738};
1739
1740static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1741 [STAC_92HD83XXX_REF] = "ref",
1742};
1743
1744static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1745 /* SigmaTel reference board */
1746 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1747 "DFI LanParty", STAC_92HD83XXX_REF),
574f3c4f 1748 {} /* terminator */
d0513fc6
MR
1749};
1750
0ffa9807 1751static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1752 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1753 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1754 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR
1755};
1756
0ffa9807 1757static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1758 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1759 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1760 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1761};
1762
0ffa9807 1763static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR
1764 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1765 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1766 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR
1767};
1768
3a7abfd2
MR
1769static unsigned int dell_m4_3_pin_configs[11] = {
1770 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1771 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1772 0x40f000f0, 0x044413b0, 0x044413b0,
1773};
1774
e035b841
MR
1775static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1776 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR
1777 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1778 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1779 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1780 [STAC_HP_M4] = NULL,
e035b841
MR
1781};
1782
1783static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1784 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR
1785 [STAC_DELL_M4_1] = "dell-m4-1",
1786 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1787 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1788 [STAC_HP_M4] = "hp-m4",
e035b841
MR
1789};
1790
1791static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1792 /* SigmaTel reference board */
1793 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1794 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI
1795 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1796 "HP dv5", STAC_HP_M4),
1797 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1798 "HP dv7", STAC_HP_M4),
69dfaefe
TI
1799 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc,
1800 "HP dv7", STAC_HP_M4),
dafb70ce
GB
1801 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603,
1802 "HP dv5", STAC_HP_M4),
9a9e2359
MR
1803 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1804 "unknown HP", STAC_HP_M4),
a7662640
MR
1805 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1806 "unknown Dell", STAC_DELL_M4_1),
1807 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1808 "unknown Dell", STAC_DELL_M4_1),
1809 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1810 "unknown Dell", STAC_DELL_M4_1),
1811 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1812 "unknown Dell", STAC_DELL_M4_1),
1813 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1814 "unknown Dell", STAC_DELL_M4_1),
1815 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1816 "unknown Dell", STAC_DELL_M4_1),
1817 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1818 "unknown Dell", STAC_DELL_M4_1),
1819 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1820 "unknown Dell", STAC_DELL_M4_2),
1821 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1822 "unknown Dell", STAC_DELL_M4_2),
1823 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1824 "unknown Dell", STAC_DELL_M4_2),
1825 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1826 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR
1827 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1828 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR
1829 {} /* terminator */
1830};
1831
403d1944
MP
1832static unsigned int ref922x_pin_configs[10] = {
1833 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1834 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M
1835 0x40000100, 0x40000100,
1836};
1837
dfe495d0
TI
1838/*
1839 STAC 922X pin configs for
1840 102801A7
1841 102801AB
1842 102801A9
1843 102801D1
1844 102801D2
1845*/
1846static unsigned int dell_922x_d81_pin_configs[10] = {
1847 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1848 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1849 0x01813122, 0x400001f2,
1850};
1851
1852/*
1853 STAC 922X pin configs for
1854 102801AC
1855 102801D0
1856*/
1857static unsigned int dell_922x_d82_pin_configs[10] = {
1858 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1859 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1860 0x01813122, 0x400001f1,
1861};
1862
1863/*
1864 STAC 922X pin configs for
1865 102801BF
1866*/
1867static unsigned int dell_922x_m81_pin_configs[10] = {
1868 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1869 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1870 0x40C003f1, 0x405003f0,
1871};
1872
1873/*
1874 STAC 9221 A1 pin configs for
1875 102801D7 (Dell XPS M1210)
1876*/
1877static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ
1878 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1879 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI
1880 0x508003f3, 0x405003f4,
1881};
1882
403d1944 1883static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1884 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP
1885 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1886 0x02a19120, 0x40000100,
1887};
1888
1889static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP
1890 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1891 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP
1892 0x02a19320, 0x40000100,
1893};
1894
5d5d3bc3
IZ
1895static unsigned int intel_mac_v1_pin_configs[10] = {
1896 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1897 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1898 0x400000fc, 0x400000fb,
1899};
1900
1901static unsigned int intel_mac_v2_pin_configs[10] = {
1902 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1903 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1904 0x400000fc, 0x400000fb,
6f0778d8
NB
1905};
1906
5d5d3bc3
IZ
1907static unsigned int intel_mac_v3_pin_configs[10] = {
1908 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1909 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI
1910 0x400000fc, 0x400000fb,
1911};
1912
5d5d3bc3
IZ
1913static unsigned int intel_mac_v4_pin_configs[10] = {
1914 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1915 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF
1916 0x400000fc, 0x400000fb,
1917};
1918
5d5d3bc3
IZ
1919static unsigned int intel_mac_v5_pin_configs[10] = {
1920 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1921 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1922 0x400000fc, 0x400000fb,
0dae0f83
TI
1923};
1924
8c650087
MCC
1925static unsigned int ecs202_pin_configs[10] = {
1926 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1927 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1928 0x9037012e, 0x40e000f2,
1929};
76c08828 1930
19039bd0 1931static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1932 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI
1933 [STAC_D945GTP3] = d945gtp3_pin_configs,
1934 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ
1935 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1936 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1937 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1938 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1939 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1940 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1941 /* for backward compatibility */
5d5d3bc3
IZ
1942 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1943 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1944 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1945 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1946 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1947 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1948 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI
1949 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1950 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1951 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1952 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP
1953};
1954
f5fcc13c
TI
1955static const char *stac922x_models[STAC_922X_MODELS] = {
1956 [STAC_D945_REF] = "ref",
1957 [STAC_D945GTP5] = "5stack",
1958 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ
1959 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1960 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1961 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1962 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1963 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1964 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1965 /* for backward compatibility */
f5fcc13c 1966 [STAC_MACMINI] = "macmini",
3fc24d85 1967 [STAC_MACBOOK] = "macbook",
6f0778d8
NB
1968 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1969 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1970 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1971 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1972 [STAC_ECS_202] = "ecs202",
dfe495d0
TI
1973 [STAC_922X_DELL_D81] = "dell-d81",
1974 [STAC_922X_DELL_D82] = "dell-d82",
1975 [STAC_922X_DELL_M81] = "dell-m81",
1976 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI
1977};
1978
1979static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1980 /* SigmaTel reference board */
1981 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1982 "DFI LanParty", STAC_D945_REF),
1983 /* Intel 945G based systems */
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1985 "Intel D945G", STAC_D945GTP3),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1987 "Intel D945G", STAC_D945GTP3),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1989 "Intel D945G", STAC_D945GTP3),
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1991 "Intel D945G", STAC_D945GTP3),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1993 "Intel D945G", STAC_D945GTP3),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1995 "Intel D945G", STAC_D945GTP3),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1997 "Intel D945G", STAC_D945GTP3),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1999 "Intel D945G", STAC_D945GTP3),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2001 "Intel D945G", STAC_D945GTP3),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2003 "Intel D945G", STAC_D945GTP3),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2005 "Intel D945G", STAC_D945GTP3),
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2007 "Intel D945G", STAC_D945GTP3),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2009 "Intel D945G", STAC_D945GTP3),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2011 "Intel D945G", STAC_D945GTP3),
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2013 "Intel D945G", STAC_D945GTP3),
2014 /* Intel D945G 5-stack systems */
2015 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2016 "Intel D945G", STAC_D945GTP5),
2017 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2018 "Intel D945G", STAC_D945GTP5),
2019 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2020 "Intel D945G", STAC_D945GTP5),
2021 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2022 "Intel D945G", STAC_D945GTP5),
2023 /* Intel 945P based systems */
2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2025 "Intel D945P", STAC_D945GTP3),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2027 "Intel D945P", STAC_D945GTP3),
2028 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2029 "Intel D945P", STAC_D945GTP3),
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2031 "Intel D945P", STAC_D945GTP3),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2033 "Intel D945P", STAC_D945GTP3),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2035 "Intel D945P", STAC_D945GTP5),
2036 /* other systems */
536319af 2037 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2038 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2039 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI
2040 /* Dell systems */
2041 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2042 "unknown Dell", STAC_922X_DELL_D81),
2043 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2044 "unknown Dell", STAC_922X_DELL_D81),
2045 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2046 "unknown Dell", STAC_922X_DELL_D81),
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2048 "unknown Dell", STAC_922X_DELL_D82),
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2050 "unknown Dell", STAC_922X_DELL_M81),
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2052 "unknown Dell", STAC_922X_DELL_D82),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2054 "unknown Dell", STAC_922X_DELL_D81),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2056 "unknown Dell", STAC_922X_DELL_D81),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2058 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC
2059 /* ECS/PC Chips boards */
2060 SND_PCI_QUIRK(0x1019, 0x2144,
2061 "ECS/PC chips", STAC_ECS_202),
2062 SND_PCI_QUIRK(0x1019, 0x2608,
2063 "ECS/PC chips", STAC_ECS_202),
2064 SND_PCI_QUIRK(0x1019, 0x2633,
2065 "ECS/PC chips P17G/1333", STAC_ECS_202),
2066 SND_PCI_QUIRK(0x1019, 0x2811,
2067 "ECS/PC chips", STAC_ECS_202),
2068 SND_PCI_QUIRK(0x1019, 0x2812,
2069 "ECS/PC chips", STAC_ECS_202),
2070 SND_PCI_QUIRK(0x1019, 0x2813,
2071 "ECS/PC chips", STAC_ECS_202),
2072 SND_PCI_QUIRK(0x1019, 0x2814,
2073 "ECS/PC chips", STAC_ECS_202),
2074 SND_PCI_QUIRK(0x1019, 0x2815,
2075 "ECS/PC chips", STAC_ECS_202),
2076 SND_PCI_QUIRK(0x1019, 0x2816,
2077 "ECS/PC chips", STAC_ECS_202),
2078 SND_PCI_QUIRK(0x1019, 0x2817,
2079 "ECS/PC chips", STAC_ECS_202),
2080 SND_PCI_QUIRK(0x1019, 0x2818,
2081 "ECS/PC chips", STAC_ECS_202),
2082 SND_PCI_QUIRK(0x1019, 0x2819,
2083 "ECS/PC chips", STAC_ECS_202),
2084 SND_PCI_QUIRK(0x1019, 0x2820,
2085 "ECS/PC chips", STAC_ECS_202),
403d1944
MP
2086 {} /* terminator */
2087};
2088
3cc08dc6 2089static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD
2090 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2091 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2092 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2093 0x01c42190, 0x40000100,
3cc08dc6
MP
2094};
2095
93ed1503 2096static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD
2097 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2098 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2099 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2100 0x40000100, 0x40000100
2101};
2102
93ed1503
TD
2103static unsigned int d965_5st_pin_configs[14] = {
2104 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2105 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2106 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2107 0x40000100, 0x40000100
2108};
2109
4ff076e5
TD
2110static unsigned int dell_3st_pin_configs[14] = {
2111 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2112 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2113 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD
2114 0x40c003fc, 0x40000100
2115};
2116
93ed1503 2117static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2118 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR
2119 [STAC_D965_REF] = ref927x_pin_configs,
2120 [STAC_D965_3ST] = d965_3st_pin_configs,
2121 [STAC_D965_5ST] = d965_5st_pin_configs,
2122 [STAC_DELL_3ST] = dell_3st_pin_configs,
2123 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP
2124};
2125
f5fcc13c 2126static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2127 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR
2128 [STAC_D965_REF] = "ref",
2129 [STAC_D965_3ST] = "3stack",
2130 [STAC_D965_5ST] = "5stack",
2131 [STAC_DELL_3ST] = "dell-3stack",
2132 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI
2133};
2134
2135static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2136 /* SigmaTel reference board */
2137 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2138 "DFI LanParty", STAC_D965_REF),
81d3dbde 2139 /* Intel 946 based systems */
f5fcc13c
TI
2140 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2141 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2142 /* 965 based 3 stack systems */
f5fcc13c
TI
2143 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2144 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2145 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2146 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2147 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2148 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2149 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2150 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2151 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2152 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2153 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2154 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2155 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2157 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2158 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2159 /* Dell 3 stack systems */
8e9068b1 2160 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2161 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD
2162 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2163 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2164 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR
2165 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2167 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR
2169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2173 /* 965 based 5 stack systems */
f5fcc13c
TI
2174 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2175 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2176 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2177 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2178 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2179 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2181 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2182 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP
2183 {} /* terminator */
2184};
2185
f3302a59
MP
2186static unsigned int ref9205_pin_configs[12] = {
2187 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2188 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2189 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP
2190};
2191
dfe495d0
TI
2192/*
2193 STAC 9205 pin configs for
2194 102801F1
2195 102801F2
2196 102801FC
2197 102801FD
2198 10280204
2199 1028021F
3fa2ef74 2200 10280228 (Dell Vostro 1500)
dfe495d0
TI
2201*/
2202static unsigned int dell_9205_m42_pin_configs[12] = {
2203 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2204 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2205 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2206};
2207
2208/*
2209 STAC 9205 pin configs for
2210 102801F9
2211 102801FA
2212 102801FE
2213 102801FF (Dell Precision M4300)
2214 10280206
2215 10280200
2216 10280201
2217*/
2218static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD
2219 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2220 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2221 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2222};
2223
dfe495d0 2224static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD
2225 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2226 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2227 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2228};
2229
f5fcc13c 2230static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2231 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI
2232 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2233 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2234 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP
2235};
2236
f5fcc13c
TI
2237static const char *stac9205_models[STAC_9205_MODELS] = {
2238 [STAC_9205_REF] = "ref",
dfe495d0 2239 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD
2240 [STAC_9205_DELL_M43] = "dell-m43",
2241 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI
2242};
2243
2244static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2245 /* SigmaTel reference board */
2246 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2247 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI
2248 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2249 "unknown Dell", STAC_9205_DELL_M42),
2250 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2251 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2252 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2253 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2254 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2255 "Dell Precision", STAC_9205_DELL_M43),
2256 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2257 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI
2258 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2259 "unknown Dell", STAC_9205_DELL_M42),
2260 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2261 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD
2262 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2263 "Dell Precision", STAC_9205_DELL_M43),
2264 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2265 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI
2266 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2267 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI
2268 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2269 "Dell Precision", STAC_9205_DELL_M43),
2270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2271 "Dell Precision", STAC_9205_DELL_M43),
2272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2273 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2275 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR
2276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2277 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP
2278 {} /* terminator */
2279};
2280
11b44bbd
RF
2281static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2282{
2283 int i;
2284 struct sigmatel_spec *spec = codec->spec;
2285
af9f341a
TI
2286 kfree(spec->pin_configs);
2287 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2288 GFP_KERNEL);
2289 if (!spec->pin_configs)
2290 return -ENOMEM;
11b44bbd
RF
2291
2292 for (i = 0; i < spec->num_pins; i++) {
2293 hda_nid_t nid = spec->pin_nids[i];
2294 unsigned int pin_cfg;
2295
2296 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2297 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2298 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2299 nid, pin_cfg);
af9f341a 2300 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF
2301 }
2302
2303 return 0;
2304}
2305
87d48363
MR
2306static void stac92xx_set_config_reg(struct hda_codec *codec,
2307 hda_nid_t pin_nid, unsigned int pin_config)
2308{
2309 int i;
2310 snd_hda_codec_write(codec, pin_nid, 0,
2311 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2312 pin_config & 0x000000ff);
2313 snd_hda_codec_write(codec, pin_nid, 0,
2314 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2315 (pin_config & 0x0000ff00) >> 8);
2316 snd_hda_codec_write(codec, pin_nid, 0,
2317 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2318 (pin_config & 0x00ff0000) >> 16);
2319 snd_hda_codec_write(codec, pin_nid, 0,
2320 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2321 pin_config >> 24);
2322 i = snd_hda_codec_read(codec, pin_nid, 0,
2323 AC_VERB_GET_CONFIG_DEFAULT,
2324 0x00);
2325 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2326 pin_nid, i);
2327}
2328
2f2f4251
M
2329static void stac92xx_set_config_regs(struct hda_codec *codec)
2330{
2331 int i;
2332 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2333
87d48363
MR
2334 if (!spec->pin_configs)
2335 return;
11b44bbd 2336
87d48363
MR
2337 for (i = 0; i < spec->num_pins; i++)
2338 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2339 spec->pin_configs[i]);
2f2f4251 2340}
2f2f4251 2341
af9f341a
TI
2342static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2343{
2344 struct sigmatel_spec *spec = codec->spec;
2345
2346 if (!pins)
2347 return stac92xx_save_bios_config_regs(codec);
2348
2349 kfree(spec->pin_configs);
2350 spec->pin_configs = kmemdup(pins,
2351 spec->num_pins * sizeof(*pins),
2352 GFP_KERNEL);
2353 if (!spec->pin_configs)
2354 return -ENOMEM;
2355
2356 stac92xx_set_config_regs(codec);
2357 return 0;
2358}
2359
2360static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2361 unsigned int cfg)
2362{
2363 struct sigmatel_spec *spec = codec->spec;
2364 int i;
2365
2366 for (i = 0; i < spec->num_pins; i++) {
2367 if (spec->pin_nids[i] == nid) {
2368 spec->pin_configs[i] = cfg;
2369 stac92xx_set_config_reg(codec, nid, cfg);
2370 break;
2371 }
2372 }
2373}
2374
dabbed6f 2375/*
c7d4b2fa 2376 * Analog playback callbacks
dabbed6f 2377 */
c7d4b2fa
M
2378static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2379 struct hda_codec *codec,
c8b6bf9b 2380 struct snd_pcm_substream *substream)
2f2f4251 2381{
dabbed6f 2382 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR
2383 if (spec->stream_delay)
2384 msleep(spec->stream_delay);
9a08160b
TI
2385 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2386 hinfo);
2f2f4251
M
2387}
2388
2f2f4251
M
2389static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2390 struct hda_codec *codec,
2391 unsigned int stream_tag,
2392 unsigned int format,
c8b6bf9b 2393 struct snd_pcm_substream *substream)
2f2f4251
M
2394{
2395 struct sigmatel_spec *spec = codec->spec;
403d1944 2396 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M
2397}
2398
2399static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2400 struct hda_codec *codec,
c8b6bf9b 2401 struct snd_pcm_substream *substream)
2f2f4251
M
2402{
2403 struct sigmatel_spec *spec = codec->spec;
2404 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2405}
2406
dabbed6f
M
2407/*
2408 * Digital playback callbacks
2409 */
2410static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2411 struct hda_codec *codec,
c8b6bf9b 2412 struct snd_pcm_substream *substream)
dabbed6f
M
2413{
2414 struct sigmatel_spec *spec = codec->spec;
2415 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2416}
2417
2418static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2419 struct hda_codec *codec,
c8b6bf9b 2420 struct snd_pcm_substream *substream)
dabbed6f
M
2421{
2422 struct sigmatel_spec *spec = codec->spec;
2423 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2424}
2425
6b97eb45
TI
2426static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2427 struct hda_codec *codec,
2428 unsigned int stream_tag,
2429 unsigned int format,
2430 struct snd_pcm_substream *substream)
2431{
2432 struct sigmatel_spec *spec = codec->spec;
2433 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2434 stream_tag, format, substream);
2435}
2436
dabbed6f 2437
2f2f4251
M
2438/*
2439 * Analog capture callbacks
2440 */
2441static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2442 struct hda_codec *codec,
2443 unsigned int stream_tag,
2444 unsigned int format,
c8b6bf9b 2445 struct snd_pcm_substream *substream)
2f2f4251
M
2446{
2447 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2448 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2449
8daaaa97
MR
2450 if (spec->powerdown_adcs) {
2451 msleep(40);
8c2f767b 2452 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR
2453 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2454 }
2455 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M
2456 return 0;
2457}
2458
2459static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2460 struct hda_codec *codec,
c8b6bf9b 2461 struct snd_pcm_substream *substream)
2f2f4251
M
2462{
2463 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2464 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2465
8daaaa97
MR
2466 snd_hda_codec_cleanup_stream(codec, nid);
2467 if (spec->powerdown_adcs)
8c2f767b 2468 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2469 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M
2470 return 0;
2471}
2472
dabbed6f
M
2473static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2474 .substreams = 1,
2475 .channels_min = 2,
2476 .channels_max = 2,
2477 /* NID is set in stac92xx_build_pcms */
2478 .ops = {
2479 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI
2480 .close = stac92xx_dig_playback_pcm_close,
2481 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M
2482 },
2483};
2484
2485static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2486 .substreams = 1,
2487 .channels_min = 2,
2488 .channels_max = 2,
2489 /* NID is set in stac92xx_build_pcms */
2490};
2491
2f2f4251
M
2492static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2493 .substreams = 1,
2494 .channels_min = 2,
c7d4b2fa 2495 .channels_max = 8,
2f2f4251
M
2496 .nid = 0x02, /* NID to query formats and rates */
2497 .ops = {
2498 .open = stac92xx_playback_pcm_open,
2499 .prepare = stac92xx_playback_pcm_prepare,
2500 .cleanup = stac92xx_playback_pcm_cleanup
2501 },
2502};
2503
3cc08dc6
MP
2504static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2505 .substreams = 1,
2506 .channels_min = 2,
2507 .channels_max = 2,
2508 .nid = 0x06, /* NID to query formats and rates */
2509 .ops = {
2510 .open = stac92xx_playback_pcm_open,
2511 .prepare = stac92xx_playback_pcm_prepare,
2512 .cleanup = stac92xx_playback_pcm_cleanup
2513 },
2514};
2515
2f2f4251 2516static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M
2517 .channels_min = 2,
2518 .channels_max = 2,
9e05b7a3 2519 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M
2520 .ops = {
2521 .prepare = stac92xx_capture_pcm_prepare,
2522 .cleanup = stac92xx_capture_pcm_cleanup
2523 },
2524};
2525
2526static int stac92xx_build_pcms(struct hda_codec *codec)
2527{
2528 struct sigmatel_spec *spec = codec->spec;
2529 struct hda_pcm *info = spec->pcm_rec;
2530
2531 codec->num_pcms = 1;
2532 codec->pcm_info = info;
2533
c7d4b2fa 2534 info->name = "STAC92xx Analog";
2f2f4251 2535 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2536 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2537 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2538 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP
2539
2540 if (spec->alt_switch) {
2541 codec->num_pcms++;
2542 info++;
2543 info->name = "STAC92xx Analog Alt";
2544 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2545 }
2f2f4251 2546
dabbed6f
M
2547 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2548 codec->num_pcms++;
2549 info++;
2550 info->name = "STAC92xx Digital";
7ba72ba1 2551 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M
2552 if (spec->multiout.dig_out_nid) {
2553 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2554 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2555 }
2556 if (spec->dig_in_nid) {
2557 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2558 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2559 }
2560 }
2561
2f2f4251
M
2562 return 0;
2563}
2564
c960a03b
TI
2565static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2566{
2567 unsigned int pincap = snd_hda_param_read(codec, nid,
2568 AC_PAR_PIN_CAP);
2569 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2570 if (pincap & AC_PINCAP_VREF_100)
2571 return AC_PINCTL_VREF_100;
2572 if (pincap & AC_PINCAP_VREF_80)
2573 return AC_PINCTL_VREF_80;
2574 if (pincap & AC_PINCAP_VREF_50)
2575 return AC_PINCTL_VREF_50;
2576 if (pincap & AC_PINCAP_VREF_GRD)
2577 return AC_PINCTL_VREF_GRD;
2578 return 0;
2579}
2580
403d1944
MP
2581static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2582
2583{
82beb8fd
TI
2584 snd_hda_codec_write_cache(codec, nid, 0,
2585 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP
2586}
2587
7c2ba97b
MR
2588#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2589
2590static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2591 struct snd_ctl_elem_value *ucontrol)
2592{
2593 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2594 struct sigmatel_spec *spec = codec->spec;
2595
d7a89436 2596 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR
2597 return 0;
2598}
2599
c6e4c666
TI
2600static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2601 unsigned char type);
2602
7c2ba97b
MR
2603static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2604 struct snd_ctl_elem_value *ucontrol)
2605{
2606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2607 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI
2608 int nid = kcontrol->private_value;
2609
2610 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR
2611
2612 /* check to be sure that the ports are upto date with
2613 * switch changes
2614 */
c6e4c666 2615 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR
2616
2617 return 1;
2618}
2619
a5ce8890 2620#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP
2621
2622static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2623{
2624 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2625 struct sigmatel_spec *spec = codec->spec;
2626 int io_idx = kcontrol-> private_value & 0xff;
2627
2628 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2629 return 0;
2630}
2631
2632static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2633{
2634 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2635 struct sigmatel_spec *spec = codec->spec;
2636 hda_nid_t nid = kcontrol->private_value >> 8;
2637 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2638 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP
2639
2640 spec->io_switch[io_idx] = val;
2641
2642 if (val)
2643 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI
2644 else {
2645 unsigned int pinctl = AC_PINCTL_IN_EN;
2646 if (io_idx) /* set VREF for mic */
2647 pinctl |= stac92xx_get_vref(codec, nid);
2648 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2649 }
40c1d308
JZ
2650
2651 /* check the auto-mute again: we need to mute/unmute the speaker
2652 * appropriately according to the pin direction
2653 */
2654 if (spec->hp_detect)
c6e4c666 2655 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2656
403d1944
MP
2657 return 1;
2658}
2659
0fb87bb4
ML
2660#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2661
2662static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2663 struct snd_ctl_elem_value *ucontrol)
2664{
2665 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2666 struct sigmatel_spec *spec = codec->spec;
2667
2668 ucontrol->value.integer.value[0] = spec->clfe_swap;
2669 return 0;
2670}
2671
2672static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2673 struct snd_ctl_elem_value *ucontrol)
2674{
2675 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2676 struct sigmatel_spec *spec = codec->spec;
2677 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2678 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2679
68ea7b2f 2680 if (spec->clfe_swap == val)
0fb87bb4
ML
2681 return 0;
2682
68ea7b2f 2683 spec->clfe_swap = val;
0fb87bb4
ML
2684
2685 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2686 spec->clfe_swap ? 0x4 : 0x0);
2687
2688 return 1;
2689}
2690
7c2ba97b
MR
2691#define STAC_CODEC_HP_SWITCH(xname) \
2692 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2693 .name = xname, \
2694 .index = 0, \
2695 .info = stac92xx_hp_switch_info, \
2696 .get = stac92xx_hp_switch_get, \
2697 .put = stac92xx_hp_switch_put, \
2698 }
2699
403d1944
MP
2700#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2701 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2702 .name = xname, \
2703 .index = 0, \
2704 .info = stac92xx_io_switch_info, \
2705 .get = stac92xx_io_switch_get, \
2706 .put = stac92xx_io_switch_put, \
2707 .private_value = xpval, \
2708 }
2709
0fb87bb4
ML
2710#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2711 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2712 .name = xname, \
2713 .index = 0, \
2714 .info = stac92xx_clfe_switch_info, \
2715 .get = stac92xx_clfe_switch_get, \
2716 .put = stac92xx_clfe_switch_put, \
2717 .private_value = xpval, \
2718 }
403d1944 2719
c7d4b2fa
M
2720enum {
2721 STAC_CTL_WIDGET_VOL,
2722 STAC_CTL_WIDGET_MUTE,
09a99959 2723 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR
2724 STAC_CTL_WIDGET_AMP_MUX,
2725 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2726 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2727 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2728 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M
2729};
2730
c8b6bf9b 2731static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M
2732 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2733 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2734 STAC_MONO_MUX,
89385035
MR
2735 STAC_AMP_MUX,
2736 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2737 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2738 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2739 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M
2740};
2741
2742/* add dynamic controls */
4d4e9bb3
TI
2743static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2744 struct snd_kcontrol_new *ktemp,
2745 int idx, const char *name,
2746 unsigned long val)
c7d4b2fa 2747{
c8b6bf9b 2748 struct snd_kcontrol_new *knew;
c7d4b2fa 2749
603c4019
TI
2750 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2751 knew = snd_array_new(&spec->kctls);
2752 if (!knew)
2753 return -ENOMEM;
4d4e9bb3 2754 *knew = *ktemp;
4682eee0 2755 knew->index = idx;
82fe0c58 2756 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2757 if (!knew->name)
c7d4b2fa
M
2758 return -ENOMEM;
2759 knew->private_value = val;
c7d4b2fa
M
2760 return 0;
2761}
2762
4d4e9bb3
TI
2763static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2764 int type, int idx, const char *name,
2765 unsigned long val)
2766{
2767 return stac92xx_add_control_temp(spec,
2768 &stac92xx_control_templates[type],
2769 idx, name, val);
2770}
2771
4682eee0
MR
2772
2773/* add dynamic controls */
4d4e9bb3
TI
2774static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2775 const char *name, unsigned long val)
4682eee0
MR
2776{
2777 return stac92xx_add_control_idx(spec, type, 0, name, val);
2778}
2779
c21ca4a8
TI
2780/* check whether the line-input can be used as line-out */
2781static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP
2782{
2783 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2784 struct auto_pin_cfg *cfg = &spec->autocfg;
2785 hda_nid_t nid;
2786 unsigned int pincap;
8e9068b1 2787
c21ca4a8
TI
2788 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2789 return 0;
2790 nid = cfg->input_pins[AUTO_PIN_LINE];
2791 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2792 if (pincap & AC_PINCAP_OUT)
2793 return nid;
2794 return 0;
2795}
403d1944 2796
c21ca4a8
TI
2797/* check whether the mic-input can be used as line-out */
2798static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2799{
2800 struct sigmatel_spec *spec = codec->spec;
2801 struct auto_pin_cfg *cfg = &spec->autocfg;
2802 unsigned int def_conf, pincap;
2803 unsigned int mic_pin;
2804
2805 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2806 return 0;
2807 mic_pin = AUTO_PIN_MIC;
2808 for (;;) {
2809 hda_nid_t nid = cfg->input_pins[mic_pin];
2810 def_conf = snd_hda_codec_read(codec, nid, 0,
2811 AC_VERB_GET_CONFIG_DEFAULT, 0);
2812 /* some laptops have an internal analog microphone
2813 * which can't be used as a output */
2814 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2815 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2816 if (pincap & AC_PINCAP_OUT)
2817 return nid;
403d1944 2818 }
c21ca4a8
TI
2819 if (mic_pin == AUTO_PIN_MIC)
2820 mic_pin = AUTO_PIN_FRONT_MIC;
2821 else
2822 break;
403d1944 2823 }
403d1944
MP
2824 return 0;
2825}
2826
7b043899
SL
2827static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2828{
2829 int i;
2830
2831 for (i = 0; i < spec->multiout.num_dacs; i++) {
2832 if (spec->multiout.dac_nids[i] == nid)
2833 return 1;
2834 }
2835
2836 return 0;
2837}
2838
c21ca4a8
TI
2839static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2840{
2841 int i;
2842 if (is_in_dac_nids(spec, nid))
2843 return 1;
2844 for (i = 0; i < spec->autocfg.hp_outs; i++)
2845 if (spec->hp_dacs[i] == nid)
2846 return 1;
2847 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2848 if (spec->speaker_dacs[i] == nid)
2849 return 1;
2850 return 0;
2851}
2852
2853static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2854{
2855 struct sigmatel_spec *spec = codec->spec;
2856 int j, conn_len;
2857 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2858 unsigned int wcaps, wtype;
2859
2860 conn_len = snd_hda_get_connections(codec, nid, conn,
2861 HDA_MAX_CONNECTIONS);
2862 for (j = 0; j < conn_len; j++) {
2863 wcaps = snd_hda_param_read(codec, conn[j],
2864 AC_PAR_AUDIO_WIDGET_CAP);
2865 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2866 /* we check only analog outputs */
2867 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2868 continue;
2869 /* if this route has a free DAC, assign it */
2870 if (!check_all_dac_nids(spec, conn[j])) {
2871 if (conn_len > 1) {
2872 /* select this DAC in the pin's input mux */
2873 snd_hda_codec_write_cache(codec, nid, 0,
2874 AC_VERB_SET_CONNECT_SEL, j);
2875 }
2876 return conn[j];
2877 }
2878 }
2879 return 0;
2880}
2881
2882static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2883static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2884
3cc08dc6 2885/*
7b043899
SL
2886 * Fill in the dac_nids table from the parsed pin configuration
2887 * This function only works when every pin in line_out_pins[]
2888 * contains atleast one DAC in its connection list. Some 92xx
2889 * codecs are not connected directly to a DAC, such as the 9200
2890 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2891 */
c21ca4a8 2892static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M
2893{
2894 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2895 struct auto_pin_cfg *cfg = &spec->autocfg;
2896 int i;
2897 hda_nid_t nid, dac;
7b043899 2898
c7d4b2fa
M
2899 for (i = 0; i < cfg->line_outs; i++) {
2900 nid = cfg->line_out_pins[i];
c21ca4a8
TI
2901 dac = get_unassigned_dac(codec, nid);
2902 if (!dac) {
df802952
TI
2903 if (spec->multiout.num_dacs > 0) {
2904 /* we have already working output pins,
2905 * so let's drop the broken ones again
2906 */
2907 cfg->line_outs = spec->multiout.num_dacs;
2908 break;
2909 }
7b043899
SL
2910 /* error out, no available DAC found */
2911 snd_printk(KERN_ERR
2912 "%s: No available DAC for pin 0x%x\n",
2913 __func__, nid);
2914 return -ENODEV;
2915 }
c21ca4a8
TI
2916 add_spec_dacs(spec, dac);
2917 }
7b043899 2918
c21ca4a8
TI
2919 /* add line-in as output */
2920 nid = check_line_out_switch(codec);
2921 if (nid) {
2922 dac = get_unassigned_dac(codec, nid);
2923 if (dac) {
2924 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2925 nid, cfg->line_outs);
2926 cfg->line_out_pins[cfg->line_outs] = nid;
2927 cfg->line_outs++;
2928 spec->line_switch = nid;
2929 add_spec_dacs(spec, dac);
2930 }
2931 }
2932 /* add mic as output */
2933 nid = check_mic_out_switch(codec);
2934 if (nid) {
2935 dac = get_unassigned_dac(codec, nid);
2936 if (dac) {
2937 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2938 nid, cfg->line_outs);
2939 cfg->line_out_pins[cfg->line_outs] = nid;
2940 cfg->line_outs++;
2941 spec->mic_switch = nid;
2942 add_spec_dacs(spec, dac);
2943 }
2944 }
c7d4b2fa 2945
c21ca4a8
TI
2946 for (i = 0; i < cfg->hp_outs; i++) {
2947 nid = cfg->hp_pins[i];
2948 dac = get_unassigned_dac(codec, nid);
2949 if (dac) {
2950 if (!spec->multiout.hp_nid)
2951 spec->multiout.hp_nid = dac;
2952 else
2953 add_spec_extra_dacs(spec, dac);
7b043899 2954 }
c21ca4a8
TI
2955 spec->hp_dacs[i] = dac;
2956 }
2957
2958 for (i = 0; i < cfg->speaker_outs; i++) {
2959 nid = cfg->speaker_pins[i];
2960 dac = get_unassigned_dac(codec, nid);
2961 if (dac)
2962 add_spec_extra_dacs(spec, dac);
2963 spec->speaker_dacs[i] = dac;
7b043899 2964 }
c7d4b2fa 2965
c21ca4a8 2966 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL
2967 spec->multiout.num_dacs,
2968 spec->multiout.dac_nids[0],
2969 spec->multiout.dac_nids[1],
2970 spec->multiout.dac_nids[2],
2971 spec->multiout.dac_nids[3],
2972 spec->multiout.dac_nids[4]);
c21ca4a8 2973
c7d4b2fa
M
2974 return 0;
2975}
2976
eb06ed8f
TI
2977/* create volume control/switch for the given prefx type */
2978static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2979{
2980 char name[32];
2981 int err;
2982
2983 sprintf(name, "%s Playback Volume", pfx);
2984 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2985 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2986 if (err < 0)
2987 return err;
2988 sprintf(name, "%s Playback Switch", pfx);
2989 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2990 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2991 if (err < 0)
2992 return err;
2993 return 0;
2994}
2995
ae0afd81
MR
2996static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2997{
c21ca4a8 2998 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR
2999 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3000 return 1;
3001 } else {
3002 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3003 spec->multiout.num_dacs++;
3004 }
3005 return 0;
3006}
3007
c21ca4a8 3008static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3009{
c21ca4a8
TI
3010 int i;
3011 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3012 if (!spec->multiout.extra_out_nid[i]) {
3013 spec->multiout.extra_out_nid[i] = nid;
3014 return 0;
3015 }
3016 }
3017 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3018 return 1;
ae0afd81
MR
3019}
3020
76624534
TI
3021static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid)
3022{
3023 int i;
3024
3025 if (spec->autocfg.line_outs != 1)
3026 return 0;
3027 if (spec->multiout.hp_nid == nid)
3028 return 0;
3029 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++)
3030 if (spec->multiout.extra_out_nid[i] == nid)
3031 return 0;
3032 return 1;
3033}
3034
c7d4b2fa 3035/* add playback controls from the parsed DAC table */
0fb87bb4 3036static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 3037 const struct auto_pin_cfg *cfg)
c7d4b2fa 3038{
76624534 3039 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI
3040 static const char *chname[4] = {
3041 "Front", "Surround", NULL /*CLFE*/, "Side"
3042 };
d21995e3 3043 hda_nid_t nid = 0;
91589232
TI
3044 int i, err;
3045 unsigned int wid_caps;
0fb87bb4 3046
c21ca4a8 3047 for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
c7d4b2fa 3048 nid = spec->multiout.dac_nids[i];
c7d4b2fa
M
3049 if (i == 2) {
3050 /* Center/LFE */
eb06ed8f
TI
3051 err = create_controls(spec, "Center", nid, 1);
3052 if (err < 0)
c7d4b2fa 3053 return err;
eb06ed8f
TI
3054 err = create_controls(spec, "LFE", nid, 2);
3055 if (err < 0)
c7d4b2fa 3056 return err;
0fb87bb4
ML
3057
3058 wid_caps = get_wcaps(codec, nid);
3059
3060 if (wid_caps & AC_WCAP_LR_SWAP) {
3061 err = stac92xx_add_control(spec,
3062 STAC_CTL_WIDGET_CLFE_SWITCH,
3063 "Swap Center/LFE Playback Switch", nid);
3064
3065 if (err < 0)
3066 return err;
3067 }
3068
c7d4b2fa 3069 } else {
76624534
TI
3070 const char *name = chname[i];
3071 /* if it's a single DAC, assign a better name */
3072 if (!i && is_unique_dac(spec, nid)) {
3073 switch (cfg->line_out_type) {
3074 case AUTO_PIN_HP_OUT:
3075 name = "Headphone";
3076 break;
3077 case AUTO_PIN_SPEAKER_OUT:
3078 name = "Speaker";
3079 break;
3080 }
3081 }
3082 err = create_controls(spec, name, nid, 3);
eb06ed8f 3083 if (err < 0)
c7d4b2fa
M
3084 return err;
3085 }
3086 }
3087
a9cb5c90 3088 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR
3089 err = stac92xx_add_control(spec,
3090 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI
3091 "Headphone as Line Out Switch",
3092 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR
3093 if (err < 0)
3094 return err;
3095 }
3096
b5895dc8 3097 if (spec->line_switch) {
c21ca4a8
TI
3098 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3099 "Line In as Output Switch",
3100 spec->line_switch << 8);
3101 if (err < 0)
3102 return err;
b5895dc8 3103 }
403d1944 3104
b5895dc8 3105 if (spec->mic_switch) {
c21ca4a8
TI
3106 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3107 "Mic as Output Switch",
3108 (spec->mic_switch << 8) | 1);
3109 if (err < 0)
3110 return err;
b5895dc8 3111 }
403d1944 3112
c7d4b2fa
M
3113 return 0;
3114}
3115
eb06ed8f
TI
3116/* add playback controls for Speaker and HP outputs */
3117static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3118 struct auto_pin_cfg *cfg)
3119{
3120 struct sigmatel_spec *spec = codec->spec;
3121 hda_nid_t nid;
c21ca4a8 3122 int i, err, nums;
eb06ed8f 3123
c21ca4a8 3124 nums = 0;
eb06ed8f 3125 for (i = 0; i < cfg->hp_outs; i++) {
c21ca4a8
TI
3126 static const char *pfxs[] = {
3127 "Headphone", "Headphone2", "Headphone3",
3128 };
eb06ed8f
TI
3129 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3130 if (wid_caps & AC_WCAP_UNSOL_CAP)
3131 spec->hp_detect = 1;
c21ca4a8 3132 if (nums >= ARRAY_SIZE(pfxs))
c7d4b2fa 3133 continue;
c21ca4a8
TI
3134 nid = spec->hp_dacs[i];
3135 if (!nid)
eb06ed8f 3136 continue;
c21ca4a8
TI
3137 err = create_controls(spec, pfxs[nums++], nid, 3);
3138 if (err < 0)
3139 return err;
1b290a51 3140 }
c21ca4a8
TI
3141 nums = 0;
3142 for (i = 0; i < cfg->speaker_outs; i++) {
eb06ed8f
TI
3143 static const char *pfxs[] = {
3144 "Speaker", "External Speaker", "Speaker2",
3145 };
c21ca4a8
TI
3146 if (nums >= ARRAY_SIZE(pfxs))
3147 continue;
3148 nid = spec->speaker_dacs[i];
3149 if (!nid)
3150 continue;
3151 err = create_controls(spec, pfxs[nums++], nid, 3);
eb06ed8f
TI
3152 if (err < 0)
3153 return err;
3154 }
c7d4b2fa
M
3155 return 0;
3156}
3157
b22b4821 3158/* labels for mono mux outputs */
d0513fc6
MR
3159static const char *stac92xx_mono_labels[4] = {
3160 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR
3161};
3162
3163/* create mono mux for mono out on capable codecs */
3164static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3165{
3166 struct sigmatel_spec *spec = codec->spec;
3167 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3168 int i, num_cons;
3169 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3170
3171 num_cons = snd_hda_get_connections(codec,
3172 spec->mono_nid,
3173 con_lst,
3174 HDA_MAX_NUM_INPUTS);
3175 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3176 return -EINVAL;
3177
3178 for (i = 0; i < num_cons; i++) {
3179 mono_mux->items[mono_mux->num_items].label =
3180 stac92xx_mono_labels[i];
3181 mono_mux->items[mono_mux->num_items].index = i;
3182 mono_mux->num_items++;
3183 }
09a99959
MR
3184
3185 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3186 "Mono Mux", spec->mono_nid);
b22b4821
MR
3187}
3188
89385035
MR
3189/* labels for amp mux outputs */
3190static const char *stac92xx_amp_labels[3] = {
4b33c767 3191 "Front Microphone", "Microphone", "Line In",
89385035
MR
3192};
3193
3194/* create amp out controls mux on capable codecs */
3195static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3196{
3197 struct sigmatel_spec *spec = codec->spec;
3198 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3199 int i, err;
3200
2a9c7816 3201 for (i = 0; i < spec->num_amps; i++) {
89385035
MR
3202 amp_mux->items[amp_mux->num_items].label =
3203 stac92xx_amp_labels[i];
3204 amp_mux->items[amp_mux->num_items].index = i;
3205 amp_mux->num_items++;
3206 }
3207
2a9c7816
MR
3208 if (spec->num_amps > 1) {
3209 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3210 "Amp Selector Capture Switch", 0);
3211 if (err < 0)
3212 return err;
3213 }
89385035
MR
3214 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3215 "Amp Capture Volume",
3216 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3217}
3218
3219
1cd2224c
MR
3220/* create PC beep volume controls */
3221static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3222 hda_nid_t nid)
3223{
3224 struct sigmatel_spec *spec = codec->spec;
3225 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3226 int err;
3227
3228 /* check for mute support for the the amp */
3229 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3230 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3231 "PC Beep Playback Switch",
3232 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3233 if (err < 0)
3234 return err;
3235 }
3236
3237 /* check to see if there is volume support for the amp */
3238 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3239 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3240 "PC Beep Playback Volume",
3241 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3242 if (err < 0)
3243 return err;
3244 }
3245 return 0;
3246}
3247
4d4e9bb3
TI
3248#ifdef CONFIG_SND_HDA_INPUT_BEEP
3249#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3250
3251static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3252 struct snd_ctl_elem_value *ucontrol)
3253{
3254 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3255 ucontrol->value.integer.value[0] = codec->beep->enabled;
3256 return 0;
3257}
3258
3259static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3260 struct snd_ctl_elem_value *ucontrol)
3261{
3262 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3263 int enabled = !!ucontrol->value.integer.value[0];
3264 if (codec->beep->enabled != enabled) {
3265 codec->beep->enabled = enabled;
3266 return 1;
3267 }
3268 return 0;
3269}
3270
3271static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3272 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3273 .info = stac92xx_dig_beep_switch_info,
3274 .get = stac92xx_dig_beep_switch_get,
3275 .put = stac92xx_dig_beep_switch_put,
3276};
3277
3278static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3279{
3280 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3281 0, "PC Beep Playback Switch", 0);
3282}
3283#endif
3284
4682eee0
MR
3285static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3286{
3287 struct sigmatel_spec *spec = codec->spec;
3288 int wcaps, nid, i, err = 0;
3289
3290 for (i = 0; i < spec->num_muxes; i++) {
3291 nid = spec->mux_nids[i];
3292 wcaps = get_wcaps(codec, nid);
3293
3294 if (wcaps & AC_WCAP_OUT_AMP) {
3295 err = stac92xx_add_control_idx(spec,
3296 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3297 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3298 if (err < 0)
3299 return err;
3300 }
3301 }
3302 return 0;
3303};
3304
d9737751 3305static const char *stac92xx_spdif_labels[3] = {
65973632 3306 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR
3307};
3308
3309static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3310{
3311 struct sigmatel_spec *spec = codec->spec;
3312 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3313 const char **labels = spec->spdif_labels;
d9737751 3314 int i, num_cons;
65973632 3315 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR
3316
3317 num_cons = snd_hda_get_connections(codec,
3318 spec->smux_nids[0],
3319 con_lst,
3320 HDA_MAX_NUM_INPUTS);
65973632 3321 if (!num_cons)
d9737751
MR
3322 return -EINVAL;
3323
65973632
MR
3324 if (!labels)
3325 labels = stac92xx_spdif_labels;
3326
d9737751 3327 for (i = 0; i < num_cons; i++) {
65973632 3328 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR
3329 spdif_mux->items[spdif_mux->num_items].index = i;
3330 spdif_mux->num_items++;
3331 }
3332
3333 return 0;
3334}
3335
8b65727b 3336/* labels for dmic mux inputs */
ddc2cec4 3337static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP
3338 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3339 "Digital Mic 3", "Digital Mic 4"
3340};
3341
3342/* create playback/capture controls for input pins on dmic capable codecs */
3343static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3344 const struct auto_pin_cfg *cfg)
3345{
3346 struct sigmatel_spec *spec = codec->spec;
3347 struct hda_input_mux *dimux = &spec->private_dimux;
3348 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR
3349 int err, i, j;
3350 char name[32];
8b65727b
MP
3351
3352 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3353 dimux->items[dimux->num_items].index = 0;
3354 dimux->num_items++;
3355
3356 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3357 hda_nid_t nid;
8b65727b
MP
3358 int index;
3359 int num_cons;
0678accd 3360 unsigned int wcaps;
8b65727b
MP
3361 unsigned int def_conf;
3362
3363 def_conf = snd_hda_codec_read(codec,
3364 spec->dmic_nids[i],
3365 0,
3366 AC_VERB_GET_CONFIG_DEFAULT,
3367 0);
3368 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3369 continue;
3370
0678accd 3371 nid = spec->dmic_nids[i];
8b65727b 3372 num_cons = snd_hda_get_connections(codec,
e1f0d669 3373 spec->dmux_nids[0],
8b65727b
MP
3374 con_lst,
3375 HDA_MAX_NUM_INPUTS);
3376 for (j = 0; j < num_cons; j++)
0678accd 3377 if (con_lst[j] == nid) {
8b65727b
MP
3378 index = j;
3379 goto found;
3380 }
3381 continue;
3382found:
d0513fc6
MR
3383 wcaps = get_wcaps(codec, nid) &
3384 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3385
d0513fc6 3386 if (wcaps) {
0678accd
MR
3387 sprintf(name, "%s Capture Volume",
3388 stac92xx_dmic_labels[dimux->num_items]);
3389
3390 err = stac92xx_add_control(spec,
3391 STAC_CTL_WIDGET_VOL,
3392 name,
d0513fc6
MR
3393 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3394 (wcaps & AC_WCAP_OUT_AMP) ?
3395 HDA_OUTPUT : HDA_INPUT));
0678accd
MR
3396 if (err < 0)
3397 return err;
3398 }
3399
8b65727b
MP
3400 dimux->items[dimux->num_items].label =
3401 stac92xx_dmic_labels[dimux->num_items];
3402 dimux->items[dimux->num_items].index = index;
3403 dimux->num_items++;
3404 }
3405
3406 return 0;
3407}
3408
c7d4b2fa
M
3409/* create playback/capture controls for input pins */
3410static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3411{
3412 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
3413 struct hda_input_mux *imux = &spec->private_imux;
3414 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3415 int i, j, k;
3416
3417 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI
3418 int index;
3419
3420 if (!cfg->input_pins[i])
3421 continue;
3422 index = -1;
3423 for (j = 0; j < spec->num_muxes; j++) {
3424 int num_cons;
3425 num_cons = snd_hda_get_connections(codec,
3426 spec->mux_nids[j],
3427 con_lst,
3428 HDA_MAX_NUM_INPUTS);
3429 for (k = 0; k < num_cons; k++)
3430 if (con_lst[k] == cfg->input_pins[i]) {
3431 index = k;
3432 goto found;
3433 }
c7d4b2fa 3434 }
314634bc
TI
3435 continue;
3436 found:
3437 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3438 imux->items[imux->num_items].index = index;
3439 imux->num_items++;
c7d4b2fa
M
3440 }
3441
7b043899 3442 if (imux->num_items) {
62fe78e9
SR
3443 /*
3444 * Set the current input for the muxes.
3445 * The STAC9221 has two input muxes with identical source
3446 * NID lists. Hopefully this won't get confused.
3447 */
3448 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI
3449 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3450 AC_VERB_SET_CONNECT_SEL,
3451 imux->items[0].index);
62fe78e9
SR
3452 }
3453 }
3454
c7d4b2fa
M
3455 return 0;
3456}
3457
c7d4b2fa
M
3458static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3459{
3460 struct sigmatel_spec *spec = codec->spec;
3461 int i;
3462
3463 for (i = 0; i < spec->autocfg.line_outs; i++) {
3464 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3465 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3466 }
3467}
3468
3469static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3470{
3471 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3472 int i;
c7d4b2fa 3473
eb06ed8f
TI
3474 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3475 hda_nid_t pin;
3476 pin = spec->autocfg.hp_pins[i];
3477 if (pin) /* connect to front */
3478 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3479 }
3480 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3481 hda_nid_t pin;
3482 pin = spec->autocfg.speaker_pins[i];
3483 if (pin) /* connect to front */
3484 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3485 }
c7d4b2fa
M
3486}
3487
3cc08dc6 3488static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M
3489{
3490 struct sigmatel_spec *spec = codec->spec;
3491 int err;
3492
8b65727b
MP
3493 if ((err = snd_hda_parse_pin_def_config(codec,
3494 &spec->autocfg,
3495 spec->dmic_nids)) < 0)
c7d4b2fa 3496 return err;
82bc955f 3497 if (! spec->autocfg.line_outs)
869264c4 3498 return 0; /* can't find valid pin config */
19039bd0 3499
bcecd9bd
JZ
3500 /* If we have no real line-out pin and multiple hp-outs, HPs should
3501 * be set up as multi-channel outputs.
3502 */
3503 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3504 spec->autocfg.hp_outs > 1) {
3505 /* Copy hp_outs to line_outs, backup line_outs in
3506 * speaker_outs so that the following routines can handle
3507 * HP pins as primary outputs.
3508 */
c21ca4a8 3509 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ
3510 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3511 sizeof(spec->autocfg.line_out_pins));
3512 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3513 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3514 sizeof(spec->autocfg.hp_pins));
3515 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI
3516 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3517 spec->autocfg.hp_outs = 0;
bcecd9bd 3518 }
09a99959 3519 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR
3520 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3521 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR
3522 u32 caps = query_amp_caps(codec,
3523 spec->autocfg.mono_out_pin, dir);
3524 hda_nid_t conn_list[1];
3525
3526 /* get the mixer node and then the mono mux if it exists */
3527 if (snd_hda_get_connections(codec,
3528 spec->autocfg.mono_out_pin, conn_list, 1) &&
3529 snd_hda_get_connections(codec, conn_list[0],
3530 conn_list, 1)) {
3531
3532 int wcaps = get_wcaps(codec, conn_list[0]);
3533 int wid_type = (wcaps & AC_WCAP_TYPE)
3534 >> AC_WCAP_TYPE_SHIFT;
3535 /* LR swap check, some stac925x have a mux that
3536 * changes the DACs output path instead of the
3537 * mono-mux path.
3538 */
3539 if (wid_type == AC_WID_AUD_SEL &&
3540 !(wcaps & AC_WCAP_LR_SWAP))
3541 spec->mono_nid = conn_list[0];
3542 }
d0513fc6
MR
3543 if (dir) {
3544 hda_nid_t nid = spec->autocfg.mono_out_pin;
3545
3546 /* most mono outs have a least a mute/unmute switch */
3547 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3548 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3549 "Mono Playback Switch",
3550 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR
3551 if (err < 0)
3552 return err;
d0513fc6
MR
3553 /* check for volume support for the amp */
3554 if ((caps & AC_AMPCAP_NUM_STEPS)
3555 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3556 err = stac92xx_add_control(spec,
3557 STAC_CTL_WIDGET_VOL,
3558 "Mono Playback Volume",
3559 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3560 if (err < 0)
3561 return err;
3562 }
09a99959
MR
3563 }
3564
3565 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3566 AC_PINCTL_OUT_EN);
3567 }
bcecd9bd 3568
c21ca4a8
TI
3569 if (!spec->multiout.num_dacs) {
3570 err = stac92xx_auto_fill_dac_nids(codec);
3571 if (err < 0)
19039bd0 3572 return err;
c21ca4a8 3573 }
c7d4b2fa 3574
0fb87bb4
ML
3575 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3576
3577 if (err < 0)
3578 return err;
3579
1cd2224c
MR
3580 /* setup analog beep controls */
3581 if (spec->anabeep_nid > 0) {
3582 err = stac92xx_auto_create_beep_ctls(codec,
3583 spec->anabeep_nid);
3584 if (err < 0)
3585 return err;
3586 }
3587
3588 /* setup digital beep controls and input device */
3589#ifdef CONFIG_SND_HDA_INPUT_BEEP
3590 if (spec->digbeep_nid > 0) {
3591 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3592 unsigned int caps;
1cd2224c
MR
3593
3594 err = stac92xx_auto_create_beep_ctls(codec, nid);
3595 if (err < 0)
3596 return err;
3597 err = snd_hda_attach_beep_device(codec, nid);
3598 if (err < 0)
3599 return err;
4d4e9bb3
TI
3600 /* if no beep switch is available, make its own one */
3601 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3602 if (codec->beep &&
3603 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3604 err = stac92xx_beep_switch_ctl(codec);
3605 if (err < 0)
3606 return err;
3607 }
1cd2224c
MR
3608 }
3609#endif
3610
0fb87bb4
ML
3611 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3612
3613 if (err < 0)
3614 return err;
3615
3616 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3617
3618 if (err < 0)
c7d4b2fa
M
3619 return err;
3620
b22b4821
MR
3621 if (spec->mono_nid > 0) {
3622 err = stac92xx_auto_create_mono_output_ctls(codec);
3623 if (err < 0)
3624 return err;
3625 }
2a9c7816 3626 if (spec->num_amps > 0) {
89385035
MR
3627 err = stac92xx_auto_create_amp_output_ctls(codec);
3628 if (err < 0)
3629 return err;
3630 }
2a9c7816 3631 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP
3632 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3633 &spec->autocfg)) < 0)
3634 return err;
4682eee0
MR
3635 if (spec->num_muxes > 0) {
3636 err = stac92xx_auto_create_mux_input_ctls(codec);
3637 if (err < 0)
3638 return err;
3639 }
d9737751
MR
3640 if (spec->num_smuxes > 0) {
3641 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3642 if (err < 0)
3643 return err;
3644 }
8b65727b 3645
c7d4b2fa 3646 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3647 if (spec->multiout.max_channels > 2)
c7d4b2fa 3648 spec->surr_switch = 1;
c7d4b2fa 3649
82bc955f 3650 if (spec->autocfg.dig_out_pin)
3cc08dc6 3651 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3652 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3653 spec->dig_in_nid = dig_in;
c7d4b2fa 3654
603c4019
TI
3655 if (spec->kctls.list)
3656 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3657
3658 spec->input_mux = &spec->private_imux;
f8ccbf65
MR
3659 if (!spec->dinput_mux)
3660 spec->dinput_mux = &spec->private_dimux;
d9737751 3661 spec->sinput_mux = &spec->private_smux;
b22b4821 3662 spec->mono_mux = &spec->private_mono_mux;
89385035 3663 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M
3664 return 1;
3665}
3666
82bc955f
TI
3667/* add playback controls for HP output */
3668static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3669 struct auto_pin_cfg *cfg)
3670{
3671 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3672 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI
3673 unsigned int wid_caps;
3674
3675 if (! pin)
3676 return 0;
3677
3678 wid_caps = get_wcaps(codec, pin);
505cb341 3679 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3680 spec->hp_detect = 1;
82bc955f
TI
3681
3682 return 0;
3683}
3684
160ea0dc
RF
3685/* add playback controls for LFE output */
3686static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3687 struct auto_pin_cfg *cfg)
3688{
3689 struct sigmatel_spec *spec = codec->spec;
3690 int err;
3691 hda_nid_t lfe_pin = 0x0;
3692 int i;
3693
3694 /*
3695 * search speaker outs and line outs for a mono speaker pin
3696 * with an amp. If one is found, add LFE controls
3697 * for it.
3698 */
3699 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3700 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3701 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3702 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3703 if (wcaps == AC_WCAP_OUT_AMP)
3704 /* found a mono speaker with an amp, must be lfe */
3705 lfe_pin = pin;
3706 }
3707
3708 /* if speaker_outs is 0, then speakers may be in line_outs */
3709 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3710 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3711 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3712 unsigned int defcfg;
8b551785 3713 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF
3714 AC_VERB_GET_CONFIG_DEFAULT,
3715 0x00);
8b551785 3716 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3717 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3718 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3719 if (wcaps == AC_WCAP_OUT_AMP)
3720 /* found a mono speaker with an amp,
3721 must be lfe */
3722 lfe_pin = pin;
3723 }
3724 }
3725 }
3726
3727 if (lfe_pin) {
eb06ed8f 3728 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF
3729 if (err < 0)
3730 return err;
3731 }
3732
3733 return 0;
3734}
3735
c7d4b2fa
M
3736static int stac9200_parse_auto_config(struct hda_codec *codec)
3737{
3738 struct sigmatel_spec *spec = codec->spec;
3739 int err;
3740
df694daa 3741 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M
3742 return err;
3743
3744 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3745 return err;
3746
82bc955f
TI
3747 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3748 return err;
3749
160ea0dc
RF
3750 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3751 return err;
3752
355a0ec4
TI
3753 if (spec->num_muxes > 0) {
3754 err = stac92xx_auto_create_mux_input_ctls(codec);
3755 if (err < 0)
3756 return err;
3757 }
3758
82bc955f 3759 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3760 spec->multiout.dig_out_nid = 0x05;
82bc955f 3761 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3762 spec->dig_in_nid = 0x04;
c7d4b2fa 3763
603c4019
TI
3764 if (spec->kctls.list)
3765 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3766
3767 spec->input_mux = &spec->private_imux;
8b65727b 3768 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M
3769
3770 return 1;
3771}
3772
62fe78e9
SR
3773/*
3774 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3775 * funky external mute control using GPIO pins.
3776 */
3777
76e1ddfb 3778static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3779 unsigned int dir_mask, unsigned int data)
62fe78e9
SR
3780{
3781 unsigned int gpiostate, gpiomask, gpiodir;
3782
3783 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3784 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3785 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR
3786
3787 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3788 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3789 gpiomask |= mask;
62fe78e9
SR
3790
3791 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3792 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3793 gpiodir |= dir_mask;
62fe78e9 3794
76e1ddfb 3795 /* Configure GPIOx as CMOS */
62fe78e9
SR
3796 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3797
3798 snd_hda_codec_write(codec, codec->afg, 0,
3799 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI
3800 snd_hda_codec_read(codec, codec->afg, 0,
3801 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR
3802
3803 msleep(1);
3804
76e1ddfb
TI
3805 snd_hda_codec_read(codec, codec->afg, 0,
3806 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR
3807}
3808
74aeaabc
MR
3809static int stac92xx_add_jack(struct hda_codec *codec,
3810 hda_nid_t nid, int type)
3811{
e4973e1e 3812#ifdef CONFIG_SND_JACK
74aeaabc
MR
3813 struct sigmatel_spec *spec = codec->spec;
3814 struct sigmatel_jack *jack;
3815 int def_conf = snd_hda_codec_read(codec, nid,
3816 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3817 int connectivity = get_defcfg_connect(def_conf);
3818 char name[32];
3819
3820 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3821 return 0;
3822
3823 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3824 jack = snd_array_new(&spec->jacks);
3825 if (!jack)
3826 return -ENOMEM;
3827 jack->nid = nid;
3828 jack->type = type;
3829
3830 sprintf(name, "%s at %s %s Jack",
3831 snd_hda_get_jack_type(def_conf),
3832 snd_hda_get_jack_connectivity(def_conf),
3833 snd_hda_get_jack_location(def_conf));
3834
3835 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI
3836#else
3837 return 0;
3838#endif
74aeaabc
MR
3839}
3840
c6e4c666
TI
3841static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3842 unsigned char type, int data)
74aeaabc
MR
3843{
3844 struct sigmatel_event *event;
3845
3846 snd_array_init(&spec->events, sizeof(*event), 32);
3847 event = snd_array_new(&spec->events);
3848 if (!event)
3849 return -ENOMEM;
3850 event->nid = nid;
c6e4c666
TI
3851 event->type = type;
3852 event->tag = spec->events.used;
74aeaabc
MR
3853 event->data = data;
3854
c6e4c666 3855 return event->tag;
74aeaabc
MR
3856}
3857
c6e4c666
TI
3858static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3859 hda_nid_t nid, unsigned char type)
74aeaabc
MR
3860{
3861 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
3862 struct sigmatel_event *event = spec->events.list;
3863 int i;
3864
3865 for (i = 0; i < spec->events.used; i++, event++) {
3866 if (event->nid == nid && event->type == type)
3867 return event;
74aeaabc 3868 }
c6e4c666 3869 return NULL;
74aeaabc
MR
3870}
3871
c6e4c666
TI
3872static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3873 unsigned char tag)
314634bc 3874{
c6e4c666
TI
3875 struct sigmatel_spec *spec = codec->spec;
3876 struct sigmatel_event *event = spec->events.list;
3877 int i;
3878
3879 for (i = 0; i < spec->events.used; i++, event++) {
3880 if (event->tag == tag)
3881 return event;
74aeaabc 3882 }
c6e4c666
TI
3883 return NULL;
3884}
3885
3886static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3887 unsigned int type)
3888{
3889 struct sigmatel_event *event;
3890 int tag;
3891
3892 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3893 return;
3894 event = stac_get_event(codec, nid, type);
3895 if (event)
3896 tag = event->tag;
3897 else
3898 tag = stac_add_event(codec->spec, nid, type, 0);
3899 if (tag < 0)
3900 return;
3901 snd_hda_codec_write_cache(codec, nid, 0,
3902 AC_VERB_SET_UNSOLICITED_ENABLE,
3903 AC_USRSP_EN | tag);
314634bc
TI
3904}
3905
a64135a2
MR
3906static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3907{
3908 int i;
3909 for (i = 0; i < cfg->hp_outs; i++)
3910 if (cfg->hp_pins[i] == nid)
3911 return 1; /* nid is a HP-Out */
3912
3913 return 0; /* nid is not a HP-Out */
3914};
3915
b76c850f
MR
3916static void stac92xx_power_down(struct hda_codec *codec)
3917{
3918 struct sigmatel_spec *spec = codec->spec;
3919
3920 /* power down inactive DACs */
3921 hda_nid_t *dac;
3922 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 3923 if (!check_all_dac_nids(spec, *dac))
8c2f767b 3924 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR
3925 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3926}
3927
f73d3585
TI
3928static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3929 int enable);
3930
c7d4b2fa
M
3931static int stac92xx_init(struct hda_codec *codec)
3932{
3933 struct sigmatel_spec *spec = codec->spec;
82bc955f 3934 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3935 unsigned int gpio;
e4973e1e 3936 int i;
c7d4b2fa 3937
c7d4b2fa
M
3938 snd_hda_sequence_write(codec, spec->init);
3939
8daaaa97
MR
3940 /* power down adcs initially */
3941 if (spec->powerdown_adcs)
3942 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 3943 snd_hda_codec_write(codec,
8daaaa97
MR
3944 spec->adc_nids[i], 0,
3945 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI
3946
3947 /* set up GPIO */
3948 gpio = spec->gpio_data;
3949 /* turn on EAPD statically when spec->eapd_switch isn't set.
3950 * otherwise, unsol event will turn it on/off dynamically
3951 */
3952 if (!spec->eapd_switch)
3953 gpio |= spec->eapd_mask;
3954 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3955
82bc955f
TI
3956 /* set up pins */
3957 if (spec->hp_detect) {
505cb341 3958 /* Enable unsolicited responses on the HP widget */
74aeaabc 3959 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 3960 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 3961 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 3962 }
0a07acaf
TI
3963 /* force to enable the first line-out; the others are set up
3964 * in unsol_event
3965 */
3966 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3967 AC_PINCTL_OUT_EN);
82bc955f 3968 /* fake event to set up pins */
c6e4c666
TI
3969 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
3970 STAC_HP_EVENT);
82bc955f
TI
3971 } else {
3972 stac92xx_auto_init_multi_out(codec);
3973 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI
3974 for (i = 0; i < cfg->hp_outs; i++)
3975 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI
3976 }
3977 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI
3978 hda_nid_t nid = cfg->input_pins[i];
3979 if (nid) {
12dde4c6 3980 unsigned int pinctl, conf;
4f1e6bc3
TI
3981 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3982 /* for mic pins, force to initialize */
3983 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI
3984 pinctl |= AC_PINCTL_IN_EN;
3985 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI
3986 } else {
3987 pinctl = snd_hda_codec_read(codec, nid, 0,
3988 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3989 /* if PINCTL already set then skip */
12dde4c6
TI
3990 if (!(pinctl & AC_PINCTL_IN_EN)) {
3991 pinctl |= AC_PINCTL_IN_EN;
3992 stac92xx_auto_set_pinctl(codec, nid,
3993 pinctl);
3994 }
3995 }
3996 conf = snd_hda_codec_read(codec, nid, 0,
3997 AC_VERB_GET_CONFIG_DEFAULT, 0);
3998 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
3999 enable_pin_detect(codec, nid,
4000 STAC_INSERT_EVENT);
4001 stac_issue_unsol_event(codec, nid,
4002 STAC_INSERT_EVENT);
4f1e6bc3 4003 }
c960a03b 4004 }
82bc955f 4005 }
a64135a2
MR
4006 for (i = 0; i < spec->num_dmics; i++)
4007 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4008 AC_PINCTL_IN_EN);
f73d3585
TI
4009 if (cfg->dig_out_pin)
4010 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
4011 AC_PINCTL_OUT_EN);
4012 if (cfg->dig_in_pin)
4013 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4014 AC_PINCTL_IN_EN);
a64135a2 4015 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI
4016 hda_nid_t nid = spec->pwr_nids[i];
4017 int pinctl, def_conf;
f73d3585 4018
eb632128
TI
4019 /* power on when no jack detection is available */
4020 if (!spec->hp_detect) {
4021 stac_toggle_power_map(codec, nid, 1);
4022 continue;
4023 }
4024
4025 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI
4026 continue; /* already has an unsol event */
4027
4028 pinctl = snd_hda_codec_read(codec, nid, 0,
4029 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR
4030 /* outputs are only ports capable of power management
4031 * any attempts on powering down a input port cause the
4032 * referenced VREF to act quirky.
4033 */
eb632128
TI
4034 if (pinctl & AC_PINCTL_IN_EN) {
4035 stac_toggle_power_map(codec, nid, 1);
a64135a2 4036 continue;
eb632128 4037 }
f73d3585
TI
4038 def_conf = snd_hda_codec_read(codec, nid, 0,
4039 AC_VERB_GET_CONFIG_DEFAULT, 0);
4040 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR
4041 /* skip any ports that don't have jacks since presence
4042 * detection is useless */
f73d3585
TI
4043 if (def_conf != AC_JACK_PORT_COMPLEX) {
4044 if (def_conf != AC_JACK_PORT_NONE)
4045 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4046 continue;
f73d3585 4047 }
12dde4c6
TI
4048 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
4049 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4050 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
4051 }
a64135a2 4052 }
b76c850f
MR
4053 if (spec->dac_list)
4054 stac92xx_power_down(codec);
c7d4b2fa
M
4055 return 0;
4056}
4057
74aeaabc
MR
4058static void stac92xx_free_jacks(struct hda_codec *codec)
4059{
e4973e1e 4060#ifdef CONFIG_SND_JACK
b94d3539 4061 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4062 struct sigmatel_spec *spec = codec->spec;
b94d3539 4063 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR
4064 struct sigmatel_jack *jacks = spec->jacks.list;
4065 int i;
4066 for (i = 0; i < spec->jacks.used; i++)
4067 snd_device_free(codec->bus->card, &jacks[i].jack);
4068 }
4069 snd_array_free(&spec->jacks);
e4973e1e 4070#endif
74aeaabc
MR
4071}
4072
603c4019
TI
4073static void stac92xx_free_kctls(struct hda_codec *codec)
4074{
4075 struct sigmatel_spec *spec = codec->spec;
4076
4077 if (spec->kctls.list) {
4078 struct snd_kcontrol_new *kctl = spec->kctls.list;
4079 int i;
4080 for (i = 0; i < spec->kctls.used; i++)
4081 kfree(kctl[i].name);
4082 }
4083 snd_array_free(&spec->kctls);
4084}
4085
2f2f4251
M
4086static void stac92xx_free(struct hda_codec *codec)
4087{
c7d4b2fa 4088 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
4089
4090 if (! spec)
4091 return;
4092
af9f341a 4093 kfree(spec->pin_configs);
74aeaabc
MR
4094 stac92xx_free_jacks(codec);
4095 snd_array_free(&spec->events);
11b44bbd 4096
c7d4b2fa 4097 kfree(spec);
1cd2224c 4098 snd_hda_detach_beep_device(codec);
2f2f4251
M
4099}
4100
4e55096e
M
4101static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4102 unsigned int flag)
4103{
4104 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4105 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4106
f9acba43
TI
4107 if (pin_ctl & AC_PINCTL_IN_EN) {
4108 /*
4109 * we need to check the current set-up direction of
4110 * shared input pins since they can be switched via
4111 * "xxx as Output" mixer switch
4112 */
4113 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4114 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI
4115 return;
4116 }
4117
7b043899
SL
4118 /* if setting pin direction bits, clear the current
4119 direction bits first */
4120 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4121 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4122
82beb8fd 4123 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M
4124 AC_VERB_SET_PIN_WIDGET_CONTROL,
4125 pin_ctl | flag);
4126}
4127
4128static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4129 unsigned int flag)
4130{
4131 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4132 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 4133 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M
4134 AC_VERB_SET_PIN_WIDGET_CONTROL,
4135 pin_ctl & ~flag);
4136}
4137
e6e3ea25 4138static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI
4139{
4140 if (!nid)
4141 return 0;
4142 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI
4143 & (1 << 31))
4144 return 1;
314634bc
TI
4145 return 0;
4146}
4147
d7a89436
TI
4148/* return non-zero if the hp-pin of the given array index isn't
4149 * a jack-detection target
4150 */
4151static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4152{
4153 struct auto_pin_cfg *cfg = &spec->autocfg;
4154
4155 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4156 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4157 return 1;
c21ca4a8 4158 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI
4159 return 1;
4160 /* ignore if the pin is set as line-out */
4161 if (cfg->hp_pins[i] == spec->hp_switch)
4162 return 1;
4163 return 0;
4164}
4165
c6e4c666 4166static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M
4167{
4168 struct sigmatel_spec *spec = codec->spec;
4169 struct auto_pin_cfg *cfg = &spec->autocfg;
4170 int i, presence;
4171
eb06ed8f 4172 presence = 0;
4fe5195c
MR
4173 if (spec->gpio_mute)
4174 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4175 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4176
eb06ed8f 4177 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI
4178 if (presence)
4179 break;
d7a89436
TI
4180 if (no_hp_sensing(spec, i))
4181 continue;
e6e3ea25
TI
4182 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4183 if (presence) {
4184 unsigned int pinctl;
4185 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4186 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4187 if (pinctl & AC_PINCTL_IN_EN)
4188 presence = 0; /* mic- or line-input */
4189 }
eb06ed8f 4190 }
4e55096e
M
4191
4192 if (presence) {
d7a89436 4193 /* disable lineouts */
7c2ba97b 4194 if (spec->hp_switch)
d7a89436
TI
4195 stac92xx_reset_pinctl(codec, spec->hp_switch,
4196 AC_PINCTL_OUT_EN);
4e55096e
M
4197 for (i = 0; i < cfg->line_outs; i++)
4198 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4199 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4200 for (i = 0; i < cfg->speaker_outs; i++)
4201 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4202 AC_PINCTL_OUT_EN);
c0cea0d0 4203 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4204 stac_gpio_set(codec, spec->gpio_mask,
4205 spec->gpio_dir, spec->gpio_data &
4206 ~spec->eapd_mask);
4e55096e 4207 } else {
d7a89436 4208 /* enable lineouts */
7c2ba97b 4209 if (spec->hp_switch)
d7a89436
TI
4210 stac92xx_set_pinctl(codec, spec->hp_switch,
4211 AC_PINCTL_OUT_EN);
4e55096e
M
4212 for (i = 0; i < cfg->line_outs; i++)
4213 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4214 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4215 for (i = 0; i < cfg->speaker_outs; i++)
4216 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4217 AC_PINCTL_OUT_EN);
c0cea0d0 4218 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4219 stac_gpio_set(codec, spec->gpio_mask,
4220 spec->gpio_dir, spec->gpio_data |
4221 spec->eapd_mask);
4e55096e 4222 }
d7a89436
TI
4223 /* toggle hp outs */
4224 for (i = 0; i < cfg->hp_outs; i++) {
4225 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4226 if (no_hp_sensing(spec, i))
4227 continue;
4228 if (presence)
4229 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI
4230#if 0 /* FIXME */
4231/* Resetting the pinctl like below may lead to (a sort of) regressions
4232 * on some devices since they use the HP pin actually for line/speaker
4233 * outs although the default pin config shows a different pin (that is
4234 * wrong and useless).
4235 *
4236 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4237 * But, disabling the code below just works around it, and I'm too tired of
4238 * bug reports with such devices...
4239 */
d7a89436
TI
4240 else
4241 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4242#endif /* FIXME */
d7a89436 4243 }
4e55096e
M
4244}
4245
f73d3585
TI
4246static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4247 int enable)
a64135a2
MR
4248{
4249 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI
4250 unsigned int idx, val;
4251
4252 for (idx = 0; idx < spec->num_pwrs; idx++) {
4253 if (spec->pwr_nids[idx] == nid)
4254 break;
4255 }
4256 if (idx >= spec->num_pwrs)
4257 return;
d0513fc6
MR
4258
4259 /* several codecs have two power down bits */
4260 if (spec->pwr_mapping)
4261 idx = spec->pwr_mapping[idx];
4262 else
4263 idx = 1 << idx;
a64135a2 4264
f73d3585
TI
4265 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4266 if (enable)
a64135a2
MR
4267 val &= ~idx;
4268 else
4269 val |= idx;
4270
4271 /* power down unused output ports */
4272 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR
4273}
4274
f73d3585
TI
4275static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4276{
e6e3ea25 4277 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4278}
a64135a2 4279
74aeaabc
MR
4280static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4281{
4282 struct sigmatel_spec *spec = codec->spec;
4283 struct sigmatel_jack *jacks = spec->jacks.list;
4284
4285 if (jacks) {
4286 int i;
4287 for (i = 0; i < spec->jacks.used; i++) {
4288 if (jacks->nid == nid) {
4289 unsigned int pin_ctl =
4290 snd_hda_codec_read(codec, nid,
4291 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4292 0x00);
4293 int type = jacks->type;
4294 if (type == (SND_JACK_LINEOUT
4295 | SND_JACK_HEADPHONE))
4296 type = (pin_ctl & AC_PINCTL_HP_EN)
4297 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4298 snd_jack_report(jacks->jack,
e6e3ea25 4299 get_pin_presence(codec, nid)
74aeaabc
MR
4300 ? type : 0);
4301 }
4302 jacks++;
4303 }
4304 }
4305}
a64135a2 4306
c6e4c666
TI
4307static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4308 unsigned char type)
4309{
4310 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4311 if (!event)
4312 return;
4313 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4314}
4315
314634bc
TI
4316static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4317{
a64135a2 4318 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
4319 struct sigmatel_event *event;
4320 int tag, data;
a64135a2 4321
c6e4c666
TI
4322 tag = (res >> 26) & 0x7f;
4323 event = stac_get_event_from_tag(codec, tag);
4324 if (!event)
4325 return;
4326
4327 switch (event->type) {
314634bc 4328 case STAC_HP_EVENT:
c6e4c666 4329 stac92xx_hp_detect(codec);
a64135a2 4330 /* fallthru */
74aeaabc 4331 case STAC_INSERT_EVENT:
a64135a2 4332 case STAC_PWR_EVENT:
c6e4c666
TI
4333 if (spec->num_pwrs > 0)
4334 stac92xx_pin_sense(codec, event->nid);
4335 stac92xx_report_jack(codec, event->nid);
72474be6 4336 break;
c6e4c666
TI
4337 case STAC_VREF_EVENT:
4338 data = snd_hda_codec_read(codec, codec->afg, 0,
4339 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR
4340 /* toggle VREF state based on GPIOx status */
4341 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4342 !!(data & (1 << event->data)));
72474be6 4343 break;
314634bc
TI
4344 }
4345}
4346
2d34e1b3
TI
4347#ifdef CONFIG_PROC_FS
4348static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4349 struct hda_codec *codec, hda_nid_t nid)
4350{
4351 if (nid == codec->afg)
4352 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4353 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4354}
4355
4356static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4357 struct hda_codec *codec,
4358 unsigned int verb)
4359{
4360 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4361 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4362}
4363
4364/* stac92hd71bxx, stac92hd73xx */
4365static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4366 struct hda_codec *codec, hda_nid_t nid)
4367{
4368 stac92hd_proc_hook(buffer, codec, nid);
4369 if (nid == codec->afg)
4370 analog_loop_proc_hook(buffer, codec, 0xfa0);
4371}
4372
4373static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4374 struct hda_codec *codec, hda_nid_t nid)
4375{
4376 if (nid == codec->afg)
4377 analog_loop_proc_hook(buffer, codec, 0xfe0);
4378}
4379
4380static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4381 struct hda_codec *codec, hda_nid_t nid)
4382{
4383 if (nid == codec->afg)
4384 analog_loop_proc_hook(buffer, codec, 0xfeb);
4385}
4386#else
4387#define stac92hd_proc_hook NULL
4388#define stac92hd7x_proc_hook NULL
4389#define stac9205_proc_hook NULL
4390#define stac927x_proc_hook NULL
4391#endif
4392
cb53c626 4393#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M
4394static int stac92xx_resume(struct hda_codec *codec)
4395{
dc81bed1
TI
4396 struct sigmatel_spec *spec = codec->spec;
4397
11b44bbd 4398 stac92xx_set_config_regs(codec);
2c885878 4399 stac92xx_init(codec);
82beb8fd
TI
4400 snd_hda_codec_resume_amp(codec);
4401 snd_hda_codec_resume_cache(codec);
2c885878 4402 /* fake event to set up pins again to override cached values */
dc81bed1 4403 if (spec->hp_detect)
c6e4c666
TI
4404 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4405 STAC_HP_EVENT);
ff6fdc37
M
4406 return 0;
4407}
c6798d2b
MR
4408
4409static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4410{
4411 struct sigmatel_spec *spec = codec->spec;
4412 if (spec->eapd_mask)
4413 stac_gpio_set(codec, spec->gpio_mask,
4414 spec->gpio_dir, spec->gpio_data &
4415 ~spec->eapd_mask);
4416 return 0;
4417}
ff6fdc37
M
4418#endif
4419
2f2f4251
M
4420static struct hda_codec_ops stac92xx_patch_ops = {
4421 .build_controls = stac92xx_build_controls,
4422 .build_pcms = stac92xx_build_pcms,
4423 .init = stac92xx_init,
4424 .free = stac92xx_free,
4e55096e 4425 .unsol_event = stac92xx_unsol_event,
cb53c626 4426#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4427 .suspend = stac92xx_suspend,
ff6fdc37
M
4428 .resume = stac92xx_resume,
4429#endif
2f2f4251
M
4430};
4431
4432static int patch_stac9200(struct hda_codec *codec)
4433{
4434 struct sigmatel_spec *spec;
c7d4b2fa 4435 int err;
2f2f4251 4436
e560d8d8 4437 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
4438 if (spec == NULL)
4439 return -ENOMEM;
4440
4441 codec->spec = spec;
a4eed138 4442 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4443 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI
4444 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4445 stac9200_models,
4446 stac9200_cfg_tbl);
11b44bbd
RF
4447 if (spec->board_config < 0) {
4448 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4449 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4450 } else
4451 err = stac_save_pin_cfgs(codec,
4452 stac9200_brd_tbl[spec->board_config]);
4453 if (err < 0) {
4454 stac92xx_free(codec);
4455 return err;
403d1944 4456 }
2f2f4251
M
4457
4458 spec->multiout.max_channels = 2;
4459 spec->multiout.num_dacs = 1;
4460 spec->multiout.dac_nids = stac9200_dac_nids;
4461 spec->adc_nids = stac9200_adc_nids;
4462 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4463 spec->num_muxes = 1;
8b65727b 4464 spec->num_dmics = 0;
9e05b7a3 4465 spec->num_adcs = 1;
a64135a2 4466 spec->num_pwrs = 0;
c7d4b2fa 4467
58eec423
MCC
4468 if (spec->board_config == STAC_9200_M4 ||
4469 spec->board_config == STAC_9200_M4_2 ||
bf277785 4470 spec->board_config == STAC_9200_OQO)
1194b5b7
TI
4471 spec->init = stac9200_eapd_init;
4472 else
4473 spec->init = stac9200_core_init;
2f2f4251 4474 spec->mixer = stac9200_mixer;
c7d4b2fa 4475
117f257d
TI
4476 if (spec->board_config == STAC_9200_PANASONIC) {
4477 spec->gpio_mask = spec->gpio_dir = 0x09;
4478 spec->gpio_data = 0x00;
4479 }
4480
c7d4b2fa
M
4481 err = stac9200_parse_auto_config(codec);
4482 if (err < 0) {
4483 stac92xx_free(codec);
4484 return err;
4485 }
2f2f4251 4486
2acc9dcb
TI
4487 /* CF-74 has no headphone detection, and the driver should *NOT*
4488 * do detection and HP/speaker toggle because the hardware does it.
4489 */
4490 if (spec->board_config == STAC_9200_PANASONIC)
4491 spec->hp_detect = 0;
4492
2f2f4251
M
4493 codec->patch_ops = stac92xx_patch_ops;
4494
4495 return 0;
4496}
4497
8e21c34c
TD
4498static int patch_stac925x(struct hda_codec *codec)
4499{
4500 struct sigmatel_spec *spec;
4501 int err;
4502
4503 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4504 if (spec == NULL)
4505 return -ENOMEM;
4506
4507 codec->spec = spec;
a4eed138 4508 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4509 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC
4510
4511 /* Check first for codec ID */
4512 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4513 STAC_925x_MODELS,
4514 stac925x_models,
4515 stac925x_codec_id_cfg_tbl);
4516
4517 /* Now checks for PCI ID, if codec ID is not found */
4518 if (spec->board_config < 0)
4519 spec->board_config = snd_hda_check_board_config(codec,
4520 STAC_925x_MODELS,
8e21c34c
TD
4521 stac925x_models,
4522 stac925x_cfg_tbl);
9e507abd 4523 again:
8e21c34c 4524 if (spec->board_config < 0) {
9cb36c2a 4525 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4526 "using BIOS defaults\n");
8e21c34c 4527 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4528 } else
4529 err = stac_save_pin_cfgs(codec,
4530 stac925x_brd_tbl[spec->board_config]);
4531 if (err < 0) {
4532 stac92xx_free(codec);
4533 return err;
8e21c34c
TD
4534 }
4535
4536 spec->multiout.max_channels = 2;
4537 spec->multiout.num_dacs = 1;
4538 spec->multiout.dac_nids = stac925x_dac_nids;
4539 spec->adc_nids = stac925x_adc_nids;
4540 spec->mux_nids = stac925x_mux_nids;
4541 spec->num_muxes = 1;
9e05b7a3 4542 spec->num_adcs = 1;
a64135a2 4543 spec->num_pwrs = 0;
2c11f955
TD
4544 switch (codec->vendor_id) {
4545 case 0x83847632: /* STAC9202 */
4546 case 0x83847633: /* STAC9202D */
4547 case 0x83847636: /* STAC9251 */
4548 case 0x83847637: /* STAC9251D */
f6e9852a 4549 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4550 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI
4551 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4552 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD
4553 break;
4554 default:
4555 spec->num_dmics = 0;
4556 break;
4557 }
8e21c34c
TD
4558
4559 spec->init = stac925x_core_init;
4560 spec->mixer = stac925x_mixer;
4561
4562 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI
4563 if (!err) {
4564 if (spec->board_config < 0) {
4565 printk(KERN_WARNING "hda_codec: No auto-config is "
4566 "available, default to model=ref\n");
4567 spec->board_config = STAC_925x_REF;
4568 goto again;
4569 }
4570 err = -EINVAL;
4571 }
8e21c34c
TD
4572 if (err < 0) {
4573 stac92xx_free(codec);
4574 return err;
4575 }
4576
4577 codec->patch_ops = stac92xx_patch_ops;
4578
4579 return 0;
4580}
4581
e1f0d669
MR
4582static struct hda_input_mux stac92hd73xx_dmux = {
4583 .num_items = 4,
4584 .items = {
4585 { "Analog Inputs", 0x0b },
e1f0d669
MR
4586 { "Digital Mic 1", 0x09 },
4587 { "Digital Mic 2", 0x0a },
2a9c7816 4588 { "CD", 0x08 },
e1f0d669
MR
4589 }
4590};
4591
4592static int patch_stac92hd73xx(struct hda_codec *codec)
4593{
4594 struct sigmatel_spec *spec;
4595 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4596 int err = 0;
c21ca4a8 4597 int num_dacs;
e1f0d669
MR
4598
4599 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4600 if (spec == NULL)
4601 return -ENOMEM;
4602
4603 codec->spec = spec;
e99d32b3 4604 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR
4605 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4606 spec->pin_nids = stac92hd73xx_pin_nids;
4607 spec->board_config = snd_hda_check_board_config(codec,
4608 STAC_92HD73XX_MODELS,
4609 stac92hd73xx_models,
4610 stac92hd73xx_cfg_tbl);
4611again:
4612 if (spec->board_config < 0) {
4613 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4614 " STAC92HD73XX, using BIOS defaults\n");
4615 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4616 } else
4617 err = stac_save_pin_cfgs(codec,
4618 stac92hd73xx_brd_tbl[spec->board_config]);
4619 if (err < 0) {
4620 stac92xx_free(codec);
4621 return err;
e1f0d669
MR
4622 }
4623
c21ca4a8 4624 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR
4625 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4626
c21ca4a8 4627 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR
4628 printk(KERN_WARNING "hda_codec: Could not determine "
4629 "number of channels defaulting to DAC count\n");
c21ca4a8 4630 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4631 }
c21ca4a8 4632 switch (num_dacs) {
e1f0d669
MR
4633 case 0x3: /* 6 Channel */
4634 spec->mixer = stac92hd73xx_6ch_mixer;
4635 spec->init = stac92hd73xx_6ch_core_init;
4636 break;
4637 case 0x4: /* 8 Channel */
e1f0d669
MR
4638 spec->mixer = stac92hd73xx_8ch_mixer;
4639 spec->init = stac92hd73xx_8ch_core_init;
4640 break;
4641 case 0x5: /* 10 Channel */
e1f0d669
MR
4642 spec->mixer = stac92hd73xx_10ch_mixer;
4643 spec->init = stac92hd73xx_10ch_core_init;
c21ca4a8
TI
4644 }
4645 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4646
e1f0d669
MR
4647 spec->aloopback_mask = 0x01;
4648 spec->aloopback_shift = 8;
4649
1cd2224c 4650 spec->digbeep_nid = 0x1c;
e1f0d669
MR
4651 spec->mux_nids = stac92hd73xx_mux_nids;
4652 spec->adc_nids = stac92hd73xx_adc_nids;
4653 spec->dmic_nids = stac92hd73xx_dmic_nids;
4654 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4655 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4656 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4657 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR
4658
4659 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4660 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4661 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR
4662 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4663 sizeof(stac92hd73xx_dmux));
4664
a7662640 4665 switch (spec->board_config) {
6b3ab21e 4666 case STAC_DELL_EQ:
d654a660 4667 spec->init = dell_eq_core_init;
6b3ab21e 4668 /* fallthru */
661cd8fb
TI
4669 case STAC_DELL_M6_AMIC:
4670 case STAC_DELL_M6_DMIC:
4671 case STAC_DELL_M6_BOTH:
2a9c7816 4672 spec->num_smuxes = 0;
2a9c7816
MR
4673 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4674 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4675 spec->eapd_switch = 0;
2a9c7816 4676 spec->num_amps = 1;
6b3ab21e 4677
c21ca4a8 4678 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4679 spec->init = dell_m6_core_init;
661cd8fb
TI
4680 switch (spec->board_config) {
4681 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR
4682 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4683 spec->num_dmics = 0;
2a9c7816 4684 spec->private_dimux.num_items = 1;
a7662640 4685 break;
661cd8fb 4686 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR
4687 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4688 spec->num_dmics = 1;
2a9c7816 4689 spec->private_dimux.num_items = 2;
a7662640 4690 break;
661cd8fb 4691 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR
4692 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4693 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4694 spec->num_dmics = 1;
2a9c7816 4695 spec->private_dimux.num_items = 2;
a7662640
MR
4696 break;
4697 }
4698 break;
4699 default:
4700 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4701 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4702 spec->eapd_switch = 1;
a7662640 4703 }
b2c4f4d7
MR
4704 if (spec->board_config > STAC_92HD73XX_REF) {
4705 /* GPIO0 High = Enable EAPD */
4706 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4707 spec->gpio_data = 0x01;
4708 }
2a9c7816 4709 spec->dinput_mux = &spec->private_dimux;
a7662640 4710
a64135a2
MR
4711 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4712 spec->pwr_nids = stac92hd73xx_pwr_nids;
4713
d9737751 4714 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR
4715
4716 if (!err) {
4717 if (spec->board_config < 0) {
4718 printk(KERN_WARNING "hda_codec: No auto-config is "
4719 "available, default to model=ref\n");
4720 spec->board_config = STAC_92HD73XX_REF;
4721 goto again;
4722 }
4723 err = -EINVAL;
4724 }
4725
4726 if (err < 0) {
4727 stac92xx_free(codec);
4728 return err;
4729 }
4730
9e43f0de
TI
4731 if (spec->board_config == STAC_92HD73XX_NO_JD)
4732 spec->hp_detect = 0;
4733
e1f0d669
MR
4734 codec->patch_ops = stac92xx_patch_ops;
4735
2d34e1b3
TI
4736 codec->proc_widget_hook = stac92hd7x_proc_hook;
4737
e1f0d669
MR
4738 return 0;
4739}
4740
d0513fc6
MR
4741static struct hda_input_mux stac92hd83xxx_dmux = {
4742 .num_items = 3,
4743 .items = {
4744 { "Analog Inputs", 0x03 },
4745 { "Digital Mic 1", 0x04 },
4746 { "Digital Mic 2", 0x05 },
4747 }
4748};
4749
4750static int patch_stac92hd83xxx(struct hda_codec *codec)
4751{
4752 struct sigmatel_spec *spec;
4753 int err;
4754
4755 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4756 if (spec == NULL)
4757 return -ENOMEM;
4758
4759 codec->spec = spec;
0ffa9807 4760 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR
4761 spec->mono_nid = 0x19;
4762 spec->digbeep_nid = 0x21;
4763 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4764 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4765 spec->adc_nids = stac92hd83xxx_adc_nids;
4766 spec->pwr_nids = stac92hd83xxx_pwr_nids;
c15c5060 4767 spec->amp_nids = stac92hd83xxx_amp_nids;
d0513fc6
MR
4768 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4769 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4770 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6
MR
4771
4772 spec->init = stac92hd83xxx_core_init;
4773 switch (codec->vendor_id) {
4774 case 0x111d7605:
d0513fc6
MR
4775 break;
4776 default:
4777 spec->num_pwrs--;
4778 spec->init++; /* switch to config #2 */
d0513fc6
MR
4779 }
4780
4781 spec->mixer = stac92hd83xxx_mixer;
4782 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4783 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4784 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
c15c5060 4785 spec->num_amps = ARRAY_SIZE(stac92hd83xxx_amp_nids);
d0513fc6
MR
4786 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4787 spec->dinput_mux = &stac92hd83xxx_dmux;
4788 spec->pin_nids = stac92hd83xxx_pin_nids;
4789 spec->board_config = snd_hda_check_board_config(codec,
4790 STAC_92HD83XXX_MODELS,
4791 stac92hd83xxx_models,
4792 stac92hd83xxx_cfg_tbl);
4793again:
4794 if (spec->board_config < 0) {
4795 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4796 " STAC92HD83XXX, using BIOS defaults\n");
4797 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4798 } else
4799 err = stac_save_pin_cfgs(codec,
4800 stac92hd83xxx_brd_tbl[spec->board_config]);
4801 if (err < 0) {
4802 stac92xx_free(codec);
4803 return err;
d0513fc6
MR
4804 }
4805
4806 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4807 if (!err) {
4808 if (spec->board_config < 0) {
4809 printk(KERN_WARNING "hda_codec: No auto-config is "
4810 "available, default to model=ref\n");
4811 spec->board_config = STAC_92HD83XXX_REF;
4812 goto again;
4813 }
4814 err = -EINVAL;
4815 }
4816
4817 if (err < 0) {
4818 stac92xx_free(codec);
4819 return err;
4820 }
4821
4822 codec->patch_ops = stac92xx_patch_ops;
4823
2d34e1b3
TI
4824 codec->proc_widget_hook = stac92hd_proc_hook;
4825
d0513fc6
MR
4826 return 0;
4827}
4828
4b33c767
MR
4829static struct hda_input_mux stac92hd71bxx_dmux = {
4830 .num_items = 4,
4831 .items = {
4832 { "Analog Inputs", 0x00 },
4833 { "Mixer", 0x01 },
4834 { "Digital Mic 1", 0x02 },
4835 { "Digital Mic 2", 0x03 },
4836 }
4837};
4838
e035b841
MR
4839static int patch_stac92hd71bxx(struct hda_codec *codec)
4840{
4841 struct sigmatel_spec *spec;
4842 int err = 0;
4843
4844 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4845 if (spec == NULL)
4846 return -ENOMEM;
4847
4848 codec->spec = spec;
8daaaa97 4849 codec->patch_ops = stac92xx_patch_ops;
e035b841 4850 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4851 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4852 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR
4853 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4854 sizeof(stac92hd71bxx_dmux));
e035b841
MR
4855 spec->board_config = snd_hda_check_board_config(codec,
4856 STAC_92HD71BXX_MODELS,
4857 stac92hd71bxx_models,
4858 stac92hd71bxx_cfg_tbl);
4859again:
4860 if (spec->board_config < 0) {
4861 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4862 " STAC92HD71BXX, using BIOS defaults\n");
4863 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4864 } else
4865 err = stac_save_pin_cfgs(codec,
4866 stac92hd71bxx_brd_tbl[spec->board_config]);
4867 if (err < 0) {
4868 stac92xx_free(codec);
4869 return err;
e035b841
MR
4870 }
4871
41c3b648
TI
4872 if (spec->board_config > STAC_92HD71BXX_REF) {
4873 /* GPIO0 = EAPD */
4874 spec->gpio_mask = 0x01;
4875 spec->gpio_dir = 0x01;
4876 spec->gpio_data = 0x01;
4877 }
4878
541eee87
MR
4879 switch (codec->vendor_id) {
4880 case 0x111d76b6: /* 4 Port without Analog Mixer */
4881 case 0x111d76b7:
4882 case 0x111d76b4: /* 6 Port without Analog Mixer */
4883 case 0x111d76b5:
4884 spec->mixer = stac92hd71bxx_mixer;
4885 spec->init = stac92hd71bxx_core_init;
0ffa9807 4886 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4887 break;
aafc4412 4888 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI
4889 switch (spec->board_config) {
4890 case STAC_HP_M4:
72474be6 4891 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI
4892 err = stac_add_event(spec, codec->afg,
4893 STAC_VREF_EVENT, 0x02);
4894 if (err < 0)
4895 return err;
c5d08bb5 4896 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR
4897 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4898 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4899 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4900 AC_USRSP_EN | err);
72474be6
MR
4901 spec->gpio_mask |= 0x02;
4902 break;
4903 }
8daaaa97 4904 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4905 (codec->revision_id & 0xf) == 1)
8daaaa97 4906 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4907
aafc4412
MR
4908 /* no output amps */
4909 spec->num_pwrs = 0;
4910 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4911 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR
4912
4913 /* disable VSW */
4914 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4915 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR
4916 break;
4917 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4918 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4919 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4920
aafc4412
MR
4921 /* no output amps */
4922 spec->num_pwrs = 0;
4923 /* fallthru */
541eee87 4924 default:
4b33c767 4925 spec->dinput_mux = &spec->private_dimux;
541eee87
MR
4926 spec->mixer = stac92hd71bxx_analog_mixer;
4927 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4928 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR
4929 }
4930
4b33c767 4931 spec->aloopback_mask = 0x50;
541eee87
MR
4932 spec->aloopback_shift = 0;
4933
8daaaa97 4934 spec->powerdown_adcs = 1;
1cd2224c 4935 spec->digbeep_nid = 0x26;
e035b841
MR
4936 spec->mux_nids = stac92hd71bxx_mux_nids;
4937 spec->adc_nids = stac92hd71bxx_adc_nids;
4938 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4939 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4940 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4941 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR
4942
4943 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4944 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4945
6a14f585
MR
4946 switch (spec->board_config) {
4947 case STAC_HP_M4:
6a14f585 4948 /* enable internal microphone */
af9f341a 4949 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR
4950 stac92xx_auto_set_pinctl(codec, 0x0e,
4951 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR
4952 /* fallthru */
4953 case STAC_DELL_M4_2:
4954 spec->num_dmics = 0;
4955 spec->num_smuxes = 0;
4956 spec->num_dmuxes = 0;
4957 break;
4958 case STAC_DELL_M4_1:
4959 case STAC_DELL_M4_3:
4960 spec->num_dmics = 1;
4961 spec->num_smuxes = 0;
4962 spec->num_dmuxes = 0;
6a14f585
MR
4963 break;
4964 default:
4965 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4966 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4967 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4968 };
4969
c21ca4a8 4970 spec->multiout.dac_nids = spec->dac_nids;
4b33c767
MR
4971 if (spec->dinput_mux)
4972 spec->private_dimux.num_items +=
4973 spec->num_dmics -
4974 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR
4975
4976 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4977 if (!err) {
4978 if (spec->board_config < 0) {
4979 printk(KERN_WARNING "hda_codec: No auto-config is "
4980 "available, default to model=ref\n");
4981 spec->board_config = STAC_92HD71BXX_REF;
4982 goto again;
4983 }
4984 err = -EINVAL;
4985 }
4986
4987 if (err < 0) {
4988 stac92xx_free(codec);
4989 return err;
4990 }
4991
2d34e1b3
TI
4992 codec->proc_widget_hook = stac92hd7x_proc_hook;
4993
e035b841
MR
4994 return 0;
4995};
4996
2f2f4251
M
4997static int patch_stac922x(struct hda_codec *codec)
4998{
4999 struct sigmatel_spec *spec;
c7d4b2fa 5000 int err;
2f2f4251 5001
e560d8d8 5002 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
5003 if (spec == NULL)
5004 return -ENOMEM;
5005
5006 codec->spec = spec;
a4eed138 5007 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5008 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI
5009 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5010 stac922x_models,
5011 stac922x_cfg_tbl);
536319af 5012 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR
5013 spec->gpio_mask = spec->gpio_dir = 0x03;
5014 spec->gpio_data = 0x03;
3fc24d85
TI
5015 /* Intel Macs have all same PCI SSID, so we need to check
5016 * codec SSID to distinguish the exact models
5017 */
6f0778d8 5018 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5019 switch (codec->subsystem_id) {
5d5d3bc3
IZ
5020
5021 case 0x106b0800:
5022 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5023 break;
5d5d3bc3
IZ
5024 case 0x106b0600:
5025 case 0x106b0700:
5026 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5027 break;
5d5d3bc3
IZ
5028 case 0x106b0e00:
5029 case 0x106b0f00:
5030 case 0x106b1600:
5031 case 0x106b1700:
5032 case 0x106b0200:
5033 case 0x106b1e00:
5034 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5035 break;
5d5d3bc3
IZ
5036 case 0x106b1a00:
5037 case 0x00000100:
5038 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5039 break;
5d5d3bc3
IZ
5040 case 0x106b0a00:
5041 case 0x106b2200:
5042 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5043 break;
536319af
NB
5044 default:
5045 spec->board_config = STAC_INTEL_MAC_V3;
5046 break;
3fc24d85
TI
5047 }
5048 }
5049
9e507abd 5050 again:
11b44bbd
RF
5051 if (spec->board_config < 0) {
5052 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5053 "using BIOS defaults\n");
5054 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5055 } else
5056 err = stac_save_pin_cfgs(codec,
5057 stac922x_brd_tbl[spec->board_config]);
5058 if (err < 0) {
5059 stac92xx_free(codec);
5060 return err;
403d1944 5061 }
2f2f4251 5062
c7d4b2fa
M
5063 spec->adc_nids = stac922x_adc_nids;
5064 spec->mux_nids = stac922x_mux_nids;
2549413e 5065 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5066 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5067 spec->num_dmics = 0;
a64135a2 5068 spec->num_pwrs = 0;
c7d4b2fa
M
5069
5070 spec->init = stac922x_core_init;
2f2f4251 5071 spec->mixer = stac922x_mixer;
c7d4b2fa
M
5072
5073 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5074
3cc08dc6 5075 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI
5076 if (!err) {
5077 if (spec->board_config < 0) {
5078 printk(KERN_WARNING "hda_codec: No auto-config is "
5079 "available, default to model=ref\n");
5080 spec->board_config = STAC_D945_REF;
5081 goto again;
5082 }
5083 err = -EINVAL;
5084 }
3cc08dc6
MP
5085 if (err < 0) {
5086 stac92xx_free(codec);
5087 return err;
5088 }
5089
5090 codec->patch_ops = stac92xx_patch_ops;
5091
807a4636
TI
5092 /* Fix Mux capture level; max to 2 */
5093 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5094 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5095 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5096 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5097 (0 << AC_AMPCAP_MUTE_SHIFT));
5098
3cc08dc6
MP
5099 return 0;
5100}
5101
5102static int patch_stac927x(struct hda_codec *codec)
5103{
5104 struct sigmatel_spec *spec;
5105 int err;
5106
5107 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5108 if (spec == NULL)
5109 return -ENOMEM;
5110
5111 codec->spec = spec;
a4eed138 5112 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5113 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI
5114 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5115 stac927x_models,
5116 stac927x_cfg_tbl);
9e507abd 5117 again:
8e9068b1
MR
5118 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5119 if (spec->board_config < 0)
5120 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5121 "STAC927x, using BIOS defaults\n");
11b44bbd 5122 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5123 } else
5124 err = stac_save_pin_cfgs(codec,
5125 stac927x_brd_tbl[spec->board_config]);
5126 if (err < 0) {
5127 stac92xx_free(codec);
5128 return err;
3cc08dc6
MP
5129 }
5130
1cd2224c 5131 spec->digbeep_nid = 0x23;
8e9068b1
MR
5132 spec->adc_nids = stac927x_adc_nids;
5133 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5134 spec->mux_nids = stac927x_mux_nids;
5135 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR
5136 spec->smux_nids = stac927x_smux_nids;
5137 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5138 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5139 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR
5140 spec->multiout.dac_nids = spec->dac_nids;
5141
81d3dbde 5142 switch (spec->board_config) {
93ed1503 5143 case STAC_D965_3ST:
93ed1503 5144 case STAC_D965_5ST:
8e9068b1 5145 /* GPIO0 High = Enable EAPD */
0fc9dec4 5146 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5147 spec->gpio_data = 0x01;
8e9068b1
MR
5148 spec->num_dmics = 0;
5149
93ed1503 5150 spec->init = d965_core_init;
9e05b7a3 5151 spec->mixer = stac927x_mixer;
81d3dbde 5152 break;
8e9068b1 5153 case STAC_DELL_BIOS:
780c8be4
MR
5154 switch (codec->subsystem_id) {
5155 case 0x10280209:
5156 case 0x1028022e:
5157 /* correct the device field to SPDIF out */
af9f341a 5158 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR
5159 break;
5160 };
03d7ca17 5161 /* configure the analog microphone on some laptops */
af9f341a 5162 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5163 /* correct the front output jack as a hp out */
af9f341a 5164 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5165 /* correct the front input jack as a mic */
af9f341a 5166 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5167 /* fallthru */
8e9068b1
MR
5168 case STAC_DELL_3ST:
5169 /* GPIO2 High = Enable EAPD */
0fc9dec4 5170 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5171 spec->gpio_data = 0x04;
7f16859a
MR
5172 spec->dmic_nids = stac927x_dmic_nids;
5173 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5174
8e9068b1
MR
5175 spec->init = d965_core_init;
5176 spec->mixer = stac927x_mixer;
5177 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5178 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR
5179 break;
5180 default:
b2c4f4d7
MR
5181 if (spec->board_config > STAC_D965_REF) {
5182 /* GPIO0 High = Enable EAPD */
5183 spec->eapd_mask = spec->gpio_mask = 0x01;
5184 spec->gpio_dir = spec->gpio_data = 0x01;
5185 }
8e9068b1
MR
5186 spec->num_dmics = 0;
5187
5188 spec->init = stac927x_core_init;
5189 spec->mixer = stac927x_mixer;
7f16859a
MR
5190 }
5191
a64135a2 5192 spec->num_pwrs = 0;
e1f0d669
MR
5193 spec->aloopback_mask = 0x40;
5194 spec->aloopback_shift = 0;
c0cea0d0 5195 spec->eapd_switch = 1;
8e9068b1 5196
3cc08dc6 5197 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI
5198 if (!err) {
5199 if (spec->board_config < 0) {
5200 printk(KERN_WARNING "hda_codec: No auto-config is "
5201 "available, default to model=ref\n");
5202 spec->board_config = STAC_D965_REF;
5203 goto again;
5204 }
5205 err = -EINVAL;
5206 }
c7d4b2fa
M
5207 if (err < 0) {
5208 stac92xx_free(codec);
5209 return err;
5210 }
2f2f4251
M
5211
5212 codec->patch_ops = stac92xx_patch_ops;
5213
2d34e1b3
TI
5214 codec->proc_widget_hook = stac927x_proc_hook;
5215
52987656
TI
5216 /*
5217 * !!FIXME!!
5218 * The STAC927x seem to require fairly long delays for certain
5219 * command sequences. With too short delays (even if the answer
5220 * is set to RIRB properly), it results in the silence output
5221 * on some hardwares like Dell.
5222 *
5223 * The below flag enables the longer delay (see get_response
5224 * in hda_intel.c).
5225 */
5226 codec->bus->needs_damn_long_delay = 1;
5227
e28d8322
TI
5228 /* no jack detecion for ref-no-jd model */
5229 if (spec->board_config == STAC_D965_REF_NO_JD)
5230 spec->hp_detect = 0;
5231
2f2f4251
M
5232 return 0;
5233}
5234
f3302a59
MP
5235static int patch_stac9205(struct hda_codec *codec)
5236{
5237 struct sigmatel_spec *spec;
8259980e 5238 int err;
f3302a59
MP
5239
5240 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5241 if (spec == NULL)
5242 return -ENOMEM;
5243
5244 codec->spec = spec;
a4eed138 5245 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5246 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI
5247 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5248 stac9205_models,
5249 stac9205_cfg_tbl);
9e507abd 5250 again:
11b44bbd
RF
5251 if (spec->board_config < 0) {
5252 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5253 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5254 } else
5255 err = stac_save_pin_cfgs(codec,
5256 stac9205_brd_tbl[spec->board_config]);
5257 if (err < 0) {
5258 stac92xx_free(codec);
5259 return err;
f3302a59
MP
5260 }
5261
1cd2224c 5262 spec->digbeep_nid = 0x23;
f3302a59 5263 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5264 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5265 spec->mux_nids = stac9205_mux_nids;
2549413e 5266 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR
5267 spec->smux_nids = stac9205_smux_nids;
5268 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5269 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5270 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5271 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5272 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5273 spec->num_pwrs = 0;
f3302a59
MP
5274
5275 spec->init = stac9205_core_init;
5276 spec->mixer = stac9205_mixer;
5277
e1f0d669
MR
5278 spec->aloopback_mask = 0x40;
5279 spec->aloopback_shift = 0;
c0cea0d0 5280 spec->eapd_switch = 1;
f3302a59 5281 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5282
ae0a8ed8 5283 switch (spec->board_config){
ae0a8ed8 5284 case STAC_9205_DELL_M43:
87d48363 5285 /* Enable SPDIF in/out */
af9f341a
TI
5286 stac_change_pin_config(codec, 0x1f, 0x01441030);
5287 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5288
4fe5195c 5289 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI
5290 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5291 if (err < 0)
5292 return err;
c5d08bb5 5293 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR
5294 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5295 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI
5296 AC_VERB_SET_UNSOLICITED_ENABLE,
5297 AC_USRSP_EN | err);
4fe5195c
MR
5298
5299 spec->gpio_dir = 0x0b;
0fc9dec4 5300 spec->eapd_mask = 0x01;
4fe5195c
MR
5301 spec->gpio_mask = 0x1b;
5302 spec->gpio_mute = 0x10;
e2e7d624 5303 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5304 * GPIO3 Low = DRM
87d48363 5305 */
4fe5195c 5306 spec->gpio_data = 0x01;
ae0a8ed8 5307 break;
b2c4f4d7
MR
5308 case STAC_9205_REF:
5309 /* SPDIF-In enabled */
5310 break;
ae0a8ed8
TD
5311 default:
5312 /* GPIO0 High = EAPD */
0fc9dec4 5313 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5314 spec->gpio_data = 0x01;
ae0a8ed8
TD
5315 break;
5316 }
33382403 5317
f3302a59 5318 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI
5319 if (!err) {
5320 if (spec->board_config < 0) {
5321 printk(KERN_WARNING "hda_codec: No auto-config is "
5322 "available, default to model=ref\n");
5323 spec->board_config = STAC_9205_REF;
5324 goto again;
5325 }
5326 err = -EINVAL;
5327 }
f3302a59
MP
5328 if (err < 0) {
5329 stac92xx_free(codec);
5330 return err;
5331 }
5332
5333 codec->patch_ops = stac92xx_patch_ops;
5334
2d34e1b3
TI
5335 codec->proc_widget_hook = stac9205_proc_hook;
5336
f3302a59
MP
5337 return 0;
5338}
5339
db064e50 5340/*
6d859065 5341 * STAC9872 hack
db064e50
TI
5342 */
5343
99ccc560 5344/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI
5345static hda_nid_t vaio_dacs[] = { 0x2 };
5346#define VAIO_HP_DAC 0x5
5347static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5348static hda_nid_t vaio_mux_nids[] = { 0x15 };
5349
5350static struct hda_input_mux vaio_mux = {
a3a2f429 5351 .num_items = 3,
db064e50 5352 .items = {
d773781c 5353 /* { "HP", 0x0 }, */
1624cb9a
TI
5354 { "Mic Jack", 0x1 },
5355 { "Internal Mic", 0x2 },
db064e50
TI
5356 { "PCM", 0x3 },
5357 }
5358};
5359
5360static struct hda_verb vaio_init[] = {
5361 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5362 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI
5363 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5364 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5365 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5366 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5367 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI
5368 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5369 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5370 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5371 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5372 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5373 {}
5374};
5375
6d859065
GM
5376static struct hda_verb vaio_ar_init[] = {
5377 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5378 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5379 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5380 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5381/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5382 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5383 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM
5384 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5385 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5386/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5387 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5388 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5389 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5390 {}
5391};
5392
db064e50 5393static struct snd_kcontrol_new vaio_mixer[] = {
127e82e3
TI
5394 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5395 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5396 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5397 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
db064e50
TI
5398 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5399 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5400 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5401 {
5402 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5403 .name = "Capture Source",
5404 .count = 1,
5405 .info = stac92xx_mux_enum_info,
5406 .get = stac92xx_mux_enum_get,
5407 .put = stac92xx_mux_enum_put,
5408 },
5409 {}
5410};
5411
6d859065 5412static struct snd_kcontrol_new vaio_ar_mixer[] = {
127e82e3
TI
5413 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5414 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5415 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5416 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
6d859065
GM
5417 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5418 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5419 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5420 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5421 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5422 {
5423 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5424 .name = "Capture Source",
5425 .count = 1,
5426 .info = stac92xx_mux_enum_info,
5427 .get = stac92xx_mux_enum_get,
5428 .put = stac92xx_mux_enum_put,
5429 },
5430 {}
5431};
5432
5433static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI
5434 .build_controls = stac92xx_build_controls,
5435 .build_pcms = stac92xx_build_pcms,
5436 .init = stac92xx_init,
5437 .free = stac92xx_free,
cb53c626 5438#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI
5439 .resume = stac92xx_resume,
5440#endif
5441};
5442
72e7b0dd
TI
5443static int stac9872_vaio_init(struct hda_codec *codec)
5444{
5445 int err;
5446
5447 err = stac92xx_init(codec);
5448 if (err < 0)
5449 return err;
5450 if (codec->patch_ops.unsol_event)
5451 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5452 return 0;
5453}
5454
5455static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5456{
e6e3ea25 5457 if (get_pin_presence(codec, 0x0a)) {
72e7b0dd
TI
5458 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5459 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5460 } else {
5461 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5462 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5463 }
5464}
5465
5466static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5467{
5468 switch (res >> 26) {
5469 case STAC_HP_EVENT:
5470 stac9872_vaio_hp_detect(codec, res);
5471 break;
5472 }
5473}
5474
5475static struct hda_codec_ops stac9872_vaio_patch_ops = {
5476 .build_controls = stac92xx_build_controls,
5477 .build_pcms = stac92xx_build_pcms,
5478 .init = stac9872_vaio_init,
5479 .free = stac92xx_free,
5480 .unsol_event = stac9872_vaio_unsol_event,
5481#ifdef CONFIG_PM
5482 .resume = stac92xx_resume,
5483#endif
5484};
5485
6d859065
GM
5486enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5487 CXD9872RD_VAIO,
5488 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5489 STAC9872AK_VAIO,
5490 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5491 STAC9872K_VAIO,
5492 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI
5493 CXD9872AKD_VAIO,
5494 STAC_9872_MODELS,
5495};
5496
5497static const char *stac9872_models[STAC_9872_MODELS] = {
5498 [CXD9872RD_VAIO] = "vaio",
5499 [CXD9872AKD_VAIO] = "vaio-ar",
5500};
5501
5502static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5503 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5504 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5505 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5506 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI
5507 {}
5508};
5509
6d859065 5510static int patch_stac9872(struct hda_codec *codec)
db064e50
TI
5511{
5512 struct sigmatel_spec *spec;
5513 int board_config;
5514
f5fcc13c
TI
5515 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5516 stac9872_models,
5517 stac9872_cfg_tbl);
db064e50
TI
5518 if (board_config < 0)
5519 /* unknown config, let generic-parser do its job... */
5520 return snd_hda_parse_generic_codec(codec);
5521
5522 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5523 if (spec == NULL)
5524 return -ENOMEM;
5525
5526 codec->spec = spec;
5527 switch (board_config) {
6d859065
GM
5528 case CXD9872RD_VAIO:
5529 case STAC9872AK_VAIO:
5530 case STAC9872K_VAIO:
db064e50
TI
5531 spec->mixer = vaio_mixer;
5532 spec->init = vaio_init;
5533 spec->multiout.max_channels = 2;
5534 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5535 spec->multiout.dac_nids = vaio_dacs;
5536 spec->multiout.hp_nid = VAIO_HP_DAC;
5537 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5538 spec->adc_nids = vaio_adcs;
a64135a2 5539 spec->num_pwrs = 0;
db064e50
TI
5540 spec->input_mux = &vaio_mux;
5541 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5542 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5543 break;
6d859065
GM
5544
5545 case CXD9872AKD_VAIO:
5546 spec->mixer = vaio_ar_mixer;
5547 spec->init = vaio_ar_init;
5548 spec->multiout.max_channels = 2;
5549 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5550 spec->multiout.dac_nids = vaio_dacs;
5551 spec->multiout.hp_nid = VAIO_HP_DAC;
5552 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5553 spec->num_pwrs = 0;
6d859065
GM
5554 spec->adc_nids = vaio_adcs;
5555 spec->input_mux = &vaio_mux;
5556 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5557 codec->patch_ops = stac9872_patch_ops;
6d859065 5558 break;
db064e50
TI
5559 }
5560
db064e50
TI
5561 return 0;
5562}
5563
5564
2f2f4251
M
5565/*
5566 * patch entries
5567 */
1289e9e8 5568static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M
5569 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5570 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5571 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5572 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5573 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5574 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5575 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP
5576 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5577 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5578 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5579 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5580 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5581 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP
5582 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5583 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5584 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5585 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5586 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5587 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5588 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5589 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5590 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5591 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD
5592 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5593 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5594 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5595 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5596 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5597 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI
5598 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5599 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM
5600 /* The following does not take into account .id=0x83847661 when subsys =
5601 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5602 * currently not fully supported.
5603 */
5604 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5605 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5606 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP
5607 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5608 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5609 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5610 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5611 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5612 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5613 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5614 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5615 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR
5616 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5617 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5618 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR
5619 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5620 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5621 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR
5622 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5623 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5624 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5625 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5626 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5627 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5628 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5629 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M
5630 {} /* terminator */
5631};
1289e9e8
TI
5632
5633MODULE_ALIAS("snd-hda-codec-id:8384*");
5634MODULE_ALIAS("snd-hda-codec-id:111d*");
5635
5636MODULE_LICENSE("GPL");
5637MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5638
5639static struct hda_codec_preset_list sigmatel_list = {
5640 .preset = snd_hda_preset_sigmatel,
5641 .owner = THIS_MODULE,
5642};
5643
5644static int __init patch_sigmatel_init(void)
5645{
5646 return snd_hda_add_codec_preset(&sigmatel_list);
5647}
5648
5649static void __exit patch_sigmatel_exit(void)
5650{
5651 snd_hda_delete_codec_preset(&sigmatel_list);
5652}
5653
5654module_init(patch_sigmatel_init)
5655module_exit(patch_sigmatel_exit)