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2f2f4251 M |
1 | /* |
2 | * Universal Interface for Intel High Definition Audio Codec | |
3 | * | |
4 | * HD audio interface patch for SigmaTel STAC92xx | |
5 | * | |
6 | * Copyright (c) 2005 Embedded Alley Solutions, Inc. | |
403d1944 | 7 | * Matt Porter <mporter@embeddedalley.com> |
2f2f4251 M |
8 | * |
9 | * Based on patch_cmedia.c and patch_realtek.c | |
10 | * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> | |
11 | * | |
12 | * This driver is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2 of the License, or | |
15 | * (at your option) any later version. | |
16 | * | |
17 | * This driver is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
25 | */ | |
26 | ||
2f2f4251 M |
27 | #include <linux/init.h> |
28 | #include <linux/delay.h> | |
29 | #include <linux/slab.h> | |
30 | #include <linux/pci.h> | |
31 | #include <sound/core.h> | |
c7d4b2fa | 32 | #include <sound/asoundef.h> |
2f2f4251 M |
33 | #include "hda_codec.h" |
34 | #include "hda_local.h" | |
35 | ||
4e55096e M |
36 | #define NUM_CONTROL_ALLOC 32 |
37 | #define STAC_HP_EVENT 0x37 | |
4e55096e | 38 | |
f5fcc13c TI |
39 | enum { |
40 | STAC_REF, | |
dfe495d0 TI |
41 | STAC_9200_DELL_D21, |
42 | STAC_9200_DELL_D22, | |
43 | STAC_9200_DELL_D23, | |
44 | STAC_9200_DELL_M21, | |
45 | STAC_9200_DELL_M22, | |
46 | STAC_9200_DELL_M23, | |
47 | STAC_9200_DELL_M24, | |
48 | STAC_9200_DELL_M25, | |
49 | STAC_9200_DELL_M26, | |
50 | STAC_9200_DELL_M27, | |
1194b5b7 | 51 | STAC_9200_GATEWAY, |
f5fcc13c TI |
52 | STAC_9200_MODELS |
53 | }; | |
54 | ||
55 | enum { | |
56 | STAC_9205_REF, | |
dfe495d0 | 57 | STAC_9205_DELL_M42, |
ae0a8ed8 TD |
58 | STAC_9205_DELL_M43, |
59 | STAC_9205_DELL_M44, | |
f5fcc13c TI |
60 | STAC_9205_MODELS |
61 | }; | |
62 | ||
e1f0d669 MR |
63 | enum { |
64 | STAC_92HD73XX_REF, | |
65 | STAC_92HD73XX_MODELS | |
66 | }; | |
67 | ||
e035b841 MR |
68 | enum { |
69 | STAC_92HD71BXX_REF, | |
70 | STAC_92HD71BXX_MODELS | |
71 | }; | |
72 | ||
8e21c34c TD |
73 | enum { |
74 | STAC_925x_REF, | |
75 | STAC_M2_2, | |
76 | STAC_MA6, | |
2c11f955 | 77 | STAC_PA6, |
8e21c34c TD |
78 | STAC_925x_MODELS |
79 | }; | |
80 | ||
f5fcc13c TI |
81 | enum { |
82 | STAC_D945_REF, | |
83 | STAC_D945GTP3, | |
84 | STAC_D945GTP5, | |
5d5d3bc3 IZ |
85 | STAC_INTEL_MAC_V1, |
86 | STAC_INTEL_MAC_V2, | |
87 | STAC_INTEL_MAC_V3, | |
88 | STAC_INTEL_MAC_V4, | |
89 | STAC_INTEL_MAC_V5, | |
dfe495d0 | 90 | /* for backward compatibility */ |
f5fcc13c | 91 | STAC_MACMINI, |
3fc24d85 | 92 | STAC_MACBOOK, |
6f0778d8 NB |
93 | STAC_MACBOOK_PRO_V1, |
94 | STAC_MACBOOK_PRO_V2, | |
f16928fb | 95 | STAC_IMAC_INTEL, |
0dae0f83 | 96 | STAC_IMAC_INTEL_20, |
dfe495d0 TI |
97 | STAC_922X_DELL_D81, |
98 | STAC_922X_DELL_D82, | |
99 | STAC_922X_DELL_M81, | |
100 | STAC_922X_DELL_M82, | |
f5fcc13c TI |
101 | STAC_922X_MODELS |
102 | }; | |
103 | ||
104 | enum { | |
105 | STAC_D965_REF, | |
106 | STAC_D965_3ST, | |
107 | STAC_D965_5ST, | |
4ff076e5 | 108 | STAC_DELL_3ST, |
8e9068b1 | 109 | STAC_DELL_BIOS, |
f5fcc13c TI |
110 | STAC_927X_MODELS |
111 | }; | |
403d1944 | 112 | |
2f2f4251 | 113 | struct sigmatel_spec { |
c8b6bf9b | 114 | struct snd_kcontrol_new *mixers[4]; |
c7d4b2fa M |
115 | unsigned int num_mixers; |
116 | ||
403d1944 | 117 | int board_config; |
c7d4b2fa | 118 | unsigned int surr_switch: 1; |
403d1944 MP |
119 | unsigned int line_switch: 1; |
120 | unsigned int mic_switch: 1; | |
3cc08dc6 | 121 | unsigned int alt_switch: 1; |
82bc955f | 122 | unsigned int hp_detect: 1; |
62fe78e9 | 123 | unsigned int gpio_mute: 1; |
c7d4b2fa | 124 | |
8259980e | 125 | unsigned int gpio_mask, gpio_data; |
e1f0d669 MR |
126 | unsigned char aloopback_mask; |
127 | unsigned char aloopback_shift; | |
8259980e | 128 | |
2f2f4251 M |
129 | /* playback */ |
130 | struct hda_multi_out multiout; | |
3cc08dc6 | 131 | hda_nid_t dac_nids[5]; |
2f2f4251 M |
132 | |
133 | /* capture */ | |
134 | hda_nid_t *adc_nids; | |
2f2f4251 | 135 | unsigned int num_adcs; |
dabbed6f M |
136 | hda_nid_t *mux_nids; |
137 | unsigned int num_muxes; | |
8b65727b MP |
138 | hda_nid_t *dmic_nids; |
139 | unsigned int num_dmics; | |
e1f0d669 | 140 | hda_nid_t *dmux_nids; |
1697055e | 141 | unsigned int num_dmuxes; |
dabbed6f | 142 | hda_nid_t dig_in_nid; |
2f2f4251 | 143 | |
2f2f4251 M |
144 | /* pin widgets */ |
145 | hda_nid_t *pin_nids; | |
146 | unsigned int num_pins; | |
2f2f4251 | 147 | unsigned int *pin_configs; |
11b44bbd | 148 | unsigned int *bios_pin_configs; |
2f2f4251 M |
149 | |
150 | /* codec specific stuff */ | |
151 | struct hda_verb *init; | |
c8b6bf9b | 152 | struct snd_kcontrol_new *mixer; |
2f2f4251 M |
153 | |
154 | /* capture source */ | |
8b65727b | 155 | struct hda_input_mux *dinput_mux; |
e1f0d669 | 156 | unsigned int cur_dmux[2]; |
c7d4b2fa | 157 | struct hda_input_mux *input_mux; |
3cc08dc6 | 158 | unsigned int cur_mux[3]; |
2f2f4251 | 159 | |
403d1944 MP |
160 | /* i/o switches */ |
161 | unsigned int io_switch[2]; | |
0fb87bb4 | 162 | unsigned int clfe_swap; |
5f10c4a9 | 163 | unsigned int aloopback; |
2f2f4251 | 164 | |
c7d4b2fa M |
165 | struct hda_pcm pcm_rec[2]; /* PCM information */ |
166 | ||
167 | /* dynamic controls and input_mux */ | |
168 | struct auto_pin_cfg autocfg; | |
169 | unsigned int num_kctl_alloc, num_kctl_used; | |
c8b6bf9b | 170 | struct snd_kcontrol_new *kctl_alloc; |
8b65727b | 171 | struct hda_input_mux private_dimux; |
c7d4b2fa | 172 | struct hda_input_mux private_imux; |
2f2f4251 M |
173 | }; |
174 | ||
175 | static hda_nid_t stac9200_adc_nids[1] = { | |
176 | 0x03, | |
177 | }; | |
178 | ||
179 | static hda_nid_t stac9200_mux_nids[1] = { | |
180 | 0x0c, | |
181 | }; | |
182 | ||
183 | static hda_nid_t stac9200_dac_nids[1] = { | |
184 | 0x02, | |
185 | }; | |
186 | ||
e1f0d669 MR |
187 | static hda_nid_t stac92hd73xx_adc_nids[2] = { |
188 | 0x1a, 0x1b | |
189 | }; | |
190 | ||
191 | #define STAC92HD73XX_NUM_DMICS 2 | |
192 | static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = { | |
193 | 0x13, 0x14, 0 | |
194 | }; | |
195 | ||
196 | #define STAC92HD73_DAC_COUNT 5 | |
197 | static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = { | |
198 | 0x15, 0x16, 0x17, 0x18, 0x19, | |
199 | }; | |
200 | ||
201 | static hda_nid_t stac92hd73xx_mux_nids[4] = { | |
202 | 0x28, 0x29, 0x2a, 0x2b, | |
203 | }; | |
204 | ||
205 | static hda_nid_t stac92hd73xx_dmux_nids[2] = { | |
206 | 0x20, 0x21, | |
207 | }; | |
208 | ||
e035b841 MR |
209 | static hda_nid_t stac92hd71bxx_adc_nids[2] = { |
210 | 0x12, 0x13, | |
211 | }; | |
212 | ||
213 | static hda_nid_t stac92hd71bxx_mux_nids[2] = { | |
214 | 0x1a, 0x1b | |
215 | }; | |
216 | ||
e1f0d669 MR |
217 | static hda_nid_t stac92hd71bxx_dmux_nids[1] = { |
218 | 0x1c, | |
219 | }; | |
220 | ||
e035b841 MR |
221 | static hda_nid_t stac92hd71bxx_dac_nids[2] = { |
222 | 0x10, /*0x11, */ | |
223 | }; | |
224 | ||
225 | #define STAC92HD71BXX_NUM_DMICS 2 | |
226 | static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = { | |
227 | 0x18, 0x19, 0 | |
228 | }; | |
229 | ||
8e21c34c TD |
230 | static hda_nid_t stac925x_adc_nids[1] = { |
231 | 0x03, | |
232 | }; | |
233 | ||
234 | static hda_nid_t stac925x_mux_nids[1] = { | |
235 | 0x0f, | |
236 | }; | |
237 | ||
238 | static hda_nid_t stac925x_dac_nids[1] = { | |
239 | 0x02, | |
240 | }; | |
241 | ||
f6e9852a TI |
242 | #define STAC925X_NUM_DMICS 1 |
243 | static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = { | |
244 | 0x15, 0 | |
2c11f955 TD |
245 | }; |
246 | ||
1697055e TI |
247 | static hda_nid_t stac925x_dmux_nids[1] = { |
248 | 0x14, | |
249 | }; | |
250 | ||
2f2f4251 M |
251 | static hda_nid_t stac922x_adc_nids[2] = { |
252 | 0x06, 0x07, | |
253 | }; | |
254 | ||
255 | static hda_nid_t stac922x_mux_nids[2] = { | |
256 | 0x12, 0x13, | |
257 | }; | |
258 | ||
3cc08dc6 MP |
259 | static hda_nid_t stac927x_adc_nids[3] = { |
260 | 0x07, 0x08, 0x09 | |
261 | }; | |
262 | ||
263 | static hda_nid_t stac927x_mux_nids[3] = { | |
264 | 0x15, 0x16, 0x17 | |
265 | }; | |
266 | ||
e1f0d669 MR |
267 | static hda_nid_t stac927x_dmux_nids[1] = { |
268 | 0x1b, | |
269 | }; | |
270 | ||
7f16859a MR |
271 | #define STAC927X_NUM_DMICS 2 |
272 | static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = { | |
273 | 0x13, 0x14, 0 | |
274 | }; | |
275 | ||
f3302a59 MP |
276 | static hda_nid_t stac9205_adc_nids[2] = { |
277 | 0x12, 0x13 | |
278 | }; | |
279 | ||
280 | static hda_nid_t stac9205_mux_nids[2] = { | |
281 | 0x19, 0x1a | |
282 | }; | |
283 | ||
e1f0d669 | 284 | static hda_nid_t stac9205_dmux_nids[1] = { |
1697055e | 285 | 0x1d, |
e1f0d669 MR |
286 | }; |
287 | ||
f6e9852a TI |
288 | #define STAC9205_NUM_DMICS 2 |
289 | static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = { | |
290 | 0x17, 0x18, 0 | |
8b65727b MP |
291 | }; |
292 | ||
c7d4b2fa | 293 | static hda_nid_t stac9200_pin_nids[8] = { |
93ed1503 TD |
294 | 0x08, 0x09, 0x0d, 0x0e, |
295 | 0x0f, 0x10, 0x11, 0x12, | |
2f2f4251 M |
296 | }; |
297 | ||
8e21c34c TD |
298 | static hda_nid_t stac925x_pin_nids[8] = { |
299 | 0x07, 0x08, 0x0a, 0x0b, | |
300 | 0x0c, 0x0d, 0x10, 0x11, | |
301 | }; | |
302 | ||
2f2f4251 M |
303 | static hda_nid_t stac922x_pin_nids[10] = { |
304 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | |
305 | 0x0f, 0x10, 0x11, 0x15, 0x1b, | |
306 | }; | |
307 | ||
e1f0d669 MR |
308 | static hda_nid_t stac92hd73xx_pin_nids[12] = { |
309 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | |
310 | 0x0f, 0x10, 0x11, 0x12, 0x13, | |
311 | 0x14, 0x22 | |
312 | }; | |
313 | ||
e035b841 MR |
314 | static hda_nid_t stac92hd71bxx_pin_nids[10] = { |
315 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | |
316 | 0x0f, 0x14, 0x18, 0x19, 0x1e, | |
317 | }; | |
318 | ||
3cc08dc6 MP |
319 | static hda_nid_t stac927x_pin_nids[14] = { |
320 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | |
321 | 0x0f, 0x10, 0x11, 0x12, 0x13, | |
322 | 0x14, 0x21, 0x22, 0x23, | |
323 | }; | |
324 | ||
f3302a59 MP |
325 | static hda_nid_t stac9205_pin_nids[12] = { |
326 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | |
327 | 0x0f, 0x14, 0x16, 0x17, 0x18, | |
328 | 0x21, 0x22, | |
f3302a59 MP |
329 | }; |
330 | ||
8b65727b MP |
331 | static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol, |
332 | struct snd_ctl_elem_info *uinfo) | |
333 | { | |
334 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
335 | struct sigmatel_spec *spec = codec->spec; | |
336 | return snd_hda_input_mux_info(spec->dinput_mux, uinfo); | |
337 | } | |
338 | ||
339 | static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol, | |
340 | struct snd_ctl_elem_value *ucontrol) | |
341 | { | |
342 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
343 | struct sigmatel_spec *spec = codec->spec; | |
e1f0d669 | 344 | unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
8b65727b | 345 | |
e1f0d669 | 346 | ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx]; |
8b65727b MP |
347 | return 0; |
348 | } | |
349 | ||
350 | static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol, | |
351 | struct snd_ctl_elem_value *ucontrol) | |
352 | { | |
353 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
354 | struct sigmatel_spec *spec = codec->spec; | |
e1f0d669 | 355 | unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
8b65727b MP |
356 | |
357 | return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol, | |
e1f0d669 | 358 | spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]); |
8b65727b MP |
359 | } |
360 | ||
c8b6bf9b | 361 | static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
2f2f4251 M |
362 | { |
363 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
364 | struct sigmatel_spec *spec = codec->spec; | |
c7d4b2fa | 365 | return snd_hda_input_mux_info(spec->input_mux, uinfo); |
2f2f4251 M |
366 | } |
367 | ||
c8b6bf9b | 368 | static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
2f2f4251 M |
369 | { |
370 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
371 | struct sigmatel_spec *spec = codec->spec; | |
372 | unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); | |
373 | ||
374 | ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx]; | |
375 | return 0; | |
376 | } | |
377 | ||
c8b6bf9b | 378 | static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
2f2f4251 M |
379 | { |
380 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
381 | struct sigmatel_spec *spec = codec->spec; | |
382 | unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); | |
383 | ||
c7d4b2fa | 384 | return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol, |
2f2f4251 M |
385 | spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]); |
386 | } | |
387 | ||
5f10c4a9 ML |
388 | #define stac92xx_aloopback_info snd_ctl_boolean_mono_info |
389 | ||
390 | static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol, | |
391 | struct snd_ctl_elem_value *ucontrol) | |
392 | { | |
393 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
e1f0d669 | 394 | unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
5f10c4a9 ML |
395 | struct sigmatel_spec *spec = codec->spec; |
396 | ||
e1f0d669 MR |
397 | ucontrol->value.integer.value[0] = !!(spec->aloopback & |
398 | (spec->aloopback_mask << idx)); | |
5f10c4a9 ML |
399 | return 0; |
400 | } | |
401 | ||
402 | static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol, | |
403 | struct snd_ctl_elem_value *ucontrol) | |
404 | { | |
405 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
406 | struct sigmatel_spec *spec = codec->spec; | |
e1f0d669 | 407 | unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
5f10c4a9 | 408 | unsigned int dac_mode; |
e1f0d669 | 409 | unsigned int val, idx_val; |
5f10c4a9 | 410 | |
e1f0d669 MR |
411 | idx_val = spec->aloopback_mask << idx; |
412 | if (ucontrol->value.integer.value[0]) | |
413 | val = spec->aloopback | idx_val; | |
414 | else | |
415 | val = spec->aloopback & ~idx_val; | |
68ea7b2f | 416 | if (spec->aloopback == val) |
5f10c4a9 ML |
417 | return 0; |
418 | ||
68ea7b2f | 419 | spec->aloopback = val; |
5f10c4a9 | 420 | |
e1f0d669 MR |
421 | /* Only return the bits defined by the shift value of the |
422 | * first two bytes of the mask | |
423 | */ | |
5f10c4a9 | 424 | dac_mode = snd_hda_codec_read(codec, codec->afg, 0, |
e1f0d669 MR |
425 | kcontrol->private_value & 0xFFFF, 0x0); |
426 | dac_mode >>= spec->aloopback_shift; | |
5f10c4a9 | 427 | |
e1f0d669 | 428 | if (spec->aloopback & idx_val) { |
5f10c4a9 | 429 | snd_hda_power_up(codec); |
e1f0d669 | 430 | dac_mode |= idx_val; |
5f10c4a9 ML |
431 | } else { |
432 | snd_hda_power_down(codec); | |
e1f0d669 | 433 | dac_mode &= ~idx_val; |
5f10c4a9 ML |
434 | } |
435 | ||
436 | snd_hda_codec_write_cache(codec, codec->afg, 0, | |
437 | kcontrol->private_value >> 16, dac_mode); | |
438 | ||
439 | return 1; | |
440 | } | |
441 | ||
c7d4b2fa | 442 | static struct hda_verb stac9200_core_init[] = { |
2f2f4251 | 443 | /* set dac0mux for dac converter */ |
c7d4b2fa | 444 | { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, |
2f2f4251 M |
445 | {} |
446 | }; | |
447 | ||
1194b5b7 TI |
448 | static struct hda_verb stac9200_eapd_init[] = { |
449 | /* set dac0mux for dac converter */ | |
450 | {0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, | |
451 | {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, | |
452 | {} | |
453 | }; | |
454 | ||
e1f0d669 MR |
455 | static struct hda_verb stac92hd73xx_6ch_core_init[] = { |
456 | /* set master volume and direct control */ | |
457 | { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
458 | /* setup audio connections */ | |
459 | { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00}, | |
460 | { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
461 | { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02}, | |
462 | /* setup adcs to point to mixer */ | |
463 | { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
464 | { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
e1f0d669 MR |
465 | { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, |
466 | { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, | |
467 | { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, | |
468 | /* setup import muxs */ | |
469 | { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
470 | { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
471 | { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
472 | { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00}, | |
473 | {} | |
474 | }; | |
475 | ||
476 | static struct hda_verb stac92hd73xx_8ch_core_init[] = { | |
477 | /* set master volume and direct control */ | |
478 | { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
479 | /* setup audio connections */ | |
480 | { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00}, | |
481 | { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
482 | { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02}, | |
483 | /* connect hp ports to dac3 */ | |
484 | { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03}, | |
485 | { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03}, | |
486 | /* setup adcs to point to mixer */ | |
487 | { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
488 | { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
e1f0d669 MR |
489 | { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, |
490 | { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, | |
491 | { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, | |
492 | /* setup import muxs */ | |
493 | { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
494 | { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
495 | { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
496 | { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03}, | |
497 | {} | |
498 | }; | |
499 | ||
500 | static struct hda_verb stac92hd73xx_10ch_core_init[] = { | |
501 | /* set master volume and direct control */ | |
502 | { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
503 | /* setup audio connections */ | |
504 | { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 }, | |
505 | { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 }, | |
506 | { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 }, | |
507 | /* dac3 is connected to import3 mux */ | |
508 | { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f}, | |
509 | /* connect hp ports to dac4 */ | |
510 | { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04}, | |
511 | { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04}, | |
512 | /* setup adcs to point to mixer */ | |
513 | { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
514 | { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
e1f0d669 MR |
515 | { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, |
516 | { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, | |
517 | { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, | |
518 | /* setup import muxs */ | |
519 | { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
520 | { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
521 | { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
522 | { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03}, | |
523 | {} | |
524 | }; | |
525 | ||
e035b841 | 526 | static struct hda_verb stac92hd71bxx_core_init[] = { |
541eee87 MR |
527 | /* set master volume and direct control */ |
528 | { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
529 | /* connect headphone jack to dac1 */ | |
530 | { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
531 | { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */ | |
532 | /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */ | |
533 | { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, | |
534 | { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, | |
535 | { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, | |
541eee87 MR |
536 | }; |
537 | ||
538 | static struct hda_verb stac92hd71bxx_analog_core_init[] = { | |
e035b841 MR |
539 | /* set master volume and direct control */ |
540 | { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
541 | /* connect headphone jack to dac1 */ | |
542 | { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
9b35947f MR |
543 | /* connect ports 0d and 0f to audio mixer */ |
544 | { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2}, | |
545 | { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2}, | |
541eee87 | 546 | { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, |
9b35947f MR |
547 | /* unmute dac0 input in audio mixer */ |
548 | { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f}, | |
e035b841 MR |
549 | /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */ |
550 | { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, | |
551 | { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, | |
552 | { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, | |
e035b841 MR |
553 | {} |
554 | }; | |
555 | ||
8e21c34c TD |
556 | static struct hda_verb stac925x_core_init[] = { |
557 | /* set dac0mux for dac converter */ | |
558 | { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00}, | |
559 | {} | |
560 | }; | |
561 | ||
c7d4b2fa | 562 | static struct hda_verb stac922x_core_init[] = { |
2f2f4251 | 563 | /* set master volume and direct control */ |
c7d4b2fa | 564 | { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, |
2f2f4251 M |
565 | {} |
566 | }; | |
567 | ||
93ed1503 | 568 | static struct hda_verb d965_core_init[] = { |
19039bd0 | 569 | /* set master volume and direct control */ |
93ed1503 | 570 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, |
19039bd0 TI |
571 | /* unmute node 0x1b */ |
572 | { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, | |
573 | /* select node 0x03 as DAC */ | |
574 | { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
575 | {} | |
576 | }; | |
577 | ||
3cc08dc6 MP |
578 | static struct hda_verb stac927x_core_init[] = { |
579 | /* set master volume and direct control */ | |
580 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
581 | {} | |
582 | }; | |
583 | ||
f3302a59 MP |
584 | static struct hda_verb stac9205_core_init[] = { |
585 | /* set master volume and direct control */ | |
586 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
587 | {} | |
588 | }; | |
589 | ||
9e05b7a3 | 590 | #define STAC_INPUT_SOURCE(cnt) \ |
ca7c5a8b ML |
591 | { \ |
592 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
593 | .name = "Input Source", \ | |
9e05b7a3 | 594 | .count = cnt, \ |
ca7c5a8b ML |
595 | .info = stac92xx_mux_enum_info, \ |
596 | .get = stac92xx_mux_enum_get, \ | |
597 | .put = stac92xx_mux_enum_put, \ | |
598 | } | |
599 | ||
e1f0d669 | 600 | #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \ |
5f10c4a9 ML |
601 | { \ |
602 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
603 | .name = "Analog Loopback", \ | |
e1f0d669 | 604 | .count = cnt, \ |
5f10c4a9 ML |
605 | .info = stac92xx_aloopback_info, \ |
606 | .get = stac92xx_aloopback_get, \ | |
607 | .put = stac92xx_aloopback_put, \ | |
608 | .private_value = verb_read | (verb_write << 16), \ | |
609 | } | |
610 | ||
c8b6bf9b | 611 | static struct snd_kcontrol_new stac9200_mixer[] = { |
2f2f4251 M |
612 | HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT), |
613 | HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT), | |
9e05b7a3 | 614 | STAC_INPUT_SOURCE(1), |
2f2f4251 M |
615 | HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT), |
616 | HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT), | |
c7d4b2fa | 617 | HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT), |
2f2f4251 M |
618 | { } /* end */ |
619 | }; | |
620 | ||
e1f0d669 | 621 | static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = { |
e1f0d669 MR |
622 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3), |
623 | ||
e1f0d669 MR |
624 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT), |
625 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT), | |
626 | ||
627 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT), | |
628 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT), | |
629 | ||
630 | HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT), | |
631 | HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT), | |
632 | ||
633 | HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT), | |
634 | HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT), | |
635 | ||
636 | HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT), | |
637 | HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT), | |
638 | ||
639 | HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT), | |
640 | HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT), | |
641 | ||
642 | HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT), | |
643 | HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT), | |
644 | { } /* end */ | |
645 | }; | |
646 | ||
647 | static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = { | |
e1f0d669 MR |
648 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4), |
649 | ||
e1f0d669 MR |
650 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT), |
651 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT), | |
652 | ||
653 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT), | |
654 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT), | |
655 | ||
656 | HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT), | |
657 | HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT), | |
658 | ||
659 | HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT), | |
660 | HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT), | |
661 | ||
662 | HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT), | |
663 | HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT), | |
664 | ||
665 | HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT), | |
666 | HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT), | |
667 | ||
668 | HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT), | |
669 | HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT), | |
670 | { } /* end */ | |
671 | }; | |
672 | ||
673 | static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = { | |
e1f0d669 MR |
674 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5), |
675 | ||
e1f0d669 MR |
676 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT), |
677 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT), | |
678 | ||
679 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT), | |
680 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT), | |
681 | ||
682 | HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT), | |
683 | HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT), | |
684 | ||
685 | HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT), | |
686 | HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT), | |
687 | ||
688 | HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT), | |
689 | HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT), | |
690 | ||
691 | HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT), | |
692 | HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT), | |
693 | ||
694 | HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT), | |
695 | HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT), | |
696 | { } /* end */ | |
697 | }; | |
698 | ||
541eee87 | 699 | static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = { |
e035b841 | 700 | STAC_INPUT_SOURCE(2), |
e035b841 | 701 | |
9b35947f MR |
702 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT), |
703 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT), | |
704 | HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT), | |
705 | ||
706 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT), | |
707 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT), | |
708 | HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT), | |
e035b841 | 709 | |
9b35947f MR |
710 | HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT), |
711 | HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT), | |
a780c0ae MR |
712 | |
713 | HDA_CODEC_MUTE_MONO("Mono Playback Switch", 0x14, 0x1, 0, HDA_INPUT), | |
e035b841 MR |
714 | { } /* end */ |
715 | }; | |
716 | ||
541eee87 | 717 | static struct snd_kcontrol_new stac92hd71bxx_mixer[] = { |
541eee87 MR |
718 | STAC_INPUT_SOURCE(2), |
719 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2), | |
720 | ||
541eee87 MR |
721 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT), |
722 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT), | |
723 | HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT), | |
724 | ||
725 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT), | |
726 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT), | |
727 | HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT), | |
a780c0ae MR |
728 | |
729 | HDA_CODEC_MUTE_MONO("Mono Playback Switch", 0x14, 0x1, 0, HDA_INPUT), | |
541eee87 MR |
730 | { } /* end */ |
731 | }; | |
732 | ||
8e21c34c | 733 | static struct snd_kcontrol_new stac925x_mixer[] = { |
9e05b7a3 | 734 | STAC_INPUT_SOURCE(1), |
8e21c34c TD |
735 | HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT), |
736 | HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT), | |
737 | HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT), | |
738 | { } /* end */ | |
739 | }; | |
740 | ||
9e05b7a3 | 741 | static struct snd_kcontrol_new stac9205_mixer[] = { |
9e05b7a3 | 742 | STAC_INPUT_SOURCE(2), |
e1f0d669 | 743 | STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1), |
9e05b7a3 ML |
744 | |
745 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT), | |
746 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT), | |
747 | HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT), | |
748 | ||
749 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT), | |
750 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT), | |
751 | HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT), | |
752 | ||
2f2f4251 M |
753 | { } /* end */ |
754 | }; | |
755 | ||
19039bd0 | 756 | /* This needs to be generated dynamically based on sequence */ |
9e05b7a3 ML |
757 | static struct snd_kcontrol_new stac922x_mixer[] = { |
758 | STAC_INPUT_SOURCE(2), | |
9e05b7a3 ML |
759 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT), |
760 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT), | |
761 | HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT), | |
762 | ||
763 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT), | |
764 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT), | |
765 | HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT), | |
19039bd0 TI |
766 | { } /* end */ |
767 | }; | |
768 | ||
9e05b7a3 | 769 | |
d1d985f0 | 770 | static struct snd_kcontrol_new stac927x_mixer[] = { |
9e05b7a3 | 771 | STAC_INPUT_SOURCE(3), |
e1f0d669 | 772 | STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1), |
3cc08dc6 | 773 | |
9e05b7a3 ML |
774 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT), |
775 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT), | |
776 | HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT), | |
777 | ||
778 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT), | |
779 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT), | |
780 | HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT), | |
781 | ||
782 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT), | |
783 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT), | |
784 | HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT), | |
f3302a59 MP |
785 | { } /* end */ |
786 | }; | |
787 | ||
1697055e TI |
788 | static struct snd_kcontrol_new stac_dmux_mixer = { |
789 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
790 | .name = "Digital Input Source", | |
791 | /* count set later */ | |
792 | .info = stac92xx_dmux_enum_info, | |
793 | .get = stac92xx_dmux_enum_get, | |
794 | .put = stac92xx_dmux_enum_put, | |
795 | }; | |
796 | ||
2f2f4251 M |
797 | static int stac92xx_build_controls(struct hda_codec *codec) |
798 | { | |
799 | struct sigmatel_spec *spec = codec->spec; | |
800 | int err; | |
c7d4b2fa | 801 | int i; |
2f2f4251 M |
802 | |
803 | err = snd_hda_add_new_ctls(codec, spec->mixer); | |
804 | if (err < 0) | |
805 | return err; | |
c7d4b2fa M |
806 | |
807 | for (i = 0; i < spec->num_mixers; i++) { | |
808 | err = snd_hda_add_new_ctls(codec, spec->mixers[i]); | |
809 | if (err < 0) | |
810 | return err; | |
811 | } | |
1697055e TI |
812 | if (spec->num_dmuxes > 0) { |
813 | stac_dmux_mixer.count = spec->num_dmuxes; | |
814 | err = snd_ctl_add(codec->bus->card, | |
815 | snd_ctl_new1(&stac_dmux_mixer, codec)); | |
816 | if (err < 0) | |
817 | return err; | |
818 | } | |
c7d4b2fa | 819 | |
dabbed6f M |
820 | if (spec->multiout.dig_out_nid) { |
821 | err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid); | |
822 | if (err < 0) | |
823 | return err; | |
824 | } | |
825 | if (spec->dig_in_nid) { | |
826 | err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid); | |
827 | if (err < 0) | |
828 | return err; | |
829 | } | |
830 | return 0; | |
2f2f4251 M |
831 | } |
832 | ||
403d1944 | 833 | static unsigned int ref9200_pin_configs[8] = { |
dabbed6f | 834 | 0x01c47010, 0x01447010, 0x0221401f, 0x01114010, |
2f2f4251 M |
835 | 0x02a19020, 0x01a19021, 0x90100140, 0x01813122, |
836 | }; | |
837 | ||
dfe495d0 TI |
838 | /* |
839 | STAC 9200 pin configs for | |
840 | 102801A8 | |
841 | 102801DE | |
842 | 102801E8 | |
843 | */ | |
844 | static unsigned int dell9200_d21_pin_configs[8] = { | |
af6c016e TI |
845 | 0x400001f0, 0x400001f1, 0x02214030, 0x01014010, |
846 | 0x02a19020, 0x01a19021, 0x90100140, 0x01813122, | |
dfe495d0 TI |
847 | }; |
848 | ||
849 | /* | |
850 | STAC 9200 pin configs for | |
851 | 102801C0 | |
852 | 102801C1 | |
853 | */ | |
854 | static unsigned int dell9200_d22_pin_configs[8] = { | |
af6c016e TI |
855 | 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010, |
856 | 0x01813020, 0x02a19021, 0x90100140, 0x400001f2, | |
dfe495d0 TI |
857 | }; |
858 | ||
859 | /* | |
860 | STAC 9200 pin configs for | |
861 | 102801C4 (Dell Dimension E310) | |
862 | 102801C5 | |
863 | 102801C7 | |
864 | 102801D9 | |
865 | 102801DA | |
866 | 102801E3 | |
867 | */ | |
868 | static unsigned int dell9200_d23_pin_configs[8] = { | |
af6c016e TI |
869 | 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010, |
870 | 0x01813020, 0x01a19021, 0x90100140, 0x400001f2, | |
dfe495d0 TI |
871 | }; |
872 | ||
873 | ||
874 | /* | |
875 | STAC 9200-32 pin configs for | |
876 | 102801B5 (Dell Inspiron 630m) | |
877 | 102801D8 (Dell Inspiron 640m) | |
878 | */ | |
879 | static unsigned int dell9200_m21_pin_configs[8] = { | |
af6c016e TI |
880 | 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310, |
881 | 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd, | |
dfe495d0 TI |
882 | }; |
883 | ||
884 | /* | |
885 | STAC 9200-32 pin configs for | |
886 | 102801C2 (Dell Latitude D620) | |
887 | 102801C8 | |
888 | 102801CC (Dell Latitude D820) | |
889 | 102801D4 | |
890 | 102801D6 | |
891 | */ | |
892 | static unsigned int dell9200_m22_pin_configs[8] = { | |
af6c016e TI |
893 | 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310, |
894 | 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc, | |
dfe495d0 TI |
895 | }; |
896 | ||
897 | /* | |
898 | STAC 9200-32 pin configs for | |
899 | 102801CE (Dell XPS M1710) | |
900 | 102801CF (Dell Precision M90) | |
901 | */ | |
902 | static unsigned int dell9200_m23_pin_configs[8] = { | |
903 | 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310, | |
904 | 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc, | |
905 | }; | |
906 | ||
907 | /* | |
908 | STAC 9200-32 pin configs for | |
909 | 102801C9 | |
910 | 102801CA | |
911 | 102801CB (Dell Latitude 120L) | |
912 | 102801D3 | |
913 | */ | |
914 | static unsigned int dell9200_m24_pin_configs[8] = { | |
af6c016e TI |
915 | 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310, |
916 | 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe, | |
dfe495d0 TI |
917 | }; |
918 | ||
919 | /* | |
920 | STAC 9200-32 pin configs for | |
921 | 102801BD (Dell Inspiron E1505n) | |
922 | 102801EE | |
923 | 102801EF | |
924 | */ | |
925 | static unsigned int dell9200_m25_pin_configs[8] = { | |
af6c016e TI |
926 | 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310, |
927 | 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd, | |
dfe495d0 TI |
928 | }; |
929 | ||
930 | /* | |
931 | STAC 9200-32 pin configs for | |
932 | 102801F5 (Dell Inspiron 1501) | |
933 | 102801F6 | |
934 | */ | |
935 | static unsigned int dell9200_m26_pin_configs[8] = { | |
af6c016e TI |
936 | 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310, |
937 | 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe, | |
dfe495d0 TI |
938 | }; |
939 | ||
940 | /* | |
941 | STAC 9200-32 | |
942 | 102801CD (Dell Inspiron E1705/9400) | |
943 | */ | |
944 | static unsigned int dell9200_m27_pin_configs[8] = { | |
af6c016e TI |
945 | 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310, |
946 | 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc, | |
dfe495d0 TI |
947 | }; |
948 | ||
949 | ||
f5fcc13c TI |
950 | static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = { |
951 | [STAC_REF] = ref9200_pin_configs, | |
dfe495d0 TI |
952 | [STAC_9200_DELL_D21] = dell9200_d21_pin_configs, |
953 | [STAC_9200_DELL_D22] = dell9200_d22_pin_configs, | |
954 | [STAC_9200_DELL_D23] = dell9200_d23_pin_configs, | |
955 | [STAC_9200_DELL_M21] = dell9200_m21_pin_configs, | |
956 | [STAC_9200_DELL_M22] = dell9200_m22_pin_configs, | |
957 | [STAC_9200_DELL_M23] = dell9200_m23_pin_configs, | |
958 | [STAC_9200_DELL_M24] = dell9200_m24_pin_configs, | |
959 | [STAC_9200_DELL_M25] = dell9200_m25_pin_configs, | |
960 | [STAC_9200_DELL_M26] = dell9200_m26_pin_configs, | |
961 | [STAC_9200_DELL_M27] = dell9200_m27_pin_configs, | |
403d1944 MP |
962 | }; |
963 | ||
f5fcc13c TI |
964 | static const char *stac9200_models[STAC_9200_MODELS] = { |
965 | [STAC_REF] = "ref", | |
dfe495d0 TI |
966 | [STAC_9200_DELL_D21] = "dell-d21", |
967 | [STAC_9200_DELL_D22] = "dell-d22", | |
968 | [STAC_9200_DELL_D23] = "dell-d23", | |
969 | [STAC_9200_DELL_M21] = "dell-m21", | |
970 | [STAC_9200_DELL_M22] = "dell-m22", | |
971 | [STAC_9200_DELL_M23] = "dell-m23", | |
972 | [STAC_9200_DELL_M24] = "dell-m24", | |
973 | [STAC_9200_DELL_M25] = "dell-m25", | |
974 | [STAC_9200_DELL_M26] = "dell-m26", | |
975 | [STAC_9200_DELL_M27] = "dell-m27", | |
1194b5b7 | 976 | [STAC_9200_GATEWAY] = "gateway", |
f5fcc13c TI |
977 | }; |
978 | ||
979 | static struct snd_pci_quirk stac9200_cfg_tbl[] = { | |
980 | /* SigmaTel reference board */ | |
981 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
982 | "DFI LanParty", STAC_REF), | |
e7377071 | 983 | /* Dell laptops have BIOS problem */ |
dfe495d0 TI |
984 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8, |
985 | "unknown Dell", STAC_9200_DELL_D21), | |
f5fcc13c | 986 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5, |
dfe495d0 TI |
987 | "Dell Inspiron 630m", STAC_9200_DELL_M21), |
988 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd, | |
989 | "Dell Inspiron E1505n", STAC_9200_DELL_M25), | |
990 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0, | |
991 | "unknown Dell", STAC_9200_DELL_D22), | |
992 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1, | |
993 | "unknown Dell", STAC_9200_DELL_D22), | |
f5fcc13c | 994 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2, |
dfe495d0 TI |
995 | "Dell Latitude D620", STAC_9200_DELL_M22), |
996 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5, | |
997 | "unknown Dell", STAC_9200_DELL_D23), | |
998 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7, | |
999 | "unknown Dell", STAC_9200_DELL_D23), | |
1000 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8, | |
1001 | "unknown Dell", STAC_9200_DELL_M22), | |
1002 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9, | |
1003 | "unknown Dell", STAC_9200_DELL_M24), | |
1004 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca, | |
1005 | "unknown Dell", STAC_9200_DELL_M24), | |
f5fcc13c | 1006 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb, |
dfe495d0 | 1007 | "Dell Latitude 120L", STAC_9200_DELL_M24), |
877b866d | 1008 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc, |
dfe495d0 | 1009 | "Dell Latitude D820", STAC_9200_DELL_M22), |
46f02ca3 | 1010 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd, |
dfe495d0 | 1011 | "Dell Inspiron E1705/9400", STAC_9200_DELL_M27), |
46f02ca3 | 1012 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce, |
dfe495d0 | 1013 | "Dell XPS M1710", STAC_9200_DELL_M23), |
f0f96745 | 1014 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf, |
dfe495d0 TI |
1015 | "Dell Precision M90", STAC_9200_DELL_M23), |
1016 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3, | |
1017 | "unknown Dell", STAC_9200_DELL_M22), | |
1018 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4, | |
1019 | "unknown Dell", STAC_9200_DELL_M22), | |
8286c53e | 1020 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6, |
dfe495d0 | 1021 | "unknown Dell", STAC_9200_DELL_M22), |
49c605db | 1022 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8, |
dfe495d0 TI |
1023 | "Dell Inspiron 640m", STAC_9200_DELL_M21), |
1024 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9, | |
1025 | "unknown Dell", STAC_9200_DELL_D23), | |
1026 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da, | |
1027 | "unknown Dell", STAC_9200_DELL_D23), | |
1028 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de, | |
1029 | "unknown Dell", STAC_9200_DELL_D21), | |
1030 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3, | |
1031 | "unknown Dell", STAC_9200_DELL_D23), | |
1032 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8, | |
1033 | "unknown Dell", STAC_9200_DELL_D21), | |
1034 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee, | |
1035 | "unknown Dell", STAC_9200_DELL_M25), | |
1036 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef, | |
1037 | "unknown Dell", STAC_9200_DELL_M25), | |
49c605db | 1038 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5, |
dfe495d0 TI |
1039 | "Dell Inspiron 1501", STAC_9200_DELL_M26), |
1040 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6, | |
1041 | "unknown Dell", STAC_9200_DELL_M26), | |
49c605db TD |
1042 | /* Panasonic */ |
1043 | SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF), | |
1194b5b7 TI |
1044 | /* Gateway machines needs EAPD to be set on resume */ |
1045 | SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY), | |
1046 | SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", | |
1047 | STAC_9200_GATEWAY), | |
1048 | SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", | |
1049 | STAC_9200_GATEWAY), | |
403d1944 MP |
1050 | {} /* terminator */ |
1051 | }; | |
1052 | ||
8e21c34c TD |
1053 | static unsigned int ref925x_pin_configs[8] = { |
1054 | 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021, | |
1055 | 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e, | |
1056 | }; | |
1057 | ||
1058 | static unsigned int stac925x_MA6_pin_configs[8] = { | |
1059 | 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021, | |
1060 | 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e, | |
1061 | }; | |
1062 | ||
2c11f955 TD |
1063 | static unsigned int stac925x_PA6_pin_configs[8] = { |
1064 | 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021, | |
1065 | 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e, | |
1066 | }; | |
1067 | ||
8e21c34c | 1068 | static unsigned int stac925xM2_2_pin_configs[8] = { |
7353e14d SL |
1069 | 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020, |
1070 | 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e, | |
8e21c34c TD |
1071 | }; |
1072 | ||
1073 | static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = { | |
1074 | [STAC_REF] = ref925x_pin_configs, | |
1075 | [STAC_M2_2] = stac925xM2_2_pin_configs, | |
1076 | [STAC_MA6] = stac925x_MA6_pin_configs, | |
2c11f955 | 1077 | [STAC_PA6] = stac925x_PA6_pin_configs, |
8e21c34c TD |
1078 | }; |
1079 | ||
1080 | static const char *stac925x_models[STAC_925x_MODELS] = { | |
1081 | [STAC_REF] = "ref", | |
1082 | [STAC_M2_2] = "m2-2", | |
1083 | [STAC_MA6] = "m6", | |
2c11f955 | 1084 | [STAC_PA6] = "pa6", |
8e21c34c TD |
1085 | }; |
1086 | ||
1087 | static struct snd_pci_quirk stac925x_cfg_tbl[] = { | |
1088 | /* SigmaTel reference board */ | |
1089 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF), | |
2c11f955 | 1090 | SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF), |
8e21c34c TD |
1091 | SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF), |
1092 | SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF), | |
1093 | SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6), | |
2c11f955 | 1094 | SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6), |
8e21c34c TD |
1095 | SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2), |
1096 | {} /* terminator */ | |
1097 | }; | |
1098 | ||
e1f0d669 MR |
1099 | static unsigned int ref92hd73xx_pin_configs[12] = { |
1100 | 0x02214030, 0x02a19040, 0x01a19020, 0x02214030, | |
1101 | 0x0181302e, 0x01014010, 0x01014020, 0x01014030, | |
1102 | 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050, | |
1103 | }; | |
1104 | ||
1105 | static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = { | |
1106 | [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs, | |
1107 | }; | |
1108 | ||
1109 | static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = { | |
1110 | [STAC_92HD73XX_REF] = "ref", | |
1111 | }; | |
1112 | ||
1113 | static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = { | |
1114 | /* SigmaTel reference board */ | |
1115 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
1116 | "DFI LanParty", STAC_92HD73XX_REF), | |
1117 | {} /* terminator */ | |
1118 | }; | |
1119 | ||
e035b841 MR |
1120 | static unsigned int ref92hd71bxx_pin_configs[10] = { |
1121 | 0x02214030, 0x02a19040, 0x01a19020, 0x01014010, | |
1122 | 0x0181302e, 0x01114010, 0x01a19020, 0x90a000f0, | |
1123 | 0x90a000f0, 0x01452050, | |
1124 | }; | |
1125 | ||
1126 | static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = { | |
1127 | [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs, | |
1128 | }; | |
1129 | ||
1130 | static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = { | |
1131 | [STAC_92HD71BXX_REF] = "ref", | |
1132 | }; | |
1133 | ||
1134 | static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = { | |
1135 | /* SigmaTel reference board */ | |
1136 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
1137 | "DFI LanParty", STAC_92HD71BXX_REF), | |
1138 | {} /* terminator */ | |
1139 | }; | |
1140 | ||
403d1944 MP |
1141 | static unsigned int ref922x_pin_configs[10] = { |
1142 | 0x01014010, 0x01016011, 0x01012012, 0x0221401f, | |
1143 | 0x01813122, 0x01011014, 0x01441030, 0x01c41030, | |
2f2f4251 M |
1144 | 0x40000100, 0x40000100, |
1145 | }; | |
1146 | ||
dfe495d0 TI |
1147 | /* |
1148 | STAC 922X pin configs for | |
1149 | 102801A7 | |
1150 | 102801AB | |
1151 | 102801A9 | |
1152 | 102801D1 | |
1153 | 102801D2 | |
1154 | */ | |
1155 | static unsigned int dell_922x_d81_pin_configs[10] = { | |
1156 | 0x02214030, 0x01a19021, 0x01111012, 0x01114010, | |
1157 | 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1, | |
1158 | 0x01813122, 0x400001f2, | |
1159 | }; | |
1160 | ||
1161 | /* | |
1162 | STAC 922X pin configs for | |
1163 | 102801AC | |
1164 | 102801D0 | |
1165 | */ | |
1166 | static unsigned int dell_922x_d82_pin_configs[10] = { | |
1167 | 0x02214030, 0x01a19021, 0x01111012, 0x01114010, | |
1168 | 0x02a19020, 0x01117011, 0x01451140, 0x400001f0, | |
1169 | 0x01813122, 0x400001f1, | |
1170 | }; | |
1171 | ||
1172 | /* | |
1173 | STAC 922X pin configs for | |
1174 | 102801BF | |
1175 | */ | |
1176 | static unsigned int dell_922x_m81_pin_configs[10] = { | |
1177 | 0x0321101f, 0x01112024, 0x01111222, 0x91174220, | |
1178 | 0x03a11050, 0x01116221, 0x90a70330, 0x01452340, | |
1179 | 0x40C003f1, 0x405003f0, | |
1180 | }; | |
1181 | ||
1182 | /* | |
1183 | STAC 9221 A1 pin configs for | |
1184 | 102801D7 (Dell XPS M1210) | |
1185 | */ | |
1186 | static unsigned int dell_922x_m82_pin_configs[10] = { | |
7f9310c1 JZ |
1187 | 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310, |
1188 | 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2, | |
dfe495d0 TI |
1189 | 0x508003f3, 0x405003f4, |
1190 | }; | |
1191 | ||
403d1944 | 1192 | static unsigned int d945gtp3_pin_configs[10] = { |
869264c4 | 1193 | 0x0221401f, 0x01a19022, 0x01813021, 0x01014010, |
403d1944 MP |
1194 | 0x40000100, 0x40000100, 0x40000100, 0x40000100, |
1195 | 0x02a19120, 0x40000100, | |
1196 | }; | |
1197 | ||
1198 | static unsigned int d945gtp5_pin_configs[10] = { | |
869264c4 MP |
1199 | 0x0221401f, 0x01011012, 0x01813024, 0x01014010, |
1200 | 0x01a19021, 0x01016011, 0x01452130, 0x40000100, | |
403d1944 MP |
1201 | 0x02a19320, 0x40000100, |
1202 | }; | |
1203 | ||
5d5d3bc3 IZ |
1204 | static unsigned int intel_mac_v1_pin_configs[10] = { |
1205 | 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd, | |
1206 | 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240, | |
1207 | 0x400000fc, 0x400000fb, | |
1208 | }; | |
1209 | ||
1210 | static unsigned int intel_mac_v2_pin_configs[10] = { | |
1211 | 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd, | |
1212 | 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa, | |
1213 | 0x400000fc, 0x400000fb, | |
6f0778d8 NB |
1214 | }; |
1215 | ||
5d5d3bc3 IZ |
1216 | static unsigned int intel_mac_v3_pin_configs[10] = { |
1217 | 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd, | |
1218 | 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240, | |
3fc24d85 TI |
1219 | 0x400000fc, 0x400000fb, |
1220 | }; | |
1221 | ||
5d5d3bc3 IZ |
1222 | static unsigned int intel_mac_v4_pin_configs[10] = { |
1223 | 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f, | |
1224 | 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240, | |
f16928fb SF |
1225 | 0x400000fc, 0x400000fb, |
1226 | }; | |
1227 | ||
5d5d3bc3 IZ |
1228 | static unsigned int intel_mac_v5_pin_configs[10] = { |
1229 | 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f, | |
1230 | 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240, | |
1231 | 0x400000fc, 0x400000fb, | |
0dae0f83 TI |
1232 | }; |
1233 | ||
76c08828 | 1234 | |
19039bd0 | 1235 | static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = { |
f5fcc13c | 1236 | [STAC_D945_REF] = ref922x_pin_configs, |
19039bd0 TI |
1237 | [STAC_D945GTP3] = d945gtp3_pin_configs, |
1238 | [STAC_D945GTP5] = d945gtp5_pin_configs, | |
5d5d3bc3 IZ |
1239 | [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs, |
1240 | [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs, | |
1241 | [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs, | |
1242 | [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs, | |
1243 | [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs, | |
dfe495d0 | 1244 | /* for backward compatibility */ |
5d5d3bc3 IZ |
1245 | [STAC_MACMINI] = intel_mac_v3_pin_configs, |
1246 | [STAC_MACBOOK] = intel_mac_v5_pin_configs, | |
1247 | [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs, | |
1248 | [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs, | |
1249 | [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs, | |
1250 | [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs, | |
dfe495d0 TI |
1251 | [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs, |
1252 | [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs, | |
1253 | [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs, | |
1254 | [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs, | |
403d1944 MP |
1255 | }; |
1256 | ||
f5fcc13c TI |
1257 | static const char *stac922x_models[STAC_922X_MODELS] = { |
1258 | [STAC_D945_REF] = "ref", | |
1259 | [STAC_D945GTP5] = "5stack", | |
1260 | [STAC_D945GTP3] = "3stack", | |
5d5d3bc3 IZ |
1261 | [STAC_INTEL_MAC_V1] = "intel-mac-v1", |
1262 | [STAC_INTEL_MAC_V2] = "intel-mac-v2", | |
1263 | [STAC_INTEL_MAC_V3] = "intel-mac-v3", | |
1264 | [STAC_INTEL_MAC_V4] = "intel-mac-v4", | |
1265 | [STAC_INTEL_MAC_V5] = "intel-mac-v5", | |
dfe495d0 | 1266 | /* for backward compatibility */ |
f5fcc13c | 1267 | [STAC_MACMINI] = "macmini", |
3fc24d85 | 1268 | [STAC_MACBOOK] = "macbook", |
6f0778d8 NB |
1269 | [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1", |
1270 | [STAC_MACBOOK_PRO_V2] = "macbook-pro", | |
f16928fb | 1271 | [STAC_IMAC_INTEL] = "imac-intel", |
0dae0f83 | 1272 | [STAC_IMAC_INTEL_20] = "imac-intel-20", |
dfe495d0 TI |
1273 | [STAC_922X_DELL_D81] = "dell-d81", |
1274 | [STAC_922X_DELL_D82] = "dell-d82", | |
1275 | [STAC_922X_DELL_M81] = "dell-m81", | |
1276 | [STAC_922X_DELL_M82] = "dell-m82", | |
f5fcc13c TI |
1277 | }; |
1278 | ||
1279 | static struct snd_pci_quirk stac922x_cfg_tbl[] = { | |
1280 | /* SigmaTel reference board */ | |
1281 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
1282 | "DFI LanParty", STAC_D945_REF), | |
1283 | /* Intel 945G based systems */ | |
1284 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101, | |
1285 | "Intel D945G", STAC_D945GTP3), | |
1286 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202, | |
1287 | "Intel D945G", STAC_D945GTP3), | |
1288 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606, | |
1289 | "Intel D945G", STAC_D945GTP3), | |
1290 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601, | |
1291 | "Intel D945G", STAC_D945GTP3), | |
1292 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111, | |
1293 | "Intel D945G", STAC_D945GTP3), | |
1294 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115, | |
1295 | "Intel D945G", STAC_D945GTP3), | |
1296 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116, | |
1297 | "Intel D945G", STAC_D945GTP3), | |
1298 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117, | |
1299 | "Intel D945G", STAC_D945GTP3), | |
1300 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118, | |
1301 | "Intel D945G", STAC_D945GTP3), | |
1302 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119, | |
1303 | "Intel D945G", STAC_D945GTP3), | |
1304 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826, | |
1305 | "Intel D945G", STAC_D945GTP3), | |
1306 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049, | |
1307 | "Intel D945G", STAC_D945GTP3), | |
1308 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055, | |
1309 | "Intel D945G", STAC_D945GTP3), | |
1310 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048, | |
1311 | "Intel D945G", STAC_D945GTP3), | |
1312 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110, | |
1313 | "Intel D945G", STAC_D945GTP3), | |
1314 | /* Intel D945G 5-stack systems */ | |
1315 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404, | |
1316 | "Intel D945G", STAC_D945GTP5), | |
1317 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303, | |
1318 | "Intel D945G", STAC_D945GTP5), | |
1319 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013, | |
1320 | "Intel D945G", STAC_D945GTP5), | |
1321 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417, | |
1322 | "Intel D945G", STAC_D945GTP5), | |
1323 | /* Intel 945P based systems */ | |
1324 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b, | |
1325 | "Intel D945P", STAC_D945GTP3), | |
1326 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112, | |
1327 | "Intel D945P", STAC_D945GTP3), | |
1328 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d, | |
1329 | "Intel D945P", STAC_D945GTP3), | |
1330 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909, | |
1331 | "Intel D945P", STAC_D945GTP3), | |
1332 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505, | |
1333 | "Intel D945P", STAC_D945GTP3), | |
1334 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707, | |
1335 | "Intel D945P", STAC_D945GTP5), | |
1336 | /* other systems */ | |
1337 | /* Apple Mac Mini (early 2006) */ | |
1338 | SND_PCI_QUIRK(0x8384, 0x7680, | |
5d5d3bc3 | 1339 | "Mac Mini", STAC_INTEL_MAC_V3), |
dfe495d0 TI |
1340 | /* Dell systems */ |
1341 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7, | |
1342 | "unknown Dell", STAC_922X_DELL_D81), | |
1343 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9, | |
1344 | "unknown Dell", STAC_922X_DELL_D81), | |
1345 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab, | |
1346 | "unknown Dell", STAC_922X_DELL_D81), | |
1347 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac, | |
1348 | "unknown Dell", STAC_922X_DELL_D82), | |
1349 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf, | |
1350 | "unknown Dell", STAC_922X_DELL_M81), | |
1351 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0, | |
1352 | "unknown Dell", STAC_922X_DELL_D82), | |
1353 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1, | |
1354 | "unknown Dell", STAC_922X_DELL_D81), | |
1355 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2, | |
1356 | "unknown Dell", STAC_922X_DELL_D81), | |
1357 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7, | |
1358 | "Dell XPS M1210", STAC_922X_DELL_M82), | |
403d1944 MP |
1359 | {} /* terminator */ |
1360 | }; | |
1361 | ||
3cc08dc6 | 1362 | static unsigned int ref927x_pin_configs[14] = { |
93ed1503 TD |
1363 | 0x02214020, 0x02a19080, 0x0181304e, 0x01014010, |
1364 | 0x01a19040, 0x01011012, 0x01016011, 0x0101201f, | |
1365 | 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070, | |
1366 | 0x01c42190, 0x40000100, | |
3cc08dc6 MP |
1367 | }; |
1368 | ||
93ed1503 | 1369 | static unsigned int d965_3st_pin_configs[14] = { |
81d3dbde TD |
1370 | 0x0221401f, 0x02a19120, 0x40000100, 0x01014011, |
1371 | 0x01a19021, 0x01813024, 0x40000100, 0x40000100, | |
1372 | 0x40000100, 0x40000100, 0x40000100, 0x40000100, | |
1373 | 0x40000100, 0x40000100 | |
1374 | }; | |
1375 | ||
93ed1503 TD |
1376 | static unsigned int d965_5st_pin_configs[14] = { |
1377 | 0x02214020, 0x02a19080, 0x0181304e, 0x01014010, | |
1378 | 0x01a19040, 0x01011012, 0x01016011, 0x40000100, | |
1379 | 0x40000100, 0x40000100, 0x40000100, 0x01442070, | |
1380 | 0x40000100, 0x40000100 | |
1381 | }; | |
1382 | ||
4ff076e5 TD |
1383 | static unsigned int dell_3st_pin_configs[14] = { |
1384 | 0x02211230, 0x02a11220, 0x01a19040, 0x01114210, | |
1385 | 0x01111212, 0x01116211, 0x01813050, 0x01112214, | |
8e9068b1 | 1386 | 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb, |
4ff076e5 TD |
1387 | 0x40c003fc, 0x40000100 |
1388 | }; | |
1389 | ||
93ed1503 | 1390 | static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = { |
8e9068b1 MR |
1391 | [STAC_D965_REF] = ref927x_pin_configs, |
1392 | [STAC_D965_3ST] = d965_3st_pin_configs, | |
1393 | [STAC_D965_5ST] = d965_5st_pin_configs, | |
1394 | [STAC_DELL_3ST] = dell_3st_pin_configs, | |
1395 | [STAC_DELL_BIOS] = NULL, | |
3cc08dc6 MP |
1396 | }; |
1397 | ||
f5fcc13c | 1398 | static const char *stac927x_models[STAC_927X_MODELS] = { |
8e9068b1 MR |
1399 | [STAC_D965_REF] = "ref", |
1400 | [STAC_D965_3ST] = "3stack", | |
1401 | [STAC_D965_5ST] = "5stack", | |
1402 | [STAC_DELL_3ST] = "dell-3stack", | |
1403 | [STAC_DELL_BIOS] = "dell-bios", | |
f5fcc13c TI |
1404 | }; |
1405 | ||
1406 | static struct snd_pci_quirk stac927x_cfg_tbl[] = { | |
1407 | /* SigmaTel reference board */ | |
1408 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
1409 | "DFI LanParty", STAC_D965_REF), | |
81d3dbde | 1410 | /* Intel 946 based systems */ |
f5fcc13c TI |
1411 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST), |
1412 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST), | |
93ed1503 | 1413 | /* 965 based 3 stack systems */ |
f5fcc13c TI |
1414 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST), |
1415 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST), | |
1416 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST), | |
1417 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST), | |
1418 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST), | |
1419 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST), | |
1420 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST), | |
1421 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST), | |
1422 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST), | |
1423 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST), | |
1424 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST), | |
1425 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST), | |
1426 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST), | |
1427 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST), | |
1428 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST), | |
1429 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST), | |
4ff076e5 | 1430 | /* Dell 3 stack systems */ |
8e9068b1 | 1431 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST), |
dfe495d0 | 1432 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST), |
4ff076e5 TD |
1433 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST), |
1434 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST), | |
8e9068b1 | 1435 | /* Dell 3 stack systems with verb table in BIOS */ |
2f32d909 MR |
1436 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS), |
1437 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS), | |
8e9068b1 MR |
1438 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS), |
1439 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS), | |
1440 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS), | |
1441 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS), | |
1442 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS), | |
1443 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS), | |
93ed1503 | 1444 | /* 965 based 5 stack systems */ |
f5fcc13c TI |
1445 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST), |
1446 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST), | |
1447 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST), | |
1448 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST), | |
1449 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST), | |
1450 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST), | |
1451 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST), | |
1452 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST), | |
1453 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST), | |
3cc08dc6 MP |
1454 | {} /* terminator */ |
1455 | }; | |
1456 | ||
f3302a59 MP |
1457 | static unsigned int ref9205_pin_configs[12] = { |
1458 | 0x40000100, 0x40000100, 0x01016011, 0x01014010, | |
8b65727b MP |
1459 | 0x01813122, 0x01a19021, 0x40000100, 0x40000100, |
1460 | 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030 | |
f3302a59 MP |
1461 | }; |
1462 | ||
dfe495d0 TI |
1463 | /* |
1464 | STAC 9205 pin configs for | |
1465 | 102801F1 | |
1466 | 102801F2 | |
1467 | 102801FC | |
1468 | 102801FD | |
1469 | 10280204 | |
1470 | 1028021F | |
1471 | */ | |
1472 | static unsigned int dell_9205_m42_pin_configs[12] = { | |
1473 | 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310, | |
1474 | 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9, | |
1475 | 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE, | |
1476 | }; | |
1477 | ||
1478 | /* | |
1479 | STAC 9205 pin configs for | |
1480 | 102801F9 | |
1481 | 102801FA | |
1482 | 102801FE | |
1483 | 102801FF (Dell Precision M4300) | |
1484 | 10280206 | |
1485 | 10280200 | |
1486 | 10280201 | |
1487 | */ | |
1488 | static unsigned int dell_9205_m43_pin_configs[12] = { | |
ae0a8ed8 TD |
1489 | 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310, |
1490 | 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9, | |
1491 | 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8, | |
1492 | }; | |
1493 | ||
dfe495d0 | 1494 | static unsigned int dell_9205_m44_pin_configs[12] = { |
ae0a8ed8 TD |
1495 | 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310, |
1496 | 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9, | |
1497 | 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe, | |
1498 | }; | |
1499 | ||
f5fcc13c | 1500 | static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = { |
ae0a8ed8 | 1501 | [STAC_9205_REF] = ref9205_pin_configs, |
dfe495d0 TI |
1502 | [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs, |
1503 | [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs, | |
1504 | [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs, | |
f3302a59 MP |
1505 | }; |
1506 | ||
f5fcc13c TI |
1507 | static const char *stac9205_models[STAC_9205_MODELS] = { |
1508 | [STAC_9205_REF] = "ref", | |
dfe495d0 | 1509 | [STAC_9205_DELL_M42] = "dell-m42", |
ae0a8ed8 TD |
1510 | [STAC_9205_DELL_M43] = "dell-m43", |
1511 | [STAC_9205_DELL_M44] = "dell-m44", | |
f5fcc13c TI |
1512 | }; |
1513 | ||
1514 | static struct snd_pci_quirk stac9205_cfg_tbl[] = { | |
1515 | /* SigmaTel reference board */ | |
1516 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
1517 | "DFI LanParty", STAC_9205_REF), | |
dfe495d0 TI |
1518 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1, |
1519 | "unknown Dell", STAC_9205_DELL_M42), | |
1520 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2, | |
1521 | "unknown Dell", STAC_9205_DELL_M42), | |
ae0a8ed8 | 1522 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8, |
b44ef2f1 MR |
1523 | "Dell Precision", STAC_9205_DELL_M43), |
1524 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c, | |
1525 | "Dell Precision", STAC_9205_DELL_M43), | |
ae0a8ed8 TD |
1526 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9, |
1527 | "Dell Precision", STAC_9205_DELL_M43), | |
e45e459e MR |
1528 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b, |
1529 | "Dell Precision", STAC_9205_DELL_M43), | |
ae0a8ed8 TD |
1530 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa, |
1531 | "Dell Precision", STAC_9205_DELL_M43), | |
dfe495d0 TI |
1532 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc, |
1533 | "unknown Dell", STAC_9205_DELL_M42), | |
1534 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd, | |
1535 | "unknown Dell", STAC_9205_DELL_M42), | |
ae0a8ed8 TD |
1536 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe, |
1537 | "Dell Precision", STAC_9205_DELL_M43), | |
1538 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff, | |
dfe495d0 | 1539 | "Dell Precision M4300", STAC_9205_DELL_M43), |
ae0a8ed8 TD |
1540 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206, |
1541 | "Dell Precision", STAC_9205_DELL_M43), | |
1542 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1, | |
1543 | "Dell Inspiron", STAC_9205_DELL_M44), | |
1544 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2, | |
1545 | "Dell Inspiron", STAC_9205_DELL_M44), | |
1546 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc, | |
1547 | "Dell Inspiron", STAC_9205_DELL_M44), | |
1548 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd, | |
1549 | "Dell Inspiron", STAC_9205_DELL_M44), | |
dfe495d0 TI |
1550 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204, |
1551 | "unknown Dell", STAC_9205_DELL_M42), | |
ae0a8ed8 TD |
1552 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f, |
1553 | "Dell Inspiron", STAC_9205_DELL_M44), | |
f3302a59 MP |
1554 | {} /* terminator */ |
1555 | }; | |
1556 | ||
11b44bbd RF |
1557 | static int stac92xx_save_bios_config_regs(struct hda_codec *codec) |
1558 | { | |
1559 | int i; | |
1560 | struct sigmatel_spec *spec = codec->spec; | |
1561 | ||
1562 | if (! spec->bios_pin_configs) { | |
1563 | spec->bios_pin_configs = kcalloc(spec->num_pins, | |
1564 | sizeof(*spec->bios_pin_configs), GFP_KERNEL); | |
1565 | if (! spec->bios_pin_configs) | |
1566 | return -ENOMEM; | |
1567 | } | |
1568 | ||
1569 | for (i = 0; i < spec->num_pins; i++) { | |
1570 | hda_nid_t nid = spec->pin_nids[i]; | |
1571 | unsigned int pin_cfg; | |
1572 | ||
1573 | pin_cfg = snd_hda_codec_read(codec, nid, 0, | |
1574 | AC_VERB_GET_CONFIG_DEFAULT, 0x00); | |
1575 | snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n", | |
1576 | nid, pin_cfg); | |
1577 | spec->bios_pin_configs[i] = pin_cfg; | |
1578 | } | |
1579 | ||
1580 | return 0; | |
1581 | } | |
1582 | ||
87d48363 MR |
1583 | static void stac92xx_set_config_reg(struct hda_codec *codec, |
1584 | hda_nid_t pin_nid, unsigned int pin_config) | |
1585 | { | |
1586 | int i; | |
1587 | snd_hda_codec_write(codec, pin_nid, 0, | |
1588 | AC_VERB_SET_CONFIG_DEFAULT_BYTES_0, | |
1589 | pin_config & 0x000000ff); | |
1590 | snd_hda_codec_write(codec, pin_nid, 0, | |
1591 | AC_VERB_SET_CONFIG_DEFAULT_BYTES_1, | |
1592 | (pin_config & 0x0000ff00) >> 8); | |
1593 | snd_hda_codec_write(codec, pin_nid, 0, | |
1594 | AC_VERB_SET_CONFIG_DEFAULT_BYTES_2, | |
1595 | (pin_config & 0x00ff0000) >> 16); | |
1596 | snd_hda_codec_write(codec, pin_nid, 0, | |
1597 | AC_VERB_SET_CONFIG_DEFAULT_BYTES_3, | |
1598 | pin_config >> 24); | |
1599 | i = snd_hda_codec_read(codec, pin_nid, 0, | |
1600 | AC_VERB_GET_CONFIG_DEFAULT, | |
1601 | 0x00); | |
1602 | snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n", | |
1603 | pin_nid, i); | |
1604 | } | |
1605 | ||
2f2f4251 M |
1606 | static void stac92xx_set_config_regs(struct hda_codec *codec) |
1607 | { | |
1608 | int i; | |
1609 | struct sigmatel_spec *spec = codec->spec; | |
2f2f4251 | 1610 | |
87d48363 MR |
1611 | if (!spec->pin_configs) |
1612 | return; | |
11b44bbd | 1613 | |
87d48363 MR |
1614 | for (i = 0; i < spec->num_pins; i++) |
1615 | stac92xx_set_config_reg(codec, spec->pin_nids[i], | |
1616 | spec->pin_configs[i]); | |
2f2f4251 | 1617 | } |
2f2f4251 | 1618 | |
8259980e | 1619 | static void stac92xx_enable_gpio_mask(struct hda_codec *codec) |
92a22beb | 1620 | { |
8259980e | 1621 | struct sigmatel_spec *spec = codec->spec; |
87d48363 | 1622 | /* Configure GPIOx as output */ |
82beb8fd TI |
1623 | snd_hda_codec_write_cache(codec, codec->afg, 0, |
1624 | AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask); | |
87d48363 | 1625 | /* Configure GPIOx as CMOS */ |
82beb8fd | 1626 | snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000); |
87d48363 | 1627 | /* Assert GPIOx */ |
82beb8fd TI |
1628 | snd_hda_codec_write_cache(codec, codec->afg, 0, |
1629 | AC_VERB_SET_GPIO_DATA, spec->gpio_data); | |
87d48363 | 1630 | /* Enable GPIOx */ |
82beb8fd TI |
1631 | snd_hda_codec_write_cache(codec, codec->afg, 0, |
1632 | AC_VERB_SET_GPIO_MASK, spec->gpio_mask); | |
92a22beb MR |
1633 | } |
1634 | ||
dabbed6f | 1635 | /* |
c7d4b2fa | 1636 | * Analog playback callbacks |
dabbed6f | 1637 | */ |
c7d4b2fa M |
1638 | static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo, |
1639 | struct hda_codec *codec, | |
c8b6bf9b | 1640 | struct snd_pcm_substream *substream) |
2f2f4251 | 1641 | { |
dabbed6f | 1642 | struct sigmatel_spec *spec = codec->spec; |
c7d4b2fa | 1643 | return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream); |
2f2f4251 M |
1644 | } |
1645 | ||
2f2f4251 M |
1646 | static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo, |
1647 | struct hda_codec *codec, | |
1648 | unsigned int stream_tag, | |
1649 | unsigned int format, | |
c8b6bf9b | 1650 | struct snd_pcm_substream *substream) |
2f2f4251 M |
1651 | { |
1652 | struct sigmatel_spec *spec = codec->spec; | |
403d1944 | 1653 | return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream); |
2f2f4251 M |
1654 | } |
1655 | ||
1656 | static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo, | |
1657 | struct hda_codec *codec, | |
c8b6bf9b | 1658 | struct snd_pcm_substream *substream) |
2f2f4251 M |
1659 | { |
1660 | struct sigmatel_spec *spec = codec->spec; | |
1661 | return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout); | |
1662 | } | |
1663 | ||
dabbed6f M |
1664 | /* |
1665 | * Digital playback callbacks | |
1666 | */ | |
1667 | static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo, | |
1668 | struct hda_codec *codec, | |
c8b6bf9b | 1669 | struct snd_pcm_substream *substream) |
dabbed6f M |
1670 | { |
1671 | struct sigmatel_spec *spec = codec->spec; | |
1672 | return snd_hda_multi_out_dig_open(codec, &spec->multiout); | |
1673 | } | |
1674 | ||
1675 | static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo, | |
1676 | struct hda_codec *codec, | |
c8b6bf9b | 1677 | struct snd_pcm_substream *substream) |
dabbed6f M |
1678 | { |
1679 | struct sigmatel_spec *spec = codec->spec; | |
1680 | return snd_hda_multi_out_dig_close(codec, &spec->multiout); | |
1681 | } | |
1682 | ||
6b97eb45 TI |
1683 | static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo, |
1684 | struct hda_codec *codec, | |
1685 | unsigned int stream_tag, | |
1686 | unsigned int format, | |
1687 | struct snd_pcm_substream *substream) | |
1688 | { | |
1689 | struct sigmatel_spec *spec = codec->spec; | |
1690 | return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, | |
1691 | stream_tag, format, substream); | |
1692 | } | |
1693 | ||
dabbed6f | 1694 | |
2f2f4251 M |
1695 | /* |
1696 | * Analog capture callbacks | |
1697 | */ | |
1698 | static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo, | |
1699 | struct hda_codec *codec, | |
1700 | unsigned int stream_tag, | |
1701 | unsigned int format, | |
c8b6bf9b | 1702 | struct snd_pcm_substream *substream) |
2f2f4251 M |
1703 | { |
1704 | struct sigmatel_spec *spec = codec->spec; | |
1705 | ||
1706 | snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], | |
1707 | stream_tag, 0, format); | |
1708 | return 0; | |
1709 | } | |
1710 | ||
1711 | static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo, | |
1712 | struct hda_codec *codec, | |
c8b6bf9b | 1713 | struct snd_pcm_substream *substream) |
2f2f4251 M |
1714 | { |
1715 | struct sigmatel_spec *spec = codec->spec; | |
1716 | ||
1717 | snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0); | |
1718 | return 0; | |
1719 | } | |
1720 | ||
dabbed6f M |
1721 | static struct hda_pcm_stream stac92xx_pcm_digital_playback = { |
1722 | .substreams = 1, | |
1723 | .channels_min = 2, | |
1724 | .channels_max = 2, | |
1725 | /* NID is set in stac92xx_build_pcms */ | |
1726 | .ops = { | |
1727 | .open = stac92xx_dig_playback_pcm_open, | |
6b97eb45 TI |
1728 | .close = stac92xx_dig_playback_pcm_close, |
1729 | .prepare = stac92xx_dig_playback_pcm_prepare | |
dabbed6f M |
1730 | }, |
1731 | }; | |
1732 | ||
1733 | static struct hda_pcm_stream stac92xx_pcm_digital_capture = { | |
1734 | .substreams = 1, | |
1735 | .channels_min = 2, | |
1736 | .channels_max = 2, | |
1737 | /* NID is set in stac92xx_build_pcms */ | |
1738 | }; | |
1739 | ||
2f2f4251 M |
1740 | static struct hda_pcm_stream stac92xx_pcm_analog_playback = { |
1741 | .substreams = 1, | |
1742 | .channels_min = 2, | |
c7d4b2fa | 1743 | .channels_max = 8, |
2f2f4251 M |
1744 | .nid = 0x02, /* NID to query formats and rates */ |
1745 | .ops = { | |
1746 | .open = stac92xx_playback_pcm_open, | |
1747 | .prepare = stac92xx_playback_pcm_prepare, | |
1748 | .cleanup = stac92xx_playback_pcm_cleanup | |
1749 | }, | |
1750 | }; | |
1751 | ||
3cc08dc6 MP |
1752 | static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = { |
1753 | .substreams = 1, | |
1754 | .channels_min = 2, | |
1755 | .channels_max = 2, | |
1756 | .nid = 0x06, /* NID to query formats and rates */ | |
1757 | .ops = { | |
1758 | .open = stac92xx_playback_pcm_open, | |
1759 | .prepare = stac92xx_playback_pcm_prepare, | |
1760 | .cleanup = stac92xx_playback_pcm_cleanup | |
1761 | }, | |
1762 | }; | |
1763 | ||
2f2f4251 | 1764 | static struct hda_pcm_stream stac92xx_pcm_analog_capture = { |
2f2f4251 M |
1765 | .channels_min = 2, |
1766 | .channels_max = 2, | |
9e05b7a3 | 1767 | /* NID + .substreams is set in stac92xx_build_pcms */ |
2f2f4251 M |
1768 | .ops = { |
1769 | .prepare = stac92xx_capture_pcm_prepare, | |
1770 | .cleanup = stac92xx_capture_pcm_cleanup | |
1771 | }, | |
1772 | }; | |
1773 | ||
1774 | static int stac92xx_build_pcms(struct hda_codec *codec) | |
1775 | { | |
1776 | struct sigmatel_spec *spec = codec->spec; | |
1777 | struct hda_pcm *info = spec->pcm_rec; | |
1778 | ||
1779 | codec->num_pcms = 1; | |
1780 | codec->pcm_info = info; | |
1781 | ||
c7d4b2fa | 1782 | info->name = "STAC92xx Analog"; |
2f2f4251 | 1783 | info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback; |
2f2f4251 | 1784 | info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture; |
3cc08dc6 | 1785 | info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0]; |
9e05b7a3 | 1786 | info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs; |
3cc08dc6 MP |
1787 | |
1788 | if (spec->alt_switch) { | |
1789 | codec->num_pcms++; | |
1790 | info++; | |
1791 | info->name = "STAC92xx Analog Alt"; | |
1792 | info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback; | |
1793 | } | |
2f2f4251 | 1794 | |
dabbed6f M |
1795 | if (spec->multiout.dig_out_nid || spec->dig_in_nid) { |
1796 | codec->num_pcms++; | |
1797 | info++; | |
1798 | info->name = "STAC92xx Digital"; | |
1799 | if (spec->multiout.dig_out_nid) { | |
1800 | info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback; | |
1801 | info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid; | |
1802 | } | |
1803 | if (spec->dig_in_nid) { | |
1804 | info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture; | |
1805 | info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid; | |
1806 | } | |
1807 | } | |
1808 | ||
2f2f4251 M |
1809 | return 0; |
1810 | } | |
1811 | ||
c960a03b TI |
1812 | static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid) |
1813 | { | |
1814 | unsigned int pincap = snd_hda_param_read(codec, nid, | |
1815 | AC_PAR_PIN_CAP); | |
1816 | pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT; | |
1817 | if (pincap & AC_PINCAP_VREF_100) | |
1818 | return AC_PINCTL_VREF_100; | |
1819 | if (pincap & AC_PINCAP_VREF_80) | |
1820 | return AC_PINCTL_VREF_80; | |
1821 | if (pincap & AC_PINCAP_VREF_50) | |
1822 | return AC_PINCTL_VREF_50; | |
1823 | if (pincap & AC_PINCAP_VREF_GRD) | |
1824 | return AC_PINCTL_VREF_GRD; | |
1825 | return 0; | |
1826 | } | |
1827 | ||
403d1944 MP |
1828 | static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type) |
1829 | ||
1830 | { | |
82beb8fd TI |
1831 | snd_hda_codec_write_cache(codec, nid, 0, |
1832 | AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type); | |
403d1944 MP |
1833 | } |
1834 | ||
a5ce8890 | 1835 | #define stac92xx_io_switch_info snd_ctl_boolean_mono_info |
403d1944 MP |
1836 | |
1837 | static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) | |
1838 | { | |
1839 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
1840 | struct sigmatel_spec *spec = codec->spec; | |
1841 | int io_idx = kcontrol-> private_value & 0xff; | |
1842 | ||
1843 | ucontrol->value.integer.value[0] = spec->io_switch[io_idx]; | |
1844 | return 0; | |
1845 | } | |
1846 | ||
1847 | static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) | |
1848 | { | |
1849 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
1850 | struct sigmatel_spec *spec = codec->spec; | |
1851 | hda_nid_t nid = kcontrol->private_value >> 8; | |
1852 | int io_idx = kcontrol-> private_value & 0xff; | |
68ea7b2f | 1853 | unsigned short val = !!ucontrol->value.integer.value[0]; |
403d1944 MP |
1854 | |
1855 | spec->io_switch[io_idx] = val; | |
1856 | ||
1857 | if (val) | |
1858 | stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN); | |
c960a03b TI |
1859 | else { |
1860 | unsigned int pinctl = AC_PINCTL_IN_EN; | |
1861 | if (io_idx) /* set VREF for mic */ | |
1862 | pinctl |= stac92xx_get_vref(codec, nid); | |
1863 | stac92xx_auto_set_pinctl(codec, nid, pinctl); | |
1864 | } | |
40c1d308 JZ |
1865 | |
1866 | /* check the auto-mute again: we need to mute/unmute the speaker | |
1867 | * appropriately according to the pin direction | |
1868 | */ | |
1869 | if (spec->hp_detect) | |
1870 | codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26); | |
1871 | ||
403d1944 MP |
1872 | return 1; |
1873 | } | |
1874 | ||
0fb87bb4 ML |
1875 | #define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info |
1876 | ||
1877 | static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol, | |
1878 | struct snd_ctl_elem_value *ucontrol) | |
1879 | { | |
1880 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
1881 | struct sigmatel_spec *spec = codec->spec; | |
1882 | ||
1883 | ucontrol->value.integer.value[0] = spec->clfe_swap; | |
1884 | return 0; | |
1885 | } | |
1886 | ||
1887 | static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol, | |
1888 | struct snd_ctl_elem_value *ucontrol) | |
1889 | { | |
1890 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
1891 | struct sigmatel_spec *spec = codec->spec; | |
1892 | hda_nid_t nid = kcontrol->private_value & 0xff; | |
68ea7b2f | 1893 | unsigned int val = !!ucontrol->value.integer.value[0]; |
0fb87bb4 | 1894 | |
68ea7b2f | 1895 | if (spec->clfe_swap == val) |
0fb87bb4 ML |
1896 | return 0; |
1897 | ||
68ea7b2f | 1898 | spec->clfe_swap = val; |
0fb87bb4 ML |
1899 | |
1900 | snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE, | |
1901 | spec->clfe_swap ? 0x4 : 0x0); | |
1902 | ||
1903 | return 1; | |
1904 | } | |
1905 | ||
403d1944 MP |
1906 | #define STAC_CODEC_IO_SWITCH(xname, xpval) \ |
1907 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
1908 | .name = xname, \ | |
1909 | .index = 0, \ | |
1910 | .info = stac92xx_io_switch_info, \ | |
1911 | .get = stac92xx_io_switch_get, \ | |
1912 | .put = stac92xx_io_switch_put, \ | |
1913 | .private_value = xpval, \ | |
1914 | } | |
1915 | ||
0fb87bb4 ML |
1916 | #define STAC_CODEC_CLFE_SWITCH(xname, xpval) \ |
1917 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
1918 | .name = xname, \ | |
1919 | .index = 0, \ | |
1920 | .info = stac92xx_clfe_switch_info, \ | |
1921 | .get = stac92xx_clfe_switch_get, \ | |
1922 | .put = stac92xx_clfe_switch_put, \ | |
1923 | .private_value = xpval, \ | |
1924 | } | |
403d1944 | 1925 | |
c7d4b2fa M |
1926 | enum { |
1927 | STAC_CTL_WIDGET_VOL, | |
1928 | STAC_CTL_WIDGET_MUTE, | |
403d1944 | 1929 | STAC_CTL_WIDGET_IO_SWITCH, |
0fb87bb4 | 1930 | STAC_CTL_WIDGET_CLFE_SWITCH |
c7d4b2fa M |
1931 | }; |
1932 | ||
c8b6bf9b | 1933 | static struct snd_kcontrol_new stac92xx_control_templates[] = { |
c7d4b2fa M |
1934 | HDA_CODEC_VOLUME(NULL, 0, 0, 0), |
1935 | HDA_CODEC_MUTE(NULL, 0, 0, 0), | |
403d1944 | 1936 | STAC_CODEC_IO_SWITCH(NULL, 0), |
0fb87bb4 | 1937 | STAC_CODEC_CLFE_SWITCH(NULL, 0), |
c7d4b2fa M |
1938 | }; |
1939 | ||
1940 | /* add dynamic controls */ | |
1941 | static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val) | |
1942 | { | |
c8b6bf9b | 1943 | struct snd_kcontrol_new *knew; |
c7d4b2fa M |
1944 | |
1945 | if (spec->num_kctl_used >= spec->num_kctl_alloc) { | |
1946 | int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC; | |
1947 | ||
1948 | knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */ | |
1949 | if (! knew) | |
1950 | return -ENOMEM; | |
1951 | if (spec->kctl_alloc) { | |
1952 | memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc); | |
1953 | kfree(spec->kctl_alloc); | |
1954 | } | |
1955 | spec->kctl_alloc = knew; | |
1956 | spec->num_kctl_alloc = num; | |
1957 | } | |
1958 | ||
1959 | knew = &spec->kctl_alloc[spec->num_kctl_used]; | |
1960 | *knew = stac92xx_control_templates[type]; | |
82fe0c58 | 1961 | knew->name = kstrdup(name, GFP_KERNEL); |
c7d4b2fa M |
1962 | if (! knew->name) |
1963 | return -ENOMEM; | |
1964 | knew->private_value = val; | |
1965 | spec->num_kctl_used++; | |
1966 | return 0; | |
1967 | } | |
1968 | ||
403d1944 MP |
1969 | /* flag inputs as additional dynamic lineouts */ |
1970 | static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg) | |
1971 | { | |
1972 | struct sigmatel_spec *spec = codec->spec; | |
7b043899 SL |
1973 | unsigned int wcaps, wtype; |
1974 | int i, num_dacs = 0; | |
1975 | ||
1976 | /* use the wcaps cache to count all DACs available for line-outs */ | |
1977 | for (i = 0; i < codec->num_nodes; i++) { | |
1978 | wcaps = codec->wcaps[i]; | |
1979 | wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT; | |
8e9068b1 | 1980 | |
7b043899 SL |
1981 | if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL)) |
1982 | num_dacs++; | |
1983 | } | |
403d1944 | 1984 | |
7b043899 SL |
1985 | snd_printdd("%s: total dac count=%d\n", __func__, num_dacs); |
1986 | ||
403d1944 MP |
1987 | switch (cfg->line_outs) { |
1988 | case 3: | |
1989 | /* add line-in as side */ | |
7b043899 | 1990 | if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) { |
c480f79b TI |
1991 | cfg->line_out_pins[cfg->line_outs] = |
1992 | cfg->input_pins[AUTO_PIN_LINE]; | |
403d1944 MP |
1993 | spec->line_switch = 1; |
1994 | cfg->line_outs++; | |
1995 | } | |
1996 | break; | |
1997 | case 2: | |
1998 | /* add line-in as clfe and mic as side */ | |
7b043899 | 1999 | if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) { |
c480f79b TI |
2000 | cfg->line_out_pins[cfg->line_outs] = |
2001 | cfg->input_pins[AUTO_PIN_LINE]; | |
403d1944 MP |
2002 | spec->line_switch = 1; |
2003 | cfg->line_outs++; | |
2004 | } | |
7b043899 | 2005 | if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) { |
c480f79b TI |
2006 | cfg->line_out_pins[cfg->line_outs] = |
2007 | cfg->input_pins[AUTO_PIN_MIC]; | |
403d1944 MP |
2008 | spec->mic_switch = 1; |
2009 | cfg->line_outs++; | |
2010 | } | |
2011 | break; | |
2012 | case 1: | |
2013 | /* add line-in as surr and mic as clfe */ | |
7b043899 | 2014 | if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) { |
c480f79b TI |
2015 | cfg->line_out_pins[cfg->line_outs] = |
2016 | cfg->input_pins[AUTO_PIN_LINE]; | |
403d1944 MP |
2017 | spec->line_switch = 1; |
2018 | cfg->line_outs++; | |
2019 | } | |
7b043899 | 2020 | if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) { |
c480f79b TI |
2021 | cfg->line_out_pins[cfg->line_outs] = |
2022 | cfg->input_pins[AUTO_PIN_MIC]; | |
403d1944 MP |
2023 | spec->mic_switch = 1; |
2024 | cfg->line_outs++; | |
2025 | } | |
2026 | break; | |
2027 | } | |
2028 | ||
2029 | return 0; | |
2030 | } | |
2031 | ||
7b043899 SL |
2032 | |
2033 | static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid) | |
2034 | { | |
2035 | int i; | |
2036 | ||
2037 | for (i = 0; i < spec->multiout.num_dacs; i++) { | |
2038 | if (spec->multiout.dac_nids[i] == nid) | |
2039 | return 1; | |
2040 | } | |
2041 | ||
2042 | return 0; | |
2043 | } | |
2044 | ||
3cc08dc6 | 2045 | /* |
7b043899 SL |
2046 | * Fill in the dac_nids table from the parsed pin configuration |
2047 | * This function only works when every pin in line_out_pins[] | |
2048 | * contains atleast one DAC in its connection list. Some 92xx | |
2049 | * codecs are not connected directly to a DAC, such as the 9200 | |
2050 | * and 9202/925x. For those, dac_nids[] must be hard-coded. | |
3cc08dc6 | 2051 | */ |
19039bd0 | 2052 | static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec, |
df802952 | 2053 | struct auto_pin_cfg *cfg) |
c7d4b2fa M |
2054 | { |
2055 | struct sigmatel_spec *spec = codec->spec; | |
7b043899 SL |
2056 | int i, j, conn_len = 0; |
2057 | hda_nid_t nid, conn[HDA_MAX_CONNECTIONS]; | |
2058 | unsigned int wcaps, wtype; | |
2059 | ||
c7d4b2fa M |
2060 | for (i = 0; i < cfg->line_outs; i++) { |
2061 | nid = cfg->line_out_pins[i]; | |
7b043899 SL |
2062 | conn_len = snd_hda_get_connections(codec, nid, conn, |
2063 | HDA_MAX_CONNECTIONS); | |
2064 | for (j = 0; j < conn_len; j++) { | |
2065 | wcaps = snd_hda_param_read(codec, conn[j], | |
2066 | AC_PAR_AUDIO_WIDGET_CAP); | |
2067 | wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT; | |
7b043899 SL |
2068 | if (wtype != AC_WID_AUD_OUT || |
2069 | (wcaps & AC_WCAP_DIGITAL)) | |
2070 | continue; | |
2071 | /* conn[j] is a DAC routed to this line-out */ | |
2072 | if (!is_in_dac_nids(spec, conn[j])) | |
2073 | break; | |
2074 | } | |
2075 | ||
2076 | if (j == conn_len) { | |
df802952 TI |
2077 | if (spec->multiout.num_dacs > 0) { |
2078 | /* we have already working output pins, | |
2079 | * so let's drop the broken ones again | |
2080 | */ | |
2081 | cfg->line_outs = spec->multiout.num_dacs; | |
2082 | break; | |
2083 | } | |
7b043899 SL |
2084 | /* error out, no available DAC found */ |
2085 | snd_printk(KERN_ERR | |
2086 | "%s: No available DAC for pin 0x%x\n", | |
2087 | __func__, nid); | |
2088 | return -ENODEV; | |
2089 | } | |
2090 | ||
2091 | spec->multiout.dac_nids[i] = conn[j]; | |
2092 | spec->multiout.num_dacs++; | |
2093 | if (conn_len > 1) { | |
2094 | /* select this DAC in the pin's input mux */ | |
82beb8fd TI |
2095 | snd_hda_codec_write_cache(codec, nid, 0, |
2096 | AC_VERB_SET_CONNECT_SEL, j); | |
c7d4b2fa | 2097 | |
7b043899 SL |
2098 | } |
2099 | } | |
c7d4b2fa | 2100 | |
7b043899 SL |
2101 | snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n", |
2102 | spec->multiout.num_dacs, | |
2103 | spec->multiout.dac_nids[0], | |
2104 | spec->multiout.dac_nids[1], | |
2105 | spec->multiout.dac_nids[2], | |
2106 | spec->multiout.dac_nids[3], | |
2107 | spec->multiout.dac_nids[4]); | |
c7d4b2fa M |
2108 | return 0; |
2109 | } | |
2110 | ||
eb06ed8f TI |
2111 | /* create volume control/switch for the given prefx type */ |
2112 | static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs) | |
2113 | { | |
2114 | char name[32]; | |
2115 | int err; | |
2116 | ||
2117 | sprintf(name, "%s Playback Volume", pfx); | |
2118 | err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name, | |
2119 | HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT)); | |
2120 | if (err < 0) | |
2121 | return err; | |
2122 | sprintf(name, "%s Playback Switch", pfx); | |
2123 | err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name, | |
2124 | HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT)); | |
2125 | if (err < 0) | |
2126 | return err; | |
2127 | return 0; | |
2128 | } | |
2129 | ||
c7d4b2fa | 2130 | /* add playback controls from the parsed DAC table */ |
0fb87bb4 | 2131 | static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec, |
19039bd0 | 2132 | const struct auto_pin_cfg *cfg) |
c7d4b2fa | 2133 | { |
19039bd0 TI |
2134 | static const char *chname[4] = { |
2135 | "Front", "Surround", NULL /*CLFE*/, "Side" | |
2136 | }; | |
c7d4b2fa M |
2137 | hda_nid_t nid; |
2138 | int i, err; | |
2139 | ||
0fb87bb4 ML |
2140 | struct sigmatel_spec *spec = codec->spec; |
2141 | unsigned int wid_caps; | |
2142 | ||
2143 | ||
c7d4b2fa | 2144 | for (i = 0; i < cfg->line_outs; i++) { |
403d1944 | 2145 | if (!spec->multiout.dac_nids[i]) |
c7d4b2fa M |
2146 | continue; |
2147 | ||
2148 | nid = spec->multiout.dac_nids[i]; | |
2149 | ||
2150 | if (i == 2) { | |
2151 | /* Center/LFE */ | |
eb06ed8f TI |
2152 | err = create_controls(spec, "Center", nid, 1); |
2153 | if (err < 0) | |
c7d4b2fa | 2154 | return err; |
eb06ed8f TI |
2155 | err = create_controls(spec, "LFE", nid, 2); |
2156 | if (err < 0) | |
c7d4b2fa | 2157 | return err; |
0fb87bb4 ML |
2158 | |
2159 | wid_caps = get_wcaps(codec, nid); | |
2160 | ||
2161 | if (wid_caps & AC_WCAP_LR_SWAP) { | |
2162 | err = stac92xx_add_control(spec, | |
2163 | STAC_CTL_WIDGET_CLFE_SWITCH, | |
2164 | "Swap Center/LFE Playback Switch", nid); | |
2165 | ||
2166 | if (err < 0) | |
2167 | return err; | |
2168 | } | |
2169 | ||
c7d4b2fa | 2170 | } else { |
eb06ed8f TI |
2171 | err = create_controls(spec, chname[i], nid, 3); |
2172 | if (err < 0) | |
c7d4b2fa M |
2173 | return err; |
2174 | } | |
2175 | } | |
2176 | ||
403d1944 MP |
2177 | if (spec->line_switch) |
2178 | if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0) | |
2179 | return err; | |
2180 | ||
2181 | if (spec->mic_switch) | |
2182 | if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0) | |
2183 | return err; | |
2184 | ||
c7d4b2fa M |
2185 | return 0; |
2186 | } | |
2187 | ||
eb06ed8f | 2188 | static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid) |
c7d4b2fa | 2189 | { |
7b043899 SL |
2190 | if (is_in_dac_nids(spec, nid)) |
2191 | return 1; | |
eb06ed8f TI |
2192 | if (spec->multiout.hp_nid == nid) |
2193 | return 1; | |
2194 | return 0; | |
2195 | } | |
c7d4b2fa | 2196 | |
eb06ed8f TI |
2197 | static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid) |
2198 | { | |
2199 | if (!spec->multiout.hp_nid) | |
2200 | spec->multiout.hp_nid = nid; | |
2201 | else if (spec->multiout.num_dacs > 4) { | |
2202 | printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid); | |
2203 | return 1; | |
2204 | } else { | |
2205 | spec->multiout.dac_nids[spec->multiout.num_dacs] = nid; | |
2206 | spec->multiout.num_dacs++; | |
2207 | } | |
2208 | return 0; | |
2209 | } | |
4e55096e | 2210 | |
eb06ed8f TI |
2211 | /* add playback controls for Speaker and HP outputs */ |
2212 | static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec, | |
2213 | struct auto_pin_cfg *cfg) | |
2214 | { | |
2215 | struct sigmatel_spec *spec = codec->spec; | |
2216 | hda_nid_t nid; | |
2217 | int i, old_num_dacs, err; | |
2218 | ||
2219 | old_num_dacs = spec->multiout.num_dacs; | |
2220 | for (i = 0; i < cfg->hp_outs; i++) { | |
2221 | unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]); | |
2222 | if (wid_caps & AC_WCAP_UNSOL_CAP) | |
2223 | spec->hp_detect = 1; | |
2224 | nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0, | |
2225 | AC_VERB_GET_CONNECT_LIST, 0) & 0xff; | |
2226 | if (check_in_dac_nids(spec, nid)) | |
2227 | nid = 0; | |
2228 | if (! nid) | |
c7d4b2fa | 2229 | continue; |
eb06ed8f TI |
2230 | add_spec_dacs(spec, nid); |
2231 | } | |
2232 | for (i = 0; i < cfg->speaker_outs; i++) { | |
7b043899 | 2233 | nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0, |
eb06ed8f TI |
2234 | AC_VERB_GET_CONNECT_LIST, 0) & 0xff; |
2235 | if (check_in_dac_nids(spec, nid)) | |
2236 | nid = 0; | |
eb06ed8f TI |
2237 | if (! nid) |
2238 | continue; | |
2239 | add_spec_dacs(spec, nid); | |
c7d4b2fa | 2240 | } |
1b290a51 MR |
2241 | for (i = 0; i < cfg->line_outs; i++) { |
2242 | nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0, | |
2243 | AC_VERB_GET_CONNECT_LIST, 0) & 0xff; | |
2244 | if (check_in_dac_nids(spec, nid)) | |
2245 | nid = 0; | |
2246 | if (! nid) | |
2247 | continue; | |
2248 | add_spec_dacs(spec, nid); | |
2249 | } | |
eb06ed8f TI |
2250 | for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) { |
2251 | static const char *pfxs[] = { | |
2252 | "Speaker", "External Speaker", "Speaker2", | |
2253 | }; | |
2254 | err = create_controls(spec, pfxs[i - old_num_dacs], | |
2255 | spec->multiout.dac_nids[i], 3); | |
2256 | if (err < 0) | |
2257 | return err; | |
2258 | } | |
2259 | if (spec->multiout.hp_nid) { | |
2260 | const char *pfx; | |
6020c008 | 2261 | if (old_num_dacs == spec->multiout.num_dacs) |
eb06ed8f TI |
2262 | pfx = "Master"; |
2263 | else | |
2264 | pfx = "Headphone"; | |
2265 | err = create_controls(spec, pfx, spec->multiout.hp_nid, 3); | |
2266 | if (err < 0) | |
2267 | return err; | |
2268 | } | |
c7d4b2fa M |
2269 | |
2270 | return 0; | |
2271 | } | |
2272 | ||
8b65727b | 2273 | /* labels for dmic mux inputs */ |
ddc2cec4 | 2274 | static const char *stac92xx_dmic_labels[5] = { |
8b65727b MP |
2275 | "Analog Inputs", "Digital Mic 1", "Digital Mic 2", |
2276 | "Digital Mic 3", "Digital Mic 4" | |
2277 | }; | |
2278 | ||
2279 | /* create playback/capture controls for input pins on dmic capable codecs */ | |
2280 | static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec, | |
2281 | const struct auto_pin_cfg *cfg) | |
2282 | { | |
2283 | struct sigmatel_spec *spec = codec->spec; | |
2284 | struct hda_input_mux *dimux = &spec->private_dimux; | |
2285 | hda_nid_t con_lst[HDA_MAX_NUM_INPUTS]; | |
0678accd MR |
2286 | int err, i, j; |
2287 | char name[32]; | |
8b65727b MP |
2288 | |
2289 | dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0]; | |
2290 | dimux->items[dimux->num_items].index = 0; | |
2291 | dimux->num_items++; | |
2292 | ||
2293 | for (i = 0; i < spec->num_dmics; i++) { | |
0678accd | 2294 | hda_nid_t nid; |
8b65727b MP |
2295 | int index; |
2296 | int num_cons; | |
0678accd | 2297 | unsigned int wcaps; |
8b65727b MP |
2298 | unsigned int def_conf; |
2299 | ||
2300 | def_conf = snd_hda_codec_read(codec, | |
2301 | spec->dmic_nids[i], | |
2302 | 0, | |
2303 | AC_VERB_GET_CONFIG_DEFAULT, | |
2304 | 0); | |
2305 | if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE) | |
2306 | continue; | |
2307 | ||
0678accd | 2308 | nid = spec->dmic_nids[i]; |
8b65727b | 2309 | num_cons = snd_hda_get_connections(codec, |
e1f0d669 | 2310 | spec->dmux_nids[0], |
8b65727b MP |
2311 | con_lst, |
2312 | HDA_MAX_NUM_INPUTS); | |
2313 | for (j = 0; j < num_cons; j++) | |
0678accd | 2314 | if (con_lst[j] == nid) { |
8b65727b MP |
2315 | index = j; |
2316 | goto found; | |
2317 | } | |
2318 | continue; | |
2319 | found: | |
0678accd MR |
2320 | wcaps = get_wcaps(codec, nid); |
2321 | ||
2322 | if (wcaps & AC_WCAP_OUT_AMP) { | |
2323 | sprintf(name, "%s Capture Volume", | |
2324 | stac92xx_dmic_labels[dimux->num_items]); | |
2325 | ||
2326 | err = stac92xx_add_control(spec, | |
2327 | STAC_CTL_WIDGET_VOL, | |
2328 | name, | |
2329 | HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT)); | |
2330 | if (err < 0) | |
2331 | return err; | |
2332 | } | |
2333 | ||
8b65727b MP |
2334 | dimux->items[dimux->num_items].label = |
2335 | stac92xx_dmic_labels[dimux->num_items]; | |
2336 | dimux->items[dimux->num_items].index = index; | |
2337 | dimux->num_items++; | |
2338 | } | |
2339 | ||
2340 | return 0; | |
2341 | } | |
2342 | ||
c7d4b2fa M |
2343 | /* create playback/capture controls for input pins */ |
2344 | static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg) | |
2345 | { | |
2346 | struct sigmatel_spec *spec = codec->spec; | |
c7d4b2fa M |
2347 | struct hda_input_mux *imux = &spec->private_imux; |
2348 | hda_nid_t con_lst[HDA_MAX_NUM_INPUTS]; | |
2349 | int i, j, k; | |
2350 | ||
2351 | for (i = 0; i < AUTO_PIN_LAST; i++) { | |
314634bc TI |
2352 | int index; |
2353 | ||
2354 | if (!cfg->input_pins[i]) | |
2355 | continue; | |
2356 | index = -1; | |
2357 | for (j = 0; j < spec->num_muxes; j++) { | |
2358 | int num_cons; | |
2359 | num_cons = snd_hda_get_connections(codec, | |
2360 | spec->mux_nids[j], | |
2361 | con_lst, | |
2362 | HDA_MAX_NUM_INPUTS); | |
2363 | for (k = 0; k < num_cons; k++) | |
2364 | if (con_lst[k] == cfg->input_pins[i]) { | |
2365 | index = k; | |
2366 | goto found; | |
2367 | } | |
c7d4b2fa | 2368 | } |
314634bc TI |
2369 | continue; |
2370 | found: | |
2371 | imux->items[imux->num_items].label = auto_pin_cfg_labels[i]; | |
2372 | imux->items[imux->num_items].index = index; | |
2373 | imux->num_items++; | |
c7d4b2fa M |
2374 | } |
2375 | ||
7b043899 | 2376 | if (imux->num_items) { |
62fe78e9 SR |
2377 | /* |
2378 | * Set the current input for the muxes. | |
2379 | * The STAC9221 has two input muxes with identical source | |
2380 | * NID lists. Hopefully this won't get confused. | |
2381 | */ | |
2382 | for (i = 0; i < spec->num_muxes; i++) { | |
82beb8fd TI |
2383 | snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0, |
2384 | AC_VERB_SET_CONNECT_SEL, | |
2385 | imux->items[0].index); | |
62fe78e9 SR |
2386 | } |
2387 | } | |
2388 | ||
c7d4b2fa M |
2389 | return 0; |
2390 | } | |
2391 | ||
c7d4b2fa M |
2392 | static void stac92xx_auto_init_multi_out(struct hda_codec *codec) |
2393 | { | |
2394 | struct sigmatel_spec *spec = codec->spec; | |
2395 | int i; | |
2396 | ||
2397 | for (i = 0; i < spec->autocfg.line_outs; i++) { | |
2398 | hda_nid_t nid = spec->autocfg.line_out_pins[i]; | |
2399 | stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN); | |
2400 | } | |
2401 | } | |
2402 | ||
2403 | static void stac92xx_auto_init_hp_out(struct hda_codec *codec) | |
2404 | { | |
2405 | struct sigmatel_spec *spec = codec->spec; | |
eb06ed8f | 2406 | int i; |
c7d4b2fa | 2407 | |
eb06ed8f TI |
2408 | for (i = 0; i < spec->autocfg.hp_outs; i++) { |
2409 | hda_nid_t pin; | |
2410 | pin = spec->autocfg.hp_pins[i]; | |
2411 | if (pin) /* connect to front */ | |
2412 | stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN); | |
2413 | } | |
2414 | for (i = 0; i < spec->autocfg.speaker_outs; i++) { | |
2415 | hda_nid_t pin; | |
2416 | pin = spec->autocfg.speaker_pins[i]; | |
2417 | if (pin) /* connect to front */ | |
2418 | stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN); | |
2419 | } | |
c7d4b2fa M |
2420 | } |
2421 | ||
3cc08dc6 | 2422 | static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in) |
c7d4b2fa M |
2423 | { |
2424 | struct sigmatel_spec *spec = codec->spec; | |
2425 | int err; | |
bcecd9bd | 2426 | int hp_speaker_swap = 0; |
c7d4b2fa | 2427 | |
8b65727b MP |
2428 | if ((err = snd_hda_parse_pin_def_config(codec, |
2429 | &spec->autocfg, | |
2430 | spec->dmic_nids)) < 0) | |
c7d4b2fa | 2431 | return err; |
82bc955f | 2432 | if (! spec->autocfg.line_outs) |
869264c4 | 2433 | return 0; /* can't find valid pin config */ |
19039bd0 | 2434 | |
bcecd9bd JZ |
2435 | /* If we have no real line-out pin and multiple hp-outs, HPs should |
2436 | * be set up as multi-channel outputs. | |
2437 | */ | |
2438 | if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT && | |
2439 | spec->autocfg.hp_outs > 1) { | |
2440 | /* Copy hp_outs to line_outs, backup line_outs in | |
2441 | * speaker_outs so that the following routines can handle | |
2442 | * HP pins as primary outputs. | |
2443 | */ | |
2444 | memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins, | |
2445 | sizeof(spec->autocfg.line_out_pins)); | |
2446 | spec->autocfg.speaker_outs = spec->autocfg.line_outs; | |
2447 | memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins, | |
2448 | sizeof(spec->autocfg.hp_pins)); | |
2449 | spec->autocfg.line_outs = spec->autocfg.hp_outs; | |
2450 | hp_speaker_swap = 1; | |
2451 | } | |
2452 | ||
403d1944 MP |
2453 | if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0) |
2454 | return err; | |
19039bd0 TI |
2455 | if (spec->multiout.num_dacs == 0) |
2456 | if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0) | |
2457 | return err; | |
c7d4b2fa | 2458 | |
0fb87bb4 ML |
2459 | err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg); |
2460 | ||
2461 | if (err < 0) | |
2462 | return err; | |
2463 | ||
bcecd9bd JZ |
2464 | if (hp_speaker_swap == 1) { |
2465 | /* Restore the hp_outs and line_outs */ | |
2466 | memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins, | |
2467 | sizeof(spec->autocfg.line_out_pins)); | |
2468 | spec->autocfg.hp_outs = spec->autocfg.line_outs; | |
2469 | memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins, | |
2470 | sizeof(spec->autocfg.speaker_pins)); | |
2471 | spec->autocfg.line_outs = spec->autocfg.speaker_outs; | |
2472 | memset(spec->autocfg.speaker_pins, 0, | |
2473 | sizeof(spec->autocfg.speaker_pins)); | |
2474 | spec->autocfg.speaker_outs = 0; | |
2475 | } | |
2476 | ||
0fb87bb4 ML |
2477 | err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg); |
2478 | ||
2479 | if (err < 0) | |
2480 | return err; | |
2481 | ||
2482 | err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg); | |
2483 | ||
2484 | if (err < 0) | |
c7d4b2fa M |
2485 | return err; |
2486 | ||
8b65727b MP |
2487 | if (spec->num_dmics > 0) |
2488 | if ((err = stac92xx_auto_create_dmic_input_ctls(codec, | |
2489 | &spec->autocfg)) < 0) | |
2490 | return err; | |
2491 | ||
c7d4b2fa | 2492 | spec->multiout.max_channels = spec->multiout.num_dacs * 2; |
403d1944 | 2493 | if (spec->multiout.max_channels > 2) |
c7d4b2fa | 2494 | spec->surr_switch = 1; |
c7d4b2fa | 2495 | |
82bc955f | 2496 | if (spec->autocfg.dig_out_pin) |
3cc08dc6 | 2497 | spec->multiout.dig_out_nid = dig_out; |
82bc955f | 2498 | if (spec->autocfg.dig_in_pin) |
3cc08dc6 | 2499 | spec->dig_in_nid = dig_in; |
c7d4b2fa M |
2500 | |
2501 | if (spec->kctl_alloc) | |
2502 | spec->mixers[spec->num_mixers++] = spec->kctl_alloc; | |
2503 | ||
2504 | spec->input_mux = &spec->private_imux; | |
e1f0d669 MR |
2505 | if (!spec->dinput_mux) |
2506 | spec->dinput_mux = &spec->private_dimux; | |
c7d4b2fa M |
2507 | |
2508 | return 1; | |
2509 | } | |
2510 | ||
82bc955f TI |
2511 | /* add playback controls for HP output */ |
2512 | static int stac9200_auto_create_hp_ctls(struct hda_codec *codec, | |
2513 | struct auto_pin_cfg *cfg) | |
2514 | { | |
2515 | struct sigmatel_spec *spec = codec->spec; | |
eb06ed8f | 2516 | hda_nid_t pin = cfg->hp_pins[0]; |
82bc955f TI |
2517 | unsigned int wid_caps; |
2518 | ||
2519 | if (! pin) | |
2520 | return 0; | |
2521 | ||
2522 | wid_caps = get_wcaps(codec, pin); | |
505cb341 | 2523 | if (wid_caps & AC_WCAP_UNSOL_CAP) |
82bc955f | 2524 | spec->hp_detect = 1; |
82bc955f TI |
2525 | |
2526 | return 0; | |
2527 | } | |
2528 | ||
160ea0dc RF |
2529 | /* add playback controls for LFE output */ |
2530 | static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec, | |
2531 | struct auto_pin_cfg *cfg) | |
2532 | { | |
2533 | struct sigmatel_spec *spec = codec->spec; | |
2534 | int err; | |
2535 | hda_nid_t lfe_pin = 0x0; | |
2536 | int i; | |
2537 | ||
2538 | /* | |
2539 | * search speaker outs and line outs for a mono speaker pin | |
2540 | * with an amp. If one is found, add LFE controls | |
2541 | * for it. | |
2542 | */ | |
2543 | for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) { | |
2544 | hda_nid_t pin = spec->autocfg.speaker_pins[i]; | |
2545 | unsigned long wcaps = get_wcaps(codec, pin); | |
2546 | wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP); | |
2547 | if (wcaps == AC_WCAP_OUT_AMP) | |
2548 | /* found a mono speaker with an amp, must be lfe */ | |
2549 | lfe_pin = pin; | |
2550 | } | |
2551 | ||
2552 | /* if speaker_outs is 0, then speakers may be in line_outs */ | |
2553 | if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) { | |
2554 | for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) { | |
2555 | hda_nid_t pin = spec->autocfg.line_out_pins[i]; | |
2556 | unsigned long cfg; | |
2557 | cfg = snd_hda_codec_read(codec, pin, 0, | |
2558 | AC_VERB_GET_CONFIG_DEFAULT, | |
2559 | 0x00); | |
2560 | if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) { | |
2561 | unsigned long wcaps = get_wcaps(codec, pin); | |
2562 | wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP); | |
2563 | if (wcaps == AC_WCAP_OUT_AMP) | |
2564 | /* found a mono speaker with an amp, | |
2565 | must be lfe */ | |
2566 | lfe_pin = pin; | |
2567 | } | |
2568 | } | |
2569 | } | |
2570 | ||
2571 | if (lfe_pin) { | |
eb06ed8f | 2572 | err = create_controls(spec, "LFE", lfe_pin, 1); |
160ea0dc RF |
2573 | if (err < 0) |
2574 | return err; | |
2575 | } | |
2576 | ||
2577 | return 0; | |
2578 | } | |
2579 | ||
c7d4b2fa M |
2580 | static int stac9200_parse_auto_config(struct hda_codec *codec) |
2581 | { | |
2582 | struct sigmatel_spec *spec = codec->spec; | |
2583 | int err; | |
2584 | ||
df694daa | 2585 | if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0) |
c7d4b2fa M |
2586 | return err; |
2587 | ||
2588 | if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0) | |
2589 | return err; | |
2590 | ||
82bc955f TI |
2591 | if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0) |
2592 | return err; | |
2593 | ||
160ea0dc RF |
2594 | if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0) |
2595 | return err; | |
2596 | ||
82bc955f | 2597 | if (spec->autocfg.dig_out_pin) |
c7d4b2fa | 2598 | spec->multiout.dig_out_nid = 0x05; |
82bc955f | 2599 | if (spec->autocfg.dig_in_pin) |
c7d4b2fa | 2600 | spec->dig_in_nid = 0x04; |
c7d4b2fa M |
2601 | |
2602 | if (spec->kctl_alloc) | |
2603 | spec->mixers[spec->num_mixers++] = spec->kctl_alloc; | |
2604 | ||
2605 | spec->input_mux = &spec->private_imux; | |
8b65727b | 2606 | spec->dinput_mux = &spec->private_dimux; |
c7d4b2fa M |
2607 | |
2608 | return 1; | |
2609 | } | |
2610 | ||
62fe78e9 SR |
2611 | /* |
2612 | * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a | |
2613 | * funky external mute control using GPIO pins. | |
2614 | */ | |
2615 | ||
2616 | static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted) | |
2617 | { | |
2618 | unsigned int gpiostate, gpiomask, gpiodir; | |
2619 | ||
2620 | gpiostate = snd_hda_codec_read(codec, codec->afg, 0, | |
2621 | AC_VERB_GET_GPIO_DATA, 0); | |
2622 | ||
2623 | if (!muted) | |
2624 | gpiostate |= (1 << pin); | |
2625 | else | |
2626 | gpiostate &= ~(1 << pin); | |
2627 | ||
2628 | gpiomask = snd_hda_codec_read(codec, codec->afg, 0, | |
2629 | AC_VERB_GET_GPIO_MASK, 0); | |
2630 | gpiomask |= (1 << pin); | |
2631 | ||
2632 | gpiodir = snd_hda_codec_read(codec, codec->afg, 0, | |
2633 | AC_VERB_GET_GPIO_DIRECTION, 0); | |
2634 | gpiodir |= (1 << pin); | |
2635 | ||
2636 | /* AppleHDA seems to do this -- WTF is this verb?? */ | |
2637 | snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0); | |
2638 | ||
2639 | snd_hda_codec_write(codec, codec->afg, 0, | |
2640 | AC_VERB_SET_GPIO_MASK, gpiomask); | |
2641 | snd_hda_codec_write(codec, codec->afg, 0, | |
2642 | AC_VERB_SET_GPIO_DIRECTION, gpiodir); | |
2643 | ||
2644 | msleep(1); | |
2645 | ||
2646 | snd_hda_codec_write(codec, codec->afg, 0, | |
2647 | AC_VERB_SET_GPIO_DATA, gpiostate); | |
2648 | } | |
2649 | ||
314634bc TI |
2650 | static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid, |
2651 | unsigned int event) | |
2652 | { | |
2653 | if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) | |
dc81bed1 TI |
2654 | snd_hda_codec_write_cache(codec, nid, 0, |
2655 | AC_VERB_SET_UNSOLICITED_ENABLE, | |
2656 | (AC_USRSP_EN | event)); | |
314634bc TI |
2657 | } |
2658 | ||
c7d4b2fa M |
2659 | static int stac92xx_init(struct hda_codec *codec) |
2660 | { | |
2661 | struct sigmatel_spec *spec = codec->spec; | |
82bc955f TI |
2662 | struct auto_pin_cfg *cfg = &spec->autocfg; |
2663 | int i; | |
c7d4b2fa | 2664 | |
c7d4b2fa M |
2665 | snd_hda_sequence_write(codec, spec->init); |
2666 | ||
82bc955f TI |
2667 | /* set up pins */ |
2668 | if (spec->hp_detect) { | |
505cb341 | 2669 | /* Enable unsolicited responses on the HP widget */ |
eb06ed8f | 2670 | for (i = 0; i < cfg->hp_outs; i++) |
314634bc TI |
2671 | enable_pin_detect(codec, cfg->hp_pins[i], |
2672 | STAC_HP_EVENT); | |
0a07acaf TI |
2673 | /* force to enable the first line-out; the others are set up |
2674 | * in unsol_event | |
2675 | */ | |
2676 | stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0], | |
2677 | AC_PINCTL_OUT_EN); | |
eb995a8c | 2678 | stac92xx_auto_init_hp_out(codec); |
82bc955f TI |
2679 | /* fake event to set up pins */ |
2680 | codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26); | |
2681 | } else { | |
2682 | stac92xx_auto_init_multi_out(codec); | |
2683 | stac92xx_auto_init_hp_out(codec); | |
2684 | } | |
2685 | for (i = 0; i < AUTO_PIN_LAST; i++) { | |
c960a03b TI |
2686 | hda_nid_t nid = cfg->input_pins[i]; |
2687 | if (nid) { | |
2688 | unsigned int pinctl = AC_PINCTL_IN_EN; | |
2689 | if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) | |
2690 | pinctl |= stac92xx_get_vref(codec, nid); | |
2691 | stac92xx_auto_set_pinctl(codec, nid, pinctl); | |
2692 | } | |
82bc955f | 2693 | } |
8b65727b MP |
2694 | if (spec->num_dmics > 0) |
2695 | for (i = 0; i < spec->num_dmics; i++) | |
2696 | stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i], | |
2697 | AC_PINCTL_IN_EN); | |
2698 | ||
82bc955f TI |
2699 | if (cfg->dig_out_pin) |
2700 | stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin, | |
2701 | AC_PINCTL_OUT_EN); | |
2702 | if (cfg->dig_in_pin) | |
2703 | stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin, | |
2704 | AC_PINCTL_IN_EN); | |
2705 | ||
62fe78e9 SR |
2706 | if (spec->gpio_mute) { |
2707 | stac922x_gpio_mute(codec, 0, 0); | |
2708 | stac922x_gpio_mute(codec, 1, 0); | |
2709 | } | |
2710 | ||
c7d4b2fa M |
2711 | return 0; |
2712 | } | |
2713 | ||
2f2f4251 M |
2714 | static void stac92xx_free(struct hda_codec *codec) |
2715 | { | |
c7d4b2fa M |
2716 | struct sigmatel_spec *spec = codec->spec; |
2717 | int i; | |
2718 | ||
2719 | if (! spec) | |
2720 | return; | |
2721 | ||
2722 | if (spec->kctl_alloc) { | |
2723 | for (i = 0; i < spec->num_kctl_used; i++) | |
2724 | kfree(spec->kctl_alloc[i].name); | |
2725 | kfree(spec->kctl_alloc); | |
2726 | } | |
2727 | ||
11b44bbd RF |
2728 | if (spec->bios_pin_configs) |
2729 | kfree(spec->bios_pin_configs); | |
2730 | ||
c7d4b2fa | 2731 | kfree(spec); |
2f2f4251 M |
2732 | } |
2733 | ||
4e55096e M |
2734 | static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid, |
2735 | unsigned int flag) | |
2736 | { | |
2737 | unsigned int pin_ctl = snd_hda_codec_read(codec, nid, | |
2738 | 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00); | |
7b043899 | 2739 | |
f9acba43 TI |
2740 | if (pin_ctl & AC_PINCTL_IN_EN) { |
2741 | /* | |
2742 | * we need to check the current set-up direction of | |
2743 | * shared input pins since they can be switched via | |
2744 | * "xxx as Output" mixer switch | |
2745 | */ | |
2746 | struct sigmatel_spec *spec = codec->spec; | |
2747 | struct auto_pin_cfg *cfg = &spec->autocfg; | |
2748 | if ((nid == cfg->input_pins[AUTO_PIN_LINE] && | |
2749 | spec->line_switch) || | |
2750 | (nid == cfg->input_pins[AUTO_PIN_MIC] && | |
2751 | spec->mic_switch)) | |
2752 | return; | |
2753 | } | |
2754 | ||
7b043899 SL |
2755 | /* if setting pin direction bits, clear the current |
2756 | direction bits first */ | |
2757 | if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN)) | |
2758 | pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN); | |
2759 | ||
82beb8fd | 2760 | snd_hda_codec_write_cache(codec, nid, 0, |
4e55096e M |
2761 | AC_VERB_SET_PIN_WIDGET_CONTROL, |
2762 | pin_ctl | flag); | |
2763 | } | |
2764 | ||
2765 | static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid, | |
2766 | unsigned int flag) | |
2767 | { | |
2768 | unsigned int pin_ctl = snd_hda_codec_read(codec, nid, | |
2769 | 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00); | |
82beb8fd | 2770 | snd_hda_codec_write_cache(codec, nid, 0, |
4e55096e M |
2771 | AC_VERB_SET_PIN_WIDGET_CONTROL, |
2772 | pin_ctl & ~flag); | |
2773 | } | |
2774 | ||
40c1d308 | 2775 | static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid) |
314634bc TI |
2776 | { |
2777 | if (!nid) | |
2778 | return 0; | |
2779 | if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00) | |
40c1d308 JZ |
2780 | & (1 << 31)) { |
2781 | unsigned int pinctl; | |
2782 | pinctl = snd_hda_codec_read(codec, nid, 0, | |
2783 | AC_VERB_GET_PIN_WIDGET_CONTROL, 0); | |
2784 | if (pinctl & AC_PINCTL_IN_EN) | |
2785 | return 0; /* mic- or line-input */ | |
2786 | else | |
2787 | return 1; /* HP-output */ | |
2788 | } | |
314634bc TI |
2789 | return 0; |
2790 | } | |
2791 | ||
2792 | static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res) | |
4e55096e M |
2793 | { |
2794 | struct sigmatel_spec *spec = codec->spec; | |
2795 | struct auto_pin_cfg *cfg = &spec->autocfg; | |
2796 | int i, presence; | |
2797 | ||
eb06ed8f TI |
2798 | presence = 0; |
2799 | for (i = 0; i < cfg->hp_outs; i++) { | |
40c1d308 | 2800 | presence = get_hp_pin_presence(codec, cfg->hp_pins[i]); |
314634bc TI |
2801 | if (presence) |
2802 | break; | |
eb06ed8f | 2803 | } |
4e55096e M |
2804 | |
2805 | if (presence) { | |
2806 | /* disable lineouts, enable hp */ | |
2807 | for (i = 0; i < cfg->line_outs; i++) | |
2808 | stac92xx_reset_pinctl(codec, cfg->line_out_pins[i], | |
2809 | AC_PINCTL_OUT_EN); | |
eb06ed8f TI |
2810 | for (i = 0; i < cfg->speaker_outs; i++) |
2811 | stac92xx_reset_pinctl(codec, cfg->speaker_pins[i], | |
2812 | AC_PINCTL_OUT_EN); | |
4e55096e M |
2813 | } else { |
2814 | /* enable lineouts, disable hp */ | |
2815 | for (i = 0; i < cfg->line_outs; i++) | |
2816 | stac92xx_set_pinctl(codec, cfg->line_out_pins[i], | |
2817 | AC_PINCTL_OUT_EN); | |
eb06ed8f TI |
2818 | for (i = 0; i < cfg->speaker_outs; i++) |
2819 | stac92xx_set_pinctl(codec, cfg->speaker_pins[i], | |
2820 | AC_PINCTL_OUT_EN); | |
4e55096e M |
2821 | } |
2822 | } | |
2823 | ||
314634bc TI |
2824 | static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res) |
2825 | { | |
2826 | switch (res >> 26) { | |
2827 | case STAC_HP_EVENT: | |
2828 | stac92xx_hp_detect(codec, res); | |
2829 | break; | |
2830 | } | |
2831 | } | |
2832 | ||
cb53c626 | 2833 | #ifdef SND_HDA_NEEDS_RESUME |
ff6fdc37 M |
2834 | static int stac92xx_resume(struct hda_codec *codec) |
2835 | { | |
dc81bed1 TI |
2836 | struct sigmatel_spec *spec = codec->spec; |
2837 | ||
11b44bbd | 2838 | stac92xx_set_config_regs(codec); |
dc81bed1 TI |
2839 | snd_hda_sequence_write(codec, spec->init); |
2840 | if (spec->gpio_mute) { | |
2841 | stac922x_gpio_mute(codec, 0, 0); | |
2842 | stac922x_gpio_mute(codec, 1, 0); | |
2843 | } | |
82beb8fd TI |
2844 | snd_hda_codec_resume_amp(codec); |
2845 | snd_hda_codec_resume_cache(codec); | |
dc81bed1 TI |
2846 | /* invoke unsolicited event to reset the HP state */ |
2847 | if (spec->hp_detect) | |
2848 | codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26); | |
ff6fdc37 M |
2849 | return 0; |
2850 | } | |
2851 | #endif | |
2852 | ||
2f2f4251 M |
2853 | static struct hda_codec_ops stac92xx_patch_ops = { |
2854 | .build_controls = stac92xx_build_controls, | |
2855 | .build_pcms = stac92xx_build_pcms, | |
2856 | .init = stac92xx_init, | |
2857 | .free = stac92xx_free, | |
4e55096e | 2858 | .unsol_event = stac92xx_unsol_event, |
cb53c626 | 2859 | #ifdef SND_HDA_NEEDS_RESUME |
ff6fdc37 M |
2860 | .resume = stac92xx_resume, |
2861 | #endif | |
2f2f4251 M |
2862 | }; |
2863 | ||
2864 | static int patch_stac9200(struct hda_codec *codec) | |
2865 | { | |
2866 | struct sigmatel_spec *spec; | |
c7d4b2fa | 2867 | int err; |
2f2f4251 | 2868 | |
e560d8d8 | 2869 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); |
2f2f4251 M |
2870 | if (spec == NULL) |
2871 | return -ENOMEM; | |
2872 | ||
2873 | codec->spec = spec; | |
a4eed138 | 2874 | spec->num_pins = ARRAY_SIZE(stac9200_pin_nids); |
11b44bbd | 2875 | spec->pin_nids = stac9200_pin_nids; |
f5fcc13c TI |
2876 | spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS, |
2877 | stac9200_models, | |
2878 | stac9200_cfg_tbl); | |
11b44bbd RF |
2879 | if (spec->board_config < 0) { |
2880 | snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n"); | |
2881 | err = stac92xx_save_bios_config_regs(codec); | |
2882 | if (err < 0) { | |
2883 | stac92xx_free(codec); | |
2884 | return err; | |
2885 | } | |
2886 | spec->pin_configs = spec->bios_pin_configs; | |
2887 | } else { | |
403d1944 MP |
2888 | spec->pin_configs = stac9200_brd_tbl[spec->board_config]; |
2889 | stac92xx_set_config_regs(codec); | |
2890 | } | |
2f2f4251 M |
2891 | |
2892 | spec->multiout.max_channels = 2; | |
2893 | spec->multiout.num_dacs = 1; | |
2894 | spec->multiout.dac_nids = stac9200_dac_nids; | |
2895 | spec->adc_nids = stac9200_adc_nids; | |
2896 | spec->mux_nids = stac9200_mux_nids; | |
dabbed6f | 2897 | spec->num_muxes = 1; |
8b65727b | 2898 | spec->num_dmics = 0; |
9e05b7a3 | 2899 | spec->num_adcs = 1; |
c7d4b2fa | 2900 | |
1194b5b7 TI |
2901 | if (spec->board_config == STAC_9200_GATEWAY) |
2902 | spec->init = stac9200_eapd_init; | |
2903 | else | |
2904 | spec->init = stac9200_core_init; | |
2f2f4251 | 2905 | spec->mixer = stac9200_mixer; |
c7d4b2fa M |
2906 | |
2907 | err = stac9200_parse_auto_config(codec); | |
2908 | if (err < 0) { | |
2909 | stac92xx_free(codec); | |
2910 | return err; | |
2911 | } | |
2f2f4251 M |
2912 | |
2913 | codec->patch_ops = stac92xx_patch_ops; | |
2914 | ||
2915 | return 0; | |
2916 | } | |
2917 | ||
8e21c34c TD |
2918 | static int patch_stac925x(struct hda_codec *codec) |
2919 | { | |
2920 | struct sigmatel_spec *spec; | |
2921 | int err; | |
2922 | ||
2923 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
2924 | if (spec == NULL) | |
2925 | return -ENOMEM; | |
2926 | ||
2927 | codec->spec = spec; | |
a4eed138 | 2928 | spec->num_pins = ARRAY_SIZE(stac925x_pin_nids); |
8e21c34c TD |
2929 | spec->pin_nids = stac925x_pin_nids; |
2930 | spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS, | |
2931 | stac925x_models, | |
2932 | stac925x_cfg_tbl); | |
9e507abd | 2933 | again: |
8e21c34c | 2934 | if (spec->board_config < 0) { |
2c11f955 TD |
2935 | snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x," |
2936 | "using BIOS defaults\n"); | |
8e21c34c TD |
2937 | err = stac92xx_save_bios_config_regs(codec); |
2938 | if (err < 0) { | |
2939 | stac92xx_free(codec); | |
2940 | return err; | |
2941 | } | |
2942 | spec->pin_configs = spec->bios_pin_configs; | |
2943 | } else if (stac925x_brd_tbl[spec->board_config] != NULL){ | |
2944 | spec->pin_configs = stac925x_brd_tbl[spec->board_config]; | |
2945 | stac92xx_set_config_regs(codec); | |
2946 | } | |
2947 | ||
2948 | spec->multiout.max_channels = 2; | |
2949 | spec->multiout.num_dacs = 1; | |
2950 | spec->multiout.dac_nids = stac925x_dac_nids; | |
2951 | spec->adc_nids = stac925x_adc_nids; | |
2952 | spec->mux_nids = stac925x_mux_nids; | |
2953 | spec->num_muxes = 1; | |
9e05b7a3 | 2954 | spec->num_adcs = 1; |
2c11f955 TD |
2955 | switch (codec->vendor_id) { |
2956 | case 0x83847632: /* STAC9202 */ | |
2957 | case 0x83847633: /* STAC9202D */ | |
2958 | case 0x83847636: /* STAC9251 */ | |
2959 | case 0x83847637: /* STAC9251D */ | |
f6e9852a | 2960 | spec->num_dmics = STAC925X_NUM_DMICS; |
2c11f955 | 2961 | spec->dmic_nids = stac925x_dmic_nids; |
1697055e TI |
2962 | spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids); |
2963 | spec->dmux_nids = stac925x_dmux_nids; | |
2c11f955 TD |
2964 | break; |
2965 | default: | |
2966 | spec->num_dmics = 0; | |
2967 | break; | |
2968 | } | |
8e21c34c TD |
2969 | |
2970 | spec->init = stac925x_core_init; | |
2971 | spec->mixer = stac925x_mixer; | |
2972 | ||
2973 | err = stac92xx_parse_auto_config(codec, 0x8, 0x7); | |
9e507abd TI |
2974 | if (!err) { |
2975 | if (spec->board_config < 0) { | |
2976 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
2977 | "available, default to model=ref\n"); | |
2978 | spec->board_config = STAC_925x_REF; | |
2979 | goto again; | |
2980 | } | |
2981 | err = -EINVAL; | |
2982 | } | |
8e21c34c TD |
2983 | if (err < 0) { |
2984 | stac92xx_free(codec); | |
2985 | return err; | |
2986 | } | |
2987 | ||
2988 | codec->patch_ops = stac92xx_patch_ops; | |
2989 | ||
2990 | return 0; | |
2991 | } | |
2992 | ||
e1f0d669 MR |
2993 | static struct hda_input_mux stac92hd73xx_dmux = { |
2994 | .num_items = 4, | |
2995 | .items = { | |
2996 | { "Analog Inputs", 0x0b }, | |
2997 | { "CD", 0x08 }, | |
2998 | { "Digital Mic 1", 0x09 }, | |
2999 | { "Digital Mic 2", 0x0a }, | |
3000 | } | |
3001 | }; | |
3002 | ||
3003 | static int patch_stac92hd73xx(struct hda_codec *codec) | |
3004 | { | |
3005 | struct sigmatel_spec *spec; | |
3006 | hda_nid_t conn[STAC92HD73_DAC_COUNT + 2]; | |
3007 | int err = 0; | |
3008 | ||
3009 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
3010 | if (spec == NULL) | |
3011 | return -ENOMEM; | |
3012 | ||
3013 | codec->spec = spec; | |
3014 | spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids); | |
3015 | spec->pin_nids = stac92hd73xx_pin_nids; | |
3016 | spec->board_config = snd_hda_check_board_config(codec, | |
3017 | STAC_92HD73XX_MODELS, | |
3018 | stac92hd73xx_models, | |
3019 | stac92hd73xx_cfg_tbl); | |
3020 | again: | |
3021 | if (spec->board_config < 0) { | |
3022 | snd_printdd(KERN_INFO "hda_codec: Unknown model for" | |
3023 | " STAC92HD73XX, using BIOS defaults\n"); | |
3024 | err = stac92xx_save_bios_config_regs(codec); | |
3025 | if (err < 0) { | |
3026 | stac92xx_free(codec); | |
3027 | return err; | |
3028 | } | |
3029 | spec->pin_configs = spec->bios_pin_configs; | |
3030 | } else { | |
3031 | spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config]; | |
3032 | stac92xx_set_config_regs(codec); | |
3033 | } | |
3034 | ||
3035 | spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a, | |
3036 | conn, STAC92HD73_DAC_COUNT + 2) - 1; | |
3037 | ||
3038 | if (spec->multiout.num_dacs < 0) { | |
3039 | printk(KERN_WARNING "hda_codec: Could not determine " | |
3040 | "number of channels defaulting to DAC count\n"); | |
3041 | spec->multiout.num_dacs = STAC92HD73_DAC_COUNT; | |
3042 | } | |
3043 | ||
3044 | switch (spec->multiout.num_dacs) { | |
3045 | case 0x3: /* 6 Channel */ | |
3046 | spec->mixer = stac92hd73xx_6ch_mixer; | |
3047 | spec->init = stac92hd73xx_6ch_core_init; | |
3048 | break; | |
3049 | case 0x4: /* 8 Channel */ | |
3050 | spec->multiout.hp_nid = 0x18; | |
3051 | spec->mixer = stac92hd73xx_8ch_mixer; | |
3052 | spec->init = stac92hd73xx_8ch_core_init; | |
3053 | break; | |
3054 | case 0x5: /* 10 Channel */ | |
3055 | spec->multiout.hp_nid = 0x19; | |
3056 | spec->mixer = stac92hd73xx_10ch_mixer; | |
3057 | spec->init = stac92hd73xx_10ch_core_init; | |
3058 | }; | |
3059 | ||
3060 | spec->multiout.dac_nids = stac92hd73xx_dac_nids; | |
3061 | spec->aloopback_mask = 0x01; | |
3062 | spec->aloopback_shift = 8; | |
3063 | ||
3064 | spec->mux_nids = stac92hd73xx_mux_nids; | |
3065 | spec->adc_nids = stac92hd73xx_adc_nids; | |
3066 | spec->dmic_nids = stac92hd73xx_dmic_nids; | |
3067 | spec->dmux_nids = stac92hd73xx_dmux_nids; | |
3068 | ||
3069 | spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids); | |
3070 | spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids); | |
3071 | spec->num_dmics = STAC92HD73XX_NUM_DMICS; | |
1697055e | 3072 | spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids); |
e1f0d669 MR |
3073 | spec->dinput_mux = &stac92hd73xx_dmux; |
3074 | /* GPIO0 High = Enable EAPD */ | |
3075 | spec->gpio_mask = spec->gpio_data = 0x000001; | |
3076 | stac92xx_enable_gpio_mask(codec); | |
3077 | ||
3078 | err = stac92xx_parse_auto_config(codec, 0x22, 0x24); | |
3079 | ||
3080 | if (!err) { | |
3081 | if (spec->board_config < 0) { | |
3082 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
3083 | "available, default to model=ref\n"); | |
3084 | spec->board_config = STAC_92HD73XX_REF; | |
3085 | goto again; | |
3086 | } | |
3087 | err = -EINVAL; | |
3088 | } | |
3089 | ||
3090 | if (err < 0) { | |
3091 | stac92xx_free(codec); | |
3092 | return err; | |
3093 | } | |
3094 | ||
3095 | codec->patch_ops = stac92xx_patch_ops; | |
3096 | ||
3097 | return 0; | |
3098 | } | |
3099 | ||
e035b841 MR |
3100 | static int patch_stac92hd71bxx(struct hda_codec *codec) |
3101 | { | |
3102 | struct sigmatel_spec *spec; | |
3103 | int err = 0; | |
3104 | ||
3105 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
3106 | if (spec == NULL) | |
3107 | return -ENOMEM; | |
3108 | ||
3109 | codec->spec = spec; | |
3110 | spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids); | |
3111 | spec->pin_nids = stac92hd71bxx_pin_nids; | |
3112 | spec->board_config = snd_hda_check_board_config(codec, | |
3113 | STAC_92HD71BXX_MODELS, | |
3114 | stac92hd71bxx_models, | |
3115 | stac92hd71bxx_cfg_tbl); | |
3116 | again: | |
3117 | if (spec->board_config < 0) { | |
3118 | snd_printdd(KERN_INFO "hda_codec: Unknown model for" | |
3119 | " STAC92HD71BXX, using BIOS defaults\n"); | |
3120 | err = stac92xx_save_bios_config_regs(codec); | |
3121 | if (err < 0) { | |
3122 | stac92xx_free(codec); | |
3123 | return err; | |
3124 | } | |
3125 | spec->pin_configs = spec->bios_pin_configs; | |
3126 | } else { | |
3127 | spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config]; | |
3128 | stac92xx_set_config_regs(codec); | |
3129 | } | |
3130 | ||
541eee87 MR |
3131 | switch (codec->vendor_id) { |
3132 | case 0x111d76b6: /* 4 Port without Analog Mixer */ | |
3133 | case 0x111d76b7: | |
3134 | case 0x111d76b4: /* 6 Port without Analog Mixer */ | |
3135 | case 0x111d76b5: | |
3136 | spec->mixer = stac92hd71bxx_mixer; | |
3137 | spec->init = stac92hd71bxx_core_init; | |
3138 | break; | |
3139 | default: | |
3140 | spec->mixer = stac92hd71bxx_analog_mixer; | |
3141 | spec->init = stac92hd71bxx_analog_core_init; | |
3142 | } | |
3143 | ||
3144 | spec->aloopback_mask = 0x20; | |
3145 | spec->aloopback_shift = 0; | |
3146 | ||
e035b841 MR |
3147 | spec->gpio_mask = spec->gpio_data = 0x00000001; /* GPIO0 High = EAPD */ |
3148 | stac92xx_enable_gpio_mask(codec); | |
3149 | ||
e035b841 MR |
3150 | spec->mux_nids = stac92hd71bxx_mux_nids; |
3151 | spec->adc_nids = stac92hd71bxx_adc_nids; | |
3152 | spec->dmic_nids = stac92hd71bxx_dmic_nids; | |
e1f0d669 | 3153 | spec->dmux_nids = stac92hd71bxx_dmux_nids; |
e035b841 MR |
3154 | |
3155 | spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids); | |
3156 | spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids); | |
3157 | spec->num_dmics = STAC92HD71BXX_NUM_DMICS; | |
1697055e | 3158 | spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids); |
e035b841 MR |
3159 | |
3160 | spec->multiout.num_dacs = 2; | |
3161 | spec->multiout.hp_nid = 0x11; | |
3162 | spec->multiout.dac_nids = stac92hd71bxx_dac_nids; | |
3163 | ||
3164 | err = stac92xx_parse_auto_config(codec, 0x21, 0x23); | |
3165 | if (!err) { | |
3166 | if (spec->board_config < 0) { | |
3167 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
3168 | "available, default to model=ref\n"); | |
3169 | spec->board_config = STAC_92HD71BXX_REF; | |
3170 | goto again; | |
3171 | } | |
3172 | err = -EINVAL; | |
3173 | } | |
3174 | ||
3175 | if (err < 0) { | |
3176 | stac92xx_free(codec); | |
3177 | return err; | |
3178 | } | |
3179 | ||
3180 | codec->patch_ops = stac92xx_patch_ops; | |
3181 | ||
3182 | return 0; | |
3183 | }; | |
3184 | ||
2f2f4251 M |
3185 | static int patch_stac922x(struct hda_codec *codec) |
3186 | { | |
3187 | struct sigmatel_spec *spec; | |
c7d4b2fa | 3188 | int err; |
2f2f4251 | 3189 | |
e560d8d8 | 3190 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); |
2f2f4251 M |
3191 | if (spec == NULL) |
3192 | return -ENOMEM; | |
3193 | ||
3194 | codec->spec = spec; | |
a4eed138 | 3195 | spec->num_pins = ARRAY_SIZE(stac922x_pin_nids); |
11b44bbd | 3196 | spec->pin_nids = stac922x_pin_nids; |
f5fcc13c TI |
3197 | spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS, |
3198 | stac922x_models, | |
3199 | stac922x_cfg_tbl); | |
5d5d3bc3 | 3200 | if (spec->board_config == STAC_INTEL_MAC_V3) { |
3fc24d85 TI |
3201 | spec->gpio_mute = 1; |
3202 | /* Intel Macs have all same PCI SSID, so we need to check | |
3203 | * codec SSID to distinguish the exact models | |
3204 | */ | |
6f0778d8 | 3205 | printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id); |
3fc24d85 | 3206 | switch (codec->subsystem_id) { |
5d5d3bc3 IZ |
3207 | |
3208 | case 0x106b0800: | |
3209 | spec->board_config = STAC_INTEL_MAC_V1; | |
c45e20eb | 3210 | break; |
5d5d3bc3 IZ |
3211 | case 0x106b0600: |
3212 | case 0x106b0700: | |
3213 | spec->board_config = STAC_INTEL_MAC_V2; | |
6f0778d8 | 3214 | break; |
5d5d3bc3 IZ |
3215 | case 0x106b0e00: |
3216 | case 0x106b0f00: | |
3217 | case 0x106b1600: | |
3218 | case 0x106b1700: | |
3219 | case 0x106b0200: | |
3220 | case 0x106b1e00: | |
3221 | spec->board_config = STAC_INTEL_MAC_V3; | |
3fc24d85 | 3222 | break; |
5d5d3bc3 IZ |
3223 | case 0x106b1a00: |
3224 | case 0x00000100: | |
3225 | spec->board_config = STAC_INTEL_MAC_V4; | |
f16928fb | 3226 | break; |
5d5d3bc3 IZ |
3227 | case 0x106b0a00: |
3228 | case 0x106b2200: | |
3229 | spec->board_config = STAC_INTEL_MAC_V5; | |
0dae0f83 | 3230 | break; |
3fc24d85 TI |
3231 | } |
3232 | } | |
3233 | ||
9e507abd | 3234 | again: |
11b44bbd RF |
3235 | if (spec->board_config < 0) { |
3236 | snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, " | |
3237 | "using BIOS defaults\n"); | |
3238 | err = stac92xx_save_bios_config_regs(codec); | |
3239 | if (err < 0) { | |
3240 | stac92xx_free(codec); | |
3241 | return err; | |
3242 | } | |
3243 | spec->pin_configs = spec->bios_pin_configs; | |
3244 | } else if (stac922x_brd_tbl[spec->board_config] != NULL) { | |
403d1944 MP |
3245 | spec->pin_configs = stac922x_brd_tbl[spec->board_config]; |
3246 | stac92xx_set_config_regs(codec); | |
3247 | } | |
2f2f4251 | 3248 | |
c7d4b2fa M |
3249 | spec->adc_nids = stac922x_adc_nids; |
3250 | spec->mux_nids = stac922x_mux_nids; | |
2549413e | 3251 | spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids); |
9e05b7a3 | 3252 | spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids); |
8b65727b | 3253 | spec->num_dmics = 0; |
c7d4b2fa M |
3254 | |
3255 | spec->init = stac922x_core_init; | |
2f2f4251 | 3256 | spec->mixer = stac922x_mixer; |
c7d4b2fa M |
3257 | |
3258 | spec->multiout.dac_nids = spec->dac_nids; | |
19039bd0 | 3259 | |
3cc08dc6 | 3260 | err = stac92xx_parse_auto_config(codec, 0x08, 0x09); |
9e507abd TI |
3261 | if (!err) { |
3262 | if (spec->board_config < 0) { | |
3263 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
3264 | "available, default to model=ref\n"); | |
3265 | spec->board_config = STAC_D945_REF; | |
3266 | goto again; | |
3267 | } | |
3268 | err = -EINVAL; | |
3269 | } | |
3cc08dc6 MP |
3270 | if (err < 0) { |
3271 | stac92xx_free(codec); | |
3272 | return err; | |
3273 | } | |
3274 | ||
3275 | codec->patch_ops = stac92xx_patch_ops; | |
3276 | ||
807a4636 TI |
3277 | /* Fix Mux capture level; max to 2 */ |
3278 | snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT, | |
3279 | (0 << AC_AMPCAP_OFFSET_SHIFT) | | |
3280 | (2 << AC_AMPCAP_NUM_STEPS_SHIFT) | | |
3281 | (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) | | |
3282 | (0 << AC_AMPCAP_MUTE_SHIFT)); | |
3283 | ||
3cc08dc6 MP |
3284 | return 0; |
3285 | } | |
3286 | ||
3287 | static int patch_stac927x(struct hda_codec *codec) | |
3288 | { | |
3289 | struct sigmatel_spec *spec; | |
3290 | int err; | |
3291 | ||
3292 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
3293 | if (spec == NULL) | |
3294 | return -ENOMEM; | |
3295 | ||
3296 | codec->spec = spec; | |
a4eed138 | 3297 | spec->num_pins = ARRAY_SIZE(stac927x_pin_nids); |
11b44bbd | 3298 | spec->pin_nids = stac927x_pin_nids; |
f5fcc13c TI |
3299 | spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS, |
3300 | stac927x_models, | |
3301 | stac927x_cfg_tbl); | |
9e507abd | 3302 | again: |
8e9068b1 MR |
3303 | if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) { |
3304 | if (spec->board_config < 0) | |
3305 | snd_printdd(KERN_INFO "hda_codec: Unknown model for" | |
3306 | "STAC927x, using BIOS defaults\n"); | |
11b44bbd RF |
3307 | err = stac92xx_save_bios_config_regs(codec); |
3308 | if (err < 0) { | |
3309 | stac92xx_free(codec); | |
3310 | return err; | |
3311 | } | |
3312 | spec->pin_configs = spec->bios_pin_configs; | |
8e9068b1 | 3313 | } else { |
3cc08dc6 MP |
3314 | spec->pin_configs = stac927x_brd_tbl[spec->board_config]; |
3315 | stac92xx_set_config_regs(codec); | |
3316 | } | |
3317 | ||
8e9068b1 MR |
3318 | spec->adc_nids = stac927x_adc_nids; |
3319 | spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids); | |
3320 | spec->mux_nids = stac927x_mux_nids; | |
3321 | spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids); | |
3322 | spec->multiout.dac_nids = spec->dac_nids; | |
3323 | ||
81d3dbde | 3324 | switch (spec->board_config) { |
93ed1503 | 3325 | case STAC_D965_3ST: |
93ed1503 | 3326 | case STAC_D965_5ST: |
8e9068b1 MR |
3327 | /* GPIO0 High = Enable EAPD */ |
3328 | spec->gpio_mask = spec->gpio_data = 0x00000001; | |
3329 | spec->num_dmics = 0; | |
3330 | ||
93ed1503 | 3331 | spec->init = d965_core_init; |
9e05b7a3 | 3332 | spec->mixer = stac927x_mixer; |
81d3dbde | 3333 | break; |
8e9068b1 | 3334 | case STAC_DELL_BIOS: |
2f32d909 MR |
3335 | /* correct the front output jack as a hp out */ |
3336 | stac92xx_set_config_reg(codec, 0x0f, 0x02270110); | |
c481fca3 MR |
3337 | /* correct the front input jack as a mic */ |
3338 | stac92xx_set_config_reg(codec, 0x0e, 0x02a79130); | |
3339 | /* fallthru */ | |
8e9068b1 MR |
3340 | case STAC_DELL_3ST: |
3341 | /* GPIO2 High = Enable EAPD */ | |
3342 | spec->gpio_mask = spec->gpio_data = 0x00000004; | |
7f16859a MR |
3343 | spec->dmic_nids = stac927x_dmic_nids; |
3344 | spec->num_dmics = STAC927X_NUM_DMICS; | |
f1f208d0 | 3345 | |
8e9068b1 MR |
3346 | spec->init = d965_core_init; |
3347 | spec->mixer = stac927x_mixer; | |
3348 | spec->dmux_nids = stac927x_dmux_nids; | |
1697055e | 3349 | spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids); |
7f16859a MR |
3350 | break; |
3351 | default: | |
f1f208d0 MR |
3352 | /* GPIO0 High = Enable EAPD */ |
3353 | spec->gpio_mask = spec->gpio_data = 0x00000001; | |
8e9068b1 MR |
3354 | spec->num_dmics = 0; |
3355 | ||
3356 | spec->init = stac927x_core_init; | |
3357 | spec->mixer = stac927x_mixer; | |
7f16859a MR |
3358 | } |
3359 | ||
e1f0d669 MR |
3360 | spec->aloopback_mask = 0x40; |
3361 | spec->aloopback_shift = 0; | |
8e9068b1 | 3362 | |
8259980e | 3363 | stac92xx_enable_gpio_mask(codec); |
3cc08dc6 | 3364 | err = stac92xx_parse_auto_config(codec, 0x1e, 0x20); |
9e507abd TI |
3365 | if (!err) { |
3366 | if (spec->board_config < 0) { | |
3367 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
3368 | "available, default to model=ref\n"); | |
3369 | spec->board_config = STAC_D965_REF; | |
3370 | goto again; | |
3371 | } | |
3372 | err = -EINVAL; | |
3373 | } | |
c7d4b2fa M |
3374 | if (err < 0) { |
3375 | stac92xx_free(codec); | |
3376 | return err; | |
3377 | } | |
2f2f4251 M |
3378 | |
3379 | codec->patch_ops = stac92xx_patch_ops; | |
3380 | ||
3381 | return 0; | |
3382 | } | |
3383 | ||
f3302a59 MP |
3384 | static int patch_stac9205(struct hda_codec *codec) |
3385 | { | |
3386 | struct sigmatel_spec *spec; | |
8259980e | 3387 | int err; |
f3302a59 MP |
3388 | |
3389 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
3390 | if (spec == NULL) | |
3391 | return -ENOMEM; | |
3392 | ||
3393 | codec->spec = spec; | |
a4eed138 | 3394 | spec->num_pins = ARRAY_SIZE(stac9205_pin_nids); |
11b44bbd | 3395 | spec->pin_nids = stac9205_pin_nids; |
f5fcc13c TI |
3396 | spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS, |
3397 | stac9205_models, | |
3398 | stac9205_cfg_tbl); | |
9e507abd | 3399 | again: |
11b44bbd RF |
3400 | if (spec->board_config < 0) { |
3401 | snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n"); | |
3402 | err = stac92xx_save_bios_config_regs(codec); | |
3403 | if (err < 0) { | |
3404 | stac92xx_free(codec); | |
3405 | return err; | |
3406 | } | |
3407 | spec->pin_configs = spec->bios_pin_configs; | |
3408 | } else { | |
f3302a59 MP |
3409 | spec->pin_configs = stac9205_brd_tbl[spec->board_config]; |
3410 | stac92xx_set_config_regs(codec); | |
3411 | } | |
3412 | ||
3413 | spec->adc_nids = stac9205_adc_nids; | |
9e05b7a3 | 3414 | spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids); |
f3302a59 | 3415 | spec->mux_nids = stac9205_mux_nids; |
2549413e | 3416 | spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids); |
8b65727b | 3417 | spec->dmic_nids = stac9205_dmic_nids; |
f6e9852a | 3418 | spec->num_dmics = STAC9205_NUM_DMICS; |
e1f0d669 | 3419 | spec->dmux_nids = stac9205_dmux_nids; |
1697055e | 3420 | spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids); |
f3302a59 MP |
3421 | |
3422 | spec->init = stac9205_core_init; | |
3423 | spec->mixer = stac9205_mixer; | |
3424 | ||
e1f0d669 MR |
3425 | spec->aloopback_mask = 0x40; |
3426 | spec->aloopback_shift = 0; | |
f3302a59 | 3427 | spec->multiout.dac_nids = spec->dac_nids; |
87d48363 | 3428 | |
ae0a8ed8 | 3429 | switch (spec->board_config){ |
ae0a8ed8 | 3430 | case STAC_9205_DELL_M43: |
87d48363 MR |
3431 | /* Enable SPDIF in/out */ |
3432 | stac92xx_set_config_reg(codec, 0x1f, 0x01441030); | |
3433 | stac92xx_set_config_reg(codec, 0x20, 0x1c410030); | |
3434 | ||
8259980e | 3435 | spec->gpio_mask = 0x00000007; /* GPIO0-2 */ |
87d48363 MR |
3436 | /* GPIO0 High = EAPD, GPIO1 Low = DRM, |
3437 | * GPIO2 High = Headphone Mute | |
3438 | */ | |
8259980e | 3439 | spec->gpio_data = 0x00000005; |
ae0a8ed8 TD |
3440 | break; |
3441 | default: | |
3442 | /* GPIO0 High = EAPD */ | |
3443 | spec->gpio_mask = spec->gpio_data = 0x00000001; | |
3444 | break; | |
3445 | } | |
33382403 | 3446 | |
8259980e | 3447 | stac92xx_enable_gpio_mask(codec); |
f3302a59 | 3448 | err = stac92xx_parse_auto_config(codec, 0x1f, 0x20); |
9e507abd TI |
3449 | if (!err) { |
3450 | if (spec->board_config < 0) { | |
3451 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
3452 | "available, default to model=ref\n"); | |
3453 | spec->board_config = STAC_9205_REF; | |
3454 | goto again; | |
3455 | } | |
3456 | err = -EINVAL; | |
3457 | } | |
f3302a59 MP |
3458 | if (err < 0) { |
3459 | stac92xx_free(codec); | |
3460 | return err; | |
3461 | } | |
3462 | ||
3463 | codec->patch_ops = stac92xx_patch_ops; | |
3464 | ||
3465 | return 0; | |
3466 | } | |
3467 | ||
db064e50 | 3468 | /* |
6d859065 | 3469 | * STAC9872 hack |
db064e50 TI |
3470 | */ |
3471 | ||
99ccc560 | 3472 | /* static config for Sony VAIO FE550G and Sony VAIO AR */ |
db064e50 TI |
3473 | static hda_nid_t vaio_dacs[] = { 0x2 }; |
3474 | #define VAIO_HP_DAC 0x5 | |
3475 | static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ }; | |
3476 | static hda_nid_t vaio_mux_nids[] = { 0x15 }; | |
3477 | ||
3478 | static struct hda_input_mux vaio_mux = { | |
a3a2f429 | 3479 | .num_items = 3, |
db064e50 | 3480 | .items = { |
d773781c | 3481 | /* { "HP", 0x0 }, */ |
1624cb9a TI |
3482 | { "Mic Jack", 0x1 }, |
3483 | { "Internal Mic", 0x2 }, | |
db064e50 TI |
3484 | { "PCM", 0x3 }, |
3485 | } | |
3486 | }; | |
3487 | ||
3488 | static struct hda_verb vaio_init[] = { | |
3489 | {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */ | |
72e7b0dd | 3490 | {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT}, |
db064e50 TI |
3491 | {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */ |
3492 | {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */ | |
3493 | {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */ | |
3494 | {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */ | |
1624cb9a | 3495 | {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */ |
db064e50 TI |
3496 | {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */ |
3497 | {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */ | |
3498 | {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */ | |
3499 | {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */ | |
3500 | {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */ | |
3501 | {} | |
3502 | }; | |
3503 | ||
6d859065 GM |
3504 | static struct hda_verb vaio_ar_init[] = { |
3505 | {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */ | |
3506 | {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */ | |
3507 | {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */ | |
3508 | {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */ | |
3509 | /* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */ | |
3510 | {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */ | |
1624cb9a | 3511 | {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */ |
6d859065 GM |
3512 | {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */ |
3513 | {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */ | |
3514 | /* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */ | |
3515 | {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */ | |
3516 | {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */ | |
3517 | {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */ | |
3518 | {} | |
3519 | }; | |
3520 | ||
db064e50 | 3521 | /* bind volumes of both NID 0x02 and 0x05 */ |
cca3b371 TI |
3522 | static struct hda_bind_ctls vaio_bind_master_vol = { |
3523 | .ops = &snd_hda_bind_vol, | |
3524 | .values = { | |
3525 | HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT), | |
3526 | HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT), | |
3527 | 0 | |
3528 | }, | |
3529 | }; | |
db064e50 TI |
3530 | |
3531 | /* bind volumes of both NID 0x02 and 0x05 */ | |
cca3b371 TI |
3532 | static struct hda_bind_ctls vaio_bind_master_sw = { |
3533 | .ops = &snd_hda_bind_sw, | |
3534 | .values = { | |
3535 | HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT), | |
3536 | HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT), | |
3537 | 0, | |
3538 | }, | |
3539 | }; | |
db064e50 TI |
3540 | |
3541 | static struct snd_kcontrol_new vaio_mixer[] = { | |
cca3b371 TI |
3542 | HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol), |
3543 | HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw), | |
db064e50 TI |
3544 | /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */ |
3545 | HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT), | |
3546 | HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT), | |
3547 | { | |
3548 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
3549 | .name = "Capture Source", | |
3550 | .count = 1, | |
3551 | .info = stac92xx_mux_enum_info, | |
3552 | .get = stac92xx_mux_enum_get, | |
3553 | .put = stac92xx_mux_enum_put, | |
3554 | }, | |
3555 | {} | |
3556 | }; | |
3557 | ||
6d859065 | 3558 | static struct snd_kcontrol_new vaio_ar_mixer[] = { |
cca3b371 TI |
3559 | HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol), |
3560 | HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw), | |
6d859065 GM |
3561 | /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */ |
3562 | HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT), | |
3563 | HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT), | |
3564 | /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT), | |
3565 | HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/ | |
3566 | { | |
3567 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
3568 | .name = "Capture Source", | |
3569 | .count = 1, | |
3570 | .info = stac92xx_mux_enum_info, | |
3571 | .get = stac92xx_mux_enum_get, | |
3572 | .put = stac92xx_mux_enum_put, | |
3573 | }, | |
3574 | {} | |
3575 | }; | |
3576 | ||
3577 | static struct hda_codec_ops stac9872_patch_ops = { | |
db064e50 TI |
3578 | .build_controls = stac92xx_build_controls, |
3579 | .build_pcms = stac92xx_build_pcms, | |
3580 | .init = stac92xx_init, | |
3581 | .free = stac92xx_free, | |
cb53c626 | 3582 | #ifdef SND_HDA_NEEDS_RESUME |
db064e50 TI |
3583 | .resume = stac92xx_resume, |
3584 | #endif | |
3585 | }; | |
3586 | ||
72e7b0dd TI |
3587 | static int stac9872_vaio_init(struct hda_codec *codec) |
3588 | { | |
3589 | int err; | |
3590 | ||
3591 | err = stac92xx_init(codec); | |
3592 | if (err < 0) | |
3593 | return err; | |
3594 | if (codec->patch_ops.unsol_event) | |
3595 | codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26); | |
3596 | return 0; | |
3597 | } | |
3598 | ||
3599 | static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res) | |
3600 | { | |
40c1d308 | 3601 | if (get_hp_pin_presence(codec, 0x0a)) { |
72e7b0dd TI |
3602 | stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN); |
3603 | stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN); | |
3604 | } else { | |
3605 | stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN); | |
3606 | stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN); | |
3607 | } | |
3608 | } | |
3609 | ||
3610 | static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res) | |
3611 | { | |
3612 | switch (res >> 26) { | |
3613 | case STAC_HP_EVENT: | |
3614 | stac9872_vaio_hp_detect(codec, res); | |
3615 | break; | |
3616 | } | |
3617 | } | |
3618 | ||
3619 | static struct hda_codec_ops stac9872_vaio_patch_ops = { | |
3620 | .build_controls = stac92xx_build_controls, | |
3621 | .build_pcms = stac92xx_build_pcms, | |
3622 | .init = stac9872_vaio_init, | |
3623 | .free = stac92xx_free, | |
3624 | .unsol_event = stac9872_vaio_unsol_event, | |
3625 | #ifdef CONFIG_PM | |
3626 | .resume = stac92xx_resume, | |
3627 | #endif | |
3628 | }; | |
3629 | ||
6d859065 GM |
3630 | enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */ |
3631 | CXD9872RD_VAIO, | |
3632 | /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */ | |
3633 | STAC9872AK_VAIO, | |
3634 | /* Unknown. id=0x83847661 and subsys=0x104D1200. */ | |
3635 | STAC9872K_VAIO, | |
3636 | /* AR Series. id=0x83847664 and subsys=104D1300 */ | |
f5fcc13c TI |
3637 | CXD9872AKD_VAIO, |
3638 | STAC_9872_MODELS, | |
3639 | }; | |
3640 | ||
3641 | static const char *stac9872_models[STAC_9872_MODELS] = { | |
3642 | [CXD9872RD_VAIO] = "vaio", | |
3643 | [CXD9872AKD_VAIO] = "vaio-ar", | |
3644 | }; | |
3645 | ||
3646 | static struct snd_pci_quirk stac9872_cfg_tbl[] = { | |
3647 | SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO), | |
3648 | SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO), | |
3649 | SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO), | |
68e22543 | 3650 | SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO), |
db064e50 TI |
3651 | {} |
3652 | }; | |
3653 | ||
6d859065 | 3654 | static int patch_stac9872(struct hda_codec *codec) |
db064e50 TI |
3655 | { |
3656 | struct sigmatel_spec *spec; | |
3657 | int board_config; | |
3658 | ||
f5fcc13c TI |
3659 | board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS, |
3660 | stac9872_models, | |
3661 | stac9872_cfg_tbl); | |
db064e50 TI |
3662 | if (board_config < 0) |
3663 | /* unknown config, let generic-parser do its job... */ | |
3664 | return snd_hda_parse_generic_codec(codec); | |
3665 | ||
3666 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
3667 | if (spec == NULL) | |
3668 | return -ENOMEM; | |
3669 | ||
3670 | codec->spec = spec; | |
3671 | switch (board_config) { | |
6d859065 GM |
3672 | case CXD9872RD_VAIO: |
3673 | case STAC9872AK_VAIO: | |
3674 | case STAC9872K_VAIO: | |
db064e50 TI |
3675 | spec->mixer = vaio_mixer; |
3676 | spec->init = vaio_init; | |
3677 | spec->multiout.max_channels = 2; | |
3678 | spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs); | |
3679 | spec->multiout.dac_nids = vaio_dacs; | |
3680 | spec->multiout.hp_nid = VAIO_HP_DAC; | |
3681 | spec->num_adcs = ARRAY_SIZE(vaio_adcs); | |
3682 | spec->adc_nids = vaio_adcs; | |
3683 | spec->input_mux = &vaio_mux; | |
3684 | spec->mux_nids = vaio_mux_nids; | |
72e7b0dd | 3685 | codec->patch_ops = stac9872_vaio_patch_ops; |
db064e50 | 3686 | break; |
6d859065 GM |
3687 | |
3688 | case CXD9872AKD_VAIO: | |
3689 | spec->mixer = vaio_ar_mixer; | |
3690 | spec->init = vaio_ar_init; | |
3691 | spec->multiout.max_channels = 2; | |
3692 | spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs); | |
3693 | spec->multiout.dac_nids = vaio_dacs; | |
3694 | spec->multiout.hp_nid = VAIO_HP_DAC; | |
3695 | spec->num_adcs = ARRAY_SIZE(vaio_adcs); | |
3696 | spec->adc_nids = vaio_adcs; | |
3697 | spec->input_mux = &vaio_mux; | |
3698 | spec->mux_nids = vaio_mux_nids; | |
72e7b0dd | 3699 | codec->patch_ops = stac9872_patch_ops; |
6d859065 | 3700 | break; |
db064e50 TI |
3701 | } |
3702 | ||
db064e50 TI |
3703 | return 0; |
3704 | } | |
3705 | ||
3706 | ||
2f2f4251 M |
3707 | /* |
3708 | * patch entries | |
3709 | */ | |
3710 | struct hda_codec_preset snd_hda_preset_sigmatel[] = { | |
3711 | { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 }, | |
3712 | { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x }, | |
3713 | { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x }, | |
3714 | { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x }, | |
3715 | { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x }, | |
3716 | { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x }, | |
3717 | { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x }, | |
22a27c7f MP |
3718 | { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x }, |
3719 | { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x }, | |
3720 | { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x }, | |
3721 | { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x }, | |
3722 | { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x }, | |
3723 | { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x }, | |
3cc08dc6 MP |
3724 | { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x }, |
3725 | { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x }, | |
3726 | { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x }, | |
3727 | { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x }, | |
3728 | { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x }, | |
3729 | { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x }, | |
3730 | { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x }, | |
3731 | { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x }, | |
3732 | { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x }, | |
3733 | { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x }, | |
8e21c34c TD |
3734 | { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x }, |
3735 | { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x }, | |
3736 | { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x }, | |
3737 | { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x }, | |
3738 | { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x }, | |
3739 | { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x }, | |
6d859065 GM |
3740 | /* The following does not take into account .id=0x83847661 when subsys = |
3741 | * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are | |
3742 | * currently not fully supported. | |
3743 | */ | |
3744 | { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 }, | |
3745 | { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 }, | |
3746 | { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 }, | |
f3302a59 MP |
3747 | { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 }, |
3748 | { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 }, | |
3749 | { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 }, | |
3750 | { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 }, | |
3751 | { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 }, | |
3752 | { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 }, | |
3753 | { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 }, | |
3754 | { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 }, | |
541eee87 MR |
3755 | { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx }, |
3756 | { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx }, | |
e1f0d669 | 3757 | { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx }, |
541eee87 MR |
3758 | { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx }, |
3759 | { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx }, | |
3760 | { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx }, | |
3761 | { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx }, | |
3762 | { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx }, | |
3763 | { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx }, | |
3764 | { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx }, | |
3765 | { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx }, | |
3766 | { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx }, | |
2f2f4251 M |
3767 | {} /* terminator */ |
3768 | }; |