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ALSA: hda - Add automatic model setting for Samsung Q45
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2f2f4251
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1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
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8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
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27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
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34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
TI
38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
f5fcc13c
TI
45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
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TI
48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
58eec423
MCC
58 STAC_9200_M4,
59 STAC_9200_M4_2,
117f257d 60 STAC_9200_PANASONIC,
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TI
61 STAC_9200_MODELS
62};
63
64enum {
65 STAC_9205_REF,
dfe495d0 66 STAC_9205_DELL_M42,
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67 STAC_9205_DELL_M43,
68 STAC_9205_DELL_M44,
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TI
69 STAC_9205_MODELS
70};
71
e1f0d669 72enum {
9e43f0de 73 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 74 STAC_92HD73XX_REF,
661cd8fb
TI
75 STAC_DELL_M6_AMIC,
76 STAC_DELL_M6_DMIC,
77 STAC_DELL_M6_BOTH,
6b3ab21e 78 STAC_DELL_EQ,
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79 STAC_92HD73XX_MODELS
80};
81
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82enum {
83 STAC_92HD83XXX_REF,
84 STAC_92HD83XXX_MODELS
85};
86
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87enum {
88 STAC_92HD71BXX_REF,
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89 STAC_DELL_M4_1,
90 STAC_DELL_M4_2,
3a7abfd2 91 STAC_DELL_M4_3,
6a14f585 92 STAC_HP_M4,
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93 STAC_92HD71BXX_MODELS
94};
95
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96enum {
97 STAC_925x_REF,
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98 STAC_M1,
99 STAC_M1_2,
100 STAC_M2,
8e21c34c 101 STAC_M2_2,
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102 STAC_M3,
103 STAC_M5,
104 STAC_M6,
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TD
105 STAC_925x_MODELS
106};
107
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TI
108enum {
109 STAC_D945_REF,
110 STAC_D945GTP3,
111 STAC_D945GTP5,
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112 STAC_INTEL_MAC_V1,
113 STAC_INTEL_MAC_V2,
114 STAC_INTEL_MAC_V3,
115 STAC_INTEL_MAC_V4,
116 STAC_INTEL_MAC_V5,
536319af
NB
117 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
118 * is given, one of the above models will be
119 * chosen according to the subsystem id. */
dfe495d0 120 /* for backward compatibility */
f5fcc13c 121 STAC_MACMINI,
3fc24d85 122 STAC_MACBOOK,
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NB
123 STAC_MACBOOK_PRO_V1,
124 STAC_MACBOOK_PRO_V2,
f16928fb 125 STAC_IMAC_INTEL,
0dae0f83 126 STAC_IMAC_INTEL_20,
8c650087 127 STAC_ECS_202,
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128 STAC_922X_DELL_D81,
129 STAC_922X_DELL_D82,
130 STAC_922X_DELL_M81,
131 STAC_922X_DELL_M82,
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132 STAC_922X_MODELS
133};
134
135enum {
e28d8322 136 STAC_D965_REF_NO_JD, /* no jack-detection */
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TI
137 STAC_D965_REF,
138 STAC_D965_3ST,
139 STAC_D965_5ST,
4ff076e5 140 STAC_DELL_3ST,
8e9068b1 141 STAC_DELL_BIOS,
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TI
142 STAC_927X_MODELS
143};
403d1944 144
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145struct sigmatel_event {
146 hda_nid_t nid;
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147 unsigned char type;
148 unsigned char tag;
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149 int data;
150};
151
152struct sigmatel_jack {
153 hda_nid_t nid;
154 int type;
155 struct snd_jack *jack;
156};
157
2f2f4251 158struct sigmatel_spec {
c8b6bf9b 159 struct snd_kcontrol_new *mixers[4];
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160 unsigned int num_mixers;
161
403d1944 162 int board_config;
c0cea0d0 163 unsigned int eapd_switch: 1;
c7d4b2fa 164 unsigned int surr_switch: 1;
3cc08dc6 165 unsigned int alt_switch: 1;
82bc955f 166 unsigned int hp_detect: 1;
00ef50c2 167 unsigned int spdif_mute: 1;
c7d4b2fa 168
4fe5195c 169 /* gpio lines */
0fc9dec4 170 unsigned int eapd_mask;
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MR
171 unsigned int gpio_mask;
172 unsigned int gpio_dir;
173 unsigned int gpio_data;
174 unsigned int gpio_mute;
175
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176 /* stream */
177 unsigned int stream_delay;
178
4fe5195c 179 /* analog loopback */
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180 unsigned char aloopback_mask;
181 unsigned char aloopback_shift;
8259980e 182
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183 /* power management */
184 unsigned int num_pwrs;
d0513fc6 185 unsigned int *pwr_mapping;
a64135a2 186 hda_nid_t *pwr_nids;
b76c850f 187 hda_nid_t *dac_list;
a64135a2 188
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189 /* jack detection */
190 struct snd_array jacks;
191
192 /* events */
193 struct snd_array events;
194
2f2f4251 195 /* playback */
b22b4821 196 struct hda_input_mux *mono_mux;
89385035 197 struct hda_input_mux *amp_mux;
b22b4821 198 unsigned int cur_mmux;
2f2f4251 199 struct hda_multi_out multiout;
3cc08dc6 200 hda_nid_t dac_nids[5];
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TI
201 hda_nid_t hp_dacs[5];
202 hda_nid_t speaker_dacs[5];
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203
204 /* capture */
205 hda_nid_t *adc_nids;
2f2f4251 206 unsigned int num_adcs;
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207 hda_nid_t *mux_nids;
208 unsigned int num_muxes;
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209 hda_nid_t *dmic_nids;
210 unsigned int num_dmics;
e1f0d669 211 hda_nid_t *dmux_nids;
1697055e 212 unsigned int num_dmuxes;
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MR
213 hda_nid_t *smux_nids;
214 unsigned int num_smuxes;
65973632 215 const char **spdif_labels;
d9737751 216
dabbed6f 217 hda_nid_t dig_in_nid;
b22b4821 218 hda_nid_t mono_nid;
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219 hda_nid_t anabeep_nid;
220 hda_nid_t digbeep_nid;
2f2f4251 221
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222 /* pin widgets */
223 hda_nid_t *pin_nids;
224 unsigned int num_pins;
2f2f4251 225 unsigned int *pin_configs;
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226
227 /* codec specific stuff */
228 struct hda_verb *init;
c8b6bf9b 229 struct snd_kcontrol_new *mixer;
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230
231 /* capture source */
8b65727b 232 struct hda_input_mux *dinput_mux;
e1f0d669 233 unsigned int cur_dmux[2];
c7d4b2fa 234 struct hda_input_mux *input_mux;
3cc08dc6 235 unsigned int cur_mux[3];
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MR
236 struct hda_input_mux *sinput_mux;
237 unsigned int cur_smux[2];
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MR
238 unsigned int cur_amux;
239 hda_nid_t *amp_nids;
240 unsigned int num_amps;
8daaaa97 241 unsigned int powerdown_adcs;
2f2f4251 242
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MP
243 /* i/o switches */
244 unsigned int io_switch[2];
0fb87bb4 245 unsigned int clfe_swap;
c21ca4a8
TI
246 hda_nid_t line_switch; /* shared line-in for input and output */
247 hda_nid_t mic_switch; /* shared mic-in for input and output */
248 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 249 unsigned int aloopback;
2f2f4251 250
c7d4b2fa
M
251 struct hda_pcm pcm_rec[2]; /* PCM information */
252
253 /* dynamic controls and input_mux */
254 struct auto_pin_cfg autocfg;
603c4019 255 struct snd_array kctls;
8b65727b 256 struct hda_input_mux private_dimux;
c7d4b2fa 257 struct hda_input_mux private_imux;
d9737751 258 struct hda_input_mux private_smux;
89385035 259 struct hda_input_mux private_amp_mux;
b22b4821 260 struct hda_input_mux private_mono_mux;
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261};
262
263static hda_nid_t stac9200_adc_nids[1] = {
264 0x03,
265};
266
267static hda_nid_t stac9200_mux_nids[1] = {
268 0x0c,
269};
270
271static hda_nid_t stac9200_dac_nids[1] = {
272 0x02,
273};
274
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MR
275static hda_nid_t stac92hd73xx_pwr_nids[8] = {
276 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
277 0x0f, 0x10, 0x11
278};
279
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MR
280static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
281 0x26, 0,
282};
283
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284static hda_nid_t stac92hd73xx_adc_nids[2] = {
285 0x1a, 0x1b
286};
287
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MR
288#define DELL_M6_AMP 2
289static hda_nid_t stac92hd73xx_amp_nids[3] = {
290 0x0b, 0x0c, 0x0e
89385035
MR
291};
292
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293#define STAC92HD73XX_NUM_DMICS 2
294static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
295 0x13, 0x14, 0
296};
297
298#define STAC92HD73_DAC_COUNT 5
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MR
299
300static hda_nid_t stac92hd73xx_mux_nids[4] = {
301 0x28, 0x29, 0x2a, 0x2b,
302};
303
304static hda_nid_t stac92hd73xx_dmux_nids[2] = {
305 0x20, 0x21,
306};
307
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MR
308static hda_nid_t stac92hd73xx_smux_nids[2] = {
309 0x22, 0x23,
310};
311
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312#define STAC92HD83XXX_NUM_DMICS 2
313static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
314 0x11, 0x12, 0
315};
316
d0513fc6 317#define STAC92HD83_DAC_COUNT 3
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MR
318
319static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
320 0x17, 0x18,
321};
322
323static hda_nid_t stac92hd83xxx_adc_nids[2] = {
324 0x15, 0x16,
325};
326
327static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
328 0xa, 0xb, 0xd, 0xe,
329};
330
0ffa9807
MR
331static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
332 0x1e, 0,
333};
334
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MR
335static unsigned int stac92hd83xxx_pwr_mapping[4] = {
336 0x03, 0x0c, 0x10, 0x40,
337};
338
c15c5060
MR
339static unsigned int stac92hd83xxx_amp_nids[1] = {
340 0xc,
341};
342
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MR
343static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
344 0x0a, 0x0d, 0x0f
345};
346
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347static hda_nid_t stac92hd71bxx_adc_nids[2] = {
348 0x12, 0x13,
349};
350
351static hda_nid_t stac92hd71bxx_mux_nids[2] = {
352 0x1a, 0x1b
353};
354
4b33c767
MR
355static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
356 0x1c, 0x1d,
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357};
358
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359static hda_nid_t stac92hd71bxx_smux_nids[2] = {
360 0x24, 0x25,
361};
362
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363#define STAC92HD71BXX_NUM_DMICS 2
364static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
365 0x18, 0x19, 0
366};
367
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368static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
369 0x22, 0
370};
371
8e21c34c
TD
372static hda_nid_t stac925x_adc_nids[1] = {
373 0x03,
374};
375
376static hda_nid_t stac925x_mux_nids[1] = {
377 0x0f,
378};
379
380static hda_nid_t stac925x_dac_nids[1] = {
381 0x02,
382};
383
f6e9852a
TI
384#define STAC925X_NUM_DMICS 1
385static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
386 0x15, 0
2c11f955
TD
387};
388
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TI
389static hda_nid_t stac925x_dmux_nids[1] = {
390 0x14,
391};
392
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393static hda_nid_t stac922x_adc_nids[2] = {
394 0x06, 0x07,
395};
396
397static hda_nid_t stac922x_mux_nids[2] = {
398 0x12, 0x13,
399};
400
3cc08dc6
MP
401static hda_nid_t stac927x_adc_nids[3] = {
402 0x07, 0x08, 0x09
403};
404
405static hda_nid_t stac927x_mux_nids[3] = {
406 0x15, 0x16, 0x17
407};
408
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409static hda_nid_t stac927x_smux_nids[1] = {
410 0x21,
411};
412
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MR
413static hda_nid_t stac927x_dac_nids[6] = {
414 0x02, 0x03, 0x04, 0x05, 0x06, 0
415};
416
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417static hda_nid_t stac927x_dmux_nids[1] = {
418 0x1b,
419};
420
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421#define STAC927X_NUM_DMICS 2
422static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
423 0x13, 0x14, 0
424};
425
65973632
MR
426static const char *stac927x_spdif_labels[5] = {
427 "Digital Playback", "ADAT", "Analog Mux 1",
428 "Analog Mux 2", "Analog Mux 3"
429};
430
f3302a59
MP
431static hda_nid_t stac9205_adc_nids[2] = {
432 0x12, 0x13
433};
434
435static hda_nid_t stac9205_mux_nids[2] = {
436 0x19, 0x1a
437};
438
e1f0d669 439static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 440 0x1d,
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MR
441};
442
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443static hda_nid_t stac9205_smux_nids[1] = {
444 0x21,
445};
446
f6e9852a
TI
447#define STAC9205_NUM_DMICS 2
448static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
449 0x17, 0x18, 0
8b65727b
MP
450};
451
c7d4b2fa 452static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD
453 0x08, 0x09, 0x0d, 0x0e,
454 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M
455};
456
8e21c34c
TD
457static hda_nid_t stac925x_pin_nids[8] = {
458 0x07, 0x08, 0x0a, 0x0b,
459 0x0c, 0x0d, 0x10, 0x11,
460};
461
2f2f4251
M
462static hda_nid_t stac922x_pin_nids[10] = {
463 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
464 0x0f, 0x10, 0x11, 0x15, 0x1b,
465};
466
a7662640 467static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR
468 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
469 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 470 0x14, 0x22, 0x23
e1f0d669
MR
471};
472
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MR
473static hda_nid_t stac92hd83xxx_pin_nids[14] = {
474 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
475 0x0f, 0x10, 0x11, 0x12, 0x13,
476 0x1d, 0x1e, 0x1f, 0x20
477};
0ffa9807 478static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR
479 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
480 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 481 0x1f,
e035b841
MR
482};
483
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MP
484static hda_nid_t stac927x_pin_nids[14] = {
485 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
486 0x0f, 0x10, 0x11, 0x12, 0x13,
487 0x14, 0x21, 0x22, 0x23,
488};
489
f3302a59
MP
490static hda_nid_t stac9205_pin_nids[12] = {
491 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
492 0x0f, 0x14, 0x16, 0x17, 0x18,
493 0x21, 0x22,
f3302a59
MP
494};
495
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MR
496#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
497
498static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
499 struct snd_ctl_elem_value *ucontrol)
500{
501 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
502 struct sigmatel_spec *spec = codec->spec;
503 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
504
505 kcontrol->private_value ^= get_amp_nid(kcontrol);
506 kcontrol->private_value |= nid;
507
508 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
509}
510
511static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
512 struct snd_ctl_elem_value *ucontrol)
513{
514 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
515 struct sigmatel_spec *spec = codec->spec;
516 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
517
518 kcontrol->private_value ^= get_amp_nid(kcontrol);
519 kcontrol->private_value |= nid;
520
521 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
522}
523
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MP
524static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
525 struct snd_ctl_elem_info *uinfo)
526{
527 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
528 struct sigmatel_spec *spec = codec->spec;
529 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
530}
531
532static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
533 struct snd_ctl_elem_value *ucontrol)
534{
535 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
536 struct sigmatel_spec *spec = codec->spec;
e1f0d669 537 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 538
e1f0d669 539 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
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MP
540 return 0;
541}
542
543static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
544 struct snd_ctl_elem_value *ucontrol)
545{
546 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
547 struct sigmatel_spec *spec = codec->spec;
e1f0d669 548 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP
549
550 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 551 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP
552}
553
d9737751
MR
554static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
555 struct snd_ctl_elem_info *uinfo)
556{
557 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
558 struct sigmatel_spec *spec = codec->spec;
559 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
560}
561
562static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
563 struct snd_ctl_elem_value *ucontrol)
564{
565 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
566 struct sigmatel_spec *spec = codec->spec;
567 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
568
569 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
570 return 0;
571}
572
573static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
574 struct snd_ctl_elem_value *ucontrol)
575{
576 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
577 struct sigmatel_spec *spec = codec->spec;
00ef50c2 578 struct hda_input_mux *smux = &spec->private_smux;
d9737751 579 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR
580 int err, val;
581 hda_nid_t nid;
d9737751 582
00ef50c2 583 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 584 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR
585 if (err < 0)
586 return err;
587
588 if (spec->spdif_mute) {
589 if (smux_idx == 0)
590 nid = spec->multiout.dig_out_nid;
591 else
592 nid = codec->slave_dig_outs[smux_idx - 1];
593 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 594 val = HDA_AMP_MUTE;
00ef50c2 595 else
c9b46f91 596 val = 0;
00ef50c2 597 /* un/mute SPDIF out */
c9b46f91
TI
598 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
599 HDA_AMP_MUTE, val);
00ef50c2
MR
600 }
601 return 0;
d9737751
MR
602}
603
c8b6bf9b 604static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M
605{
606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
607 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 608 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M
609}
610
c8b6bf9b 611static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
612{
613 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
614 struct sigmatel_spec *spec = codec->spec;
615 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
616
617 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
618 return 0;
619}
620
c8b6bf9b 621static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
622{
623 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
624 struct sigmatel_spec *spec = codec->spec;
625 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
626
c7d4b2fa 627 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M
628 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
629}
630
b22b4821
MR
631static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
632 struct snd_ctl_elem_info *uinfo)
633{
634 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
635 struct sigmatel_spec *spec = codec->spec;
636 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
637}
638
639static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
640 struct snd_ctl_elem_value *ucontrol)
641{
642 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
643 struct sigmatel_spec *spec = codec->spec;
644
645 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
646 return 0;
647}
648
649static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
650 struct snd_ctl_elem_value *ucontrol)
651{
652 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
653 struct sigmatel_spec *spec = codec->spec;
654
655 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
656 spec->mono_nid, &spec->cur_mmux);
657}
658
89385035
MR
659static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
660 struct snd_ctl_elem_info *uinfo)
661{
662 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
663 struct sigmatel_spec *spec = codec->spec;
664 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
665}
666
667static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
668 struct snd_ctl_elem_value *ucontrol)
669{
670 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
671 struct sigmatel_spec *spec = codec->spec;
672
673 ucontrol->value.enumerated.item[0] = spec->cur_amux;
674 return 0;
675}
676
677static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
678 struct snd_ctl_elem_value *ucontrol)
679{
680 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
681 struct sigmatel_spec *spec = codec->spec;
682 struct snd_kcontrol *ctl =
683 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
684 if (!ctl)
685 return -EINVAL;
686
687 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
688 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
689
690 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
691 0, &spec->cur_amux);
692}
693
5f10c4a9
ML
694#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
695
696static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
697 struct snd_ctl_elem_value *ucontrol)
698{
699 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 700 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML
701 struct sigmatel_spec *spec = codec->spec;
702
e1f0d669
MR
703 ucontrol->value.integer.value[0] = !!(spec->aloopback &
704 (spec->aloopback_mask << idx));
5f10c4a9
ML
705 return 0;
706}
707
708static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
709 struct snd_ctl_elem_value *ucontrol)
710{
711 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
712 struct sigmatel_spec *spec = codec->spec;
e1f0d669 713 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 714 unsigned int dac_mode;
e1f0d669 715 unsigned int val, idx_val;
5f10c4a9 716
e1f0d669
MR
717 idx_val = spec->aloopback_mask << idx;
718 if (ucontrol->value.integer.value[0])
719 val = spec->aloopback | idx_val;
720 else
721 val = spec->aloopback & ~idx_val;
68ea7b2f 722 if (spec->aloopback == val)
5f10c4a9
ML
723 return 0;
724
68ea7b2f 725 spec->aloopback = val;
5f10c4a9 726
e1f0d669
MR
727 /* Only return the bits defined by the shift value of the
728 * first two bytes of the mask
729 */
5f10c4a9 730 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR
731 kcontrol->private_value & 0xFFFF, 0x0);
732 dac_mode >>= spec->aloopback_shift;
5f10c4a9 733
e1f0d669 734 if (spec->aloopback & idx_val) {
5f10c4a9 735 snd_hda_power_up(codec);
e1f0d669 736 dac_mode |= idx_val;
5f10c4a9
ML
737 } else {
738 snd_hda_power_down(codec);
e1f0d669 739 dac_mode &= ~idx_val;
5f10c4a9
ML
740 }
741
742 snd_hda_codec_write_cache(codec, codec->afg, 0,
743 kcontrol->private_value >> 16, dac_mode);
744
745 return 1;
746}
747
c7d4b2fa 748static struct hda_verb stac9200_core_init[] = {
2f2f4251 749 /* set dac0mux for dac converter */
c7d4b2fa 750 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M
751 {}
752};
753
1194b5b7
TI
754static struct hda_verb stac9200_eapd_init[] = {
755 /* set dac0mux for dac converter */
756 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
757 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
758 {}
759};
760
e1f0d669
MR
761static struct hda_verb stac92hd73xx_6ch_core_init[] = {
762 /* set master volume and direct control */
763 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
764 /* setup adcs to point to mixer */
765 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
766 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
767 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
768 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
769 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
770 /* setup import muxs */
771 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
772 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
773 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
774 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
775 {}
776};
777
d654a660
MR
778static struct hda_verb dell_eq_core_init[] = {
779 /* set master volume to max value without distortion
780 * and direct control */
781 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR
782 /* setup adcs to point to mixer */
783 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
784 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
785 /* setup import muxs */
786 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
787 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
788 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
789 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
790 {}
791};
792
52fe0f9d 793static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 794 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR
795 /* setup adcs to point to mixer */
796 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
797 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
798 /* setup import muxs */
799 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
800 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
801 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
802 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
803 {}
804};
805
e1f0d669
MR
806static struct hda_verb stac92hd73xx_8ch_core_init[] = {
807 /* set master volume and direct control */
808 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
809 /* setup adcs to point to mixer */
810 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
811 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
812 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
813 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
814 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
815 /* setup import muxs */
816 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
817 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
818 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
819 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
820 {}
821};
822
823static struct hda_verb stac92hd73xx_10ch_core_init[] = {
824 /* set master volume and direct control */
825 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
826 /* dac3 is connected to import3 mux */
827 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR
828 /* setup adcs to point to mixer */
829 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
830 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
831 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
832 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
833 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
834 /* setup import muxs */
835 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
836 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
837 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
838 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
839 {}
840};
841
d0513fc6
MR
842static struct hda_verb stac92hd83xxx_core_init[] = {
843 /* start of config #1 */
844 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
845
846 /* start of config #2 */
847 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
848 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
849 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
850
851 /* power state controls amps */
852 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 853 {}
d0513fc6
MR
854};
855
e035b841 856static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR
857 /* set master volume and direct control */
858 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
541eee87
MR
859 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
860 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
861 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
862 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
574f3c4f 863 {}
541eee87
MR
864};
865
4b33c767 866#define HD_DISABLE_PORTF 2
541eee87 867static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR
868 /* start of config #1 */
869
870 /* connect port 0f to audio mixer */
871 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR
872 /* unmute right and left channels for node 0x0f */
873 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
874 /* start of config #2 */
875
e035b841
MR
876 /* set master volume and direct control */
877 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
aafc4412 878 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR
879 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
880 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
881 {}
882};
883
8e21c34c
TD
884static struct hda_verb stac925x_core_init[] = {
885 /* set dac0mux for dac converter */
886 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
887 {}
888};
889
c7d4b2fa 890static struct hda_verb stac922x_core_init[] = {
2f2f4251 891 /* set master volume and direct control */
c7d4b2fa 892 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M
893 {}
894};
895
93ed1503 896static struct hda_verb d965_core_init[] = {
19039bd0 897 /* set master volume and direct control */
93ed1503 898 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI
899 /* unmute node 0x1b */
900 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
901 /* select node 0x03 as DAC */
902 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
903 {}
904};
905
3cc08dc6
MP
906static struct hda_verb stac927x_core_init[] = {
907 /* set master volume and direct control */
908 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR
909 /* enable analog pc beep path */
910 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP
911 {}
912};
913
f3302a59
MP
914static struct hda_verb stac9205_core_init[] = {
915 /* set master volume and direct control */
916 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR
917 /* enable analog pc beep path */
918 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP
919 {}
920};
921
b22b4821
MR
922#define STAC_MONO_MUX \
923 { \
924 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
925 .name = "Mono Mux", \
926 .count = 1, \
927 .info = stac92xx_mono_mux_enum_info, \
928 .get = stac92xx_mono_mux_enum_get, \
929 .put = stac92xx_mono_mux_enum_put, \
930 }
931
89385035
MR
932#define STAC_AMP_MUX \
933 { \
934 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
935 .name = "Amp Selector Capture Switch", \
936 .count = 1, \
937 .info = stac92xx_amp_mux_enum_info, \
938 .get = stac92xx_amp_mux_enum_get, \
939 .put = stac92xx_amp_mux_enum_put, \
940 }
941
942#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
943 { \
944 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
945 .name = xname, \
946 .index = 0, \
947 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
948 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
949 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
950 .info = stac92xx_amp_volume_info, \
951 .get = stac92xx_amp_volume_get, \
952 .put = stac92xx_amp_volume_put, \
953 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
954 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
955 }
956
9e05b7a3 957#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML
958 { \
959 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
960 .name = "Input Source", \
9e05b7a3 961 .count = cnt, \
ca7c5a8b
ML
962 .info = stac92xx_mux_enum_info, \
963 .get = stac92xx_mux_enum_get, \
964 .put = stac92xx_mux_enum_put, \
965 }
966
e1f0d669 967#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML
968 { \
969 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
970 .name = "Analog Loopback", \
e1f0d669 971 .count = cnt, \
5f10c4a9
ML
972 .info = stac92xx_aloopback_info, \
973 .get = stac92xx_aloopback_get, \
974 .put = stac92xx_aloopback_put, \
975 .private_value = verb_read | (verb_write << 16), \
976 }
977
c8b6bf9b 978static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M
979 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
980 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 981 STAC_INPUT_SOURCE(1),
2f2f4251
M
982 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
983 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M
984 { } /* end */
985};
986
2a9c7816 987#define DELL_M6_MIXER 6
e1f0d669 988static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 989 /* start of config #1 */
e1f0d669
MR
990 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
991 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
992
e1f0d669
MR
993 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
994 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
995
2a9c7816
MR
996 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
997 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
998
999 /* start of config #2 */
1000 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1001 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1002
e1f0d669
MR
1003 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1004 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1005
2a9c7816
MR
1006 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1007
1008 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1009 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1010
1011 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1012 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1013
e1f0d669
MR
1014 { } /* end */
1015};
1016
1017static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR
1018 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1019
e1f0d669
MR
1020 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1021 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1022
1023 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1024 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1025
1026 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1027 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1028
1029 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1030 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1031
1032 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1033 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1034
1035 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1036 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1037
1038 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1039 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1040 { } /* end */
1041};
1042
1043static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR
1044 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1045
e1f0d669
MR
1046 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1047 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1048
1049 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1050 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1051
1052 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1053 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1054
1055 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1056 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1057
1058 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1059 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1060
1061 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1062 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1063
1064 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1065 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1066 { } /* end */
1067};
1068
d0513fc6
MR
1069
1070static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1071 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1072 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1073
1074 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1075 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1076
74b7ff48
MR
1077 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT),
1078 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT),
d0513fc6 1079
74b7ff48
MR
1080 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT),
1081 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT),
d0513fc6 1082
74b7ff48
MR
1083 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT),
1084 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT),
d0513fc6 1085
74b7ff48
MR
1086 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT),
1087 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT),
d0513fc6
MR
1088
1089 /*
74b7ff48
MR
1090 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT),
1091 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT),
d0513fc6
MR
1092 */
1093 { } /* end */
1094};
1095
541eee87 1096static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1097 STAC_INPUT_SOURCE(2),
4b33c767 1098 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1099
9b35947f
MR
1100 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1101 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR
1102
1103 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1104 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR
1105 /* analog pc-beep replaced with digital beep support */
1106 /*
f7c5dda2
MR
1107 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1108 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1109 */
f7c5dda2 1110
687cb98e
MR
1111 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1112 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1113
687cb98e
MR
1114 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1115 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR
1116
1117 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1118 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1119
1120 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1121 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR
1122 { } /* end */
1123};
1124
541eee87 1125static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR
1126 STAC_INPUT_SOURCE(2),
1127 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1128
541eee87
MR
1129 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1130 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR
1131
1132 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1133 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR
1134 { } /* end */
1135};
1136
8e21c34c 1137static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1138 STAC_INPUT_SOURCE(1),
8e21c34c 1139 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1140 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD
1141 { } /* end */
1142};
1143
9e05b7a3 1144static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1145 STAC_INPUT_SOURCE(2),
e1f0d669 1146 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML
1147
1148 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1149 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1150
1151 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1152 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M
1153 { } /* end */
1154};
1155
19039bd0 1156/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML
1157static struct snd_kcontrol_new stac922x_mixer[] = {
1158 STAC_INPUT_SOURCE(2),
9e05b7a3
ML
1159 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1160 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML
1161
1162 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1163 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI
1164 { } /* end */
1165};
1166
9e05b7a3 1167
d1d985f0 1168static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1169 STAC_INPUT_SOURCE(3),
e1f0d669 1170 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1171
9e05b7a3
ML
1172 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1173 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1174
1175 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1176 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1177
1178 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1179 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP
1180 { } /* end */
1181};
1182
1697055e
TI
1183static struct snd_kcontrol_new stac_dmux_mixer = {
1184 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1185 .name = "Digital Input Source",
1186 /* count set later */
1187 .info = stac92xx_dmux_enum_info,
1188 .get = stac92xx_dmux_enum_get,
1189 .put = stac92xx_dmux_enum_put,
1190};
1191
d9737751
MR
1192static struct snd_kcontrol_new stac_smux_mixer = {
1193 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1194 .name = "IEC958 Playback Source",
d9737751
MR
1195 /* count set later */
1196 .info = stac92xx_smux_enum_info,
1197 .get = stac92xx_smux_enum_get,
1198 .put = stac92xx_smux_enum_put,
1199};
1200
2134ea4f
TI
1201static const char *slave_vols[] = {
1202 "Front Playback Volume",
1203 "Surround Playback Volume",
1204 "Center Playback Volume",
1205 "LFE Playback Volume",
1206 "Side Playback Volume",
1207 "Headphone Playback Volume",
1208 "Headphone Playback Volume",
1209 "Speaker Playback Volume",
1210 "External Speaker Playback Volume",
1211 "Speaker2 Playback Volume",
1212 NULL
1213};
1214
1215static const char *slave_sws[] = {
1216 "Front Playback Switch",
1217 "Surround Playback Switch",
1218 "Center Playback Switch",
1219 "LFE Playback Switch",
1220 "Side Playback Switch",
1221 "Headphone Playback Switch",
1222 "Headphone Playback Switch",
1223 "Speaker Playback Switch",
1224 "External Speaker Playback Switch",
1225 "Speaker2 Playback Switch",
edb54a55 1226 "IEC958 Playback Switch",
2134ea4f
TI
1227 NULL
1228};
1229
603c4019 1230static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1231static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1232
2f2f4251
M
1233static int stac92xx_build_controls(struct hda_codec *codec)
1234{
1235 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI
1236 struct auto_pin_cfg *cfg = &spec->autocfg;
1237 hda_nid_t nid;
2f2f4251 1238 int err;
c7d4b2fa 1239 int i;
2f2f4251
M
1240
1241 err = snd_hda_add_new_ctls(codec, spec->mixer);
1242 if (err < 0)
1243 return err;
c7d4b2fa
M
1244
1245 for (i = 0; i < spec->num_mixers; i++) {
1246 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1247 if (err < 0)
1248 return err;
1249 }
1697055e
TI
1250 if (spec->num_dmuxes > 0) {
1251 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1252 err = snd_hda_ctl_add(codec,
1697055e
TI
1253 snd_ctl_new1(&stac_dmux_mixer, codec));
1254 if (err < 0)
1255 return err;
1256 }
d9737751 1257 if (spec->num_smuxes > 0) {
00ef50c2
MR
1258 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1259 struct hda_input_mux *smux = &spec->private_smux;
1260 /* check for mute support on SPDIF out */
1261 if (wcaps & AC_WCAP_OUT_AMP) {
1262 smux->items[smux->num_items].label = "Off";
1263 smux->items[smux->num_items].index = 0;
1264 smux->num_items++;
1265 spec->spdif_mute = 1;
1266 }
d9737751 1267 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1268 err = snd_hda_ctl_add(codec,
d9737751
MR
1269 snd_ctl_new1(&stac_smux_mixer, codec));
1270 if (err < 0)
1271 return err;
1272 }
c7d4b2fa 1273
dabbed6f
M
1274 if (spec->multiout.dig_out_nid) {
1275 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1276 if (err < 0)
1277 return err;
9a08160b
TI
1278 err = snd_hda_create_spdif_share_sw(codec,
1279 &spec->multiout);
1280 if (err < 0)
1281 return err;
1282 spec->multiout.share_spdif = 1;
dabbed6f 1283 }
da74ae3e 1284 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M
1285 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1286 if (err < 0)
1287 return err;
1288 }
2134ea4f
TI
1289
1290 /* if we have no master control, let's create it */
1291 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1292 unsigned int vmaster_tlv[4];
2134ea4f 1293 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1294 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1295 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1296 vmaster_tlv, slave_vols);
2134ea4f
TI
1297 if (err < 0)
1298 return err;
1299 }
1300 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1301 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1302 NULL, slave_sws);
1303 if (err < 0)
1304 return err;
1305 }
1306
603c4019 1307 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI
1308
1309 /* create jack input elements */
1310 if (spec->hp_detect) {
1311 for (i = 0; i < cfg->hp_outs; i++) {
1312 int type = SND_JACK_HEADPHONE;
1313 nid = cfg->hp_pins[i];
1314 /* jack detection */
1315 if (cfg->hp_outs == i)
1316 type |= SND_JACK_LINEOUT;
1317 err = stac92xx_add_jack(codec, nid, type);
1318 if (err < 0)
1319 return err;
1320 }
1321 }
1322 for (i = 0; i < cfg->line_outs; i++) {
1323 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1324 SND_JACK_LINEOUT);
1325 if (err < 0)
1326 return err;
1327 }
1328 for (i = 0; i < AUTO_PIN_LAST; i++) {
1329 nid = cfg->input_pins[i];
1330 if (nid) {
1331 err = stac92xx_add_jack(codec, nid,
1332 SND_JACK_MICROPHONE);
1333 if (err < 0)
1334 return err;
1335 }
1336 }
1337
dabbed6f 1338 return 0;
2f2f4251
M
1339}
1340
403d1944 1341static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1342 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M
1343 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1344};
1345
58eec423
MCC
1346static unsigned int gateway9200_m4_pin_configs[8] = {
1347 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1348 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1349};
1350static unsigned int gateway9200_m4_2_pin_configs[8] = {
1351 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1352 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1353};
1354
1355/*
dfe495d0
TI
1356 STAC 9200 pin configs for
1357 102801A8
1358 102801DE
1359 102801E8
1360*/
1361static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI
1362 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1363 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI
1364};
1365
1366/*
1367 STAC 9200 pin configs for
1368 102801C0
1369 102801C1
1370*/
1371static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI
1372 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1373 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1374};
1375
1376/*
1377 STAC 9200 pin configs for
1378 102801C4 (Dell Dimension E310)
1379 102801C5
1380 102801C7
1381 102801D9
1382 102801DA
1383 102801E3
1384*/
1385static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI
1386 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1387 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1388};
1389
1390
1391/*
1392 STAC 9200-32 pin configs for
1393 102801B5 (Dell Inspiron 630m)
1394 102801D8 (Dell Inspiron 640m)
1395*/
1396static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI
1397 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1398 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1399};
1400
1401/*
1402 STAC 9200-32 pin configs for
1403 102801C2 (Dell Latitude D620)
1404 102801C8
1405 102801CC (Dell Latitude D820)
1406 102801D4
1407 102801D6
1408*/
1409static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI
1410 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1411 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI
1412};
1413
1414/*
1415 STAC 9200-32 pin configs for
1416 102801CE (Dell XPS M1710)
1417 102801CF (Dell Precision M90)
1418*/
1419static unsigned int dell9200_m23_pin_configs[8] = {
1420 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1421 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1422};
1423
1424/*
1425 STAC 9200-32 pin configs for
1426 102801C9
1427 102801CA
1428 102801CB (Dell Latitude 120L)
1429 102801D3
1430*/
1431static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI
1432 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1433 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1434};
1435
1436/*
1437 STAC 9200-32 pin configs for
1438 102801BD (Dell Inspiron E1505n)
1439 102801EE
1440 102801EF
1441*/
1442static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI
1443 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1444 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1445};
1446
1447/*
1448 STAC 9200-32 pin configs for
1449 102801F5 (Dell Inspiron 1501)
1450 102801F6
1451*/
1452static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI
1453 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1454 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1455};
1456
1457/*
1458 STAC 9200-32
1459 102801CD (Dell Inspiron E1705/9400)
1460*/
1461static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI
1462 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1463 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI
1464};
1465
bf277785
TD
1466static unsigned int oqo9200_pin_configs[8] = {
1467 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1468 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1469};
1470
dfe495d0 1471
f5fcc13c
TI
1472static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1473 [STAC_REF] = ref9200_pin_configs,
bf277785 1474 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI
1475 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1476 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1477 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1478 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1479 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1480 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1481 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1482 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1483 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1484 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC
1485 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1486 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1487 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP
1488};
1489
f5fcc13c
TI
1490static const char *stac9200_models[STAC_9200_MODELS] = {
1491 [STAC_REF] = "ref",
bf277785 1492 [STAC_9200_OQO] = "oqo",
dfe495d0
TI
1493 [STAC_9200_DELL_D21] = "dell-d21",
1494 [STAC_9200_DELL_D22] = "dell-d22",
1495 [STAC_9200_DELL_D23] = "dell-d23",
1496 [STAC_9200_DELL_M21] = "dell-m21",
1497 [STAC_9200_DELL_M22] = "dell-m22",
1498 [STAC_9200_DELL_M23] = "dell-m23",
1499 [STAC_9200_DELL_M24] = "dell-m24",
1500 [STAC_9200_DELL_M25] = "dell-m25",
1501 [STAC_9200_DELL_M26] = "dell-m26",
1502 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC
1503 [STAC_9200_M4] = "gateway-m4",
1504 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1505 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI
1506};
1507
1508static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1509 /* SigmaTel reference board */
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1511 "DFI LanParty", STAC_REF),
e7377071 1512 /* Dell laptops have BIOS problem */
dfe495d0
TI
1513 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1514 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI
1516 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1518 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1520 "unknown Dell", STAC_9200_DELL_D22),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1522 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI
1524 "Dell Latitude D620", STAC_9200_DELL_M22),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1526 "unknown Dell", STAC_9200_DELL_D23),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1528 "unknown Dell", STAC_9200_DELL_D23),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1530 "unknown Dell", STAC_9200_DELL_M22),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1532 "unknown Dell", STAC_9200_DELL_M24),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1534 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1536 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1538 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1540 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1542 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI
1544 "Dell Precision M90", STAC_9200_DELL_M23),
1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1546 "unknown Dell", STAC_9200_DELL_M22),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1548 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1550 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI
1552 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1554 "unknown Dell", STAC_9200_DELL_D23),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1556 "unknown Dell", STAC_9200_DELL_D23),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1558 "unknown Dell", STAC_9200_DELL_D21),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1560 "unknown Dell", STAC_9200_DELL_D23),
1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1562 "unknown Dell", STAC_9200_DELL_D21),
1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1564 "unknown Dell", STAC_9200_DELL_M25),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1566 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1567 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI
1568 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1569 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1570 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1571 /* Panasonic */
117f257d 1572 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1573 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC
1574 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1575 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1576 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD
1577 /* OQO Mobile */
1578 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP
1579 {} /* terminator */
1580};
1581
8e21c34c
TD
1582static unsigned int ref925x_pin_configs[8] = {
1583 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1584 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD
1585};
1586
9cb36c2a
MCC
1587static unsigned int stac925xM1_pin_configs[8] = {
1588 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1589 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD
1590};
1591
9cb36c2a
MCC
1592static unsigned int stac925xM1_2_pin_configs[8] = {
1593 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1594 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1595};
58eec423 1596
9cb36c2a
MCC
1597static unsigned int stac925xM2_pin_configs[8] = {
1598 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1599 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD
1600};
1601
8e21c34c 1602static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC
1603 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1604 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1605};
1606
9cb36c2a
MCC
1607static unsigned int stac925xM3_pin_configs[8] = {
1608 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1609 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1610};
58eec423 1611
9cb36c2a
MCC
1612static unsigned int stac925xM5_pin_configs[8] = {
1613 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1614 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1615};
1616
9cb36c2a
MCC
1617static unsigned int stac925xM6_pin_configs[8] = {
1618 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1619 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD
1620};
1621
1622static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1623 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC
1624 [STAC_M1] = stac925xM1_pin_configs,
1625 [STAC_M1_2] = stac925xM1_2_pin_configs,
1626 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1627 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC
1628 [STAC_M3] = stac925xM3_pin_configs,
1629 [STAC_M5] = stac925xM5_pin_configs,
1630 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD
1631};
1632
1633static const char *stac925x_models[STAC_925x_MODELS] = {
1634 [STAC_REF] = "ref",
9cb36c2a
MCC
1635 [STAC_M1] = "m1",
1636 [STAC_M1_2] = "m1-2",
1637 [STAC_M2] = "m2",
8e21c34c 1638 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC
1639 [STAC_M3] = "m3",
1640 [STAC_M5] = "m5",
1641 [STAC_M6] = "m6",
8e21c34c
TD
1642};
1643
9cb36c2a 1644static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC
1645 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1646 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1647 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1648 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1649 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC
1650 /* Not sure about the brand name for those */
1651 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1652 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1653 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1654 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1655 {} /* terminator */
8e21c34c
TD
1656};
1657
1658static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1659 /* SigmaTel reference board */
1660 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1661 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC
1662
1663 /* Default table for unknown ID */
1664 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1665
8e21c34c
TD
1666 {} /* terminator */
1667};
1668
a7662640 1669static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR
1670 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1671 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1672 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR
1673 0x01452050,
1674};
1675
1676static unsigned int dell_m6_pin_configs[13] = {
1677 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1678 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1679 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1680 0x4f0000f0,
e1f0d669
MR
1681};
1682
1683static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1684 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI
1685 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1686 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1687 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1688 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR
1689};
1690
1691static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1692 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1693 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI
1694 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1695 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1696 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1697 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR
1698};
1699
1700static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1701 /* SigmaTel reference board */
1702 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR
1703 "DFI LanParty", STAC_92HD73XX_REF),
1704 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1705 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1707 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1709 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1711 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1713 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1715 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI
1717 "unknown Dell", STAC_DELL_M6_DMIC),
1718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1719 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1721 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS
1722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1723 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR
1724 {} /* terminator */
1725};
1726
d0513fc6
MR
1727static unsigned int ref92hd83xxx_pin_configs[14] = {
1728 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1729 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1730 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1731 0x01451160, 0x98560170,
1732};
1733
1734static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1735 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1736};
1737
1738static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1739 [STAC_92HD83XXX_REF] = "ref",
1740};
1741
1742static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1743 /* SigmaTel reference board */
1744 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1745 "DFI LanParty", STAC_92HD83XXX_REF),
574f3c4f 1746 {} /* terminator */
d0513fc6
MR
1747};
1748
0ffa9807 1749static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1750 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1751 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1752 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR
1753};
1754
0ffa9807 1755static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1756 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1757 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1758 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1759};
1760
0ffa9807 1761static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR
1762 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1763 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1764 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR
1765};
1766
3a7abfd2
MR
1767static unsigned int dell_m4_3_pin_configs[11] = {
1768 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1769 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1770 0x40f000f0, 0x044413b0, 0x044413b0,
1771};
1772
e035b841
MR
1773static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1774 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR
1775 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1776 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1777 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1778 [STAC_HP_M4] = NULL,
e035b841
MR
1779};
1780
1781static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1782 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR
1783 [STAC_DELL_M4_1] = "dell-m4-1",
1784 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1785 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1786 [STAC_HP_M4] = "hp-m4",
e035b841
MR
1787};
1788
1789static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1790 /* SigmaTel reference board */
1791 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1792 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI
1793 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1794 "HP dv5", STAC_HP_M4),
1795 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1796 "HP dv7", STAC_HP_M4),
69dfaefe
TI
1797 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc,
1798 "HP dv7", STAC_HP_M4),
dafb70ce
GB
1799 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603,
1800 "HP dv5", STAC_HP_M4),
9a9e2359
MR
1801 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1802 "unknown HP", STAC_HP_M4),
a7662640
MR
1803 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1804 "unknown Dell", STAC_DELL_M4_1),
1805 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1806 "unknown Dell", STAC_DELL_M4_1),
1807 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1808 "unknown Dell", STAC_DELL_M4_1),
1809 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1810 "unknown Dell", STAC_DELL_M4_1),
1811 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1812 "unknown Dell", STAC_DELL_M4_1),
1813 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1814 "unknown Dell", STAC_DELL_M4_1),
1815 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1816 "unknown Dell", STAC_DELL_M4_1),
1817 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1818 "unknown Dell", STAC_DELL_M4_2),
1819 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1820 "unknown Dell", STAC_DELL_M4_2),
1821 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1822 "unknown Dell", STAC_DELL_M4_2),
1823 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1824 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR
1825 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1826 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR
1827 {} /* terminator */
1828};
1829
403d1944
MP
1830static unsigned int ref922x_pin_configs[10] = {
1831 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1832 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M
1833 0x40000100, 0x40000100,
1834};
1835
dfe495d0
TI
1836/*
1837 STAC 922X pin configs for
1838 102801A7
1839 102801AB
1840 102801A9
1841 102801D1
1842 102801D2
1843*/
1844static unsigned int dell_922x_d81_pin_configs[10] = {
1845 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1846 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1847 0x01813122, 0x400001f2,
1848};
1849
1850/*
1851 STAC 922X pin configs for
1852 102801AC
1853 102801D0
1854*/
1855static unsigned int dell_922x_d82_pin_configs[10] = {
1856 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1857 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1858 0x01813122, 0x400001f1,
1859};
1860
1861/*
1862 STAC 922X pin configs for
1863 102801BF
1864*/
1865static unsigned int dell_922x_m81_pin_configs[10] = {
1866 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1867 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1868 0x40C003f1, 0x405003f0,
1869};
1870
1871/*
1872 STAC 9221 A1 pin configs for
1873 102801D7 (Dell XPS M1210)
1874*/
1875static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ
1876 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1877 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI
1878 0x508003f3, 0x405003f4,
1879};
1880
403d1944 1881static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1882 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP
1883 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1884 0x02a19120, 0x40000100,
1885};
1886
1887static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP
1888 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1889 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP
1890 0x02a19320, 0x40000100,
1891};
1892
5d5d3bc3
IZ
1893static unsigned int intel_mac_v1_pin_configs[10] = {
1894 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1895 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1896 0x400000fc, 0x400000fb,
1897};
1898
1899static unsigned int intel_mac_v2_pin_configs[10] = {
1900 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1901 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1902 0x400000fc, 0x400000fb,
6f0778d8
NB
1903};
1904
5d5d3bc3
IZ
1905static unsigned int intel_mac_v3_pin_configs[10] = {
1906 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1907 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI
1908 0x400000fc, 0x400000fb,
1909};
1910
5d5d3bc3
IZ
1911static unsigned int intel_mac_v4_pin_configs[10] = {
1912 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1913 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF
1914 0x400000fc, 0x400000fb,
1915};
1916
5d5d3bc3
IZ
1917static unsigned int intel_mac_v5_pin_configs[10] = {
1918 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1919 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1920 0x400000fc, 0x400000fb,
0dae0f83
TI
1921};
1922
8c650087
MCC
1923static unsigned int ecs202_pin_configs[10] = {
1924 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1925 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1926 0x9037012e, 0x40e000f2,
1927};
76c08828 1928
19039bd0 1929static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1930 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI
1931 [STAC_D945GTP3] = d945gtp3_pin_configs,
1932 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ
1933 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1934 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1935 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1936 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1937 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1938 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1939 /* for backward compatibility */
5d5d3bc3
IZ
1940 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1941 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1942 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1943 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1944 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1945 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1946 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI
1947 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1948 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1949 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1950 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP
1951};
1952
f5fcc13c
TI
1953static const char *stac922x_models[STAC_922X_MODELS] = {
1954 [STAC_D945_REF] = "ref",
1955 [STAC_D945GTP5] = "5stack",
1956 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ
1957 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1958 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1959 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1960 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1961 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1962 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1963 /* for backward compatibility */
f5fcc13c 1964 [STAC_MACMINI] = "macmini",
3fc24d85 1965 [STAC_MACBOOK] = "macbook",
6f0778d8
NB
1966 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1967 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1968 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1969 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1970 [STAC_ECS_202] = "ecs202",
dfe495d0
TI
1971 [STAC_922X_DELL_D81] = "dell-d81",
1972 [STAC_922X_DELL_D82] = "dell-d82",
1973 [STAC_922X_DELL_M81] = "dell-m81",
1974 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI
1975};
1976
1977static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1978 /* SigmaTel reference board */
1979 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1980 "DFI LanParty", STAC_D945_REF),
1981 /* Intel 945G based systems */
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1983 "Intel D945G", STAC_D945GTP3),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1985 "Intel D945G", STAC_D945GTP3),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1987 "Intel D945G", STAC_D945GTP3),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1989 "Intel D945G", STAC_D945GTP3),
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1991 "Intel D945G", STAC_D945GTP3),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1993 "Intel D945G", STAC_D945GTP3),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1995 "Intel D945G", STAC_D945GTP3),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1997 "Intel D945G", STAC_D945GTP3),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1999 "Intel D945G", STAC_D945GTP3),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2001 "Intel D945G", STAC_D945GTP3),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2003 "Intel D945G", STAC_D945GTP3),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2005 "Intel D945G", STAC_D945GTP3),
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2007 "Intel D945G", STAC_D945GTP3),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2009 "Intel D945G", STAC_D945GTP3),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2011 "Intel D945G", STAC_D945GTP3),
2012 /* Intel D945G 5-stack systems */
2013 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2014 "Intel D945G", STAC_D945GTP5),
2015 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2016 "Intel D945G", STAC_D945GTP5),
2017 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2018 "Intel D945G", STAC_D945GTP5),
2019 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2020 "Intel D945G", STAC_D945GTP5),
2021 /* Intel 945P based systems */
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2023 "Intel D945P", STAC_D945GTP3),
2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2025 "Intel D945P", STAC_D945GTP3),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2027 "Intel D945P", STAC_D945GTP3),
2028 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2029 "Intel D945P", STAC_D945GTP3),
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2031 "Intel D945P", STAC_D945GTP3),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2033 "Intel D945P", STAC_D945GTP5),
2034 /* other systems */
536319af 2035 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2036 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2037 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI
2038 /* Dell systems */
2039 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2040 "unknown Dell", STAC_922X_DELL_D81),
2041 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2042 "unknown Dell", STAC_922X_DELL_D81),
2043 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2044 "unknown Dell", STAC_922X_DELL_D81),
2045 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2046 "unknown Dell", STAC_922X_DELL_D82),
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2048 "unknown Dell", STAC_922X_DELL_M81),
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2050 "unknown Dell", STAC_922X_DELL_D82),
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2052 "unknown Dell", STAC_922X_DELL_D81),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2054 "unknown Dell", STAC_922X_DELL_D81),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2056 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC
2057 /* ECS/PC Chips boards */
2058 SND_PCI_QUIRK(0x1019, 0x2144,
2059 "ECS/PC chips", STAC_ECS_202),
2060 SND_PCI_QUIRK(0x1019, 0x2608,
2061 "ECS/PC chips", STAC_ECS_202),
2062 SND_PCI_QUIRK(0x1019, 0x2633,
2063 "ECS/PC chips P17G/1333", STAC_ECS_202),
2064 SND_PCI_QUIRK(0x1019, 0x2811,
2065 "ECS/PC chips", STAC_ECS_202),
2066 SND_PCI_QUIRK(0x1019, 0x2812,
2067 "ECS/PC chips", STAC_ECS_202),
2068 SND_PCI_QUIRK(0x1019, 0x2813,
2069 "ECS/PC chips", STAC_ECS_202),
2070 SND_PCI_QUIRK(0x1019, 0x2814,
2071 "ECS/PC chips", STAC_ECS_202),
2072 SND_PCI_QUIRK(0x1019, 0x2815,
2073 "ECS/PC chips", STAC_ECS_202),
2074 SND_PCI_QUIRK(0x1019, 0x2816,
2075 "ECS/PC chips", STAC_ECS_202),
2076 SND_PCI_QUIRK(0x1019, 0x2817,
2077 "ECS/PC chips", STAC_ECS_202),
2078 SND_PCI_QUIRK(0x1019, 0x2818,
2079 "ECS/PC chips", STAC_ECS_202),
2080 SND_PCI_QUIRK(0x1019, 0x2819,
2081 "ECS/PC chips", STAC_ECS_202),
2082 SND_PCI_QUIRK(0x1019, 0x2820,
2083 "ECS/PC chips", STAC_ECS_202),
403d1944
MP
2084 {} /* terminator */
2085};
2086
3cc08dc6 2087static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD
2088 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2089 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2090 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2091 0x01c42190, 0x40000100,
3cc08dc6
MP
2092};
2093
93ed1503 2094static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD
2095 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2096 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2097 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2098 0x40000100, 0x40000100
2099};
2100
93ed1503
TD
2101static unsigned int d965_5st_pin_configs[14] = {
2102 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2103 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2104 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2105 0x40000100, 0x40000100
2106};
2107
4ff076e5
TD
2108static unsigned int dell_3st_pin_configs[14] = {
2109 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2110 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2111 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD
2112 0x40c003fc, 0x40000100
2113};
2114
93ed1503 2115static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2116 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR
2117 [STAC_D965_REF] = ref927x_pin_configs,
2118 [STAC_D965_3ST] = d965_3st_pin_configs,
2119 [STAC_D965_5ST] = d965_5st_pin_configs,
2120 [STAC_DELL_3ST] = dell_3st_pin_configs,
2121 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP
2122};
2123
f5fcc13c 2124static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2125 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR
2126 [STAC_D965_REF] = "ref",
2127 [STAC_D965_3ST] = "3stack",
2128 [STAC_D965_5ST] = "5stack",
2129 [STAC_DELL_3ST] = "dell-3stack",
2130 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI
2131};
2132
2133static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2134 /* SigmaTel reference board */
2135 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2136 "DFI LanParty", STAC_D965_REF),
81d3dbde 2137 /* Intel 946 based systems */
f5fcc13c
TI
2138 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2139 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2140 /* 965 based 3 stack systems */
f5fcc13c
TI
2141 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2142 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2143 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2144 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2145 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2146 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2147 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2148 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2149 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2150 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2151 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2152 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2153 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2154 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2155 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2157 /* Dell 3 stack systems */
8e9068b1 2158 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2159 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD
2160 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2161 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2162 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR
2163 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2164 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2165 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR
2167 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2171 /* 965 based 5 stack systems */
f5fcc13c
TI
2172 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2173 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2174 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2175 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2176 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2177 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2178 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2179 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP
2181 {} /* terminator */
2182};
2183
f3302a59
MP
2184static unsigned int ref9205_pin_configs[12] = {
2185 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2186 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2187 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP
2188};
2189
dfe495d0
TI
2190/*
2191 STAC 9205 pin configs for
2192 102801F1
2193 102801F2
2194 102801FC
2195 102801FD
2196 10280204
2197 1028021F
3fa2ef74 2198 10280228 (Dell Vostro 1500)
dfe495d0
TI
2199*/
2200static unsigned int dell_9205_m42_pin_configs[12] = {
2201 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2202 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2203 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2204};
2205
2206/*
2207 STAC 9205 pin configs for
2208 102801F9
2209 102801FA
2210 102801FE
2211 102801FF (Dell Precision M4300)
2212 10280206
2213 10280200
2214 10280201
2215*/
2216static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD
2217 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2218 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2219 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2220};
2221
dfe495d0 2222static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD
2223 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2224 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2225 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2226};
2227
f5fcc13c 2228static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2229 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI
2230 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2231 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2232 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP
2233};
2234
f5fcc13c
TI
2235static const char *stac9205_models[STAC_9205_MODELS] = {
2236 [STAC_9205_REF] = "ref",
dfe495d0 2237 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD
2238 [STAC_9205_DELL_M43] = "dell-m43",
2239 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI
2240};
2241
2242static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2243 /* SigmaTel reference board */
2244 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2245 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI
2246 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2247 "unknown Dell", STAC_9205_DELL_M42),
2248 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2249 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2250 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2251 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2252 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2253 "Dell Precision", STAC_9205_DELL_M43),
2254 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2255 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI
2256 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2257 "unknown Dell", STAC_9205_DELL_M42),
2258 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2259 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD
2260 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2261 "Dell Precision", STAC_9205_DELL_M43),
2262 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2263 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI
2264 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2265 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI
2266 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2267 "Dell Precision", STAC_9205_DELL_M43),
2268 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2269 "Dell Precision", STAC_9205_DELL_M43),
2270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2271 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2273 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR
2274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2275 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP
2276 {} /* terminator */
2277};
2278
11b44bbd
RF
2279static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2280{
2281 int i;
2282 struct sigmatel_spec *spec = codec->spec;
2283
af9f341a
TI
2284 kfree(spec->pin_configs);
2285 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2286 GFP_KERNEL);
2287 if (!spec->pin_configs)
2288 return -ENOMEM;
11b44bbd
RF
2289
2290 for (i = 0; i < spec->num_pins; i++) {
2291 hda_nid_t nid = spec->pin_nids[i];
2292 unsigned int pin_cfg;
2293
2294 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2295 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2296 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2297 nid, pin_cfg);
af9f341a 2298 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF
2299 }
2300
2301 return 0;
2302}
2303
87d48363
MR
2304static void stac92xx_set_config_reg(struct hda_codec *codec,
2305 hda_nid_t pin_nid, unsigned int pin_config)
2306{
2307 int i;
2308 snd_hda_codec_write(codec, pin_nid, 0,
2309 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2310 pin_config & 0x000000ff);
2311 snd_hda_codec_write(codec, pin_nid, 0,
2312 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2313 (pin_config & 0x0000ff00) >> 8);
2314 snd_hda_codec_write(codec, pin_nid, 0,
2315 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2316 (pin_config & 0x00ff0000) >> 16);
2317 snd_hda_codec_write(codec, pin_nid, 0,
2318 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2319 pin_config >> 24);
2320 i = snd_hda_codec_read(codec, pin_nid, 0,
2321 AC_VERB_GET_CONFIG_DEFAULT,
2322 0x00);
2323 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2324 pin_nid, i);
2325}
2326
2f2f4251
M
2327static void stac92xx_set_config_regs(struct hda_codec *codec)
2328{
2329 int i;
2330 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2331
87d48363
MR
2332 if (!spec->pin_configs)
2333 return;
11b44bbd 2334
87d48363
MR
2335 for (i = 0; i < spec->num_pins; i++)
2336 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2337 spec->pin_configs[i]);
2f2f4251 2338}
2f2f4251 2339
af9f341a
TI
2340static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2341{
2342 struct sigmatel_spec *spec = codec->spec;
2343
2344 if (!pins)
2345 return stac92xx_save_bios_config_regs(codec);
2346
2347 kfree(spec->pin_configs);
2348 spec->pin_configs = kmemdup(pins,
2349 spec->num_pins * sizeof(*pins),
2350 GFP_KERNEL);
2351 if (!spec->pin_configs)
2352 return -ENOMEM;
2353
2354 stac92xx_set_config_regs(codec);
2355 return 0;
2356}
2357
2358static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2359 unsigned int cfg)
2360{
2361 struct sigmatel_spec *spec = codec->spec;
2362 int i;
2363
2364 for (i = 0; i < spec->num_pins; i++) {
2365 if (spec->pin_nids[i] == nid) {
2366 spec->pin_configs[i] = cfg;
2367 stac92xx_set_config_reg(codec, nid, cfg);
2368 break;
2369 }
2370 }
2371}
2372
dabbed6f 2373/*
c7d4b2fa 2374 * Analog playback callbacks
dabbed6f 2375 */
c7d4b2fa
M
2376static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2377 struct hda_codec *codec,
c8b6bf9b 2378 struct snd_pcm_substream *substream)
2f2f4251 2379{
dabbed6f 2380 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR
2381 if (spec->stream_delay)
2382 msleep(spec->stream_delay);
9a08160b
TI
2383 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2384 hinfo);
2f2f4251
M
2385}
2386
2f2f4251
M
2387static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2388 struct hda_codec *codec,
2389 unsigned int stream_tag,
2390 unsigned int format,
c8b6bf9b 2391 struct snd_pcm_substream *substream)
2f2f4251
M
2392{
2393 struct sigmatel_spec *spec = codec->spec;
403d1944 2394 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M
2395}
2396
2397static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2398 struct hda_codec *codec,
c8b6bf9b 2399 struct snd_pcm_substream *substream)
2f2f4251
M
2400{
2401 struct sigmatel_spec *spec = codec->spec;
2402 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2403}
2404
dabbed6f
M
2405/*
2406 * Digital playback callbacks
2407 */
2408static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2409 struct hda_codec *codec,
c8b6bf9b 2410 struct snd_pcm_substream *substream)
dabbed6f
M
2411{
2412 struct sigmatel_spec *spec = codec->spec;
2413 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2414}
2415
2416static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2417 struct hda_codec *codec,
c8b6bf9b 2418 struct snd_pcm_substream *substream)
dabbed6f
M
2419{
2420 struct sigmatel_spec *spec = codec->spec;
2421 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2422}
2423
6b97eb45
TI
2424static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2425 struct hda_codec *codec,
2426 unsigned int stream_tag,
2427 unsigned int format,
2428 struct snd_pcm_substream *substream)
2429{
2430 struct sigmatel_spec *spec = codec->spec;
2431 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2432 stream_tag, format, substream);
2433}
2434
dabbed6f 2435
2f2f4251
M
2436/*
2437 * Analog capture callbacks
2438 */
2439static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2440 struct hda_codec *codec,
2441 unsigned int stream_tag,
2442 unsigned int format,
c8b6bf9b 2443 struct snd_pcm_substream *substream)
2f2f4251
M
2444{
2445 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2446 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2447
8daaaa97
MR
2448 if (spec->powerdown_adcs) {
2449 msleep(40);
8c2f767b 2450 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR
2451 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2452 }
2453 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M
2454 return 0;
2455}
2456
2457static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2458 struct hda_codec *codec,
c8b6bf9b 2459 struct snd_pcm_substream *substream)
2f2f4251
M
2460{
2461 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2462 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2463
8daaaa97
MR
2464 snd_hda_codec_cleanup_stream(codec, nid);
2465 if (spec->powerdown_adcs)
8c2f767b 2466 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2467 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M
2468 return 0;
2469}
2470
dabbed6f
M
2471static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2472 .substreams = 1,
2473 .channels_min = 2,
2474 .channels_max = 2,
2475 /* NID is set in stac92xx_build_pcms */
2476 .ops = {
2477 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI
2478 .close = stac92xx_dig_playback_pcm_close,
2479 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M
2480 },
2481};
2482
2483static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2484 .substreams = 1,
2485 .channels_min = 2,
2486 .channels_max = 2,
2487 /* NID is set in stac92xx_build_pcms */
2488};
2489
2f2f4251
M
2490static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2491 .substreams = 1,
2492 .channels_min = 2,
c7d4b2fa 2493 .channels_max = 8,
2f2f4251
M
2494 .nid = 0x02, /* NID to query formats and rates */
2495 .ops = {
2496 .open = stac92xx_playback_pcm_open,
2497 .prepare = stac92xx_playback_pcm_prepare,
2498 .cleanup = stac92xx_playback_pcm_cleanup
2499 },
2500};
2501
3cc08dc6
MP
2502static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2503 .substreams = 1,
2504 .channels_min = 2,
2505 .channels_max = 2,
2506 .nid = 0x06, /* NID to query formats and rates */
2507 .ops = {
2508 .open = stac92xx_playback_pcm_open,
2509 .prepare = stac92xx_playback_pcm_prepare,
2510 .cleanup = stac92xx_playback_pcm_cleanup
2511 },
2512};
2513
2f2f4251 2514static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M
2515 .channels_min = 2,
2516 .channels_max = 2,
9e05b7a3 2517 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M
2518 .ops = {
2519 .prepare = stac92xx_capture_pcm_prepare,
2520 .cleanup = stac92xx_capture_pcm_cleanup
2521 },
2522};
2523
2524static int stac92xx_build_pcms(struct hda_codec *codec)
2525{
2526 struct sigmatel_spec *spec = codec->spec;
2527 struct hda_pcm *info = spec->pcm_rec;
2528
2529 codec->num_pcms = 1;
2530 codec->pcm_info = info;
2531
c7d4b2fa 2532 info->name = "STAC92xx Analog";
2f2f4251 2533 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2534 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2535 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2536 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP
2537
2538 if (spec->alt_switch) {
2539 codec->num_pcms++;
2540 info++;
2541 info->name = "STAC92xx Analog Alt";
2542 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2543 }
2f2f4251 2544
dabbed6f
M
2545 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2546 codec->num_pcms++;
2547 info++;
2548 info->name = "STAC92xx Digital";
7ba72ba1 2549 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M
2550 if (spec->multiout.dig_out_nid) {
2551 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2552 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2553 }
2554 if (spec->dig_in_nid) {
2555 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2556 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2557 }
2558 }
2559
2f2f4251
M
2560 return 0;
2561}
2562
c960a03b
TI
2563static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2564{
2565 unsigned int pincap = snd_hda_param_read(codec, nid,
2566 AC_PAR_PIN_CAP);
2567 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2568 if (pincap & AC_PINCAP_VREF_100)
2569 return AC_PINCTL_VREF_100;
2570 if (pincap & AC_PINCAP_VREF_80)
2571 return AC_PINCTL_VREF_80;
2572 if (pincap & AC_PINCAP_VREF_50)
2573 return AC_PINCTL_VREF_50;
2574 if (pincap & AC_PINCAP_VREF_GRD)
2575 return AC_PINCTL_VREF_GRD;
2576 return 0;
2577}
2578
403d1944
MP
2579static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2580
2581{
82beb8fd
TI
2582 snd_hda_codec_write_cache(codec, nid, 0,
2583 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP
2584}
2585
7c2ba97b
MR
2586#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2587
2588static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2589 struct snd_ctl_elem_value *ucontrol)
2590{
2591 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2592 struct sigmatel_spec *spec = codec->spec;
2593
d7a89436 2594 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR
2595 return 0;
2596}
2597
c6e4c666
TI
2598static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2599 unsigned char type);
2600
7c2ba97b
MR
2601static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2602 struct snd_ctl_elem_value *ucontrol)
2603{
2604 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2605 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI
2606 int nid = kcontrol->private_value;
2607
2608 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR
2609
2610 /* check to be sure that the ports are upto date with
2611 * switch changes
2612 */
c6e4c666 2613 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR
2614
2615 return 1;
2616}
2617
a5ce8890 2618#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP
2619
2620static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2621{
2622 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2623 struct sigmatel_spec *spec = codec->spec;
2624 int io_idx = kcontrol-> private_value & 0xff;
2625
2626 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2627 return 0;
2628}
2629
2630static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2631{
2632 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2633 struct sigmatel_spec *spec = codec->spec;
2634 hda_nid_t nid = kcontrol->private_value >> 8;
2635 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2636 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP
2637
2638 spec->io_switch[io_idx] = val;
2639
2640 if (val)
2641 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI
2642 else {
2643 unsigned int pinctl = AC_PINCTL_IN_EN;
2644 if (io_idx) /* set VREF for mic */
2645 pinctl |= stac92xx_get_vref(codec, nid);
2646 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2647 }
40c1d308
JZ
2648
2649 /* check the auto-mute again: we need to mute/unmute the speaker
2650 * appropriately according to the pin direction
2651 */
2652 if (spec->hp_detect)
c6e4c666 2653 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2654
403d1944
MP
2655 return 1;
2656}
2657
0fb87bb4
ML
2658#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2659
2660static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2661 struct snd_ctl_elem_value *ucontrol)
2662{
2663 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2664 struct sigmatel_spec *spec = codec->spec;
2665
2666 ucontrol->value.integer.value[0] = spec->clfe_swap;
2667 return 0;
2668}
2669
2670static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2671 struct snd_ctl_elem_value *ucontrol)
2672{
2673 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2674 struct sigmatel_spec *spec = codec->spec;
2675 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2676 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2677
68ea7b2f 2678 if (spec->clfe_swap == val)
0fb87bb4
ML
2679 return 0;
2680
68ea7b2f 2681 spec->clfe_swap = val;
0fb87bb4
ML
2682
2683 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2684 spec->clfe_swap ? 0x4 : 0x0);
2685
2686 return 1;
2687}
2688
7c2ba97b
MR
2689#define STAC_CODEC_HP_SWITCH(xname) \
2690 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2691 .name = xname, \
2692 .index = 0, \
2693 .info = stac92xx_hp_switch_info, \
2694 .get = stac92xx_hp_switch_get, \
2695 .put = stac92xx_hp_switch_put, \
2696 }
2697
403d1944
MP
2698#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2699 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2700 .name = xname, \
2701 .index = 0, \
2702 .info = stac92xx_io_switch_info, \
2703 .get = stac92xx_io_switch_get, \
2704 .put = stac92xx_io_switch_put, \
2705 .private_value = xpval, \
2706 }
2707
0fb87bb4
ML
2708#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2709 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2710 .name = xname, \
2711 .index = 0, \
2712 .info = stac92xx_clfe_switch_info, \
2713 .get = stac92xx_clfe_switch_get, \
2714 .put = stac92xx_clfe_switch_put, \
2715 .private_value = xpval, \
2716 }
403d1944 2717
c7d4b2fa
M
2718enum {
2719 STAC_CTL_WIDGET_VOL,
2720 STAC_CTL_WIDGET_MUTE,
09a99959 2721 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR
2722 STAC_CTL_WIDGET_AMP_MUX,
2723 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2724 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2725 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2726 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M
2727};
2728
c8b6bf9b 2729static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M
2730 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2731 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2732 STAC_MONO_MUX,
89385035
MR
2733 STAC_AMP_MUX,
2734 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2735 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2736 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2737 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M
2738};
2739
2740/* add dynamic controls */
4d4e9bb3
TI
2741static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2742 struct snd_kcontrol_new *ktemp,
2743 int idx, const char *name,
2744 unsigned long val)
c7d4b2fa 2745{
c8b6bf9b 2746 struct snd_kcontrol_new *knew;
c7d4b2fa 2747
603c4019
TI
2748 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2749 knew = snd_array_new(&spec->kctls);
2750 if (!knew)
2751 return -ENOMEM;
4d4e9bb3 2752 *knew = *ktemp;
4682eee0 2753 knew->index = idx;
82fe0c58 2754 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2755 if (!knew->name)
c7d4b2fa
M
2756 return -ENOMEM;
2757 knew->private_value = val;
c7d4b2fa
M
2758 return 0;
2759}
2760
4d4e9bb3
TI
2761static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2762 int type, int idx, const char *name,
2763 unsigned long val)
2764{
2765 return stac92xx_add_control_temp(spec,
2766 &stac92xx_control_templates[type],
2767 idx, name, val);
2768}
2769
4682eee0
MR
2770
2771/* add dynamic controls */
4d4e9bb3
TI
2772static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2773 const char *name, unsigned long val)
4682eee0
MR
2774{
2775 return stac92xx_add_control_idx(spec, type, 0, name, val);
2776}
2777
c21ca4a8
TI
2778/* check whether the line-input can be used as line-out */
2779static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP
2780{
2781 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2782 struct auto_pin_cfg *cfg = &spec->autocfg;
2783 hda_nid_t nid;
2784 unsigned int pincap;
8e9068b1 2785
c21ca4a8
TI
2786 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2787 return 0;
2788 nid = cfg->input_pins[AUTO_PIN_LINE];
2789 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2790 if (pincap & AC_PINCAP_OUT)
2791 return nid;
2792 return 0;
2793}
403d1944 2794
c21ca4a8
TI
2795/* check whether the mic-input can be used as line-out */
2796static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2797{
2798 struct sigmatel_spec *spec = codec->spec;
2799 struct auto_pin_cfg *cfg = &spec->autocfg;
2800 unsigned int def_conf, pincap;
2801 unsigned int mic_pin;
2802
2803 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2804 return 0;
2805 mic_pin = AUTO_PIN_MIC;
2806 for (;;) {
2807 hda_nid_t nid = cfg->input_pins[mic_pin];
2808 def_conf = snd_hda_codec_read(codec, nid, 0,
2809 AC_VERB_GET_CONFIG_DEFAULT, 0);
2810 /* some laptops have an internal analog microphone
2811 * which can't be used as a output */
2812 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2813 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2814 if (pincap & AC_PINCAP_OUT)
2815 return nid;
403d1944 2816 }
c21ca4a8
TI
2817 if (mic_pin == AUTO_PIN_MIC)
2818 mic_pin = AUTO_PIN_FRONT_MIC;
2819 else
2820 break;
403d1944 2821 }
403d1944
MP
2822 return 0;
2823}
2824
7b043899
SL
2825static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2826{
2827 int i;
2828
2829 for (i = 0; i < spec->multiout.num_dacs; i++) {
2830 if (spec->multiout.dac_nids[i] == nid)
2831 return 1;
2832 }
2833
2834 return 0;
2835}
2836
c21ca4a8
TI
2837static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2838{
2839 int i;
2840 if (is_in_dac_nids(spec, nid))
2841 return 1;
2842 for (i = 0; i < spec->autocfg.hp_outs; i++)
2843 if (spec->hp_dacs[i] == nid)
2844 return 1;
2845 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2846 if (spec->speaker_dacs[i] == nid)
2847 return 1;
2848 return 0;
2849}
2850
2851static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2852{
2853 struct sigmatel_spec *spec = codec->spec;
2854 int j, conn_len;
2855 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2856 unsigned int wcaps, wtype;
2857
2858 conn_len = snd_hda_get_connections(codec, nid, conn,
2859 HDA_MAX_CONNECTIONS);
2860 for (j = 0; j < conn_len; j++) {
2861 wcaps = snd_hda_param_read(codec, conn[j],
2862 AC_PAR_AUDIO_WIDGET_CAP);
2863 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2864 /* we check only analog outputs */
2865 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2866 continue;
2867 /* if this route has a free DAC, assign it */
2868 if (!check_all_dac_nids(spec, conn[j])) {
2869 if (conn_len > 1) {
2870 /* select this DAC in the pin's input mux */
2871 snd_hda_codec_write_cache(codec, nid, 0,
2872 AC_VERB_SET_CONNECT_SEL, j);
2873 }
2874 return conn[j];
2875 }
2876 }
2877 return 0;
2878}
2879
2880static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2881static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2882
3cc08dc6 2883/*
7b043899
SL
2884 * Fill in the dac_nids table from the parsed pin configuration
2885 * This function only works when every pin in line_out_pins[]
2886 * contains atleast one DAC in its connection list. Some 92xx
2887 * codecs are not connected directly to a DAC, such as the 9200
2888 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2889 */
c21ca4a8 2890static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M
2891{
2892 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2893 struct auto_pin_cfg *cfg = &spec->autocfg;
2894 int i;
2895 hda_nid_t nid, dac;
7b043899 2896
c7d4b2fa
M
2897 for (i = 0; i < cfg->line_outs; i++) {
2898 nid = cfg->line_out_pins[i];
c21ca4a8
TI
2899 dac = get_unassigned_dac(codec, nid);
2900 if (!dac) {
df802952
TI
2901 if (spec->multiout.num_dacs > 0) {
2902 /* we have already working output pins,
2903 * so let's drop the broken ones again
2904 */
2905 cfg->line_outs = spec->multiout.num_dacs;
2906 break;
2907 }
7b043899
SL
2908 /* error out, no available DAC found */
2909 snd_printk(KERN_ERR
2910 "%s: No available DAC for pin 0x%x\n",
2911 __func__, nid);
2912 return -ENODEV;
2913 }
c21ca4a8
TI
2914 add_spec_dacs(spec, dac);
2915 }
7b043899 2916
c21ca4a8
TI
2917 /* add line-in as output */
2918 nid = check_line_out_switch(codec);
2919 if (nid) {
2920 dac = get_unassigned_dac(codec, nid);
2921 if (dac) {
2922 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2923 nid, cfg->line_outs);
2924 cfg->line_out_pins[cfg->line_outs] = nid;
2925 cfg->line_outs++;
2926 spec->line_switch = nid;
2927 add_spec_dacs(spec, dac);
2928 }
2929 }
2930 /* add mic as output */
2931 nid = check_mic_out_switch(codec);
2932 if (nid) {
2933 dac = get_unassigned_dac(codec, nid);
2934 if (dac) {
2935 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2936 nid, cfg->line_outs);
2937 cfg->line_out_pins[cfg->line_outs] = nid;
2938 cfg->line_outs++;
2939 spec->mic_switch = nid;
2940 add_spec_dacs(spec, dac);
2941 }
2942 }
c7d4b2fa 2943
c21ca4a8
TI
2944 for (i = 0; i < cfg->hp_outs; i++) {
2945 nid = cfg->hp_pins[i];
2946 dac = get_unassigned_dac(codec, nid);
2947 if (dac) {
2948 if (!spec->multiout.hp_nid)
2949 spec->multiout.hp_nid = dac;
2950 else
2951 add_spec_extra_dacs(spec, dac);
7b043899 2952 }
c21ca4a8
TI
2953 spec->hp_dacs[i] = dac;
2954 }
2955
2956 for (i = 0; i < cfg->speaker_outs; i++) {
2957 nid = cfg->speaker_pins[i];
2958 dac = get_unassigned_dac(codec, nid);
2959 if (dac)
2960 add_spec_extra_dacs(spec, dac);
2961 spec->speaker_dacs[i] = dac;
7b043899 2962 }
c7d4b2fa 2963
c21ca4a8 2964 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL
2965 spec->multiout.num_dacs,
2966 spec->multiout.dac_nids[0],
2967 spec->multiout.dac_nids[1],
2968 spec->multiout.dac_nids[2],
2969 spec->multiout.dac_nids[3],
2970 spec->multiout.dac_nids[4]);
c21ca4a8 2971
c7d4b2fa
M
2972 return 0;
2973}
2974
eb06ed8f
TI
2975/* create volume control/switch for the given prefx type */
2976static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2977{
2978 char name[32];
2979 int err;
2980
2981 sprintf(name, "%s Playback Volume", pfx);
2982 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2983 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2984 if (err < 0)
2985 return err;
2986 sprintf(name, "%s Playback Switch", pfx);
2987 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2988 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2989 if (err < 0)
2990 return err;
2991 return 0;
2992}
2993
ae0afd81
MR
2994static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2995{
c21ca4a8 2996 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR
2997 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2998 return 1;
2999 } else {
3000 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3001 spec->multiout.num_dacs++;
3002 }
3003 return 0;
3004}
3005
c21ca4a8 3006static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3007{
c21ca4a8
TI
3008 int i;
3009 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3010 if (!spec->multiout.extra_out_nid[i]) {
3011 spec->multiout.extra_out_nid[i] = nid;
3012 return 0;
3013 }
3014 }
3015 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3016 return 1;
ae0afd81
MR
3017}
3018
76624534
TI
3019static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid)
3020{
3021 int i;
3022
3023 if (spec->autocfg.line_outs != 1)
3024 return 0;
3025 if (spec->multiout.hp_nid == nid)
3026 return 0;
3027 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++)
3028 if (spec->multiout.extra_out_nid[i] == nid)
3029 return 0;
3030 return 1;
3031}
3032
c7d4b2fa 3033/* add playback controls from the parsed DAC table */
0fb87bb4 3034static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 3035 const struct auto_pin_cfg *cfg)
c7d4b2fa 3036{
76624534 3037 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI
3038 static const char *chname[4] = {
3039 "Front", "Surround", NULL /*CLFE*/, "Side"
3040 };
d21995e3 3041 hda_nid_t nid = 0;
91589232
TI
3042 int i, err;
3043 unsigned int wid_caps;
0fb87bb4 3044
c21ca4a8 3045 for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
c7d4b2fa 3046 nid = spec->multiout.dac_nids[i];
c7d4b2fa
M
3047 if (i == 2) {
3048 /* Center/LFE */
eb06ed8f
TI
3049 err = create_controls(spec, "Center", nid, 1);
3050 if (err < 0)
c7d4b2fa 3051 return err;
eb06ed8f
TI
3052 err = create_controls(spec, "LFE", nid, 2);
3053 if (err < 0)
c7d4b2fa 3054 return err;
0fb87bb4
ML
3055
3056 wid_caps = get_wcaps(codec, nid);
3057
3058 if (wid_caps & AC_WCAP_LR_SWAP) {
3059 err = stac92xx_add_control(spec,
3060 STAC_CTL_WIDGET_CLFE_SWITCH,
3061 "Swap Center/LFE Playback Switch", nid);
3062
3063 if (err < 0)
3064 return err;
3065 }
3066
c7d4b2fa 3067 } else {
76624534
TI
3068 const char *name = chname[i];
3069 /* if it's a single DAC, assign a better name */
3070 if (!i && is_unique_dac(spec, nid)) {
3071 switch (cfg->line_out_type) {
3072 case AUTO_PIN_HP_OUT:
3073 name = "Headphone";
3074 break;
3075 case AUTO_PIN_SPEAKER_OUT:
3076 name = "Speaker";
3077 break;
3078 }
3079 }
3080 err = create_controls(spec, name, nid, 3);
eb06ed8f 3081 if (err < 0)
c7d4b2fa
M
3082 return err;
3083 }
3084 }
3085
a9cb5c90 3086 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR
3087 err = stac92xx_add_control(spec,
3088 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI
3089 "Headphone as Line Out Switch",
3090 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR
3091 if (err < 0)
3092 return err;
3093 }
3094
b5895dc8 3095 if (spec->line_switch) {
c21ca4a8
TI
3096 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3097 "Line In as Output Switch",
3098 spec->line_switch << 8);
3099 if (err < 0)
3100 return err;
b5895dc8 3101 }
403d1944 3102
b5895dc8 3103 if (spec->mic_switch) {
c21ca4a8
TI
3104 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3105 "Mic as Output Switch",
3106 (spec->mic_switch << 8) | 1);
3107 if (err < 0)
3108 return err;
b5895dc8 3109 }
403d1944 3110
c7d4b2fa
M
3111 return 0;
3112}
3113
eb06ed8f
TI
3114/* add playback controls for Speaker and HP outputs */
3115static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3116 struct auto_pin_cfg *cfg)
3117{
3118 struct sigmatel_spec *spec = codec->spec;
3119 hda_nid_t nid;
c21ca4a8 3120 int i, err, nums;
eb06ed8f 3121
c21ca4a8 3122 nums = 0;
eb06ed8f 3123 for (i = 0; i < cfg->hp_outs; i++) {
c21ca4a8
TI
3124 static const char *pfxs[] = {
3125 "Headphone", "Headphone2", "Headphone3",
3126 };
eb06ed8f
TI
3127 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3128 if (wid_caps & AC_WCAP_UNSOL_CAP)
3129 spec->hp_detect = 1;
c21ca4a8 3130 if (nums >= ARRAY_SIZE(pfxs))
c7d4b2fa 3131 continue;
c21ca4a8
TI
3132 nid = spec->hp_dacs[i];
3133 if (!nid)
eb06ed8f 3134 continue;
c21ca4a8
TI
3135 err = create_controls(spec, pfxs[nums++], nid, 3);
3136 if (err < 0)
3137 return err;
1b290a51 3138 }
c21ca4a8
TI
3139 nums = 0;
3140 for (i = 0; i < cfg->speaker_outs; i++) {
eb06ed8f
TI
3141 static const char *pfxs[] = {
3142 "Speaker", "External Speaker", "Speaker2",
3143 };
c21ca4a8
TI
3144 if (nums >= ARRAY_SIZE(pfxs))
3145 continue;
3146 nid = spec->speaker_dacs[i];
3147 if (!nid)
3148 continue;
3149 err = create_controls(spec, pfxs[nums++], nid, 3);
eb06ed8f
TI
3150 if (err < 0)
3151 return err;
3152 }
c7d4b2fa
M
3153 return 0;
3154}
3155
b22b4821 3156/* labels for mono mux outputs */
d0513fc6
MR
3157static const char *stac92xx_mono_labels[4] = {
3158 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR
3159};
3160
3161/* create mono mux for mono out on capable codecs */
3162static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3163{
3164 struct sigmatel_spec *spec = codec->spec;
3165 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3166 int i, num_cons;
3167 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3168
3169 num_cons = snd_hda_get_connections(codec,
3170 spec->mono_nid,
3171 con_lst,
3172 HDA_MAX_NUM_INPUTS);
3173 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3174 return -EINVAL;
3175
3176 for (i = 0; i < num_cons; i++) {
3177 mono_mux->items[mono_mux->num_items].label =
3178 stac92xx_mono_labels[i];
3179 mono_mux->items[mono_mux->num_items].index = i;
3180 mono_mux->num_items++;
3181 }
09a99959
MR
3182
3183 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3184 "Mono Mux", spec->mono_nid);
b22b4821
MR
3185}
3186
89385035
MR
3187/* labels for amp mux outputs */
3188static const char *stac92xx_amp_labels[3] = {
4b33c767 3189 "Front Microphone", "Microphone", "Line In",
89385035
MR
3190};
3191
3192/* create amp out controls mux on capable codecs */
3193static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3194{
3195 struct sigmatel_spec *spec = codec->spec;
3196 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3197 int i, err;
3198
2a9c7816 3199 for (i = 0; i < spec->num_amps; i++) {
89385035
MR
3200 amp_mux->items[amp_mux->num_items].label =
3201 stac92xx_amp_labels[i];
3202 amp_mux->items[amp_mux->num_items].index = i;
3203 amp_mux->num_items++;
3204 }
3205
2a9c7816
MR
3206 if (spec->num_amps > 1) {
3207 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3208 "Amp Selector Capture Switch", 0);
3209 if (err < 0)
3210 return err;
3211 }
89385035
MR
3212 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3213 "Amp Capture Volume",
3214 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3215}
3216
3217
1cd2224c
MR
3218/* create PC beep volume controls */
3219static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3220 hda_nid_t nid)
3221{
3222 struct sigmatel_spec *spec = codec->spec;
3223 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3224 int err;
3225
3226 /* check for mute support for the the amp */
3227 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3228 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3229 "PC Beep Playback Switch",
3230 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3231 if (err < 0)
3232 return err;
3233 }
3234
3235 /* check to see if there is volume support for the amp */
3236 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3237 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3238 "PC Beep Playback Volume",
3239 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3240 if (err < 0)
3241 return err;
3242 }
3243 return 0;
3244}
3245
4d4e9bb3
TI
3246#ifdef CONFIG_SND_HDA_INPUT_BEEP
3247#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3248
3249static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3250 struct snd_ctl_elem_value *ucontrol)
3251{
3252 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3253 ucontrol->value.integer.value[0] = codec->beep->enabled;
3254 return 0;
3255}
3256
3257static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3258 struct snd_ctl_elem_value *ucontrol)
3259{
3260 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3261 int enabled = !!ucontrol->value.integer.value[0];
3262 if (codec->beep->enabled != enabled) {
3263 codec->beep->enabled = enabled;
3264 return 1;
3265 }
3266 return 0;
3267}
3268
3269static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3270 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3271 .info = stac92xx_dig_beep_switch_info,
3272 .get = stac92xx_dig_beep_switch_get,
3273 .put = stac92xx_dig_beep_switch_put,
3274};
3275
3276static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3277{
3278 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3279 0, "PC Beep Playback Switch", 0);
3280}
3281#endif
3282
4682eee0
MR
3283static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3284{
3285 struct sigmatel_spec *spec = codec->spec;
3286 int wcaps, nid, i, err = 0;
3287
3288 for (i = 0; i < spec->num_muxes; i++) {
3289 nid = spec->mux_nids[i];
3290 wcaps = get_wcaps(codec, nid);
3291
3292 if (wcaps & AC_WCAP_OUT_AMP) {
3293 err = stac92xx_add_control_idx(spec,
3294 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3295 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3296 if (err < 0)
3297 return err;
3298 }
3299 }
3300 return 0;
3301};
3302
d9737751 3303static const char *stac92xx_spdif_labels[3] = {
65973632 3304 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR
3305};
3306
3307static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3308{
3309 struct sigmatel_spec *spec = codec->spec;
3310 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3311 const char **labels = spec->spdif_labels;
d9737751 3312 int i, num_cons;
65973632 3313 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR
3314
3315 num_cons = snd_hda_get_connections(codec,
3316 spec->smux_nids[0],
3317 con_lst,
3318 HDA_MAX_NUM_INPUTS);
65973632 3319 if (!num_cons)
d9737751
MR
3320 return -EINVAL;
3321
65973632
MR
3322 if (!labels)
3323 labels = stac92xx_spdif_labels;
3324
d9737751 3325 for (i = 0; i < num_cons; i++) {
65973632 3326 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR
3327 spdif_mux->items[spdif_mux->num_items].index = i;
3328 spdif_mux->num_items++;
3329 }
3330
3331 return 0;
3332}
3333
8b65727b 3334/* labels for dmic mux inputs */
ddc2cec4 3335static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP
3336 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3337 "Digital Mic 3", "Digital Mic 4"
3338};
3339
3340/* create playback/capture controls for input pins on dmic capable codecs */
3341static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3342 const struct auto_pin_cfg *cfg)
3343{
3344 struct sigmatel_spec *spec = codec->spec;
3345 struct hda_input_mux *dimux = &spec->private_dimux;
3346 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR
3347 int err, i, j;
3348 char name[32];
8b65727b
MP
3349
3350 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3351 dimux->items[dimux->num_items].index = 0;
3352 dimux->num_items++;
3353
3354 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3355 hda_nid_t nid;
8b65727b
MP
3356 int index;
3357 int num_cons;
0678accd 3358 unsigned int wcaps;
8b65727b
MP
3359 unsigned int def_conf;
3360
3361 def_conf = snd_hda_codec_read(codec,
3362 spec->dmic_nids[i],
3363 0,
3364 AC_VERB_GET_CONFIG_DEFAULT,
3365 0);
3366 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3367 continue;
3368
0678accd 3369 nid = spec->dmic_nids[i];
8b65727b 3370 num_cons = snd_hda_get_connections(codec,
e1f0d669 3371 spec->dmux_nids[0],
8b65727b
MP
3372 con_lst,
3373 HDA_MAX_NUM_INPUTS);
3374 for (j = 0; j < num_cons; j++)
0678accd 3375 if (con_lst[j] == nid) {
8b65727b
MP
3376 index = j;
3377 goto found;
3378 }
3379 continue;
3380found:
d0513fc6
MR
3381 wcaps = get_wcaps(codec, nid) &
3382 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3383
d0513fc6 3384 if (wcaps) {
0678accd
MR
3385 sprintf(name, "%s Capture Volume",
3386 stac92xx_dmic_labels[dimux->num_items]);
3387
3388 err = stac92xx_add_control(spec,
3389 STAC_CTL_WIDGET_VOL,
3390 name,
d0513fc6
MR
3391 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3392 (wcaps & AC_WCAP_OUT_AMP) ?
3393 HDA_OUTPUT : HDA_INPUT));
0678accd
MR
3394 if (err < 0)
3395 return err;
3396 }
3397
8b65727b
MP
3398 dimux->items[dimux->num_items].label =
3399 stac92xx_dmic_labels[dimux->num_items];
3400 dimux->items[dimux->num_items].index = index;
3401 dimux->num_items++;
3402 }
3403
3404 return 0;
3405}
3406
c7d4b2fa
M
3407/* create playback/capture controls for input pins */
3408static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3409{
3410 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
3411 struct hda_input_mux *imux = &spec->private_imux;
3412 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3413 int i, j, k;
3414
3415 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI
3416 int index;
3417
3418 if (!cfg->input_pins[i])
3419 continue;
3420 index = -1;
3421 for (j = 0; j < spec->num_muxes; j++) {
3422 int num_cons;
3423 num_cons = snd_hda_get_connections(codec,
3424 spec->mux_nids[j],
3425 con_lst,
3426 HDA_MAX_NUM_INPUTS);
3427 for (k = 0; k < num_cons; k++)
3428 if (con_lst[k] == cfg->input_pins[i]) {
3429 index = k;
3430 goto found;
3431 }
c7d4b2fa 3432 }
314634bc
TI
3433 continue;
3434 found:
3435 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3436 imux->items[imux->num_items].index = index;
3437 imux->num_items++;
c7d4b2fa
M
3438 }
3439
7b043899 3440 if (imux->num_items) {
62fe78e9
SR
3441 /*
3442 * Set the current input for the muxes.
3443 * The STAC9221 has two input muxes with identical source
3444 * NID lists. Hopefully this won't get confused.
3445 */
3446 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI
3447 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3448 AC_VERB_SET_CONNECT_SEL,
3449 imux->items[0].index);
62fe78e9
SR
3450 }
3451 }
3452
c7d4b2fa
M
3453 return 0;
3454}
3455
c7d4b2fa
M
3456static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3457{
3458 struct sigmatel_spec *spec = codec->spec;
3459 int i;
3460
3461 for (i = 0; i < spec->autocfg.line_outs; i++) {
3462 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3463 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3464 }
3465}
3466
3467static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3468{
3469 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3470 int i;
c7d4b2fa 3471
eb06ed8f
TI
3472 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3473 hda_nid_t pin;
3474 pin = spec->autocfg.hp_pins[i];
3475 if (pin) /* connect to front */
3476 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3477 }
3478 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3479 hda_nid_t pin;
3480 pin = spec->autocfg.speaker_pins[i];
3481 if (pin) /* connect to front */
3482 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3483 }
c7d4b2fa
M
3484}
3485
3cc08dc6 3486static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M
3487{
3488 struct sigmatel_spec *spec = codec->spec;
3489 int err;
3490
8b65727b
MP
3491 if ((err = snd_hda_parse_pin_def_config(codec,
3492 &spec->autocfg,
3493 spec->dmic_nids)) < 0)
c7d4b2fa 3494 return err;
82bc955f 3495 if (! spec->autocfg.line_outs)
869264c4 3496 return 0; /* can't find valid pin config */
19039bd0 3497
bcecd9bd
JZ
3498 /* If we have no real line-out pin and multiple hp-outs, HPs should
3499 * be set up as multi-channel outputs.
3500 */
3501 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3502 spec->autocfg.hp_outs > 1) {
3503 /* Copy hp_outs to line_outs, backup line_outs in
3504 * speaker_outs so that the following routines can handle
3505 * HP pins as primary outputs.
3506 */
c21ca4a8 3507 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ
3508 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3509 sizeof(spec->autocfg.line_out_pins));
3510 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3511 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3512 sizeof(spec->autocfg.hp_pins));
3513 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI
3514 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3515 spec->autocfg.hp_outs = 0;
bcecd9bd 3516 }
09a99959 3517 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR
3518 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3519 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR
3520 u32 caps = query_amp_caps(codec,
3521 spec->autocfg.mono_out_pin, dir);
3522 hda_nid_t conn_list[1];
3523
3524 /* get the mixer node and then the mono mux if it exists */
3525 if (snd_hda_get_connections(codec,
3526 spec->autocfg.mono_out_pin, conn_list, 1) &&
3527 snd_hda_get_connections(codec, conn_list[0],
3528 conn_list, 1)) {
3529
3530 int wcaps = get_wcaps(codec, conn_list[0]);
3531 int wid_type = (wcaps & AC_WCAP_TYPE)
3532 >> AC_WCAP_TYPE_SHIFT;
3533 /* LR swap check, some stac925x have a mux that
3534 * changes the DACs output path instead of the
3535 * mono-mux path.
3536 */
3537 if (wid_type == AC_WID_AUD_SEL &&
3538 !(wcaps & AC_WCAP_LR_SWAP))
3539 spec->mono_nid = conn_list[0];
3540 }
d0513fc6
MR
3541 if (dir) {
3542 hda_nid_t nid = spec->autocfg.mono_out_pin;
3543
3544 /* most mono outs have a least a mute/unmute switch */
3545 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3546 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3547 "Mono Playback Switch",
3548 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR
3549 if (err < 0)
3550 return err;
d0513fc6
MR
3551 /* check for volume support for the amp */
3552 if ((caps & AC_AMPCAP_NUM_STEPS)
3553 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3554 err = stac92xx_add_control(spec,
3555 STAC_CTL_WIDGET_VOL,
3556 "Mono Playback Volume",
3557 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3558 if (err < 0)
3559 return err;
3560 }
09a99959
MR
3561 }
3562
3563 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3564 AC_PINCTL_OUT_EN);
3565 }
bcecd9bd 3566
c21ca4a8
TI
3567 if (!spec->multiout.num_dacs) {
3568 err = stac92xx_auto_fill_dac_nids(codec);
3569 if (err < 0)
19039bd0 3570 return err;
c21ca4a8 3571 }
c7d4b2fa 3572
0fb87bb4
ML
3573 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3574
3575 if (err < 0)
3576 return err;
3577
1cd2224c
MR
3578 /* setup analog beep controls */
3579 if (spec->anabeep_nid > 0) {
3580 err = stac92xx_auto_create_beep_ctls(codec,
3581 spec->anabeep_nid);
3582 if (err < 0)
3583 return err;
3584 }
3585
3586 /* setup digital beep controls and input device */
3587#ifdef CONFIG_SND_HDA_INPUT_BEEP
3588 if (spec->digbeep_nid > 0) {
3589 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3590 unsigned int caps;
1cd2224c
MR
3591
3592 err = stac92xx_auto_create_beep_ctls(codec, nid);
3593 if (err < 0)
3594 return err;
3595 err = snd_hda_attach_beep_device(codec, nid);
3596 if (err < 0)
3597 return err;
4d4e9bb3
TI
3598 /* if no beep switch is available, make its own one */
3599 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3600 if (codec->beep &&
3601 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3602 err = stac92xx_beep_switch_ctl(codec);
3603 if (err < 0)
3604 return err;
3605 }
1cd2224c
MR
3606 }
3607#endif
3608
0fb87bb4
ML
3609 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3610
3611 if (err < 0)
3612 return err;
3613
3614 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3615
3616 if (err < 0)
c7d4b2fa
M
3617 return err;
3618
b22b4821
MR
3619 if (spec->mono_nid > 0) {
3620 err = stac92xx_auto_create_mono_output_ctls(codec);
3621 if (err < 0)
3622 return err;
3623 }
2a9c7816 3624 if (spec->num_amps > 0) {
89385035
MR
3625 err = stac92xx_auto_create_amp_output_ctls(codec);
3626 if (err < 0)
3627 return err;
3628 }
2a9c7816 3629 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP
3630 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3631 &spec->autocfg)) < 0)
3632 return err;
4682eee0
MR
3633 if (spec->num_muxes > 0) {
3634 err = stac92xx_auto_create_mux_input_ctls(codec);
3635 if (err < 0)
3636 return err;
3637 }
d9737751
MR
3638 if (spec->num_smuxes > 0) {
3639 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3640 if (err < 0)
3641 return err;
3642 }
8b65727b 3643
c7d4b2fa 3644 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3645 if (spec->multiout.max_channels > 2)
c7d4b2fa 3646 spec->surr_switch = 1;
c7d4b2fa 3647
82bc955f 3648 if (spec->autocfg.dig_out_pin)
3cc08dc6 3649 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3650 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3651 spec->dig_in_nid = dig_in;
c7d4b2fa 3652
603c4019
TI
3653 if (spec->kctls.list)
3654 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3655
3656 spec->input_mux = &spec->private_imux;
f8ccbf65
MR
3657 if (!spec->dinput_mux)
3658 spec->dinput_mux = &spec->private_dimux;
d9737751 3659 spec->sinput_mux = &spec->private_smux;
b22b4821 3660 spec->mono_mux = &spec->private_mono_mux;
89385035 3661 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M
3662 return 1;
3663}
3664
82bc955f
TI
3665/* add playback controls for HP output */
3666static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3667 struct auto_pin_cfg *cfg)
3668{
3669 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3670 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI
3671 unsigned int wid_caps;
3672
3673 if (! pin)
3674 return 0;
3675
3676 wid_caps = get_wcaps(codec, pin);
505cb341 3677 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3678 spec->hp_detect = 1;
82bc955f
TI
3679
3680 return 0;
3681}
3682
160ea0dc
RF
3683/* add playback controls for LFE output */
3684static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3685 struct auto_pin_cfg *cfg)
3686{
3687 struct sigmatel_spec *spec = codec->spec;
3688 int err;
3689 hda_nid_t lfe_pin = 0x0;
3690 int i;
3691
3692 /*
3693 * search speaker outs and line outs for a mono speaker pin
3694 * with an amp. If one is found, add LFE controls
3695 * for it.
3696 */
3697 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3698 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3699 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3700 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3701 if (wcaps == AC_WCAP_OUT_AMP)
3702 /* found a mono speaker with an amp, must be lfe */
3703 lfe_pin = pin;
3704 }
3705
3706 /* if speaker_outs is 0, then speakers may be in line_outs */
3707 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3708 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3709 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3710 unsigned int defcfg;
8b551785 3711 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF
3712 AC_VERB_GET_CONFIG_DEFAULT,
3713 0x00);
8b551785 3714 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3715 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3716 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3717 if (wcaps == AC_WCAP_OUT_AMP)
3718 /* found a mono speaker with an amp,
3719 must be lfe */
3720 lfe_pin = pin;
3721 }
3722 }
3723 }
3724
3725 if (lfe_pin) {
eb06ed8f 3726 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF
3727 if (err < 0)
3728 return err;
3729 }
3730
3731 return 0;
3732}
3733
c7d4b2fa
M
3734static int stac9200_parse_auto_config(struct hda_codec *codec)
3735{
3736 struct sigmatel_spec *spec = codec->spec;
3737 int err;
3738
df694daa 3739 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M
3740 return err;
3741
3742 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3743 return err;
3744
82bc955f
TI
3745 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3746 return err;
3747
160ea0dc
RF
3748 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3749 return err;
3750
355a0ec4
TI
3751 if (spec->num_muxes > 0) {
3752 err = stac92xx_auto_create_mux_input_ctls(codec);
3753 if (err < 0)
3754 return err;
3755 }
3756
82bc955f 3757 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3758 spec->multiout.dig_out_nid = 0x05;
82bc955f 3759 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3760 spec->dig_in_nid = 0x04;
c7d4b2fa 3761
603c4019
TI
3762 if (spec->kctls.list)
3763 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3764
3765 spec->input_mux = &spec->private_imux;
8b65727b 3766 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M
3767
3768 return 1;
3769}
3770
62fe78e9
SR
3771/*
3772 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3773 * funky external mute control using GPIO pins.
3774 */
3775
76e1ddfb 3776static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3777 unsigned int dir_mask, unsigned int data)
62fe78e9
SR
3778{
3779 unsigned int gpiostate, gpiomask, gpiodir;
3780
3781 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3782 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3783 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR
3784
3785 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3786 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3787 gpiomask |= mask;
62fe78e9
SR
3788
3789 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3790 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3791 gpiodir |= dir_mask;
62fe78e9 3792
76e1ddfb 3793 /* Configure GPIOx as CMOS */
62fe78e9
SR
3794 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3795
3796 snd_hda_codec_write(codec, codec->afg, 0,
3797 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI
3798 snd_hda_codec_read(codec, codec->afg, 0,
3799 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR
3800
3801 msleep(1);
3802
76e1ddfb
TI
3803 snd_hda_codec_read(codec, codec->afg, 0,
3804 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR
3805}
3806
74aeaabc
MR
3807static int stac92xx_add_jack(struct hda_codec *codec,
3808 hda_nid_t nid, int type)
3809{
e4973e1e 3810#ifdef CONFIG_SND_JACK
74aeaabc
MR
3811 struct sigmatel_spec *spec = codec->spec;
3812 struct sigmatel_jack *jack;
3813 int def_conf = snd_hda_codec_read(codec, nid,
3814 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3815 int connectivity = get_defcfg_connect(def_conf);
3816 char name[32];
3817
3818 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3819 return 0;
3820
3821 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3822 jack = snd_array_new(&spec->jacks);
3823 if (!jack)
3824 return -ENOMEM;
3825 jack->nid = nid;
3826 jack->type = type;
3827
3828 sprintf(name, "%s at %s %s Jack",
3829 snd_hda_get_jack_type(def_conf),
3830 snd_hda_get_jack_connectivity(def_conf),
3831 snd_hda_get_jack_location(def_conf));
3832
3833 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI
3834#else
3835 return 0;
3836#endif
74aeaabc
MR
3837}
3838
c6e4c666
TI
3839static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3840 unsigned char type, int data)
74aeaabc
MR
3841{
3842 struct sigmatel_event *event;
3843
3844 snd_array_init(&spec->events, sizeof(*event), 32);
3845 event = snd_array_new(&spec->events);
3846 if (!event)
3847 return -ENOMEM;
3848 event->nid = nid;
c6e4c666
TI
3849 event->type = type;
3850 event->tag = spec->events.used;
74aeaabc
MR
3851 event->data = data;
3852
c6e4c666 3853 return event->tag;
74aeaabc
MR
3854}
3855
c6e4c666
TI
3856static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3857 hda_nid_t nid, unsigned char type)
74aeaabc
MR
3858{
3859 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
3860 struct sigmatel_event *event = spec->events.list;
3861 int i;
3862
3863 for (i = 0; i < spec->events.used; i++, event++) {
3864 if (event->nid == nid && event->type == type)
3865 return event;
74aeaabc 3866 }
c6e4c666 3867 return NULL;
74aeaabc
MR
3868}
3869
c6e4c666
TI
3870static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3871 unsigned char tag)
314634bc 3872{
c6e4c666
TI
3873 struct sigmatel_spec *spec = codec->spec;
3874 struct sigmatel_event *event = spec->events.list;
3875 int i;
3876
3877 for (i = 0; i < spec->events.used; i++, event++) {
3878 if (event->tag == tag)
3879 return event;
74aeaabc 3880 }
c6e4c666
TI
3881 return NULL;
3882}
3883
3884static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3885 unsigned int type)
3886{
3887 struct sigmatel_event *event;
3888 int tag;
3889
3890 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3891 return;
3892 event = stac_get_event(codec, nid, type);
3893 if (event)
3894 tag = event->tag;
3895 else
3896 tag = stac_add_event(codec->spec, nid, type, 0);
3897 if (tag < 0)
3898 return;
3899 snd_hda_codec_write_cache(codec, nid, 0,
3900 AC_VERB_SET_UNSOLICITED_ENABLE,
3901 AC_USRSP_EN | tag);
314634bc
TI
3902}
3903
a64135a2
MR
3904static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3905{
3906 int i;
3907 for (i = 0; i < cfg->hp_outs; i++)
3908 if (cfg->hp_pins[i] == nid)
3909 return 1; /* nid is a HP-Out */
3910
3911 return 0; /* nid is not a HP-Out */
3912};
3913
b76c850f
MR
3914static void stac92xx_power_down(struct hda_codec *codec)
3915{
3916 struct sigmatel_spec *spec = codec->spec;
3917
3918 /* power down inactive DACs */
3919 hda_nid_t *dac;
3920 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 3921 if (!check_all_dac_nids(spec, *dac))
8c2f767b 3922 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR
3923 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3924}
3925
f73d3585
TI
3926static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3927 int enable);
3928
c7d4b2fa
M
3929static int stac92xx_init(struct hda_codec *codec)
3930{
3931 struct sigmatel_spec *spec = codec->spec;
82bc955f 3932 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3933 unsigned int gpio;
e4973e1e 3934 int i;
c7d4b2fa 3935
c7d4b2fa
M
3936 snd_hda_sequence_write(codec, spec->init);
3937
8daaaa97
MR
3938 /* power down adcs initially */
3939 if (spec->powerdown_adcs)
3940 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 3941 snd_hda_codec_write(codec,
8daaaa97
MR
3942 spec->adc_nids[i], 0,
3943 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI
3944
3945 /* set up GPIO */
3946 gpio = spec->gpio_data;
3947 /* turn on EAPD statically when spec->eapd_switch isn't set.
3948 * otherwise, unsol event will turn it on/off dynamically
3949 */
3950 if (!spec->eapd_switch)
3951 gpio |= spec->eapd_mask;
3952 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3953
82bc955f
TI
3954 /* set up pins */
3955 if (spec->hp_detect) {
505cb341 3956 /* Enable unsolicited responses on the HP widget */
74aeaabc 3957 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 3958 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 3959 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 3960 }
0a07acaf
TI
3961 /* force to enable the first line-out; the others are set up
3962 * in unsol_event
3963 */
3964 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3965 AC_PINCTL_OUT_EN);
82bc955f 3966 /* fake event to set up pins */
c6e4c666
TI
3967 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
3968 STAC_HP_EVENT);
82bc955f
TI
3969 } else {
3970 stac92xx_auto_init_multi_out(codec);
3971 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI
3972 for (i = 0; i < cfg->hp_outs; i++)
3973 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI
3974 }
3975 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI
3976 hda_nid_t nid = cfg->input_pins[i];
3977 if (nid) {
12dde4c6 3978 unsigned int pinctl, conf;
4f1e6bc3
TI
3979 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3980 /* for mic pins, force to initialize */
3981 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI
3982 pinctl |= AC_PINCTL_IN_EN;
3983 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI
3984 } else {
3985 pinctl = snd_hda_codec_read(codec, nid, 0,
3986 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3987 /* if PINCTL already set then skip */
12dde4c6
TI
3988 if (!(pinctl & AC_PINCTL_IN_EN)) {
3989 pinctl |= AC_PINCTL_IN_EN;
3990 stac92xx_auto_set_pinctl(codec, nid,
3991 pinctl);
3992 }
3993 }
3994 conf = snd_hda_codec_read(codec, nid, 0,
3995 AC_VERB_GET_CONFIG_DEFAULT, 0);
3996 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
3997 enable_pin_detect(codec, nid,
3998 STAC_INSERT_EVENT);
3999 stac_issue_unsol_event(codec, nid,
4000 STAC_INSERT_EVENT);
4f1e6bc3 4001 }
c960a03b 4002 }
82bc955f 4003 }
a64135a2
MR
4004 for (i = 0; i < spec->num_dmics; i++)
4005 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4006 AC_PINCTL_IN_EN);
f73d3585
TI
4007 if (cfg->dig_out_pin)
4008 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
4009 AC_PINCTL_OUT_EN);
4010 if (cfg->dig_in_pin)
4011 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4012 AC_PINCTL_IN_EN);
a64135a2 4013 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI
4014 hda_nid_t nid = spec->pwr_nids[i];
4015 int pinctl, def_conf;
f73d3585 4016
eb632128
TI
4017 /* power on when no jack detection is available */
4018 if (!spec->hp_detect) {
4019 stac_toggle_power_map(codec, nid, 1);
4020 continue;
4021 }
4022
4023 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI
4024 continue; /* already has an unsol event */
4025
4026 pinctl = snd_hda_codec_read(codec, nid, 0,
4027 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR
4028 /* outputs are only ports capable of power management
4029 * any attempts on powering down a input port cause the
4030 * referenced VREF to act quirky.
4031 */
eb632128
TI
4032 if (pinctl & AC_PINCTL_IN_EN) {
4033 stac_toggle_power_map(codec, nid, 1);
a64135a2 4034 continue;
eb632128 4035 }
f73d3585
TI
4036 def_conf = snd_hda_codec_read(codec, nid, 0,
4037 AC_VERB_GET_CONFIG_DEFAULT, 0);
4038 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR
4039 /* skip any ports that don't have jacks since presence
4040 * detection is useless */
f73d3585
TI
4041 if (def_conf != AC_JACK_PORT_COMPLEX) {
4042 if (def_conf != AC_JACK_PORT_NONE)
4043 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4044 continue;
f73d3585 4045 }
12dde4c6
TI
4046 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
4047 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4048 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
4049 }
a64135a2 4050 }
b76c850f
MR
4051 if (spec->dac_list)
4052 stac92xx_power_down(codec);
c7d4b2fa
M
4053 return 0;
4054}
4055
74aeaabc
MR
4056static void stac92xx_free_jacks(struct hda_codec *codec)
4057{
e4973e1e 4058#ifdef CONFIG_SND_JACK
b94d3539 4059 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4060 struct sigmatel_spec *spec = codec->spec;
b94d3539 4061 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR
4062 struct sigmatel_jack *jacks = spec->jacks.list;
4063 int i;
4064 for (i = 0; i < spec->jacks.used; i++)
4065 snd_device_free(codec->bus->card, &jacks[i].jack);
4066 }
4067 snd_array_free(&spec->jacks);
e4973e1e 4068#endif
74aeaabc
MR
4069}
4070
603c4019
TI
4071static void stac92xx_free_kctls(struct hda_codec *codec)
4072{
4073 struct sigmatel_spec *spec = codec->spec;
4074
4075 if (spec->kctls.list) {
4076 struct snd_kcontrol_new *kctl = spec->kctls.list;
4077 int i;
4078 for (i = 0; i < spec->kctls.used; i++)
4079 kfree(kctl[i].name);
4080 }
4081 snd_array_free(&spec->kctls);
4082}
4083
2f2f4251
M
4084static void stac92xx_free(struct hda_codec *codec)
4085{
c7d4b2fa 4086 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
4087
4088 if (! spec)
4089 return;
4090
af9f341a 4091 kfree(spec->pin_configs);
74aeaabc
MR
4092 stac92xx_free_jacks(codec);
4093 snd_array_free(&spec->events);
11b44bbd 4094
c7d4b2fa 4095 kfree(spec);
1cd2224c 4096 snd_hda_detach_beep_device(codec);
2f2f4251
M
4097}
4098
4e55096e
M
4099static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4100 unsigned int flag)
4101{
4102 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4103 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4104
f9acba43
TI
4105 if (pin_ctl & AC_PINCTL_IN_EN) {
4106 /*
4107 * we need to check the current set-up direction of
4108 * shared input pins since they can be switched via
4109 * "xxx as Output" mixer switch
4110 */
4111 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4112 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI
4113 return;
4114 }
4115
7b043899
SL
4116 /* if setting pin direction bits, clear the current
4117 direction bits first */
4118 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4119 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4120
82beb8fd 4121 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M
4122 AC_VERB_SET_PIN_WIDGET_CONTROL,
4123 pin_ctl | flag);
4124}
4125
4126static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4127 unsigned int flag)
4128{
4129 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4130 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 4131 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M
4132 AC_VERB_SET_PIN_WIDGET_CONTROL,
4133 pin_ctl & ~flag);
4134}
4135
e6e3ea25 4136static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI
4137{
4138 if (!nid)
4139 return 0;
4140 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI
4141 & (1 << 31))
4142 return 1;
314634bc
TI
4143 return 0;
4144}
4145
d7a89436
TI
4146/* return non-zero if the hp-pin of the given array index isn't
4147 * a jack-detection target
4148 */
4149static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4150{
4151 struct auto_pin_cfg *cfg = &spec->autocfg;
4152
4153 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4154 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4155 return 1;
c21ca4a8 4156 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI
4157 return 1;
4158 /* ignore if the pin is set as line-out */
4159 if (cfg->hp_pins[i] == spec->hp_switch)
4160 return 1;
4161 return 0;
4162}
4163
c6e4c666 4164static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M
4165{
4166 struct sigmatel_spec *spec = codec->spec;
4167 struct auto_pin_cfg *cfg = &spec->autocfg;
4168 int i, presence;
4169
eb06ed8f 4170 presence = 0;
4fe5195c
MR
4171 if (spec->gpio_mute)
4172 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4173 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4174
eb06ed8f 4175 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI
4176 if (presence)
4177 break;
d7a89436
TI
4178 if (no_hp_sensing(spec, i))
4179 continue;
e6e3ea25
TI
4180 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4181 if (presence) {
4182 unsigned int pinctl;
4183 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4184 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4185 if (pinctl & AC_PINCTL_IN_EN)
4186 presence = 0; /* mic- or line-input */
4187 }
eb06ed8f 4188 }
4e55096e
M
4189
4190 if (presence) {
d7a89436 4191 /* disable lineouts */
7c2ba97b 4192 if (spec->hp_switch)
d7a89436
TI
4193 stac92xx_reset_pinctl(codec, spec->hp_switch,
4194 AC_PINCTL_OUT_EN);
4e55096e
M
4195 for (i = 0; i < cfg->line_outs; i++)
4196 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4197 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4198 for (i = 0; i < cfg->speaker_outs; i++)
4199 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4200 AC_PINCTL_OUT_EN);
c0cea0d0 4201 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4202 stac_gpio_set(codec, spec->gpio_mask,
4203 spec->gpio_dir, spec->gpio_data &
4204 ~spec->eapd_mask);
4e55096e 4205 } else {
d7a89436 4206 /* enable lineouts */
7c2ba97b 4207 if (spec->hp_switch)
d7a89436
TI
4208 stac92xx_set_pinctl(codec, spec->hp_switch,
4209 AC_PINCTL_OUT_EN);
4e55096e
M
4210 for (i = 0; i < cfg->line_outs; i++)
4211 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4212 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4213 for (i = 0; i < cfg->speaker_outs; i++)
4214 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4215 AC_PINCTL_OUT_EN);
c0cea0d0 4216 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4217 stac_gpio_set(codec, spec->gpio_mask,
4218 spec->gpio_dir, spec->gpio_data |
4219 spec->eapd_mask);
4e55096e 4220 }
d7a89436
TI
4221 /* toggle hp outs */
4222 for (i = 0; i < cfg->hp_outs; i++) {
4223 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4224 if (no_hp_sensing(spec, i))
4225 continue;
4226 if (presence)
4227 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI
4228#if 0 /* FIXME */
4229/* Resetting the pinctl like below may lead to (a sort of) regressions
4230 * on some devices since they use the HP pin actually for line/speaker
4231 * outs although the default pin config shows a different pin (that is
4232 * wrong and useless).
4233 *
4234 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4235 * But, disabling the code below just works around it, and I'm too tired of
4236 * bug reports with such devices...
4237 */
d7a89436
TI
4238 else
4239 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4240#endif /* FIXME */
d7a89436 4241 }
4e55096e
M
4242}
4243
f73d3585
TI
4244static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4245 int enable)
a64135a2
MR
4246{
4247 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI
4248 unsigned int idx, val;
4249
4250 for (idx = 0; idx < spec->num_pwrs; idx++) {
4251 if (spec->pwr_nids[idx] == nid)
4252 break;
4253 }
4254 if (idx >= spec->num_pwrs)
4255 return;
d0513fc6
MR
4256
4257 /* several codecs have two power down bits */
4258 if (spec->pwr_mapping)
4259 idx = spec->pwr_mapping[idx];
4260 else
4261 idx = 1 << idx;
a64135a2 4262
f73d3585
TI
4263 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4264 if (enable)
a64135a2
MR
4265 val &= ~idx;
4266 else
4267 val |= idx;
4268
4269 /* power down unused output ports */
4270 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR
4271}
4272
f73d3585
TI
4273static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4274{
e6e3ea25 4275 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4276}
a64135a2 4277
74aeaabc
MR
4278static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4279{
4280 struct sigmatel_spec *spec = codec->spec;
4281 struct sigmatel_jack *jacks = spec->jacks.list;
4282
4283 if (jacks) {
4284 int i;
4285 for (i = 0; i < spec->jacks.used; i++) {
4286 if (jacks->nid == nid) {
4287 unsigned int pin_ctl =
4288 snd_hda_codec_read(codec, nid,
4289 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4290 0x00);
4291 int type = jacks->type;
4292 if (type == (SND_JACK_LINEOUT
4293 | SND_JACK_HEADPHONE))
4294 type = (pin_ctl & AC_PINCTL_HP_EN)
4295 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4296 snd_jack_report(jacks->jack,
e6e3ea25 4297 get_pin_presence(codec, nid)
74aeaabc
MR
4298 ? type : 0);
4299 }
4300 jacks++;
4301 }
4302 }
4303}
a64135a2 4304
c6e4c666
TI
4305static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4306 unsigned char type)
4307{
4308 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4309 if (!event)
4310 return;
4311 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4312}
4313
314634bc
TI
4314static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4315{
a64135a2 4316 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
4317 struct sigmatel_event *event;
4318 int tag, data;
a64135a2 4319
c6e4c666
TI
4320 tag = (res >> 26) & 0x7f;
4321 event = stac_get_event_from_tag(codec, tag);
4322 if (!event)
4323 return;
4324
4325 switch (event->type) {
314634bc 4326 case STAC_HP_EVENT:
c6e4c666 4327 stac92xx_hp_detect(codec);
a64135a2 4328 /* fallthru */
74aeaabc 4329 case STAC_INSERT_EVENT:
a64135a2 4330 case STAC_PWR_EVENT:
c6e4c666
TI
4331 if (spec->num_pwrs > 0)
4332 stac92xx_pin_sense(codec, event->nid);
4333 stac92xx_report_jack(codec, event->nid);
72474be6 4334 break;
c6e4c666
TI
4335 case STAC_VREF_EVENT:
4336 data = snd_hda_codec_read(codec, codec->afg, 0,
4337 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR
4338 /* toggle VREF state based on GPIOx status */
4339 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4340 !!(data & (1 << event->data)));
72474be6 4341 break;
314634bc
TI
4342 }
4343}
4344
2d34e1b3
TI
4345#ifdef CONFIG_PROC_FS
4346static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4347 struct hda_codec *codec, hda_nid_t nid)
4348{
4349 if (nid == codec->afg)
4350 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4351 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4352}
4353
4354static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4355 struct hda_codec *codec,
4356 unsigned int verb)
4357{
4358 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4359 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4360}
4361
4362/* stac92hd71bxx, stac92hd73xx */
4363static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4364 struct hda_codec *codec, hda_nid_t nid)
4365{
4366 stac92hd_proc_hook(buffer, codec, nid);
4367 if (nid == codec->afg)
4368 analog_loop_proc_hook(buffer, codec, 0xfa0);
4369}
4370
4371static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4372 struct hda_codec *codec, hda_nid_t nid)
4373{
4374 if (nid == codec->afg)
4375 analog_loop_proc_hook(buffer, codec, 0xfe0);
4376}
4377
4378static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4379 struct hda_codec *codec, hda_nid_t nid)
4380{
4381 if (nid == codec->afg)
4382 analog_loop_proc_hook(buffer, codec, 0xfeb);
4383}
4384#else
4385#define stac92hd_proc_hook NULL
4386#define stac92hd7x_proc_hook NULL
4387#define stac9205_proc_hook NULL
4388#define stac927x_proc_hook NULL
4389#endif
4390
cb53c626 4391#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M
4392static int stac92xx_resume(struct hda_codec *codec)
4393{
dc81bed1
TI
4394 struct sigmatel_spec *spec = codec->spec;
4395
11b44bbd 4396 stac92xx_set_config_regs(codec);
2c885878 4397 stac92xx_init(codec);
82beb8fd
TI
4398 snd_hda_codec_resume_amp(codec);
4399 snd_hda_codec_resume_cache(codec);
2c885878 4400 /* fake event to set up pins again to override cached values */
dc81bed1 4401 if (spec->hp_detect)
c6e4c666
TI
4402 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4403 STAC_HP_EVENT);
ff6fdc37
M
4404 return 0;
4405}
c6798d2b
MR
4406
4407static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4408{
4409 struct sigmatel_spec *spec = codec->spec;
4410 if (spec->eapd_mask)
4411 stac_gpio_set(codec, spec->gpio_mask,
4412 spec->gpio_dir, spec->gpio_data &
4413 ~spec->eapd_mask);
4414 return 0;
4415}
ff6fdc37
M
4416#endif
4417
2f2f4251
M
4418static struct hda_codec_ops stac92xx_patch_ops = {
4419 .build_controls = stac92xx_build_controls,
4420 .build_pcms = stac92xx_build_pcms,
4421 .init = stac92xx_init,
4422 .free = stac92xx_free,
4e55096e 4423 .unsol_event = stac92xx_unsol_event,
cb53c626 4424#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4425 .suspend = stac92xx_suspend,
ff6fdc37
M
4426 .resume = stac92xx_resume,
4427#endif
2f2f4251
M
4428};
4429
4430static int patch_stac9200(struct hda_codec *codec)
4431{
4432 struct sigmatel_spec *spec;
c7d4b2fa 4433 int err;
2f2f4251 4434
e560d8d8 4435 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
4436 if (spec == NULL)
4437 return -ENOMEM;
4438
4439 codec->spec = spec;
a4eed138 4440 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4441 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI
4442 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4443 stac9200_models,
4444 stac9200_cfg_tbl);
11b44bbd
RF
4445 if (spec->board_config < 0) {
4446 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4447 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4448 } else
4449 err = stac_save_pin_cfgs(codec,
4450 stac9200_brd_tbl[spec->board_config]);
4451 if (err < 0) {
4452 stac92xx_free(codec);
4453 return err;
403d1944 4454 }
2f2f4251
M
4455
4456 spec->multiout.max_channels = 2;
4457 spec->multiout.num_dacs = 1;
4458 spec->multiout.dac_nids = stac9200_dac_nids;
4459 spec->adc_nids = stac9200_adc_nids;
4460 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4461 spec->num_muxes = 1;
8b65727b 4462 spec->num_dmics = 0;
9e05b7a3 4463 spec->num_adcs = 1;
a64135a2 4464 spec->num_pwrs = 0;
c7d4b2fa 4465
58eec423
MCC
4466 if (spec->board_config == STAC_9200_M4 ||
4467 spec->board_config == STAC_9200_M4_2 ||
bf277785 4468 spec->board_config == STAC_9200_OQO)
1194b5b7
TI
4469 spec->init = stac9200_eapd_init;
4470 else
4471 spec->init = stac9200_core_init;
2f2f4251 4472 spec->mixer = stac9200_mixer;
c7d4b2fa 4473
117f257d
TI
4474 if (spec->board_config == STAC_9200_PANASONIC) {
4475 spec->gpio_mask = spec->gpio_dir = 0x09;
4476 spec->gpio_data = 0x00;
4477 }
4478
c7d4b2fa
M
4479 err = stac9200_parse_auto_config(codec);
4480 if (err < 0) {
4481 stac92xx_free(codec);
4482 return err;
4483 }
2f2f4251 4484
2acc9dcb
TI
4485 /* CF-74 has no headphone detection, and the driver should *NOT*
4486 * do detection and HP/speaker toggle because the hardware does it.
4487 */
4488 if (spec->board_config == STAC_9200_PANASONIC)
4489 spec->hp_detect = 0;
4490
2f2f4251
M
4491 codec->patch_ops = stac92xx_patch_ops;
4492
4493 return 0;
4494}
4495
8e21c34c
TD
4496static int patch_stac925x(struct hda_codec *codec)
4497{
4498 struct sigmatel_spec *spec;
4499 int err;
4500
4501 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4502 if (spec == NULL)
4503 return -ENOMEM;
4504
4505 codec->spec = spec;
a4eed138 4506 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4507 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC
4508
4509 /* Check first for codec ID */
4510 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4511 STAC_925x_MODELS,
4512 stac925x_models,
4513 stac925x_codec_id_cfg_tbl);
4514
4515 /* Now checks for PCI ID, if codec ID is not found */
4516 if (spec->board_config < 0)
4517 spec->board_config = snd_hda_check_board_config(codec,
4518 STAC_925x_MODELS,
8e21c34c
TD
4519 stac925x_models,
4520 stac925x_cfg_tbl);
9e507abd 4521 again:
8e21c34c 4522 if (spec->board_config < 0) {
9cb36c2a 4523 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4524 "using BIOS defaults\n");
8e21c34c 4525 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4526 } else
4527 err = stac_save_pin_cfgs(codec,
4528 stac925x_brd_tbl[spec->board_config]);
4529 if (err < 0) {
4530 stac92xx_free(codec);
4531 return err;
8e21c34c
TD
4532 }
4533
4534 spec->multiout.max_channels = 2;
4535 spec->multiout.num_dacs = 1;
4536 spec->multiout.dac_nids = stac925x_dac_nids;
4537 spec->adc_nids = stac925x_adc_nids;
4538 spec->mux_nids = stac925x_mux_nids;
4539 spec->num_muxes = 1;
9e05b7a3 4540 spec->num_adcs = 1;
a64135a2 4541 spec->num_pwrs = 0;
2c11f955
TD
4542 switch (codec->vendor_id) {
4543 case 0x83847632: /* STAC9202 */
4544 case 0x83847633: /* STAC9202D */
4545 case 0x83847636: /* STAC9251 */
4546 case 0x83847637: /* STAC9251D */
f6e9852a 4547 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4548 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI
4549 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4550 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD
4551 break;
4552 default:
4553 spec->num_dmics = 0;
4554 break;
4555 }
8e21c34c
TD
4556
4557 spec->init = stac925x_core_init;
4558 spec->mixer = stac925x_mixer;
4559
4560 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI
4561 if (!err) {
4562 if (spec->board_config < 0) {
4563 printk(KERN_WARNING "hda_codec: No auto-config is "
4564 "available, default to model=ref\n");
4565 spec->board_config = STAC_925x_REF;
4566 goto again;
4567 }
4568 err = -EINVAL;
4569 }
8e21c34c
TD
4570 if (err < 0) {
4571 stac92xx_free(codec);
4572 return err;
4573 }
4574
4575 codec->patch_ops = stac92xx_patch_ops;
4576
4577 return 0;
4578}
4579
e1f0d669
MR
4580static struct hda_input_mux stac92hd73xx_dmux = {
4581 .num_items = 4,
4582 .items = {
4583 { "Analog Inputs", 0x0b },
e1f0d669
MR
4584 { "Digital Mic 1", 0x09 },
4585 { "Digital Mic 2", 0x0a },
2a9c7816 4586 { "CD", 0x08 },
e1f0d669
MR
4587 }
4588};
4589
4590static int patch_stac92hd73xx(struct hda_codec *codec)
4591{
4592 struct sigmatel_spec *spec;
4593 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4594 int err = 0;
c21ca4a8 4595 int num_dacs;
e1f0d669
MR
4596
4597 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4598 if (spec == NULL)
4599 return -ENOMEM;
4600
4601 codec->spec = spec;
e99d32b3 4602 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR
4603 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4604 spec->pin_nids = stac92hd73xx_pin_nids;
4605 spec->board_config = snd_hda_check_board_config(codec,
4606 STAC_92HD73XX_MODELS,
4607 stac92hd73xx_models,
4608 stac92hd73xx_cfg_tbl);
4609again:
4610 if (spec->board_config < 0) {
4611 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4612 " STAC92HD73XX, using BIOS defaults\n");
4613 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4614 } else
4615 err = stac_save_pin_cfgs(codec,
4616 stac92hd73xx_brd_tbl[spec->board_config]);
4617 if (err < 0) {
4618 stac92xx_free(codec);
4619 return err;
e1f0d669
MR
4620 }
4621
c21ca4a8 4622 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR
4623 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4624
c21ca4a8 4625 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR
4626 printk(KERN_WARNING "hda_codec: Could not determine "
4627 "number of channels defaulting to DAC count\n");
c21ca4a8 4628 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4629 }
c21ca4a8 4630 switch (num_dacs) {
e1f0d669
MR
4631 case 0x3: /* 6 Channel */
4632 spec->mixer = stac92hd73xx_6ch_mixer;
4633 spec->init = stac92hd73xx_6ch_core_init;
4634 break;
4635 case 0x4: /* 8 Channel */
e1f0d669
MR
4636 spec->mixer = stac92hd73xx_8ch_mixer;
4637 spec->init = stac92hd73xx_8ch_core_init;
4638 break;
4639 case 0x5: /* 10 Channel */
e1f0d669
MR
4640 spec->mixer = stac92hd73xx_10ch_mixer;
4641 spec->init = stac92hd73xx_10ch_core_init;
c21ca4a8
TI
4642 }
4643 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4644
e1f0d669
MR
4645 spec->aloopback_mask = 0x01;
4646 spec->aloopback_shift = 8;
4647
1cd2224c 4648 spec->digbeep_nid = 0x1c;
e1f0d669
MR
4649 spec->mux_nids = stac92hd73xx_mux_nids;
4650 spec->adc_nids = stac92hd73xx_adc_nids;
4651 spec->dmic_nids = stac92hd73xx_dmic_nids;
4652 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4653 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4654 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4655 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR
4656
4657 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4658 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4659 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR
4660 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4661 sizeof(stac92hd73xx_dmux));
4662
a7662640 4663 switch (spec->board_config) {
6b3ab21e 4664 case STAC_DELL_EQ:
d654a660 4665 spec->init = dell_eq_core_init;
6b3ab21e 4666 /* fallthru */
661cd8fb
TI
4667 case STAC_DELL_M6_AMIC:
4668 case STAC_DELL_M6_DMIC:
4669 case STAC_DELL_M6_BOTH:
2a9c7816 4670 spec->num_smuxes = 0;
2a9c7816
MR
4671 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4672 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4673 spec->eapd_switch = 0;
2a9c7816 4674 spec->num_amps = 1;
6b3ab21e 4675
c21ca4a8 4676 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4677 spec->init = dell_m6_core_init;
661cd8fb
TI
4678 switch (spec->board_config) {
4679 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR
4680 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4681 spec->num_dmics = 0;
2a9c7816 4682 spec->private_dimux.num_items = 1;
a7662640 4683 break;
661cd8fb 4684 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR
4685 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4686 spec->num_dmics = 1;
2a9c7816 4687 spec->private_dimux.num_items = 2;
a7662640 4688 break;
661cd8fb 4689 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR
4690 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4691 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4692 spec->num_dmics = 1;
2a9c7816 4693 spec->private_dimux.num_items = 2;
a7662640
MR
4694 break;
4695 }
4696 break;
4697 default:
4698 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4699 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4700 spec->eapd_switch = 1;
a7662640 4701 }
b2c4f4d7
MR
4702 if (spec->board_config > STAC_92HD73XX_REF) {
4703 /* GPIO0 High = Enable EAPD */
4704 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4705 spec->gpio_data = 0x01;
4706 }
2a9c7816 4707 spec->dinput_mux = &spec->private_dimux;
a7662640 4708
a64135a2
MR
4709 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4710 spec->pwr_nids = stac92hd73xx_pwr_nids;
4711
d9737751 4712 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR
4713
4714 if (!err) {
4715 if (spec->board_config < 0) {
4716 printk(KERN_WARNING "hda_codec: No auto-config is "
4717 "available, default to model=ref\n");
4718 spec->board_config = STAC_92HD73XX_REF;
4719 goto again;
4720 }
4721 err = -EINVAL;
4722 }
4723
4724 if (err < 0) {
4725 stac92xx_free(codec);
4726 return err;
4727 }
4728
9e43f0de
TI
4729 if (spec->board_config == STAC_92HD73XX_NO_JD)
4730 spec->hp_detect = 0;
4731
e1f0d669
MR
4732 codec->patch_ops = stac92xx_patch_ops;
4733
2d34e1b3
TI
4734 codec->proc_widget_hook = stac92hd7x_proc_hook;
4735
e1f0d669
MR
4736 return 0;
4737}
4738
d0513fc6
MR
4739static struct hda_input_mux stac92hd83xxx_dmux = {
4740 .num_items = 3,
4741 .items = {
4742 { "Analog Inputs", 0x03 },
4743 { "Digital Mic 1", 0x04 },
4744 { "Digital Mic 2", 0x05 },
4745 }
4746};
4747
4748static int patch_stac92hd83xxx(struct hda_codec *codec)
4749{
4750 struct sigmatel_spec *spec;
4751 int err;
4752
4753 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4754 if (spec == NULL)
4755 return -ENOMEM;
4756
4757 codec->spec = spec;
0ffa9807 4758 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR
4759 spec->mono_nid = 0x19;
4760 spec->digbeep_nid = 0x21;
4761 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4762 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4763 spec->adc_nids = stac92hd83xxx_adc_nids;
4764 spec->pwr_nids = stac92hd83xxx_pwr_nids;
c15c5060 4765 spec->amp_nids = stac92hd83xxx_amp_nids;
d0513fc6
MR
4766 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4767 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4768 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6
MR
4769
4770 spec->init = stac92hd83xxx_core_init;
4771 switch (codec->vendor_id) {
4772 case 0x111d7605:
d0513fc6
MR
4773 break;
4774 default:
4775 spec->num_pwrs--;
4776 spec->init++; /* switch to config #2 */
d0513fc6
MR
4777 }
4778
4779 spec->mixer = stac92hd83xxx_mixer;
4780 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4781 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4782 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
c15c5060 4783 spec->num_amps = ARRAY_SIZE(stac92hd83xxx_amp_nids);
d0513fc6
MR
4784 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4785 spec->dinput_mux = &stac92hd83xxx_dmux;
4786 spec->pin_nids = stac92hd83xxx_pin_nids;
4787 spec->board_config = snd_hda_check_board_config(codec,
4788 STAC_92HD83XXX_MODELS,
4789 stac92hd83xxx_models,
4790 stac92hd83xxx_cfg_tbl);
4791again:
4792 if (spec->board_config < 0) {
4793 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4794 " STAC92HD83XXX, using BIOS defaults\n");
4795 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4796 } else
4797 err = stac_save_pin_cfgs(codec,
4798 stac92hd83xxx_brd_tbl[spec->board_config]);
4799 if (err < 0) {
4800 stac92xx_free(codec);
4801 return err;
d0513fc6
MR
4802 }
4803
4804 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4805 if (!err) {
4806 if (spec->board_config < 0) {
4807 printk(KERN_WARNING "hda_codec: No auto-config is "
4808 "available, default to model=ref\n");
4809 spec->board_config = STAC_92HD83XXX_REF;
4810 goto again;
4811 }
4812 err = -EINVAL;
4813 }
4814
4815 if (err < 0) {
4816 stac92xx_free(codec);
4817 return err;
4818 }
4819
4820 codec->patch_ops = stac92xx_patch_ops;
4821
2d34e1b3
TI
4822 codec->proc_widget_hook = stac92hd_proc_hook;
4823
d0513fc6
MR
4824 return 0;
4825}
4826
4b33c767
MR
4827static struct hda_input_mux stac92hd71bxx_dmux = {
4828 .num_items = 4,
4829 .items = {
4830 { "Analog Inputs", 0x00 },
4831 { "Mixer", 0x01 },
4832 { "Digital Mic 1", 0x02 },
4833 { "Digital Mic 2", 0x03 },
4834 }
4835};
4836
e035b841
MR
4837static int patch_stac92hd71bxx(struct hda_codec *codec)
4838{
4839 struct sigmatel_spec *spec;
4840 int err = 0;
4841
4842 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4843 if (spec == NULL)
4844 return -ENOMEM;
4845
4846 codec->spec = spec;
8daaaa97 4847 codec->patch_ops = stac92xx_patch_ops;
e035b841 4848 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4849 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4850 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR
4851 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4852 sizeof(stac92hd71bxx_dmux));
e035b841
MR
4853 spec->board_config = snd_hda_check_board_config(codec,
4854 STAC_92HD71BXX_MODELS,
4855 stac92hd71bxx_models,
4856 stac92hd71bxx_cfg_tbl);
4857again:
4858 if (spec->board_config < 0) {
4859 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4860 " STAC92HD71BXX, using BIOS defaults\n");
4861 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4862 } else
4863 err = stac_save_pin_cfgs(codec,
4864 stac92hd71bxx_brd_tbl[spec->board_config]);
4865 if (err < 0) {
4866 stac92xx_free(codec);
4867 return err;
e035b841
MR
4868 }
4869
41c3b648
TI
4870 if (spec->board_config > STAC_92HD71BXX_REF) {
4871 /* GPIO0 = EAPD */
4872 spec->gpio_mask = 0x01;
4873 spec->gpio_dir = 0x01;
4874 spec->gpio_data = 0x01;
4875 }
4876
541eee87
MR
4877 switch (codec->vendor_id) {
4878 case 0x111d76b6: /* 4 Port without Analog Mixer */
4879 case 0x111d76b7:
4880 case 0x111d76b4: /* 6 Port without Analog Mixer */
4881 case 0x111d76b5:
4882 spec->mixer = stac92hd71bxx_mixer;
4883 spec->init = stac92hd71bxx_core_init;
0ffa9807 4884 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4885 break;
aafc4412 4886 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI
4887 switch (spec->board_config) {
4888 case STAC_HP_M4:
72474be6 4889 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI
4890 err = stac_add_event(spec, codec->afg,
4891 STAC_VREF_EVENT, 0x02);
4892 if (err < 0)
4893 return err;
c5d08bb5 4894 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR
4895 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4896 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4897 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4898 AC_USRSP_EN | err);
72474be6
MR
4899 spec->gpio_mask |= 0x02;
4900 break;
4901 }
8daaaa97 4902 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4903 (codec->revision_id & 0xf) == 1)
8daaaa97 4904 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4905
aafc4412
MR
4906 /* no output amps */
4907 spec->num_pwrs = 0;
4908 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4909 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR
4910
4911 /* disable VSW */
4912 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4913 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR
4914 break;
4915 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4916 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4917 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4918
aafc4412
MR
4919 /* no output amps */
4920 spec->num_pwrs = 0;
4921 /* fallthru */
541eee87 4922 default:
4b33c767 4923 spec->dinput_mux = &spec->private_dimux;
541eee87
MR
4924 spec->mixer = stac92hd71bxx_analog_mixer;
4925 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4926 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR
4927 }
4928
4b33c767 4929 spec->aloopback_mask = 0x50;
541eee87
MR
4930 spec->aloopback_shift = 0;
4931
8daaaa97 4932 spec->powerdown_adcs = 1;
1cd2224c 4933 spec->digbeep_nid = 0x26;
e035b841
MR
4934 spec->mux_nids = stac92hd71bxx_mux_nids;
4935 spec->adc_nids = stac92hd71bxx_adc_nids;
4936 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4937 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4938 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4939 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR
4940
4941 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4942 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4943
6a14f585
MR
4944 switch (spec->board_config) {
4945 case STAC_HP_M4:
6a14f585 4946 /* enable internal microphone */
af9f341a 4947 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR
4948 stac92xx_auto_set_pinctl(codec, 0x0e,
4949 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR
4950 /* fallthru */
4951 case STAC_DELL_M4_2:
4952 spec->num_dmics = 0;
4953 spec->num_smuxes = 0;
4954 spec->num_dmuxes = 0;
4955 break;
4956 case STAC_DELL_M4_1:
4957 case STAC_DELL_M4_3:
4958 spec->num_dmics = 1;
4959 spec->num_smuxes = 0;
4960 spec->num_dmuxes = 0;
6a14f585
MR
4961 break;
4962 default:
4963 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4964 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4965 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4966 };
4967
c21ca4a8 4968 spec->multiout.dac_nids = spec->dac_nids;
4b33c767
MR
4969 if (spec->dinput_mux)
4970 spec->private_dimux.num_items +=
4971 spec->num_dmics -
4972 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR
4973
4974 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4975 if (!err) {
4976 if (spec->board_config < 0) {
4977 printk(KERN_WARNING "hda_codec: No auto-config is "
4978 "available, default to model=ref\n");
4979 spec->board_config = STAC_92HD71BXX_REF;
4980 goto again;
4981 }
4982 err = -EINVAL;
4983 }
4984
4985 if (err < 0) {
4986 stac92xx_free(codec);
4987 return err;
4988 }
4989
2d34e1b3
TI
4990 codec->proc_widget_hook = stac92hd7x_proc_hook;
4991
e035b841
MR
4992 return 0;
4993};
4994
2f2f4251
M
4995static int patch_stac922x(struct hda_codec *codec)
4996{
4997 struct sigmatel_spec *spec;
c7d4b2fa 4998 int err;
2f2f4251 4999
e560d8d8 5000 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
5001 if (spec == NULL)
5002 return -ENOMEM;
5003
5004 codec->spec = spec;
a4eed138 5005 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5006 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI
5007 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5008 stac922x_models,
5009 stac922x_cfg_tbl);
536319af 5010 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR
5011 spec->gpio_mask = spec->gpio_dir = 0x03;
5012 spec->gpio_data = 0x03;
3fc24d85
TI
5013 /* Intel Macs have all same PCI SSID, so we need to check
5014 * codec SSID to distinguish the exact models
5015 */
6f0778d8 5016 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5017 switch (codec->subsystem_id) {
5d5d3bc3
IZ
5018
5019 case 0x106b0800:
5020 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5021 break;
5d5d3bc3
IZ
5022 case 0x106b0600:
5023 case 0x106b0700:
5024 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5025 break;
5d5d3bc3
IZ
5026 case 0x106b0e00:
5027 case 0x106b0f00:
5028 case 0x106b1600:
5029 case 0x106b1700:
5030 case 0x106b0200:
5031 case 0x106b1e00:
5032 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5033 break;
5d5d3bc3
IZ
5034 case 0x106b1a00:
5035 case 0x00000100:
5036 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5037 break;
5d5d3bc3
IZ
5038 case 0x106b0a00:
5039 case 0x106b2200:
5040 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5041 break;
536319af
NB
5042 default:
5043 spec->board_config = STAC_INTEL_MAC_V3;
5044 break;
3fc24d85
TI
5045 }
5046 }
5047
9e507abd 5048 again:
11b44bbd
RF
5049 if (spec->board_config < 0) {
5050 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5051 "using BIOS defaults\n");
5052 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5053 } else
5054 err = stac_save_pin_cfgs(codec,
5055 stac922x_brd_tbl[spec->board_config]);
5056 if (err < 0) {
5057 stac92xx_free(codec);
5058 return err;
403d1944 5059 }
2f2f4251 5060
c7d4b2fa
M
5061 spec->adc_nids = stac922x_adc_nids;
5062 spec->mux_nids = stac922x_mux_nids;
2549413e 5063 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5064 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5065 spec->num_dmics = 0;
a64135a2 5066 spec->num_pwrs = 0;
c7d4b2fa
M
5067
5068 spec->init = stac922x_core_init;
2f2f4251 5069 spec->mixer = stac922x_mixer;
c7d4b2fa
M
5070
5071 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5072
3cc08dc6 5073 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI
5074 if (!err) {
5075 if (spec->board_config < 0) {
5076 printk(KERN_WARNING "hda_codec: No auto-config is "
5077 "available, default to model=ref\n");
5078 spec->board_config = STAC_D945_REF;
5079 goto again;
5080 }
5081 err = -EINVAL;
5082 }
3cc08dc6
MP
5083 if (err < 0) {
5084 stac92xx_free(codec);
5085 return err;
5086 }
5087
5088 codec->patch_ops = stac92xx_patch_ops;
5089
807a4636
TI
5090 /* Fix Mux capture level; max to 2 */
5091 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5092 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5093 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5094 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5095 (0 << AC_AMPCAP_MUTE_SHIFT));
5096
3cc08dc6
MP
5097 return 0;
5098}
5099
5100static int patch_stac927x(struct hda_codec *codec)
5101{
5102 struct sigmatel_spec *spec;
5103 int err;
5104
5105 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5106 if (spec == NULL)
5107 return -ENOMEM;
5108
5109 codec->spec = spec;
a4eed138 5110 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5111 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI
5112 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5113 stac927x_models,
5114 stac927x_cfg_tbl);
9e507abd 5115 again:
8e9068b1
MR
5116 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5117 if (spec->board_config < 0)
5118 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5119 "STAC927x, using BIOS defaults\n");
11b44bbd 5120 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5121 } else
5122 err = stac_save_pin_cfgs(codec,
5123 stac927x_brd_tbl[spec->board_config]);
5124 if (err < 0) {
5125 stac92xx_free(codec);
5126 return err;
3cc08dc6
MP
5127 }
5128
1cd2224c 5129 spec->digbeep_nid = 0x23;
8e9068b1
MR
5130 spec->adc_nids = stac927x_adc_nids;
5131 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5132 spec->mux_nids = stac927x_mux_nids;
5133 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR
5134 spec->smux_nids = stac927x_smux_nids;
5135 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5136 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5137 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR
5138 spec->multiout.dac_nids = spec->dac_nids;
5139
81d3dbde 5140 switch (spec->board_config) {
93ed1503 5141 case STAC_D965_3ST:
93ed1503 5142 case STAC_D965_5ST:
8e9068b1 5143 /* GPIO0 High = Enable EAPD */
0fc9dec4 5144 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5145 spec->gpio_data = 0x01;
8e9068b1
MR
5146 spec->num_dmics = 0;
5147
93ed1503 5148 spec->init = d965_core_init;
9e05b7a3 5149 spec->mixer = stac927x_mixer;
81d3dbde 5150 break;
8e9068b1 5151 case STAC_DELL_BIOS:
780c8be4
MR
5152 switch (codec->subsystem_id) {
5153 case 0x10280209:
5154 case 0x1028022e:
5155 /* correct the device field to SPDIF out */
af9f341a 5156 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR
5157 break;
5158 };
03d7ca17 5159 /* configure the analog microphone on some laptops */
af9f341a 5160 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5161 /* correct the front output jack as a hp out */
af9f341a 5162 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5163 /* correct the front input jack as a mic */
af9f341a 5164 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5165 /* fallthru */
8e9068b1
MR
5166 case STAC_DELL_3ST:
5167 /* GPIO2 High = Enable EAPD */
0fc9dec4 5168 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5169 spec->gpio_data = 0x04;
7f16859a
MR
5170 spec->dmic_nids = stac927x_dmic_nids;
5171 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5172
8e9068b1
MR
5173 spec->init = d965_core_init;
5174 spec->mixer = stac927x_mixer;
5175 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5176 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR
5177 break;
5178 default:
b2c4f4d7
MR
5179 if (spec->board_config > STAC_D965_REF) {
5180 /* GPIO0 High = Enable EAPD */
5181 spec->eapd_mask = spec->gpio_mask = 0x01;
5182 spec->gpio_dir = spec->gpio_data = 0x01;
5183 }
8e9068b1
MR
5184 spec->num_dmics = 0;
5185
5186 spec->init = stac927x_core_init;
5187 spec->mixer = stac927x_mixer;
7f16859a
MR
5188 }
5189
a64135a2 5190 spec->num_pwrs = 0;
e1f0d669
MR
5191 spec->aloopback_mask = 0x40;
5192 spec->aloopback_shift = 0;
c0cea0d0 5193 spec->eapd_switch = 1;
8e9068b1 5194
3cc08dc6 5195 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI
5196 if (!err) {
5197 if (spec->board_config < 0) {
5198 printk(KERN_WARNING "hda_codec: No auto-config is "
5199 "available, default to model=ref\n");
5200 spec->board_config = STAC_D965_REF;
5201 goto again;
5202 }
5203 err = -EINVAL;
5204 }
c7d4b2fa
M
5205 if (err < 0) {
5206 stac92xx_free(codec);
5207 return err;
5208 }
2f2f4251
M
5209
5210 codec->patch_ops = stac92xx_patch_ops;
5211
2d34e1b3
TI
5212 codec->proc_widget_hook = stac927x_proc_hook;
5213
52987656
TI
5214 /*
5215 * !!FIXME!!
5216 * The STAC927x seem to require fairly long delays for certain
5217 * command sequences. With too short delays (even if the answer
5218 * is set to RIRB properly), it results in the silence output
5219 * on some hardwares like Dell.
5220 *
5221 * The below flag enables the longer delay (see get_response
5222 * in hda_intel.c).
5223 */
5224 codec->bus->needs_damn_long_delay = 1;
5225
e28d8322
TI
5226 /* no jack detecion for ref-no-jd model */
5227 if (spec->board_config == STAC_D965_REF_NO_JD)
5228 spec->hp_detect = 0;
5229
2f2f4251
M
5230 return 0;
5231}
5232
f3302a59
MP
5233static int patch_stac9205(struct hda_codec *codec)
5234{
5235 struct sigmatel_spec *spec;
8259980e 5236 int err;
f3302a59
MP
5237
5238 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5239 if (spec == NULL)
5240 return -ENOMEM;
5241
5242 codec->spec = spec;
a4eed138 5243 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5244 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI
5245 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5246 stac9205_models,
5247 stac9205_cfg_tbl);
9e507abd 5248 again:
11b44bbd
RF
5249 if (spec->board_config < 0) {
5250 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5251 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5252 } else
5253 err = stac_save_pin_cfgs(codec,
5254 stac9205_brd_tbl[spec->board_config]);
5255 if (err < 0) {
5256 stac92xx_free(codec);
5257 return err;
f3302a59
MP
5258 }
5259
1cd2224c 5260 spec->digbeep_nid = 0x23;
f3302a59 5261 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5262 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5263 spec->mux_nids = stac9205_mux_nids;
2549413e 5264 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR
5265 spec->smux_nids = stac9205_smux_nids;
5266 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5267 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5268 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5269 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5270 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5271 spec->num_pwrs = 0;
f3302a59
MP
5272
5273 spec->init = stac9205_core_init;
5274 spec->mixer = stac9205_mixer;
5275
e1f0d669
MR
5276 spec->aloopback_mask = 0x40;
5277 spec->aloopback_shift = 0;
c0cea0d0 5278 spec->eapd_switch = 1;
f3302a59 5279 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5280
ae0a8ed8 5281 switch (spec->board_config){
ae0a8ed8 5282 case STAC_9205_DELL_M43:
87d48363 5283 /* Enable SPDIF in/out */
af9f341a
TI
5284 stac_change_pin_config(codec, 0x1f, 0x01441030);
5285 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5286
4fe5195c 5287 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI
5288 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5289 if (err < 0)
5290 return err;
c5d08bb5 5291 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR
5292 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5293 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI
5294 AC_VERB_SET_UNSOLICITED_ENABLE,
5295 AC_USRSP_EN | err);
4fe5195c
MR
5296
5297 spec->gpio_dir = 0x0b;
0fc9dec4 5298 spec->eapd_mask = 0x01;
4fe5195c
MR
5299 spec->gpio_mask = 0x1b;
5300 spec->gpio_mute = 0x10;
e2e7d624 5301 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5302 * GPIO3 Low = DRM
87d48363 5303 */
4fe5195c 5304 spec->gpio_data = 0x01;
ae0a8ed8 5305 break;
b2c4f4d7
MR
5306 case STAC_9205_REF:
5307 /* SPDIF-In enabled */
5308 break;
ae0a8ed8
TD
5309 default:
5310 /* GPIO0 High = EAPD */
0fc9dec4 5311 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5312 spec->gpio_data = 0x01;
ae0a8ed8
TD
5313 break;
5314 }
33382403 5315
f3302a59 5316 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI
5317 if (!err) {
5318 if (spec->board_config < 0) {
5319 printk(KERN_WARNING "hda_codec: No auto-config is "
5320 "available, default to model=ref\n");
5321 spec->board_config = STAC_9205_REF;
5322 goto again;
5323 }
5324 err = -EINVAL;
5325 }
f3302a59
MP
5326 if (err < 0) {
5327 stac92xx_free(codec);
5328 return err;
5329 }
5330
5331 codec->patch_ops = stac92xx_patch_ops;
5332
2d34e1b3
TI
5333 codec->proc_widget_hook = stac9205_proc_hook;
5334
f3302a59
MP
5335 return 0;
5336}
5337
db064e50 5338/*
6d859065 5339 * STAC9872 hack
db064e50
TI
5340 */
5341
99ccc560 5342/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI
5343static hda_nid_t vaio_dacs[] = { 0x2 };
5344#define VAIO_HP_DAC 0x5
5345static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5346static hda_nid_t vaio_mux_nids[] = { 0x15 };
5347
5348static struct hda_input_mux vaio_mux = {
a3a2f429 5349 .num_items = 3,
db064e50 5350 .items = {
d773781c 5351 /* { "HP", 0x0 }, */
1624cb9a
TI
5352 { "Mic Jack", 0x1 },
5353 { "Internal Mic", 0x2 },
db064e50
TI
5354 { "PCM", 0x3 },
5355 }
5356};
5357
5358static struct hda_verb vaio_init[] = {
5359 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5360 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI
5361 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5362 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5363 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5364 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5365 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI
5366 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5367 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5368 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5369 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5370 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5371 {}
5372};
5373
6d859065
GM
5374static struct hda_verb vaio_ar_init[] = {
5375 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5376 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5377 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5378 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5379/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5380 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5381 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM
5382 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5383 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5384/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5385 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5386 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5387 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5388 {}
5389};
5390
db064e50 5391static struct snd_kcontrol_new vaio_mixer[] = {
127e82e3
TI
5392 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5393 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5394 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5395 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
db064e50
TI
5396 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5397 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5398 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5399 {
5400 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5401 .name = "Capture Source",
5402 .count = 1,
5403 .info = stac92xx_mux_enum_info,
5404 .get = stac92xx_mux_enum_get,
5405 .put = stac92xx_mux_enum_put,
5406 },
5407 {}
5408};
5409
6d859065 5410static struct snd_kcontrol_new vaio_ar_mixer[] = {
127e82e3
TI
5411 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5412 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5413 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5414 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
6d859065
GM
5415 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5416 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5417 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5418 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5419 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5420 {
5421 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5422 .name = "Capture Source",
5423 .count = 1,
5424 .info = stac92xx_mux_enum_info,
5425 .get = stac92xx_mux_enum_get,
5426 .put = stac92xx_mux_enum_put,
5427 },
5428 {}
5429};
5430
5431static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI
5432 .build_controls = stac92xx_build_controls,
5433 .build_pcms = stac92xx_build_pcms,
5434 .init = stac92xx_init,
5435 .free = stac92xx_free,
cb53c626 5436#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI
5437 .resume = stac92xx_resume,
5438#endif
5439};
5440
72e7b0dd
TI
5441static int stac9872_vaio_init(struct hda_codec *codec)
5442{
5443 int err;
5444
5445 err = stac92xx_init(codec);
5446 if (err < 0)
5447 return err;
5448 if (codec->patch_ops.unsol_event)
5449 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5450 return 0;
5451}
5452
5453static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5454{
e6e3ea25 5455 if (get_pin_presence(codec, 0x0a)) {
72e7b0dd
TI
5456 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5457 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5458 } else {
5459 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5460 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5461 }
5462}
5463
5464static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5465{
5466 switch (res >> 26) {
5467 case STAC_HP_EVENT:
5468 stac9872_vaio_hp_detect(codec, res);
5469 break;
5470 }
5471}
5472
5473static struct hda_codec_ops stac9872_vaio_patch_ops = {
5474 .build_controls = stac92xx_build_controls,
5475 .build_pcms = stac92xx_build_pcms,
5476 .init = stac9872_vaio_init,
5477 .free = stac92xx_free,
5478 .unsol_event = stac9872_vaio_unsol_event,
5479#ifdef CONFIG_PM
5480 .resume = stac92xx_resume,
5481#endif
5482};
5483
6d859065
GM
5484enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5485 CXD9872RD_VAIO,
5486 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5487 STAC9872AK_VAIO,
5488 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5489 STAC9872K_VAIO,
5490 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI
5491 CXD9872AKD_VAIO,
5492 STAC_9872_MODELS,
5493};
5494
5495static const char *stac9872_models[STAC_9872_MODELS] = {
5496 [CXD9872RD_VAIO] = "vaio",
5497 [CXD9872AKD_VAIO] = "vaio-ar",
5498};
5499
5500static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5501 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5502 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5503 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5504 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI
5505 {}
5506};
5507
6d859065 5508static int patch_stac9872(struct hda_codec *codec)
db064e50
TI
5509{
5510 struct sigmatel_spec *spec;
5511 int board_config;
5512
f5fcc13c
TI
5513 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5514 stac9872_models,
5515 stac9872_cfg_tbl);
db064e50
TI
5516 if (board_config < 0)
5517 /* unknown config, let generic-parser do its job... */
5518 return snd_hda_parse_generic_codec(codec);
5519
5520 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5521 if (spec == NULL)
5522 return -ENOMEM;
5523
5524 codec->spec = spec;
5525 switch (board_config) {
6d859065
GM
5526 case CXD9872RD_VAIO:
5527 case STAC9872AK_VAIO:
5528 case STAC9872K_VAIO:
db064e50
TI
5529 spec->mixer = vaio_mixer;
5530 spec->init = vaio_init;
5531 spec->multiout.max_channels = 2;
5532 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5533 spec->multiout.dac_nids = vaio_dacs;
5534 spec->multiout.hp_nid = VAIO_HP_DAC;
5535 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5536 spec->adc_nids = vaio_adcs;
a64135a2 5537 spec->num_pwrs = 0;
db064e50
TI
5538 spec->input_mux = &vaio_mux;
5539 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5540 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5541 break;
6d859065
GM
5542
5543 case CXD9872AKD_VAIO:
5544 spec->mixer = vaio_ar_mixer;
5545 spec->init = vaio_ar_init;
5546 spec->multiout.max_channels = 2;
5547 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5548 spec->multiout.dac_nids = vaio_dacs;
5549 spec->multiout.hp_nid = VAIO_HP_DAC;
5550 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5551 spec->num_pwrs = 0;
6d859065
GM
5552 spec->adc_nids = vaio_adcs;
5553 spec->input_mux = &vaio_mux;
5554 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5555 codec->patch_ops = stac9872_patch_ops;
6d859065 5556 break;
db064e50
TI
5557 }
5558
db064e50
TI
5559 return 0;
5560}
5561
5562
2f2f4251
M
5563/*
5564 * patch entries
5565 */
1289e9e8 5566static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M
5567 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5568 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5569 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5570 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5571 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5572 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5573 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP
5574 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5575 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5576 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5577 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5578 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5579 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP
5580 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5581 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5582 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5583 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5584 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5585 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5586 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5587 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5588 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5589 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD
5590 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5591 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5592 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5593 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5594 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5595 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI
5596 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5597 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM
5598 /* The following does not take into account .id=0x83847661 when subsys =
5599 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5600 * currently not fully supported.
5601 */
5602 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5603 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5604 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP
5605 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5606 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5607 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5608 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5609 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5610 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5611 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5612 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5613 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR
5614 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5615 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5616 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR
5617 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5618 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5619 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR
5620 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5621 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5622 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5623 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5624 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5625 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5626 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5627 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M
5628 {} /* terminator */
5629};
1289e9e8
TI
5630
5631MODULE_ALIAS("snd-hda-codec-id:8384*");
5632MODULE_ALIAS("snd-hda-codec-id:111d*");
5633
5634MODULE_LICENSE("GPL");
5635MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5636
5637static struct hda_codec_preset_list sigmatel_list = {
5638 .preset = snd_hda_preset_sigmatel,
5639 .owner = THIS_MODULE,
5640};
5641
5642static int __init patch_sigmatel_init(void)
5643{
5644 return snd_hda_add_codec_preset(&sigmatel_list);
5645}
5646
5647static void __exit patch_sigmatel_exit(void)
5648{
5649 snd_hda_delete_codec_preset(&sigmatel_list);
5650}
5651
5652module_init(patch_sigmatel_init)
5653module_exit(patch_sigmatel_exit)