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Merge tag 'at91-ab-4.13-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/abellon...
[mirror_ubuntu-bionic-kernel.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
da155d5b 32#include <linux/module.h>
2f2f4251 33#include <sound/core.h>
45a6ac16 34#include <sound/jack.h>
2f2f4251
M		 35#include "hda_codec.h"
36#include "hda_local.h"
128bc4ba 37#include "hda_auto_parser.h"
1cd2224c 38#include "hda_beep.h"
1835a0f9 39#include "hda_jack.h"
36c9db7a 40#include "hda_generic.h"
2f2f4251 41
f5fcc13c
TI		 42enum {
43 STAC_REF,
bf277785 44 STAC_9200_OQO,
dfe495d0
TI		 45 STAC_9200_DELL_D21,
46 STAC_9200_DELL_D22,
47 STAC_9200_DELL_D23,
48 STAC_9200_DELL_M21,
49 STAC_9200_DELL_M22,
50 STAC_9200_DELL_M23,
51 STAC_9200_DELL_M24,
52 STAC_9200_DELL_M25,
53 STAC_9200_DELL_M26,
54 STAC_9200_DELL_M27,
58eec423
MCC		 55 STAC_9200_M4,
56 STAC_9200_M4_2,
117f257d 57 STAC_9200_PANASONIC,
d39a3ae8 58 STAC_9200_EAPD_INIT,
f5fcc13c
TI		 59 STAC_9200_MODELS
60};
61
62enum {
63 STAC_9205_REF,
dfe495d0 64 STAC_9205_DELL_M42,
ae0a8ed8
TD		 65 STAC_9205_DELL_M43,
66 STAC_9205_DELL_M44,
d9a4268e 67 STAC_9205_EAPD,
f5fcc13c
TI		 68 STAC_9205_MODELS
69};
70
e1f0d669 71enum {
9e43f0de 72 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 73 STAC_92HD73XX_REF,
ae709440 74 STAC_92HD73XX_INTEL,
661cd8fb
TI		 75 STAC_DELL_M6_AMIC,
76 STAC_DELL_M6_DMIC,
77 STAC_DELL_M6_BOTH,
6b3ab21e 78 STAC_DELL_EQ,
842ae638 79 STAC_ALIENWARE_M17X,
1de7ca5e 80 STAC_92HD89XX_HP_FRONT_JACK,
7440850c 81 STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
6426460e 82 STAC_92HD73XX_ASUS_MOBO,
e1f0d669
MR		 83 STAC_92HD73XX_MODELS
84};
85
d0513fc6
MR		 86enum {
87 STAC_92HD83XXX_REF,
32ed3f46 88 STAC_92HD83XXX_PWR_REF,
8bb0ac55 89 STAC_DELL_S14,
f7f9bdfa 90 STAC_DELL_VOSTRO_3500,
0c27c180 91 STAC_92HD83XXX_HP_cNB11_INTQUAD,
48315590 92 STAC_HP_DV7_4000,
5556e147 93 STAC_HP_ZEPHYR,
a3e19973 94 STAC_92HD83XXX_HP_LED,
ff8a1e27 95 STAC_92HD83XXX_HP_INV_LED,
62cbde18 96 STAC_92HD83XXX_HP_MIC_LED,
37c367ec 97 STAC_HP_LED_GPIO10,
8d032a8f 98 STAC_92HD83XXX_HEADSET_JACK,
372f8c75 99 STAC_92HD83XXX_HP,
49920427 100 STAC_HP_ENVY_BASS,
d009f3de 101 STAC_HP_BNB13_EQ,
8695a003 102 STAC_HP_ENVY_TS_BASS,
6ab42ff4 103 STAC_HP_ENVY_TS_DAC_BIND,
4227de2a 104 STAC_92HD83XXX_GPIO10_EAPD,
d0513fc6
MR		 105 STAC_92HD83XXX_MODELS
106};
107
e035b841
MR		 108enum {
109 STAC_92HD71BXX_REF,
a7662640
MR		 110 STAC_DELL_M4_1,
111 STAC_DELL_M4_2,
3a7abfd2 112 STAC_DELL_M4_3,
6a14f585 113 STAC_HP_M4,
2a6ce6e5 114 STAC_HP_DV4,
1b0652eb 115 STAC_HP_DV5,
ae6241fb 116 STAC_HP_HDX,
0f6fcb73
TI		 117 STAC_92HD71BXX_HP,
118 STAC_92HD71BXX_NO_DMIC,
119 STAC_92HD71BXX_NO_SMUX,
e035b841
MR		 120 STAC_92HD71BXX_MODELS
121};
122
8b3dfdaf
TI		 123enum {
124 STAC_92HD95_HP_LED,
125 STAC_92HD95_HP_BASS,
126 STAC_92HD95_MODELS
127};
128
8e21c34c
TD		 129enum {
130 STAC_925x_REF,
9cb36c2a
MCC		 131 STAC_M1,
132 STAC_M1_2,
133 STAC_M2,
8e21c34c 134 STAC_M2_2,
9cb36c2a
MCC		 135 STAC_M3,
136 STAC_M5,
137 STAC_M6,
8e21c34c
TD		 138 STAC_925x_MODELS
139};
140
f5fcc13c
TI		 141enum {
142 STAC_D945_REF,
143 STAC_D945GTP3,
144 STAC_D945GTP5,
5d5d3bc3
IZ		 145 STAC_INTEL_MAC_V1,
146 STAC_INTEL_MAC_V2,
147 STAC_INTEL_MAC_V3,
148 STAC_INTEL_MAC_V4,
149 STAC_INTEL_MAC_V5,
0a427846 150 STAC_INTEL_MAC_AUTO,
8c650087 151 STAC_ECS_202,
dfe495d0
TI		 152 STAC_922X_DELL_D81,
153 STAC_922X_DELL_D82,
154 STAC_922X_DELL_M81,
155 STAC_922X_DELL_M82,
0a427846 156 STAC_922X_INTEL_MAC_GPIO,
f5fcc13c
TI		 157 STAC_922X_MODELS
158};
159
160enum {
e28d8322 161 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 162 STAC_D965_REF,
163 STAC_D965_3ST,
164 STAC_D965_5ST,
679d92ed 165 STAC_D965_5ST_NO_FP,
29ac8363 166 STAC_D965_VERBS,
4ff076e5 167 STAC_DELL_3ST,
8e9068b1 168 STAC_DELL_BIOS,
078502b5 169 STAC_NEMO_DEFAULT,
eefb8be4 170 STAC_DELL_BIOS_AMIC,
29ac8363
TI		 171 STAC_DELL_BIOS_SPDIF,
172 STAC_927X_DELL_DMIC,
54930531 173 STAC_927X_VOLKNOB,
f5fcc13c
TI		 174 STAC_927X_MODELS
175};
403d1944 176
307282c8 177enum {
307282c8
TI		 178 STAC_9872_VAIO,
179 STAC_9872_MODELS
180};
181
2f2f4251 182struct sigmatel_spec {
36c9db7a 183 struct hda_gen_spec gen;
c7d4b2fa 184
c0cea0d0 185 unsigned int eapd_switch: 1;
1b0e372d 186 unsigned int linear_tone_beep:1;
8d032a8f 187 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
29ac8363 188 unsigned int volknob_init:1; /* special volume-knob initialization */
36c9db7a 189 unsigned int powerdown_adcs:1;
42875479 190 unsigned int have_spdif_mux:1;
c7d4b2fa 191
4fe5195c 192 /* gpio lines */
0fc9dec4 193 unsigned int eapd_mask;
4fe5195c
MR		 194 unsigned int gpio_mask;
195 unsigned int gpio_dir;
196 unsigned int gpio_data;
197 unsigned int gpio_mute;
86d190e7 198 unsigned int gpio_led;
c357aab0 199 unsigned int gpio_led_polarity;
f1a73746 200 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
45eebda7 201 unsigned int vref_led;
372f8c75 202 int default_polarity;
4fe5195c 203
62cbde18 204 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
7fe30711 205 unsigned int mic_enabled; /* current mic mute state (bitmask) */
62cbde18 206
8daaaa97
MR		 207 /* stream */
208 unsigned int stream_delay;
209
4fe5195c 210 /* analog loopback */
2b63536f 211 const struct snd_kcontrol_new *aloopback_ctl;
36c9db7a 212 unsigned int aloopback;
e1f0d669
MR		 213 unsigned char aloopback_mask;
214 unsigned char aloopback_shift;
8259980e 215
a64135a2 216 /* power management */
c882246d 217 unsigned int power_map_bits;
a64135a2 218 unsigned int num_pwrs;
2b63536f 219 const hda_nid_t *pwr_nids;
36c9db7a
TI		 220 unsigned int active_adcs;
221
222 /* beep widgets */
1cd2224c 223 hda_nid_t anabeep_nid;
42875479
TI		 224
225 /* SPDIF-out mux */
226 const char * const *spdif_labels;
227 struct hda_input_mux spdif_mux;
228 unsigned int cur_smux[2];
2f2f4251
M		 229};
230
c882246d
TI		 231#define AC_VERB_IDT_SET_POWER_MAP 0x7ec
232#define AC_VERB_IDT_GET_POWER_MAP 0xfec
233
2b63536f 234static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
a64135a2
MR		 235 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
236 0x0f, 0x10, 0x11
237};
238
afef2cfa
CC		 239static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
240 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
241 0x0f, 0x10
d0513fc6
MR		 242};
243
2b63536f 244static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
a64135a2
MR		 245 0x0a, 0x0d, 0x0f
246};
247
f3302a59 248
36c9db7a
TI		 249/*
250 * PCM hooks
251 */
252static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
253 struct hda_codec *codec,
254 struct snd_pcm_substream *substream,
255 int action)
8b65727b 256{
8b65727b 257 struct sigmatel_spec *spec = codec->spec;
36c9db7a
TI		 258 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
259 msleep(spec->stream_delay);
8b65727b
MP		 260}
261
36c9db7a
TI		 262static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
263 struct hda_codec *codec,
264 struct snd_pcm_substream *substream,
265 int action)
8b65727b 266{
8b65727b 267 struct sigmatel_spec *spec = codec->spec;
36c9db7a 268 int i, idx = 0;
8b65727b 269
36c9db7a
TI		 270 if (!spec->powerdown_adcs)
271 return;
8b65727b 272
36c9db7a
TI		 273 for (i = 0; i < spec->gen.num_all_adcs; i++) {
274 if (spec->gen.all_adcs[i] == hinfo->nid) {
275 idx = i;
276 break;
277 }
278 }
8b65727b 279
36c9db7a
TI		 280 switch (action) {
281 case HDA_GEN_PCM_ACT_OPEN:
282 msleep(40);
283 snd_hda_codec_write(codec, hinfo->nid, 0,
284 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
285 spec->active_adcs |= (1 << idx);
286 break;
287 case HDA_GEN_PCM_ACT_CLOSE:
288 snd_hda_codec_write(codec, hinfo->nid, 0,
289 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
290 spec->active_adcs &= ~(1 << idx);
291 break;
292 }
8b65727b
MP		 293}
294
36c9db7a
TI		 295/*
296 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
297 * funky external mute control using GPIO pins.
298 */
d9737751 299
36c9db7a
TI		 300static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
301 unsigned int dir_mask, unsigned int data)
d9737751 302{
36c9db7a 303 unsigned int gpiostate, gpiomask, gpiodir;
7639a06c 304 hda_nid_t fg = codec->core.afg;
d9737751 305
4e76a883 306 codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
36c9db7a 307
7639a06c 308 gpiostate = snd_hda_codec_read(codec, fg, 0,
36c9db7a
TI		 309 AC_VERB_GET_GPIO_DATA, 0);
310 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
311
7639a06c 312 gpiomask = snd_hda_codec_read(codec, fg, 0,
36c9db7a
TI		 313 AC_VERB_GET_GPIO_MASK, 0);
314 gpiomask |= mask;
315
7639a06c 316 gpiodir = snd_hda_codec_read(codec, fg, 0,
36c9db7a
TI		 317 AC_VERB_GET_GPIO_DIRECTION, 0);
318 gpiodir |= dir_mask;
319
320 /* Configure GPIOx as CMOS */
7639a06c 321 snd_hda_codec_write(codec, fg, 0, 0x7e7, 0);
36c9db7a 322
7639a06c 323 snd_hda_codec_write(codec, fg, 0,
36c9db7a 324 AC_VERB_SET_GPIO_MASK, gpiomask);
7639a06c 325 snd_hda_codec_read(codec, fg, 0,
36c9db7a
TI		 326 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
327
328 msleep(1);
329
7639a06c 330 snd_hda_codec_read(codec, fg, 0,
36c9db7a 331 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
d9737751
MR		 332}
333
36c9db7a 334/* hook for controlling mic-mute LED GPIO */
a90229e0 335static void stac_capture_led_hook(struct hda_codec *codec,
7fe30711
TI		 336 struct snd_kcontrol *kcontrol,
337 struct snd_ctl_elem_value *ucontrol)
d9737751 338{
d9737751 339 struct sigmatel_spec *spec = codec->spec;
7fe30711
TI		 340 unsigned int mask;
341 bool cur_mute, prev_mute;
00ef50c2 342
7fe30711 343 if (!kcontrol || !ucontrol)
a90229e0
TI		 344 return;
345
7fe30711
TI		 346 mask = 1U << snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
347 prev_mute = !spec->mic_enabled;
348 if (ucontrol->value.integer.value[0] ||
349 ucontrol->value.integer.value[1])
350 spec->mic_enabled |= mask;
351 else
352 spec->mic_enabled &= ~mask;
353 cur_mute = !spec->mic_enabled;
354 if (cur_mute != prev_mute) {
355 if (cur_mute)
36c9db7a 356 spec->gpio_data |= spec->mic_mute_led_gpio;
00ef50c2 357 else
36c9db7a
TI		 358 spec->gpio_data &= ~spec->mic_mute_led_gpio;
359 stac_gpio_set(codec, spec->gpio_mask,
360 spec->gpio_dir, spec->gpio_data);
00ef50c2 361 }
d9737751
MR		 362}
363
45eebda7
VK		 364static int stac_vrefout_set(struct hda_codec *codec,
365 hda_nid_t nid, unsigned int new_vref)
366{
367 int error, pinctl;
368
4e76a883 369 codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref);
45eebda7
VK		 370 pinctl = snd_hda_codec_read(codec, nid, 0,
371 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
372
373 if (pinctl < 0)
374 return pinctl;
375
376 pinctl &= 0xff;
377 pinctl &= ~AC_PINCTL_VREFEN;
378 pinctl |= (new_vref & AC_PINCTL_VREFEN);
379
cdd03ced 380 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
45eebda7
VK		 381 if (error < 0)
382 return error;
383
384 return 1;
385}
386
dfc6e469
TI		 387/* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
388/* this hook is set in stac_setup_gpio() */
389static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
390 hda_nid_t nid,
391 unsigned int power_state)
392{
7639a06c 393 if (nid == codec->core.afg && power_state == AC_PWRST_D3)
dfc6e469
TI		 394 return AC_PWRST_D1;
395 return snd_hda_gen_path_power_filter(codec, nid, power_state);
396}
397
36c9db7a
TI		 398/* update mute-LED accoring to the master switch */
399static void stac_update_led_status(struct hda_codec *codec, int enabled)
2f2f4251 400{
2f2f4251 401 struct sigmatel_spec *spec = codec->spec;
36c9db7a 402 int muted = !enabled;
2f2f4251 403
36c9db7a
TI		 404 if (!spec->gpio_led)
405 return;
2f2f4251 406
36c9db7a
TI		 407 /* LED state is inverted on these systems */
408 if (spec->gpio_led_polarity)
409 muted = !muted;
2f2f4251 410
36c9db7a
TI		 411 if (!spec->vref_mute_led_nid) {
412 if (muted)
413 spec->gpio_data |= spec->gpio_led;
414 else
415 spec->gpio_data &= ~spec->gpio_led;
416 stac_gpio_set(codec, spec->gpio_mask,
417 spec->gpio_dir, spec->gpio_data);
5207e10e 418 } else {
36c9db7a
TI		 419 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
420 stac_vrefout_set(codec, spec->vref_mute_led_nid,
421 spec->vref_led);
5207e10e 422 }
2f2f4251
M		 423}
424
36c9db7a
TI		 425/* vmaster hook to update mute LED */
426static void stac_vmaster_hook(void *private_data, int val)
b22b4821 427{
36c9db7a 428 stac_update_led_status(private_data, val);
b22b4821
MR		 429}
430
36c9db7a
TI		 431/* automute hook to handle GPIO mute and EAPD updates */
432static void stac_update_outputs(struct hda_codec *codec)
b22b4821 433{
b22b4821
MR		 434 struct sigmatel_spec *spec = codec->spec;
435
36c9db7a
TI		 436 if (spec->gpio_mute)
437 spec->gen.master_mute =
7639a06c 438 !(snd_hda_codec_read(codec, codec->core.afg, 0,
36c9db7a 439 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
b22b4821 440
36c9db7a 441 snd_hda_gen_update_outputs(codec);
b22b4821 442
36c9db7a
TI		 443 if (spec->eapd_mask && spec->eapd_switch) {
444 unsigned int val = spec->gpio_data;
445 if (spec->gen.speaker_muted)
446 val &= ~spec->eapd_mask;
447 else
448 val |= spec->eapd_mask;
1ea9a69d
TI		 449 if (spec->gpio_data != val) {
450 spec->gpio_data = val;
36c9db7a
TI		 451 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
452 val);
1ea9a69d 453 }
36c9db7a 454 }
b22b4821
MR		 455}
456
36c9db7a
TI		 457static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
458 bool enable, bool do_write)
5f10c4a9 459{
5f10c4a9 460 struct sigmatel_spec *spec = codec->spec;
36c9db7a 461 unsigned int idx, val;
5f10c4a9 462
36c9db7a
TI		 463 for (idx = 0; idx < spec->num_pwrs; idx++) {
464 if (spec->pwr_nids[idx] == nid)
465 break;
466 }
467 if (idx >= spec->num_pwrs)
468 return;
469
470 idx = 1 << idx;
471
472 val = spec->power_map_bits;
473 if (enable)
474 val &= ~idx;
475 else
476 val |= idx;
477
478 /* power down unused output ports */
479 if (val != spec->power_map_bits) {
480 spec->power_map_bits = val;
481 if (do_write)
7639a06c 482 snd_hda_codec_write(codec, codec->core.afg, 0,
36c9db7a
TI		 483 AC_VERB_IDT_SET_POWER_MAP, val);
484 }
485}
486
487/* update power bit per jack plug/unplug */
488static void jack_update_power(struct hda_codec *codec,
1a4f69d5 489 struct hda_jack_callback *jack)
36c9db7a
TI		 490{
491 struct sigmatel_spec *spec = codec->spec;
492 int i;
493
494 if (!spec->num_pwrs)
495 return;
496
2ebab40e
TI		 497 if (jack && jack->nid) {
498 stac_toggle_power_map(codec, jack->nid,
499 snd_hda_jack_detect(codec, jack->nid),
36c9db7a
TI		 500 true);
501 return;
502 }
503
504 /* update all jacks */
505 for (i = 0; i < spec->num_pwrs; i++) {
506 hda_nid_t nid = spec->pwr_nids[i];
1a4f69d5 507 if (!snd_hda_jack_tbl_get(codec, nid))
36c9db7a 508 continue;
62f949bf
TI		 509 stac_toggle_power_map(codec, nid,
510 snd_hda_jack_detect(codec, nid),
511 false);
36c9db7a
TI		 512 }
513
7639a06c
TI		 514 snd_hda_codec_write(codec, codec->core.afg, 0,
515 AC_VERB_IDT_SET_POWER_MAP,
36c9db7a
TI		 516 spec->power_map_bits);
517}
518
1a4f69d5
TI		 519static void stac_vref_event(struct hda_codec *codec,
520 struct hda_jack_callback *event)
36c9db7a
TI		 521{
522 unsigned int data;
523
7639a06c 524 data = snd_hda_codec_read(codec, codec->core.afg, 0,
36c9db7a
TI		 525 AC_VERB_GET_GPIO_DATA, 0);
526 /* toggle VREF state based on GPIOx status */
7639a06c 527 snd_hda_codec_write(codec, codec->core.afg, 0, 0x7e0,
36c9db7a
TI		 528 !!(data & (1 << event->private_data)));
529}
530
531/* initialize the power map and enable the power event to jacks that
532 * haven't been assigned to automute
533 */
534static void stac_init_power_map(struct hda_codec *codec)
535{
536 struct sigmatel_spec *spec = codec->spec;
537 int i;
538
539 for (i = 0; i < spec->num_pwrs; i++) {
540 hda_nid_t nid = spec->pwr_nids[i];
541 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
542 def_conf = get_defcfg_connect(def_conf);
36c9db7a 543 if (def_conf == AC_JACK_PORT_COMPLEX &&
7a9744cb
TI		 544 spec->vref_mute_led_nid != nid &&
545 is_jack_detectable(codec, nid)) {
36c9db7a 546 snd_hda_jack_detect_enable_callback(codec, nid,
36c9db7a
TI		 547 jack_update_power);
548 } else {
549 if (def_conf == AC_JACK_PORT_NONE)
550 stac_toggle_power_map(codec, nid, false, false);
551 else
552 stac_toggle_power_map(codec, nid, true, false);
553 }
554 }
555}
556
557/*
558 */
559
560static inline bool get_int_hint(struct hda_codec *codec, const char *key,
561 int *valp)
562{
563 return !snd_hda_get_int_hint(codec, key, valp);
564}
565
566/* override some hints from the hwdep entry */
567static void stac_store_hints(struct hda_codec *codec)
568{
569 struct sigmatel_spec *spec = codec->spec;
570 int val;
571
572 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
573 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
574 spec->gpio_mask;
575 }
576 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
36c9db7a 577 spec->gpio_dir &= spec->gpio_mask;
c507de88
TI		 578 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
579 spec->gpio_data &= spec->gpio_mask;
36c9db7a
TI		 580 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
581 spec->eapd_mask &= spec->gpio_mask;
582 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
583 spec->gpio_mute &= spec->gpio_mask;
584 val = snd_hda_get_bool_hint(codec, "eapd_switch");
585 if (val >= 0)
586 spec->eapd_switch = val;
587}
588
589/*
590 * loopback controls
591 */
592
593#define stac_aloopback_info snd_ctl_boolean_mono_info
594
595static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
596 struct snd_ctl_elem_value *ucontrol)
597{
598 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
599 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
600 struct sigmatel_spec *spec = codec->spec;
601
602 ucontrol->value.integer.value[0] = !!(spec->aloopback &
603 (spec->aloopback_mask << idx));
604 return 0;
5f10c4a9
ML		 605}
606
36c9db7a
TI		 607static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
608 struct snd_ctl_elem_value *ucontrol)
5f10c4a9
ML		 609{
610 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
611 struct sigmatel_spec *spec = codec->spec;
e1f0d669 612 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 613 unsigned int dac_mode;
e1f0d669 614 unsigned int val, idx_val;
5f10c4a9 615
e1f0d669
MR		 616 idx_val = spec->aloopback_mask << idx;
617 if (ucontrol->value.integer.value[0])
618 val = spec->aloopback | idx_val;
619 else
620 val = spec->aloopback & ~idx_val;
68ea7b2f 621 if (spec->aloopback == val)
5f10c4a9
ML		 622 return 0;
623
68ea7b2f 624 spec->aloopback = val;
5f10c4a9 625
e1f0d669
MR		 626 /* Only return the bits defined by the shift value of the
627 * first two bytes of the mask
628 */
7639a06c 629 dac_mode = snd_hda_codec_read(codec, codec->core.afg, 0,
e1f0d669
MR		 630 kcontrol->private_value & 0xFFFF, 0x0);
631 dac_mode >>= spec->aloopback_shift;
5f10c4a9 632
e1f0d669 633 if (spec->aloopback & idx_val) {
5f10c4a9 634 snd_hda_power_up(codec);
e1f0d669 635 dac_mode |= idx_val;
5f10c4a9
ML		 636 } else {
637 snd_hda_power_down(codec);
e1f0d669 638 dac_mode &= ~idx_val;
5f10c4a9
ML		 639 }
640
7639a06c 641 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
5f10c4a9
ML		 642 kcontrol->private_value >> 16, dac_mode);
643
644 return 1;
645}
646
e1f0d669 647#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 648 { \
649 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
650 .name = "Analog Loopback", \
e1f0d669 651 .count = cnt, \
36c9db7a
TI		 652 .info = stac_aloopback_info, \
653 .get = stac_aloopback_get, \
654 .put = stac_aloopback_put, \
5f10c4a9
ML		 655 .private_value = verb_read | (verb_write << 16), \
656 }
657
36c9db7a
TI		 658/*
659 * Mute LED handling on HP laptops
660 */
2fc99890 661
36c9db7a
TI		 662/* check whether it's a HP laptop with a docking port */
663static bool hp_bnb2011_with_dock(struct hda_codec *codec)
664{
7639a06c
TI		 665 if (codec->core.vendor_id != 0x111d7605 &&
666 codec->core.vendor_id != 0x111d76d1)
36c9db7a 667 return false;
2f2f4251 668
7639a06c 669 switch (codec->core.subsystem_id) {
36c9db7a
TI		 670 case 0x103c1618:
671 case 0x103c1619:
672 case 0x103c161a:
673 case 0x103c161b:
674 case 0x103c161c:
675 case 0x103c161d:
676 case 0x103c161e:
677 case 0x103c161f:
d78d7a90 678
36c9db7a
TI		 679 case 0x103c162a:
680 case 0x103c162b:
e1f0d669 681
36c9db7a
TI		 682 case 0x103c1630:
683 case 0x103c1631:
d78d7a90 684
36c9db7a
TI		 685 case 0x103c1633:
686 case 0x103c1634:
687 case 0x103c1635:
d0513fc6 688
36c9db7a
TI		 689 case 0x103c3587:
690 case 0x103c3588:
691 case 0x103c3589:
692 case 0x103c358a:
541eee87 693
36c9db7a
TI		 694 case 0x103c3667:
695 case 0x103c3668:
696 case 0x103c3669:
2f2f4251 697
36c9db7a
TI		 698 return true;
699 }
700 return false;
701}
1697055e 702
36c9db7a
TI		 703static bool hp_blike_system(u32 subsystem_id)
704{
705 switch (subsystem_id) {
c932b98c 706 case 0x103c1473: /* HP ProBook 6550b */
36c9db7a
TI		 707 case 0x103c1520:
708 case 0x103c1521:
709 case 0x103c1523:
710 case 0x103c1524:
711 case 0x103c1525:
712 case 0x103c1722:
713 case 0x103c1723:
714 case 0x103c1724:
715 case 0x103c1725:
716 case 0x103c1726:
717 case 0x103c1727:
718 case 0x103c1728:
719 case 0x103c1729:
720 case 0x103c172a:
721 case 0x103c172b:
722 case 0x103c307e:
723 case 0x103c307f:
724 case 0x103c3080:
725 case 0x103c3081:
726 case 0x103c7007:
727 case 0x103c7008:
728 return true;
729 }
730 return false;
731}
d9737751 732
36c9db7a
TI		 733static void set_hp_led_gpio(struct hda_codec *codec)
734{
735 struct sigmatel_spec *spec = codec->spec;
736 unsigned int gpio;
2134ea4f 737
36c9db7a
TI		 738 if (spec->gpio_led)
739 return;
2faa3bf1 740
7639a06c 741 gpio = snd_hda_param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP);
36c9db7a
TI		 742 gpio &= AC_GPIO_IO_COUNT;
743 if (gpio > 3)
744 spec->gpio_led = 0x08; /* GPIO 3 */
745 else
746 spec->gpio_led = 0x01; /* GPIO 0 */
2faa3bf1
TI		 747}
748
36c9db7a
TI		 749/*
750 * This method searches for the mute LED GPIO configuration
751 * provided as OEM string in SMBIOS. The format of that string
752 * is HP_Mute_LED_P_G or HP_Mute_LED_P
753 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
754 * that corresponds to the NOT muted state of the master volume
755 * and G is the index of the GPIO to use as the mute LED control (0..9)
756 * If _G portion is missing it is assigned based on the codec ID
757 *
758 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
759 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
760 *
761 *
762 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
763 * SMBIOS - at least the ones I have seen do not have them - which include
764 * my own system (HP Pavilion dv6-1110ax) and my cousin's
765 * HP Pavilion dv9500t CTO.
766 * Need more information on whether it is true across the entire series.
767 * -- kunal
768 */
769static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
2f2f4251
M		 770{
771 struct sigmatel_spec *spec = codec->spec;
36c9db7a 772 const struct dmi_device *dev = NULL;
2f2f4251 773
36c9db7a
TI		 774 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
775 get_int_hint(codec, "gpio_led_polarity",
776 &spec->gpio_led_polarity);
777 return 1;
6479c631 778 }
c7d4b2fa 779
36c9db7a 780 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
e7fc4960 781 if (sscanf(dev->name, "HP_Mute_LED_%u_%x",
36c9db7a
TI		 782 &spec->gpio_led_polarity,
783 &spec->gpio_led) == 2) {
784 unsigned int max_gpio;
7639a06c 785 max_gpio = snd_hda_param_read(codec, codec->core.afg,
36c9db7a
TI		 786 AC_PAR_GPIO_CAP);
787 max_gpio &= AC_GPIO_IO_COUNT;
788 if (spec->gpio_led < max_gpio)
789 spec->gpio_led = 1 << spec->gpio_led;
790 else
791 spec->vref_mute_led_nid = spec->gpio_led;
792 return 1;
793 }
e7fc4960 794 if (sscanf(dev->name, "HP_Mute_LED_%u",
36c9db7a
TI		 795 &spec->gpio_led_polarity) == 1) {
796 set_hp_led_gpio(codec);
797 return 1;
798 }
799 /* BIOS bug: unfilled OEM string */
800 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
801 set_hp_led_gpio(codec);
802 if (default_polarity >= 0)
803 spec->gpio_led_polarity = default_polarity;
804 else
805 spec->gpio_led_polarity = 1;
806 return 1;
00ef50c2 807 }
d9737751 808 }
c7d4b2fa 809
36c9db7a
TI		 810 /*
811 * Fallback case - if we don't find the DMI strings,
812 * we statically set the GPIO - if not a B-series system
813 * and default polarity is provided
814 */
7639a06c 815 if (!hp_blike_system(codec->core.subsystem_id) &&
36c9db7a
TI		 816 (default_polarity == 0 || default_polarity == 1)) {
817 set_hp_led_gpio(codec);
818 spec->gpio_led_polarity = default_polarity;
819 return 1;
dabbed6f 820 }
36c9db7a
TI		 821 return 0;
822}
2134ea4f 823
303985f8
DH		 824/* check whether a built-in speaker is included in parsed pins */
825static bool has_builtin_speaker(struct hda_codec *codec)
826{
827 struct sigmatel_spec *spec = codec->spec;
828 hda_nid_t *nid_pin;
829 int nids, i;
830
831 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
832 nid_pin = spec->gen.autocfg.line_out_pins;
833 nids = spec->gen.autocfg.line_outs;
834 } else {
835 nid_pin = spec->gen.autocfg.speaker_pins;
836 nids = spec->gen.autocfg.speaker_outs;
837 }
838
839 for (i = 0; i < nids; i++) {
840 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
841 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
842 return true;
843 }
844 return false;
845}
846
36c9db7a
TI		 847/*
848 * PC beep controls
849 */
2faa3bf1 850
36c9db7a
TI		 851/* create PC beep volume controls */
852static int stac_auto_create_beep_ctls(struct hda_codec *codec,
853 hda_nid_t nid)
854{
855 struct sigmatel_spec *spec = codec->spec;
856 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
857 struct snd_kcontrol_new *knew;
858 static struct snd_kcontrol_new abeep_mute_ctl =
859 HDA_CODEC_MUTE(NULL, 0, 0, 0);
860 static struct snd_kcontrol_new dbeep_mute_ctl =
861 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
862 static struct snd_kcontrol_new beep_vol_ctl =
863 HDA_CODEC_VOLUME(NULL, 0, 0, 0);
2faa3bf1 864
36c9db7a
TI		 865 /* check for mute support for the the amp */
866 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
867 const struct snd_kcontrol_new *temp;
868 if (spec->anabeep_nid == nid)
869 temp = &abeep_mute_ctl;
870 else
871 temp = &dbeep_mute_ctl;
872 knew = snd_hda_gen_add_kctl(&spec->gen,
873 "Beep Playback Switch", temp);
874 if (!knew)
875 return -ENOMEM;
876 knew->private_value =
877 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
2134ea4f
TI		 878 }
879
36c9db7a
TI		 880 /* check to see if there is volume support for the amp */
881 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
882 knew = snd_hda_gen_add_kctl(&spec->gen,
883 "Beep Playback Volume",
884 &beep_vol_ctl);
885 if (!knew)
886 return -ENOMEM;
887 knew->private_value =
888 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
d78d7a90 889 }
36c9db7a
TI		 890 return 0;
891}
d78d7a90 892
36c9db7a
TI		 893#ifdef CONFIG_SND_HDA_INPUT_BEEP
894#define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
e4973e1e 895
36c9db7a
TI		 896static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
897 struct snd_ctl_elem_value *ucontrol)
898{
899 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
900 ucontrol->value.integer.value[0] = codec->beep->enabled;
901 return 0;
902}
e4973e1e 903
36c9db7a
TI		 904static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
905 struct snd_ctl_elem_value *ucontrol)
906{
907 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
908 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
2f2f4251
M		 909}
910
36c9db7a
TI		 911static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
912 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
913 .name = "Beep Playback Switch",
914 .info = stac_dig_beep_switch_info,
915 .get = stac_dig_beep_switch_get,
916 .put = stac_dig_beep_switch_put,
2f2f4251
M		 917};
918
36c9db7a
TI		 919static int stac_beep_switch_ctl(struct hda_codec *codec)
920{
921 struct sigmatel_spec *spec = codec->spec;
922
923 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
924 return -ENOMEM;
925 return 0;
926}
927#endif
928
42875479
TI		 929/*
930 * SPDIF-out mux controls
931 */
932
933static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
934 struct snd_ctl_elem_info *uinfo)
935{
936 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
937 struct sigmatel_spec *spec = codec->spec;
938 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
939}
940
941static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
942 struct snd_ctl_elem_value *ucontrol)
943{
944 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
945 struct sigmatel_spec *spec = codec->spec;
946 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
947
948 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
949 return 0;
950}
951
952static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
953 struct snd_ctl_elem_value *ucontrol)
954{
955 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
956 struct sigmatel_spec *spec = codec->spec;
957 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
958
959 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
960 spec->gen.autocfg.dig_out_pins[smux_idx],
961 &spec->cur_smux[smux_idx]);
962}
963
964static struct snd_kcontrol_new stac_smux_mixer = {
965 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
966 .name = "IEC958 Playback Source",
967 /* count set later */
968 .info = stac_smux_enum_info,
969 .get = stac_smux_enum_get,
970 .put = stac_smux_enum_put,
971};
972
973static const char * const stac_spdif_labels[] = {
974 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
975};
976
977static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
978{
979 struct sigmatel_spec *spec = codec->spec;
980 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
981 const char * const *labels = spec->spdif_labels;
982 struct snd_kcontrol_new *kctl;
983 int i, num_cons;
984
985 if (cfg->dig_outs < 1)
986 return 0;
987
988 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
989 if (num_cons <= 1)
990 return 0;
991
992 if (!labels)
993 labels = stac_spdif_labels;
994 for (i = 0; i < num_cons; i++) {
995 if (snd_BUG_ON(!labels[i]))
996 return -EINVAL;
6194b99d 997 snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL);
42875479
TI		 998 }
999
1000 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
1001 if (!kctl)
1002 return -ENOMEM;
1003 kctl->count = cfg->dig_outs;
1004
1005 return 0;
1006}
1007
36c9db7a
TI		 1008/*
1009 */
1010
1011static const struct hda_verb stac9200_core_init[] = {
1012 /* set dac0mux for dac converter */
1013 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
d39a3ae8 1014 {}
58eec423 1015};
d39a3ae8 1016
36c9db7a
TI		 1017static const struct hda_verb stac9200_eapd_init[] = {
1018 /* set dac0mux for dac converter */
1019 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1020 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
d39a3ae8 1021 {}
58eec423
MCC		 1022};
1023
36c9db7a
TI		 1024static const struct hda_verb dell_eq_core_init[] = {
1025 /* set master volume to max value without distortion
1026 * and direct control */
1027 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d39a3ae8 1028 {}
dfe495d0
TI		 1029};
1030
36c9db7a
TI		 1031static const struct hda_verb stac92hd73xx_core_init[] = {
1032 /* set master volume and direct control */
1033 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d39a3ae8 1034 {}
dfe495d0
TI		 1035};
1036
36c9db7a
TI		 1037static const struct hda_verb stac92hd83xxx_core_init[] = {
1038 /* power state controls amps */
1039 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
1040 {}
1041};
1042
1043static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1044 { 0x22, 0x785, 0x43 },
1045 { 0x22, 0x782, 0xe0 },
1046 { 0x22, 0x795, 0x00 },
1047 {}
1048};
1049
1050static const struct hda_verb stac92hd71bxx_core_init[] = {
1051 /* set master volume and direct control */
1052 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1053 {}
1054};
1055
a551d914 1056static const hda_nid_t stac92hd71bxx_unmute_nids[] = {
36c9db7a 1057 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
a551d914 1058 0x0f, 0x0a, 0x0d, 0
36c9db7a
TI		 1059};
1060
1061static const struct hda_verb stac925x_core_init[] = {
1062 /* set dac0mux for dac converter */
1063 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1064 /* mute the master volume */
1065 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1066 {}
1067};
1068
1069static const struct hda_verb stac922x_core_init[] = {
1070 /* set master volume and direct control */
1071 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1072 {}
1073};
1074
1075static const struct hda_verb d965_core_init[] = {
1076 /* unmute node 0x1b */
1077 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1078 /* select node 0x03 as DAC */
1079 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1080 {}
1081};
1082
1083static const struct hda_verb dell_3st_core_init[] = {
1084 /* don't set delta bit */
1085 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1086 /* unmute node 0x1b */
1087 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1088 /* select node 0x03 as DAC */
1089 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1090 {}
1091};
1092
1093static const struct hda_verb stac927x_core_init[] = {
1094 /* set master volume and direct control */
1095 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1096 /* enable analog pc beep path */
1097 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1098 {}
1099};
1100
1101static const struct hda_verb stac927x_volknob_core_init[] = {
1102 /* don't set delta bit */
1103 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1104 /* enable analog pc beep path */
1105 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1106 {}
1107};
1108
1109static const struct hda_verb stac9205_core_init[] = {
1110 /* set master volume and direct control */
1111 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1112 /* enable analog pc beep path */
1113 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1114 {}
1115};
1116
1117static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1118 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1119
1120static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1121 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1122
1123static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1124 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1125
1126static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1127 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1128
1129static const struct snd_kcontrol_new stac9205_loopback =
1130 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1131
1132static const struct snd_kcontrol_new stac927x_loopback =
1133 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1134
1135static const struct hda_pintbl ref9200_pin_configs[] = {
1136 { 0x08, 0x01c47010 },
1137 { 0x09, 0x01447010 },
1138 { 0x0d, 0x0221401f },
1139 { 0x0e, 0x01114010 },
1140 { 0x0f, 0x02a19020 },
1141 { 0x10, 0x01a19021 },
1142 { 0x11, 0x90100140 },
1143 { 0x12, 0x01813122 },
1144 {}
1145};
1146
1147static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1148 { 0x08, 0x400000fe },
1149 { 0x09, 0x404500f4 },
1150 { 0x0d, 0x400100f0 },
1151 { 0x0e, 0x90110010 },
1152 { 0x0f, 0x400100f1 },
1153 { 0x10, 0x02a1902e },
1154 { 0x11, 0x500000f2 },
1155 { 0x12, 0x500000f3 },
1156 {}
1157};
1158
1159static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1160 { 0x08, 0x400000fe },
1161 { 0x09, 0x404500f4 },
1162 { 0x0d, 0x400100f0 },
1163 { 0x0e, 0x90110010 },
1164 { 0x0f, 0x400100f1 },
1165 { 0x10, 0x02a1902e },
1166 { 0x11, 0x500000f2 },
1167 { 0x12, 0x500000f3 },
1168 {}
1169};
1170
1171/*
1172 STAC 9200 pin configs for
1173 102801A8
1174 102801DE
1175 102801E8
1176*/
1177static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1178 { 0x08, 0x400001f0 },
1179 { 0x09, 0x400001f1 },
1180 { 0x0d, 0x02214030 },
1181 { 0x0e, 0x01014010 },
1182 { 0x0f, 0x02a19020 },
1183 { 0x10, 0x01a19021 },
1184 { 0x11, 0x90100140 },
1185 { 0x12, 0x01813122 },
1186 {}
1187};
1188
1189/*
1190 STAC 9200 pin configs for
1191 102801C0
1192 102801C1
1193*/
1194static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1195 { 0x08, 0x400001f0 },
1196 { 0x09, 0x400001f1 },
1197 { 0x0d, 0x0221401f },
1198 { 0x0e, 0x01014010 },
1199 { 0x0f, 0x01813020 },
1200 { 0x10, 0x02a19021 },
1201 { 0x11, 0x90100140 },
1202 { 0x12, 0x400001f2 },
1203 {}
1204};
1205
1206/*
dfe495d0
TI		 1207 STAC 9200 pin configs for
1208 102801C4 (Dell Dimension E310)
1209 102801C5
1210 102801C7
1211 102801D9
1212 102801DA
1213 102801E3
1214*/
d39a3ae8
TI		 1215static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1216 { 0x08, 0x400001f0 },
1217 { 0x09, 0x400001f1 },
1218 { 0x0d, 0x0221401f },
1219 { 0x0e, 0x01014010 },
1220 { 0x0f, 0x01813020 },
1221 { 0x10, 0x01a19021 },
1222 { 0x11, 0x90100140 },
1223 { 0x12, 0x400001f2 },
1224 {}
dfe495d0
TI		 1225};
1226
1227
1228/*
1229 STAC 9200-32 pin configs for
1230 102801B5 (Dell Inspiron 630m)
1231 102801D8 (Dell Inspiron 640m)
1232*/
d39a3ae8
TI		 1233static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1234 { 0x08, 0x40c003fa },
1235 { 0x09, 0x03441340 },
1236 { 0x0d, 0x0321121f },
1237 { 0x0e, 0x90170310 },
1238 { 0x0f, 0x408003fb },
1239 { 0x10, 0x03a11020 },
1240 { 0x11, 0x401003fc },
1241 { 0x12, 0x403003fd },
1242 {}
dfe495d0
TI		 1243};
1244
1245/*
1246 STAC 9200-32 pin configs for
1247 102801C2 (Dell Latitude D620)
1248 102801C8
1249 102801CC (Dell Latitude D820)
1250 102801D4
1251 102801D6
1252*/
d39a3ae8
TI		 1253static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1254 { 0x08, 0x40c003fa },
1255 { 0x09, 0x0144131f },
1256 { 0x0d, 0x0321121f },
1257 { 0x0e, 0x90170310 },
1258 { 0x0f, 0x90a70321 },
1259 { 0x10, 0x03a11020 },
1260 { 0x11, 0x401003fb },
1261 { 0x12, 0x40f000fc },
1262 {}
dfe495d0
TI		 1263};
1264
1265/*
1266 STAC 9200-32 pin configs for
1267 102801CE (Dell XPS M1710)
1268 102801CF (Dell Precision M90)
1269*/
d39a3ae8
TI		 1270static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1271 { 0x08, 0x40c003fa },
1272 { 0x09, 0x01441340 },
1273 { 0x0d, 0x0421421f },
1274 { 0x0e, 0x90170310 },
1275 { 0x0f, 0x408003fb },
1276 { 0x10, 0x04a1102e },
1277 { 0x11, 0x90170311 },
1278 { 0x12, 0x403003fc },
1279 {}
dfe495d0
TI		 1280};
1281
1282/*
1283 STAC 9200-32 pin configs for
1284 102801C9
1285 102801CA
1286 102801CB (Dell Latitude 120L)
1287 102801D3
1288*/
d39a3ae8
TI		 1289static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1290 { 0x08, 0x40c003fa },
1291 { 0x09, 0x404003fb },
1292 { 0x0d, 0x0321121f },
1293 { 0x0e, 0x90170310 },
1294 { 0x0f, 0x408003fc },
1295 { 0x10, 0x03a11020 },
1296 { 0x11, 0x401003fd },
1297 { 0x12, 0x403003fe },
1298 {}
dfe495d0
TI		 1299};
1300
1301/*
1302 STAC 9200-32 pin configs for
1303 102801BD (Dell Inspiron E1505n)
1304 102801EE
1305 102801EF
1306*/
d39a3ae8
TI		 1307static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1308 { 0x08, 0x40c003fa },
1309 { 0x09, 0x01441340 },
1310 { 0x0d, 0x0421121f },
1311 { 0x0e, 0x90170310 },
1312 { 0x0f, 0x408003fb },
1313 { 0x10, 0x04a11020 },
1314 { 0x11, 0x401003fc },
1315 { 0x12, 0x403003fd },
1316 {}
dfe495d0
TI		 1317};
1318
1319/*
1320 STAC 9200-32 pin configs for
1321 102801F5 (Dell Inspiron 1501)
1322 102801F6
1323*/
d39a3ae8
TI		 1324static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1325 { 0x08, 0x40c003fa },
1326 { 0x09, 0x404003fb },
1327 { 0x0d, 0x0421121f },
1328 { 0x0e, 0x90170310 },
1329 { 0x0f, 0x408003fc },
1330 { 0x10, 0x04a11020 },
1331 { 0x11, 0x401003fd },
1332 { 0x12, 0x403003fe },
1333 {}
dfe495d0
TI		 1334};
1335
1336/*
1337 STAC 9200-32
1338 102801CD (Dell Inspiron E1705/9400)
1339*/
d39a3ae8
TI		 1340static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1341 { 0x08, 0x40c003fa },
1342 { 0x09, 0x01441340 },
1343 { 0x0d, 0x0421121f },
1344 { 0x0e, 0x90170310 },
1345 { 0x0f, 0x90170310 },
1346 { 0x10, 0x04a11020 },
1347 { 0x11, 0x90170310 },
1348 { 0x12, 0x40f003fc },
1349 {}
dfe495d0
TI		 1350};
1351
d39a3ae8
TI		 1352static const struct hda_pintbl oqo9200_pin_configs[] = {
1353 { 0x08, 0x40c000f0 },
1354 { 0x09, 0x404000f1 },
1355 { 0x0d, 0x0221121f },
1356 { 0x0e, 0x02211210 },
1357 { 0x0f, 0x90170111 },
1358 { 0x10, 0x90a70120 },
1359 { 0x11, 0x400000f2 },
1360 { 0x12, 0x400000f3 },
1361 {}
bf277785
TD		 1362};
1363
078502b5
DS		 1364/*
1365 * STAC 92HD700
1366 * 18881000 Amigaone X1000
1367 */
1368static const struct hda_pintbl nemo_pin_configs[] = {
1369 { 0x0a, 0x02214020 }, /* Front panel HP socket */
1370 { 0x0b, 0x02a19080 }, /* Front Mic */
1371 { 0x0c, 0x0181304e }, /* Line in */
1372 { 0x0d, 0x01014010 }, /* Line out */
1373 { 0x0e, 0x01a19040 }, /* Rear Mic */
1374 { 0x0f, 0x01011012 }, /* Rear speakers */
1375 { 0x10, 0x01016011 }, /* Center speaker */
1376 { 0x11, 0x01012014 }, /* Side speakers (7.1) */
1377 { 0x12, 0x103301f0 }, /* Motherboard CD line in connector */
1378 { 0x13, 0x411111f0 }, /* Unused */
1379 { 0x14, 0x411111f0 }, /* Unused */
1380 { 0x21, 0x01442170 }, /* S/PDIF line out */
1381 { 0x22, 0x411111f0 }, /* Unused */
1382 { 0x23, 0x411111f0 }, /* Unused */
1383 {}
1384};
dfe495d0 1385
d39a3ae8
TI		 1386static void stac9200_fixup_panasonic(struct hda_codec *codec,
1387 const struct hda_fixup *fix, int action)
1388{
1389 struct sigmatel_spec *spec = codec->spec;
1390
36c9db7a 1391 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
d39a3ae8
TI		 1392 spec->gpio_mask = spec->gpio_dir = 0x09;
1393 spec->gpio_data = 0x00;
d39a3ae8
TI		 1394 /* CF-74 has no headphone detection, and the driver should *NOT*
1395 * do detection and HP/speaker toggle because the hardware does it.
1396 */
36c9db7a 1397 spec->gen.suppress_auto_mute = 1;
d39a3ae8
TI		 1398 }
1399}
1400
1401
1402static const struct hda_fixup stac9200_fixups[] = {
1403 [STAC_REF] = {
1404 .type = HDA_FIXUP_PINS,
1405 .v.pins = ref9200_pin_configs,
1406 },
1407 [STAC_9200_OQO] = {
1408 .type = HDA_FIXUP_PINS,
1409 .v.pins = oqo9200_pin_configs,
1410 .chained = true,
1411 .chain_id = STAC_9200_EAPD_INIT,
1412 },
1413 [STAC_9200_DELL_D21] = {
1414 .type = HDA_FIXUP_PINS,
1415 .v.pins = dell9200_d21_pin_configs,
1416 },
1417 [STAC_9200_DELL_D22] = {
1418 .type = HDA_FIXUP_PINS,
1419 .v.pins = dell9200_d22_pin_configs,
1420 },
1421 [STAC_9200_DELL_D23] = {
1422 .type = HDA_FIXUP_PINS,
1423 .v.pins = dell9200_d23_pin_configs,
1424 },
1425 [STAC_9200_DELL_M21] = {
1426 .type = HDA_FIXUP_PINS,
1427 .v.pins = dell9200_m21_pin_configs,
1428 },
1429 [STAC_9200_DELL_M22] = {
1430 .type = HDA_FIXUP_PINS,
1431 .v.pins = dell9200_m22_pin_configs,
1432 },
1433 [STAC_9200_DELL_M23] = {
1434 .type = HDA_FIXUP_PINS,
1435 .v.pins = dell9200_m23_pin_configs,
1436 },
1437 [STAC_9200_DELL_M24] = {
1438 .type = HDA_FIXUP_PINS,
1439 .v.pins = dell9200_m24_pin_configs,
1440 },
1441 [STAC_9200_DELL_M25] = {
1442 .type = HDA_FIXUP_PINS,
1443 .v.pins = dell9200_m25_pin_configs,
1444 },
1445 [STAC_9200_DELL_M26] = {
1446 .type = HDA_FIXUP_PINS,
1447 .v.pins = dell9200_m26_pin_configs,
1448 },
1449 [STAC_9200_DELL_M27] = {
1450 .type = HDA_FIXUP_PINS,
1451 .v.pins = dell9200_m27_pin_configs,
1452 },
1453 [STAC_9200_M4] = {
1454 .type = HDA_FIXUP_PINS,
1455 .v.pins = gateway9200_m4_pin_configs,
1456 .chained = true,
1457 .chain_id = STAC_9200_EAPD_INIT,
1458 },
1459 [STAC_9200_M4_2] = {
1460 .type = HDA_FIXUP_PINS,
1461 .v.pins = gateway9200_m4_2_pin_configs,
1462 .chained = true,
1463 .chain_id = STAC_9200_EAPD_INIT,
1464 },
1465 [STAC_9200_PANASONIC] = {
1466 .type = HDA_FIXUP_FUNC,
1467 .v.func = stac9200_fixup_panasonic,
1468 },
1469 [STAC_9200_EAPD_INIT] = {
1470 .type = HDA_FIXUP_VERBS,
1471 .v.verbs = (const struct hda_verb[]) {
1472 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1473 {}
1474 },
1475 },
403d1944
MP		 1476};
1477
d39a3ae8
TI		 1478static const struct hda_model_fixup stac9200_models[] = {
1479 { .id = STAC_REF, .name = "ref" },
1480 { .id = STAC_9200_OQO, .name = "oqo" },
1481 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1482 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1483 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1484 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1485 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1486 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1487 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1488 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1489 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1490 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1491 { .id = STAC_9200_M4, .name = "gateway-m4" },
1492 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1493 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1494 {}
1495};
1496
1497static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
f5fcc13c
TI		 1498 /* SigmaTel reference board */
1499 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1500 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1501 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1502 "DFI LanParty", STAC_REF),
e7377071 1503 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1505 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1507 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1509 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1511 "unknown Dell", STAC_9200_DELL_D22),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1513 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1515 "Dell Latitude D620", STAC_9200_DELL_M22),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1517 "unknown Dell", STAC_9200_DELL_D23),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1519 "unknown Dell", STAC_9200_DELL_D23),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1521 "unknown Dell", STAC_9200_DELL_M22),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1523 "unknown Dell", STAC_9200_DELL_M24),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1525 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1527 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1529 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1531 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1533 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1535 "Dell Precision M90", STAC_9200_DELL_M23),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1537 "unknown Dell", STAC_9200_DELL_M22),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1539 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1540 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1541 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1543 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1545 "unknown Dell", STAC_9200_DELL_D23),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1547 "unknown Dell", STAC_9200_DELL_D23),
1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1549 "unknown Dell", STAC_9200_DELL_D21),
1550 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1551 "unknown Dell", STAC_9200_DELL_D23),
1552 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1553 "unknown Dell", STAC_9200_DELL_D21),
1554 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1555 "unknown Dell", STAC_9200_DELL_M25),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1557 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1558 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1559 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1560 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1561 "unknown Dell", STAC_9200_DELL_M26),
1fc2e41f
AT		 1562 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0201,
1563 "Dell Latitude D430", STAC_9200_DELL_M22),
49c605db 1564 /* Panasonic */
117f257d 1565 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1566 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1567 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1568 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1569 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1570 /* OQO Mobile */
1571 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1572 {} /* terminator */
1573};
1574
d2077d40
TI		 1575static const struct hda_pintbl ref925x_pin_configs[] = {
1576 { 0x07, 0x40c003f0 },
1577 { 0x08, 0x424503f2 },
1578 { 0x0a, 0x01813022 },
1579 { 0x0b, 0x02a19021 },
1580 { 0x0c, 0x90a70320 },
1581 { 0x0d, 0x02214210 },
1582 { 0x10, 0x01019020 },
1583 { 0x11, 0x9033032e },
1584 {}
8e21c34c
TD		 1585};
1586
d2077d40
TI		 1587static const struct hda_pintbl stac925xM1_pin_configs[] = {
1588 { 0x07, 0x40c003f4 },
1589 { 0x08, 0x424503f2 },
1590 { 0x0a, 0x400000f3 },
1591 { 0x0b, 0x02a19020 },
1592 { 0x0c, 0x40a000f0 },
1593 { 0x0d, 0x90100210 },
1594 { 0x10, 0x400003f1 },
1595 { 0x11, 0x9033032e },
1596 {}
8e21c34c
TD		 1597};
1598
d2077d40
TI		 1599static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1600 { 0x07, 0x40c003f4 },
1601 { 0x08, 0x424503f2 },
1602 { 0x0a, 0x400000f3 },
1603 { 0x0b, 0x02a19020 },
1604 { 0x0c, 0x40a000f0 },
1605 { 0x0d, 0x90100210 },
1606 { 0x10, 0x400003f1 },
1607 { 0x11, 0x9033032e },
1608 {}
9cb36c2a 1609};
58eec423 1610
d2077d40
TI		 1611static const struct hda_pintbl stac925xM2_pin_configs[] = {
1612 { 0x07, 0x40c003f4 },
1613 { 0x08, 0x424503f2 },
1614 { 0x0a, 0x400000f3 },
1615 { 0x0b, 0x02a19020 },
1616 { 0x0c, 0x40a000f0 },
1617 { 0x0d, 0x90100210 },
1618 { 0x10, 0x400003f1 },
1619 { 0x11, 0x9033032e },
1620 {}
2c11f955
TD		 1621};
1622
d2077d40
TI		 1623static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1624 { 0x07, 0x40c003f4 },
1625 { 0x08, 0x424503f2 },
1626 { 0x0a, 0x400000f3 },
1627 { 0x0b, 0x02a19020 },
1628 { 0x0c, 0x40a000f0 },
1629 { 0x0d, 0x90100210 },
1630 { 0x10, 0x400003f1 },
1631 { 0x11, 0x9033032e },
1632 {}
58eec423
MCC		 1633};
1634
d2077d40
TI		 1635static const struct hda_pintbl stac925xM3_pin_configs[] = {
1636 { 0x07, 0x40c003f4 },
1637 { 0x08, 0x424503f2 },
1638 { 0x0a, 0x400000f3 },
1639 { 0x0b, 0x02a19020 },
1640 { 0x0c, 0x40a000f0 },
1641 { 0x0d, 0x90100210 },
1642 { 0x10, 0x400003f1 },
1643 { 0x11, 0x503303f3 },
1644 {}
9cb36c2a 1645};
58eec423 1646
d2077d40
TI		 1647static const struct hda_pintbl stac925xM5_pin_configs[] = {
1648 { 0x07, 0x40c003f4 },
1649 { 0x08, 0x424503f2 },
1650 { 0x0a, 0x400000f3 },
1651 { 0x0b, 0x02a19020 },
1652 { 0x0c, 0x40a000f0 },
1653 { 0x0d, 0x90100210 },
1654 { 0x10, 0x400003f1 },
1655 { 0x11, 0x9033032e },
1656 {}
9cb36c2a
MCC		 1657};
1658
d2077d40
TI		 1659static const struct hda_pintbl stac925xM6_pin_configs[] = {
1660 { 0x07, 0x40c003f4 },
1661 { 0x08, 0x424503f2 },
1662 { 0x0a, 0x400000f3 },
1663 { 0x0b, 0x02a19020 },
1664 { 0x0c, 0x40a000f0 },
1665 { 0x0d, 0x90100210 },
1666 { 0x10, 0x400003f1 },
1667 { 0x11, 0x90330320 },
1668 {}
8e21c34c
TD		 1669};
1670
d2077d40
TI		 1671static const struct hda_fixup stac925x_fixups[] = {
1672 [STAC_REF] = {
1673 .type = HDA_FIXUP_PINS,
1674 .v.pins = ref925x_pin_configs,
1675 },
1676 [STAC_M1] = {
1677 .type = HDA_FIXUP_PINS,
1678 .v.pins = stac925xM1_pin_configs,
1679 },
1680 [STAC_M1_2] = {
1681 .type = HDA_FIXUP_PINS,
1682 .v.pins = stac925xM1_2_pin_configs,
1683 },
1684 [STAC_M2] = {
1685 .type = HDA_FIXUP_PINS,
1686 .v.pins = stac925xM2_pin_configs,
1687 },
1688 [STAC_M2_2] = {
1689 .type = HDA_FIXUP_PINS,
1690 .v.pins = stac925xM2_2_pin_configs,
1691 },
1692 [STAC_M3] = {
1693 .type = HDA_FIXUP_PINS,
1694 .v.pins = stac925xM3_pin_configs,
1695 },
1696 [STAC_M5] = {
1697 .type = HDA_FIXUP_PINS,
1698 .v.pins = stac925xM5_pin_configs,
1699 },
1700 [STAC_M6] = {
1701 .type = HDA_FIXUP_PINS,
1702 .v.pins = stac925xM6_pin_configs,
1703 },
8e21c34c
TD		 1704};
1705
d2077d40
TI		 1706static const struct hda_model_fixup stac925x_models[] = {
1707 { .id = STAC_REF, .name = "ref" },
1708 { .id = STAC_M1, .name = "m1" },
1709 { .id = STAC_M1_2, .name = "m1-2" },
1710 { .id = STAC_M2, .name = "m2" },
1711 { .id = STAC_M2_2, .name = "m2-2" },
1712 { .id = STAC_M3, .name = "m3" },
1713 { .id = STAC_M5, .name = "m5" },
1714 { .id = STAC_M6, .name = "m6" },
1715 {}
8e21c34c
TD		 1716};
1717
d2077d40
TI		 1718static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1719 /* SigmaTel reference board */
1720 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1721 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1722 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1723
1724 /* Default table for unknown ID */
1725 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1726
1727 /* gateway machines are checked via codec ssid */
58eec423
MCC		 1728 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1729 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1730 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1731 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1732 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1733 /* Not sure about the brand name for those */
1734 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1735 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1736 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1737 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1738 {} /* terminator */
8e21c34c
TD		 1739};
1740
55e30141
TI		 1741static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1742 { 0x0a, 0x02214030 },
1743 { 0x0b, 0x02a19040 },
1744 { 0x0c, 0x01a19020 },
1745 { 0x0d, 0x02214030 },
1746 { 0x0e, 0x0181302e },
1747 { 0x0f, 0x01014010 },
1748 { 0x10, 0x01014020 },
1749 { 0x11, 0x01014030 },
1750 { 0x12, 0x02319040 },
1751 { 0x13, 0x90a000f0 },
1752 { 0x14, 0x90a000f0 },
1753 { 0x22, 0x01452050 },
1754 { 0x23, 0x01452050 },
1755 {}
a7662640
MR		 1756};
1757
55e30141
TI		 1758static const struct hda_pintbl dell_m6_pin_configs[] = {
1759 { 0x0a, 0x0321101f },
1760 { 0x0b, 0x4f00000f },
1761 { 0x0c, 0x4f0000f0 },
1762 { 0x0d, 0x90170110 },
1763 { 0x0e, 0x03a11020 },
1764 { 0x0f, 0x0321101f },
1765 { 0x10, 0x4f0000f0 },
1766 { 0x11, 0x4f0000f0 },
1767 { 0x12, 0x4f0000f0 },
1768 { 0x13, 0x90a60160 },
1769 { 0x14, 0x4f0000f0 },
1770 { 0x22, 0x4f0000f0 },
1771 { 0x23, 0x4f0000f0 },
1772 {}
e1f0d669
MR		 1773};
1774
55e30141
TI		 1775static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1776 { 0x0a, 0x0321101f },
1777 { 0x0b, 0x0321101f },
1778 { 0x0c, 0x03a11020 },
1779 { 0x0d, 0x03014020 },
1780 { 0x0e, 0x90170110 },
1781 { 0x0f, 0x4f0000f0 },
1782 { 0x10, 0x4f0000f0 },
1783 { 0x11, 0x4f0000f0 },
1784 { 0x12, 0x4f0000f0 },
1785 { 0x13, 0x90a60160 },
1786 { 0x14, 0x4f0000f0 },
1787 { 0x22, 0x4f0000f0 },
1788 { 0x23, 0x904601b0 },
1789 {}
842ae638
TI		 1790};
1791
55e30141
TI		 1792static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1793 { 0x0a, 0x02214230 },
1794 { 0x0b, 0x02A19240 },
1795 { 0x0c, 0x01013214 },
1796 { 0x0d, 0x01014210 },
1797 { 0x0e, 0x01A19250 },
1798 { 0x0f, 0x01011212 },
1799 { 0x10, 0x01016211 },
1800 {}
52dc4386
AF		 1801};
1802
1de7ca5e
HW		 1803static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
1804 { 0x0a, 0x02214030 },
1805 { 0x0b, 0x02A19010 },
1806 {}
1807};
1808
7440850c
HW		 1809static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = {
1810 { 0x0e, 0x400000f0 },
1811 {}
1812};
1813
55e30141
TI		 1814static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1815 const struct hda_fixup *fix, int action)
1816{
1817 struct sigmatel_spec *spec = codec->spec;
1818
1819 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1820 return;
1821
1822 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1823 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1824}
1825
1826static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1827{
1828 struct sigmatel_spec *spec = codec->spec;
1829
1830 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
55e30141
TI		 1831 spec->eapd_switch = 0;
1832}
1833
1834static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1835 const struct hda_fixup *fix, int action)
1836{
1837 struct sigmatel_spec *spec = codec->spec;
1838
1839 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1840 return;
1841
1842 stac92hd73xx_fixup_dell(codec);
1843 snd_hda_add_verbs(codec, dell_eq_core_init);
1844 spec->volknob_init = 1;
1845}
1846
1847/* Analog Mics */
1848static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1849 const struct hda_fixup *fix, int action)
1850{
55e30141
TI		 1851 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1852 return;
1853
1854 stac92hd73xx_fixup_dell(codec);
1855 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
55e30141
TI		 1856}
1857
1858/* Digital Mics */
1859static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1860 const struct hda_fixup *fix, int action)
1861{
55e30141
TI		 1862 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1863 return;
1864
1865 stac92hd73xx_fixup_dell(codec);
1866 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
55e30141
TI		 1867}
1868
1869/* Both */
1870static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1871 const struct hda_fixup *fix, int action)
1872{
55e30141
TI		 1873 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1874 return;
1875
1876 stac92hd73xx_fixup_dell(codec);
1877 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1878 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
55e30141
TI		 1879}
1880
1881static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1882 const struct hda_fixup *fix, int action)
1883{
1884 struct sigmatel_spec *spec = codec->spec;
1885
1886 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1887 return;
1888
1889 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
55e30141
TI		 1890 spec->eapd_switch = 0;
1891}
1892
1893static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1894 const struct hda_fixup *fix, int action)
1895{
36c9db7a
TI		 1896 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1897 codec->no_jack_detect = 1;
55e30141
TI		 1898}
1899
1900static const struct hda_fixup stac92hd73xx_fixups[] = {
1901 [STAC_92HD73XX_REF] = {
1902 .type = HDA_FIXUP_FUNC,
1903 .v.func = stac92hd73xx_fixup_ref,
1904 },
1905 [STAC_DELL_M6_AMIC] = {
1906 .type = HDA_FIXUP_FUNC,
1907 .v.func = stac92hd73xx_fixup_dell_m6_amic,
1908 },
1909 [STAC_DELL_M6_DMIC] = {
1910 .type = HDA_FIXUP_FUNC,
1911 .v.func = stac92hd73xx_fixup_dell_m6_dmic,
1912 },
1913 [STAC_DELL_M6_BOTH] = {
1914 .type = HDA_FIXUP_FUNC,
1915 .v.func = stac92hd73xx_fixup_dell_m6_both,
1916 },
1917 [STAC_DELL_EQ] = {
1918 .type = HDA_FIXUP_FUNC,
1919 .v.func = stac92hd73xx_fixup_dell_eq,
1920 },
1921 [STAC_ALIENWARE_M17X] = {
1922 .type = HDA_FIXUP_FUNC,
1923 .v.func = stac92hd73xx_fixup_alienware_m17x,
1924 },
1925 [STAC_92HD73XX_INTEL] = {
1926 .type = HDA_FIXUP_PINS,
1927 .v.pins = intel_dg45id_pin_configs,
1928 },
1929 [STAC_92HD73XX_NO_JD] = {
1930 .type = HDA_FIXUP_FUNC,
1931 .v.func = stac92hd73xx_fixup_no_jd,
1de7ca5e
HW		 1932 },
1933 [STAC_92HD89XX_HP_FRONT_JACK] = {
1934 .type = HDA_FIXUP_PINS,
1935 .v.pins = stac92hd89xx_hp_front_jack_pin_configs,
7440850c
HW		 1936 },
1937 [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
1938 .type = HDA_FIXUP_PINS,
1939 .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
6426460e
TI		 1940 },
1941 [STAC_92HD73XX_ASUS_MOBO] = {
1942 .type = HDA_FIXUP_PINS,
1943 .v.pins = (const struct hda_pintbl[]) {
1944 /* enable 5.1 and SPDIF out */
1945 { 0x0c, 0x01014411 },
1946 { 0x0d, 0x01014410 },
1947 { 0x0e, 0x01014412 },
1948 { 0x22, 0x014b1180 },
1949 { }
1950 }
1951 },
e1f0d669
MR		 1952};
1953
55e30141
TI		 1954static const struct hda_model_fixup stac92hd73xx_models[] = {
1955 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1956 { .id = STAC_92HD73XX_REF, .name = "ref" },
1957 { .id = STAC_92HD73XX_INTEL, .name = "intel" },
1958 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1959 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1960 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1961 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1962 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
6426460e 1963 { .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" },
55e30141 1964 {}
e1f0d669
MR		 1965};
1966
55e30141 1967static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
e1f0d669
MR		 1968 /* SigmaTel reference board */
1969 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1970 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1971 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1972 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF		 1973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1974 "Intel DG45ID", STAC_92HD73XX_INTEL),
1975 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1976 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1977 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1978 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1979 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1980 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1981 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1982 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1983 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1984 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1985 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1986 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1987 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1988 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1989 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1990 "unknown Dell", STAC_DELL_M6_DMIC),
1991 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1992 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1993 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1994 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1995 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1996 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1997 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1998 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB		 1999 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
2000 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf 2001 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
ffe535ed 2002 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
5c1bccf6 2003 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
e033ebfb 2004 "Dell Studio 1558", STAC_DELL_M6_DMIC),
55e30141 2005 /* codec SSID matching */
842ae638
TI		 2006 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
2007 "Alienware M17x", STAC_ALIENWARE_M17X),
0defe09c
DC		 2008 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
2009 "Alienware M17x", STAC_ALIENWARE_M17X),
dbd1b547 2010 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
b9ecc4ee 2011 "Alienware M17x R3", STAC_DELL_EQ),
7440850c
HW		 2012 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927,
2013 "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
1de7ca5e
HW		 2014 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
2015 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
6426460e
TI		 2016 SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10",
2017 STAC_92HD73XX_ASUS_MOBO),
842ae638
TI		 2018 {} /* terminator */
2019};
2020
372f8c75
TI		 2021static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
2022 { 0x0a, 0x02214030 },
2023 { 0x0b, 0x02211010 },
2024 { 0x0c, 0x02a19020 },
2025 { 0x0d, 0x02170130 },
2026 { 0x0e, 0x01014050 },
2027 { 0x0f, 0x01819040 },
2028 { 0x10, 0x01014020 },
2029 { 0x11, 0x90a3014e },
2030 { 0x1f, 0x01451160 },
2031 { 0x20, 0x98560170 },
2032 {}
d0513fc6
MR		 2033};
2034
372f8c75
TI		 2035static const struct hda_pintbl dell_s14_pin_configs[] = {
2036 { 0x0a, 0x0221403f },
2037 { 0x0b, 0x0221101f },
2038 { 0x0c, 0x02a19020 },
2039 { 0x0d, 0x90170110 },
2040 { 0x0e, 0x40f000f0 },
2041 { 0x0f, 0x40f000f0 },
2042 { 0x10, 0x40f000f0 },
2043 { 0x11, 0x90a60160 },
2044 { 0x1f, 0x40f000f0 },
2045 { 0x20, 0x40f000f0 },
2046 {}
8bb0ac55
MR		 2047};
2048
372f8c75
TI		 2049static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
2050 { 0x0a, 0x02a11020 },
2051 { 0x0b, 0x0221101f },
2052 { 0x0c, 0x400000f0 },
2053 { 0x0d, 0x90170110 },
2054 { 0x0e, 0x400000f1 },
2055 { 0x0f, 0x400000f2 },
2056 { 0x10, 0x400000f3 },
2057 { 0x11, 0x90a60160 },
2058 { 0x1f, 0x400000f4 },
2059 { 0x20, 0x400000f5 },
2060 {}
f7f9bdfa
JW		 2061};
2062
372f8c75
TI		 2063static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2064 { 0x0a, 0x03a12050 },
2065 { 0x0b, 0x0321201f },
2066 { 0x0c, 0x40f000f0 },
2067 { 0x0d, 0x90170110 },
2068 { 0x0e, 0x40f000f0 },
2069 { 0x0f, 0x40f000f0 },
2070 { 0x10, 0x90170110 },
2071 { 0x11, 0xd5a30140 },
2072 { 0x1f, 0x40f000f0 },
2073 { 0x20, 0x40f000f0 },
2074 {}
48315590
SE		 2075};
2076
372f8c75
TI		 2077static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2078 { 0x0a, 0x01813050 },
2079 { 0x0b, 0x0421201f },
2080 { 0x0c, 0x04a1205e },
2081 { 0x0d, 0x96130310 },
2082 { 0x0e, 0x96130310 },
2083 { 0x0f, 0x0101401f },
2084 { 0x10, 0x1111611f },
2085 { 0x11, 0xd5a30130 },
2086 {}
5556e147
VK		 2087};
2088
372f8c75
TI		 2089static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2090 { 0x0a, 0x40f000f0 },
2091 { 0x0b, 0x0221101f },
2092 { 0x0c, 0x02a11020 },
2093 { 0x0d, 0x92170110 },
2094 { 0x0e, 0x40f000f0 },
2095 { 0x0f, 0x92170110 },
2096 { 0x10, 0x40f000f0 },
2097 { 0x11, 0xd5a30130 },
2098 { 0x1f, 0x40f000f0 },
2099 { 0x20, 0x40f000f0 },
2100 {}
0c27c180
VK		 2101};
2102
372f8c75
TI		 2103static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2104 const struct hda_fixup *fix, int action)
2105{
2106 struct sigmatel_spec *spec = codec->spec;
2107
2108 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2109 return;
2110
2111 if (hp_bnb2011_with_dock(codec)) {
2112 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2113 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2114 }
2115
2116 if (find_mute_led_cfg(codec, spec->default_polarity))
4e76a883 2117 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
372f8c75
TI		 2118 spec->gpio_led,
2119 spec->gpio_led_polarity);
e8b99a1d
TI		 2120
2121 /* allow auto-switching of dock line-in */
2122 spec->gen.line_in_auto_switch = true;
372f8c75
TI		 2123}
2124
2125static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2126 const struct hda_fixup *fix, int action)
2127{
2128 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2129 return;
2130
2131 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2132 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2133}
2134
2135static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2136 const struct hda_fixup *fix, int action)
2137{
2138 struct sigmatel_spec *spec = codec->spec;
2139
2140 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2141 spec->default_polarity = 0;
2142}
2143
2144static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2145 const struct hda_fixup *fix, int action)
2146{
2147 struct sigmatel_spec *spec = codec->spec;
2148
2149 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2150 spec->default_polarity = 1;
2151}
2152
2153static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2154 const struct hda_fixup *fix, int action)
2155{
2156 struct sigmatel_spec *spec = codec->spec;
2157
95f74c41 2158 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
372f8c75 2159 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
55ed9cd1 2160#ifdef CONFIG_PM
873ce8ad 2161 /* resetting controller clears GPIO, so we need to keep on */
7639a06c 2162 codec->core.power_caps &= ~AC_PWRST_CLKSTOP;
55ed9cd1 2163#endif
95f74c41 2164 }
372f8c75
TI		 2165}
2166
37c367ec
TI		 2167static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
2168 const struct hda_fixup *fix, int action)
2169{
2170 struct sigmatel_spec *spec = codec->spec;
2171
2172 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2173 spec->gpio_led = 0x10; /* GPIO4 */
2174 spec->default_polarity = 0;
2175 }
2176}
2177
372f8c75
TI		 2178static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2179 const struct hda_fixup *fix, int action)
2180{
2181 struct sigmatel_spec *spec = codec->spec;
2182
2183 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2184 spec->headset_jack = 1;
2185}
2186
4227de2a
TI		 2187static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec,
2188 const struct hda_fixup *fix,
2189 int action)
2190{
2191 struct sigmatel_spec *spec = codec->spec;
2192
2193 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2194 return;
2195 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir =
2196 spec->gpio_data = 0x10;
2197 spec->eapd_switch = 0;
2198}
2199
6ab42ff4
HW		 2200static void hp_envy_ts_fixup_dac_bind(struct hda_codec *codec,
2201 const struct hda_fixup *fix,
2202 int action)
2203{
2204 struct sigmatel_spec *spec = codec->spec;
2205 static hda_nid_t preferred_pairs[] = {
2206 0xd, 0x13,
2207 0
2208 };
2209
2210 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2211 return;
2212
2213 spec->gen.preferred_dacs = preferred_pairs;
2214}
2215
d009f3de
VK		 2216static const struct hda_verb hp_bnb13_eq_verbs[] = {
2217 /* 44.1KHz base */
2218 { 0x22, 0x7A6, 0x3E },
2219 { 0x22, 0x7A7, 0x68 },
2220 { 0x22, 0x7A8, 0x17 },
2221 { 0x22, 0x7A9, 0x3E },
2222 { 0x22, 0x7AA, 0x68 },
2223 { 0x22, 0x7AB, 0x17 },
2224 { 0x22, 0x7AC, 0x00 },
2225 { 0x22, 0x7AD, 0x80 },
2226 { 0x22, 0x7A6, 0x83 },
2227 { 0x22, 0x7A7, 0x2F },
2228 { 0x22, 0x7A8, 0xD1 },
2229 { 0x22, 0x7A9, 0x83 },
2230 { 0x22, 0x7AA, 0x2F },
2231 { 0x22, 0x7AB, 0xD1 },
2232 { 0x22, 0x7AC, 0x01 },
2233 { 0x22, 0x7AD, 0x80 },
2234 { 0x22, 0x7A6, 0x3E },
2235 { 0x22, 0x7A7, 0x68 },
2236 { 0x22, 0x7A8, 0x17 },
2237 { 0x22, 0x7A9, 0x3E },
2238 { 0x22, 0x7AA, 0x68 },
2239 { 0x22, 0x7AB, 0x17 },
2240 { 0x22, 0x7AC, 0x02 },
2241 { 0x22, 0x7AD, 0x80 },
2242 { 0x22, 0x7A6, 0x7C },
2243 { 0x22, 0x7A7, 0xC6 },
2244 { 0x22, 0x7A8, 0x0C },
2245 { 0x22, 0x7A9, 0x7C },
2246 { 0x22, 0x7AA, 0xC6 },
2247 { 0x22, 0x7AB, 0x0C },
2248 { 0x22, 0x7AC, 0x03 },
2249 { 0x22, 0x7AD, 0x80 },
2250 { 0x22, 0x7A6, 0xC3 },
2251 { 0x22, 0x7A7, 0x25 },
2252 { 0x22, 0x7A8, 0xAF },
2253 { 0x22, 0x7A9, 0xC3 },
2254 { 0x22, 0x7AA, 0x25 },
2255 { 0x22, 0x7AB, 0xAF },
2256 { 0x22, 0x7AC, 0x04 },
2257 { 0x22, 0x7AD, 0x80 },
2258 { 0x22, 0x7A6, 0x3E },
2259 { 0x22, 0x7A7, 0x85 },
2260 { 0x22, 0x7A8, 0x73 },
2261 { 0x22, 0x7A9, 0x3E },
2262 { 0x22, 0x7AA, 0x85 },
2263 { 0x22, 0x7AB, 0x73 },
2264 { 0x22, 0x7AC, 0x05 },
2265 { 0x22, 0x7AD, 0x80 },
2266 { 0x22, 0x7A6, 0x85 },
2267 { 0x22, 0x7A7, 0x39 },
2268 { 0x22, 0x7A8, 0xC7 },
2269 { 0x22, 0x7A9, 0x85 },
2270 { 0x22, 0x7AA, 0x39 },
2271 { 0x22, 0x7AB, 0xC7 },
2272 { 0x22, 0x7AC, 0x06 },
2273 { 0x22, 0x7AD, 0x80 },
2274 { 0x22, 0x7A6, 0x3C },
2275 { 0x22, 0x7A7, 0x90 },
2276 { 0x22, 0x7A8, 0xB0 },
2277 { 0x22, 0x7A9, 0x3C },
2278 { 0x22, 0x7AA, 0x90 },
2279 { 0x22, 0x7AB, 0xB0 },
2280 { 0x22, 0x7AC, 0x07 },
2281 { 0x22, 0x7AD, 0x80 },
2282 { 0x22, 0x7A6, 0x7A },
2283 { 0x22, 0x7A7, 0xC6 },
2284 { 0x22, 0x7A8, 0x39 },
2285 { 0x22, 0x7A9, 0x7A },
2286 { 0x22, 0x7AA, 0xC6 },
2287 { 0x22, 0x7AB, 0x39 },
2288 { 0x22, 0x7AC, 0x08 },
2289 { 0x22, 0x7AD, 0x80 },
2290 { 0x22, 0x7A6, 0xC4 },
2291 { 0x22, 0x7A7, 0xE9 },
2292 { 0x22, 0x7A8, 0xDC },
2293 { 0x22, 0x7A9, 0xC4 },
2294 { 0x22, 0x7AA, 0xE9 },
2295 { 0x22, 0x7AB, 0xDC },
2296 { 0x22, 0x7AC, 0x09 },
2297 { 0x22, 0x7AD, 0x80 },
2298 { 0x22, 0x7A6, 0x3D },
2299 { 0x22, 0x7A7, 0xE1 },
2300 { 0x22, 0x7A8, 0x0D },
2301 { 0x22, 0x7A9, 0x3D },
2302 { 0x22, 0x7AA, 0xE1 },
2303 { 0x22, 0x7AB, 0x0D },
2304 { 0x22, 0x7AC, 0x0A },
2305 { 0x22, 0x7AD, 0x80 },
2306 { 0x22, 0x7A6, 0x89 },
2307 { 0x22, 0x7A7, 0xB6 },
2308 { 0x22, 0x7A8, 0xEB },
2309 { 0x22, 0x7A9, 0x89 },
2310 { 0x22, 0x7AA, 0xB6 },
2311 { 0x22, 0x7AB, 0xEB },
2312 { 0x22, 0x7AC, 0x0B },
2313 { 0x22, 0x7AD, 0x80 },
2314 { 0x22, 0x7A6, 0x39 },
2315 { 0x22, 0x7A7, 0x9D },
2316 { 0x22, 0x7A8, 0xFE },
2317 { 0x22, 0x7A9, 0x39 },
2318 { 0x22, 0x7AA, 0x9D },
2319 { 0x22, 0x7AB, 0xFE },
2320 { 0x22, 0x7AC, 0x0C },
2321 { 0x22, 0x7AD, 0x80 },
2322 { 0x22, 0x7A6, 0x76 },
2323 { 0x22, 0x7A7, 0x49 },
2324 { 0x22, 0x7A8, 0x15 },
2325 { 0x22, 0x7A9, 0x76 },
2326 { 0x22, 0x7AA, 0x49 },
2327 { 0x22, 0x7AB, 0x15 },
2328 { 0x22, 0x7AC, 0x0D },
2329 { 0x22, 0x7AD, 0x80 },
2330 { 0x22, 0x7A6, 0xC8 },
2331 { 0x22, 0x7A7, 0x80 },
2332 { 0x22, 0x7A8, 0xF5 },
2333 { 0x22, 0x7A9, 0xC8 },
2334 { 0x22, 0x7AA, 0x80 },
2335 { 0x22, 0x7AB, 0xF5 },
2336 { 0x22, 0x7AC, 0x0E },
2337 { 0x22, 0x7AD, 0x80 },
2338 { 0x22, 0x7A6, 0x40 },
2339 { 0x22, 0x7A7, 0x00 },
2340 { 0x22, 0x7A8, 0x00 },
2341 { 0x22, 0x7A9, 0x40 },
2342 { 0x22, 0x7AA, 0x00 },
2343 { 0x22, 0x7AB, 0x00 },
2344 { 0x22, 0x7AC, 0x0F },
2345 { 0x22, 0x7AD, 0x80 },
2346 { 0x22, 0x7A6, 0x90 },
2347 { 0x22, 0x7A7, 0x68 },
2348 { 0x22, 0x7A8, 0xF1 },
2349 { 0x22, 0x7A9, 0x90 },
2350 { 0x22, 0x7AA, 0x68 },
2351 { 0x22, 0x7AB, 0xF1 },
2352 { 0x22, 0x7AC, 0x10 },
2353 { 0x22, 0x7AD, 0x80 },
2354 { 0x22, 0x7A6, 0x34 },
2355 { 0x22, 0x7A7, 0x47 },
2356 { 0x22, 0x7A8, 0x6C },
2357 { 0x22, 0x7A9, 0x34 },
2358 { 0x22, 0x7AA, 0x47 },
2359 { 0x22, 0x7AB, 0x6C },
2360 { 0x22, 0x7AC, 0x11 },
2361 { 0x22, 0x7AD, 0x80 },
2362 { 0x22, 0x7A6, 0x6F },
2363 { 0x22, 0x7A7, 0x97 },
2364 { 0x22, 0x7A8, 0x0F },
2365 { 0x22, 0x7A9, 0x6F },
2366 { 0x22, 0x7AA, 0x97 },
2367 { 0x22, 0x7AB, 0x0F },
2368 { 0x22, 0x7AC, 0x12 },
2369 { 0x22, 0x7AD, 0x80 },
2370 { 0x22, 0x7A6, 0xCB },
2371 { 0x22, 0x7A7, 0xB8 },
2372 { 0x22, 0x7A8, 0x94 },
2373 { 0x22, 0x7A9, 0xCB },
2374 { 0x22, 0x7AA, 0xB8 },
2375 { 0x22, 0x7AB, 0x94 },
2376 { 0x22, 0x7AC, 0x13 },
2377 { 0x22, 0x7AD, 0x80 },
2378 { 0x22, 0x7A6, 0x40 },
2379 { 0x22, 0x7A7, 0x00 },
2380 { 0x22, 0x7A8, 0x00 },
2381 { 0x22, 0x7A9, 0x40 },
2382 { 0x22, 0x7AA, 0x00 },
2383 { 0x22, 0x7AB, 0x00 },
2384 { 0x22, 0x7AC, 0x14 },
2385 { 0x22, 0x7AD, 0x80 },
2386 { 0x22, 0x7A6, 0x95 },
2387 { 0x22, 0x7A7, 0x76 },
2388 { 0x22, 0x7A8, 0x5B },
2389 { 0x22, 0x7A9, 0x95 },
2390 { 0x22, 0x7AA, 0x76 },
2391 { 0x22, 0x7AB, 0x5B },
2392 { 0x22, 0x7AC, 0x15 },
2393 { 0x22, 0x7AD, 0x80 },
2394 { 0x22, 0x7A6, 0x31 },
2395 { 0x22, 0x7A7, 0xAC },
2396 { 0x22, 0x7A8, 0x31 },
2397 { 0x22, 0x7A9, 0x31 },
2398 { 0x22, 0x7AA, 0xAC },
2399 { 0x22, 0x7AB, 0x31 },
2400 { 0x22, 0x7AC, 0x16 },
2401 { 0x22, 0x7AD, 0x80 },
2402 { 0x22, 0x7A6, 0x6A },
2403 { 0x22, 0x7A7, 0x89 },
2404 { 0x22, 0x7A8, 0xA5 },
2405 { 0x22, 0x7A9, 0x6A },
2406 { 0x22, 0x7AA, 0x89 },
2407 { 0x22, 0x7AB, 0xA5 },
2408 { 0x22, 0x7AC, 0x17 },
2409 { 0x22, 0x7AD, 0x80 },
2410 { 0x22, 0x7A6, 0xCE },
2411 { 0x22, 0x7A7, 0x53 },
2412 { 0x22, 0x7A8, 0xCF },
2413 { 0x22, 0x7A9, 0xCE },
2414 { 0x22, 0x7AA, 0x53 },
2415 { 0x22, 0x7AB, 0xCF },
2416 { 0x22, 0x7AC, 0x18 },
2417 { 0x22, 0x7AD, 0x80 },
2418 { 0x22, 0x7A6, 0x40 },
2419 { 0x22, 0x7A7, 0x00 },
2420 { 0x22, 0x7A8, 0x00 },
2421 { 0x22, 0x7A9, 0x40 },
2422 { 0x22, 0x7AA, 0x00 },
2423 { 0x22, 0x7AB, 0x00 },
2424 { 0x22, 0x7AC, 0x19 },
2425 { 0x22, 0x7AD, 0x80 },
2426 /* 48KHz base */
2427 { 0x22, 0x7A6, 0x3E },
2428 { 0x22, 0x7A7, 0x88 },
2429 { 0x22, 0x7A8, 0xDC },
2430 { 0x22, 0x7A9, 0x3E },
2431 { 0x22, 0x7AA, 0x88 },
2432 { 0x22, 0x7AB, 0xDC },
2433 { 0x22, 0x7AC, 0x1A },
2434 { 0x22, 0x7AD, 0x80 },
2435 { 0x22, 0x7A6, 0x82 },
2436 { 0x22, 0x7A7, 0xEE },
2437 { 0x22, 0x7A8, 0x46 },
2438 { 0x22, 0x7A9, 0x82 },
2439 { 0x22, 0x7AA, 0xEE },
2440 { 0x22, 0x7AB, 0x46 },
2441 { 0x22, 0x7AC, 0x1B },
2442 { 0x22, 0x7AD, 0x80 },
2443 { 0x22, 0x7A6, 0x3E },
2444 { 0x22, 0x7A7, 0x88 },
2445 { 0x22, 0x7A8, 0xDC },
2446 { 0x22, 0x7A9, 0x3E },
2447 { 0x22, 0x7AA, 0x88 },
2448 { 0x22, 0x7AB, 0xDC },
2449 { 0x22, 0x7AC, 0x1C },
2450 { 0x22, 0x7AD, 0x80 },
2451 { 0x22, 0x7A6, 0x7D },
2452 { 0x22, 0x7A7, 0x09 },
2453 { 0x22, 0x7A8, 0x28 },
2454 { 0x22, 0x7A9, 0x7D },
2455 { 0x22, 0x7AA, 0x09 },
2456 { 0x22, 0x7AB, 0x28 },
2457 { 0x22, 0x7AC, 0x1D },
2458 { 0x22, 0x7AD, 0x80 },
2459 { 0x22, 0x7A6, 0xC2 },
2460 { 0x22, 0x7A7, 0xE5 },
2461 { 0x22, 0x7A8, 0xB4 },
2462 { 0x22, 0x7A9, 0xC2 },
2463 { 0x22, 0x7AA, 0xE5 },
2464 { 0x22, 0x7AB, 0xB4 },
2465 { 0x22, 0x7AC, 0x1E },
2466 { 0x22, 0x7AD, 0x80 },
2467 { 0x22, 0x7A6, 0x3E },
2468 { 0x22, 0x7A7, 0xA3 },
2469 { 0x22, 0x7A8, 0x1F },
2470 { 0x22, 0x7A9, 0x3E },
2471 { 0x22, 0x7AA, 0xA3 },
2472 { 0x22, 0x7AB, 0x1F },
2473 { 0x22, 0x7AC, 0x1F },
2474 { 0x22, 0x7AD, 0x80 },
2475 { 0x22, 0x7A6, 0x84 },
2476 { 0x22, 0x7A7, 0xCA },
2477 { 0x22, 0x7A8, 0xF1 },
2478 { 0x22, 0x7A9, 0x84 },
2479 { 0x22, 0x7AA, 0xCA },
2480 { 0x22, 0x7AB, 0xF1 },
2481 { 0x22, 0x7AC, 0x20 },
2482 { 0x22, 0x7AD, 0x80 },
2483 { 0x22, 0x7A6, 0x3C },
2484 { 0x22, 0x7A7, 0xD5 },
2485 { 0x22, 0x7A8, 0x9C },
2486 { 0x22, 0x7A9, 0x3C },
2487 { 0x22, 0x7AA, 0xD5 },
2488 { 0x22, 0x7AB, 0x9C },
2489 { 0x22, 0x7AC, 0x21 },
2490 { 0x22, 0x7AD, 0x80 },
2491 { 0x22, 0x7A6, 0x7B },
2492 { 0x22, 0x7A7, 0x35 },
2493 { 0x22, 0x7A8, 0x0F },
2494 { 0x22, 0x7A9, 0x7B },
2495 { 0x22, 0x7AA, 0x35 },
2496 { 0x22, 0x7AB, 0x0F },
2497 { 0x22, 0x7AC, 0x22 },
2498 { 0x22, 0x7AD, 0x80 },
2499 { 0x22, 0x7A6, 0xC4 },
2500 { 0x22, 0x7A7, 0x87 },
2501 { 0x22, 0x7A8, 0x45 },
2502 { 0x22, 0x7A9, 0xC4 },
2503 { 0x22, 0x7AA, 0x87 },
2504 { 0x22, 0x7AB, 0x45 },
2505 { 0x22, 0x7AC, 0x23 },
2506 { 0x22, 0x7AD, 0x80 },
2507 { 0x22, 0x7A6, 0x3E },
2508 { 0x22, 0x7A7, 0x0A },
2509 { 0x22, 0x7A8, 0x78 },
2510 { 0x22, 0x7A9, 0x3E },
2511 { 0x22, 0x7AA, 0x0A },
2512 { 0x22, 0x7AB, 0x78 },
2513 { 0x22, 0x7AC, 0x24 },
2514 { 0x22, 0x7AD, 0x80 },
2515 { 0x22, 0x7A6, 0x88 },
2516 { 0x22, 0x7A7, 0xE2 },
2517 { 0x22, 0x7A8, 0x05 },
2518 { 0x22, 0x7A9, 0x88 },
2519 { 0x22, 0x7AA, 0xE2 },
2520 { 0x22, 0x7AB, 0x05 },
2521 { 0x22, 0x7AC, 0x25 },
2522 { 0x22, 0x7AD, 0x80 },
2523 { 0x22, 0x7A6, 0x3A },
2524 { 0x22, 0x7A7, 0x1A },
2525 { 0x22, 0x7A8, 0xA3 },
2526 { 0x22, 0x7A9, 0x3A },
2527 { 0x22, 0x7AA, 0x1A },
2528 { 0x22, 0x7AB, 0xA3 },
2529 { 0x22, 0x7AC, 0x26 },
2530 { 0x22, 0x7AD, 0x80 },
2531 { 0x22, 0x7A6, 0x77 },
2532 { 0x22, 0x7A7, 0x1D },
2533 { 0x22, 0x7A8, 0xFB },
2534 { 0x22, 0x7A9, 0x77 },
2535 { 0x22, 0x7AA, 0x1D },
2536 { 0x22, 0x7AB, 0xFB },
2537 { 0x22, 0x7AC, 0x27 },
2538 { 0x22, 0x7AD, 0x80 },
2539 { 0x22, 0x7A6, 0xC7 },
2540 { 0x22, 0x7A7, 0xDA },
2541 { 0x22, 0x7A8, 0xE5 },
2542 { 0x22, 0x7A9, 0xC7 },
2543 { 0x22, 0x7AA, 0xDA },
2544 { 0x22, 0x7AB, 0xE5 },
2545 { 0x22, 0x7AC, 0x28 },
2546 { 0x22, 0x7AD, 0x80 },
2547 { 0x22, 0x7A6, 0x40 },
2548 { 0x22, 0x7A7, 0x00 },
2549 { 0x22, 0x7A8, 0x00 },
2550 { 0x22, 0x7A9, 0x40 },
2551 { 0x22, 0x7AA, 0x00 },
2552 { 0x22, 0x7AB, 0x00 },
2553 { 0x22, 0x7AC, 0x29 },
2554 { 0x22, 0x7AD, 0x80 },
2555 { 0x22, 0x7A6, 0x8E },
2556 { 0x22, 0x7A7, 0xD7 },
2557 { 0x22, 0x7A8, 0x22 },
2558 { 0x22, 0x7A9, 0x8E },
2559 { 0x22, 0x7AA, 0xD7 },
2560 { 0x22, 0x7AB, 0x22 },
2561 { 0x22, 0x7AC, 0x2A },
2562 { 0x22, 0x7AD, 0x80 },
2563 { 0x22, 0x7A6, 0x35 },
2564 { 0x22, 0x7A7, 0x26 },
2565 { 0x22, 0x7A8, 0xC6 },
2566 { 0x22, 0x7A9, 0x35 },
2567 { 0x22, 0x7AA, 0x26 },
2568 { 0x22, 0x7AB, 0xC6 },
2569 { 0x22, 0x7AC, 0x2B },
2570 { 0x22, 0x7AD, 0x80 },
2571 { 0x22, 0x7A6, 0x71 },
2572 { 0x22, 0x7A7, 0x28 },
2573 { 0x22, 0x7A8, 0xDE },
2574 { 0x22, 0x7A9, 0x71 },
2575 { 0x22, 0x7AA, 0x28 },
2576 { 0x22, 0x7AB, 0xDE },
2577 { 0x22, 0x7AC, 0x2C },
2578 { 0x22, 0x7AD, 0x80 },
2579 { 0x22, 0x7A6, 0xCA },
2580 { 0x22, 0x7A7, 0xD9 },
2581 { 0x22, 0x7A8, 0x3A },
2582 { 0x22, 0x7A9, 0xCA },
2583 { 0x22, 0x7AA, 0xD9 },
2584 { 0x22, 0x7AB, 0x3A },
2585 { 0x22, 0x7AC, 0x2D },
2586 { 0x22, 0x7AD, 0x80 },
2587 { 0x22, 0x7A6, 0x40 },
2588 { 0x22, 0x7A7, 0x00 },
2589 { 0x22, 0x7A8, 0x00 },
2590 { 0x22, 0x7A9, 0x40 },
2591 { 0x22, 0x7AA, 0x00 },
2592 { 0x22, 0x7AB, 0x00 },
2593 { 0x22, 0x7AC, 0x2E },
2594 { 0x22, 0x7AD, 0x80 },
2595 { 0x22, 0x7A6, 0x93 },
2596 { 0x22, 0x7A7, 0x5E },
2597 { 0x22, 0x7A8, 0xD8 },
2598 { 0x22, 0x7A9, 0x93 },
2599 { 0x22, 0x7AA, 0x5E },
2600 { 0x22, 0x7AB, 0xD8 },
2601 { 0x22, 0x7AC, 0x2F },
2602 { 0x22, 0x7AD, 0x80 },
2603 { 0x22, 0x7A6, 0x32 },
2604 { 0x22, 0x7A7, 0xB7 },
2605 { 0x22, 0x7A8, 0xB1 },
2606 { 0x22, 0x7A9, 0x32 },
2607 { 0x22, 0x7AA, 0xB7 },
2608 { 0x22, 0x7AB, 0xB1 },
2609 { 0x22, 0x7AC, 0x30 },
2610 { 0x22, 0x7AD, 0x80 },
2611 { 0x22, 0x7A6, 0x6C },
2612 { 0x22, 0x7A7, 0xA1 },
2613 { 0x22, 0x7A8, 0x28 },
2614 { 0x22, 0x7A9, 0x6C },
2615 { 0x22, 0x7AA, 0xA1 },
2616 { 0x22, 0x7AB, 0x28 },
2617 { 0x22, 0x7AC, 0x31 },
2618 { 0x22, 0x7AD, 0x80 },
2619 { 0x22, 0x7A6, 0xCD },
2620 { 0x22, 0x7A7, 0x48 },
2621 { 0x22, 0x7A8, 0x4F },
2622 { 0x22, 0x7A9, 0xCD },
2623 { 0x22, 0x7AA, 0x48 },
2624 { 0x22, 0x7AB, 0x4F },
2625 { 0x22, 0x7AC, 0x32 },
2626 { 0x22, 0x7AD, 0x80 },
2627 { 0x22, 0x7A6, 0x40 },
2628 { 0x22, 0x7A7, 0x00 },
2629 { 0x22, 0x7A8, 0x00 },
2630 { 0x22, 0x7A9, 0x40 },
2631 { 0x22, 0x7AA, 0x00 },
2632 { 0x22, 0x7AB, 0x00 },
2633 { 0x22, 0x7AC, 0x33 },
2634 { 0x22, 0x7AD, 0x80 },
2635 /* common */
2636 { 0x22, 0x782, 0xC1 },
2637 { 0x22, 0x771, 0x2C },
2638 { 0x22, 0x772, 0x2C },
2639 { 0x22, 0x788, 0x04 },
2640 { 0x01, 0x7B0, 0x08 },
2641 {}
2642};
2643
372f8c75
TI		 2644static const struct hda_fixup stac92hd83xxx_fixups[] = {
2645 [STAC_92HD83XXX_REF] = {
2646 .type = HDA_FIXUP_PINS,
2647 .v.pins = ref92hd83xxx_pin_configs,
2648 },
2649 [STAC_92HD83XXX_PWR_REF] = {
2650 .type = HDA_FIXUP_PINS,
2651 .v.pins = ref92hd83xxx_pin_configs,
2652 },
2653 [STAC_DELL_S14] = {
2654 .type = HDA_FIXUP_PINS,
2655 .v.pins = dell_s14_pin_configs,
2656 },
2657 [STAC_DELL_VOSTRO_3500] = {
2658 .type = HDA_FIXUP_PINS,
2659 .v.pins = dell_vostro_3500_pin_configs,
2660 },
2661 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2662 .type = HDA_FIXUP_PINS,
2663 .v.pins = hp_cNB11_intquad_pin_configs,
2664 .chained = true,
2665 .chain_id = STAC_92HD83XXX_HP,
2666 },
2667 [STAC_92HD83XXX_HP] = {
2668 .type = HDA_FIXUP_FUNC,
2669 .v.func = stac92hd83xxx_fixup_hp,
2670 },
2671 [STAC_HP_DV7_4000] = {
2672 .type = HDA_FIXUP_PINS,
2673 .v.pins = hp_dv7_4000_pin_configs,
2674 .chained = true,
2675 .chain_id = STAC_92HD83XXX_HP,
2676 },
2677 [STAC_HP_ZEPHYR] = {
2678 .type = HDA_FIXUP_FUNC,
2679 .v.func = stac92hd83xxx_fixup_hp_zephyr,
2680 .chained = true,
2681 .chain_id = STAC_92HD83XXX_HP,
2682 },
2683 [STAC_92HD83XXX_HP_LED] = {
2684 .type = HDA_FIXUP_FUNC,
2685 .v.func = stac92hd83xxx_fixup_hp_led,
2686 .chained = true,
2687 .chain_id = STAC_92HD83XXX_HP,
2688 },
2689 [STAC_92HD83XXX_HP_INV_LED] = {
2690 .type = HDA_FIXUP_FUNC,
2691 .v.func = stac92hd83xxx_fixup_hp_inv_led,
2692 .chained = true,
2693 .chain_id = STAC_92HD83XXX_HP,
2694 },
2695 [STAC_92HD83XXX_HP_MIC_LED] = {
2696 .type = HDA_FIXUP_FUNC,
2697 .v.func = stac92hd83xxx_fixup_hp_mic_led,
2698 .chained = true,
2699 .chain_id = STAC_92HD83XXX_HP,
2700 },
37c367ec
TI		 2701 [STAC_HP_LED_GPIO10] = {
2702 .type = HDA_FIXUP_FUNC,
2703 .v.func = stac92hd83xxx_fixup_hp_led_gpio10,
2704 .chained = true,
2705 .chain_id = STAC_92HD83XXX_HP,
2706 },
372f8c75
TI		 2707 [STAC_92HD83XXX_HEADSET_JACK] = {
2708 .type = HDA_FIXUP_FUNC,
2709 .v.func = stac92hd83xxx_fixup_headset_jack,
2710 },
49920427
TI		 2711 [STAC_HP_ENVY_BASS] = {
2712 .type = HDA_FIXUP_PINS,
2713 .v.pins = (const struct hda_pintbl[]) {
2714 { 0x0f, 0x90170111 },
2715 {}
2716 },
2717 },
d009f3de
VK		 2718 [STAC_HP_BNB13_EQ] = {
2719 .type = HDA_FIXUP_VERBS,
2720 .v.verbs = hp_bnb13_eq_verbs,
2721 .chained = true,
2722 .chain_id = STAC_92HD83XXX_HP_MIC_LED,
2723 },
8695a003
TI		 2724 [STAC_HP_ENVY_TS_BASS] = {
2725 .type = HDA_FIXUP_PINS,
2726 .v.pins = (const struct hda_pintbl[]) {
2727 { 0x10, 0x92170111 },
2728 {}
2729 },
2730 },
6ab42ff4
HW		 2731 [STAC_HP_ENVY_TS_DAC_BIND] = {
2732 .type = HDA_FIXUP_FUNC,
2733 .v.func = hp_envy_ts_fixup_dac_bind,
2734 .chained = true,
2735 .chain_id = STAC_HP_ENVY_TS_BASS,
2736 },
4227de2a
TI		 2737 [STAC_92HD83XXX_GPIO10_EAPD] = {
2738 .type = HDA_FIXUP_FUNC,
2739 .v.func = stac92hd83xxx_fixup_gpio10_eapd,
2740 },
d0513fc6
MR		 2741};
2742
372f8c75
TI		 2743static const struct hda_model_fixup stac92hd83xxx_models[] = {
2744 { .id = STAC_92HD83XXX_REF, .name = "ref" },
2745 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2746 { .id = STAC_DELL_S14, .name = "dell-s14" },
2747 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2748 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2749 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2750 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2751 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2752 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2753 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2754 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
49920427 2755 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
d009f3de 2756 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
8695a003 2757 { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" },
372f8c75 2758 {}
d0513fc6
MR		 2759};
2760
372f8c75 2761static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
d0513fc6
MR		 2762 /* SigmaTel reference board */
2763 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 2764 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 2765 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2766 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 2767 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2768 "unknown Dell", STAC_DELL_S14),
8d032a8f
DH		 2769 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2770 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2771 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2772 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2773 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2774 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2775 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2776 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2777 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2778 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2779 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2780 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2781 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2782 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2783 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2784 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2785 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2786 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
f7f9bdfa
JW		 2787 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2788 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
0c27c180
VK		 2789 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2790 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2791 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2792 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2793 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2794 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2795 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
8ae5865e 2796 "HP Pavilion dv7", STAC_HP_DV7_4000),
0c27c180
VK		 2797 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2798 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2799 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2800 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
49920427
TI		 2801 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2802 "HP Envy Spectre", STAC_HP_ENVY_BASS),
37c367ec
TI		 2803 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
2804 "HP Folio 13", STAC_HP_LED_GPIO10),
62cbde18 2805 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
d009f3de
VK		 2806 "HP Folio", STAC_HP_BNB13_EQ),
2807 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
2808 "HP bNB13", STAC_HP_BNB13_EQ),
2809 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
2810 "HP bNB13", STAC_HP_BNB13_EQ),
2811 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
2812 "HP bNB13", STAC_HP_BNB13_EQ),
8695a003
TI		 2813 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e,
2814 "HP ENVY TS", STAC_HP_ENVY_TS_BASS),
6ab42ff4
HW		 2815 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1967,
2816 "HP ENVY TS", STAC_HP_ENVY_TS_DAC_BIND),
d009f3de
VK		 2817 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
2818 "HP bNB13", STAC_HP_BNB13_EQ),
2819 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
2820 "HP bNB13", STAC_HP_BNB13_EQ),
2821 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
2822 "HP bNB13", STAC_HP_BNB13_EQ),
2823 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
2824 "HP bNB13", STAC_HP_BNB13_EQ),
2825 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
2826 "HP bNB13", STAC_HP_BNB13_EQ),
2827 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
2828 "HP bNB13", STAC_HP_BNB13_EQ),
2829 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
2830 "HP bNB13", STAC_HP_BNB13_EQ),
2831 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
2832 "HP bNB13", STAC_HP_BNB13_EQ),
2833 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
2834 "HP bNB13", STAC_HP_BNB13_EQ),
2835 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
2836 "HP bNB13", STAC_HP_BNB13_EQ),
2837 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
2838 "HP bNB13", STAC_HP_BNB13_EQ),
2839 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
2840 "HP bNB13", STAC_HP_BNB13_EQ),
2841 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
2842 "HP bNB13", STAC_HP_BNB13_EQ),
2843 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
2844 "HP bNB13", STAC_HP_BNB13_EQ),
2845 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
2846 "HP bNB13", STAC_HP_BNB13_EQ),
2847 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
2848 "HP bNB13", STAC_HP_BNB13_EQ),
2849 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
2850 "HP bNB13", STAC_HP_BNB13_EQ),
2851 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
2852 "HP bNB13", STAC_HP_BNB13_EQ),
2853 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
2854 "HP bNB13", STAC_HP_BNB13_EQ),
2855 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
2856 "HP bNB13", STAC_HP_BNB13_EQ),
2857 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
2858 "HP bNB13", STAC_HP_BNB13_EQ),
2859 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
2860 "HP bNB13", STAC_HP_BNB13_EQ),
2861 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
2862 "HP bNB13", STAC_HP_BNB13_EQ),
2863 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
2864 "HP bNB13", STAC_HP_BNB13_EQ),
2865 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
2866 "HP bNB13", STAC_HP_BNB13_EQ),
2867 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
2868 "HP bNB13", STAC_HP_BNB13_EQ),
2869 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
2870 "HP bNB13", STAC_HP_BNB13_EQ),
2871 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
2872 "HP bNB13", STAC_HP_BNB13_EQ),
2873 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
2874 "HP bNB13", STAC_HP_BNB13_EQ),
2875 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
2876 "HP bNB13", STAC_HP_BNB13_EQ),
2877 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
2878 "HP bNB13", STAC_HP_BNB13_EQ),
2879 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
2880 "HP bNB13", STAC_HP_BNB13_EQ),
2881 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
2882 "HP bNB13", STAC_HP_BNB13_EQ),
2883 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
2884 "HP bNB13", STAC_HP_BNB13_EQ),
2885 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
2886 "HP bNB13", STAC_HP_BNB13_EQ),
2887 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
2888 "HP bNB13", STAC_HP_BNB13_EQ),
2889 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
2890 "HP bNB13", STAC_HP_BNB13_EQ),
2891 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
2892 "HP bNB13", STAC_HP_BNB13_EQ),
2893 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
2894 "HP bNB13", STAC_HP_BNB13_EQ),
2895 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
2896 "HP bNB13", STAC_HP_BNB13_EQ),
2897 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
2898 "HP bNB13", STAC_HP_BNB13_EQ),
2899 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
2900 "HP bNB13", STAC_HP_BNB13_EQ),
2901 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
2902 "HP bNB13", STAC_HP_BNB13_EQ),
2903 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
2904 "HP bNB13", STAC_HP_BNB13_EQ),
f9afed1f
TI		 2905 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2906 "HP", STAC_92HD83XXX_HP_MIC_LED),
4059a42c
TI		 2907 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
2908 "HP", STAC_92HD83XXX_HP_MIC_LED),
2909 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
2910 "HP", STAC_92HD83XXX_HP_MIC_LED),
0c27c180
VK		 2911 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2912 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2913 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2914 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2915 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2916 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2917 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2918 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2919 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2920 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2921 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2922 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2923 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2924 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2925 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2926 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2927 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2928 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2929 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2930 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2931 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2932 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2933 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2934 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2935 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2936 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2937 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2938 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
5556e147
VK		 2939 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2940 "HP", STAC_HP_ZEPHYR),
a3e19973
TI		 2941 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2942 "HP Mini", STAC_92HD83XXX_HP_LED),
5afc13af
GMDV		 2943 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2944 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
8c698fe2
TI		 2945 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2946 "HP Mini", STAC_92HD83XXX_HP_LED),
372f8c75 2947 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
b9d9c9ef
TI		 2948 /* match both for 0xfa91 and 0xfa93 */
2949 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_TOSHIBA, 0xfffd, 0xfa91,
4227de2a 2950 "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD),
574f3c4f 2951 {} /* terminator */
d0513fc6
MR		 2952};
2953
36c9db7a
TI		 2954/* HP dv7 bass switch - GPIO5 */
2955#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
2956static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2957 struct snd_ctl_elem_value *ucontrol)
2958{
2959 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2960 struct sigmatel_spec *spec = codec->spec;
2961 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2962 return 0;
2963}
2964
2965static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2966 struct snd_ctl_elem_value *ucontrol)
2967{
2968 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2969 struct sigmatel_spec *spec = codec->spec;
2970 unsigned int gpio_data;
2971
2972 gpio_data = (spec->gpio_data & ~0x20) |
2973 (ucontrol->value.integer.value[0] ? 0x20 : 0);
2974 if (gpio_data == spec->gpio_data)
2975 return 0;
2976 spec->gpio_data = gpio_data;
2977 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2978 return 1;
2979}
2980
2981static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2982 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2983 .info = stac_hp_bass_gpio_info,
2984 .get = stac_hp_bass_gpio_get,
2985 .put = stac_hp_bass_gpio_put,
2986};
2987
2988static int stac_add_hp_bass_switch(struct hda_codec *codec)
2989{
2990 struct sigmatel_spec *spec = codec->spec;
2991
2992 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2993 &stac_hp_bass_sw_ctrl))
2994 return -ENOMEM;
2995
2996 spec->gpio_mask |= 0x20;
2997 spec->gpio_dir |= 0x20;
2998 spec->gpio_data |= 0x20;
2999 return 0;
3000}
3001
0f6fcb73
TI		 3002static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
3003 { 0x0a, 0x02214030 },
3004 { 0x0b, 0x02a19040 },
3005 { 0x0c, 0x01a19020 },
3006 { 0x0d, 0x01014010 },
3007 { 0x0e, 0x0181302e },
3008 { 0x0f, 0x01014010 },
3009 { 0x14, 0x01019020 },
3010 { 0x18, 0x90a000f0 },
3011 { 0x19, 0x90a000f0 },
3012 { 0x1e, 0x01452050 },
3013 { 0x1f, 0x01452050 },
3014 {}
e035b841
MR		 3015};
3016
0f6fcb73
TI		 3017static const struct hda_pintbl dell_m4_1_pin_configs[] = {
3018 { 0x0a, 0x0421101f },
3019 { 0x0b, 0x04a11221 },
3020 { 0x0c, 0x40f000f0 },
3021 { 0x0d, 0x90170110 },
3022 { 0x0e, 0x23a1902e },
3023 { 0x0f, 0x23014250 },
3024 { 0x14, 0x40f000f0 },
3025 { 0x18, 0x90a000f0 },
3026 { 0x19, 0x40f000f0 },
3027 { 0x1e, 0x4f0000f0 },
3028 { 0x1f, 0x4f0000f0 },
3029 {}
a7662640
MR		 3030};
3031
0f6fcb73
TI		 3032static const struct hda_pintbl dell_m4_2_pin_configs[] = {
3033 { 0x0a, 0x0421101f },
3034 { 0x0b, 0x04a11221 },
3035 { 0x0c, 0x90a70330 },
3036 { 0x0d, 0x90170110 },
3037 { 0x0e, 0x23a1902e },
3038 { 0x0f, 0x23014250 },
3039 { 0x14, 0x40f000f0 },
3040 { 0x18, 0x40f000f0 },
3041 { 0x19, 0x40f000f0 },
3042 { 0x1e, 0x044413b0 },
3043 { 0x1f, 0x044413b0 },
3044 {}
a7662640
MR		 3045};
3046
0f6fcb73
TI		 3047static const struct hda_pintbl dell_m4_3_pin_configs[] = {
3048 { 0x0a, 0x0421101f },
3049 { 0x0b, 0x04a11221 },
3050 { 0x0c, 0x90a70330 },
3051 { 0x0d, 0x90170110 },
3052 { 0x0e, 0x40f000f0 },
3053 { 0x0f, 0x40f000f0 },
3054 { 0x14, 0x40f000f0 },
3055 { 0x18, 0x90a000f0 },
3056 { 0x19, 0x40f000f0 },
3057 { 0x1e, 0x044413b0 },
3058 { 0x1f, 0x044413b0 },
3059 {}
3a7abfd2
MR		 3060};
3061
0f6fcb73
TI		 3062static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
3063 const struct hda_fixup *fix, int action)
3064{
3065 struct sigmatel_spec *spec = codec->spec;
3066
3067 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3068 return;
3069
3070 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
3071 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
3072}
3073
0f6fcb73
TI		 3074static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
3075 const struct hda_fixup *fix, int action)
3076{
3077 struct sigmatel_spec *spec = codec->spec;
1a4f69d5 3078 struct hda_jack_callback *jack;
0f6fcb73
TI		 3079
3080 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3081 return;
3082
3083 /* Enable VREF power saving on GPIO1 detect */
7639a06c 3084 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
0f6fcb73 3085 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
7639a06c 3086 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
bda17b82
TI		 3087 stac_vref_event);
3088 if (!IS_ERR(jack))
36c9db7a
TI		 3089 jack->private_data = 0x02;
3090
0f6fcb73
TI		 3091 spec->gpio_mask |= 0x02;
3092
3093 /* enable internal microphone */
3094 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
0f6fcb73
TI		 3095}
3096
3097static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
3098 const struct hda_fixup *fix, int action)
3099{
3100 struct sigmatel_spec *spec = codec->spec;
3101
3102 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3103 return;
3104 spec->gpio_led = 0x01;
3105}
3106
3107static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
3108 const struct hda_fixup *fix, int action)
3109{
0f6fcb73
TI		 3110 unsigned int cap;
3111
3112 switch (action) {
3113 case HDA_FIXUP_ACT_PRE_PROBE:
3114 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
f6655d52
TI		 3115 break;
3116
3117 case HDA_FIXUP_ACT_PROBE:
0f6fcb73
TI		 3118 /* enable bass on HP dv7 */
3119 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
3120 cap &= AC_GPIO_IO_COUNT;
3121 if (cap >= 6)
3122 stac_add_hp_bass_switch(codec);
3123 break;
3124 }
3125}
3126
3127static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
3128 const struct hda_fixup *fix, int action)
3129{
3130 struct sigmatel_spec *spec = codec->spec;
3131
3132 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3133 return;
3134 spec->gpio_led = 0x08;
0f6fcb73
TI		 3135}
3136
196543d5
TI		 3137static bool is_hp_output(struct hda_codec *codec, hda_nid_t pin)
3138{
3139 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3140
3141 /* count line-out, too, as BIOS sets often so */
3142 return get_defcfg_connect(pin_cfg) != AC_JACK_PORT_NONE &&
3143 (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
3144 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT);
3145}
3146
3147static void fixup_hp_headphone(struct hda_codec *codec, hda_nid_t pin)
3148{
3149 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3150
3151 /* It was changed in the BIOS to just satisfy MS DTM.
3152 * Lets turn it back into slaved HP
3153 */
3154 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) |
3155 (AC_JACK_HP_OUT << AC_DEFCFG_DEVICE_SHIFT);
3156 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC | AC_DEFCFG_SEQUENCE))) |
3157 0x1f;
3158 snd_hda_codec_set_pincfg(codec, pin, pin_cfg);
3159}
0f6fcb73
TI		 3160
3161static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
3162 const struct hda_fixup *fix, int action)
3163{
3164 struct sigmatel_spec *spec = codec->spec;
3165
3166 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3167 return;
3168
196543d5
TI		 3169 /* when both output A and F are assigned, these are supposedly
3170 * dock and built-in headphones; fix both pin configs
3171 */
3172 if (is_hp_output(codec, 0x0a) && is_hp_output(codec, 0x0f)) {
3173 fixup_hp_headphone(codec, 0x0a);
3174 fixup_hp_headphone(codec, 0x0f);
0f6fcb73
TI		 3175 }
3176
36c9db7a 3177 if (find_mute_led_cfg(codec, 1))
4e76a883 3178 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
0f6fcb73
TI		 3179 spec->gpio_led,
3180 spec->gpio_led_polarity);
3181
3182}
3183
3184static const struct hda_fixup stac92hd71bxx_fixups[] = {
3185 [STAC_92HD71BXX_REF] = {
3186 .type = HDA_FIXUP_FUNC,
3187 .v.func = stac92hd71bxx_fixup_ref,
3188 },
3189 [STAC_DELL_M4_1] = {
3190 .type = HDA_FIXUP_PINS,
3191 .v.pins = dell_m4_1_pin_configs,
0f6fcb73
TI		 3192 },
3193 [STAC_DELL_M4_2] = {
3194 .type = HDA_FIXUP_PINS,
3195 .v.pins = dell_m4_2_pin_configs,
0f6fcb73
TI		 3196 },
3197 [STAC_DELL_M4_3] = {
3198 .type = HDA_FIXUP_PINS,
3199 .v.pins = dell_m4_3_pin_configs,
0f6fcb73
TI		 3200 },
3201 [STAC_HP_M4] = {
3202 .type = HDA_FIXUP_FUNC,
3203 .v.func = stac92hd71bxx_fixup_hp_m4,
3204 .chained = true,
3205 .chain_id = STAC_92HD71BXX_HP,
3206 },
3207 [STAC_HP_DV4] = {
3208 .type = HDA_FIXUP_FUNC,
3209 .v.func = stac92hd71bxx_fixup_hp_dv4,
3210 .chained = true,
3211 .chain_id = STAC_HP_DV5,
3212 },
3213 [STAC_HP_DV5] = {
3214 .type = HDA_FIXUP_FUNC,
3215 .v.func = stac92hd71bxx_fixup_hp_dv5,
3216 .chained = true,
3217 .chain_id = STAC_92HD71BXX_HP,
3218 },
3219 [STAC_HP_HDX] = {
3220 .type = HDA_FIXUP_FUNC,
3221 .v.func = stac92hd71bxx_fixup_hp_hdx,
3222 .chained = true,
3223 .chain_id = STAC_92HD71BXX_HP,
3224 },
36c9db7a 3225 [STAC_92HD71BXX_HP] = {
0f6fcb73 3226 .type = HDA_FIXUP_FUNC,
36c9db7a 3227 .v.func = stac92hd71bxx_fixup_hp,
0f6fcb73 3228 },
e035b841
MR		 3229};
3230
0f6fcb73
TI		 3231static const struct hda_model_fixup stac92hd71bxx_models[] = {
3232 { .id = STAC_92HD71BXX_REF, .name = "ref" },
3233 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
3234 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
3235 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
3236 { .id = STAC_HP_M4, .name = "hp-m4" },
3237 { .id = STAC_HP_DV4, .name = "hp-dv4" },
3238 { .id = STAC_HP_DV5, .name = "hp-dv5" },
3239 { .id = STAC_HP_HDX, .name = "hp-hdx" },
36c9db7a 3240 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
0f6fcb73 3241 {}
e035b841
MR		 3242};
3243
0f6fcb73 3244static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
e035b841
MR		 3245 /* SigmaTel reference board */
3246 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3247 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 3248 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3249 "DFI LanParty", STAC_92HD71BXX_REF),
5bdaaada
VK		 3250 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
3251 "HP", STAC_HP_DV5),
58d8395b
TI		 3252 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
3253 "HP", STAC_HP_DV5),
2ae466f8 3254 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 3255 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI		 3256 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
3257 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 3258 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
3259 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 3260 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 3261 "HP mini 1000", STAC_HP_M4),
ae6241fb 3262 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 3263 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 3264 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
3265 "HP dv6", STAC_HP_DV5),
e3d2530a
KG		 3266 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
3267 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY		 3268 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
3269 "HP DV6", STAC_HP_DV5),
1972d025
TI		 3270 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
3271 "HP", STAC_HP_DV5),
0f6fcb73 3272 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
a7662640
MR		 3273 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
3274 "unknown Dell", STAC_DELL_M4_1),
3275 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
3276 "unknown Dell", STAC_DELL_M4_1),
3277 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
3278 "unknown Dell", STAC_DELL_M4_1),
3279 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
3280 "unknown Dell", STAC_DELL_M4_1),
3281 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
3282 "unknown Dell", STAC_DELL_M4_1),
3283 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
3284 "unknown Dell", STAC_DELL_M4_1),
3285 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
3286 "unknown Dell", STAC_DELL_M4_1),
3287 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
3288 "unknown Dell", STAC_DELL_M4_2),
3289 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
3290 "unknown Dell", STAC_DELL_M4_2),
3291 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
3292 "unknown Dell", STAC_DELL_M4_2),
3293 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
3294 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 3295 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
3296 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 3297 {} /* terminator */
3298};
3299
0a427846
TI		 3300static const struct hda_pintbl ref922x_pin_configs[] = {
3301 { 0x0a, 0x01014010 },
3302 { 0x0b, 0x01016011 },
3303 { 0x0c, 0x01012012 },
3304 { 0x0d, 0x0221401f },
3305 { 0x0e, 0x01813122 },
3306 { 0x0f, 0x01011014 },
3307 { 0x10, 0x01441030 },
3308 { 0x11, 0x01c41030 },
3309 { 0x15, 0x40000100 },
3310 { 0x1b, 0x40000100 },
3311 {}
2f2f4251
M		 3312};
3313
dfe495d0
TI		 3314/*
3315 STAC 922X pin configs for
3316 102801A7
3317 102801AB
3318 102801A9
3319 102801D1
3320 102801D2
3321*/
0a427846
TI		 3322static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
3323 { 0x0a, 0x02214030 },
3324 { 0x0b, 0x01a19021 },
3325 { 0x0c, 0x01111012 },
3326 { 0x0d, 0x01114010 },
3327 { 0x0e, 0x02a19020 },
3328 { 0x0f, 0x01117011 },
3329 { 0x10, 0x400001f0 },
3330 { 0x11, 0x400001f1 },
3331 { 0x15, 0x01813122 },
3332 { 0x1b, 0x400001f2 },
3333 {}
dfe495d0
TI		 3334};
3335
3336/*
3337 STAC 922X pin configs for
3338 102801AC
3339 102801D0
3340*/
0a427846
TI		 3341static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
3342 { 0x0a, 0x02214030 },
3343 { 0x0b, 0x01a19021 },
3344 { 0x0c, 0x01111012 },
3345 { 0x0d, 0x01114010 },
3346 { 0x0e, 0x02a19020 },
3347 { 0x0f, 0x01117011 },
3348 { 0x10, 0x01451140 },
3349 { 0x11, 0x400001f0 },
3350 { 0x15, 0x01813122 },
3351 { 0x1b, 0x400001f1 },
3352 {}
dfe495d0
TI		 3353};
3354
3355/*
3356 STAC 922X pin configs for
3357 102801BF
3358*/
0a427846
TI		 3359static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
3360 { 0x0a, 0x0321101f },
3361 { 0x0b, 0x01112024 },
3362 { 0x0c, 0x01111222 },
3363 { 0x0d, 0x91174220 },
3364 { 0x0e, 0x03a11050 },
3365 { 0x0f, 0x01116221 },
3366 { 0x10, 0x90a70330 },
3367 { 0x11, 0x01452340 },
3368 { 0x15, 0x40C003f1 },
3369 { 0x1b, 0x405003f0 },
3370 {}
dfe495d0
TI		 3371};
3372
3373/*
3374 STAC 9221 A1 pin configs for
3375 102801D7 (Dell XPS M1210)
3376*/
0a427846
TI		 3377static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
3378 { 0x0a, 0x02211211 },
3379 { 0x0b, 0x408103ff },
3380 { 0x0c, 0x02a1123e },
3381 { 0x0d, 0x90100310 },
3382 { 0x0e, 0x408003f1 },
3383 { 0x0f, 0x0221121f },
3384 { 0x10, 0x03451340 },
3385 { 0x11, 0x40c003f2 },
3386 { 0x15, 0x508003f3 },
3387 { 0x1b, 0x405003f4 },
3388 {}
dfe495d0
TI		 3389};
3390
0a427846
TI		 3391static const struct hda_pintbl d945gtp3_pin_configs[] = {
3392 { 0x0a, 0x0221401f },
3393 { 0x0b, 0x01a19022 },
3394 { 0x0c, 0x01813021 },
3395 { 0x0d, 0x01014010 },
3396 { 0x0e, 0x40000100 },
3397 { 0x0f, 0x40000100 },
3398 { 0x10, 0x40000100 },
3399 { 0x11, 0x40000100 },
3400 { 0x15, 0x02a19120 },
3401 { 0x1b, 0x40000100 },
3402 {}
3403};
3404
3405static const struct hda_pintbl d945gtp5_pin_configs[] = {
3406 { 0x0a, 0x0221401f },
3407 { 0x0b, 0x01011012 },
3408 { 0x0c, 0x01813024 },
3409 { 0x0d, 0x01014010 },
3410 { 0x0e, 0x01a19021 },
3411 { 0x0f, 0x01016011 },
3412 { 0x10, 0x01452130 },
3413 { 0x11, 0x40000100 },
3414 { 0x15, 0x02a19320 },
3415 { 0x1b, 0x40000100 },
3416 {}
403d1944
MP		 3417};
3418
0a427846
TI		 3419static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
3420 { 0x0a, 0x0121e21f },
3421 { 0x0b, 0x400000ff },
3422 { 0x0c, 0x9017e110 },
3423 { 0x0d, 0x400000fd },
3424 { 0x0e, 0x400000fe },
3425 { 0x0f, 0x0181e020 },
3426 { 0x10, 0x1145e030 },
3427 { 0x11, 0x11c5e240 },
3428 { 0x15, 0x400000fc },
3429 { 0x1b, 0x400000fb },
3430 {}
403d1944
MP		 3431};
3432
0a427846
TI		 3433static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
3434 { 0x0a, 0x0121e21f },
3435 { 0x0b, 0x90a7012e },
3436 { 0x0c, 0x9017e110 },
3437 { 0x0d, 0x400000fd },
3438 { 0x0e, 0x400000fe },
3439 { 0x0f, 0x0181e020 },
3440 { 0x10, 0x1145e230 },
3441 { 0x11, 0x500000fa },
3442 { 0x15, 0x400000fc },
3443 { 0x1b, 0x400000fb },
3444 {}
5d5d3bc3
IZ		 3445};
3446
0a427846
TI		 3447static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
3448 { 0x0a, 0x0121e21f },
3449 { 0x0b, 0x90a7012e },
3450 { 0x0c, 0x9017e110 },
3451 { 0x0d, 0x400000fd },
3452 { 0x0e, 0x400000fe },
3453 { 0x0f, 0x0181e020 },
3454 { 0x10, 0x1145e230 },
3455 { 0x11, 0x11c5e240 },
3456 { 0x15, 0x400000fc },
3457 { 0x1b, 0x400000fb },
3458 {}
6f0778d8
NB		 3459};
3460
0a427846
TI		 3461static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
3462 { 0x0a, 0x0321e21f },
3463 { 0x0b, 0x03a1e02e },
3464 { 0x0c, 0x9017e110 },
3465 { 0x0d, 0x9017e11f },
3466 { 0x0e, 0x400000fe },
3467 { 0x0f, 0x0381e020 },
3468 { 0x10, 0x1345e230 },
3469 { 0x11, 0x13c5e240 },
3470 { 0x15, 0x400000fc },
3471 { 0x1b, 0x400000fb },
3472 {}
3fc24d85
TI		 3473};
3474
0a427846
TI		 3475static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
3476 { 0x0a, 0x0321e21f },
3477 { 0x0b, 0x03a1e02e },
3478 { 0x0c, 0x9017e110 },
3479 { 0x0d, 0x9017e11f },
3480 { 0x0e, 0x400000fe },
3481 { 0x0f, 0x0381e020 },
3482 { 0x10, 0x1345e230 },
3483 { 0x11, 0x13c5e240 },
3484 { 0x15, 0x400000fc },
3485 { 0x1b, 0x400000fb },
3486 {}
f16928fb
SF		 3487};
3488
0a427846
TI		 3489static const struct hda_pintbl ecs202_pin_configs[] = {
3490 { 0x0a, 0x0221401f },
3491 { 0x0b, 0x02a19020 },
3492 { 0x0c, 0x01a19020 },
3493 { 0x0d, 0x01114010 },
3494 { 0x0e, 0x408000f0 },
3495 { 0x0f, 0x01813022 },
3496 { 0x10, 0x074510a0 },
3497 { 0x11, 0x40c400f1 },
3498 { 0x15, 0x9037012e },
3499 { 0x1b, 0x40e000f2 },
3500 {}
0dae0f83
TI		 3501};
3502
0a427846
TI		 3503/* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
3504static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
697aebab 3505 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
0a427846
TI		 3506 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
3507 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
3508 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
3509 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
3510 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
3511 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
3512 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
3513 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
3514 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
3515 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
3516 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
3517 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
3518 {}
8c650087 3519};
76c08828 3520
0a427846
TI		 3521static const struct hda_fixup stac922x_fixups[];
3522
3523/* remap the fixup from codec SSID and apply it */
3524static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
3525 const struct hda_fixup *fix,
3526 int action)
3527{
3528 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3529 return;
f5662e1c
DH		 3530
3531 codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
0a427846
TI		 3532 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
3533 stac922x_fixups);
f5662e1c 3534 if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET)
0a427846
TI		 3535 snd_hda_apply_fixup(codec, action);
3536}
3537
3538static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
3539 const struct hda_fixup *fix,
3540 int action)
3541{
3542 struct sigmatel_spec *spec = codec->spec;
3543
3544 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3545 spec->gpio_mask = spec->gpio_dir = 0x03;
3546 spec->gpio_data = 0x03;
3547 }
3548}
3549
3550static const struct hda_fixup stac922x_fixups[] = {
3551 [STAC_D945_REF] = {
3552 .type = HDA_FIXUP_PINS,
3553 .v.pins = ref922x_pin_configs,
3554 },
3555 [STAC_D945GTP3] = {
3556 .type = HDA_FIXUP_PINS,
3557 .v.pins = d945gtp3_pin_configs,
3558 },
3559 [STAC_D945GTP5] = {
3560 .type = HDA_FIXUP_PINS,
3561 .v.pins = d945gtp5_pin_configs,
3562 },
3563 [STAC_INTEL_MAC_AUTO] = {
3564 .type = HDA_FIXUP_FUNC,
3565 .v.func = stac922x_fixup_intel_mac_auto,
3566 },
3567 [STAC_INTEL_MAC_V1] = {
3568 .type = HDA_FIXUP_PINS,
3569 .v.pins = intel_mac_v1_pin_configs,
3570 .chained = true,
3571 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3572 },
3573 [STAC_INTEL_MAC_V2] = {
3574 .type = HDA_FIXUP_PINS,
3575 .v.pins = intel_mac_v2_pin_configs,
3576 .chained = true,
3577 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3578 },
3579 [STAC_INTEL_MAC_V3] = {
3580 .type = HDA_FIXUP_PINS,
3581 .v.pins = intel_mac_v3_pin_configs,
3582 .chained = true,
3583 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3584 },
3585 [STAC_INTEL_MAC_V4] = {
3586 .type = HDA_FIXUP_PINS,
3587 .v.pins = intel_mac_v4_pin_configs,
3588 .chained = true,
3589 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3590 },
3591 [STAC_INTEL_MAC_V5] = {
3592 .type = HDA_FIXUP_PINS,
3593 .v.pins = intel_mac_v5_pin_configs,
3594 .chained = true,
3595 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3596 },
3597 [STAC_922X_INTEL_MAC_GPIO] = {
3598 .type = HDA_FIXUP_FUNC,
3599 .v.func = stac922x_fixup_intel_mac_gpio,
3600 },
3601 [STAC_ECS_202] = {
3602 .type = HDA_FIXUP_PINS,
3603 .v.pins = ecs202_pin_configs,
3604 },
3605 [STAC_922X_DELL_D81] = {
3606 .type = HDA_FIXUP_PINS,
3607 .v.pins = dell_922x_d81_pin_configs,
3608 },
3609 [STAC_922X_DELL_D82] = {
3610 .type = HDA_FIXUP_PINS,
3611 .v.pins = dell_922x_d82_pin_configs,
3612 },
3613 [STAC_922X_DELL_M81] = {
3614 .type = HDA_FIXUP_PINS,
3615 .v.pins = dell_922x_m81_pin_configs,
3616 },
3617 [STAC_922X_DELL_M82] = {
3618 .type = HDA_FIXUP_PINS,
3619 .v.pins = dell_922x_m82_pin_configs,
3620 },
3621};
3622
3623static const struct hda_model_fixup stac922x_models[] = {
3624 { .id = STAC_D945_REF, .name = "ref" },
3625 { .id = STAC_D945GTP5, .name = "5stack" },
3626 { .id = STAC_D945GTP3, .name = "3stack" },
3627 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
3628 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
3629 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
3630 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
3631 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
3632 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
3633 { .id = STAC_ECS_202, .name = "ecs202" },
3634 { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
3635 { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
3636 { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
3637 { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
dfe495d0 3638 /* for backward compatibility */
0a427846
TI		 3639 { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
3640 { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
3641 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
3642 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
3643 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
3644 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
3645 {}
3646};
3647
3648static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
f5fcc13c
TI		 3649 /* SigmaTel reference board */
3650 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3651 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 3652 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3653 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 3654 /* Intel 945G based systems */
3655 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
3656 "Intel D945G", STAC_D945GTP3),
3657 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
3658 "Intel D945G", STAC_D945GTP3),
3659 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
3660 "Intel D945G", STAC_D945GTP3),
3661 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
3662 "Intel D945G", STAC_D945GTP3),
3663 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
3664 "Intel D945G", STAC_D945GTP3),
3665 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
3666 "Intel D945G", STAC_D945GTP3),
3667 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
3668 "Intel D945G", STAC_D945GTP3),
3669 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
3670 "Intel D945G", STAC_D945GTP3),
3671 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
3672 "Intel D945G", STAC_D945GTP3),
3673 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
3674 "Intel D945G", STAC_D945GTP3),
3675 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
3676 "Intel D945G", STAC_D945GTP3),
3677 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
3678 "Intel D945G", STAC_D945GTP3),
3679 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
3680 "Intel D945G", STAC_D945GTP3),
3681 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
3682 "Intel D945G", STAC_D945GTP3),
3683 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
3684 "Intel D945G", STAC_D945GTP3),
3685 /* Intel D945G 5-stack systems */
3686 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
3687 "Intel D945G", STAC_D945GTP5),
3688 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
3689 "Intel D945G", STAC_D945GTP5),
3690 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
3691 "Intel D945G", STAC_D945GTP5),
3692 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3693 "Intel D945G", STAC_D945GTP5),
3694 /* Intel 945P based systems */
3695 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3696 "Intel D945P", STAC_D945GTP3),
3697 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3698 "Intel D945P", STAC_D945GTP3),
3699 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3700 "Intel D945P", STAC_D945GTP3),
3701 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3702 "Intel D945P", STAC_D945GTP3),
3703 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3704 "Intel D945P", STAC_D945GTP3),
3705 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3706 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 3707 /* other intel */
3708 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3709 "Intel D945", STAC_D945_REF),
f5fcc13c 3710 /* other systems */
0a427846 3711
536319af 3712 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
0a427846
TI		 3713 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3714
dfe495d0
TI		 3715 /* Dell systems */
3716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3717 "unknown Dell", STAC_922X_DELL_D81),
3718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3719 "unknown Dell", STAC_922X_DELL_D81),
3720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3721 "unknown Dell", STAC_922X_DELL_D81),
3722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3723 "unknown Dell", STAC_922X_DELL_D82),
3724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3725 "unknown Dell", STAC_922X_DELL_M81),
3726 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3727 "unknown Dell", STAC_922X_DELL_D82),
3728 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3729 "unknown Dell", STAC_922X_DELL_D81),
3730 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3731 "unknown Dell", STAC_922X_DELL_D81),
3732 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3733 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 3734 /* ECS/PC Chips boards */
dea0a509 3735 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 3736 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 3737 {} /* terminator */
3738};
3739
29ac8363
TI		 3740static const struct hda_pintbl ref927x_pin_configs[] = {
3741 { 0x0a, 0x02214020 },
3742 { 0x0b, 0x02a19080 },
3743 { 0x0c, 0x0181304e },
3744 { 0x0d, 0x01014010 },
3745 { 0x0e, 0x01a19040 },
3746 { 0x0f, 0x01011012 },
3747 { 0x10, 0x01016011 },
3748 { 0x11, 0x0101201f },
3749 { 0x12, 0x183301f0 },
3750 { 0x13, 0x18a001f0 },
3751 { 0x14, 0x18a001f0 },
3752 { 0x21, 0x01442070 },
3753 { 0x22, 0x01c42190 },
3754 { 0x23, 0x40000100 },
3755 {}
3cc08dc6
MP		 3756};
3757
29ac8363
TI		 3758static const struct hda_pintbl d965_3st_pin_configs[] = {
3759 { 0x0a, 0x0221401f },
3760 { 0x0b, 0x02a19120 },
3761 { 0x0c, 0x40000100 },
3762 { 0x0d, 0x01014011 },
3763 { 0x0e, 0x01a19021 },
3764 { 0x0f, 0x01813024 },
3765 { 0x10, 0x40000100 },
3766 { 0x11, 0x40000100 },
3767 { 0x12, 0x40000100 },
3768 { 0x13, 0x40000100 },
3769 { 0x14, 0x40000100 },
3770 { 0x21, 0x40000100 },
3771 { 0x22, 0x40000100 },
3772 { 0x23, 0x40000100 },
3773 {}
81d3dbde
TD		 3774};
3775
29ac8363
TI		 3776static const struct hda_pintbl d965_5st_pin_configs[] = {
3777 { 0x0a, 0x02214020 },
3778 { 0x0b, 0x02a19080 },
3779 { 0x0c, 0x0181304e },
3780 { 0x0d, 0x01014010 },
3781 { 0x0e, 0x01a19040 },
3782 { 0x0f, 0x01011012 },
3783 { 0x10, 0x01016011 },
3784 { 0x11, 0x40000100 },
3785 { 0x12, 0x40000100 },
3786 { 0x13, 0x40000100 },
3787 { 0x14, 0x40000100 },
3788 { 0x21, 0x01442070 },
3789 { 0x22, 0x40000100 },
3790 { 0x23, 0x40000100 },
3791 {}
93ed1503
TD		 3792};
3793
29ac8363
TI		 3794static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3795 { 0x0a, 0x40000100 },
3796 { 0x0b, 0x40000100 },
3797 { 0x0c, 0x0181304e },
3798 { 0x0d, 0x01014010 },
3799 { 0x0e, 0x01a19040 },
3800 { 0x0f, 0x01011012 },
3801 { 0x10, 0x01016011 },
3802 { 0x11, 0x40000100 },
3803 { 0x12, 0x40000100 },
3804 { 0x13, 0x40000100 },
3805 { 0x14, 0x40000100 },
3806 { 0x21, 0x01442070 },
3807 { 0x22, 0x40000100 },
3808 { 0x23, 0x40000100 },
3809 {}
679d92ed
TI		 3810};
3811
29ac8363
TI		 3812static const struct hda_pintbl dell_3st_pin_configs[] = {
3813 { 0x0a, 0x02211230 },
3814 { 0x0b, 0x02a11220 },
3815 { 0x0c, 0x01a19040 },
3816 { 0x0d, 0x01114210 },
3817 { 0x0e, 0x01111212 },
3818 { 0x0f, 0x01116211 },
3819 { 0x10, 0x01813050 },
3820 { 0x11, 0x01112214 },
3821 { 0x12, 0x403003fa },
3822 { 0x13, 0x90a60040 },
3823 { 0x14, 0x90a60040 },
3824 { 0x21, 0x404003fb },
3825 { 0x22, 0x40c003fc },
3826 { 0x23, 0x40000100 },
3827 {}
4ff076e5
TD		 3828};
3829
29ac8363
TI		 3830static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3831 const struct hda_fixup *fix, int action)
3832{
29ac8363 3833 /* no jack detecion for ref-no-jd model */
36c9db7a
TI		 3834 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3835 codec->no_jack_detect = 1;
29ac8363
TI		 3836}
3837
3838static void stac927x_fixup_ref(struct hda_codec *codec,
3839 const struct hda_fixup *fix, int action)
3840{
3841 struct sigmatel_spec *spec = codec->spec;
3842
3843 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3844 snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3845 spec->eapd_mask = spec->gpio_mask = 0;
3846 spec->gpio_dir = spec->gpio_data = 0;
3847 }
3848}
3849
3850static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3851 const struct hda_fixup *fix, int action)
3852{
3853 struct sigmatel_spec *spec = codec->spec;
3854
3855 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3856 return;
3857
7639a06c 3858 if (codec->core.subsystem_id != 0x1028022f) {
29ac8363
TI		 3859 /* GPIO2 High = Enable EAPD */
3860 spec->eapd_mask = spec->gpio_mask = 0x04;
3861 spec->gpio_dir = spec->gpio_data = 0x04;
3862 }
29ac8363
TI		 3863
3864 snd_hda_add_verbs(codec, dell_3st_core_init);
3865 spec->volknob_init = 1;
29ac8363
TI		 3866}
3867
3868static void stac927x_fixup_volknob(struct hda_codec *codec,
3869 const struct hda_fixup *fix, int action)
3870{
3871 struct sigmatel_spec *spec = codec->spec;
3872
3873 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3874 snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3875 spec->volknob_init = 1;
3876 }
3877}
3878
3879static const struct hda_fixup stac927x_fixups[] = {
3880 [STAC_D965_REF_NO_JD] = {
3881 .type = HDA_FIXUP_FUNC,
3882 .v.func = stac927x_fixup_ref_no_jd,
3883 .chained = true,
3884 .chain_id = STAC_D965_REF,
3885 },
3886 [STAC_D965_REF] = {
3887 .type = HDA_FIXUP_FUNC,
3888 .v.func = stac927x_fixup_ref,
3889 },
3890 [STAC_D965_3ST] = {
3891 .type = HDA_FIXUP_PINS,
3892 .v.pins = d965_3st_pin_configs,
3893 .chained = true,
3894 .chain_id = STAC_D965_VERBS,
3895 },
3896 [STAC_D965_5ST] = {
3897 .type = HDA_FIXUP_PINS,
3898 .v.pins = d965_5st_pin_configs,
3899 .chained = true,
3900 .chain_id = STAC_D965_VERBS,
3901 },
3902 [STAC_D965_VERBS] = {
3903 .type = HDA_FIXUP_VERBS,
3904 .v.verbs = d965_core_init,
3905 },
3906 [STAC_D965_5ST_NO_FP] = {
3907 .type = HDA_FIXUP_PINS,
3908 .v.pins = d965_5st_no_fp_pin_configs,
3909 },
078502b5
DS		 3910 [STAC_NEMO_DEFAULT] = {
3911 .type = HDA_FIXUP_PINS,
3912 .v.pins = nemo_pin_configs,
3913 },
29ac8363
TI		 3914 [STAC_DELL_3ST] = {
3915 .type = HDA_FIXUP_PINS,
3916 .v.pins = dell_3st_pin_configs,
3917 .chained = true,
3918 .chain_id = STAC_927X_DELL_DMIC,
3919 },
3920 [STAC_DELL_BIOS] = {
3921 .type = HDA_FIXUP_PINS,
3922 .v.pins = (const struct hda_pintbl[]) {
29ac8363 3923 /* correct the front output jack as a hp out */
f3e351ee 3924 { 0x0f, 0x0221101f },
29ac8363
TI		 3925 /* correct the front input jack as a mic */
3926 { 0x0e, 0x02a79130 },
3927 {}
3928 },
3929 .chained = true,
3930 .chain_id = STAC_927X_DELL_DMIC,
3931 },
eefb8be4
TI		 3932 [STAC_DELL_BIOS_AMIC] = {
3933 .type = HDA_FIXUP_PINS,
3934 .v.pins = (const struct hda_pintbl[]) {
3935 /* configure the analog microphone on some laptops */
3936 { 0x0c, 0x90a79130 },
3937 {}
3938 },
3939 .chained = true,
3940 .chain_id = STAC_DELL_BIOS,
3941 },
29ac8363
TI		 3942 [STAC_DELL_BIOS_SPDIF] = {
3943 .type = HDA_FIXUP_PINS,
3944 .v.pins = (const struct hda_pintbl[]) {
3945 /* correct the device field to SPDIF out */
3946 { 0x21, 0x01442070 },
3947 {}
3948 },
3949 .chained = true,
3950 .chain_id = STAC_DELL_BIOS,
3951 },
3952 [STAC_927X_DELL_DMIC] = {
3953 .type = HDA_FIXUP_FUNC,
3954 .v.func = stac927x_fixup_dell_dmic,
3955 },
3956 [STAC_927X_VOLKNOB] = {
3957 .type = HDA_FIXUP_FUNC,
3958 .v.func = stac927x_fixup_volknob,
3959 },
3cc08dc6
MP		 3960};
3961
29ac8363
TI		 3962static const struct hda_model_fixup stac927x_models[] = {
3963 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3964 { .id = STAC_D965_REF, .name = "ref" },
3965 { .id = STAC_D965_3ST, .name = "3stack" },
3966 { .id = STAC_D965_5ST, .name = "5stack" },
3967 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3968 { .id = STAC_DELL_3ST, .name = "dell-3stack" },
3969 { .id = STAC_DELL_BIOS, .name = "dell-bios" },
078502b5 3970 { .id = STAC_NEMO_DEFAULT, .name = "nemo-default" },
eefb8be4 3971 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
29ac8363
TI		 3972 { .id = STAC_927X_VOLKNOB, .name = "volknob" },
3973 {}
f5fcc13c
TI		 3974};
3975
29ac8363 3976static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
f5fcc13c
TI		 3977 /* SigmaTel reference board */
3978 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3979 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 3980 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3981 "DFI LanParty", STAC_D965_REF),
81d3dbde 3982 /* Intel 946 based systems */
f5fcc13c
TI		 3983 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 3985 /* 965 based 3 stack systems */
dea0a509
TI		 3986 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3987 "Intel D965", STAC_D965_3ST),
3988 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3989 "Intel D965", STAC_D965_3ST),
4ff076e5 3990 /* Dell 3 stack systems */
dfe495d0 3991 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 3992 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
3993 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 3994 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 3995 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 3996 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 3997 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
29ac8363 3998 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
84d3dc20 3999 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 4000 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
4001 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
4002 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
29ac8363 4003 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
93ed1503 4004 /* 965 based 5 stack systems */
dea0a509
TI		 4005 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
4006 "Intel D965", STAC_D965_5ST),
4007 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
4008 "Intel D965", STAC_D965_5ST),
078502b5
DS		 4009 /* Nemo */
4010 SND_PCI_QUIRK(0x1888, 0x1000, "AmigaOne X1000", STAC_NEMO_DEFAULT),
54930531
TI		 4011 /* volume-knob fixes */
4012 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP		 4013 {} /* terminator */
4014};
4015
fe6322ca
TI		 4016static const struct hda_pintbl ref9205_pin_configs[] = {
4017 { 0x0a, 0x40000100 },
4018 { 0x0b, 0x40000100 },
4019 { 0x0c, 0x01016011 },
4020 { 0x0d, 0x01014010 },
4021 { 0x0e, 0x01813122 },
4022 { 0x0f, 0x01a19021 },
4023 { 0x14, 0x01019020 },
4024 { 0x16, 0x40000100 },
4025 { 0x17, 0x90a000f0 },
4026 { 0x18, 0x90a000f0 },
4027 { 0x21, 0x01441030 },
4028 { 0x22, 0x01c41030 },
4029 {}
f3302a59
MP		 4030};
4031
dfe495d0
TI		 4032/*
4033 STAC 9205 pin configs for
4034 102801F1
4035 102801F2
4036 102801FC
4037 102801FD
4038 10280204
4039 1028021F
3fa2ef74 4040 10280228 (Dell Vostro 1500)
95e70e87 4041 10280229 (Dell Vostro 1700)
dfe495d0 4042*/
fe6322ca
TI		 4043static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
4044 { 0x0a, 0x0321101F },
4045 { 0x0b, 0x03A11020 },
4046 { 0x0c, 0x400003FA },
4047 { 0x0d, 0x90170310 },
4048 { 0x0e, 0x400003FB },
4049 { 0x0f, 0x400003FC },
4050 { 0x14, 0x400003FD },
4051 { 0x16, 0x40F000F9 },
4052 { 0x17, 0x90A60330 },
4053 { 0x18, 0x400003FF },
4054 { 0x21, 0x0144131F },
4055 { 0x22, 0x40C003FE },
4056 {}
dfe495d0
TI		 4057};
4058
4059/*
4060 STAC 9205 pin configs for
4061 102801F9
4062 102801FA
4063 102801FE
4064 102801FF (Dell Precision M4300)
4065 10280206
4066 10280200
4067 10280201
4068*/
fe6322ca
TI		 4069static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
4070 { 0x0a, 0x0321101f },
4071 { 0x0b, 0x03a11020 },
4072 { 0x0c, 0x90a70330 },
4073 { 0x0d, 0x90170310 },
4074 { 0x0e, 0x400000fe },
4075 { 0x0f, 0x400000ff },
4076 { 0x14, 0x400000fd },
4077 { 0x16, 0x40f000f9 },
4078 { 0x17, 0x400000fa },
4079 { 0x18, 0x400000fc },
4080 { 0x21, 0x0144131f },
4081 { 0x22, 0x40c003f8 },
4082 /* Enable SPDIF in/out */
4083 { 0x1f, 0x01441030 },
4084 { 0x20, 0x1c410030 },
4085 {}
ae0a8ed8
TD		 4086};
4087
fe6322ca
TI		 4088static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
4089 { 0x0a, 0x0421101f },
4090 { 0x0b, 0x04a11020 },
4091 { 0x0c, 0x400003fa },
4092 { 0x0d, 0x90170310 },
4093 { 0x0e, 0x400003fb },
4094 { 0x0f, 0x400003fc },
4095 { 0x14, 0x400003fd },
4096 { 0x16, 0x400003f9 },
4097 { 0x17, 0x90a60330 },
4098 { 0x18, 0x400003ff },
4099 { 0x21, 0x01441340 },
4100 { 0x22, 0x40c003fe },
4101 {}
ae0a8ed8
TD		 4102};
4103
fe6322ca
TI		 4104static void stac9205_fixup_ref(struct hda_codec *codec,
4105 const struct hda_fixup *fix, int action)
4106{
4107 struct sigmatel_spec *spec = codec->spec;
4108
4109 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4110 snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
4111 /* SPDIF-In enabled */
4112 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
4113 }
4114}
4115
fe6322ca
TI		 4116static void stac9205_fixup_dell_m43(struct hda_codec *codec,
4117 const struct hda_fixup *fix, int action)
4118{
4119 struct sigmatel_spec *spec = codec->spec;
1a4f69d5 4120 struct hda_jack_callback *jack;
fe6322ca
TI		 4121
4122 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4123 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
4124
4125 /* Enable unsol response for GPIO4/Dock HP connection */
7639a06c 4126 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
fe6322ca 4127 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
7639a06c 4128 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
bda17b82
TI		 4129 stac_vref_event);
4130 if (!IS_ERR(jack))
36c9db7a 4131 jack->private_data = 0x01;
fe6322ca
TI		 4132
4133 spec->gpio_dir = 0x0b;
4134 spec->eapd_mask = 0x01;
4135 spec->gpio_mask = 0x1b;
4136 spec->gpio_mute = 0x10;
4137 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4138 * GPIO3 Low = DRM
4139 */
4140 spec->gpio_data = 0x01;
4141 }
4142}
4143
4144static void stac9205_fixup_eapd(struct hda_codec *codec,
4145 const struct hda_fixup *fix, int action)
4146{
4147 struct sigmatel_spec *spec = codec->spec;
4148
4149 if (action == HDA_FIXUP_ACT_PRE_PROBE)
4150 spec->eapd_switch = 0;
4151}
4152
4153static const struct hda_fixup stac9205_fixups[] = {
4154 [STAC_9205_REF] = {
4155 .type = HDA_FIXUP_FUNC,
4156 .v.func = stac9205_fixup_ref,
4157 },
4158 [STAC_9205_DELL_M42] = {
4159 .type = HDA_FIXUP_PINS,
4160 .v.pins = dell_9205_m42_pin_configs,
4161 },
4162 [STAC_9205_DELL_M43] = {
4163 .type = HDA_FIXUP_FUNC,
4164 .v.func = stac9205_fixup_dell_m43,
4165 },
4166 [STAC_9205_DELL_M44] = {
4167 .type = HDA_FIXUP_PINS,
4168 .v.pins = dell_9205_m44_pin_configs,
4169 },
4170 [STAC_9205_EAPD] = {
4171 .type = HDA_FIXUP_FUNC,
4172 .v.func = stac9205_fixup_eapd,
4173 },
4174 {}
f3302a59
MP		 4175};
4176
fe6322ca
TI		 4177static const struct hda_model_fixup stac9205_models[] = {
4178 { .id = STAC_9205_REF, .name = "ref" },
4179 { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
4180 { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
4181 { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
4182 { .id = STAC_9205_EAPD, .name = "eapd" },
4183 {}
f5fcc13c
TI		 4184};
4185
fe6322ca 4186static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
f5fcc13c
TI		 4187 /* SigmaTel reference board */
4188 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
4189 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 4190 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
4191 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 4192 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
4193 "DFI LanParty", STAC_9205_REF),
d9a4268e 4194 /* Dell */
dfe495d0
TI		 4195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
4196 "unknown Dell", STAC_9205_DELL_M42),
4197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
4198 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 4199 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 4200 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 4201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
4202 "Dell Precision", STAC_9205_DELL_M43),
4203 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
4204 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 4205 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
4206 "unknown Dell", STAC_9205_DELL_M42),
4207 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
4208 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 4209 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
4210 "Dell Precision", STAC_9205_DELL_M43),
4211 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 4212 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 4213 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
4214 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 4215 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
4216 "Dell Precision", STAC_9205_DELL_M43),
4217 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
4218 "Dell Precision", STAC_9205_DELL_M43),
36c9db7a
TI		 4219 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
4220 "Dell Precision", STAC_9205_DELL_M43),
4221 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
4222 "Dell Inspiron", STAC_9205_DELL_M44),
4223 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
4224 "Dell Vostro 1500", STAC_9205_DELL_M42),
4225 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
4226 "Dell Vostro 1700", STAC_9205_DELL_M42),
4227 /* Gateway */
4228 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
4229 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
4230 {} /* terminator */
4231};
a64135a2 4232
8b3dfdaf
TI		 4233static void stac92hd95_fixup_hp_led(struct hda_codec *codec,
4234 const struct hda_fixup *fix, int action)
4235{
4236 struct sigmatel_spec *spec = codec->spec;
4237
4238 if (action != HDA_FIXUP_ACT_PRE_PROBE)
4239 return;
4240
4241 if (find_mute_led_cfg(codec, spec->default_polarity))
4242 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
4243 spec->gpio_led,
4244 spec->gpio_led_polarity);
4245}
4246
4247static const struct hda_fixup stac92hd95_fixups[] = {
4248 [STAC_92HD95_HP_LED] = {
4249 .type = HDA_FIXUP_FUNC,
4250 .v.func = stac92hd95_fixup_hp_led,
4251 },
4252 [STAC_92HD95_HP_BASS] = {
4253 .type = HDA_FIXUP_VERBS,
4254 .v.verbs = (const struct hda_verb[]) {
4255 {0x1a, 0x795, 0x00}, /* HPF to 100Hz */
4256 {}
4257 },
4258 .chained = true,
4259 .chain_id = STAC_92HD95_HP_LED,
4260 },
4261};
4262
4263static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = {
4264 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS),
4265 {} /* terminator */
4266};
4267
4268static const struct hda_model_fixup stac92hd95_models[] = {
4269 { .id = STAC_92HD95_HP_LED, .name = "hp-led" },
4270 { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" },
4271 {}
4272};
4273
4274
36c9db7a 4275static int stac_parse_auto_config(struct hda_codec *codec)
ab5a6ebe
VK		 4276{
4277 struct sigmatel_spec *spec = codec->spec;
36c9db7a 4278 int err;
f390dad4 4279 int flags = 0;
ab5a6ebe 4280
f390dad4
DH		 4281 if (spec->headset_jack)
4282 flags |= HDA_PINCFG_HEADSET_MIC;
4283
4284 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
36c9db7a
TI		 4285 if (err < 0)
4286 return err;
ab5a6ebe 4287
36c9db7a
TI		 4288 /* add hooks */
4289 spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
4290 spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
ab5a6ebe 4291
36c9db7a 4292 spec->gen.automute_hook = stac_update_outputs;
3d21d3f7 4293
36c9db7a
TI		 4294 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
4295 if (err < 0)
4296 return err;
3d21d3f7 4297
6b275b14
TI		 4298 if (spec->vref_mute_led_nid) {
4299 err = snd_hda_gen_fix_pin_power(codec, spec->vref_mute_led_nid);
4300 if (err < 0)
4301 return err;
4302 }
4303
36c9db7a
TI		 4304 /* setup analog beep controls */
4305 if (spec->anabeep_nid > 0) {
4306 err = stac_auto_create_beep_ctls(codec,
4307 spec->anabeep_nid);
4308 if (err < 0)
4309 return err;
3d21d3f7
TI		 4310 }
4311
36c9db7a
TI		 4312 /* setup digital beep controls and input device */
4313#ifdef CONFIG_SND_HDA_INPUT_BEEP
7504b6cd
TI		 4314 if (spec->gen.beep_nid) {
4315 hda_nid_t nid = spec->gen.beep_nid;
36c9db7a
TI		 4316 unsigned int caps;
4317
4318 err = stac_auto_create_beep_ctls(codec, nid);
36c9db7a
TI		 4319 if (err < 0)
4320 return err;
4321 if (codec->beep) {
4322 /* IDT/STAC codecs have linear beep tone parameter */
4323 codec->beep->linear_tone = spec->linear_tone_beep;
4324 /* if no beep switch is available, make its own one */
4325 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
4326 if (!(caps & AC_AMPCAP_MUTE)) {
4327 err = stac_beep_switch_ctl(codec);
4328 if (err < 0)
4329 return err;
fd60cc89
MR		 4330 }
4331 }
314634bc 4332 }
36c9db7a 4333#endif
314634bc 4334
36c9db7a
TI		 4335 if (spec->gpio_led)
4336 spec->gen.vmaster_mute.hook = stac_vmaster_hook;
4337
4338 if (spec->aloopback_ctl &&
4339 snd_hda_get_bool_hint(codec, "loopback") == 1) {
a551d914
TI		 4340 unsigned int wr_verb =
4341 spec->aloopback_ctl->private_value >> 16;
4342 if (snd_hdac_regmap_add_vendor_verb(&codec->core, wr_verb))
4343 return -ENOMEM;
36c9db7a
TI		 4344 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
4345 return -ENOMEM;
4346 }
4347
42875479
TI		 4348 if (spec->have_spdif_mux) {
4349 err = stac_create_spdif_mux_ctls(codec);
4350 if (err < 0)
4351 return err;
4352 }
4353
7a9744cb 4354 stac_init_power_map(codec);
aa699c49 4355
7a9744cb
TI		 4356 return 0;
4357}
36c9db7a
TI		 4358
4359static int stac_init(struct hda_codec *codec)
d38cce70
KG		 4360{
4361 struct sigmatel_spec *spec = codec->spec;
36c9db7a 4362 int i;
07f80449 4363
36c9db7a
TI		 4364 /* override some hints */
4365 stac_store_hints(codec);
26ebe0a2 4366
36c9db7a 4367 /* set up GPIO */
36c9db7a
TI		 4368 /* turn on EAPD statically when spec->eapd_switch isn't set.
4369 * otherwise, unsol event will turn it on/off dynamically
4370 */
4371 if (!spec->eapd_switch)
1ea9a69d
TI		 4372 spec->gpio_data |= spec->eapd_mask;
4373 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
d38cce70 4374
36c9db7a 4375 snd_hda_gen_init(codec);
c357aab0 4376
36c9db7a
TI		 4377 /* sync the power-map */
4378 if (spec->num_pwrs)
7639a06c 4379 snd_hda_codec_write(codec, codec->core.afg, 0,
36c9db7a
TI		 4380 AC_VERB_IDT_SET_POWER_MAP,
4381 spec->power_map_bits);
0f6fcb73 4382
36c9db7a
TI		 4383 /* power down inactive ADCs */
4384 if (spec->powerdown_adcs) {
4385 for (i = 0; i < spec->gen.num_all_adcs; i++) {
4386 if (spec->active_adcs & (1 << i))
4387 continue;
4388 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
4389 AC_VERB_SET_POWER_STATE,
4390 AC_PWRST_D3);
89bb3e74
TI		 4391 }
4392 }
4393
c357aab0
VK		 4394 return 0;
4395}
4396
36c9db7a 4397static void stac_shutup(struct hda_codec *codec)
78987bdc 4398{
36c9db7a
TI		 4399 struct sigmatel_spec *spec = codec->spec;
4400
4401 snd_hda_shutup_pins(codec);
4402
4403 if (spec->eapd_mask)
4404 stac_gpio_set(codec, spec->gpio_mask,
4405 spec->gpio_dir, spec->gpio_data &
4406 ~spec->eapd_mask);
4407}
4408
7504b6cd 4409#define stac_free snd_hda_gen_free
78987bdc 4410
cd6a6503 4411#ifdef CONFIG_SND_PROC_FS
2d34e1b3
TI		 4412static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4413 struct hda_codec *codec, hda_nid_t nid)
4414{
7639a06c 4415 if (nid == codec->core.afg)
2d34e1b3 4416 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
c882246d
TI		 4417 snd_hda_codec_read(codec, nid, 0,
4418 AC_VERB_IDT_GET_POWER_MAP, 0));
2d34e1b3
TI		 4419}
4420
4421static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4422 struct hda_codec *codec,
4423 unsigned int verb)
4424{
4425 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
7639a06c 4426 snd_hda_codec_read(codec, codec->core.afg, 0, verb, 0));
2d34e1b3
TI		 4427}
4428
4429/* stac92hd71bxx, stac92hd73xx */
4430static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4431 struct hda_codec *codec, hda_nid_t nid)
4432{
4433 stac92hd_proc_hook(buffer, codec, nid);
7639a06c 4434 if (nid == codec->core.afg)
2d34e1b3
TI		 4435 analog_loop_proc_hook(buffer, codec, 0xfa0);
4436}
4437
4438static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4439 struct hda_codec *codec, hda_nid_t nid)
4440{
7639a06c 4441 if (nid == codec->core.afg)
2d34e1b3
TI		 4442 analog_loop_proc_hook(buffer, codec, 0xfe0);
4443}
4444
4445static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4446 struct hda_codec *codec, hda_nid_t nid)
4447{
7639a06c 4448 if (nid == codec->core.afg)
2d34e1b3
TI		 4449 analog_loop_proc_hook(buffer, codec, 0xfeb);
4450}
4451#else
4452#define stac92hd_proc_hook NULL
4453#define stac92hd7x_proc_hook NULL
4454#define stac9205_proc_hook NULL
4455#define stac927x_proc_hook NULL
4456#endif
4457
2a43952a 4458#ifdef CONFIG_PM
36c9db7a
TI		 4459static int stac_suspend(struct hda_codec *codec)
4460{
4461 stac_shutup(codec);
4462 return 0;
4463}
36c9db7a
TI		 4464#else
4465#define stac_suspend NULL
36c9db7a 4466#endif /* CONFIG_PM */
7df1ce1a 4467
36c9db7a 4468static const struct hda_codec_ops stac_patch_ops = {
aa699c49 4469 .build_controls = snd_hda_gen_build_controls,
36c9db7a
TI		 4470 .build_pcms = snd_hda_gen_build_pcms,
4471 .init = stac_init,
4472 .free = stac_free,
29adc4b9 4473 .unsol_event = snd_hda_jack_unsol_event,
2a43952a 4474#ifdef CONFIG_PM
36c9db7a 4475 .suspend = stac_suspend,
ff6fdc37 4476#endif
36c9db7a 4477 .reboot_notify = stac_shutup,
2f2f4251
M		 4478};
4479
36c9db7a 4480static int alloc_stac_spec(struct hda_codec *codec)
361dab3e
TI		 4481{
4482 struct sigmatel_spec *spec;
4483
4484 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4485 if (!spec)
4486 return -ENOMEM;
36c9db7a 4487 snd_hda_gen_spec_init(&spec->gen);
361dab3e
TI		 4488 codec->spec = spec;
4489 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
d89c6c0c 4490 spec->gen.dac_min_mute = true;
225068ab 4491 codec->patch_ops = stac_patch_ops;
361dab3e
TI		 4492 return 0;
4493}
4494
2f2f4251
M		 4495static int patch_stac9200(struct hda_codec *codec)
4496{
4497 struct sigmatel_spec *spec;
c7d4b2fa 4498 int err;
2f2f4251 4499
36c9db7a 4500 err = alloc_stac_spec(codec);
361dab3e
TI		 4501 if (err < 0)
4502 return err;
2f2f4251 4503
361dab3e 4504 spec = codec->spec;
1b0e372d 4505 spec->linear_tone_beep = 1;
36c9db7a 4506 spec->gen.own_eapd_ctl = 1;
d39a3ae8 4507
ba615b86 4508 codec->power_filter = snd_hda_codec_eapd_power_filter;
2f2f4251 4509
d39a3ae8 4510 snd_hda_add_verbs(codec, stac9200_eapd_init);
c7d4b2fa 4511
36c9db7a
TI		 4512 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
4513 stac9200_fixups);
d39a3ae8 4514 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
117f257d 4515
36c9db7a 4516 err = stac_parse_auto_config(codec);
c7d4b2fa 4517 if (err < 0) {
36c9db7a 4518 stac_free(codec);
c7d4b2fa
M		 4519 return err;
4520 }
2f2f4251 4521
d39a3ae8
TI		 4522 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4523
2f2f4251
M		 4524 return 0;
4525}
4526
8e21c34c
TD		 4527static int patch_stac925x(struct hda_codec *codec)
4528{
4529 struct sigmatel_spec *spec;
4530 int err;
4531
36c9db7a 4532 err = alloc_stac_spec(codec);
361dab3e
TI		 4533 if (err < 0)
4534 return err;
8e21c34c 4535
361dab3e 4536 spec = codec->spec;
1b0e372d 4537 spec->linear_tone_beep = 1;
36c9db7a 4538 spec->gen.own_eapd_ctl = 1;
9cb36c2a 4539
d2077d40 4540 snd_hda_add_verbs(codec, stac925x_core_init);
8e21c34c 4541
36c9db7a
TI		 4542 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
4543 stac925x_fixups);
d2077d40
TI		 4544 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4545
36c9db7a 4546 err = stac_parse_auto_config(codec);
8e21c34c 4547 if (err < 0) {
36c9db7a 4548 stac_free(codec);
8e21c34c
TD		 4549 return err;
4550 }
4551
d2077d40
TI		 4552 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4553
8e21c34c
TD		 4554 return 0;
4555}
4556
e1f0d669
MR		 4557static int patch_stac92hd73xx(struct hda_codec *codec)
4558{
4559 struct sigmatel_spec *spec;
361dab3e 4560 int err;
c21ca4a8 4561 int num_dacs;
e1f0d669 4562
36c9db7a 4563 err = alloc_stac_spec(codec);
361dab3e
TI		 4564 if (err < 0)
4565 return err;
e1f0d669 4566
361dab3e 4567 spec = codec->spec;
c7e10080
TI		 4568 /* enable power_save_node only for new 92HD89xx chips, as it causes
4569 * click noises on old 92HD73xx chips.
4570 */
4571 if ((codec->core.vendor_id & 0xfffffff0) != 0x111d7670)
4572 codec->power_save_node = 1;
1b0e372d 4573 spec->linear_tone_beep = 0;
2748746f 4574 spec->gen.mixer_nid = 0x1d;
42875479 4575 spec->have_spdif_mux = 1;
e1f0d669 4576
36c9db7a 4577 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
c21ca4a8 4578 if (num_dacs < 3 || num_dacs > 5) {
4e76a883
TI		 4579 codec_warn(codec,
4580 "Could not determine number of channels defaulting to DAC count\n");
36c9db7a 4581 num_dacs = 5;
e1f0d669 4582 }
55e30141 4583
c21ca4a8 4584 switch (num_dacs) {
e1f0d669 4585 case 0x3: /* 6 Channel */
36c9db7a 4586 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
e1f0d669
MR		 4587 break;
4588 case 0x4: /* 8 Channel */
36c9db7a 4589 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
e1f0d669
MR		 4590 break;
4591 case 0x5: /* 10 Channel */
36c9db7a 4592 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
d78d7a90 4593 break;
c21ca4a8 4594 }
e1f0d669 4595
e1f0d669
MR		 4596 spec->aloopback_mask = 0x01;
4597 spec->aloopback_shift = 8;
4598
7504b6cd 4599 spec->gen.beep_nid = 0x1c; /* digital beep */
6479c631 4600
55e30141
TI		 4601 /* GPIO0 High = Enable EAPD */
4602 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4603 spec->gpio_data = 0x01;
6b3ab21e 4604
55e30141 4605 spec->eapd_switch = 1;
a7662640 4606
a64135a2
MR		 4607 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4608 spec->pwr_nids = stac92hd73xx_pwr_nids;
4609
36c9db7a 4610 spec->gen.own_eapd_ctl = 1;
f4f678d2 4611 spec->gen.power_down_unused = 1;
36c9db7a 4612
36c9db7a
TI		 4613 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
4614 stac92hd73xx_fixups);
55e30141
TI		 4615 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4616
4617 if (!spec->volknob_init)
4618 snd_hda_add_verbs(codec, stac92hd73xx_core_init);
4619
36c9db7a 4620 err = stac_parse_auto_config(codec);
e1f0d669 4621 if (err < 0) {
36c9db7a 4622 stac_free(codec);
e1f0d669
MR		 4623 return err;
4624 }
4625
303985f8
DH		 4626 /* Don't GPIO-mute speakers if there are no internal speakers, because
4627 * the GPIO might be necessary for Headphone
4628 */
4629 if (spec->eapd_switch && !has_builtin_speaker(codec))
4630 spec->eapd_switch = 0;
4631
2d34e1b3
TI		 4632 codec->proc_widget_hook = stac92hd7x_proc_hook;
4633
55e30141
TI		 4634 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4635
e1f0d669
MR		 4636 return 0;
4637}
4638
372f8c75
TI		 4639static void stac_setup_gpio(struct hda_codec *codec)
4640{
4641 struct sigmatel_spec *spec = codec->spec;
4642
1ea9a69d 4643 spec->gpio_mask |= spec->eapd_mask;
372f8c75
TI		 4644 if (spec->gpio_led) {
4645 if (!spec->vref_mute_led_nid) {
4646 spec->gpio_mask |= spec->gpio_led;
4647 spec->gpio_dir |= spec->gpio_led;
4648 spec->gpio_data |= spec->gpio_led;
4649 } else {
dfc6e469 4650 codec->power_filter = stac_vref_led_power_filter;
372f8c75
TI		 4651 }
4652 }
4653
4654 if (spec->mic_mute_led_gpio) {
4655 spec->gpio_mask |= spec->mic_mute_led_gpio;
4656 spec->gpio_dir |= spec->mic_mute_led_gpio;
7fe30711 4657 spec->mic_enabled = 0;
372f8c75 4658 spec->gpio_data |= spec->mic_mute_led_gpio;
36c9db7a 4659
a90229e0 4660 spec->gen.cap_sync_hook = stac_capture_led_hook;
372f8c75
TI		 4661 }
4662}
4663
d0513fc6
MR		 4664static int patch_stac92hd83xxx(struct hda_codec *codec)
4665{
4666 struct sigmatel_spec *spec;
4667 int err;
4668
36c9db7a 4669 err = alloc_stac_spec(codec);
361dab3e
TI		 4670 if (err < 0)
4671 return err;
d0513fc6 4672
7639a06c
TI		 4673 /* longer delay needed for D3 */
4674 codec->core.power_caps &= ~AC_PWRST_EPSS;
699d8995 4675
361dab3e 4676 spec = codec->spec;
967b1307 4677 codec->power_save_node = 1;
1db7ccdb 4678 spec->linear_tone_beep = 0;
36c9db7a 4679 spec->gen.own_eapd_ctl = 1;
f4f678d2 4680 spec->gen.power_down_unused = 1;
2748746f 4681 spec->gen.mixer_nid = 0x1b;
36c9db7a 4682
7504b6cd 4683 spec->gen.beep_nid = 0x21; /* digital beep */
d0513fc6 4684 spec->pwr_nids = stac92hd83xxx_pwr_nids;
d0513fc6 4685 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
36c9db7a 4686 spec->default_polarity = -1; /* no default cfg */
d0513fc6 4687
372f8c75 4688 snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
e108c7b7 4689
36c9db7a
TI		 4690 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
4691 stac92hd83xxx_fixups);
372f8c75 4692 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
b4e81876 4693
372f8c75 4694 stac_setup_gpio(codec);
62cbde18 4695
36c9db7a 4696 err = stac_parse_auto_config(codec);
d0513fc6 4697 if (err < 0) {
36c9db7a 4698 stac_free(codec);
d0513fc6
MR		 4699 return err;
4700 }
4701
2d34e1b3
TI		 4702 codec->proc_widget_hook = stac92hd_proc_hook;
4703
372f8c75
TI		 4704 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4705
d0513fc6
MR		 4706 return 0;
4707}
4708
4e637c6e
VK		 4709static const hda_nid_t stac92hd95_pwr_nids[] = {
4710 0x0a, 0x0b, 0x0c, 0x0d
4711};
4712
4713static int patch_stac92hd95(struct hda_codec *codec)
4714{
4715 struct sigmatel_spec *spec;
4716 int err;
4717
4718 err = alloc_stac_spec(codec);
4719 if (err < 0)
4720 return err;
4721
7639a06c
TI		 4722 /* longer delay needed for D3 */
4723 codec->core.power_caps &= ~AC_PWRST_EPSS;
4e637c6e
VK		 4724
4725 spec = codec->spec;
967b1307 4726 codec->power_save_node = 1;
4e637c6e
VK		 4727 spec->linear_tone_beep = 0;
4728 spec->gen.own_eapd_ctl = 1;
4729 spec->gen.power_down_unused = 1;
4730
7504b6cd 4731 spec->gen.beep_nid = 0x19; /* digital beep */
4e637c6e
VK		 4732 spec->pwr_nids = stac92hd95_pwr_nids;
4733 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
8b3dfdaf 4734 spec->default_polarity = 0;
4e637c6e 4735
8b3dfdaf
TI		 4736 snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl,
4737 stac92hd95_fixups);
4738 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4739
4740 stac_setup_gpio(codec);
4741
4e637c6e
VK		 4742 err = stac_parse_auto_config(codec);
4743 if (err < 0) {
4744 stac_free(codec);
4745 return err;
4746 }
4747
4748 codec->proc_widget_hook = stac92hd_proc_hook;
4749
8b3dfdaf
TI		 4750 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4751
4e637c6e
VK		 4752 return 0;
4753}
4754
e035b841
MR		 4755static int patch_stac92hd71bxx(struct hda_codec *codec)
4756{
4757 struct sigmatel_spec *spec;
a551d914 4758 const hda_nid_t *unmute_nids = stac92hd71bxx_unmute_nids;
361dab3e 4759 int err;
e035b841 4760
36c9db7a 4761 err = alloc_stac_spec(codec);
361dab3e
TI		 4762 if (err < 0)
4763 return err;
e035b841 4764
361dab3e 4765 spec = codec->spec;
c545f799
TI		 4766 /* disabled power_save_node since it causes noises on a Dell machine */
4767 /* codec->power_save_node = 1; */
1b0e372d 4768 spec->linear_tone_beep = 0;
36c9db7a 4769 spec->gen.own_eapd_ctl = 1;
f4f678d2 4770 spec->gen.power_down_unused = 1;
2748746f 4771 spec->gen.mixer_nid = 0x17;
42875479 4772 spec->have_spdif_mux = 1;
e035b841 4773
0f6fcb73
TI		 4774 /* GPIO0 = EAPD */
4775 spec->gpio_mask = 0x01;
4776 spec->gpio_dir = 0x01;
4777 spec->gpio_data = 0x01;
41c3b648 4778
7639a06c 4779 switch (codec->core.vendor_id) {
541eee87
MR		 4780 case 0x111d76b6: /* 4 Port without Analog Mixer */
4781 case 0x111d76b7:
a551d914 4782 unmute_nids++;
541eee87 4783 break;
aafc4412 4784 case 0x111d7608: /* 5 Port with Analog Mixer */
7639a06c
TI		 4785 if ((codec->core.revision_id & 0xf) == 0 ||
4786 (codec->core.revision_id & 0xf) == 1)
8daaaa97 4787 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4788
aafc4412 4789 /* disable VSW */
a551d914 4790 unmute_nids++;
330ee995
TI		 4791 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4792 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
aafc4412
MR		 4793 break;
4794 case 0x111d7603: /* 6 Port with Analog Mixer */
7639a06c 4795 if ((codec->core.revision_id & 0xf) == 1)
8daaaa97 4796 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4797
5207e10e 4798 break;
541eee87
MR		 4799 }
4800
5e68fb3c 4801 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
0f6fcb73 4802 snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
5e68fb3c 4803
a551d914
TI		 4804 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) {
4805 const hda_nid_t *p;
4806 for (p = unmute_nids; *p; p++)
4807 snd_hda_codec_amp_init_stereo(codec, *p, HDA_INPUT, 0,
4808 0xff, 0x00);
4809 }
ca8d33fc 4810
36c9db7a 4811 spec->aloopback_ctl = &stac92hd71bxx_loopback;
4b33c767 4812 spec->aloopback_mask = 0x50;
541eee87
MR		 4813 spec->aloopback_shift = 0;
4814
8daaaa97 4815 spec->powerdown_adcs = 1;
7504b6cd 4816 spec->gen.beep_nid = 0x26; /* digital beep */
36c9db7a 4817 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
aafc4412 4818 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841 4819
36c9db7a
TI		 4820 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4821 stac92hd71bxx_fixups);
0f6fcb73 4822 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
5bdaaada 4823
372f8c75 4824 stac_setup_gpio(codec);
6a14f585 4825
36c9db7a 4826 err = stac_parse_auto_config(codec);
e035b841 4827 if (err < 0) {
36c9db7a 4828 stac_free(codec);
e035b841
MR		 4829 return err;
4830 }
4831
2d34e1b3
TI		 4832 codec->proc_widget_hook = stac92hd7x_proc_hook;
4833
0f6fcb73
TI		 4834 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4835
e035b841 4836 return 0;
86d190e7 4837}
e035b841 4838
2f2f4251
M		 4839static int patch_stac922x(struct hda_codec *codec)
4840{
4841 struct sigmatel_spec *spec;
c7d4b2fa 4842 int err;
2f2f4251 4843
36c9db7a 4844 err = alloc_stac_spec(codec);
361dab3e
TI		 4845 if (err < 0)
4846 return err;
2f2f4251 4847
361dab3e 4848 spec = codec->spec;
1b0e372d 4849 spec->linear_tone_beep = 1;
36c9db7a 4850 spec->gen.own_eapd_ctl = 1;
5d5d3bc3 4851
0a427846
TI		 4852 snd_hda_add_verbs(codec, stac922x_core_init);
4853
807a4636
TI		 4854 /* Fix Mux capture level; max to 2 */
4855 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4856 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4857 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4858 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4859 (0 << AC_AMPCAP_MUTE_SHIFT));
4860
36c9db7a
TI		 4861 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4862 stac922x_fixups);
4863 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4864
4865 err = stac_parse_auto_config(codec);
4866 if (err < 0) {
4867 stac_free(codec);
4868 return err;
4869 }
4870
0a427846
TI		 4871 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4872
3cc08dc6
MP		 4873 return 0;
4874}
4875
42875479
TI		 4876static const char * const stac927x_spdif_labels[] = {
4877 "Digital Playback", "ADAT", "Analog Mux 1",
4878 "Analog Mux 2", "Analog Mux 3", NULL
4879};
4880
3cc08dc6
MP		 4881static int patch_stac927x(struct hda_codec *codec)
4882{
4883 struct sigmatel_spec *spec;
4884 int err;
4885
36c9db7a 4886 err = alloc_stac_spec(codec);
361dab3e
TI		 4887 if (err < 0)
4888 return err;
3cc08dc6 4889
361dab3e 4890 spec = codec->spec;
1b0e372d 4891 spec->linear_tone_beep = 1;
36c9db7a 4892 spec->gen.own_eapd_ctl = 1;
42875479
TI		 4893 spec->have_spdif_mux = 1;
4894 spec->spdif_labels = stac927x_spdif_labels;
3cc08dc6 4895
7504b6cd 4896 spec->gen.beep_nid = 0x23; /* digital beep */
8e9068b1 4897
29ac8363
TI		 4898 /* GPIO0 High = Enable EAPD */
4899 spec->eapd_mask = spec->gpio_mask = 0x01;
4900 spec->gpio_dir = spec->gpio_data = 0x01;
af6ee302 4901
36c9db7a 4902 spec->aloopback_ctl = &stac927x_loopback;
e1f0d669
MR		 4903 spec->aloopback_mask = 0x40;
4904 spec->aloopback_shift = 0;
c0cea0d0 4905 spec->eapd_switch = 1;
8e9068b1 4906
36c9db7a
TI		 4907 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4908 stac927x_fixups);
f6655d52
TI		 4909 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4910
29ac8363
TI		 4911 if (!spec->volknob_init)
4912 snd_hda_add_verbs(codec, stac927x_core_init);
4913
36c9db7a 4914 err = stac_parse_auto_config(codec);
c7d4b2fa 4915 if (err < 0) {
36c9db7a 4916 stac_free(codec);
c7d4b2fa
M		 4917 return err;
4918 }
2f2f4251 4919
2d34e1b3
TI		 4920 codec->proc_widget_hook = stac927x_proc_hook;
4921
52987656
TI		 4922 /*
4923 * !!FIXME!!
4924 * The STAC927x seem to require fairly long delays for certain
4925 * command sequences. With too short delays (even if the answer
4926 * is set to RIRB properly), it results in the silence output
4927 * on some hardwares like Dell.
4928 *
4929 * The below flag enables the longer delay (see get_response
4930 * in hda_intel.c).
4931 */
4932 codec->bus->needs_damn_long_delay = 1;
4933
29ac8363 4934 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
e28d8322 4935
2f2f4251
M		 4936 return 0;
4937}
4938
f3302a59
MP		 4939static int patch_stac9205(struct hda_codec *codec)
4940{
4941 struct sigmatel_spec *spec;
8259980e 4942 int err;
f3302a59 4943
36c9db7a 4944 err = alloc_stac_spec(codec);
361dab3e
TI		 4945 if (err < 0)
4946 return err;
f3302a59 4947
361dab3e 4948 spec = codec->spec;
1b0e372d 4949 spec->linear_tone_beep = 1;
36c9db7a 4950 spec->gen.own_eapd_ctl = 1;
42875479 4951 spec->have_spdif_mux = 1;
f3302a59 4952
7504b6cd 4953 spec->gen.beep_nid = 0x23; /* digital beep */
f3302a59 4954
fe6322ca 4955 snd_hda_add_verbs(codec, stac9205_core_init);
36c9db7a 4956 spec->aloopback_ctl = &stac9205_loopback;
6479c631 4957
e1f0d669
MR		 4958 spec->aloopback_mask = 0x40;
4959 spec->aloopback_shift = 0;
87d48363 4960
fe6322ca
TI		 4961 /* GPIO0 High = EAPD */
4962 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4963 spec->gpio_data = 0x01;
87d48363 4964
fe6322ca
TI		 4965 /* Turn on/off EAPD per HP plugging */
4966 spec->eapd_switch = 1;
4fe5195c 4967
36c9db7a
TI		 4968 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4969 stac9205_fixups);
fe6322ca 4970 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
33382403 4971
36c9db7a 4972 err = stac_parse_auto_config(codec);
f3302a59 4973 if (err < 0) {
36c9db7a 4974 stac_free(codec);
f3302a59
MP		 4975 return err;
4976 }
4977
2d34e1b3
TI		 4978 codec->proc_widget_hook = stac9205_proc_hook;
4979
fe6322ca
TI		 4980 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4981
f3302a59
MP		 4982 return 0;
4983}
4984
db064e50 4985/*
6d859065 4986 * STAC9872 hack
db064e50
TI		 4987 */
4988
2b63536f 4989static const struct hda_verb stac9872_core_init[] = {
1624cb9a 4990 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4991 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4992 {}
4993};
4994
fc268c10
TI		 4995static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4996 { 0x0a, 0x03211020 },
4997 { 0x0b, 0x411111f0 },
4998 { 0x0c, 0x411111f0 },
4999 { 0x0d, 0x03a15030 },
5000 { 0x0e, 0x411111f0 },
5001 { 0x0f, 0x90170110 },
5002 { 0x11, 0x411111f0 },
5003 { 0x13, 0x411111f0 },
5004 { 0x14, 0x90a7013e },
5005 {}
307282c8
TI		 5006};
5007
fc268c10
TI		 5008static const struct hda_model_fixup stac9872_models[] = {
5009 { .id = STAC_9872_VAIO, .name = "vaio" },
5010 {}
307282c8
TI		 5011};
5012
fc268c10
TI		 5013static const struct hda_fixup stac9872_fixups[] = {
5014 [STAC_9872_VAIO] = {
5015 .type = HDA_FIXUP_PINS,
5016 .v.pins = stac9872_vaio_pin_configs,
5017 },
307282c8
TI		 5018};
5019
fc268c10 5020static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
b04add95
TI		 5021 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
5022 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 5023 {} /* terminator */
5024};
5025
6d859065 5026static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5027{
5028 struct sigmatel_spec *spec;
1e137f92 5029 int err;
db064e50 5030
36c9db7a 5031 err = alloc_stac_spec(codec);
361dab3e
TI		 5032 if (err < 0)
5033 return err;
5034
5035 spec = codec->spec;
1b0e372d 5036 spec->linear_tone_beep = 1;
36c9db7a 5037 spec->gen.own_eapd_ctl = 1;
caa10b6e 5038
fc268c10
TI		 5039 snd_hda_add_verbs(codec, stac9872_core_init);
5040
36c9db7a
TI		 5041 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
5042 stac9872_fixups);
fc268c10 5043 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
1e137f92 5044
36c9db7a 5045 err = stac_parse_auto_config(codec);
1e137f92 5046 if (err < 0) {
36c9db7a 5047 stac_free(codec);
1e137f92
TI		 5048 return -EINVAL;
5049 }
fc268c10
TI		 5050
5051 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
5052
db064e50
TI		 5053 return 0;
5054}
5055
5056
2f2f4251
M		 5057/*
5058 * patch entries
5059 */
b9a94a9c
TI		 5060static const struct hda_device_id snd_hda_id_sigmatel[] = {
5061 HDA_CODEC_ENTRY(0x83847690, "STAC9200", patch_stac9200),
5062 HDA_CODEC_ENTRY(0x83847882, "STAC9220 A1", patch_stac922x),
5063 HDA_CODEC_ENTRY(0x83847680, "STAC9221 A1", patch_stac922x),
5064 HDA_CODEC_ENTRY(0x83847880, "STAC9220 A2", patch_stac922x),
5065 HDA_CODEC_ENTRY(0x83847681, "STAC9220D/9223D A2", patch_stac922x),
5066 HDA_CODEC_ENTRY(0x83847682, "STAC9221 A2", patch_stac922x),
5067 HDA_CODEC_ENTRY(0x83847683, "STAC9221D A2", patch_stac922x),
5068 HDA_CODEC_ENTRY(0x83847618, "STAC9227", patch_stac927x),
5069 HDA_CODEC_ENTRY(0x83847619, "STAC9227", patch_stac927x),
078502b5 5070 HDA_CODEC_ENTRY(0x83847638, "STAC92HD700", patch_stac927x),
b9a94a9c
TI		 5071 HDA_CODEC_ENTRY(0x83847616, "STAC9228", patch_stac927x),
5072 HDA_CODEC_ENTRY(0x83847617, "STAC9228", patch_stac927x),
5073 HDA_CODEC_ENTRY(0x83847614, "STAC9229", patch_stac927x),
5074 HDA_CODEC_ENTRY(0x83847615, "STAC9229", patch_stac927x),
5075 HDA_CODEC_ENTRY(0x83847620, "STAC9274", patch_stac927x),
5076 HDA_CODEC_ENTRY(0x83847621, "STAC9274D", patch_stac927x),
5077 HDA_CODEC_ENTRY(0x83847622, "STAC9273X", patch_stac927x),
5078 HDA_CODEC_ENTRY(0x83847623, "STAC9273D", patch_stac927x),
5079 HDA_CODEC_ENTRY(0x83847624, "STAC9272X", patch_stac927x),
5080 HDA_CODEC_ENTRY(0x83847625, "STAC9272D", patch_stac927x),
5081 HDA_CODEC_ENTRY(0x83847626, "STAC9271X", patch_stac927x),
5082 HDA_CODEC_ENTRY(0x83847627, "STAC9271D", patch_stac927x),
5083 HDA_CODEC_ENTRY(0x83847628, "STAC9274X5NH", patch_stac927x),
5084 HDA_CODEC_ENTRY(0x83847629, "STAC9274D5NH", patch_stac927x),
5085 HDA_CODEC_ENTRY(0x83847632, "STAC9202", patch_stac925x),
5086 HDA_CODEC_ENTRY(0x83847633, "STAC9202D", patch_stac925x),
5087 HDA_CODEC_ENTRY(0x83847634, "STAC9250", patch_stac925x),
5088 HDA_CODEC_ENTRY(0x83847635, "STAC9250D", patch_stac925x),
5089 HDA_CODEC_ENTRY(0x83847636, "STAC9251", patch_stac925x),
5090 HDA_CODEC_ENTRY(0x83847637, "STAC9250D", patch_stac925x),
5091 HDA_CODEC_ENTRY(0x83847645, "92HD206X", patch_stac927x),
5092 HDA_CODEC_ENTRY(0x83847646, "92HD206D", patch_stac927x),
5093 /* The following does not take into account .id=0x83847661 when subsys =
5094 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5095 * currently not fully supported.
5096 */
5097 HDA_CODEC_ENTRY(0x83847661, "CXD9872RD/K", patch_stac9872),
5098 HDA_CODEC_ENTRY(0x83847662, "STAC9872AK", patch_stac9872),
5099 HDA_CODEC_ENTRY(0x83847664, "CXD9872AKD", patch_stac9872),
5100 HDA_CODEC_ENTRY(0x83847698, "STAC9205", patch_stac9205),
5101 HDA_CODEC_ENTRY(0x838476a0, "STAC9205", patch_stac9205),
5102 HDA_CODEC_ENTRY(0x838476a1, "STAC9205D", patch_stac9205),
5103 HDA_CODEC_ENTRY(0x838476a2, "STAC9204", patch_stac9205),
5104 HDA_CODEC_ENTRY(0x838476a3, "STAC9204D", patch_stac9205),
5105 HDA_CODEC_ENTRY(0x838476a4, "STAC9255", patch_stac9205),
5106 HDA_CODEC_ENTRY(0x838476a5, "STAC9255D", patch_stac9205),
5107 HDA_CODEC_ENTRY(0x838476a6, "STAC9254", patch_stac9205),
5108 HDA_CODEC_ENTRY(0x838476a7, "STAC9254D", patch_stac9205),
5109 HDA_CODEC_ENTRY(0x111d7603, "92HD75B3X5", patch_stac92hd71bxx),
5110 HDA_CODEC_ENTRY(0x111d7604, "92HD83C1X5", patch_stac92hd83xxx),
5111 HDA_CODEC_ENTRY(0x111d76d4, "92HD83C1C5", patch_stac92hd83xxx),
5112 HDA_CODEC_ENTRY(0x111d7605, "92HD81B1X5", patch_stac92hd83xxx),
5113 HDA_CODEC_ENTRY(0x111d76d5, "92HD81B1C5", patch_stac92hd83xxx),
5114 HDA_CODEC_ENTRY(0x111d76d1, "92HD87B1/3", patch_stac92hd83xxx),
5115 HDA_CODEC_ENTRY(0x111d76d9, "92HD87B2/4", patch_stac92hd83xxx),
5116 HDA_CODEC_ENTRY(0x111d7666, "92HD88B3", patch_stac92hd83xxx),
5117 HDA_CODEC_ENTRY(0x111d7667, "92HD88B1", patch_stac92hd83xxx),
5118 HDA_CODEC_ENTRY(0x111d7668, "92HD88B2", patch_stac92hd83xxx),
5119 HDA_CODEC_ENTRY(0x111d7669, "92HD88B4", patch_stac92hd83xxx),
5120 HDA_CODEC_ENTRY(0x111d7608, "92HD75B2X5", patch_stac92hd71bxx),
5121 HDA_CODEC_ENTRY(0x111d7674, "92HD73D1X5", patch_stac92hd73xx),
5122 HDA_CODEC_ENTRY(0x111d7675, "92HD73C1X5", patch_stac92hd73xx),
5123 HDA_CODEC_ENTRY(0x111d7676, "92HD73E1X5", patch_stac92hd73xx),
5124 HDA_CODEC_ENTRY(0x111d7695, "92HD95", patch_stac92hd95),
5125 HDA_CODEC_ENTRY(0x111d76b0, "92HD71B8X", patch_stac92hd71bxx),
5126 HDA_CODEC_ENTRY(0x111d76b1, "92HD71B8X", patch_stac92hd71bxx),
5127 HDA_CODEC_ENTRY(0x111d76b2, "92HD71B7X", patch_stac92hd71bxx),
5128 HDA_CODEC_ENTRY(0x111d76b3, "92HD71B7X", patch_stac92hd71bxx),
5129 HDA_CODEC_ENTRY(0x111d76b4, "92HD71B6X", patch_stac92hd71bxx),
5130 HDA_CODEC_ENTRY(0x111d76b5, "92HD71B6X", patch_stac92hd71bxx),
5131 HDA_CODEC_ENTRY(0x111d76b6, "92HD71B5X", patch_stac92hd71bxx),
5132 HDA_CODEC_ENTRY(0x111d76b7, "92HD71B5X", patch_stac92hd71bxx),
5133 HDA_CODEC_ENTRY(0x111d76c0, "92HD89C3", patch_stac92hd73xx),
5134 HDA_CODEC_ENTRY(0x111d76c1, "92HD89C2", patch_stac92hd73xx),
5135 HDA_CODEC_ENTRY(0x111d76c2, "92HD89C1", patch_stac92hd73xx),
5136 HDA_CODEC_ENTRY(0x111d76c3, "92HD89B3", patch_stac92hd73xx),
5137 HDA_CODEC_ENTRY(0x111d76c4, "92HD89B2", patch_stac92hd73xx),
5138 HDA_CODEC_ENTRY(0x111d76c5, "92HD89B1", patch_stac92hd73xx),
5139 HDA_CODEC_ENTRY(0x111d76c6, "92HD89E3", patch_stac92hd73xx),
5140 HDA_CODEC_ENTRY(0x111d76c7, "92HD89E2", patch_stac92hd73xx),
5141 HDA_CODEC_ENTRY(0x111d76c8, "92HD89E1", patch_stac92hd73xx),
5142 HDA_CODEC_ENTRY(0x111d76c9, "92HD89D3", patch_stac92hd73xx),
5143 HDA_CODEC_ENTRY(0x111d76ca, "92HD89D2", patch_stac92hd73xx),
5144 HDA_CODEC_ENTRY(0x111d76cb, "92HD89D1", patch_stac92hd73xx),
5145 HDA_CODEC_ENTRY(0x111d76cc, "92HD89F3", patch_stac92hd73xx),
5146 HDA_CODEC_ENTRY(0x111d76cd, "92HD89F2", patch_stac92hd73xx),
5147 HDA_CODEC_ENTRY(0x111d76ce, "92HD89F1", patch_stac92hd73xx),
5148 HDA_CODEC_ENTRY(0x111d76df, "92HD93BXX", patch_stac92hd83xxx),
5149 HDA_CODEC_ENTRY(0x111d76e0, "92HD91BXX", patch_stac92hd83xxx),
5150 HDA_CODEC_ENTRY(0x111d76e3, "92HD98BXX", patch_stac92hd83xxx),
5151 HDA_CODEC_ENTRY(0x111d76e5, "92HD99BXX", patch_stac92hd83xxx),
5152 HDA_CODEC_ENTRY(0x111d76e7, "92HD90BXX", patch_stac92hd83xxx),
5153 HDA_CODEC_ENTRY(0x111d76e8, "92HD66B1X5", patch_stac92hd83xxx),
5154 HDA_CODEC_ENTRY(0x111d76e9, "92HD66B2X5", patch_stac92hd83xxx),
5155 HDA_CODEC_ENTRY(0x111d76ea, "92HD66B3X5", patch_stac92hd83xxx),
5156 HDA_CODEC_ENTRY(0x111d76eb, "92HD66C1X5", patch_stac92hd83xxx),
5157 HDA_CODEC_ENTRY(0x111d76ec, "92HD66C2X5", patch_stac92hd83xxx),
5158 HDA_CODEC_ENTRY(0x111d76ed, "92HD66C3X5", patch_stac92hd83xxx),
5159 HDA_CODEC_ENTRY(0x111d76ee, "92HD66B1X3", patch_stac92hd83xxx),
5160 HDA_CODEC_ENTRY(0x111d76ef, "92HD66B2X3", patch_stac92hd83xxx),
5161 HDA_CODEC_ENTRY(0x111d76f0, "92HD66B3X3", patch_stac92hd83xxx),
5162 HDA_CODEC_ENTRY(0x111d76f1, "92HD66C1X3", patch_stac92hd83xxx),
5163 HDA_CODEC_ENTRY(0x111d76f2, "92HD66C2X3", patch_stac92hd83xxx),
5164 HDA_CODEC_ENTRY(0x111d76f3, "92HD66C3/65", patch_stac92hd83xxx),
2f2f4251
M		 5165 {} /* terminator */
5166};
b9a94a9c 5167MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_sigmatel);
1289e9e8
TI		 5168
5169MODULE_LICENSE("GPL");
5170MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5171
d8a766a1 5172static struct hda_codec_driver sigmatel_driver = {
b9a94a9c 5173 .id = snd_hda_id_sigmatel,
1289e9e8
TI		 5174};
5175
d8a766a1 5176module_hda_codec_driver(sigmatel_driver);
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