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[ALSA] hda-codec - Support for SigmaTel 9872
[mirror_ubuntu-zesty-kernel.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <sound/driver.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/pci.h>
32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
36
4e55096e
M		 37#define NUM_CONTROL_ALLOC 32
38#define STAC_HP_EVENT 0x37
39#define STAC_UNSOL_ENABLE (AC_USRSP_EN | STAC_HP_EVENT)
40
403d1944
MP		 41#define STAC_REF 0
42#define STAC_D945GTP3 1
43#define STAC_D945GTP5 2
62fe78e9 44#define STAC_MACMINI 3
19039bd0
TI		 45#define STAC_D965_2112 4
46#define STAC_D965_284B 5
47#define STAC_922X_MODELS 6 /* number of 922x models */
403d1944 48
2f2f4251 49struct sigmatel_spec {
c8b6bf9b 50 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 51 unsigned int num_mixers;
52
403d1944 53 int board_config;
c7d4b2fa 54 unsigned int surr_switch: 1;
403d1944
MP		 55 unsigned int line_switch: 1;
56 unsigned int mic_switch: 1;
3cc08dc6 57 unsigned int alt_switch: 1;
82bc955f 58 unsigned int hp_detect: 1;
62fe78e9 59 unsigned int gpio_mute: 1;
c7d4b2fa 60
2f2f4251
M		 61 /* playback */
62 struct hda_multi_out multiout;
3cc08dc6 63 hda_nid_t dac_nids[5];
2f2f4251
M		 64
65 /* capture */
66 hda_nid_t *adc_nids;
2f2f4251 67 unsigned int num_adcs;
dabbed6f
M		 68 hda_nid_t *mux_nids;
69 unsigned int num_muxes;
dabbed6f 70 hda_nid_t dig_in_nid;
2f2f4251 71
2f2f4251
M		 72 /* pin widgets */
73 hda_nid_t *pin_nids;
74 unsigned int num_pins;
2f2f4251 75 unsigned int *pin_configs;
2f2f4251
M		 76
77 /* codec specific stuff */
78 struct hda_verb *init;
c8b6bf9b 79 struct snd_kcontrol_new *mixer;
2f2f4251
M		 80
81 /* capture source */
c7d4b2fa 82 struct hda_input_mux *input_mux;
3cc08dc6 83 unsigned int cur_mux[3];
2f2f4251 84
403d1944
MP		 85 /* i/o switches */
86 unsigned int io_switch[2];
2f2f4251 87
c7d4b2fa
M		 88 struct hda_pcm pcm_rec[2]; /* PCM information */
89
90 /* dynamic controls and input_mux */
91 struct auto_pin_cfg autocfg;
92 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 93 struct snd_kcontrol_new *kctl_alloc;
c7d4b2fa 94 struct hda_input_mux private_imux;
2f2f4251
M		 95};
96
97static hda_nid_t stac9200_adc_nids[1] = {
98 0x03,
99};
100
101static hda_nid_t stac9200_mux_nids[1] = {
102 0x0c,
103};
104
105static hda_nid_t stac9200_dac_nids[1] = {
106 0x02,
107};
108
2f2f4251
M		 109static hda_nid_t stac922x_adc_nids[2] = {
110 0x06, 0x07,
111};
112
19039bd0
TI		 113static hda_nid_t stac9227_adc_nids[2] = {
114 0x07, 0x08,
115};
116
117#if 0
118static hda_nid_t d965_2112_dac_nids[3] = {
119 0x02, 0x03, 0x05,
120};
121#endif
122
2f2f4251
M		 123static hda_nid_t stac922x_mux_nids[2] = {
124 0x12, 0x13,
125};
126
19039bd0
TI		 127static hda_nid_t stac9227_mux_nids[2] = {
128 0x15, 0x16,
129};
130
3cc08dc6
MP		 131static hda_nid_t stac927x_adc_nids[3] = {
132 0x07, 0x08, 0x09
133};
134
135static hda_nid_t stac927x_mux_nids[3] = {
136 0x15, 0x16, 0x17
137};
138
f3302a59
MP		 139static hda_nid_t stac9205_adc_nids[2] = {
140 0x12, 0x13
141};
142
143static hda_nid_t stac9205_mux_nids[2] = {
144 0x19, 0x1a
145};
146
c7d4b2fa
M		 147static hda_nid_t stac9200_pin_nids[8] = {
148 0x08, 0x09, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 149};
150
151static hda_nid_t stac922x_pin_nids[10] = {
152 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
153 0x0f, 0x10, 0x11, 0x15, 0x1b,
154};
155
3cc08dc6
MP		 156static hda_nid_t stac927x_pin_nids[14] = {
157 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
158 0x0f, 0x10, 0x11, 0x12, 0x13,
159 0x14, 0x21, 0x22, 0x23,
160};
161
f3302a59
MP		 162static hda_nid_t stac9205_pin_nids[12] = {
163 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
164 0x0f, 0x14, 0x16, 0x17, 0x18,
165 0x21, 0x22,
166
167};
168
c8b6bf9b 169static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 170{
171 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
172 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 173 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 174}
175
c8b6bf9b 176static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 177{
178 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
179 struct sigmatel_spec *spec = codec->spec;
180 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
181
182 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
183 return 0;
184}
185
c8b6bf9b 186static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 187{
188 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
189 struct sigmatel_spec *spec = codec->spec;
190 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
191
c7d4b2fa 192 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 193 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
194}
195
c7d4b2fa 196static struct hda_verb stac9200_core_init[] = {
2f2f4251 197 /* set dac0mux for dac converter */
c7d4b2fa 198 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 199 {}
200};
201
c7d4b2fa 202static struct hda_verb stac922x_core_init[] = {
2f2f4251 203 /* set master volume and direct control */
c7d4b2fa 204 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 205 {}
206};
207
19039bd0
TI		 208static struct hda_verb stac9227_core_init[] = {
209 /* set master volume and direct control */
210 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
211 /* unmute node 0x1b */
212 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
213 {}
214};
215
216static struct hda_verb d965_2112_core_init[] = {
217 /* set master volume and direct control */
218 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
219 /* unmute node 0x1b */
220 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
221 /* select node 0x03 as DAC */
222 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
223 {}
224};
225
3cc08dc6
MP		 226static struct hda_verb stac927x_core_init[] = {
227 /* set master volume and direct control */
228 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
229 {}
230};
231
f3302a59
MP		 232static struct hda_verb stac9205_core_init[] = {
233 /* set master volume and direct control */
234 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
235 {}
236};
237
c8b6bf9b 238static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 239 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
240 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
241 {
242 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
243 .name = "Input Source",
244 .count = 1,
245 .info = stac92xx_mux_enum_info,
246 .get = stac92xx_mux_enum_get,
247 .put = stac92xx_mux_enum_put,
248 },
249 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
250 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 251 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 252 { } /* end */
253};
254
c7d4b2fa 255/* This needs to be generated dynamically based on sequence */
c8b6bf9b 256static struct snd_kcontrol_new stac922x_mixer[] = {
2f2f4251
M		 257 {
258 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
259 .name = "Input Source",
260 .count = 1,
261 .info = stac92xx_mux_enum_info,
262 .get = stac92xx_mux_enum_get,
263 .put = stac92xx_mux_enum_put,
264 },
265 HDA_CODEC_VOLUME("Capture Volume", 0x17, 0x0, HDA_INPUT),
0fd1708a 266 HDA_CODEC_MUTE("Capture Switch", 0x17, 0x0, HDA_INPUT),
2f2f4251
M		 267 HDA_CODEC_VOLUME("Mux Capture Volume", 0x12, 0x0, HDA_OUTPUT),
268 { } /* end */
269};
270
19039bd0
TI		 271/* This needs to be generated dynamically based on sequence */
272static struct snd_kcontrol_new stac9227_mixer[] = {
273 {
274 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
275 .name = "Input Source",
276 .count = 1,
277 .info = stac92xx_mux_enum_info,
278 .get = stac92xx_mux_enum_get,
279 .put = stac92xx_mux_enum_put,
280 },
281 HDA_CODEC_VOLUME("Capture Volume", 0x15, 0x0, HDA_OUTPUT),
282 HDA_CODEC_MUTE("Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
283 { } /* end */
284};
285
3cc08dc6
MP		 286static snd_kcontrol_new_t stac927x_mixer[] = {
287 {
288 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
289 .name = "Input Source",
290 .count = 1,
291 .info = stac92xx_mux_enum_info,
292 .get = stac92xx_mux_enum_get,
293 .put = stac92xx_mux_enum_put,
294 },
295 HDA_CODEC_VOLUME("InMux Capture Volume", 0x15, 0x0, HDA_OUTPUT),
296 HDA_CODEC_VOLUME("InVol Capture Volume", 0x18, 0x0, HDA_INPUT),
297 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
298 { } /* end */
299};
300
f3302a59
MP		 301static snd_kcontrol_new_t stac9205_mixer[] = {
302 {
303 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
304 .name = "Input Source",
305 .count = 1,
306 .info = stac92xx_mux_enum_info,
307 .get = stac92xx_mux_enum_get,
308 .put = stac92xx_mux_enum_put,
309 },
310 HDA_CODEC_VOLUME("InMux Capture Volume", 0x19, 0x0, HDA_OUTPUT),
311 HDA_CODEC_VOLUME("InVol Capture Volume", 0x1b, 0x0, HDA_INPUT),
312 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1d, 0x0, HDA_OUTPUT),
313 { } /* end */
314};
315
2f2f4251
M		 316static int stac92xx_build_controls(struct hda_codec *codec)
317{
318 struct sigmatel_spec *spec = codec->spec;
319 int err;
c7d4b2fa 320 int i;
2f2f4251
M		 321
322 err = snd_hda_add_new_ctls(codec, spec->mixer);
323 if (err < 0)
324 return err;
c7d4b2fa
M		 325
326 for (i = 0; i < spec->num_mixers; i++) {
327 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
328 if (err < 0)
329 return err;
330 }
331
dabbed6f
M		 332 if (spec->multiout.dig_out_nid) {
333 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
334 if (err < 0)
335 return err;
336 }
337 if (spec->dig_in_nid) {
338 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
339 if (err < 0)
340 return err;
341 }
342 return 0;
2f2f4251
M		 343}
344
403d1944 345static unsigned int ref9200_pin_configs[8] = {
dabbed6f 346 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 347 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
348};
349
403d1944
MP		 350static unsigned int *stac9200_brd_tbl[] = {
351 ref9200_pin_configs,
352};
353
354static struct hda_board_config stac9200_cfg_tbl[] = {
355 { .modelname = "ref",
356 .pci_subvendor = PCI_VENDOR_ID_INTEL,
357 .pci_subdevice = 0x2668, /* DFI LanParty */
358 .config = STAC_REF },
359 {} /* terminator */
360};
361
362static unsigned int ref922x_pin_configs[10] = {
363 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
364 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 365 0x40000100, 0x40000100,
366};
367
403d1944 368static unsigned int d945gtp3_pin_configs[10] = {
869264c4 369 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 370 0x40000100, 0x40000100, 0x40000100, 0x40000100,
371 0x02a19120, 0x40000100,
372};
373
374static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 375 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
376 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 377 0x02a19320, 0x40000100,
378};
379
19039bd0
TI		 380static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
381 [STAC_REF] = ref922x_pin_configs,
382 [STAC_D945GTP3] = d945gtp3_pin_configs,
383 [STAC_D945GTP5] = d945gtp5_pin_configs,
7c3dec06 384 [STAC_MACMINI] = d945gtp5_pin_configs,
403d1944
MP		 385};
386
387static struct hda_board_config stac922x_cfg_tbl[] = {
388 { .modelname = "ref",
389 .pci_subvendor = PCI_VENDOR_ID_INTEL,
390 .pci_subdevice = 0x2668, /* DFI LanParty */
391 .config = STAC_REF }, /* SigmaTel reference board */
948a4db2 392 /* Intel 945G based systems */
403d1944
MP		 393 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
394 .pci_subdevice = 0x0101,
395 .config = STAC_D945GTP3 }, /* Intel D945GTP - 3 Stack */
353b9e66
TI		 396 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
397 .pci_subdevice = 0x0202,
948a4db2 398 .config = STAC_D945GTP3 }, /* Intel D945GNT - 3 Stack */
353b9e66 399 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
948a4db2
TD		 400 .pci_subdevice = 0x0606,
401 .config = STAC_D945GTP3 }, /* Intel D945GTP - 3 Stack */
402 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
403 .pci_subdevice = 0x0601,
404 .config = STAC_D945GTP3 }, /* Intel D945GTP - 3 Stack */
405 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
406 .pci_subdevice = 0x0111,
407 .config = STAC_D945GTP3 }, /* Intel D945GZP - 3 Stack */
408 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
409 .pci_subdevice = 0x1115,
410 .config = STAC_D945GTP3 }, /* Intel D945GPM - 3 Stack */
411 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
412 .pci_subdevice = 0x1116,
413 .config = STAC_D945GTP3 }, /* Intel D945GBO - 3 Stack */
414 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
415 .pci_subdevice = 0x1117,
416 .config = STAC_D945GTP3 }, /* Intel D945GPM - 3 Stack */
417 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
418 .pci_subdevice = 0x1118,
419 .config = STAC_D945GTP3 }, /* Intel D945GPM - 3 Stack */
420 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
421 .pci_subdevice = 0x1119,
422 .config = STAC_D945GTP3 }, /* Intel D945GPM - 3 Stack */
423 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
424 .pci_subdevice = 0x8826,
425 .config = STAC_D945GTP3 }, /* Intel D945GPM - 3 Stack */
426 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
427 .pci_subdevice = 0x5049,
428 .config = STAC_D945GTP3 }, /* Intel D945GCZ - 3 Stack */
429 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
430 .pci_subdevice = 0x5055,
431 .config = STAC_D945GTP3 }, /* Intel D945GCZ - 3 Stack */
432 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
433 .pci_subdevice = 0x5048,
434 .config = STAC_D945GTP3 }, /* Intel D945GPB - 3 Stack */
435 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
436 .pci_subdevice = 0x0110,
437 .config = STAC_D945GTP3 }, /* Intel D945GLR - 3 Stack */
403d1944
MP		 438 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
439 .pci_subdevice = 0x0404,
440 .config = STAC_D945GTP5 }, /* Intel D945GTP - 5 Stack */
441 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
442 .pci_subdevice = 0x0303,
443 .config = STAC_D945GTP5 }, /* Intel D945GNT - 5 Stack */
444 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
445 .pci_subdevice = 0x0013,
446 .config = STAC_D945GTP5 }, /* Intel D955XBK - 5 Stack */
d62c40e0
MP		 447 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
448 .pci_subdevice = 0x0417,
449 .config = STAC_D945GTP5 }, /* Intel D975XBK - 5 Stack */
948a4db2
TD		 450 /* Intel 945P based systems */
451 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
452 .pci_subdevice = 0x0b0b,
453 .config = STAC_D945GTP3 }, /* Intel D945PSN - 3 Stack */
454 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
455 .pci_subdevice = 0x0112,
456 .config = STAC_D945GTP3 }, /* Intel D945PLN - 3 Stack */
457 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
458 .pci_subdevice = 0x0d0d,
459 .config = STAC_D945GTP3 }, /* Intel D945PLM - 3 Stack */
460 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
461 .pci_subdevice = 0x0909,
462 .config = STAC_D945GTP3 }, /* Intel D945PAW - 3 Stack */
463 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
464 .pci_subdevice = 0x0505,
465 .config = STAC_D945GTP3 }, /* Intel D945PLM - 3 Stack */
466 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
467 .pci_subdevice = 0x0707,
468 .config = STAC_D945GTP5 }, /* Intel D945PSV - 5 Stack */
469 /* other systems */
62fe78e9
SR		 470 { .pci_subvendor = 0x8384,
471 .pci_subdevice = 0x7680,
472 .config = STAC_MACMINI }, /* Apple Mac Mini (early 2006) */
19039bd0
TI		 473 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
474 .pci_subdevice = 0x2112,
475 .config = STAC_D965_2112 },
476 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
477 .pci_subdevice = 0x284b,
478 .config = STAC_D965_284B },
403d1944
MP		 479 {} /* terminator */
480};
481
3cc08dc6
MP		 482static unsigned int ref927x_pin_configs[14] = {
483 0x01813122, 0x01a19021, 0x01014010, 0x01016011,
484 0x01012012, 0x01011014, 0x40000100, 0x40000100,
485 0x40000100, 0x40000100, 0x40000100, 0x01441030,
486 0x01c41030, 0x40000100,
487};
488
81d3dbde
TD		 489static unsigned int d965_2112_pin_configs[14] = {
490 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
491 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
492 0x40000100, 0x40000100, 0x40000100, 0x40000100,
493 0x40000100, 0x40000100
494};
495
3cc08dc6 496static unsigned int *stac927x_brd_tbl[] = {
81d3dbde
TD		 497 [STAC_REF] = ref927x_pin_configs,
498 [STAC_D965_2112] = d965_2112_pin_configs,
3cc08dc6
MP		 499};
500
501static struct hda_board_config stac927x_cfg_tbl[] = {
502 { .modelname = "ref",
503 .pci_subvendor = PCI_VENDOR_ID_INTEL,
504 .pci_subdevice = 0x2668, /* DFI LanParty */
505 .config = STAC_REF }, /* SigmaTel reference board */
81d3dbde
TD		 506 /* SigmaTel 9227 reference board */
507 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
508 .pci_subdevice = 0x284b,
509 .config = STAC_D965_284B },
510 /* Intel 946 based systems */
511 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
512 .pci_subdevice = 0x3d01,
513 .config = STAC_D965_2112 }, /* D946 configuration */
514 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
515 .pci_subdevice = 0xa301,
516 .config = STAC_D965_2112 }, /* Intel D946GZT - 3 stack */
517 /* 965 based systems */
518 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
519 .pci_subdevice = 0x2116,
520 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
521 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
522 .pci_subdevice = 0x2115,
523 .config = STAC_D965_2112 }, /* Intel DQ965WC - 3 Stack */
524 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
525 .pci_subdevice = 0x2114,
526 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
527 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
528 .pci_subdevice = 0x2113,
529 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
530 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
531 .pci_subdevice = 0x2112,
532 .config = STAC_D965_2112 }, /* Intel DG965MS - 3 Stack */
533 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
534 .pci_subdevice = 0x2111,
535 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
536 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
537 .pci_subdevice = 0x2110,
538 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
539 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
540 .pci_subdevice = 0x2009,
541 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
542 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
543 .pci_subdevice = 0x2008,
544 .config = STAC_D965_2112 }, /* Intel DQ965GF - 3 Stack */
545 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
546 .pci_subdevice = 0x2007,
547 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
548 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
549 .pci_subdevice = 0x2006,
550 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
551 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
552 .pci_subdevice = 0x2005,
553 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
554 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
555 .pci_subdevice = 0x2004,
556 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
557 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
558 .pci_subdevice = 0x2003,
559 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
560 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
561 .pci_subdevice = 0x2002,
562 .config = STAC_D965_2112 }, /* Intel D965 3Stack config */
563 { .pci_subvendor = PCI_VENDOR_ID_INTEL,
564 .pci_subdevice = 0x2001,
565 .config = STAC_D965_2112 }, /* Intel DQ965GF - 3 Stackg */
3cc08dc6
MP		 566 {} /* terminator */
567};
568
f3302a59
MP		 569static unsigned int ref9205_pin_configs[12] = {
570 0x40000100, 0x40000100, 0x01016011, 0x01014010,
571 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
572 0x40000100, 0x40000100, 0x01441030, 0x01c41030
573};
574
575static unsigned int *stac9205_brd_tbl[] = {
576 ref9205_pin_configs,
577};
578
579static struct hda_board_config stac9205_cfg_tbl[] = {
580 { .modelname = "ref",
581 .pci_subvendor = PCI_VENDOR_ID_INTEL,
582 .pci_subdevice = 0x2668, /* DFI LanParty */
583 .config = STAC_REF }, /* SigmaTel reference board */
584 {} /* terminator */
585};
586
2f2f4251
M		 587static void stac92xx_set_config_regs(struct hda_codec *codec)
588{
589 int i;
590 struct sigmatel_spec *spec = codec->spec;
591 unsigned int pin_cfg;
592
593 for (i=0; i < spec->num_pins; i++) {
594 snd_hda_codec_write(codec, spec->pin_nids[i], 0,
595 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
596 spec->pin_configs[i] & 0x000000ff);
597 snd_hda_codec_write(codec, spec->pin_nids[i], 0,
598 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
599 (spec->pin_configs[i] & 0x0000ff00) >> 8);
600 snd_hda_codec_write(codec, spec->pin_nids[i], 0,
601 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
602 (spec->pin_configs[i] & 0x00ff0000) >> 16);
603 snd_hda_codec_write(codec, spec->pin_nids[i], 0,
604 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
605 spec->pin_configs[i] >> 24);
606 pin_cfg = snd_hda_codec_read(codec, spec->pin_nids[i], 0,
607 AC_VERB_GET_CONFIG_DEFAULT,
608 0x00);
403d1944 609 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n", spec->pin_nids[i], pin_cfg);
2f2f4251
M		 610 }
611}
2f2f4251 612
dabbed6f 613/*
c7d4b2fa 614 * Analog playback callbacks
dabbed6f 615 */
c7d4b2fa
M		 616static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
617 struct hda_codec *codec,
c8b6bf9b 618 struct snd_pcm_substream *substream)
2f2f4251 619{
dabbed6f 620 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 621 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 622}
623
2f2f4251
M		 624static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
625 struct hda_codec *codec,
626 unsigned int stream_tag,
627 unsigned int format,
c8b6bf9b 628 struct snd_pcm_substream *substream)
2f2f4251
M		 629{
630 struct sigmatel_spec *spec = codec->spec;
403d1944 631 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 632}
633
634static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
635 struct hda_codec *codec,
c8b6bf9b 636 struct snd_pcm_substream *substream)
2f2f4251
M		 637{
638 struct sigmatel_spec *spec = codec->spec;
639 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
640}
641
dabbed6f
M		 642/*
643 * Digital playback callbacks
644 */
645static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
646 struct hda_codec *codec,
c8b6bf9b 647 struct snd_pcm_substream *substream)
dabbed6f
M		 648{
649 struct sigmatel_spec *spec = codec->spec;
650 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
651}
652
653static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
654 struct hda_codec *codec,
c8b6bf9b 655 struct snd_pcm_substream *substream)
dabbed6f
M		 656{
657 struct sigmatel_spec *spec = codec->spec;
658 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
659}
660
661
2f2f4251
M		 662/*
663 * Analog capture callbacks
664 */
665static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
666 struct hda_codec *codec,
667 unsigned int stream_tag,
668 unsigned int format,
c8b6bf9b 669 struct snd_pcm_substream *substream)
2f2f4251
M		 670{
671 struct sigmatel_spec *spec = codec->spec;
672
673 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
674 stream_tag, 0, format);
675 return 0;
676}
677
678static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
679 struct hda_codec *codec,
c8b6bf9b 680 struct snd_pcm_substream *substream)
2f2f4251
M		 681{
682 struct sigmatel_spec *spec = codec->spec;
683
684 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
685 return 0;
686}
687
dabbed6f
M		 688static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
689 .substreams = 1,
690 .channels_min = 2,
691 .channels_max = 2,
692 /* NID is set in stac92xx_build_pcms */
693 .ops = {
694 .open = stac92xx_dig_playback_pcm_open,
695 .close = stac92xx_dig_playback_pcm_close
696 },
697};
698
699static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
700 .substreams = 1,
701 .channels_min = 2,
702 .channels_max = 2,
703 /* NID is set in stac92xx_build_pcms */
704};
705
2f2f4251
M		 706static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
707 .substreams = 1,
708 .channels_min = 2,
c7d4b2fa 709 .channels_max = 8,
2f2f4251
M		 710 .nid = 0x02, /* NID to query formats and rates */
711 .ops = {
712 .open = stac92xx_playback_pcm_open,
713 .prepare = stac92xx_playback_pcm_prepare,
714 .cleanup = stac92xx_playback_pcm_cleanup
715 },
716};
717
3cc08dc6
MP		 718static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
719 .substreams = 1,
720 .channels_min = 2,
721 .channels_max = 2,
722 .nid = 0x06, /* NID to query formats and rates */
723 .ops = {
724 .open = stac92xx_playback_pcm_open,
725 .prepare = stac92xx_playback_pcm_prepare,
726 .cleanup = stac92xx_playback_pcm_cleanup
727 },
728};
729
2f2f4251
M		 730static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
731 .substreams = 2,
732 .channels_min = 2,
733 .channels_max = 2,
3cc08dc6 734 /* NID is set in stac92xx_build_pcms */
2f2f4251
M		 735 .ops = {
736 .prepare = stac92xx_capture_pcm_prepare,
737 .cleanup = stac92xx_capture_pcm_cleanup
738 },
739};
740
741static int stac92xx_build_pcms(struct hda_codec *codec)
742{
743 struct sigmatel_spec *spec = codec->spec;
744 struct hda_pcm *info = spec->pcm_rec;
745
746 codec->num_pcms = 1;
747 codec->pcm_info = info;
748
c7d4b2fa 749 info->name = "STAC92xx Analog";
2f2f4251 750 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 751 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6
MP		 752 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
753
754 if (spec->alt_switch) {
755 codec->num_pcms++;
756 info++;
757 info->name = "STAC92xx Analog Alt";
758 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
759 }
2f2f4251 760
dabbed6f
M		 761 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
762 codec->num_pcms++;
763 info++;
764 info->name = "STAC92xx Digital";
765 if (spec->multiout.dig_out_nid) {
766 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
767 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
768 }
769 if (spec->dig_in_nid) {
770 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
771 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
772 }
773 }
774
2f2f4251
M		 775 return 0;
776}
777
c960a03b
TI		 778static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
779{
780 unsigned int pincap = snd_hda_param_read(codec, nid,
781 AC_PAR_PIN_CAP);
782 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
783 if (pincap & AC_PINCAP_VREF_100)
784 return AC_PINCTL_VREF_100;
785 if (pincap & AC_PINCAP_VREF_80)
786 return AC_PINCTL_VREF_80;
787 if (pincap & AC_PINCAP_VREF_50)
788 return AC_PINCTL_VREF_50;
789 if (pincap & AC_PINCAP_VREF_GRD)
790 return AC_PINCTL_VREF_GRD;
791 return 0;
792}
793
403d1944
MP		 794static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
795
796{
797 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
798}
799
800static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
801{
802 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
803 uinfo->count = 1;
804 uinfo->value.integer.min = 0;
805 uinfo->value.integer.max = 1;
806 return 0;
807}
808
809static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
810{
811 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
812 struct sigmatel_spec *spec = codec->spec;
813 int io_idx = kcontrol-> private_value & 0xff;
814
815 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
816 return 0;
817}
818
819static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
820{
821 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
822 struct sigmatel_spec *spec = codec->spec;
823 hda_nid_t nid = kcontrol->private_value >> 8;
824 int io_idx = kcontrol-> private_value & 0xff;
825 unsigned short val = ucontrol->value.integer.value[0];
826
827 spec->io_switch[io_idx] = val;
828
829 if (val)
830 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 831 else {
832 unsigned int pinctl = AC_PINCTL_IN_EN;
833 if (io_idx) /* set VREF for mic */
834 pinctl |= stac92xx_get_vref(codec, nid);
835 stac92xx_auto_set_pinctl(codec, nid, pinctl);
836 }
403d1944
MP		 837 return 1;
838}
839
840#define STAC_CODEC_IO_SWITCH(xname, xpval) \
841 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
842 .name = xname, \
843 .index = 0, \
844 .info = stac92xx_io_switch_info, \
845 .get = stac92xx_io_switch_get, \
846 .put = stac92xx_io_switch_put, \
847 .private_value = xpval, \
848 }
849
850
c7d4b2fa
M		 851enum {
852 STAC_CTL_WIDGET_VOL,
853 STAC_CTL_WIDGET_MUTE,
403d1944 854 STAC_CTL_WIDGET_IO_SWITCH,
c7d4b2fa
M		 855};
856
c8b6bf9b 857static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 858 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
859 HDA_CODEC_MUTE(NULL, 0, 0, 0),
403d1944 860 STAC_CODEC_IO_SWITCH(NULL, 0),
c7d4b2fa
M		 861};
862
863/* add dynamic controls */
864static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
865{
c8b6bf9b 866 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 867
868 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
869 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
870
871 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
872 if (! knew)
873 return -ENOMEM;
874 if (spec->kctl_alloc) {
875 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
876 kfree(spec->kctl_alloc);
877 }
878 spec->kctl_alloc = knew;
879 spec->num_kctl_alloc = num;
880 }
881
882 knew = &spec->kctl_alloc[spec->num_kctl_used];
883 *knew = stac92xx_control_templates[type];
82fe0c58 884 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 885 if (! knew->name)
886 return -ENOMEM;
887 knew->private_value = val;
888 spec->num_kctl_used++;
889 return 0;
890}
891
403d1944
MP		 892/* flag inputs as additional dynamic lineouts */
893static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
894{
895 struct sigmatel_spec *spec = codec->spec;
896
897 switch (cfg->line_outs) {
898 case 3:
899 /* add line-in as side */
900 if (cfg->input_pins[AUTO_PIN_LINE]) {
901 cfg->line_out_pins[3] = cfg->input_pins[AUTO_PIN_LINE];
902 spec->line_switch = 1;
903 cfg->line_outs++;
904 }
905 break;
906 case 2:
907 /* add line-in as clfe and mic as side */
908 if (cfg->input_pins[AUTO_PIN_LINE]) {
909 cfg->line_out_pins[2] = cfg->input_pins[AUTO_PIN_LINE];
910 spec->line_switch = 1;
911 cfg->line_outs++;
912 }
913 if (cfg->input_pins[AUTO_PIN_MIC]) {
914 cfg->line_out_pins[3] = cfg->input_pins[AUTO_PIN_MIC];
915 spec->mic_switch = 1;
916 cfg->line_outs++;
917 }
918 break;
919 case 1:
920 /* add line-in as surr and mic as clfe */
921 if (cfg->input_pins[AUTO_PIN_LINE]) {
922 cfg->line_out_pins[1] = cfg->input_pins[AUTO_PIN_LINE];
923 spec->line_switch = 1;
924 cfg->line_outs++;
925 }
926 if (cfg->input_pins[AUTO_PIN_MIC]) {
927 cfg->line_out_pins[2] = cfg->input_pins[AUTO_PIN_MIC];
928 spec->mic_switch = 1;
929 cfg->line_outs++;
930 }
931 break;
932 }
933
934 return 0;
935}
936
3cc08dc6
MP		 937/*
938 * XXX The line_out pin widget connection list may not be set to the
939 * desired DAC nid. This is the case on 927x where ports A and B can
940 * be routed to several DACs.
941 *
942 * This requires an analysis of the line-out/hp pin configuration
943 * to provide a best fit for pin/DAC configurations that are routable.
944 * For now, 927x DAC4 is not supported and 927x DAC1 output to ports
945 * A and B is not supported.
946 */
c7d4b2fa 947/* fill in the dac_nids table from the parsed pin configuration */
19039bd0
TI		 948static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
949 const struct auto_pin_cfg *cfg)
c7d4b2fa
M		 950{
951 struct sigmatel_spec *spec = codec->spec;
952 hda_nid_t nid;
953 int i;
954
955 /* check the pins hardwired to audio widget */
956 for (i = 0; i < cfg->line_outs; i++) {
957 nid = cfg->line_out_pins[i];
958 spec->multiout.dac_nids[i] = snd_hda_codec_read(codec, nid, 0,
959 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
960 }
961
82bc955f 962 spec->multiout.num_dacs = cfg->line_outs;
c7d4b2fa
M		 963
964 return 0;
965}
966
967/* add playback controls from the parsed DAC table */
19039bd0
TI		 968static int stac92xx_auto_create_multi_out_ctls(struct sigmatel_spec *spec,
969 const struct auto_pin_cfg *cfg)
c7d4b2fa
M		 970{
971 char name[32];
19039bd0
TI		 972 static const char *chname[4] = {
973 "Front", "Surround", NULL /*CLFE*/, "Side"
974 };
c7d4b2fa
M		 975 hda_nid_t nid;
976 int i, err;
977
978 for (i = 0; i < cfg->line_outs; i++) {
403d1944 979 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 980 continue;
981
982 nid = spec->multiout.dac_nids[i];
983
984 if (i == 2) {
985 /* Center/LFE */
986 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, "Center Playback Volume",
987 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT))) < 0)
988 return err;
989 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, "LFE Playback Volume",
990 HDA_COMPOSE_AMP_VAL(nid, 2, 0, HDA_OUTPUT))) < 0)
991 return err;
992 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, "Center Playback Switch",
993 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT))) < 0)
994 return err;
995 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, "LFE Playback Switch",
996 HDA_COMPOSE_AMP_VAL(nid, 2, 0, HDA_OUTPUT))) < 0)
997 return err;
998 } else {
999 sprintf(name, "%s Playback Volume", chname[i]);
1000 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
1001 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT))) < 0)
1002 return err;
1003 sprintf(name, "%s Playback Switch", chname[i]);
1004 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
1005 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT))) < 0)
1006 return err;
1007 }
1008 }
1009
403d1944
MP		 1010 if (spec->line_switch)
1011 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
1012 return err;
1013
1014 if (spec->mic_switch)
1015 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
1016 return err;
1017
c7d4b2fa
M		 1018 return 0;
1019}
1020
1021/* add playback controls for HP output */
1022static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec, struct auto_pin_cfg *cfg)
1023{
1024 struct sigmatel_spec *spec = codec->spec;
1025 hda_nid_t pin = cfg->hp_pin;
1026 hda_nid_t nid;
1027 int i, err;
4e55096e 1028 unsigned int wid_caps;
c7d4b2fa
M		 1029
1030 if (! pin)
1031 return 0;
1032
54d17403 1033 wid_caps = get_wcaps(codec, pin);
505cb341 1034 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 1035 spec->hp_detect = 1;
4e55096e 1036
c7d4b2fa
M		 1037 nid = snd_hda_codec_read(codec, pin, 0, AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1038 for (i = 0; i < cfg->line_outs; i++) {
1039 if (! spec->multiout.dac_nids[i])
1040 continue;
1041 if (spec->multiout.dac_nids[i] == nid)
1042 return 0;
1043 }
1044
1045 spec->multiout.hp_nid = nid;
1046
1047 /* control HP volume/switch on the output mixer amp */
1048 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, "Headphone Playback Volume",
1049 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT))) < 0)
1050 return err;
1051 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, "Headphone Playback Switch",
1052 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT))) < 0)
1053 return err;
1054
1055 return 0;
1056}
1057
1058/* create playback/capture controls for input pins */
1059static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
1060{
1061 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 1062 struct hda_input_mux *imux = &spec->private_imux;
1063 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1064 int i, j, k;
1065
1066 for (i = 0; i < AUTO_PIN_LAST; i++) {
1067 int index = -1;
1068 if (cfg->input_pins[i]) {
4a471b7d 1069 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
c7d4b2fa
M		 1070
1071 for (j=0; j<spec->num_muxes; j++) {
1072 int num_cons = snd_hda_get_connections(codec, spec->mux_nids[j], con_lst, HDA_MAX_NUM_INPUTS);
1073 for (k=0; k<num_cons; k++)
1074 if (con_lst[k] == cfg->input_pins[i]) {
1075 index = k;
1076 break;
1077 }
1078 if (index >= 0)
1079 break;
1080 }
1081 imux->items[imux->num_items].index = index;
1082 imux->num_items++;
1083 }
1084 }
1085
62fe78e9
SR		 1086 if (imux->num_items == 1) {
1087 /*
1088 * Set the current input for the muxes.
1089 * The STAC9221 has two input muxes with identical source
1090 * NID lists. Hopefully this won't get confused.
1091 */
1092 for (i = 0; i < spec->num_muxes; i++) {
1093 snd_hda_codec_write(codec, spec->mux_nids[i], 0,
1094 AC_VERB_SET_CONNECT_SEL,
1095 imux->items[0].index);
1096 }
1097 }
1098
c7d4b2fa
M		 1099 return 0;
1100}
1101
c7d4b2fa
M		 1102static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
1103{
1104 struct sigmatel_spec *spec = codec->spec;
1105 int i;
1106
1107 for (i = 0; i < spec->autocfg.line_outs; i++) {
1108 hda_nid_t nid = spec->autocfg.line_out_pins[i];
1109 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
1110 }
1111}
1112
1113static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
1114{
1115 struct sigmatel_spec *spec = codec->spec;
1116 hda_nid_t pin;
1117
1118 pin = spec->autocfg.hp_pin;
1119 if (pin) /* connect to front */
1120 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
1121}
1122
3cc08dc6 1123static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 1124{
1125 struct sigmatel_spec *spec = codec->spec;
1126 int err;
1127
df694daa 1128 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa 1129 return err;
82bc955f 1130 if (! spec->autocfg.line_outs)
869264c4 1131 return 0; /* can't find valid pin config */
19039bd0 1132
403d1944
MP		 1133 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
1134 return err;
19039bd0
TI		 1135 if (spec->multiout.num_dacs == 0)
1136 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
1137 return err;
c7d4b2fa
M		 1138
1139 if ((err = stac92xx_auto_create_multi_out_ctls(spec, &spec->autocfg)) < 0 ||
1140 (err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg)) < 0 ||
1141 (err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
1142 return err;
1143
1144 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 1145 if (spec->multiout.max_channels > 2)
c7d4b2fa 1146 spec->surr_switch = 1;
c7d4b2fa 1147
82bc955f 1148 if (spec->autocfg.dig_out_pin)
3cc08dc6 1149 spec->multiout.dig_out_nid = dig_out;
82bc955f 1150 if (spec->autocfg.dig_in_pin)
3cc08dc6 1151 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 1152
1153 if (spec->kctl_alloc)
1154 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
1155
1156 spec->input_mux = &spec->private_imux;
1157
1158 return 1;
1159}
1160
82bc955f
TI		 1161/* add playback controls for HP output */
1162static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
1163 struct auto_pin_cfg *cfg)
1164{
1165 struct sigmatel_spec *spec = codec->spec;
1166 hda_nid_t pin = cfg->hp_pin;
1167 unsigned int wid_caps;
1168
1169 if (! pin)
1170 return 0;
1171
1172 wid_caps = get_wcaps(codec, pin);
505cb341 1173 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 1174 spec->hp_detect = 1;
82bc955f
TI		 1175
1176 return 0;
1177}
1178
c7d4b2fa
M		 1179static int stac9200_parse_auto_config(struct hda_codec *codec)
1180{
1181 struct sigmatel_spec *spec = codec->spec;
1182 int err;
1183
df694daa 1184 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 1185 return err;
1186
1187 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
1188 return err;
1189
82bc955f
TI		 1190 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
1191 return err;
1192
1193 if (spec->autocfg.dig_out_pin)
c7d4b2fa 1194 spec->multiout.dig_out_nid = 0x05;
82bc955f 1195 if (spec->autocfg.dig_in_pin)
c7d4b2fa 1196 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 1197
1198 if (spec->kctl_alloc)
1199 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
1200
1201 spec->input_mux = &spec->private_imux;
1202
1203 return 1;
1204}
1205
62fe78e9
SR		 1206/*
1207 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
1208 * funky external mute control using GPIO pins.
1209 */
1210
1211static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
1212{
1213 unsigned int gpiostate, gpiomask, gpiodir;
1214
1215 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
1216 AC_VERB_GET_GPIO_DATA, 0);
1217
1218 if (!muted)
1219 gpiostate |= (1 << pin);
1220 else
1221 gpiostate &= ~(1 << pin);
1222
1223 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
1224 AC_VERB_GET_GPIO_MASK, 0);
1225 gpiomask |= (1 << pin);
1226
1227 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
1228 AC_VERB_GET_GPIO_DIRECTION, 0);
1229 gpiodir |= (1 << pin);
1230
1231 /* AppleHDA seems to do this -- WTF is this verb?? */
1232 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
1233
1234 snd_hda_codec_write(codec, codec->afg, 0,
1235 AC_VERB_SET_GPIO_MASK, gpiomask);
1236 snd_hda_codec_write(codec, codec->afg, 0,
1237 AC_VERB_SET_GPIO_DIRECTION, gpiodir);
1238
1239 msleep(1);
1240
1241 snd_hda_codec_write(codec, codec->afg, 0,
1242 AC_VERB_SET_GPIO_DATA, gpiostate);
1243}
1244
c7d4b2fa
M		 1245static int stac92xx_init(struct hda_codec *codec)
1246{
1247 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 1248 struct auto_pin_cfg *cfg = &spec->autocfg;
1249 int i;
c7d4b2fa 1250
c7d4b2fa
M		 1251 snd_hda_sequence_write(codec, spec->init);
1252
82bc955f
TI		 1253 /* set up pins */
1254 if (spec->hp_detect) {
505cb341
TI		 1255 /* Enable unsolicited responses on the HP widget */
1256 snd_hda_codec_write(codec, cfg->hp_pin, 0,
1257 AC_VERB_SET_UNSOLICITED_ENABLE,
1258 STAC_UNSOL_ENABLE);
82bc955f
TI		 1259 /* fake event to set up pins */
1260 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
68a6abd9
TD		 1261 /* enable the headphones by default. If/when unsol_event detection works, this will be ignored */
1262 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 1263 } else {
1264 stac92xx_auto_init_multi_out(codec);
1265 stac92xx_auto_init_hp_out(codec);
1266 }
1267 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 1268 hda_nid_t nid = cfg->input_pins[i];
1269 if (nid) {
1270 unsigned int pinctl = AC_PINCTL_IN_EN;
1271 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
1272 pinctl |= stac92xx_get_vref(codec, nid);
1273 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1274 }
82bc955f
TI		 1275 }
1276 if (cfg->dig_out_pin)
1277 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
1278 AC_PINCTL_OUT_EN);
1279 if (cfg->dig_in_pin)
1280 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
1281 AC_PINCTL_IN_EN);
1282
62fe78e9
SR		 1283 if (spec->gpio_mute) {
1284 stac922x_gpio_mute(codec, 0, 0);
1285 stac922x_gpio_mute(codec, 1, 0);
1286 }
1287
c7d4b2fa
M		 1288 return 0;
1289}
1290
2f2f4251
M		 1291static void stac92xx_free(struct hda_codec *codec)
1292{
c7d4b2fa
M		 1293 struct sigmatel_spec *spec = codec->spec;
1294 int i;
1295
1296 if (! spec)
1297 return;
1298
1299 if (spec->kctl_alloc) {
1300 for (i = 0; i < spec->num_kctl_used; i++)
1301 kfree(spec->kctl_alloc[i].name);
1302 kfree(spec->kctl_alloc);
1303 }
1304
1305 kfree(spec);
2f2f4251
M		 1306}
1307
4e55096e
M		 1308static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
1309 unsigned int flag)
1310{
1311 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
1312 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
1313 snd_hda_codec_write(codec, nid, 0,
1314 AC_VERB_SET_PIN_WIDGET_CONTROL,
1315 pin_ctl | flag);
1316}
1317
1318static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
1319 unsigned int flag)
1320{
1321 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
1322 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
1323 snd_hda_codec_write(codec, nid, 0,
1324 AC_VERB_SET_PIN_WIDGET_CONTROL,
1325 pin_ctl & ~flag);
1326}
1327
1328static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
1329{
1330 struct sigmatel_spec *spec = codec->spec;
1331 struct auto_pin_cfg *cfg = &spec->autocfg;
1332 int i, presence;
1333
1334 if ((res >> 26) != STAC_HP_EVENT)
1335 return;
1336
1337 presence = snd_hda_codec_read(codec, cfg->hp_pin, 0,
1338 AC_VERB_GET_PIN_SENSE, 0x00) >> 31;
1339
1340 if (presence) {
1341 /* disable lineouts, enable hp */
1342 for (i = 0; i < cfg->line_outs; i++)
1343 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
1344 AC_PINCTL_OUT_EN);
1345 stac92xx_set_pinctl(codec, cfg->hp_pin, AC_PINCTL_OUT_EN);
1346 } else {
1347 /* enable lineouts, disable hp */
1348 for (i = 0; i < cfg->line_outs; i++)
1349 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
1350 AC_PINCTL_OUT_EN);
1351 stac92xx_reset_pinctl(codec, cfg->hp_pin, AC_PINCTL_OUT_EN);
1352 }
1353}
1354
ff6fdc37
M		 1355#ifdef CONFIG_PM
1356static int stac92xx_resume(struct hda_codec *codec)
1357{
1358 struct sigmatel_spec *spec = codec->spec;
1359 int i;
1360
1361 stac92xx_init(codec);
1362 for (i = 0; i < spec->num_mixers; i++)
1363 snd_hda_resume_ctls(codec, spec->mixers[i]);
1364 if (spec->multiout.dig_out_nid)
1365 snd_hda_resume_spdif_out(codec);
1366 if (spec->dig_in_nid)
1367 snd_hda_resume_spdif_in(codec);
1368
1369 return 0;
1370}
1371#endif
1372
2f2f4251
M		 1373static struct hda_codec_ops stac92xx_patch_ops = {
1374 .build_controls = stac92xx_build_controls,
1375 .build_pcms = stac92xx_build_pcms,
1376 .init = stac92xx_init,
1377 .free = stac92xx_free,
4e55096e 1378 .unsol_event = stac92xx_unsol_event,
ff6fdc37
M		 1379#ifdef CONFIG_PM
1380 .resume = stac92xx_resume,
1381#endif
2f2f4251
M		 1382};
1383
1384static int patch_stac9200(struct hda_codec *codec)
1385{
1386 struct sigmatel_spec *spec;
c7d4b2fa 1387 int err;
2f2f4251 1388
e560d8d8 1389 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 1390 if (spec == NULL)
1391 return -ENOMEM;
1392
1393 codec->spec = spec;
403d1944
MP		 1394 spec->board_config = snd_hda_check_board_config(codec, stac9200_cfg_tbl);
1395 if (spec->board_config < 0)
1396 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
1397 else {
1398 spec->num_pins = 8;
1399 spec->pin_nids = stac9200_pin_nids;
1400 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
1401 stac92xx_set_config_regs(codec);
1402 }
2f2f4251
M		 1403
1404 spec->multiout.max_channels = 2;
1405 spec->multiout.num_dacs = 1;
1406 spec->multiout.dac_nids = stac9200_dac_nids;
1407 spec->adc_nids = stac9200_adc_nids;
1408 spec->mux_nids = stac9200_mux_nids;
dabbed6f 1409 spec->num_muxes = 1;
c7d4b2fa
M		 1410
1411 spec->init = stac9200_core_init;
2f2f4251 1412 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 1413
1414 err = stac9200_parse_auto_config(codec);
1415 if (err < 0) {
1416 stac92xx_free(codec);
1417 return err;
1418 }
2f2f4251
M		 1419
1420 codec->patch_ops = stac92xx_patch_ops;
1421
1422 return 0;
1423}
1424
1425static int patch_stac922x(struct hda_codec *codec)
1426{
1427 struct sigmatel_spec *spec;
c7d4b2fa 1428 int err;
2f2f4251 1429
e560d8d8 1430 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 1431 if (spec == NULL)
1432 return -ENOMEM;
1433
1434 codec->spec = spec;
403d1944
MP		 1435 spec->board_config = snd_hda_check_board_config(codec, stac922x_cfg_tbl);
1436 if (spec->board_config < 0)
19039bd0
TI		 1437 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
1438 "using BIOS defaults\n");
62fe78e9 1439 else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 1440 spec->num_pins = 10;
1441 spec->pin_nids = stac922x_pin_nids;
1442 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
1443 stac92xx_set_config_regs(codec);
1444 }
2f2f4251 1445
c7d4b2fa
M		 1446 spec->adc_nids = stac922x_adc_nids;
1447 spec->mux_nids = stac922x_mux_nids;
1448 spec->num_muxes = 2;
1449
1450 spec->init = stac922x_core_init;
2f2f4251 1451 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 1452
1453 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 1454
3cc08dc6
MP		 1455 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
1456 if (err < 0) {
1457 stac92xx_free(codec);
1458 return err;
1459 }
1460
62fe78e9
SR		 1461 if (spec->board_config == STAC_MACMINI)
1462 spec->gpio_mute = 1;
1463
3cc08dc6
MP		 1464 codec->patch_ops = stac92xx_patch_ops;
1465
1466 return 0;
1467}
1468
1469static int patch_stac927x(struct hda_codec *codec)
1470{
1471 struct sigmatel_spec *spec;
1472 int err;
1473
1474 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1475 if (spec == NULL)
1476 return -ENOMEM;
1477
1478 codec->spec = spec;
1479 spec->board_config = snd_hda_check_board_config(codec, stac927x_cfg_tbl);
1480 if (spec->board_config < 0)
1481 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n");
81d3dbde 1482 else if (stac927x_brd_tbl[spec->board_config] != NULL) {
3cc08dc6
MP		 1483 spec->num_pins = 14;
1484 spec->pin_nids = stac927x_pin_nids;
1485 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
1486 stac92xx_set_config_regs(codec);
1487 }
1488
81d3dbde
TD		 1489 switch (spec->board_config) {
1490 case STAC_D965_2112:
1491 spec->adc_nids = stac927x_adc_nids;
1492 spec->mux_nids = stac927x_mux_nids;
1493 spec->num_muxes = 3;
1494 spec->init = d965_2112_core_init;
1495 spec->mixer = stac9227_mixer;
1496 break;
1497 case STAC_D965_284B:
1498 spec->adc_nids = stac9227_adc_nids;
1499 spec->mux_nids = stac9227_mux_nids;
1500 spec->num_muxes = 2;
1501 spec->init = stac9227_core_init;
1502 spec->mixer = stac9227_mixer;
1503 break;
1504 default:
1505 spec->adc_nids = stac927x_adc_nids;
1506 spec->mux_nids = stac927x_mux_nids;
1507 spec->num_muxes = 3;
1508 spec->init = stac927x_core_init;
1509 spec->mixer = stac927x_mixer;
1510 }
3cc08dc6
MP		 1511
1512 spec->multiout.dac_nids = spec->dac_nids;
1513
1514 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
c7d4b2fa
M		 1515 if (err < 0) {
1516 stac92xx_free(codec);
1517 return err;
1518 }
2f2f4251
M		 1519
1520 codec->patch_ops = stac92xx_patch_ops;
1521
1522 return 0;
1523}
1524
f3302a59
MP		 1525static int patch_stac9205(struct hda_codec *codec)
1526{
1527 struct sigmatel_spec *spec;
1528 int err;
1529
1530 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1531 if (spec == NULL)
1532 return -ENOMEM;
1533
1534 codec->spec = spec;
1535 spec->board_config = snd_hda_check_board_config(codec, stac9205_cfg_tbl);
1536 if (spec->board_config < 0)
1537 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
1538 else {
1539 spec->num_pins = 14;
1540 spec->pin_nids = stac9205_pin_nids;
1541 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
1542 stac92xx_set_config_regs(codec);
1543 }
1544
1545 spec->adc_nids = stac9205_adc_nids;
1546 spec->mux_nids = stac9205_mux_nids;
1547 spec->num_muxes = 3;
1548
1549 spec->init = stac9205_core_init;
1550 spec->mixer = stac9205_mixer;
1551
1552 spec->multiout.dac_nids = spec->dac_nids;
1553
1554 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
1555 if (err < 0) {
1556 stac92xx_free(codec);
1557 return err;
1558 }
1559
1560 codec->patch_ops = stac92xx_patch_ops;
1561
1562 return 0;
1563}
1564
db064e50 1565/*
6d859065 1566 * STAC9872 hack
db064e50
TI		 1567 */
1568
99ccc560 1569/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 1570static hda_nid_t vaio_dacs[] = { 0x2 };
1571#define VAIO_HP_DAC 0x5
1572static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
1573static hda_nid_t vaio_mux_nids[] = { 0x15 };
1574
1575static struct hda_input_mux vaio_mux = {
1576 .num_items = 2,
1577 .items = {
d773781c
TI		 1578 /* { "HP", 0x0 }, */
1579 { "Line", 0x1 },
db064e50
TI		 1580 { "Mic", 0x2 },
1581 { "PCM", 0x3 },
1582 }
1583};
1584
1585static struct hda_verb vaio_init[] = {
1586 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
1587 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
1588 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
1589 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
1590 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1591 {0x15, AC_VERB_SET_CONNECT_SEL, 0x2}, /* mic-sel: 0a,0d,14,02 */
1592 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
1593 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
1594 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
1595 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
1596 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
1597 {}
1598};
1599
6d859065
GM		 1600static struct hda_verb vaio_ar_init[] = {
1601 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
1602 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
1603 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
1604 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
1605/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
1606 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1607 {0x15, AC_VERB_SET_CONNECT_SEL, 0x2}, /* mic-sel: 0a,0d,14,02 */
1608 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
1609 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
1610/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
1611 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
1612 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
1613 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
1614 {}
1615};
1616
db064e50
TI		 1617/* bind volumes of both NID 0x02 and 0x05 */
1618static int vaio_master_vol_put(struct snd_kcontrol *kcontrol,
1619 struct snd_ctl_elem_value *ucontrol)
1620{
1621 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1622 long *valp = ucontrol->value.integer.value;
1623 int change;
1624
1625 change = snd_hda_codec_amp_update(codec, 0x02, 0, HDA_OUTPUT, 0,
1626 0x7f, valp[0] & 0x7f);
1627 change |= snd_hda_codec_amp_update(codec, 0x02, 1, HDA_OUTPUT, 0,
1628 0x7f, valp[1] & 0x7f);
1629 snd_hda_codec_amp_update(codec, 0x05, 0, HDA_OUTPUT, 0,
1630 0x7f, valp[0] & 0x7f);
1631 snd_hda_codec_amp_update(codec, 0x05, 1, HDA_OUTPUT, 0,
1632 0x7f, valp[1] & 0x7f);
1633 return change;
1634}
1635
1636/* bind volumes of both NID 0x02 and 0x05 */
1637static int vaio_master_sw_put(struct snd_kcontrol *kcontrol,
1638 struct snd_ctl_elem_value *ucontrol)
1639{
1640 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1641 long *valp = ucontrol->value.integer.value;
1642 int change;
1643
1644 change = snd_hda_codec_amp_update(codec, 0x02, 0, HDA_OUTPUT, 0,
a9393d70 1645 0x80, (valp[0] ? 0 : 0x80));
db064e50 1646 change |= snd_hda_codec_amp_update(codec, 0x02, 1, HDA_OUTPUT, 0,
a9393d70 1647 0x80, (valp[1] ? 0 : 0x80));
db064e50 1648 snd_hda_codec_amp_update(codec, 0x05, 0, HDA_OUTPUT, 0,
a9393d70 1649 0x80, (valp[0] ? 0 : 0x80));
db064e50 1650 snd_hda_codec_amp_update(codec, 0x05, 1, HDA_OUTPUT, 0,
a9393d70 1651 0x80, (valp[1] ? 0 : 0x80));
db064e50
TI		 1652 return change;
1653}
1654
1655static struct snd_kcontrol_new vaio_mixer[] = {
1656 {
1657 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1658 .name = "Master Playback Volume",
1659 .info = snd_hda_mixer_amp_volume_info,
1660 .get = snd_hda_mixer_amp_volume_get,
1661 .put = vaio_master_vol_put,
c2566524 1662 .tlv = { .c = snd_hda_mixer_amp_tlv },
db064e50
TI		 1663 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
1664 },
1665 {
1666 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1667 .name = "Master Playback Switch",
1668 .info = snd_hda_mixer_amp_switch_info,
1669 .get = snd_hda_mixer_amp_switch_get,
1670 .put = vaio_master_sw_put,
1671 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
1672 },
1673 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
1674 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
1675 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
1676 {
1677 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1678 .name = "Capture Source",
1679 .count = 1,
1680 .info = stac92xx_mux_enum_info,
1681 .get = stac92xx_mux_enum_get,
1682 .put = stac92xx_mux_enum_put,
1683 },
1684 {}
1685};
1686
6d859065
GM		 1687static struct snd_kcontrol_new vaio_ar_mixer[] = {
1688 {
1689 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1690 .name = "Master Playback Volume",
1691 .info = snd_hda_mixer_amp_volume_info,
1692 .get = snd_hda_mixer_amp_volume_get,
1693 .put = vaio_master_vol_put,
1694 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
1695 },
1696 {
1697 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1698 .name = "Master Playback Switch",
1699 .info = snd_hda_mixer_amp_switch_info,
1700 .get = snd_hda_mixer_amp_switch_get,
1701 .put = vaio_master_sw_put,
1702 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
1703 },
1704 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
1705 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
1706 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
1707 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
1708 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
1709 {
1710 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1711 .name = "Capture Source",
1712 .count = 1,
1713 .info = stac92xx_mux_enum_info,
1714 .get = stac92xx_mux_enum_get,
1715 .put = stac92xx_mux_enum_put,
1716 },
1717 {}
1718};
1719
1720static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 1721 .build_controls = stac92xx_build_controls,
1722 .build_pcms = stac92xx_build_pcms,
1723 .init = stac92xx_init,
1724 .free = stac92xx_free,
1725#ifdef CONFIG_PM
1726 .resume = stac92xx_resume,
1727#endif
1728};
1729
6d859065
GM		 1730enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
1731 CXD9872RD_VAIO,
1732 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
1733 STAC9872AK_VAIO,
1734 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
1735 STAC9872K_VAIO,
1736 /* AR Series. id=0x83847664 and subsys=104D1300 */
1737 CXD9872AKD_VAIO
1738 };
1739
1740static struct hda_board_config stac9872_cfg_tbl[] = {
1741 { .modelname = "vaio", .config = CXD9872RD_VAIO },
1742 { .modelname = "vaio-ar", .config = CXD9872AKD_VAIO },
db064e50 1743 { .pci_subvendor = 0x104d, .pci_subdevice = 0x81e6,
6d859065 1744 .config = CXD9872RD_VAIO },
db064e50 1745 { .pci_subvendor = 0x104d, .pci_subdevice = 0x81ef,
6d859065 1746 .config = CXD9872RD_VAIO },
99ccc560 1747 { .pci_subvendor = 0x104d, .pci_subdevice = 0x81fd,
6d859065 1748 .config = CXD9872AKD_VAIO },
db064e50
TI		 1749 {}
1750};
1751
6d859065 1752static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 1753{
1754 struct sigmatel_spec *spec;
1755 int board_config;
1756
6d859065 1757 board_config = snd_hda_check_board_config(codec, stac9872_cfg_tbl);
db064e50
TI		 1758 if (board_config < 0)
1759 /* unknown config, let generic-parser do its job... */
1760 return snd_hda_parse_generic_codec(codec);
1761
1762 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1763 if (spec == NULL)
1764 return -ENOMEM;
1765
1766 codec->spec = spec;
1767 switch (board_config) {
6d859065
GM		 1768 case CXD9872RD_VAIO:
1769 case STAC9872AK_VAIO:
1770 case STAC9872K_VAIO:
db064e50
TI		 1771 spec->mixer = vaio_mixer;
1772 spec->init = vaio_init;
1773 spec->multiout.max_channels = 2;
1774 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
1775 spec->multiout.dac_nids = vaio_dacs;
1776 spec->multiout.hp_nid = VAIO_HP_DAC;
1777 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
1778 spec->adc_nids = vaio_adcs;
1779 spec->input_mux = &vaio_mux;
1780 spec->mux_nids = vaio_mux_nids;
1781 break;
6d859065
GM		 1782
1783 case CXD9872AKD_VAIO:
1784 spec->mixer = vaio_ar_mixer;
1785 spec->init = vaio_ar_init;
1786 spec->multiout.max_channels = 2;
1787 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
1788 spec->multiout.dac_nids = vaio_dacs;
1789 spec->multiout.hp_nid = VAIO_HP_DAC;
1790 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
1791 spec->adc_nids = vaio_adcs;
1792 spec->input_mux = &vaio_mux;
1793 spec->mux_nids = vaio_mux_nids;
1794 break;
db064e50
TI		 1795 }
1796
6d859065 1797 codec->patch_ops = stac9872_patch_ops;
db064e50
TI		 1798 return 0;
1799}
1800
1801
2f2f4251
M		 1802/*
1803 * patch entries
1804 */
1805struct hda_codec_preset snd_hda_preset_sigmatel[] = {
1806 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
1807 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
1808 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
1809 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
1810 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
1811 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
1812 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 1813 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
1814 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
1815 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
1816 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
1817 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
1818 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 1819 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
1820 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
1821 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
1822 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
1823 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
1824 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
1825 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
1826 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
1827 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
1828 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
6d859065
GM		 1829 /* The following does not take into account .id=0x83847661 when subsys =
1830 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
1831 * currently not fully supported.
1832 */
1833 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
1834 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
1835 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 1836 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
1837 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
1838 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
1839 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
1840 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
1841 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
1842 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
1843 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
2f2f4251
M		 1844 {} /* terminator */
1845};
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