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[ALSA] hda-codec - make volume knob, the master volume for sigmatel codecs
[mirror_ubuntu-bionic-kernel.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <sound/driver.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/pci.h>
32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
36
4e55096e
M		 37#define NUM_CONTROL_ALLOC 32
38#define STAC_HP_EVENT 0x37
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
dfe495d0
TI		 42 STAC_9200_DELL_D21,
43 STAC_9200_DELL_D22,
44 STAC_9200_DELL_D23,
45 STAC_9200_DELL_M21,
46 STAC_9200_DELL_M22,
47 STAC_9200_DELL_M23,
48 STAC_9200_DELL_M24,
49 STAC_9200_DELL_M25,
50 STAC_9200_DELL_M26,
51 STAC_9200_DELL_M27,
f5fcc13c
TI		 52 STAC_9200_MODELS
53};
54
55enum {
56 STAC_9205_REF,
dfe495d0 57 STAC_9205_DELL_M42,
ae0a8ed8
TD		 58 STAC_9205_DELL_M43,
59 STAC_9205_DELL_M44,
60 STAC_9205_M43xx,
f5fcc13c
TI		 61 STAC_9205_MODELS
62};
63
8e21c34c
TD		 64enum {
65 STAC_925x_REF,
66 STAC_M2_2,
67 STAC_MA6,
2c11f955 68 STAC_PA6,
8e21c34c
TD		 69 STAC_925x_MODELS
70};
71
f5fcc13c
TI		 72enum {
73 STAC_D945_REF,
74 STAC_D945GTP3,
75 STAC_D945GTP5,
5d5d3bc3
IZ		 76 STAC_INTEL_MAC_V1,
77 STAC_INTEL_MAC_V2,
78 STAC_INTEL_MAC_V3,
79 STAC_INTEL_MAC_V4,
80 STAC_INTEL_MAC_V5,
dfe495d0 81 /* for backward compatibility */
f5fcc13c 82 STAC_MACMINI,
3fc24d85 83 STAC_MACBOOK,
6f0778d8
NB		 84 STAC_MACBOOK_PRO_V1,
85 STAC_MACBOOK_PRO_V2,
f16928fb 86 STAC_IMAC_INTEL,
0dae0f83 87 STAC_IMAC_INTEL_20,
dfe495d0
TI		 88 STAC_922X_DELL_D81,
89 STAC_922X_DELL_D82,
90 STAC_922X_DELL_M81,
91 STAC_922X_DELL_M82,
f5fcc13c
TI		 92 STAC_922X_MODELS
93};
94
95enum {
96 STAC_D965_REF,
97 STAC_D965_3ST,
98 STAC_D965_5ST,
4ff076e5 99 STAC_DELL_3ST,
f5fcc13c
TI		 100 STAC_927X_MODELS
101};
403d1944 102
2f2f4251 103struct sigmatel_spec {
c8b6bf9b 104 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 105 unsigned int num_mixers;
106
403d1944 107 int board_config;
c7d4b2fa 108 unsigned int surr_switch: 1;
403d1944
MP		 109 unsigned int line_switch: 1;
110 unsigned int mic_switch: 1;
3cc08dc6 111 unsigned int alt_switch: 1;
82bc955f 112 unsigned int hp_detect: 1;
62fe78e9 113 unsigned int gpio_mute: 1;
c7d4b2fa 114
8259980e
TI		 115 unsigned int gpio_mask, gpio_data;
116
2f2f4251
M		 117 /* playback */
118 struct hda_multi_out multiout;
3cc08dc6 119 hda_nid_t dac_nids[5];
2f2f4251
M		 120
121 /* capture */
122 hda_nid_t *adc_nids;
2f2f4251 123 unsigned int num_adcs;
dabbed6f
M		 124 hda_nid_t *mux_nids;
125 unsigned int num_muxes;
8b65727b
MP		 126 hda_nid_t *dmic_nids;
127 unsigned int num_dmics;
128 hda_nid_t dmux_nid;
dabbed6f 129 hda_nid_t dig_in_nid;
2f2f4251 130
2f2f4251
M		 131 /* pin widgets */
132 hda_nid_t *pin_nids;
133 unsigned int num_pins;
2f2f4251 134 unsigned int *pin_configs;
11b44bbd 135 unsigned int *bios_pin_configs;
2f2f4251
M		 136
137 /* codec specific stuff */
138 struct hda_verb *init;
c8b6bf9b 139 struct snd_kcontrol_new *mixer;
2f2f4251
M		 140
141 /* capture source */
8b65727b
MP		 142 struct hda_input_mux *dinput_mux;
143 unsigned int cur_dmux;
c7d4b2fa 144 struct hda_input_mux *input_mux;
3cc08dc6 145 unsigned int cur_mux[3];
2f2f4251 146
403d1944
MP		 147 /* i/o switches */
148 unsigned int io_switch[2];
0fb87bb4 149 unsigned int clfe_swap;
5f10c4a9 150 unsigned int aloopback;
2f2f4251 151
c7d4b2fa
M		 152 struct hda_pcm pcm_rec[2]; /* PCM information */
153
154 /* dynamic controls and input_mux */
155 struct auto_pin_cfg autocfg;
156 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 157 struct snd_kcontrol_new *kctl_alloc;
8b65727b 158 struct hda_input_mux private_dimux;
c7d4b2fa 159 struct hda_input_mux private_imux;
2f2f4251
M		 160};
161
162static hda_nid_t stac9200_adc_nids[1] = {
163 0x03,
164};
165
166static hda_nid_t stac9200_mux_nids[1] = {
167 0x0c,
168};
169
170static hda_nid_t stac9200_dac_nids[1] = {
171 0x02,
172};
173
8e21c34c
TD		 174static hda_nid_t stac925x_adc_nids[1] = {
175 0x03,
176};
177
178static hda_nid_t stac925x_mux_nids[1] = {
179 0x0f,
180};
181
182static hda_nid_t stac925x_dac_nids[1] = {
183 0x02,
184};
185
2c11f955
TD		 186static hda_nid_t stac925x_dmic_nids[1] = {
187 0x15,
188};
189
2f2f4251
M		 190static hda_nid_t stac922x_adc_nids[2] = {
191 0x06, 0x07,
192};
193
194static hda_nid_t stac922x_mux_nids[2] = {
195 0x12, 0x13,
196};
197
3cc08dc6
MP		 198static hda_nid_t stac927x_adc_nids[3] = {
199 0x07, 0x08, 0x09
200};
201
202static hda_nid_t stac927x_mux_nids[3] = {
203 0x15, 0x16, 0x17
204};
205
f3302a59
MP		 206static hda_nid_t stac9205_adc_nids[2] = {
207 0x12, 0x13
208};
209
210static hda_nid_t stac9205_mux_nids[2] = {
211 0x19, 0x1a
212};
213
2549413e
TI		 214static hda_nid_t stac9205_dmic_nids[2] = {
215 0x17, 0x18,
8b65727b
MP		 216};
217
c7d4b2fa 218static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 219 0x08, 0x09, 0x0d, 0x0e,
220 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 221};
222
8e21c34c
TD		 223static hda_nid_t stac925x_pin_nids[8] = {
224 0x07, 0x08, 0x0a, 0x0b,
225 0x0c, 0x0d, 0x10, 0x11,
226};
227
2f2f4251
M		 228static hda_nid_t stac922x_pin_nids[10] = {
229 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
230 0x0f, 0x10, 0x11, 0x15, 0x1b,
231};
232
3cc08dc6
MP		 233static hda_nid_t stac927x_pin_nids[14] = {
234 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
235 0x0f, 0x10, 0x11, 0x12, 0x13,
236 0x14, 0x21, 0x22, 0x23,
237};
238
f3302a59
MP		 239static hda_nid_t stac9205_pin_nids[12] = {
240 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
241 0x0f, 0x14, 0x16, 0x17, 0x18,
242 0x21, 0x22,
f3302a59
MP		 243};
244
8b65727b
MP		 245static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
246 struct snd_ctl_elem_info *uinfo)
247{
248 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
249 struct sigmatel_spec *spec = codec->spec;
250 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
251}
252
253static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
254 struct snd_ctl_elem_value *ucontrol)
255{
256 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
257 struct sigmatel_spec *spec = codec->spec;
258
259 ucontrol->value.enumerated.item[0] = spec->cur_dmux;
260 return 0;
261}
262
263static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
264 struct snd_ctl_elem_value *ucontrol)
265{
266 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
267 struct sigmatel_spec *spec = codec->spec;
268
269 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
270 spec->dmux_nid, &spec->cur_dmux);
271}
272
c8b6bf9b 273static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 274{
275 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
276 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 277 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 278}
279
c8b6bf9b 280static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 281{
282 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
283 struct sigmatel_spec *spec = codec->spec;
284 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
285
286 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
287 return 0;
288}
289
c8b6bf9b 290static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 291{
292 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
293 struct sigmatel_spec *spec = codec->spec;
294 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
295
c7d4b2fa 296 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 297 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
298}
299
5f10c4a9
ML		 300#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
301
302static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
303 struct snd_ctl_elem_value *ucontrol)
304{
305 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
306 struct sigmatel_spec *spec = codec->spec;
307
308 ucontrol->value.integer.value[0] = spec->aloopback;
309 return 0;
310}
311
312static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
313 struct snd_ctl_elem_value *ucontrol)
314{
315 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
316 struct sigmatel_spec *spec = codec->spec;
317 unsigned int dac_mode;
318
319 if (spec->aloopback == ucontrol->value.integer.value[0])
320 return 0;
321
322 spec->aloopback = ucontrol->value.integer.value[0];
323
324
325 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
326 kcontrol->private_value & 0xFFFF, 0x0);
327
328 if (spec->aloopback) {
329 snd_hda_power_up(codec);
330 dac_mode |= 0x40;
331 } else {
332 snd_hda_power_down(codec);
333 dac_mode &= ~0x40;
334 }
335
336 snd_hda_codec_write_cache(codec, codec->afg, 0,
337 kcontrol->private_value >> 16, dac_mode);
338
339 return 1;
340}
341
6e6b88ff
ML		 342static int stac92xx_volknob_info(struct snd_kcontrol *kcontrol,
343 struct snd_ctl_elem_info *uinfo)
344{
345 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
346 uinfo->count = 1;
347 uinfo->value.integer.min = 0;
348 uinfo->value.integer.max = 127;
349 return 0;
350}
351
352static int stac92xx_volknob_get(struct snd_kcontrol *kcontrol,
353 struct snd_ctl_elem_value *ucontrol)
354{
355 ucontrol->value.integer.value[0] = kcontrol->private_value;
356 return 0;
357}
358
359static int stac92xx_volknob_put(struct snd_kcontrol *kcontrol,
360 struct snd_ctl_elem_value *ucontrol)
361{
362 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
363
364 if (kcontrol->private_value == ucontrol->value.integer.value[0])
365 return 0;
366
367 kcontrol->private_value = ucontrol->value.integer.value[0];
368
369 snd_hda_codec_write_cache(codec, 0x24, 0,
370 AC_VERB_SET_VOLUME_KNOB_CONTROL,
371 kcontrol->private_value | 0x80);
372 return 1;
373}
374
5f10c4a9 375
c7d4b2fa 376static struct hda_verb stac9200_core_init[] = {
2f2f4251 377 /* set dac0mux for dac converter */
c7d4b2fa 378 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 379 {}
380};
381
8e21c34c
TD		 382static struct hda_verb stac925x_core_init[] = {
383 /* set dac0mux for dac converter */
384 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
385 {}
386};
387
c7d4b2fa 388static struct hda_verb stac922x_core_init[] = {
2f2f4251 389 /* set master volume and direct control */
c7d4b2fa 390 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 391 {}
392};
393
93ed1503 394static struct hda_verb d965_core_init[] = {
19039bd0 395 /* set master volume and direct control */
93ed1503 396 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 397 /* unmute node 0x1b */
398 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
399 /* select node 0x03 as DAC */
400 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
401 {}
402};
403
3cc08dc6
MP		 404static struct hda_verb stac927x_core_init[] = {
405 /* set master volume and direct control */
406 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
407 {}
408};
409
f3302a59
MP		 410static struct hda_verb stac9205_core_init[] = {
411 /* set master volume and direct control */
412 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
413 {}
414};
415
ca7c5a8b
ML		 416#define STAC_INPUT_SOURCE \
417 { \
418 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
419 .name = "Input Source", \
420 .count = 1, \
421 .info = stac92xx_mux_enum_info, \
422 .get = stac92xx_mux_enum_get, \
423 .put = stac92xx_mux_enum_put, \
424 }
425
5f10c4a9
ML		 426#define STAC_ANALOG_LOOPBACK(verb_read,verb_write) \
427 { \
428 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
429 .name = "Analog Loopback", \
430 .count = 1, \
431 .info = stac92xx_aloopback_info, \
432 .get = stac92xx_aloopback_get, \
433 .put = stac92xx_aloopback_put, \
434 .private_value = verb_read | (verb_write << 16), \
435 }
436
6e6b88ff
ML		 437#define STAC_VOLKNOB \
438 { \
439 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
440 .name = "Master Playback Volume", \
441 .count = 1, \
442 .info = stac92xx_volknob_info, \
443 .get = stac92xx_volknob_get, \
444 .put = stac92xx_volknob_put, \
445 .private_value = 127, \
446 }
447
ca7c5a8b 448
c8b6bf9b 449static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 450 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
451 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
ca7c5a8b 452 STAC_INPUT_SOURCE,
2f2f4251
M		 453 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
454 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 455 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 456 { } /* end */
457};
458
8e21c34c 459static struct snd_kcontrol_new stac925x_mixer[] = {
ca7c5a8b 460 STAC_INPUT_SOURCE,
8e21c34c
TD		 461 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
462 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
463 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
464 { } /* end */
465};
466
c7d4b2fa 467/* This needs to be generated dynamically based on sequence */
c8b6bf9b 468static struct snd_kcontrol_new stac922x_mixer[] = {
ca7c5a8b 469 STAC_INPUT_SOURCE,
6e6b88ff 470 STAC_VOLKNOB,
2f2f4251 471 HDA_CODEC_VOLUME("Capture Volume", 0x17, 0x0, HDA_INPUT),
0fd1708a 472 HDA_CODEC_MUTE("Capture Switch", 0x17, 0x0, HDA_INPUT),
2f2f4251
M		 473 HDA_CODEC_VOLUME("Mux Capture Volume", 0x12, 0x0, HDA_OUTPUT),
474 { } /* end */
475};
476
19039bd0
TI		 477/* This needs to be generated dynamically based on sequence */
478static struct snd_kcontrol_new stac9227_mixer[] = {
ca7c5a8b 479 STAC_INPUT_SOURCE,
6e6b88ff 480 STAC_VOLKNOB,
5f10c4a9 481 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB),
19039bd0
TI		 482 HDA_CODEC_VOLUME("Capture Volume", 0x15, 0x0, HDA_OUTPUT),
483 HDA_CODEC_MUTE("Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
484 { } /* end */
485};
486
d1d985f0 487static struct snd_kcontrol_new stac927x_mixer[] = {
ca7c5a8b 488 STAC_INPUT_SOURCE,
6e6b88ff 489 STAC_VOLKNOB,
5f10c4a9 490 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB),
3cc08dc6
MP		 491 HDA_CODEC_VOLUME("InMux Capture Volume", 0x15, 0x0, HDA_OUTPUT),
492 HDA_CODEC_VOLUME("InVol Capture Volume", 0x18, 0x0, HDA_INPUT),
493 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
494 { } /* end */
495};
496
d1d985f0 497static struct snd_kcontrol_new stac9205_mixer[] = {
8b65727b
MP		 498 {
499 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
500 .name = "Digital Input Source",
501 .count = 1,
502 .info = stac92xx_dmux_enum_info,
503 .get = stac92xx_dmux_enum_get,
504 .put = stac92xx_dmux_enum_put,
505 },
ca7c5a8b 506 STAC_INPUT_SOURCE,
5f10c4a9 507 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0),
6e6b88ff 508 STAC_VOLKNOB,
f3302a59
MP		 509 HDA_CODEC_VOLUME("InMux Capture Volume", 0x19, 0x0, HDA_OUTPUT),
510 HDA_CODEC_VOLUME("InVol Capture Volume", 0x1b, 0x0, HDA_INPUT),
511 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1d, 0x0, HDA_OUTPUT),
512 { } /* end */
513};
514
2f2f4251
M		 515static int stac92xx_build_controls(struct hda_codec *codec)
516{
517 struct sigmatel_spec *spec = codec->spec;
518 int err;
c7d4b2fa 519 int i;
2f2f4251
M		 520
521 err = snd_hda_add_new_ctls(codec, spec->mixer);
522 if (err < 0)
523 return err;
c7d4b2fa
M		 524
525 for (i = 0; i < spec->num_mixers; i++) {
526 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
527 if (err < 0)
528 return err;
529 }
530
dabbed6f
M		 531 if (spec->multiout.dig_out_nid) {
532 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
533 if (err < 0)
534 return err;
535 }
536 if (spec->dig_in_nid) {
537 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
538 if (err < 0)
539 return err;
540 }
541 return 0;
2f2f4251
M		 542}
543
403d1944 544static unsigned int ref9200_pin_configs[8] = {
dabbed6f 545 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 546 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
547};
548
dfe495d0
TI		 549/*
550 STAC 9200 pin configs for
551 102801A8
552 102801DE
553 102801E8
554*/
555static unsigned int dell9200_d21_pin_configs[8] = {
556 0x400001f0, 0x400001f1, 0x01a19021, 0x90100140,
557 0x01813122, 0x02214030, 0x01014010, 0x02a19020,
558};
559
560/*
561 STAC 9200 pin configs for
562 102801C0
563 102801C1
564*/
565static unsigned int dell9200_d22_pin_configs[8] = {
566 0x400001f0, 0x400001f1, 0x02a19021, 0x90100140,
567 0x400001f2, 0x0221401f, 0x01014010, 0x01813020,
568};
569
570/*
571 STAC 9200 pin configs for
572 102801C4 (Dell Dimension E310)
573 102801C5
574 102801C7
575 102801D9
576 102801DA
577 102801E3
578*/
579static unsigned int dell9200_d23_pin_configs[8] = {
580 0x400001f0, 0x400001f1, 0x01a19021, 0x90100140,
581 0x400001f2, 0x0221401f, 0x01014010, 0x01813020,
582};
583
584
585/*
586 STAC 9200-32 pin configs for
587 102801B5 (Dell Inspiron 630m)
588 102801D8 (Dell Inspiron 640m)
589*/
590static unsigned int dell9200_m21_pin_configs[8] = {
591 0x40c003fa, 0x03441340, 0x03a11020, 0x401003fc,
592 0x403003fd, 0x0321121f, 0x0321121f, 0x408003fb,
593};
594
595/*
596 STAC 9200-32 pin configs for
597 102801C2 (Dell Latitude D620)
598 102801C8
599 102801CC (Dell Latitude D820)
600 102801D4
601 102801D6
602*/
603static unsigned int dell9200_m22_pin_configs[8] = {
604 0x40c003fa, 0x0144131f, 0x03A11020, 0x401003fb,
605 0x40f000fc, 0x0321121f, 0x90170310, 0x90a70321,
606};
607
608/*
609 STAC 9200-32 pin configs for
610 102801CE (Dell XPS M1710)
611 102801CF (Dell Precision M90)
612*/
613static unsigned int dell9200_m23_pin_configs[8] = {
614 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
615 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
616};
617
618/*
619 STAC 9200-32 pin configs for
620 102801C9
621 102801CA
622 102801CB (Dell Latitude 120L)
623 102801D3
624*/
625static unsigned int dell9200_m24_pin_configs[8] = {
626 0x40c003fa, 0x404003fb, 0x03a11020, 0x401003fd,
627 0x403003fe, 0x0321121f, 0x90170310, 0x408003fc,
628};
629
630/*
631 STAC 9200-32 pin configs for
632 102801BD (Dell Inspiron E1505n)
633 102801EE
634 102801EF
635*/
636static unsigned int dell9200_m25_pin_configs[8] = {
637 0x40c003fa, 0x01441340, 0x04a11020, 0x401003fc,
638 0x403003fd, 0x0421121f, 0x90170310, 0x408003fb,
639};
640
641/*
642 STAC 9200-32 pin configs for
643 102801F5 (Dell Inspiron 1501)
644 102801F6
645*/
646static unsigned int dell9200_m26_pin_configs[8] = {
647 0x40c003fa, 0x404003fb, 0x04a11020, 0x401003fd,
648 0x403003fe, 0x0421121f, 0x90170310, 0x408003fc,
649};
650
651/*
652 STAC 9200-32
653 102801CD (Dell Inspiron E1705/9400)
654*/
655static unsigned int dell9200_m27_pin_configs[8] = {
656 0x40c003fa, 0x01441340, 0x04a11020, 0x90170310,
657 0x40f003fc, 0x0421121f, 0x90170310, 0x408003fb,
658};
659
660
f5fcc13c
TI		 661static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
662 [STAC_REF] = ref9200_pin_configs,
dfe495d0
TI		 663 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
664 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
665 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
666 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
667 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
668 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
669 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
670 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
671 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
672 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 673};
674
f5fcc13c
TI		 675static const char *stac9200_models[STAC_9200_MODELS] = {
676 [STAC_REF] = "ref",
dfe495d0
TI		 677 [STAC_9200_DELL_D21] = "dell-d21",
678 [STAC_9200_DELL_D22] = "dell-d22",
679 [STAC_9200_DELL_D23] = "dell-d23",
680 [STAC_9200_DELL_M21] = "dell-m21",
681 [STAC_9200_DELL_M22] = "dell-m22",
682 [STAC_9200_DELL_M23] = "dell-m23",
683 [STAC_9200_DELL_M24] = "dell-m24",
684 [STAC_9200_DELL_M25] = "dell-m25",
685 [STAC_9200_DELL_M26] = "dell-m26",
686 [STAC_9200_DELL_M27] = "dell-m27",
f5fcc13c
TI		 687};
688
689static struct snd_pci_quirk stac9200_cfg_tbl[] = {
690 /* SigmaTel reference board */
691 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
692 "DFI LanParty", STAC_REF),
e7377071 693 /* Dell laptops have BIOS problem */
dfe495d0
TI		 694 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
695 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 696 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 697 "Dell Inspiron 630m", STAC_9200_DELL_M21),
698 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
699 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
700 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
701 "unknown Dell", STAC_9200_DELL_D22),
702 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
703 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 704 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 705 "Dell Latitude D620", STAC_9200_DELL_M22),
706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
707 "unknown Dell", STAC_9200_DELL_D23),
708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
709 "unknown Dell", STAC_9200_DELL_D23),
710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
711 "unknown Dell", STAC_9200_DELL_M22),
712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
713 "unknown Dell", STAC_9200_DELL_M24),
714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
715 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 717 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 719 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 721 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 723 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 725 "Dell Precision M90", STAC_9200_DELL_M23),
726 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
727 "unknown Dell", STAC_9200_DELL_M22),
728 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
729 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 730 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 731 "unknown Dell", STAC_9200_DELL_M22),
49c605db 732 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 733 "Dell Inspiron 640m", STAC_9200_DELL_M21),
734 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
735 "unknown Dell", STAC_9200_DELL_D23),
736 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
737 "unknown Dell", STAC_9200_DELL_D23),
738 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
739 "unknown Dell", STAC_9200_DELL_D21),
740 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
741 "unknown Dell", STAC_9200_DELL_D23),
742 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
743 "unknown Dell", STAC_9200_DELL_D21),
744 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
745 "unknown Dell", STAC_9200_DELL_M25),
746 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
747 "unknown Dell", STAC_9200_DELL_M25),
49c605db 748 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 749 "Dell Inspiron 1501", STAC_9200_DELL_M26),
750 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
751 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 752 /* Panasonic */
753 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
754
403d1944
MP		 755 {} /* terminator */
756};
757
8e21c34c
TD		 758static unsigned int ref925x_pin_configs[8] = {
759 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
760 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
761};
762
763static unsigned int stac925x_MA6_pin_configs[8] = {
764 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
765 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
766};
767
2c11f955
TD		 768static unsigned int stac925x_PA6_pin_configs[8] = {
769 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
770 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
771};
772
8e21c34c 773static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 774 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
775 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 776};
777
778static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
779 [STAC_REF] = ref925x_pin_configs,
780 [STAC_M2_2] = stac925xM2_2_pin_configs,
781 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 782 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 783};
784
785static const char *stac925x_models[STAC_925x_MODELS] = {
786 [STAC_REF] = "ref",
787 [STAC_M2_2] = "m2-2",
788 [STAC_MA6] = "m6",
2c11f955 789 [STAC_PA6] = "pa6",
8e21c34c
TD		 790};
791
792static struct snd_pci_quirk stac925x_cfg_tbl[] = {
793 /* SigmaTel reference board */
794 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 795 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 796 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
797 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
798 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 799 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 800 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
801 {} /* terminator */
802};
803
403d1944
MP		 804static unsigned int ref922x_pin_configs[10] = {
805 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
806 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 807 0x40000100, 0x40000100,
808};
809
dfe495d0
TI		 810/*
811 STAC 922X pin configs for
812 102801A7
813 102801AB
814 102801A9
815 102801D1
816 102801D2
817*/
818static unsigned int dell_922x_d81_pin_configs[10] = {
819 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
820 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
821 0x01813122, 0x400001f2,
822};
823
824/*
825 STAC 922X pin configs for
826 102801AC
827 102801D0
828*/
829static unsigned int dell_922x_d82_pin_configs[10] = {
830 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
831 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
832 0x01813122, 0x400001f1,
833};
834
835/*
836 STAC 922X pin configs for
837 102801BF
838*/
839static unsigned int dell_922x_m81_pin_configs[10] = {
840 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
841 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
842 0x40C003f1, 0x405003f0,
843};
844
845/*
846 STAC 9221 A1 pin configs for
847 102801D7 (Dell XPS M1210)
848*/
849static unsigned int dell_922x_m82_pin_configs[10] = {
850 0x0221121f, 0x408103ff, 0x02111212, 0x90100310,
851 0x408003f1, 0x02111211, 0x03451340, 0x40c003f2,
852 0x508003f3, 0x405003f4,
853};
854
403d1944 855static unsigned int d945gtp3_pin_configs[10] = {
869264c4 856 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 857 0x40000100, 0x40000100, 0x40000100, 0x40000100,
858 0x02a19120, 0x40000100,
859};
860
861static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 862 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
863 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 864 0x02a19320, 0x40000100,
865};
866
5d5d3bc3
IZ		 867static unsigned int intel_mac_v1_pin_configs[10] = {
868 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
869 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
870 0x400000fc, 0x400000fb,
871};
872
873static unsigned int intel_mac_v2_pin_configs[10] = {
874 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
875 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
876 0x400000fc, 0x400000fb,
6f0778d8
NB		 877};
878
5d5d3bc3
IZ		 879static unsigned int intel_mac_v3_pin_configs[10] = {
880 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
881 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 882 0x400000fc, 0x400000fb,
883};
884
5d5d3bc3
IZ		 885static unsigned int intel_mac_v4_pin_configs[10] = {
886 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
887 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 888 0x400000fc, 0x400000fb,
889};
890
5d5d3bc3
IZ		 891static unsigned int intel_mac_v5_pin_configs[10] = {
892 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
893 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
894 0x400000fc, 0x400000fb,
0dae0f83
TI		 895};
896
76c08828 897
19039bd0 898static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 899 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 900 [STAC_D945GTP3] = d945gtp3_pin_configs,
901 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 902 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
903 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
904 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
905 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
906 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 907 /* for backward compatibility */
5d5d3bc3
IZ		 908 [STAC_MACMINI] = intel_mac_v3_pin_configs,
909 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
910 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
911 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
912 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
913 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 914 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
915 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
916 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
917 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 918};
919
f5fcc13c
TI		 920static const char *stac922x_models[STAC_922X_MODELS] = {
921 [STAC_D945_REF] = "ref",
922 [STAC_D945GTP5] = "5stack",
923 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 924 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
925 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
926 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
927 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
928 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 929 /* for backward compatibility */
f5fcc13c 930 [STAC_MACMINI] = "macmini",
3fc24d85 931 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 932 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
933 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 934 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 935 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 936 [STAC_922X_DELL_D81] = "dell-d81",
937 [STAC_922X_DELL_D82] = "dell-d82",
938 [STAC_922X_DELL_M81] = "dell-m81",
939 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 940};
941
942static struct snd_pci_quirk stac922x_cfg_tbl[] = {
943 /* SigmaTel reference board */
944 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
945 "DFI LanParty", STAC_D945_REF),
946 /* Intel 945G based systems */
947 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
948 "Intel D945G", STAC_D945GTP3),
949 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
950 "Intel D945G", STAC_D945GTP3),
951 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
952 "Intel D945G", STAC_D945GTP3),
953 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
954 "Intel D945G", STAC_D945GTP3),
955 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
956 "Intel D945G", STAC_D945GTP3),
957 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
958 "Intel D945G", STAC_D945GTP3),
959 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
960 "Intel D945G", STAC_D945GTP3),
961 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
962 "Intel D945G", STAC_D945GTP3),
963 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
964 "Intel D945G", STAC_D945GTP3),
965 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
966 "Intel D945G", STAC_D945GTP3),
967 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
968 "Intel D945G", STAC_D945GTP3),
969 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
970 "Intel D945G", STAC_D945GTP3),
971 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
972 "Intel D945G", STAC_D945GTP3),
973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
974 "Intel D945G", STAC_D945GTP3),
975 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
976 "Intel D945G", STAC_D945GTP3),
977 /* Intel D945G 5-stack systems */
978 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
979 "Intel D945G", STAC_D945GTP5),
980 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
981 "Intel D945G", STAC_D945GTP5),
982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
983 "Intel D945G", STAC_D945GTP5),
984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
985 "Intel D945G", STAC_D945GTP5),
986 /* Intel 945P based systems */
987 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
988 "Intel D945P", STAC_D945GTP3),
989 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
990 "Intel D945P", STAC_D945GTP3),
991 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
992 "Intel D945P", STAC_D945GTP3),
993 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
994 "Intel D945P", STAC_D945GTP3),
995 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
996 "Intel D945P", STAC_D945GTP3),
997 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
998 "Intel D945P", STAC_D945GTP5),
999 /* other systems */
1000 /* Apple Mac Mini (early 2006) */
1001 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1002 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1003 /* Dell systems */
1004 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1005 "unknown Dell", STAC_922X_DELL_D81),
1006 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1007 "unknown Dell", STAC_922X_DELL_D81),
1008 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1009 "unknown Dell", STAC_922X_DELL_D81),
1010 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1011 "unknown Dell", STAC_922X_DELL_D82),
1012 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1013 "unknown Dell", STAC_922X_DELL_M81),
1014 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1015 "unknown Dell", STAC_922X_DELL_D82),
1016 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1017 "unknown Dell", STAC_922X_DELL_D81),
1018 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1019 "unknown Dell", STAC_922X_DELL_D81),
1020 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1021 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1022 {} /* terminator */
1023};
1024
3cc08dc6 1025static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1026 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1027 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1028 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1029 0x01c42190, 0x40000100,
3cc08dc6
MP		 1030};
1031
93ed1503 1032static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1033 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1034 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1035 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1036 0x40000100, 0x40000100
1037};
1038
93ed1503
TD		 1039static unsigned int d965_5st_pin_configs[14] = {
1040 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1041 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1042 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1043 0x40000100, 0x40000100
1044};
1045
4ff076e5
TD		 1046static unsigned int dell_3st_pin_configs[14] = {
1047 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1048 0x01111212, 0x01116211, 0x01813050, 0x01112214,
1049 0x403003fa, 0x40000100, 0x40000100, 0x404003fb,
1050 0x40c003fc, 0x40000100
1051};
1052
93ed1503 1053static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
f5fcc13c 1054 [STAC_D965_REF] = ref927x_pin_configs,
93ed1503
TD		 1055 [STAC_D965_3ST] = d965_3st_pin_configs,
1056 [STAC_D965_5ST] = d965_5st_pin_configs,
4ff076e5 1057 [STAC_DELL_3ST] = dell_3st_pin_configs,
3cc08dc6
MP		 1058};
1059
f5fcc13c
TI		 1060static const char *stac927x_models[STAC_927X_MODELS] = {
1061 [STAC_D965_REF] = "ref",
1062 [STAC_D965_3ST] = "3stack",
1063 [STAC_D965_5ST] = "5stack",
4ff076e5 1064 [STAC_DELL_3ST] = "dell-3stack",
f5fcc13c
TI		 1065};
1066
1067static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1068 /* SigmaTel reference board */
1069 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1070 "DFI LanParty", STAC_D965_REF),
81d3dbde 1071 /* Intel 946 based systems */
f5fcc13c
TI		 1072 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1073 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1074 /* 965 based 3 stack systems */
f5fcc13c
TI		 1075 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1076 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1077 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1078 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1079 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1080 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1081 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1082 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1083 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1084 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1085 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1086 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1087 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1088 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1089 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1090 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1091 /* Dell 3 stack systems */
dfe495d0 1092 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1093 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1094 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
93ed1503 1095 /* 965 based 5 stack systems */
f5fcc13c
TI		 1096 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1097 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1098 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1099 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1100 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1101 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1102 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1103 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1104 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1105 {} /* terminator */
1106};
1107
f3302a59
MP		 1108static unsigned int ref9205_pin_configs[12] = {
1109 0x40000100, 0x40000100, 0x01016011, 0x01014010,
8b65727b
MP		 1110 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
1111 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1112};
1113
dfe495d0
TI		 1114/*
1115 STAC 9205 pin configs for
1116 102801F1
1117 102801F2
1118 102801FC
1119 102801FD
1120 10280204
1121 1028021F
1122*/
1123static unsigned int dell_9205_m42_pin_configs[12] = {
1124 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1125 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1126 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1127};
1128
1129/*
1130 STAC 9205 pin configs for
1131 102801F9
1132 102801FA
1133 102801FE
1134 102801FF (Dell Precision M4300)
1135 10280206
1136 10280200
1137 10280201
1138*/
1139static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1140 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1141 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1142 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1143};
1144
dfe495d0 1145static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1146 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1147 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1148 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1149};
1150
f5fcc13c 1151static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1152 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1153 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1154 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1155 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
ae0a8ed8 1156 [STAC_9205_M43xx] = NULL,
f3302a59
MP		 1157};
1158
f5fcc13c
TI		 1159static const char *stac9205_models[STAC_9205_MODELS] = {
1160 [STAC_9205_REF] = "ref",
dfe495d0 1161 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1162 [STAC_9205_DELL_M43] = "dell-m43",
1163 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1164};
1165
1166static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1167 /* SigmaTel reference board */
1168 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1169 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1171 "unknown Dell", STAC_9205_DELL_M42),
1172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1173 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
1175 "Dell Precision", STAC_9205_M43xx),
1176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1177 "Dell Precision", STAC_9205_DELL_M43),
1178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1179 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1181 "unknown Dell", STAC_9205_DELL_M42),
1182 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1183 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1184 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1185 "Dell Precision", STAC_9205_DELL_M43),
1186 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1187 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1189 "Dell Precision", STAC_9205_DELL_M43),
1190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1191 "Dell Inspiron", STAC_9205_DELL_M44),
1192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1193 "Dell Inspiron", STAC_9205_DELL_M44),
1194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1195 "Dell Inspiron", STAC_9205_DELL_M44),
1196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1197 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1199 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1201 "Dell Inspiron", STAC_9205_DELL_M44),
f3302a59
MP		 1202 {} /* terminator */
1203};
1204
11b44bbd
RF		 1205static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1206{
1207 int i;
1208 struct sigmatel_spec *spec = codec->spec;
1209
1210 if (! spec->bios_pin_configs) {
1211 spec->bios_pin_configs = kcalloc(spec->num_pins,
1212 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1213 if (! spec->bios_pin_configs)
1214 return -ENOMEM;
1215 }
1216
1217 for (i = 0; i < spec->num_pins; i++) {
1218 hda_nid_t nid = spec->pin_nids[i];
1219 unsigned int pin_cfg;
1220
1221 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1222 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1223 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1224 nid, pin_cfg);
1225 spec->bios_pin_configs[i] = pin_cfg;
1226 }
1227
1228 return 0;
1229}
1230
87d48363
MR		 1231static void stac92xx_set_config_reg(struct hda_codec *codec,
1232 hda_nid_t pin_nid, unsigned int pin_config)
1233{
1234 int i;
1235 snd_hda_codec_write(codec, pin_nid, 0,
1236 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1237 pin_config & 0x000000ff);
1238 snd_hda_codec_write(codec, pin_nid, 0,
1239 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1240 (pin_config & 0x0000ff00) >> 8);
1241 snd_hda_codec_write(codec, pin_nid, 0,
1242 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1243 (pin_config & 0x00ff0000) >> 16);
1244 snd_hda_codec_write(codec, pin_nid, 0,
1245 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1246 pin_config >> 24);
1247 i = snd_hda_codec_read(codec, pin_nid, 0,
1248 AC_VERB_GET_CONFIG_DEFAULT,
1249 0x00);
1250 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1251 pin_nid, i);
1252}
1253
2f2f4251
M		 1254static void stac92xx_set_config_regs(struct hda_codec *codec)
1255{
1256 int i;
1257 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1258
87d48363
MR		 1259 if (!spec->pin_configs)
1260 return;
11b44bbd 1261
87d48363
MR		 1262 for (i = 0; i < spec->num_pins; i++)
1263 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1264 spec->pin_configs[i]);
2f2f4251 1265}
2f2f4251 1266
8259980e 1267static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
92a22beb 1268{
8259980e 1269 struct sigmatel_spec *spec = codec->spec;
87d48363 1270 /* Configure GPIOx as output */
82beb8fd
TI		 1271 snd_hda_codec_write_cache(codec, codec->afg, 0,
1272 AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
87d48363 1273 /* Configure GPIOx as CMOS */
82beb8fd 1274 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
87d48363 1275 /* Assert GPIOx */
82beb8fd
TI		 1276 snd_hda_codec_write_cache(codec, codec->afg, 0,
1277 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
87d48363 1278 /* Enable GPIOx */
82beb8fd
TI		 1279 snd_hda_codec_write_cache(codec, codec->afg, 0,
1280 AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
92a22beb
MR		 1281}
1282
dabbed6f 1283/*
c7d4b2fa 1284 * Analog playback callbacks
dabbed6f 1285 */
c7d4b2fa
M		 1286static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1287 struct hda_codec *codec,
c8b6bf9b 1288 struct snd_pcm_substream *substream)
2f2f4251 1289{
dabbed6f 1290 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1291 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1292}
1293
2f2f4251
M		 1294static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1295 struct hda_codec *codec,
1296 unsigned int stream_tag,
1297 unsigned int format,
c8b6bf9b 1298 struct snd_pcm_substream *substream)
2f2f4251
M		 1299{
1300 struct sigmatel_spec *spec = codec->spec;
403d1944 1301 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1302}
1303
1304static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1305 struct hda_codec *codec,
c8b6bf9b 1306 struct snd_pcm_substream *substream)
2f2f4251
M		 1307{
1308 struct sigmatel_spec *spec = codec->spec;
1309 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1310}
1311
dabbed6f
M		 1312/*
1313 * Digital playback callbacks
1314 */
1315static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1316 struct hda_codec *codec,
c8b6bf9b 1317 struct snd_pcm_substream *substream)
dabbed6f
M		 1318{
1319 struct sigmatel_spec *spec = codec->spec;
1320 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1321}
1322
1323static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1324 struct hda_codec *codec,
c8b6bf9b 1325 struct snd_pcm_substream *substream)
dabbed6f
M		 1326{
1327 struct sigmatel_spec *spec = codec->spec;
1328 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1329}
1330
6b97eb45
TI		 1331static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1332 struct hda_codec *codec,
1333 unsigned int stream_tag,
1334 unsigned int format,
1335 struct snd_pcm_substream *substream)
1336{
1337 struct sigmatel_spec *spec = codec->spec;
1338 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1339 stream_tag, format, substream);
1340}
1341
dabbed6f 1342
2f2f4251
M		 1343/*
1344 * Analog capture callbacks
1345 */
1346static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1347 struct hda_codec *codec,
1348 unsigned int stream_tag,
1349 unsigned int format,
c8b6bf9b 1350 struct snd_pcm_substream *substream)
2f2f4251
M		 1351{
1352 struct sigmatel_spec *spec = codec->spec;
1353
1354 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1355 stream_tag, 0, format);
1356 return 0;
1357}
1358
1359static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1360 struct hda_codec *codec,
c8b6bf9b 1361 struct snd_pcm_substream *substream)
2f2f4251
M		 1362{
1363 struct sigmatel_spec *spec = codec->spec;
1364
1365 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1366 return 0;
1367}
1368
dabbed6f
M		 1369static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1370 .substreams = 1,
1371 .channels_min = 2,
1372 .channels_max = 2,
1373 /* NID is set in stac92xx_build_pcms */
1374 .ops = {
1375 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1376 .close = stac92xx_dig_playback_pcm_close,
1377 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1378 },
1379};
1380
1381static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1382 .substreams = 1,
1383 .channels_min = 2,
1384 .channels_max = 2,
1385 /* NID is set in stac92xx_build_pcms */
1386};
1387
2f2f4251
M		 1388static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1389 .substreams = 1,
1390 .channels_min = 2,
c7d4b2fa 1391 .channels_max = 8,
2f2f4251
M		 1392 .nid = 0x02, /* NID to query formats and rates */
1393 .ops = {
1394 .open = stac92xx_playback_pcm_open,
1395 .prepare = stac92xx_playback_pcm_prepare,
1396 .cleanup = stac92xx_playback_pcm_cleanup
1397 },
1398};
1399
3cc08dc6
MP		 1400static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1401 .substreams = 1,
1402 .channels_min = 2,
1403 .channels_max = 2,
1404 .nid = 0x06, /* NID to query formats and rates */
1405 .ops = {
1406 .open = stac92xx_playback_pcm_open,
1407 .prepare = stac92xx_playback_pcm_prepare,
1408 .cleanup = stac92xx_playback_pcm_cleanup
1409 },
1410};
1411
2f2f4251
M		 1412static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
1413 .substreams = 2,
1414 .channels_min = 2,
1415 .channels_max = 2,
3cc08dc6 1416 /* NID is set in stac92xx_build_pcms */
2f2f4251
M		 1417 .ops = {
1418 .prepare = stac92xx_capture_pcm_prepare,
1419 .cleanup = stac92xx_capture_pcm_cleanup
1420 },
1421};
1422
1423static int stac92xx_build_pcms(struct hda_codec *codec)
1424{
1425 struct sigmatel_spec *spec = codec->spec;
1426 struct hda_pcm *info = spec->pcm_rec;
1427
1428 codec->num_pcms = 1;
1429 codec->pcm_info = info;
1430
c7d4b2fa 1431 info->name = "STAC92xx Analog";
2f2f4251 1432 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1433 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6
MP		 1434 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
1435
1436 if (spec->alt_switch) {
1437 codec->num_pcms++;
1438 info++;
1439 info->name = "STAC92xx Analog Alt";
1440 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1441 }
2f2f4251 1442
dabbed6f
M		 1443 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1444 codec->num_pcms++;
1445 info++;
1446 info->name = "STAC92xx Digital";
1447 if (spec->multiout.dig_out_nid) {
1448 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1449 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1450 }
1451 if (spec->dig_in_nid) {
1452 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1453 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1454 }
1455 }
1456
2f2f4251
M		 1457 return 0;
1458}
1459
c960a03b
TI		 1460static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1461{
1462 unsigned int pincap = snd_hda_param_read(codec, nid,
1463 AC_PAR_PIN_CAP);
1464 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1465 if (pincap & AC_PINCAP_VREF_100)
1466 return AC_PINCTL_VREF_100;
1467 if (pincap & AC_PINCAP_VREF_80)
1468 return AC_PINCTL_VREF_80;
1469 if (pincap & AC_PINCAP_VREF_50)
1470 return AC_PINCTL_VREF_50;
1471 if (pincap & AC_PINCAP_VREF_GRD)
1472 return AC_PINCTL_VREF_GRD;
1473 return 0;
1474}
1475
403d1944
MP		 1476static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1477
1478{
82beb8fd
TI		 1479 snd_hda_codec_write_cache(codec, nid, 0,
1480 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1481}
1482
a5ce8890 1483#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1484
1485static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1486{
1487 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1488 struct sigmatel_spec *spec = codec->spec;
1489 int io_idx = kcontrol-> private_value & 0xff;
1490
1491 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1492 return 0;
1493}
1494
1495static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1496{
1497 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1498 struct sigmatel_spec *spec = codec->spec;
1499 hda_nid_t nid = kcontrol->private_value >> 8;
1500 int io_idx = kcontrol-> private_value & 0xff;
1501 unsigned short val = ucontrol->value.integer.value[0];
1502
1503 spec->io_switch[io_idx] = val;
1504
1505 if (val)
1506 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1507 else {
1508 unsigned int pinctl = AC_PINCTL_IN_EN;
1509 if (io_idx) /* set VREF for mic */
1510 pinctl |= stac92xx_get_vref(codec, nid);
1511 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1512 }
403d1944
MP		 1513 return 1;
1514}
1515
0fb87bb4
ML		 1516#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
1517
1518static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
1519 struct snd_ctl_elem_value *ucontrol)
1520{
1521 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1522 struct sigmatel_spec *spec = codec->spec;
1523
1524 ucontrol->value.integer.value[0] = spec->clfe_swap;
1525 return 0;
1526}
1527
1528static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
1529 struct snd_ctl_elem_value *ucontrol)
1530{
1531 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1532 struct sigmatel_spec *spec = codec->spec;
1533 hda_nid_t nid = kcontrol->private_value & 0xff;
1534
1535 if (spec->clfe_swap == ucontrol->value.integer.value[0])
1536 return 0;
1537
1538 spec->clfe_swap = ucontrol->value.integer.value[0];
1539
1540 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
1541 spec->clfe_swap ? 0x4 : 0x0);
1542
1543 return 1;
1544}
1545
403d1944
MP		 1546#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1547 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1548 .name = xname, \
1549 .index = 0, \
1550 .info = stac92xx_io_switch_info, \
1551 .get = stac92xx_io_switch_get, \
1552 .put = stac92xx_io_switch_put, \
1553 .private_value = xpval, \
1554 }
1555
0fb87bb4
ML		 1556#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
1557 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1558 .name = xname, \
1559 .index = 0, \
1560 .info = stac92xx_clfe_switch_info, \
1561 .get = stac92xx_clfe_switch_get, \
1562 .put = stac92xx_clfe_switch_put, \
1563 .private_value = xpval, \
1564 }
403d1944 1565
c7d4b2fa
M		 1566enum {
1567 STAC_CTL_WIDGET_VOL,
1568 STAC_CTL_WIDGET_MUTE,
403d1944 1569 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 1570 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 1571};
1572
c8b6bf9b 1573static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 1574 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
1575 HDA_CODEC_MUTE(NULL, 0, 0, 0),
403d1944 1576 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 1577 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 1578};
1579
1580/* add dynamic controls */
1581static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
1582{
c8b6bf9b 1583 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 1584
1585 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
1586 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
1587
1588 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
1589 if (! knew)
1590 return -ENOMEM;
1591 if (spec->kctl_alloc) {
1592 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
1593 kfree(spec->kctl_alloc);
1594 }
1595 spec->kctl_alloc = knew;
1596 spec->num_kctl_alloc = num;
1597 }
1598
1599 knew = &spec->kctl_alloc[spec->num_kctl_used];
1600 *knew = stac92xx_control_templates[type];
82fe0c58 1601 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 1602 if (! knew->name)
1603 return -ENOMEM;
1604 knew->private_value = val;
1605 spec->num_kctl_used++;
1606 return 0;
1607}
1608
403d1944
MP		 1609/* flag inputs as additional dynamic lineouts */
1610static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
1611{
1612 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1613 unsigned int wcaps, wtype;
1614 int i, num_dacs = 0;
1615
1616 /* use the wcaps cache to count all DACs available for line-outs */
1617 for (i = 0; i < codec->num_nodes; i++) {
1618 wcaps = codec->wcaps[i];
1619 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1620 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
1621 num_dacs++;
1622 }
403d1944 1623
7b043899
SL		 1624 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
1625
403d1944
MP		 1626 switch (cfg->line_outs) {
1627 case 3:
1628 /* add line-in as side */
7b043899 1629 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 1630 cfg->line_out_pins[cfg->line_outs] =
1631 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1632 spec->line_switch = 1;
1633 cfg->line_outs++;
1634 }
1635 break;
1636 case 2:
1637 /* add line-in as clfe and mic as side */
7b043899 1638 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 1639 cfg->line_out_pins[cfg->line_outs] =
1640 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1641 spec->line_switch = 1;
1642 cfg->line_outs++;
1643 }
7b043899 1644 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 1645 cfg->line_out_pins[cfg->line_outs] =
1646 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 1647 spec->mic_switch = 1;
1648 cfg->line_outs++;
1649 }
1650 break;
1651 case 1:
1652 /* add line-in as surr and mic as clfe */
7b043899 1653 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 1654 cfg->line_out_pins[cfg->line_outs] =
1655 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1656 spec->line_switch = 1;
1657 cfg->line_outs++;
1658 }
7b043899 1659 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 1660 cfg->line_out_pins[cfg->line_outs] =
1661 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 1662 spec->mic_switch = 1;
1663 cfg->line_outs++;
1664 }
1665 break;
1666 }
1667
1668 return 0;
1669}
1670
7b043899
SL		 1671
1672static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
1673{
1674 int i;
1675
1676 for (i = 0; i < spec->multiout.num_dacs; i++) {
1677 if (spec->multiout.dac_nids[i] == nid)
1678 return 1;
1679 }
1680
1681 return 0;
1682}
1683
3cc08dc6 1684/*
7b043899
SL		 1685 * Fill in the dac_nids table from the parsed pin configuration
1686 * This function only works when every pin in line_out_pins[]
1687 * contains atleast one DAC in its connection list. Some 92xx
1688 * codecs are not connected directly to a DAC, such as the 9200
1689 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 1690 */
19039bd0 1691static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 1692 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 1693{
1694 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1695 int i, j, conn_len = 0;
1696 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
1697 unsigned int wcaps, wtype;
1698
c7d4b2fa
M		 1699 for (i = 0; i < cfg->line_outs; i++) {
1700 nid = cfg->line_out_pins[i];
7b043899
SL		 1701 conn_len = snd_hda_get_connections(codec, nid, conn,
1702 HDA_MAX_CONNECTIONS);
1703 for (j = 0; j < conn_len; j++) {
1704 wcaps = snd_hda_param_read(codec, conn[j],
1705 AC_PAR_AUDIO_WIDGET_CAP);
1706 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1707
1708 if (wtype != AC_WID_AUD_OUT ||
1709 (wcaps & AC_WCAP_DIGITAL))
1710 continue;
1711 /* conn[j] is a DAC routed to this line-out */
1712 if (!is_in_dac_nids(spec, conn[j]))
1713 break;
1714 }
1715
1716 if (j == conn_len) {
df802952
TI		 1717 if (spec->multiout.num_dacs > 0) {
1718 /* we have already working output pins,
1719 * so let's drop the broken ones again
1720 */
1721 cfg->line_outs = spec->multiout.num_dacs;
1722 break;
1723 }
7b043899
SL		 1724 /* error out, no available DAC found */
1725 snd_printk(KERN_ERR
1726 "%s: No available DAC for pin 0x%x\n",
1727 __func__, nid);
1728 return -ENODEV;
1729 }
1730
1731 spec->multiout.dac_nids[i] = conn[j];
1732 spec->multiout.num_dacs++;
1733 if (conn_len > 1) {
1734 /* select this DAC in the pin's input mux */
82beb8fd
TI		 1735 snd_hda_codec_write_cache(codec, nid, 0,
1736 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 1737
7b043899
SL		 1738 }
1739 }
c7d4b2fa 1740
7b043899
SL		 1741 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
1742 spec->multiout.num_dacs,
1743 spec->multiout.dac_nids[0],
1744 spec->multiout.dac_nids[1],
1745 spec->multiout.dac_nids[2],
1746 spec->multiout.dac_nids[3],
1747 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 1748 return 0;
1749}
1750
eb06ed8f
TI		 1751/* create volume control/switch for the given prefx type */
1752static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
1753{
1754 char name[32];
1755 int err;
1756
1757 sprintf(name, "%s Playback Volume", pfx);
1758 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
1759 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1760 if (err < 0)
1761 return err;
1762 sprintf(name, "%s Playback Switch", pfx);
1763 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
1764 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1765 if (err < 0)
1766 return err;
1767 return 0;
1768}
1769
c7d4b2fa 1770/* add playback controls from the parsed DAC table */
0fb87bb4 1771static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 1772 const struct auto_pin_cfg *cfg)
c7d4b2fa 1773{
19039bd0
TI		 1774 static const char *chname[4] = {
1775 "Front", "Surround", NULL /*CLFE*/, "Side"
1776 };
c7d4b2fa
M		 1777 hda_nid_t nid;
1778 int i, err;
1779
0fb87bb4
ML		 1780 struct sigmatel_spec *spec = codec->spec;
1781 unsigned int wid_caps;
1782
1783
c7d4b2fa 1784 for (i = 0; i < cfg->line_outs; i++) {
403d1944 1785 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 1786 continue;
1787
1788 nid = spec->multiout.dac_nids[i];
1789
1790 if (i == 2) {
1791 /* Center/LFE */
eb06ed8f
TI		 1792 err = create_controls(spec, "Center", nid, 1);
1793 if (err < 0)
c7d4b2fa 1794 return err;
eb06ed8f
TI		 1795 err = create_controls(spec, "LFE", nid, 2);
1796 if (err < 0)
c7d4b2fa 1797 return err;
0fb87bb4
ML		 1798
1799 wid_caps = get_wcaps(codec, nid);
1800
1801 if (wid_caps & AC_WCAP_LR_SWAP) {
1802 err = stac92xx_add_control(spec,
1803 STAC_CTL_WIDGET_CLFE_SWITCH,
1804 "Swap Center/LFE Playback Switch", nid);
1805
1806 if (err < 0)
1807 return err;
1808 }
1809
c7d4b2fa 1810 } else {
eb06ed8f
TI		 1811 err = create_controls(spec, chname[i], nid, 3);
1812 if (err < 0)
c7d4b2fa
M		 1813 return err;
1814 }
1815 }
1816
403d1944
MP		 1817 if (spec->line_switch)
1818 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
1819 return err;
1820
1821 if (spec->mic_switch)
1822 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
1823 return err;
1824
c7d4b2fa
M		 1825 return 0;
1826}
1827
eb06ed8f 1828static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 1829{
7b043899
SL		 1830 if (is_in_dac_nids(spec, nid))
1831 return 1;
eb06ed8f
TI		 1832 if (spec->multiout.hp_nid == nid)
1833 return 1;
1834 return 0;
1835}
c7d4b2fa 1836
eb06ed8f
TI		 1837static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
1838{
1839 if (!spec->multiout.hp_nid)
1840 spec->multiout.hp_nid = nid;
1841 else if (spec->multiout.num_dacs > 4) {
1842 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
1843 return 1;
1844 } else {
1845 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
1846 spec->multiout.num_dacs++;
1847 }
1848 return 0;
1849}
4e55096e 1850
eb06ed8f
TI		 1851/* add playback controls for Speaker and HP outputs */
1852static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
1853 struct auto_pin_cfg *cfg)
1854{
1855 struct sigmatel_spec *spec = codec->spec;
1856 hda_nid_t nid;
1857 int i, old_num_dacs, err;
1858
1859 old_num_dacs = spec->multiout.num_dacs;
1860 for (i = 0; i < cfg->hp_outs; i++) {
1861 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
1862 if (wid_caps & AC_WCAP_UNSOL_CAP)
1863 spec->hp_detect = 1;
1864 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
1865 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1866 if (check_in_dac_nids(spec, nid))
1867 nid = 0;
1868 if (! nid)
c7d4b2fa 1869 continue;
eb06ed8f
TI		 1870 add_spec_dacs(spec, nid);
1871 }
1872 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 1873 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 1874 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1875 if (check_in_dac_nids(spec, nid))
1876 nid = 0;
eb06ed8f
TI		 1877 if (! nid)
1878 continue;
1879 add_spec_dacs(spec, nid);
c7d4b2fa 1880 }
1b290a51
MR		 1881 for (i = 0; i < cfg->line_outs; i++) {
1882 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
1883 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1884 if (check_in_dac_nids(spec, nid))
1885 nid = 0;
1886 if (! nid)
1887 continue;
1888 add_spec_dacs(spec, nid);
1889 }
eb06ed8f
TI		 1890 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
1891 static const char *pfxs[] = {
1892 "Speaker", "External Speaker", "Speaker2",
1893 };
1894 err = create_controls(spec, pfxs[i - old_num_dacs],
1895 spec->multiout.dac_nids[i], 3);
1896 if (err < 0)
1897 return err;
1898 }
1899 if (spec->multiout.hp_nid) {
1900 const char *pfx;
1901 if (old_num_dacs == spec->multiout.num_dacs)
1902 pfx = "Master";
1903 else
1904 pfx = "Headphone";
1905 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
1906 if (err < 0)
1907 return err;
1908 }
c7d4b2fa
M		 1909
1910 return 0;
1911}
1912
8b65727b 1913/* labels for dmic mux inputs */
ddc2cec4 1914static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 1915 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
1916 "Digital Mic 3", "Digital Mic 4"
1917};
1918
1919/* create playback/capture controls for input pins on dmic capable codecs */
1920static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
1921 const struct auto_pin_cfg *cfg)
1922{
1923 struct sigmatel_spec *spec = codec->spec;
1924 struct hda_input_mux *dimux = &spec->private_dimux;
1925 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1926 int i, j;
1927
1928 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
1929 dimux->items[dimux->num_items].index = 0;
1930 dimux->num_items++;
1931
1932 for (i = 0; i < spec->num_dmics; i++) {
1933 int index;
1934 int num_cons;
1935 unsigned int def_conf;
1936
1937 def_conf = snd_hda_codec_read(codec,
1938 spec->dmic_nids[i],
1939 0,
1940 AC_VERB_GET_CONFIG_DEFAULT,
1941 0);
1942 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
1943 continue;
1944
1945 num_cons = snd_hda_get_connections(codec,
1946 spec->dmux_nid,
1947 con_lst,
1948 HDA_MAX_NUM_INPUTS);
1949 for (j = 0; j < num_cons; j++)
1950 if (con_lst[j] == spec->dmic_nids[i]) {
1951 index = j;
1952 goto found;
1953 }
1954 continue;
1955found:
1956 dimux->items[dimux->num_items].label =
1957 stac92xx_dmic_labels[dimux->num_items];
1958 dimux->items[dimux->num_items].index = index;
1959 dimux->num_items++;
1960 }
1961
1962 return 0;
1963}
1964
c7d4b2fa
M		 1965/* create playback/capture controls for input pins */
1966static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
1967{
1968 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 1969 struct hda_input_mux *imux = &spec->private_imux;
1970 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1971 int i, j, k;
1972
1973 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 1974 int index;
1975
1976 if (!cfg->input_pins[i])
1977 continue;
1978 index = -1;
1979 for (j = 0; j < spec->num_muxes; j++) {
1980 int num_cons;
1981 num_cons = snd_hda_get_connections(codec,
1982 spec->mux_nids[j],
1983 con_lst,
1984 HDA_MAX_NUM_INPUTS);
1985 for (k = 0; k < num_cons; k++)
1986 if (con_lst[k] == cfg->input_pins[i]) {
1987 index = k;
1988 goto found;
1989 }
c7d4b2fa 1990 }
314634bc
TI		 1991 continue;
1992 found:
1993 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
1994 imux->items[imux->num_items].index = index;
1995 imux->num_items++;
c7d4b2fa
M		 1996 }
1997
7b043899 1998 if (imux->num_items) {
62fe78e9
SR		 1999 /*
2000 * Set the current input for the muxes.
2001 * The STAC9221 has two input muxes with identical source
2002 * NID lists. Hopefully this won't get confused.
2003 */
2004 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2005 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2006 AC_VERB_SET_CONNECT_SEL,
2007 imux->items[0].index);
62fe78e9
SR		 2008 }
2009 }
2010
c7d4b2fa
M		 2011 return 0;
2012}
2013
c7d4b2fa
M		 2014static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2015{
2016 struct sigmatel_spec *spec = codec->spec;
2017 int i;
2018
2019 for (i = 0; i < spec->autocfg.line_outs; i++) {
2020 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2021 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2022 }
2023}
2024
2025static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2026{
2027 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2028 int i;
c7d4b2fa 2029
eb06ed8f
TI		 2030 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2031 hda_nid_t pin;
2032 pin = spec->autocfg.hp_pins[i];
2033 if (pin) /* connect to front */
2034 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2035 }
2036 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2037 hda_nid_t pin;
2038 pin = spec->autocfg.speaker_pins[i];
2039 if (pin) /* connect to front */
2040 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2041 }
c7d4b2fa
M		 2042}
2043
3cc08dc6 2044static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2045{
2046 struct sigmatel_spec *spec = codec->spec;
2047 int err;
2048
8b65727b
MP		 2049 if ((err = snd_hda_parse_pin_def_config(codec,
2050 &spec->autocfg,
2051 spec->dmic_nids)) < 0)
c7d4b2fa 2052 return err;
82bc955f 2053 if (! spec->autocfg.line_outs)
869264c4 2054 return 0; /* can't find valid pin config */
19039bd0 2055
403d1944
MP		 2056 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2057 return err;
19039bd0
TI		 2058 if (spec->multiout.num_dacs == 0)
2059 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2060 return err;
c7d4b2fa 2061
0fb87bb4
ML		 2062 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2063
2064 if (err < 0)
2065 return err;
2066
2067 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2068
2069 if (err < 0)
2070 return err;
2071
2072 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2073
2074 if (err < 0)
c7d4b2fa
M		 2075 return err;
2076
8b65727b
MP		 2077 if (spec->num_dmics > 0)
2078 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2079 &spec->autocfg)) < 0)
2080 return err;
2081
c7d4b2fa 2082 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2083 if (spec->multiout.max_channels > 2)
c7d4b2fa 2084 spec->surr_switch = 1;
c7d4b2fa 2085
82bc955f 2086 if (spec->autocfg.dig_out_pin)
3cc08dc6 2087 spec->multiout.dig_out_nid = dig_out;
82bc955f 2088 if (spec->autocfg.dig_in_pin)
3cc08dc6 2089 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2090
2091 if (spec->kctl_alloc)
2092 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2093
2094 spec->input_mux = &spec->private_imux;
8b65727b 2095 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2096
2097 return 1;
2098}
2099
82bc955f
TI		 2100/* add playback controls for HP output */
2101static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2102 struct auto_pin_cfg *cfg)
2103{
2104 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2105 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2106 unsigned int wid_caps;
2107
2108 if (! pin)
2109 return 0;
2110
2111 wid_caps = get_wcaps(codec, pin);
505cb341 2112 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2113 spec->hp_detect = 1;
82bc955f
TI		 2114
2115 return 0;
2116}
2117
160ea0dc
RF		 2118/* add playback controls for LFE output */
2119static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2120 struct auto_pin_cfg *cfg)
2121{
2122 struct sigmatel_spec *spec = codec->spec;
2123 int err;
2124 hda_nid_t lfe_pin = 0x0;
2125 int i;
2126
2127 /*
2128 * search speaker outs and line outs for a mono speaker pin
2129 * with an amp. If one is found, add LFE controls
2130 * for it.
2131 */
2132 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2133 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2134 unsigned long wcaps = get_wcaps(codec, pin);
2135 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2136 if (wcaps == AC_WCAP_OUT_AMP)
2137 /* found a mono speaker with an amp, must be lfe */
2138 lfe_pin = pin;
2139 }
2140
2141 /* if speaker_outs is 0, then speakers may be in line_outs */
2142 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2143 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2144 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2145 unsigned long cfg;
2146 cfg = snd_hda_codec_read(codec, pin, 0,
2147 AC_VERB_GET_CONFIG_DEFAULT,
2148 0x00);
2149 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2150 unsigned long wcaps = get_wcaps(codec, pin);
2151 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2152 if (wcaps == AC_WCAP_OUT_AMP)
2153 /* found a mono speaker with an amp,
2154 must be lfe */
2155 lfe_pin = pin;
2156 }
2157 }
2158 }
2159
2160 if (lfe_pin) {
eb06ed8f 2161 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2162 if (err < 0)
2163 return err;
2164 }
2165
2166 return 0;
2167}
2168
c7d4b2fa
M		 2169static int stac9200_parse_auto_config(struct hda_codec *codec)
2170{
2171 struct sigmatel_spec *spec = codec->spec;
2172 int err;
2173
df694daa 2174 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2175 return err;
2176
2177 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2178 return err;
2179
82bc955f
TI		 2180 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2181 return err;
2182
160ea0dc
RF		 2183 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2184 return err;
2185
82bc955f 2186 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2187 spec->multiout.dig_out_nid = 0x05;
82bc955f 2188 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2189 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2190
2191 if (spec->kctl_alloc)
2192 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2193
2194 spec->input_mux = &spec->private_imux;
8b65727b 2195 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2196
2197 return 1;
2198}
2199
62fe78e9
SR		 2200/*
2201 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2202 * funky external mute control using GPIO pins.
2203 */
2204
2205static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
2206{
2207 unsigned int gpiostate, gpiomask, gpiodir;
2208
2209 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2210 AC_VERB_GET_GPIO_DATA, 0);
2211
2212 if (!muted)
2213 gpiostate |= (1 << pin);
2214 else
2215 gpiostate &= ~(1 << pin);
2216
2217 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2218 AC_VERB_GET_GPIO_MASK, 0);
2219 gpiomask |= (1 << pin);
2220
2221 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2222 AC_VERB_GET_GPIO_DIRECTION, 0);
2223 gpiodir |= (1 << pin);
2224
2225 /* AppleHDA seems to do this -- WTF is this verb?? */
2226 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2227
2228 snd_hda_codec_write(codec, codec->afg, 0,
2229 AC_VERB_SET_GPIO_MASK, gpiomask);
2230 snd_hda_codec_write(codec, codec->afg, 0,
2231 AC_VERB_SET_GPIO_DIRECTION, gpiodir);
2232
2233 msleep(1);
2234
2235 snd_hda_codec_write(codec, codec->afg, 0,
2236 AC_VERB_SET_GPIO_DATA, gpiostate);
2237}
2238
314634bc
TI		 2239static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2240 unsigned int event)
2241{
2242 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2243 snd_hda_codec_write_cache(codec, nid, 0,
2244 AC_VERB_SET_UNSOLICITED_ENABLE,
2245 (AC_USRSP_EN | event));
314634bc
TI		 2246}
2247
c7d4b2fa
M		 2248static int stac92xx_init(struct hda_codec *codec)
2249{
2250 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2251 struct auto_pin_cfg *cfg = &spec->autocfg;
2252 int i;
c7d4b2fa 2253
c7d4b2fa
M		 2254 snd_hda_sequence_write(codec, spec->init);
2255
82bc955f
TI		 2256 /* set up pins */
2257 if (spec->hp_detect) {
505cb341 2258 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2259 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2260 enable_pin_detect(codec, cfg->hp_pins[i],
2261 STAC_HP_EVENT);
0a07acaf
TI		 2262 /* force to enable the first line-out; the others are set up
2263 * in unsol_event
2264 */
2265 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2266 AC_PINCTL_OUT_EN);
eb995a8c 2267 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2268 /* fake event to set up pins */
2269 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2270 } else {
2271 stac92xx_auto_init_multi_out(codec);
2272 stac92xx_auto_init_hp_out(codec);
2273 }
2274 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2275 hda_nid_t nid = cfg->input_pins[i];
2276 if (nid) {
2277 unsigned int pinctl = AC_PINCTL_IN_EN;
2278 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2279 pinctl |= stac92xx_get_vref(codec, nid);
2280 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2281 }
82bc955f 2282 }
8b65727b
MP		 2283 if (spec->num_dmics > 0)
2284 for (i = 0; i < spec->num_dmics; i++)
2285 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2286 AC_PINCTL_IN_EN);
2287
82bc955f
TI		 2288 if (cfg->dig_out_pin)
2289 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2290 AC_PINCTL_OUT_EN);
2291 if (cfg->dig_in_pin)
2292 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2293 AC_PINCTL_IN_EN);
2294
62fe78e9
SR		 2295 if (spec->gpio_mute) {
2296 stac922x_gpio_mute(codec, 0, 0);
2297 stac922x_gpio_mute(codec, 1, 0);
2298 }
2299
c7d4b2fa
M		 2300 return 0;
2301}
2302
2f2f4251
M		 2303static void stac92xx_free(struct hda_codec *codec)
2304{
c7d4b2fa
M		 2305 struct sigmatel_spec *spec = codec->spec;
2306 int i;
2307
2308 if (! spec)
2309 return;
2310
2311 if (spec->kctl_alloc) {
2312 for (i = 0; i < spec->num_kctl_used; i++)
2313 kfree(spec->kctl_alloc[i].name);
2314 kfree(spec->kctl_alloc);
2315 }
2316
11b44bbd
RF		 2317 if (spec->bios_pin_configs)
2318 kfree(spec->bios_pin_configs);
2319
c7d4b2fa 2320 kfree(spec);
2f2f4251
M		 2321}
2322
4e55096e
M		 2323static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2324 unsigned int flag)
2325{
2326 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2327 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2328
f9acba43
TI		 2329 if (pin_ctl & AC_PINCTL_IN_EN) {
2330 /*
2331 * we need to check the current set-up direction of
2332 * shared input pins since they can be switched via
2333 * "xxx as Output" mixer switch
2334 */
2335 struct sigmatel_spec *spec = codec->spec;
2336 struct auto_pin_cfg *cfg = &spec->autocfg;
2337 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2338 spec->line_switch) ||
2339 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2340 spec->mic_switch))
2341 return;
2342 }
2343
7b043899
SL		 2344 /* if setting pin direction bits, clear the current
2345 direction bits first */
2346 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2347 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2348
82beb8fd 2349 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2350 AC_VERB_SET_PIN_WIDGET_CONTROL,
2351 pin_ctl | flag);
2352}
2353
2354static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2355 unsigned int flag)
2356{
2357 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2358 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 2359 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2360 AC_VERB_SET_PIN_WIDGET_CONTROL,
2361 pin_ctl & ~flag);
2362}
2363
314634bc
TI		 2364static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
2365{
2366 if (!nid)
2367 return 0;
2368 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
2369 & (1 << 31))
2370 return 1;
2371 return 0;
2372}
2373
2374static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 2375{
2376 struct sigmatel_spec *spec = codec->spec;
2377 struct auto_pin_cfg *cfg = &spec->autocfg;
2378 int i, presence;
2379
eb06ed8f
TI		 2380 presence = 0;
2381 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 2382 presence = get_pin_presence(codec, cfg->hp_pins[i]);
2383 if (presence)
2384 break;
eb06ed8f 2385 }
4e55096e
M		 2386
2387 if (presence) {
2388 /* disable lineouts, enable hp */
2389 for (i = 0; i < cfg->line_outs; i++)
2390 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
2391 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2392 for (i = 0; i < cfg->speaker_outs; i++)
2393 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
2394 AC_PINCTL_OUT_EN);
4e55096e
M		 2395 } else {
2396 /* enable lineouts, disable hp */
2397 for (i = 0; i < cfg->line_outs; i++)
2398 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
2399 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2400 for (i = 0; i < cfg->speaker_outs; i++)
2401 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
2402 AC_PINCTL_OUT_EN);
4e55096e
M		 2403 }
2404}
2405
314634bc
TI		 2406static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
2407{
2408 switch (res >> 26) {
2409 case STAC_HP_EVENT:
2410 stac92xx_hp_detect(codec, res);
2411 break;
2412 }
2413}
2414
cb53c626 2415#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2416static int stac92xx_resume(struct hda_codec *codec)
2417{
dc81bed1
TI		 2418 struct sigmatel_spec *spec = codec->spec;
2419
11b44bbd 2420 stac92xx_set_config_regs(codec);
dc81bed1
TI		 2421 snd_hda_sequence_write(codec, spec->init);
2422 if (spec->gpio_mute) {
2423 stac922x_gpio_mute(codec, 0, 0);
2424 stac922x_gpio_mute(codec, 1, 0);
2425 }
82beb8fd
TI		 2426 snd_hda_codec_resume_amp(codec);
2427 snd_hda_codec_resume_cache(codec);
dc81bed1
TI		 2428 /* invoke unsolicited event to reset the HP state */
2429 if (spec->hp_detect)
2430 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 2431 return 0;
2432}
2433#endif
2434
2f2f4251
M		 2435static struct hda_codec_ops stac92xx_patch_ops = {
2436 .build_controls = stac92xx_build_controls,
2437 .build_pcms = stac92xx_build_pcms,
2438 .init = stac92xx_init,
2439 .free = stac92xx_free,
4e55096e 2440 .unsol_event = stac92xx_unsol_event,
cb53c626 2441#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2442 .resume = stac92xx_resume,
2443#endif
2f2f4251
M		 2444};
2445
2446static int patch_stac9200(struct hda_codec *codec)
2447{
2448 struct sigmatel_spec *spec;
c7d4b2fa 2449 int err;
2f2f4251 2450
e560d8d8 2451 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2452 if (spec == NULL)
2453 return -ENOMEM;
2454
2455 codec->spec = spec;
a4eed138 2456 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 2457 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 2458 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
2459 stac9200_models,
2460 stac9200_cfg_tbl);
11b44bbd
RF		 2461 if (spec->board_config < 0) {
2462 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
2463 err = stac92xx_save_bios_config_regs(codec);
2464 if (err < 0) {
2465 stac92xx_free(codec);
2466 return err;
2467 }
2468 spec->pin_configs = spec->bios_pin_configs;
2469 } else {
403d1944
MP		 2470 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
2471 stac92xx_set_config_regs(codec);
2472 }
2f2f4251
M		 2473
2474 spec->multiout.max_channels = 2;
2475 spec->multiout.num_dacs = 1;
2476 spec->multiout.dac_nids = stac9200_dac_nids;
2477 spec->adc_nids = stac9200_adc_nids;
2478 spec->mux_nids = stac9200_mux_nids;
dabbed6f 2479 spec->num_muxes = 1;
8b65727b 2480 spec->num_dmics = 0;
c7d4b2fa
M		 2481
2482 spec->init = stac9200_core_init;
2f2f4251 2483 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 2484
2485 err = stac9200_parse_auto_config(codec);
2486 if (err < 0) {
2487 stac92xx_free(codec);
2488 return err;
2489 }
2f2f4251
M		 2490
2491 codec->patch_ops = stac92xx_patch_ops;
2492
2493 return 0;
2494}
2495
8e21c34c
TD		 2496static int patch_stac925x(struct hda_codec *codec)
2497{
2498 struct sigmatel_spec *spec;
2499 int err;
2500
2501 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2502 if (spec == NULL)
2503 return -ENOMEM;
2504
2505 codec->spec = spec;
a4eed138 2506 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 2507 spec->pin_nids = stac925x_pin_nids;
2508 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
2509 stac925x_models,
2510 stac925x_cfg_tbl);
9e507abd 2511 again:
8e21c34c 2512 if (spec->board_config < 0) {
2c11f955
TD		 2513 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2514 "using BIOS defaults\n");
8e21c34c
TD		 2515 err = stac92xx_save_bios_config_regs(codec);
2516 if (err < 0) {
2517 stac92xx_free(codec);
2518 return err;
2519 }
2520 spec->pin_configs = spec->bios_pin_configs;
2521 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
2522 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
2523 stac92xx_set_config_regs(codec);
2524 }
2525
2526 spec->multiout.max_channels = 2;
2527 spec->multiout.num_dacs = 1;
2528 spec->multiout.dac_nids = stac925x_dac_nids;
2529 spec->adc_nids = stac925x_adc_nids;
2530 spec->mux_nids = stac925x_mux_nids;
2531 spec->num_muxes = 1;
2c11f955
TD		 2532 switch (codec->vendor_id) {
2533 case 0x83847632: /* STAC9202 */
2534 case 0x83847633: /* STAC9202D */
2535 case 0x83847636: /* STAC9251 */
2536 case 0x83847637: /* STAC9251D */
2537 spec->num_dmics = 1;
2538 spec->dmic_nids = stac925x_dmic_nids;
2539 break;
2540 default:
2541 spec->num_dmics = 0;
2542 break;
2543 }
8e21c34c
TD		 2544
2545 spec->init = stac925x_core_init;
2546 spec->mixer = stac925x_mixer;
2547
2548 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 2549 if (!err) {
2550 if (spec->board_config < 0) {
2551 printk(KERN_WARNING "hda_codec: No auto-config is "
2552 "available, default to model=ref\n");
2553 spec->board_config = STAC_925x_REF;
2554 goto again;
2555 }
2556 err = -EINVAL;
2557 }
8e21c34c
TD		 2558 if (err < 0) {
2559 stac92xx_free(codec);
2560 return err;
2561 }
2562
2563 codec->patch_ops = stac92xx_patch_ops;
2564
2565 return 0;
2566}
2567
2f2f4251
M		 2568static int patch_stac922x(struct hda_codec *codec)
2569{
2570 struct sigmatel_spec *spec;
c7d4b2fa 2571 int err;
2f2f4251 2572
e560d8d8 2573 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2574 if (spec == NULL)
2575 return -ENOMEM;
2576
2577 codec->spec = spec;
a4eed138 2578 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 2579 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 2580 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
2581 stac922x_models,
2582 stac922x_cfg_tbl);
5d5d3bc3 2583 if (spec->board_config == STAC_INTEL_MAC_V3) {
3fc24d85
TI		 2584 spec->gpio_mute = 1;
2585 /* Intel Macs have all same PCI SSID, so we need to check
2586 * codec SSID to distinguish the exact models
2587 */
6f0778d8 2588 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 2589 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 2590
2591 case 0x106b0800:
2592 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 2593 break;
5d5d3bc3
IZ		 2594 case 0x106b0600:
2595 case 0x106b0700:
2596 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 2597 break;
5d5d3bc3
IZ		 2598 case 0x106b0e00:
2599 case 0x106b0f00:
2600 case 0x106b1600:
2601 case 0x106b1700:
2602 case 0x106b0200:
2603 case 0x106b1e00:
2604 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 2605 break;
5d5d3bc3
IZ		 2606 case 0x106b1a00:
2607 case 0x00000100:
2608 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 2609 break;
5d5d3bc3
IZ		 2610 case 0x106b0a00:
2611 case 0x106b2200:
2612 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 2613 break;
3fc24d85
TI		 2614 }
2615 }
2616
9e507abd 2617 again:
11b44bbd
RF		 2618 if (spec->board_config < 0) {
2619 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
2620 "using BIOS defaults\n");
2621 err = stac92xx_save_bios_config_regs(codec);
2622 if (err < 0) {
2623 stac92xx_free(codec);
2624 return err;
2625 }
2626 spec->pin_configs = spec->bios_pin_configs;
2627 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 2628 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
2629 stac92xx_set_config_regs(codec);
2630 }
2f2f4251 2631
c7d4b2fa
M		 2632 spec->adc_nids = stac922x_adc_nids;
2633 spec->mux_nids = stac922x_mux_nids;
2549413e 2634 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
8b65727b 2635 spec->num_dmics = 0;
c7d4b2fa
M		 2636
2637 spec->init = stac922x_core_init;
2f2f4251 2638 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 2639
2640 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 2641
3cc08dc6 2642 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 2643 if (!err) {
2644 if (spec->board_config < 0) {
2645 printk(KERN_WARNING "hda_codec: No auto-config is "
2646 "available, default to model=ref\n");
2647 spec->board_config = STAC_D945_REF;
2648 goto again;
2649 }
2650 err = -EINVAL;
2651 }
3cc08dc6
MP		 2652 if (err < 0) {
2653 stac92xx_free(codec);
2654 return err;
2655 }
2656
2657 codec->patch_ops = stac92xx_patch_ops;
2658
807a4636
TI		 2659 /* Fix Mux capture level; max to 2 */
2660 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
2661 (0 << AC_AMPCAP_OFFSET_SHIFT) |
2662 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
2663 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
2664 (0 << AC_AMPCAP_MUTE_SHIFT));
2665
3cc08dc6
MP		 2666 return 0;
2667}
2668
2669static int patch_stac927x(struct hda_codec *codec)
2670{
2671 struct sigmatel_spec *spec;
2672 int err;
2673
2674 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2675 if (spec == NULL)
2676 return -ENOMEM;
2677
2678 codec->spec = spec;
a4eed138 2679 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 2680 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 2681 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
2682 stac927x_models,
2683 stac927x_cfg_tbl);
9e507abd 2684 again:
11b44bbd 2685 if (spec->board_config < 0) {
3cc08dc6 2686 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n");
11b44bbd
RF		 2687 err = stac92xx_save_bios_config_regs(codec);
2688 if (err < 0) {
2689 stac92xx_free(codec);
2690 return err;
2691 }
2692 spec->pin_configs = spec->bios_pin_configs;
2693 } else if (stac927x_brd_tbl[spec->board_config] != NULL) {
3cc08dc6
MP		 2694 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
2695 stac92xx_set_config_regs(codec);
2696 }
2697
81d3dbde 2698 switch (spec->board_config) {
93ed1503 2699 case STAC_D965_3ST:
81d3dbde
TD		 2700 spec->adc_nids = stac927x_adc_nids;
2701 spec->mux_nids = stac927x_mux_nids;
2549413e 2702 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
8b65727b 2703 spec->num_dmics = 0;
93ed1503 2704 spec->init = d965_core_init;
81d3dbde
TD		 2705 spec->mixer = stac9227_mixer;
2706 break;
93ed1503
TD		 2707 case STAC_D965_5ST:
2708 spec->adc_nids = stac927x_adc_nids;
2709 spec->mux_nids = stac927x_mux_nids;
2549413e 2710 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
8b65727b 2711 spec->num_dmics = 0;
93ed1503 2712 spec->init = d965_core_init;
81d3dbde
TD		 2713 spec->mixer = stac9227_mixer;
2714 break;
2715 default:
2716 spec->adc_nids = stac927x_adc_nids;
2717 spec->mux_nids = stac927x_mux_nids;
2549413e 2718 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
8b65727b 2719 spec->num_dmics = 0;
81d3dbde
TD		 2720 spec->init = stac927x_core_init;
2721 spec->mixer = stac927x_mixer;
2722 }
3cc08dc6
MP		 2723
2724 spec->multiout.dac_nids = spec->dac_nids;
87d48363 2725 /* GPIO0 High = Enable EAPD */
8259980e
TI		 2726 spec->gpio_mask = spec->gpio_data = 0x00000001;
2727 stac92xx_enable_gpio_mask(codec);
92a22beb 2728
3cc08dc6 2729 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 2730 if (!err) {
2731 if (spec->board_config < 0) {
2732 printk(KERN_WARNING "hda_codec: No auto-config is "
2733 "available, default to model=ref\n");
2734 spec->board_config = STAC_D965_REF;
2735 goto again;
2736 }
2737 err = -EINVAL;
2738 }
c7d4b2fa
M		 2739 if (err < 0) {
2740 stac92xx_free(codec);
2741 return err;
2742 }
2f2f4251
M		 2743
2744 codec->patch_ops = stac92xx_patch_ops;
2745
2746 return 0;
2747}
2748
f3302a59
MP		 2749static int patch_stac9205(struct hda_codec *codec)
2750{
2751 struct sigmatel_spec *spec;
8259980e 2752 int err;
f3302a59
MP		 2753
2754 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2755 if (spec == NULL)
2756 return -ENOMEM;
2757
2758 codec->spec = spec;
a4eed138 2759 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 2760 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 2761 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
2762 stac9205_models,
2763 stac9205_cfg_tbl);
9e507abd 2764 again:
11b44bbd
RF		 2765 if (spec->board_config < 0) {
2766 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
2767 err = stac92xx_save_bios_config_regs(codec);
2768 if (err < 0) {
2769 stac92xx_free(codec);
2770 return err;
2771 }
2772 spec->pin_configs = spec->bios_pin_configs;
2773 } else {
f3302a59
MP		 2774 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
2775 stac92xx_set_config_regs(codec);
2776 }
2777
2778 spec->adc_nids = stac9205_adc_nids;
2779 spec->mux_nids = stac9205_mux_nids;
2549413e 2780 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 2781 spec->dmic_nids = stac9205_dmic_nids;
2549413e 2782 spec->num_dmics = ARRAY_SIZE(stac9205_dmic_nids);
8b65727b 2783 spec->dmux_nid = 0x1d;
f3302a59
MP		 2784
2785 spec->init = stac9205_core_init;
2786 spec->mixer = stac9205_mixer;
2787
2788 spec->multiout.dac_nids = spec->dac_nids;
87d48363 2789
ae0a8ed8
TD		 2790 switch (spec->board_config){
2791 case STAC_9205_M43xx:
2792 case STAC_9205_DELL_M43:
87d48363
MR		 2793 /* Enable SPDIF in/out */
2794 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
2795 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
2796
8259980e 2797 spec->gpio_mask = 0x00000007; /* GPIO0-2 */
87d48363
MR		 2798 /* GPIO0 High = EAPD, GPIO1 Low = DRM,
2799 * GPIO2 High = Headphone Mute
2800 */
8259980e 2801 spec->gpio_data = 0x00000005;
ae0a8ed8
TD		 2802 break;
2803 default:
2804 /* GPIO0 High = EAPD */
2805 spec->gpio_mask = spec->gpio_data = 0x00000001;
2806 break;
2807 }
33382403 2808
8259980e 2809 stac92xx_enable_gpio_mask(codec);
f3302a59 2810 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 2811 if (!err) {
2812 if (spec->board_config < 0) {
2813 printk(KERN_WARNING "hda_codec: No auto-config is "
2814 "available, default to model=ref\n");
2815 spec->board_config = STAC_9205_REF;
2816 goto again;
2817 }
2818 err = -EINVAL;
2819 }
f3302a59
MP		 2820 if (err < 0) {
2821 stac92xx_free(codec);
2822 return err;
2823 }
2824
2825 codec->patch_ops = stac92xx_patch_ops;
2826
2827 return 0;
2828}
2829
db064e50 2830/*
6d859065 2831 * STAC9872 hack
db064e50
TI		 2832 */
2833
99ccc560 2834/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 2835static hda_nid_t vaio_dacs[] = { 0x2 };
2836#define VAIO_HP_DAC 0x5
2837static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
2838static hda_nid_t vaio_mux_nids[] = { 0x15 };
2839
2840static struct hda_input_mux vaio_mux = {
2841 .num_items = 2,
2842 .items = {
d773781c 2843 /* { "HP", 0x0 }, */
1624cb9a
TI		 2844 { "Mic Jack", 0x1 },
2845 { "Internal Mic", 0x2 },
db064e50
TI		 2846 { "PCM", 0x3 },
2847 }
2848};
2849
2850static struct hda_verb vaio_init[] = {
2851 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 2852 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 2853 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2854 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2855 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2856 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2857 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 2858 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2859 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2860 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2861 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2862 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2863 {}
2864};
2865
6d859065
GM		 2866static struct hda_verb vaio_ar_init[] = {
2867 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
2868 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2869 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2870 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2871/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
2872 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2873 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 2874 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2875 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2876/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
2877 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2878 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2879 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2880 {}
2881};
2882
db064e50 2883/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 2884static struct hda_bind_ctls vaio_bind_master_vol = {
2885 .ops = &snd_hda_bind_vol,
2886 .values = {
2887 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2888 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2889 0
2890 },
2891};
db064e50
TI		 2892
2893/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 2894static struct hda_bind_ctls vaio_bind_master_sw = {
2895 .ops = &snd_hda_bind_sw,
2896 .values = {
2897 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2898 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2899 0,
2900 },
2901};
db064e50
TI		 2902
2903static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 2904 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2905 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 2906 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2907 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2908 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2909 {
2910 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2911 .name = "Capture Source",
2912 .count = 1,
2913 .info = stac92xx_mux_enum_info,
2914 .get = stac92xx_mux_enum_get,
2915 .put = stac92xx_mux_enum_put,
2916 },
2917 {}
2918};
2919
6d859065 2920static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 2921 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2922 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 2923 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2924 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2925 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2926 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
2927 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
2928 {
2929 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2930 .name = "Capture Source",
2931 .count = 1,
2932 .info = stac92xx_mux_enum_info,
2933 .get = stac92xx_mux_enum_get,
2934 .put = stac92xx_mux_enum_put,
2935 },
2936 {}
2937};
2938
2939static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 2940 .build_controls = stac92xx_build_controls,
2941 .build_pcms = stac92xx_build_pcms,
2942 .init = stac92xx_init,
2943 .free = stac92xx_free,
cb53c626 2944#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 2945 .resume = stac92xx_resume,
2946#endif
2947};
2948
72e7b0dd
TI		 2949static int stac9872_vaio_init(struct hda_codec *codec)
2950{
2951 int err;
2952
2953 err = stac92xx_init(codec);
2954 if (err < 0)
2955 return err;
2956 if (codec->patch_ops.unsol_event)
2957 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2958 return 0;
2959}
2960
2961static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
2962{
2963 if (get_pin_presence(codec, 0x0a)) {
2964 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
2965 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
2966 } else {
2967 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
2968 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
2969 }
2970}
2971
2972static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
2973{
2974 switch (res >> 26) {
2975 case STAC_HP_EVENT:
2976 stac9872_vaio_hp_detect(codec, res);
2977 break;
2978 }
2979}
2980
2981static struct hda_codec_ops stac9872_vaio_patch_ops = {
2982 .build_controls = stac92xx_build_controls,
2983 .build_pcms = stac92xx_build_pcms,
2984 .init = stac9872_vaio_init,
2985 .free = stac92xx_free,
2986 .unsol_event = stac9872_vaio_unsol_event,
2987#ifdef CONFIG_PM
2988 .resume = stac92xx_resume,
2989#endif
2990};
2991
6d859065
GM		 2992enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
2993 CXD9872RD_VAIO,
2994 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
2995 STAC9872AK_VAIO,
2996 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
2997 STAC9872K_VAIO,
2998 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 2999 CXD9872AKD_VAIO,
3000 STAC_9872_MODELS,
3001};
3002
3003static const char *stac9872_models[STAC_9872_MODELS] = {
3004 [CXD9872RD_VAIO] = "vaio",
3005 [CXD9872AKD_VAIO] = "vaio-ar",
3006};
3007
3008static struct snd_pci_quirk stac9872_cfg_tbl[] = {
3009 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
3010 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
3011 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 3012 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 3013 {}
3014};
3015
6d859065 3016static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 3017{
3018 struct sigmatel_spec *spec;
3019 int board_config;
3020
f5fcc13c
TI		 3021 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
3022 stac9872_models,
3023 stac9872_cfg_tbl);
db064e50
TI		 3024 if (board_config < 0)
3025 /* unknown config, let generic-parser do its job... */
3026 return snd_hda_parse_generic_codec(codec);
3027
3028 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3029 if (spec == NULL)
3030 return -ENOMEM;
3031
3032 codec->spec = spec;
3033 switch (board_config) {
6d859065
GM		 3034 case CXD9872RD_VAIO:
3035 case STAC9872AK_VAIO:
3036 case STAC9872K_VAIO:
db064e50
TI		 3037 spec->mixer = vaio_mixer;
3038 spec->init = vaio_init;
3039 spec->multiout.max_channels = 2;
3040 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3041 spec->multiout.dac_nids = vaio_dacs;
3042 spec->multiout.hp_nid = VAIO_HP_DAC;
3043 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3044 spec->adc_nids = vaio_adcs;
3045 spec->input_mux = &vaio_mux;
3046 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3047 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 3048 break;
6d859065
GM		 3049
3050 case CXD9872AKD_VAIO:
3051 spec->mixer = vaio_ar_mixer;
3052 spec->init = vaio_ar_init;
3053 spec->multiout.max_channels = 2;
3054 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3055 spec->multiout.dac_nids = vaio_dacs;
3056 spec->multiout.hp_nid = VAIO_HP_DAC;
3057 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3058 spec->adc_nids = vaio_adcs;
3059 spec->input_mux = &vaio_mux;
3060 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3061 codec->patch_ops = stac9872_patch_ops;
6d859065 3062 break;
db064e50
TI		 3063 }
3064
db064e50
TI		 3065 return 0;
3066}
3067
3068
2f2f4251
M		 3069/*
3070 * patch entries
3071 */
3072struct hda_codec_preset snd_hda_preset_sigmatel[] = {
3073 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
3074 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
3075 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
3076 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
3077 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
3078 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
3079 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 3080 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
3081 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
3082 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
3083 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
3084 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
3085 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 3086 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
3087 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
3088 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
3089 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
3090 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
3091 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
3092 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
3093 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
3094 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
3095 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 3096 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
3097 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
3098 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
3099 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
3100 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
3101 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 3102 /* The following does not take into account .id=0x83847661 when subsys =
3103 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
3104 * currently not fully supported.
3105 */
3106 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
3107 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
3108 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 3109 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
3110 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
3111 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
3112 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
3113 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
3114 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
3115 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
3116 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
2f2f4251
M		 3117 {} /* terminator */
3118};
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