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ALSA: Revert "ALSA: hda: removed unneeded hp_nid references"
[mirror_ubuntu-zesty-kernel.git] / sound / pci / hda / patch_sigmatel.c
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2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
4e55096e 38#define NUM_CONTROL_ALLOC 32
c39555d6
MR		 39
40#define STAC_VREF_EVENT 0x00
41#define STAC_INSERT_EVENT 0x10
a64135a2
MR		 42#define STAC_PWR_EVENT 0x20
43#define STAC_HP_EVENT 0x30
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
1194b5b7 58 STAC_9200_GATEWAY,
117f257d 59 STAC_9200_PANASONIC,
f5fcc13c
TI		 60 STAC_9200_MODELS
61};
62
63enum {
64 STAC_9205_REF,
dfe495d0 65 STAC_9205_DELL_M42,
ae0a8ed8
TD		 66 STAC_9205_DELL_M43,
67 STAC_9205_DELL_M44,
f5fcc13c
TI		 68 STAC_9205_MODELS
69};
70
e1f0d669
MR		 71enum {
72 STAC_92HD73XX_REF,
661cd8fb
TI		 73 STAC_DELL_M6_AMIC,
74 STAC_DELL_M6_DMIC,
75 STAC_DELL_M6_BOTH,
6b3ab21e 76 STAC_DELL_EQ,
e1f0d669
MR		 77 STAC_92HD73XX_MODELS
78};
79
d0513fc6
MR		 80enum {
81 STAC_92HD83XXX_REF,
82 STAC_92HD83XXX_MODELS
83};
84
e035b841
MR		 85enum {
86 STAC_92HD71BXX_REF,
a7662640
MR		 87 STAC_DELL_M4_1,
88 STAC_DELL_M4_2,
3a7abfd2 89 STAC_DELL_M4_3,
6a14f585 90 STAC_HP_M4,
e035b841
MR		 91 STAC_92HD71BXX_MODELS
92};
93
8e21c34c
TD		 94enum {
95 STAC_925x_REF,
96 STAC_M2_2,
97 STAC_MA6,
2c11f955 98 STAC_PA6,
8e21c34c
TD		 99 STAC_925x_MODELS
100};
101
f5fcc13c
TI		 102enum {
103 STAC_D945_REF,
104 STAC_D945GTP3,
105 STAC_D945GTP5,
5d5d3bc3
IZ		 106 STAC_INTEL_MAC_V1,
107 STAC_INTEL_MAC_V2,
108 STAC_INTEL_MAC_V3,
109 STAC_INTEL_MAC_V4,
110 STAC_INTEL_MAC_V5,
536319af
NB		 111 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
112 * is given, one of the above models will be
113 * chosen according to the subsystem id. */
dfe495d0 114 /* for backward compatibility */
f5fcc13c 115 STAC_MACMINI,
3fc24d85 116 STAC_MACBOOK,
6f0778d8
NB		 117 STAC_MACBOOK_PRO_V1,
118 STAC_MACBOOK_PRO_V2,
f16928fb 119 STAC_IMAC_INTEL,
0dae0f83 120 STAC_IMAC_INTEL_20,
8c650087 121 STAC_ECS_202,
dfe495d0
TI		 122 STAC_922X_DELL_D81,
123 STAC_922X_DELL_D82,
124 STAC_922X_DELL_M81,
125 STAC_922X_DELL_M82,
f5fcc13c
TI		 126 STAC_922X_MODELS
127};
128
129enum {
e28d8322 130 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 131 STAC_D965_REF,
132 STAC_D965_3ST,
133 STAC_D965_5ST,
4ff076e5 134 STAC_DELL_3ST,
8e9068b1 135 STAC_DELL_BIOS,
f5fcc13c
TI		 136 STAC_927X_MODELS
137};
403d1944 138
2f2f4251 139struct sigmatel_spec {
c8b6bf9b 140 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 141 unsigned int num_mixers;
142
403d1944 143 int board_config;
0253fdcd 144 unsigned int eapd_switch: 1;
c7d4b2fa 145 unsigned int surr_switch: 1;
403d1944
MP		 146 unsigned int line_switch: 1;
147 unsigned int mic_switch: 1;
3cc08dc6 148 unsigned int alt_switch: 1;
82bc955f 149 unsigned int hp_detect: 1;
00ef50c2 150 unsigned int spdif_mute: 1;
c7d4b2fa 151
4fe5195c 152 /* gpio lines */
0fc9dec4 153 unsigned int eapd_mask;
4fe5195c
MR		 154 unsigned int gpio_mask;
155 unsigned int gpio_dir;
156 unsigned int gpio_data;
157 unsigned int gpio_mute;
158
8daaaa97
MR		 159 /* stream */
160 unsigned int stream_delay;
161
4fe5195c 162 /* analog loopback */
e1f0d669
MR		 163 unsigned char aloopback_mask;
164 unsigned char aloopback_shift;
8259980e 165
a64135a2
MR		 166 /* power management */
167 unsigned int num_pwrs;
d0513fc6 168 unsigned int *pwr_mapping;
a64135a2 169 hda_nid_t *pwr_nids;
b76c850f 170 hda_nid_t *dac_list;
a64135a2 171
2f2f4251 172 /* playback */
b22b4821 173 struct hda_input_mux *mono_mux;
89385035 174 struct hda_input_mux *amp_mux;
b22b4821 175 unsigned int cur_mmux;
2f2f4251 176 struct hda_multi_out multiout;
3cc08dc6 177 hda_nid_t dac_nids[5];
2f2f4251
M		 178
179 /* capture */
180 hda_nid_t *adc_nids;
2f2f4251 181 unsigned int num_adcs;
dabbed6f
M		 182 hda_nid_t *mux_nids;
183 unsigned int num_muxes;
8b65727b
MP		 184 hda_nid_t *dmic_nids;
185 unsigned int num_dmics;
e1f0d669 186 hda_nid_t *dmux_nids;
1697055e 187 unsigned int num_dmuxes;
d9737751
MR		 188 hda_nid_t *smux_nids;
189 unsigned int num_smuxes;
65973632 190 const char **spdif_labels;
d9737751 191
dabbed6f 192 hda_nid_t dig_in_nid;
b22b4821 193 hda_nid_t mono_nid;
1cd2224c
MR		 194 hda_nid_t anabeep_nid;
195 hda_nid_t digbeep_nid;
2f2f4251 196
2f2f4251
M		 197 /* pin widgets */
198 hda_nid_t *pin_nids;
199 unsigned int num_pins;
2f2f4251 200 unsigned int *pin_configs;
11b44bbd 201 unsigned int *bios_pin_configs;
2f2f4251
M		 202
203 /* codec specific stuff */
204 struct hda_verb *init;
c8b6bf9b 205 struct snd_kcontrol_new *mixer;
2f2f4251
M		 206
207 /* capture source */
8b65727b 208 struct hda_input_mux *dinput_mux;
e1f0d669 209 unsigned int cur_dmux[2];
c7d4b2fa 210 struct hda_input_mux *input_mux;
3cc08dc6 211 unsigned int cur_mux[3];
d9737751
MR		 212 struct hda_input_mux *sinput_mux;
213 unsigned int cur_smux[2];
2a9c7816
MR		 214 unsigned int cur_amux;
215 hda_nid_t *amp_nids;
216 unsigned int num_amps;
8daaaa97 217 unsigned int powerdown_adcs;
2f2f4251 218
403d1944
MP		 219 /* i/o switches */
220 unsigned int io_switch[2];
0fb87bb4 221 unsigned int clfe_swap;
d7a89436 222 unsigned int hp_switch; /* NID of HP as line-out */
5f10c4a9 223 unsigned int aloopback;
2f2f4251 224
c7d4b2fa
M		 225 struct hda_pcm pcm_rec[2]; /* PCM information */
226
227 /* dynamic controls and input_mux */
228 struct auto_pin_cfg autocfg;
229 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 230 struct snd_kcontrol_new *kctl_alloc;
8b65727b 231 struct hda_input_mux private_dimux;
c7d4b2fa 232 struct hda_input_mux private_imux;
d9737751 233 struct hda_input_mux private_smux;
89385035 234 struct hda_input_mux private_amp_mux;
b22b4821 235 struct hda_input_mux private_mono_mux;
2f2f4251
M		 236};
237
238static hda_nid_t stac9200_adc_nids[1] = {
239 0x03,
240};
241
242static hda_nid_t stac9200_mux_nids[1] = {
243 0x0c,
244};
245
246static hda_nid_t stac9200_dac_nids[1] = {
247 0x02,
248};
249
a64135a2
MR		 250static hda_nid_t stac92hd73xx_pwr_nids[8] = {
251 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
252 0x0f, 0x10, 0x11
253};
254
0ffa9807
MR		 255static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
256 0x26, 0,
257};
258
e1f0d669
MR		 259static hda_nid_t stac92hd73xx_adc_nids[2] = {
260 0x1a, 0x1b
261};
262
2a9c7816
MR		 263#define DELL_M6_AMP 2
264static hda_nid_t stac92hd73xx_amp_nids[3] = {
265 0x0b, 0x0c, 0x0e
89385035
MR		 266};
267
e1f0d669
MR		 268#define STAC92HD73XX_NUM_DMICS 2
269static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
270 0x13, 0x14, 0
271};
272
273#define STAC92HD73_DAC_COUNT 5
274static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
275 0x15, 0x16, 0x17, 0x18, 0x19,
276};
277
278static hda_nid_t stac92hd73xx_mux_nids[4] = {
279 0x28, 0x29, 0x2a, 0x2b,
280};
281
282static hda_nid_t stac92hd73xx_dmux_nids[2] = {
283 0x20, 0x21,
284};
285
d9737751
MR		 286static hda_nid_t stac92hd73xx_smux_nids[2] = {
287 0x22, 0x23,
288};
289
d0513fc6
MR		 290#define STAC92HD83XXX_NUM_DMICS 2
291static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
292 0x11, 0x12, 0
293};
294
295#define STAC92HD81_DAC_COUNT 2
296#define STAC92HD83_DAC_COUNT 3
297static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
298 0x13, 0x14, 0x22,
299};
300
301static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
302 0x17, 0x18,
303};
304
305static hda_nid_t stac92hd83xxx_adc_nids[2] = {
306 0x15, 0x16,
307};
308
309static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
310 0xa, 0xb, 0xd, 0xe,
311};
312
0ffa9807
MR		 313static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
314 0x1e, 0,
315};
316
d0513fc6
MR		 317static unsigned int stac92hd83xxx_pwr_mapping[4] = {
318 0x03, 0x0c, 0x10, 0x40,
319};
320
a64135a2
MR		 321static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
322 0x0a, 0x0d, 0x0f
323};
324
e035b841
MR		 325static hda_nid_t stac92hd71bxx_adc_nids[2] = {
326 0x12, 0x13,
327};
328
329static hda_nid_t stac92hd71bxx_mux_nids[2] = {
330 0x1a, 0x1b
331};
332
4b33c767
MR		 333static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
334 0x1c, 0x1d,
e1f0d669
MR		 335};
336
d9737751
MR		 337static hda_nid_t stac92hd71bxx_smux_nids[2] = {
338 0x24, 0x25,
339};
340
aea7bb0a 341static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 342 0x10, /*0x11, */
343};
344
345#define STAC92HD71BXX_NUM_DMICS 2
346static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
347 0x18, 0x19, 0
348};
349
0ffa9807
MR		 350static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
351 0x22, 0
352};
353
8e21c34c
TD		 354static hda_nid_t stac925x_adc_nids[1] = {
355 0x03,
356};
357
358static hda_nid_t stac925x_mux_nids[1] = {
359 0x0f,
360};
361
362static hda_nid_t stac925x_dac_nids[1] = {
363 0x02,
364};
365
f6e9852a
TI		 366#define STAC925X_NUM_DMICS 1
367static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
368 0x15, 0
2c11f955
TD		 369};
370
1697055e
TI		 371static hda_nid_t stac925x_dmux_nids[1] = {
372 0x14,
373};
374
2f2f4251
M		 375static hda_nid_t stac922x_adc_nids[2] = {
376 0x06, 0x07,
377};
378
379static hda_nid_t stac922x_mux_nids[2] = {
380 0x12, 0x13,
381};
382
3cc08dc6
MP		 383static hda_nid_t stac927x_adc_nids[3] = {
384 0x07, 0x08, 0x09
385};
386
387static hda_nid_t stac927x_mux_nids[3] = {
388 0x15, 0x16, 0x17
389};
390
d9737751
MR		 391static hda_nid_t stac927x_smux_nids[1] = {
392 0x21,
393};
394
b76c850f
MR		 395static hda_nid_t stac927x_dac_nids[6] = {
396 0x02, 0x03, 0x04, 0x05, 0x06, 0
397};
398
e1f0d669
MR		 399static hda_nid_t stac927x_dmux_nids[1] = {
400 0x1b,
401};
402
7f16859a
MR		 403#define STAC927X_NUM_DMICS 2
404static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
405 0x13, 0x14, 0
406};
407
65973632
MR		 408static const char *stac927x_spdif_labels[5] = {
409 "Digital Playback", "ADAT", "Analog Mux 1",
410 "Analog Mux 2", "Analog Mux 3"
411};
412
f3302a59
MP		 413static hda_nid_t stac9205_adc_nids[2] = {
414 0x12, 0x13
415};
416
417static hda_nid_t stac9205_mux_nids[2] = {
418 0x19, 0x1a
419};
420
e1f0d669 421static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 422 0x1d,
e1f0d669
MR		 423};
424
d9737751
MR		 425static hda_nid_t stac9205_smux_nids[1] = {
426 0x21,
427};
428
f6e9852a
TI		 429#define STAC9205_NUM_DMICS 2
430static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
431 0x17, 0x18, 0
8b65727b
MP		 432};
433
c7d4b2fa 434static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 435 0x08, 0x09, 0x0d, 0x0e,
436 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 437};
438
8e21c34c
TD		 439static hda_nid_t stac925x_pin_nids[8] = {
440 0x07, 0x08, 0x0a, 0x0b,
441 0x0c, 0x0d, 0x10, 0x11,
442};
443
2f2f4251
M		 444static hda_nid_t stac922x_pin_nids[10] = {
445 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
446 0x0f, 0x10, 0x11, 0x15, 0x1b,
447};
448
a7662640 449static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 450 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
451 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 452 0x14, 0x22, 0x23
e1f0d669
MR		 453};
454
d0513fc6
MR		 455static hda_nid_t stac92hd83xxx_pin_nids[14] = {
456 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
457 0x0f, 0x10, 0x11, 0x12, 0x13,
458 0x1d, 0x1e, 0x1f, 0x20
459};
0ffa9807 460static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 461 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
462 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 463 0x1f,
e035b841
MR		 464};
465
3cc08dc6
MP		 466static hda_nid_t stac927x_pin_nids[14] = {
467 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
468 0x0f, 0x10, 0x11, 0x12, 0x13,
469 0x14, 0x21, 0x22, 0x23,
470};
471
f3302a59
MP		 472static hda_nid_t stac9205_pin_nids[12] = {
473 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
474 0x0f, 0x14, 0x16, 0x17, 0x18,
475 0x21, 0x22,
f3302a59
MP		 476};
477
89385035
MR		 478#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
479
480static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
481 struct snd_ctl_elem_value *ucontrol)
482{
483 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
484 struct sigmatel_spec *spec = codec->spec;
485 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
486
487 kcontrol->private_value ^= get_amp_nid(kcontrol);
488 kcontrol->private_value |= nid;
489
490 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
491}
492
493static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
494 struct snd_ctl_elem_value *ucontrol)
495{
496 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
497 struct sigmatel_spec *spec = codec->spec;
498 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
499
500 kcontrol->private_value ^= get_amp_nid(kcontrol);
501 kcontrol->private_value |= nid;
502
503 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
504}
505
8b65727b
MP		 506static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
507 struct snd_ctl_elem_info *uinfo)
508{
509 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
510 struct sigmatel_spec *spec = codec->spec;
511 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
512}
513
514static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
515 struct snd_ctl_elem_value *ucontrol)
516{
517 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
518 struct sigmatel_spec *spec = codec->spec;
e1f0d669 519 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 520
e1f0d669 521 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 522 return 0;
523}
524
525static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
526 struct snd_ctl_elem_value *ucontrol)
527{
528 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
529 struct sigmatel_spec *spec = codec->spec;
e1f0d669 530 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 531
532 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 533 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 534}
535
d9737751
MR		 536static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
537 struct snd_ctl_elem_info *uinfo)
538{
539 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
540 struct sigmatel_spec *spec = codec->spec;
541 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
542}
543
544static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
545 struct snd_ctl_elem_value *ucontrol)
546{
547 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
548 struct sigmatel_spec *spec = codec->spec;
549 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
550
551 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
552 return 0;
553}
554
555static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
556 struct snd_ctl_elem_value *ucontrol)
557{
558 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
559 struct sigmatel_spec *spec = codec->spec;
00ef50c2 560 struct hda_input_mux *smux = &spec->private_smux;
d9737751 561 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 562 int err, val;
563 hda_nid_t nid;
d9737751 564
00ef50c2 565 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 566 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 567 if (err < 0)
568 return err;
569
570 if (spec->spdif_mute) {
571 if (smux_idx == 0)
572 nid = spec->multiout.dig_out_nid;
573 else
574 nid = codec->slave_dig_outs[smux_idx - 1];
575 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
576 val = AMP_OUT_MUTE;
00ef50c2 577 else
c1e99bd9 578 val = AMP_OUT_UNMUTE;
00ef50c2
MR		 579 /* un/mute SPDIF out */
580 snd_hda_codec_write_cache(codec, nid, 0,
581 AC_VERB_SET_AMP_GAIN_MUTE, val);
582 }
583 return 0;
d9737751
MR		 584}
585
c8b6bf9b 586static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 587{
588 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
589 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 590 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 591}
592
c8b6bf9b 593static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 594{
595 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
596 struct sigmatel_spec *spec = codec->spec;
597 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
598
599 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
600 return 0;
601}
602
c8b6bf9b 603static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 604{
605 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
606 struct sigmatel_spec *spec = codec->spec;
607 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
608
c7d4b2fa 609 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 610 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
611}
612
b22b4821
MR		 613static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
614 struct snd_ctl_elem_info *uinfo)
615{
616 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
617 struct sigmatel_spec *spec = codec->spec;
618 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
619}
620
621static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
622 struct snd_ctl_elem_value *ucontrol)
623{
624 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
625 struct sigmatel_spec *spec = codec->spec;
626
627 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
628 return 0;
629}
630
631static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
632 struct snd_ctl_elem_value *ucontrol)
633{
634 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
635 struct sigmatel_spec *spec = codec->spec;
636
637 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
638 spec->mono_nid, &spec->cur_mmux);
639}
640
89385035
MR		 641static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
642 struct snd_ctl_elem_info *uinfo)
643{
644 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
645 struct sigmatel_spec *spec = codec->spec;
646 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
647}
648
649static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
650 struct snd_ctl_elem_value *ucontrol)
651{
652 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
653 struct sigmatel_spec *spec = codec->spec;
654
655 ucontrol->value.enumerated.item[0] = spec->cur_amux;
656 return 0;
657}
658
659static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
660 struct snd_ctl_elem_value *ucontrol)
661{
662 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
663 struct sigmatel_spec *spec = codec->spec;
664 struct snd_kcontrol *ctl =
665 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
666 if (!ctl)
667 return -EINVAL;
668
669 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
670 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
671
672 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
673 0, &spec->cur_amux);
674}
675
5f10c4a9
ML		 676#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
677
678static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
679 struct snd_ctl_elem_value *ucontrol)
680{
681 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 682 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 683 struct sigmatel_spec *spec = codec->spec;
684
e1f0d669
MR		 685 ucontrol->value.integer.value[0] = !!(spec->aloopback &
686 (spec->aloopback_mask << idx));
5f10c4a9
ML		 687 return 0;
688}
689
690static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
691 struct snd_ctl_elem_value *ucontrol)
692{
693 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
694 struct sigmatel_spec *spec = codec->spec;
e1f0d669 695 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 696 unsigned int dac_mode;
e1f0d669 697 unsigned int val, idx_val;
5f10c4a9 698
e1f0d669
MR		 699 idx_val = spec->aloopback_mask << idx;
700 if (ucontrol->value.integer.value[0])
701 val = spec->aloopback | idx_val;
702 else
703 val = spec->aloopback & ~idx_val;
68ea7b2f 704 if (spec->aloopback == val)
5f10c4a9
ML		 705 return 0;
706
68ea7b2f 707 spec->aloopback = val;
5f10c4a9 708
e1f0d669
MR		 709 /* Only return the bits defined by the shift value of the
710 * first two bytes of the mask
711 */
5f10c4a9 712 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 713 kcontrol->private_value & 0xFFFF, 0x0);
714 dac_mode >>= spec->aloopback_shift;
5f10c4a9 715
e1f0d669 716 if (spec->aloopback & idx_val) {
5f10c4a9 717 snd_hda_power_up(codec);
e1f0d669 718 dac_mode |= idx_val;
5f10c4a9
ML		 719 } else {
720 snd_hda_power_down(codec);
e1f0d669 721 dac_mode &= ~idx_val;
5f10c4a9
ML		 722 }
723
724 snd_hda_codec_write_cache(codec, codec->afg, 0,
725 kcontrol->private_value >> 16, dac_mode);
726
727 return 1;
728}
729
c7d4b2fa 730static struct hda_verb stac9200_core_init[] = {
2f2f4251 731 /* set dac0mux for dac converter */
c7d4b2fa 732 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 733 {}
734};
735
1194b5b7
TI		 736static struct hda_verb stac9200_eapd_init[] = {
737 /* set dac0mux for dac converter */
738 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
739 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
740 {}
741};
742
e1f0d669
MR		 743static struct hda_verb stac92hd73xx_6ch_core_init[] = {
744 /* set master volume and direct control */
745 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
746 /* setup audio connections */
747 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
748 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
749 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
750 /* setup adcs to point to mixer */
751 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
752 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 753 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
754 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
755 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
756 /* setup import muxs */
757 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
758 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
759 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
760 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
761 {}
762};
763
d654a660
MR		 764static struct hda_verb dell_eq_core_init[] = {
765 /* set master volume to max value without distortion
766 * and direct control */
767 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
768 /* setup audio connections */
769 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 770 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
771 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 772 /* setup adcs to point to mixer */
773 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
774 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
775 /* setup import muxs */
776 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
777 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
778 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
779 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
780 {}
781};
782
52fe0f9d 783static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 784 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d 785 /* setup audio connections */
7747ecce
MR		 786 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
787 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 788 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
789 /* setup adcs to point to mixer */
790 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
791 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
792 /* setup import muxs */
793 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
794 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
795 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
796 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
797 {}
798};
799
e1f0d669
MR		 800static struct hda_verb stac92hd73xx_8ch_core_init[] = {
801 /* set master volume and direct control */
802 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
803 /* setup audio connections */
804 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
805 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
806 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
807 /* connect hp ports to dac3 */
808 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
809 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
810 /* setup adcs to point to mixer */
811 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
812 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 813 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
814 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
815 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
816 /* setup import muxs */
817 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
818 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
819 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
820 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
821 {}
822};
823
824static struct hda_verb stac92hd73xx_10ch_core_init[] = {
825 /* set master volume and direct control */
826 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
827 /* setup audio connections */
828 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
829 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
830 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
831 /* dac3 is connected to import3 mux */
832 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
833 /* connect hp ports to dac4 */
834 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
835 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
836 /* setup adcs to point to mixer */
837 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
838 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 839 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
840 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
841 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
842 /* setup import muxs */
843 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
844 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
845 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
846 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
847 {}
848};
849
d0513fc6
MR		 850static struct hda_verb stac92hd83xxx_core_init[] = {
851 /* start of config #1 */
852 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
853
854 /* start of config #2 */
855 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
856 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
857 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
858
859 /* power state controls amps */
860 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
861};
862
e035b841 863static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 864 /* set master volume and direct control */
865 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
866 /* connect headphone jack to dac1 */
867 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
541eee87
MR		 868 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
869 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
870 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
871 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 872};
873
4b33c767 874#define HD_DISABLE_PORTF 2
541eee87 875static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 876 /* start of config #1 */
877
878 /* connect port 0f to audio mixer */
879 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 880 /* unmute right and left channels for node 0x0f */
881 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
882 /* start of config #2 */
883
e035b841
MR		 884 /* set master volume and direct control */
885 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
886 /* connect headphone jack to dac1 */
887 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 888 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 889 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
890 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 891 {}
892};
893
8e21c34c
TD		 894static struct hda_verb stac925x_core_init[] = {
895 /* set dac0mux for dac converter */
896 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
897 {}
898};
899
c7d4b2fa 900static struct hda_verb stac922x_core_init[] = {
2f2f4251 901 /* set master volume and direct control */
c7d4b2fa 902 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 903 {}
904};
905
93ed1503 906static struct hda_verb d965_core_init[] = {
19039bd0 907 /* set master volume and direct control */
93ed1503 908 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 909 /* unmute node 0x1b */
910 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
911 /* select node 0x03 as DAC */
912 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
913 {}
914};
915
3cc08dc6
MP		 916static struct hda_verb stac927x_core_init[] = {
917 /* set master volume and direct control */
918 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 919 /* enable analog pc beep path */
920 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 921 {}
922};
923
f3302a59
MP		 924static struct hda_verb stac9205_core_init[] = {
925 /* set master volume and direct control */
926 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 927 /* enable analog pc beep path */
928 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 929 {}
930};
931
b22b4821
MR		 932#define STAC_MONO_MUX \
933 { \
934 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
935 .name = "Mono Mux", \
936 .count = 1, \
937 .info = stac92xx_mono_mux_enum_info, \
938 .get = stac92xx_mono_mux_enum_get, \
939 .put = stac92xx_mono_mux_enum_put, \
940 }
941
89385035
MR		 942#define STAC_AMP_MUX \
943 { \
944 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
945 .name = "Amp Selector Capture Switch", \
946 .count = 1, \
947 .info = stac92xx_amp_mux_enum_info, \
948 .get = stac92xx_amp_mux_enum_get, \
949 .put = stac92xx_amp_mux_enum_put, \
950 }
951
952#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
953 { \
954 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
955 .name = xname, \
956 .index = 0, \
957 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
958 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
959 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
960 .info = stac92xx_amp_volume_info, \
961 .get = stac92xx_amp_volume_get, \
962 .put = stac92xx_amp_volume_put, \
963 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
964 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
965 }
966
9e05b7a3 967#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 968 { \
969 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
970 .name = "Input Source", \
9e05b7a3 971 .count = cnt, \
ca7c5a8b
ML		 972 .info = stac92xx_mux_enum_info, \
973 .get = stac92xx_mux_enum_get, \
974 .put = stac92xx_mux_enum_put, \
975 }
976
e1f0d669 977#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 978 { \
979 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
980 .name = "Analog Loopback", \
e1f0d669 981 .count = cnt, \
5f10c4a9
ML		 982 .info = stac92xx_aloopback_info, \
983 .get = stac92xx_aloopback_get, \
984 .put = stac92xx_aloopback_put, \
985 .private_value = verb_read | (verb_write << 16), \
986 }
987
c8b6bf9b 988static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 989 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
990 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 991 STAC_INPUT_SOURCE(1),
2f2f4251
M		 992 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
993 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 994 { } /* end */
995};
996
2a9c7816 997#define DELL_M6_MIXER 6
e1f0d669 998static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 999 /* start of config #1 */
e1f0d669
MR		 1000 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1001 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1002
e1f0d669
MR		 1003 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1004 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1005
2a9c7816
MR		 1006 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1007 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1008
1009 /* start of config #2 */
1010 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1011 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1012
e1f0d669
MR		 1013 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1014 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1015
2a9c7816
MR		 1016 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1017
1018 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1019 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1020
1021 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1022 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1023
e1f0d669
MR		 1024 { } /* end */
1025};
1026
1027static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1028 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1029
e1f0d669
MR		 1030 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1031 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1032
1033 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1034 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1035
1036 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1037 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1038
1039 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1040 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1041
1042 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1043 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1044
1045 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1046 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1047
1048 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1049 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1050 { } /* end */
1051};
1052
1053static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1054 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1055
e1f0d669
MR		 1056 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1057 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1058
1059 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1060 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1061
1062 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1063 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1064
1065 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1066 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1067
1068 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1069 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1070
1071 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1072 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1073
1074 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1075 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1076 { } /* end */
1077};
1078
d0513fc6
MR		 1079
1080static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1081 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1082 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1083
1084 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1085 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1086
1087 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1088 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1089
1090 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1091 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1092
1093 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1094 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1095
1096 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1097 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1098
1099 /*
1100 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1101 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1102 */
1103 { } /* end */
1104};
1105
541eee87 1106static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1107 STAC_INPUT_SOURCE(2),
4b33c767 1108 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1109
9b35947f
MR		 1110 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1111 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1112
1113 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1114 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1115 /* analog pc-beep replaced with digital beep support */
1116 /*
f7c5dda2
MR		 1117 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1118 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1119 */
f7c5dda2 1120
687cb98e
MR		 1121 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1122 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1123
687cb98e
MR		 1124 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1125 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1126
1127 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1128 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1129
1130 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1131 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1132 { } /* end */
1133};
1134
541eee87 1135static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1136 STAC_INPUT_SOURCE(2),
1137 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1138
541eee87
MR		 1139 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1140 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1141
1142 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1143 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1144 { } /* end */
1145};
1146
8e21c34c 1147static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1148 STAC_INPUT_SOURCE(1),
8e21c34c 1149 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1150 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1151 { } /* end */
1152};
1153
9e05b7a3 1154static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1155 STAC_INPUT_SOURCE(2),
e1f0d669 1156 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1157
1158 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1159 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1160
1161 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1162 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1163 { } /* end */
1164};
1165
19039bd0 1166/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1167static struct snd_kcontrol_new stac922x_mixer[] = {
1168 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1169 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1170 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1171
1172 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1173 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1174 { } /* end */
1175};
1176
9e05b7a3 1177
d1d985f0 1178static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1179 STAC_INPUT_SOURCE(3),
e1f0d669 1180 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1181
9e05b7a3
ML		 1182 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1183 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1184
1185 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1186 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1187
1188 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1189 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1190 { } /* end */
1191};
1192
1697055e
TI		 1193static struct snd_kcontrol_new stac_dmux_mixer = {
1194 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1195 .name = "Digital Input Source",
1196 /* count set later */
1197 .info = stac92xx_dmux_enum_info,
1198 .get = stac92xx_dmux_enum_get,
1199 .put = stac92xx_dmux_enum_put,
1200};
1201
d9737751
MR		 1202static struct snd_kcontrol_new stac_smux_mixer = {
1203 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1204 .name = "IEC958 Playback Source",
d9737751
MR		 1205 /* count set later */
1206 .info = stac92xx_smux_enum_info,
1207 .get = stac92xx_smux_enum_get,
1208 .put = stac92xx_smux_enum_put,
1209};
1210
2134ea4f
TI		 1211static const char *slave_vols[] = {
1212 "Front Playback Volume",
1213 "Surround Playback Volume",
1214 "Center Playback Volume",
1215 "LFE Playback Volume",
1216 "Side Playback Volume",
1217 "Headphone Playback Volume",
1218 "Headphone Playback Volume",
1219 "Speaker Playback Volume",
1220 "External Speaker Playback Volume",
1221 "Speaker2 Playback Volume",
1222 NULL
1223};
1224
1225static const char *slave_sws[] = {
1226 "Front Playback Switch",
1227 "Surround Playback Switch",
1228 "Center Playback Switch",
1229 "LFE Playback Switch",
1230 "Side Playback Switch",
1231 "Headphone Playback Switch",
1232 "Headphone Playback Switch",
1233 "Speaker Playback Switch",
1234 "External Speaker Playback Switch",
1235 "Speaker2 Playback Switch",
edb54a55 1236 "IEC958 Playback Switch",
2134ea4f
TI		 1237 NULL
1238};
1239
2f2f4251
M		 1240static int stac92xx_build_controls(struct hda_codec *codec)
1241{
1242 struct sigmatel_spec *spec = codec->spec;
1243 int err;
c7d4b2fa 1244 int i;
2f2f4251
M		 1245
1246 err = snd_hda_add_new_ctls(codec, spec->mixer);
1247 if (err < 0)
1248 return err;
c7d4b2fa
M		 1249
1250 for (i = 0; i < spec->num_mixers; i++) {
1251 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1252 if (err < 0)
1253 return err;
1254 }
1697055e
TI		 1255 if (spec->num_dmuxes > 0) {
1256 stac_dmux_mixer.count = spec->num_dmuxes;
1257 err = snd_ctl_add(codec->bus->card,
1258 snd_ctl_new1(&stac_dmux_mixer, codec));
1259 if (err < 0)
1260 return err;
1261 }
d9737751 1262 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1263 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1264 struct hda_input_mux *smux = &spec->private_smux;
1265 /* check for mute support on SPDIF out */
1266 if (wcaps & AC_WCAP_OUT_AMP) {
1267 smux->items[smux->num_items].label = "Off";
1268 smux->items[smux->num_items].index = 0;
1269 smux->num_items++;
1270 spec->spdif_mute = 1;
1271 }
d9737751
MR		 1272 stac_smux_mixer.count = spec->num_smuxes;
1273 err = snd_ctl_add(codec->bus->card,
1274 snd_ctl_new1(&stac_smux_mixer, codec));
1275 if (err < 0)
1276 return err;
1277 }
c7d4b2fa 1278
dabbed6f
M		 1279 if (spec->multiout.dig_out_nid) {
1280 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1281 if (err < 0)
1282 return err;
9a08160b
TI		 1283 err = snd_hda_create_spdif_share_sw(codec,
1284 &spec->multiout);
1285 if (err < 0)
1286 return err;
1287 spec->multiout.share_spdif = 1;
dabbed6f 1288 }
da74ae3e 1289 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1290 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1291 if (err < 0)
1292 return err;
1293 }
2134ea4f
TI		 1294
1295 /* if we have no master control, let's create it */
1296 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1297 unsigned int vmaster_tlv[4];
2134ea4f 1298 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1299 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1300 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1301 vmaster_tlv, slave_vols);
2134ea4f
TI		 1302 if (err < 0)
1303 return err;
1304 }
1305 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1306 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1307 NULL, slave_sws);
1308 if (err < 0)
1309 return err;
1310 }
1311
dabbed6f 1312 return 0;
2f2f4251
M		 1313}
1314
403d1944 1315static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1316 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1317 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1318};
1319
dfe495d0
TI		 1320/*
1321 STAC 9200 pin configs for
1322 102801A8
1323 102801DE
1324 102801E8
1325*/
1326static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1327 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1328 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1329};
1330
1331/*
1332 STAC 9200 pin configs for
1333 102801C0
1334 102801C1
1335*/
1336static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1337 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1338 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1339};
1340
1341/*
1342 STAC 9200 pin configs for
1343 102801C4 (Dell Dimension E310)
1344 102801C5
1345 102801C7
1346 102801D9
1347 102801DA
1348 102801E3
1349*/
1350static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1351 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1352 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1353};
1354
1355
1356/*
1357 STAC 9200-32 pin configs for
1358 102801B5 (Dell Inspiron 630m)
1359 102801D8 (Dell Inspiron 640m)
1360*/
1361static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1362 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1363 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1364};
1365
1366/*
1367 STAC 9200-32 pin configs for
1368 102801C2 (Dell Latitude D620)
1369 102801C8
1370 102801CC (Dell Latitude D820)
1371 102801D4
1372 102801D6
1373*/
1374static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1375 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1376 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1377};
1378
1379/*
1380 STAC 9200-32 pin configs for
1381 102801CE (Dell XPS M1710)
1382 102801CF (Dell Precision M90)
1383*/
1384static unsigned int dell9200_m23_pin_configs[8] = {
1385 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1386 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1387};
1388
1389/*
1390 STAC 9200-32 pin configs for
1391 102801C9
1392 102801CA
1393 102801CB (Dell Latitude 120L)
1394 102801D3
1395*/
1396static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1397 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1398 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1399};
1400
1401/*
1402 STAC 9200-32 pin configs for
1403 102801BD (Dell Inspiron E1505n)
1404 102801EE
1405 102801EF
1406*/
1407static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1408 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1409 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1410};
1411
1412/*
1413 STAC 9200-32 pin configs for
1414 102801F5 (Dell Inspiron 1501)
1415 102801F6
1416*/
1417static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1418 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1419 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1420};
1421
1422/*
1423 STAC 9200-32
1424 102801CD (Dell Inspiron E1705/9400)
1425*/
1426static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1427 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1428 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1429};
1430
bf277785
TD		 1431static unsigned int oqo9200_pin_configs[8] = {
1432 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1433 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1434};
1435
dfe495d0 1436
f5fcc13c
TI		 1437static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1438 [STAC_REF] = ref9200_pin_configs,
bf277785 1439 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1440 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1441 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1442 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1443 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1444 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1445 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1446 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1447 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1448 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1449 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1450 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1451};
1452
f5fcc13c
TI		 1453static const char *stac9200_models[STAC_9200_MODELS] = {
1454 [STAC_REF] = "ref",
bf277785 1455 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1456 [STAC_9200_DELL_D21] = "dell-d21",
1457 [STAC_9200_DELL_D22] = "dell-d22",
1458 [STAC_9200_DELL_D23] = "dell-d23",
1459 [STAC_9200_DELL_M21] = "dell-m21",
1460 [STAC_9200_DELL_M22] = "dell-m22",
1461 [STAC_9200_DELL_M23] = "dell-m23",
1462 [STAC_9200_DELL_M24] = "dell-m24",
1463 [STAC_9200_DELL_M25] = "dell-m25",
1464 [STAC_9200_DELL_M26] = "dell-m26",
1465 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1466 [STAC_9200_GATEWAY] = "gateway",
117f257d 1467 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1468};
1469
1470static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1471 /* SigmaTel reference board */
1472 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1473 "DFI LanParty", STAC_REF),
e7377071 1474 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1475 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1476 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1477 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1478 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1479 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1480 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1481 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1482 "unknown Dell", STAC_9200_DELL_D22),
1483 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1484 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1485 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1486 "Dell Latitude D620", STAC_9200_DELL_M22),
1487 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1488 "unknown Dell", STAC_9200_DELL_D23),
1489 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1490 "unknown Dell", STAC_9200_DELL_D23),
1491 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1492 "unknown Dell", STAC_9200_DELL_M22),
1493 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1494 "unknown Dell", STAC_9200_DELL_M24),
1495 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1496 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1497 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1498 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1499 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1500 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1501 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1502 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1503 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1504 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1505 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1506 "Dell Precision M90", STAC_9200_DELL_M23),
1507 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1508 "unknown Dell", STAC_9200_DELL_M22),
1509 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1510 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1511 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1512 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1513 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1514 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1516 "unknown Dell", STAC_9200_DELL_D23),
1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1518 "unknown Dell", STAC_9200_DELL_D23),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1520 "unknown Dell", STAC_9200_DELL_D21),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1522 "unknown Dell", STAC_9200_DELL_D23),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1524 "unknown Dell", STAC_9200_DELL_D21),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1526 "unknown Dell", STAC_9200_DELL_M25),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1528 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1530 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1532 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1533 /* Panasonic */
117f257d 1534 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1535 /* Gateway machines needs EAPD to be set on resume */
1536 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1537 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1538 STAC_9200_GATEWAY),
1539 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1540 STAC_9200_GATEWAY),
bf277785
TD		 1541 /* OQO Mobile */
1542 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1543 {} /* terminator */
1544};
1545
8e21c34c
TD		 1546static unsigned int ref925x_pin_configs[8] = {
1547 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1548 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1549};
1550
1551static unsigned int stac925x_MA6_pin_configs[8] = {
1552 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1553 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1554};
1555
2c11f955
TD		 1556static unsigned int stac925x_PA6_pin_configs[8] = {
1557 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1558 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1559};
1560
8e21c34c 1561static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1562 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1563 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1564};
1565
1566static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1567 [STAC_REF] = ref925x_pin_configs,
1568 [STAC_M2_2] = stac925xM2_2_pin_configs,
1569 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1570 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1571};
1572
1573static const char *stac925x_models[STAC_925x_MODELS] = {
1574 [STAC_REF] = "ref",
1575 [STAC_M2_2] = "m2-2",
1576 [STAC_MA6] = "m6",
2c11f955 1577 [STAC_PA6] = "pa6",
8e21c34c
TD		 1578};
1579
1580static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1581 /* SigmaTel reference board */
1582 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1583 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1584 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1585 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1586 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1587 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1588 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1589 {} /* terminator */
1590};
1591
a7662640 1592static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1593 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1594 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1595 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1596 0x01452050,
1597};
1598
1599static unsigned int dell_m6_pin_configs[13] = {
1600 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1601 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1602 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1603 0x4f0000f0,
e1f0d669
MR		 1604};
1605
1606static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1607 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1608 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1609 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1610 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1611 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1612};
1613
1614static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1615 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI		 1616 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1617 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1618 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1619 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1620};
1621
1622static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1623 /* SigmaTel reference board */
1624 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1625 "DFI LanParty", STAC_92HD73XX_REF),
1626 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1627 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1628 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1629 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1630 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1631 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1632 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1633 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1634 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1635 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1636 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1637 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1638 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1639 "unknown Dell", STAC_DELL_M6_DMIC),
1640 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1641 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1642 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1643 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1644 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1645 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1646 {} /* terminator */
1647};
1648
d0513fc6
MR		 1649static unsigned int ref92hd83xxx_pin_configs[14] = {
1650 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1651 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1652 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1653 0x01451160, 0x98560170,
1654};
1655
1656static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1657 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1658};
1659
1660static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1661 [STAC_92HD83XXX_REF] = "ref",
1662};
1663
1664static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1665 /* SigmaTel reference board */
1666 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1667 "DFI LanParty", STAC_92HD71BXX_REF),
1668};
1669
0ffa9807 1670static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1671 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1672 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1673 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1674};
1675
0ffa9807 1676static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1677 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1678 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1679 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1680};
1681
0ffa9807 1682static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1683 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1684 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1685 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1686};
1687
3a7abfd2
MR		 1688static unsigned int dell_m4_3_pin_configs[11] = {
1689 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1690 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1691 0x40f000f0, 0x044413b0, 0x044413b0,
1692};
1693
e035b841
MR		 1694static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1695 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1696 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1697 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1698 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1699 [STAC_HP_M4] = NULL,
e035b841
MR		 1700};
1701
1702static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1703 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1704 [STAC_DELL_M4_1] = "dell-m4-1",
1705 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1706 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1707 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1708};
1709
1710static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1711 /* SigmaTel reference board */
1712 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1713 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1714 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1715 "HP dv5", STAC_HP_M4),
1716 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1717 "HP dv7", STAC_HP_M4),
9a9e2359
MR		 1718 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1719 "unknown HP", STAC_HP_M4),
a7662640
MR		 1720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1721 "unknown Dell", STAC_DELL_M4_1),
1722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1723 "unknown Dell", STAC_DELL_M4_1),
1724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1725 "unknown Dell", STAC_DELL_M4_1),
1726 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1727 "unknown Dell", STAC_DELL_M4_1),
1728 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1729 "unknown Dell", STAC_DELL_M4_1),
1730 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1731 "unknown Dell", STAC_DELL_M4_1),
1732 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1733 "unknown Dell", STAC_DELL_M4_1),
1734 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1735 "unknown Dell", STAC_DELL_M4_2),
1736 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1737 "unknown Dell", STAC_DELL_M4_2),
1738 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1739 "unknown Dell", STAC_DELL_M4_2),
1740 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1741 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1742 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1743 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1744 {} /* terminator */
1745};
1746
403d1944
MP		 1747static unsigned int ref922x_pin_configs[10] = {
1748 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1749 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1750 0x40000100, 0x40000100,
1751};
1752
dfe495d0
TI		 1753/*
1754 STAC 922X pin configs for
1755 102801A7
1756 102801AB
1757 102801A9
1758 102801D1
1759 102801D2
1760*/
1761static unsigned int dell_922x_d81_pin_configs[10] = {
1762 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1763 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1764 0x01813122, 0x400001f2,
1765};
1766
1767/*
1768 STAC 922X pin configs for
1769 102801AC
1770 102801D0
1771*/
1772static unsigned int dell_922x_d82_pin_configs[10] = {
1773 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1774 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1775 0x01813122, 0x400001f1,
1776};
1777
1778/*
1779 STAC 922X pin configs for
1780 102801BF
1781*/
1782static unsigned int dell_922x_m81_pin_configs[10] = {
1783 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1784 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1785 0x40C003f1, 0x405003f0,
1786};
1787
1788/*
1789 STAC 9221 A1 pin configs for
1790 102801D7 (Dell XPS M1210)
1791*/
1792static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1793 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1794 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1795 0x508003f3, 0x405003f4,
1796};
1797
403d1944 1798static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1799 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1800 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1801 0x02a19120, 0x40000100,
1802};
1803
1804static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1805 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1806 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1807 0x02a19320, 0x40000100,
1808};
1809
5d5d3bc3
IZ		 1810static unsigned int intel_mac_v1_pin_configs[10] = {
1811 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1812 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1813 0x400000fc, 0x400000fb,
1814};
1815
1816static unsigned int intel_mac_v2_pin_configs[10] = {
1817 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1818 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1819 0x400000fc, 0x400000fb,
6f0778d8
NB		 1820};
1821
5d5d3bc3
IZ		 1822static unsigned int intel_mac_v3_pin_configs[10] = {
1823 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1824 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1825 0x400000fc, 0x400000fb,
1826};
1827
5d5d3bc3
IZ		 1828static unsigned int intel_mac_v4_pin_configs[10] = {
1829 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1830 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1831 0x400000fc, 0x400000fb,
1832};
1833
5d5d3bc3
IZ		 1834static unsigned int intel_mac_v5_pin_configs[10] = {
1835 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1836 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1837 0x400000fc, 0x400000fb,
0dae0f83
TI		 1838};
1839
8c650087
MCC		 1840static unsigned int ecs202_pin_configs[10] = {
1841 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1842 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1843 0x9037012e, 0x40e000f2,
1844};
76c08828 1845
19039bd0 1846static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1847 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1848 [STAC_D945GTP3] = d945gtp3_pin_configs,
1849 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1850 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1851 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1852 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1853 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1854 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1855 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1856 /* for backward compatibility */
5d5d3bc3
IZ		 1857 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1858 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1859 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1860 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1861 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1862 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1863 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1864 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1865 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1866 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1867 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1868};
1869
f5fcc13c
TI		 1870static const char *stac922x_models[STAC_922X_MODELS] = {
1871 [STAC_D945_REF] = "ref",
1872 [STAC_D945GTP5] = "5stack",
1873 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1874 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1875 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1876 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1877 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1878 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1879 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1880 /* for backward compatibility */
f5fcc13c 1881 [STAC_MACMINI] = "macmini",
3fc24d85 1882 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1883 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1884 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1885 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1886 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1887 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1888 [STAC_922X_DELL_D81] = "dell-d81",
1889 [STAC_922X_DELL_D82] = "dell-d82",
1890 [STAC_922X_DELL_M81] = "dell-m81",
1891 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1892};
1893
1894static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1895 /* SigmaTel reference board */
1896 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1897 "DFI LanParty", STAC_D945_REF),
1898 /* Intel 945G based systems */
1899 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1900 "Intel D945G", STAC_D945GTP3),
1901 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1902 "Intel D945G", STAC_D945GTP3),
1903 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1904 "Intel D945G", STAC_D945GTP3),
1905 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1906 "Intel D945G", STAC_D945GTP3),
1907 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1908 "Intel D945G", STAC_D945GTP3),
1909 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1910 "Intel D945G", STAC_D945GTP3),
1911 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1912 "Intel D945G", STAC_D945GTP3),
1913 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1914 "Intel D945G", STAC_D945GTP3),
1915 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1916 "Intel D945G", STAC_D945GTP3),
1917 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1918 "Intel D945G", STAC_D945GTP3),
1919 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1920 "Intel D945G", STAC_D945GTP3),
1921 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1922 "Intel D945G", STAC_D945GTP3),
1923 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1924 "Intel D945G", STAC_D945GTP3),
1925 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1926 "Intel D945G", STAC_D945GTP3),
1927 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1928 "Intel D945G", STAC_D945GTP3),
1929 /* Intel D945G 5-stack systems */
1930 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1931 "Intel D945G", STAC_D945GTP5),
1932 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1933 "Intel D945G", STAC_D945GTP5),
1934 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1935 "Intel D945G", STAC_D945GTP5),
1936 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1937 "Intel D945G", STAC_D945GTP5),
1938 /* Intel 945P based systems */
1939 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1940 "Intel D945P", STAC_D945GTP3),
1941 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1942 "Intel D945P", STAC_D945GTP3),
1943 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1944 "Intel D945P", STAC_D945GTP3),
1945 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1946 "Intel D945P", STAC_D945GTP3),
1947 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1948 "Intel D945P", STAC_D945GTP3),
1949 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1950 "Intel D945P", STAC_D945GTP5),
1951 /* other systems */
536319af 1952 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1953 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1954 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1955 /* Dell systems */
1956 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1957 "unknown Dell", STAC_922X_DELL_D81),
1958 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1959 "unknown Dell", STAC_922X_DELL_D81),
1960 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1961 "unknown Dell", STAC_922X_DELL_D81),
1962 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1963 "unknown Dell", STAC_922X_DELL_D82),
1964 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1965 "unknown Dell", STAC_922X_DELL_M81),
1966 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1967 "unknown Dell", STAC_922X_DELL_D82),
1968 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1969 "unknown Dell", STAC_922X_DELL_D81),
1970 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1971 "unknown Dell", STAC_922X_DELL_D81),
1972 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1973 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1974 /* ECS/PC Chips boards */
1975 SND_PCI_QUIRK(0x1019, 0x2144,
1976 "ECS/PC chips", STAC_ECS_202),
1977 SND_PCI_QUIRK(0x1019, 0x2608,
1978 "ECS/PC chips", STAC_ECS_202),
1979 SND_PCI_QUIRK(0x1019, 0x2633,
1980 "ECS/PC chips P17G/1333", STAC_ECS_202),
1981 SND_PCI_QUIRK(0x1019, 0x2811,
1982 "ECS/PC chips", STAC_ECS_202),
1983 SND_PCI_QUIRK(0x1019, 0x2812,
1984 "ECS/PC chips", STAC_ECS_202),
1985 SND_PCI_QUIRK(0x1019, 0x2813,
1986 "ECS/PC chips", STAC_ECS_202),
1987 SND_PCI_QUIRK(0x1019, 0x2814,
1988 "ECS/PC chips", STAC_ECS_202),
1989 SND_PCI_QUIRK(0x1019, 0x2815,
1990 "ECS/PC chips", STAC_ECS_202),
1991 SND_PCI_QUIRK(0x1019, 0x2816,
1992 "ECS/PC chips", STAC_ECS_202),
1993 SND_PCI_QUIRK(0x1019, 0x2817,
1994 "ECS/PC chips", STAC_ECS_202),
1995 SND_PCI_QUIRK(0x1019, 0x2818,
1996 "ECS/PC chips", STAC_ECS_202),
1997 SND_PCI_QUIRK(0x1019, 0x2819,
1998 "ECS/PC chips", STAC_ECS_202),
1999 SND_PCI_QUIRK(0x1019, 0x2820,
2000 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2001 {} /* terminator */
2002};
2003
3cc08dc6 2004static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2005 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2006 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2007 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2008 0x01c42190, 0x40000100,
3cc08dc6
MP		 2009};
2010
93ed1503 2011static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2012 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2013 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2014 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2015 0x40000100, 0x40000100
2016};
2017
93ed1503
TD		 2018static unsigned int d965_5st_pin_configs[14] = {
2019 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2020 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2021 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2022 0x40000100, 0x40000100
2023};
2024
4ff076e5
TD		 2025static unsigned int dell_3st_pin_configs[14] = {
2026 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2027 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2028 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2029 0x40c003fc, 0x40000100
2030};
2031
93ed1503 2032static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2033 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2034 [STAC_D965_REF] = ref927x_pin_configs,
2035 [STAC_D965_3ST] = d965_3st_pin_configs,
2036 [STAC_D965_5ST] = d965_5st_pin_configs,
2037 [STAC_DELL_3ST] = dell_3st_pin_configs,
2038 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2039};
2040
f5fcc13c 2041static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2042 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2043 [STAC_D965_REF] = "ref",
2044 [STAC_D965_3ST] = "3stack",
2045 [STAC_D965_5ST] = "5stack",
2046 [STAC_DELL_3ST] = "dell-3stack",
2047 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2048};
2049
2050static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2051 /* SigmaTel reference board */
2052 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2053 "DFI LanParty", STAC_D965_REF),
81d3dbde 2054 /* Intel 946 based systems */
f5fcc13c
TI		 2055 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2057 /* 965 based 3 stack systems */
f5fcc13c
TI		 2058 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2062 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2064 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2065 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2066 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2067 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2068 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2069 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2070 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2071 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2072 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2073 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2074 /* Dell 3 stack systems */
8e9068b1 2075 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2076 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2077 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2078 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2079 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2080 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2081 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2082 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2083 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2084 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2085 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2086 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2087 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2088 /* 965 based 5 stack systems */
f5fcc13c
TI		 2089 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2090 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2091 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2092 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2093 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2094 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2095 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2096 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2097 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2098 {} /* terminator */
2099};
2100
f3302a59
MP		 2101static unsigned int ref9205_pin_configs[12] = {
2102 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2103 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2104 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2105};
2106
dfe495d0
TI		 2107/*
2108 STAC 9205 pin configs for
2109 102801F1
2110 102801F2
2111 102801FC
2112 102801FD
2113 10280204
2114 1028021F
3fa2ef74 2115 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2116*/
2117static unsigned int dell_9205_m42_pin_configs[12] = {
2118 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2119 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2120 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2121};
2122
2123/*
2124 STAC 9205 pin configs for
2125 102801F9
2126 102801FA
2127 102801FE
2128 102801FF (Dell Precision M4300)
2129 10280206
2130 10280200
2131 10280201
2132*/
2133static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2134 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2135 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2136 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2137};
2138
dfe495d0 2139static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2140 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2141 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2142 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2143};
2144
f5fcc13c 2145static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2146 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2147 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2148 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2149 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2150};
2151
f5fcc13c
TI		 2152static const char *stac9205_models[STAC_9205_MODELS] = {
2153 [STAC_9205_REF] = "ref",
dfe495d0 2154 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2155 [STAC_9205_DELL_M43] = "dell-m43",
2156 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2157};
2158
2159static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2160 /* SigmaTel reference board */
2161 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2162 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2163 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2164 "unknown Dell", STAC_9205_DELL_M42),
2165 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2166 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2167 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2168 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2170 "Dell Precision", STAC_9205_DELL_M43),
2171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2172 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2174 "unknown Dell", STAC_9205_DELL_M42),
2175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2176 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2178 "Dell Precision", STAC_9205_DELL_M43),
2179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2180 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2182 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2183 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2184 "Dell Precision", STAC_9205_DELL_M43),
2185 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2186 "Dell Precision", STAC_9205_DELL_M43),
2187 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2188 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2189 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2190 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2191 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2192 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2193 {} /* terminator */
2194};
2195
11b44bbd
RF		 2196static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2197{
2198 int i;
2199 struct sigmatel_spec *spec = codec->spec;
2200
2201 if (! spec->bios_pin_configs) {
2202 spec->bios_pin_configs = kcalloc(spec->num_pins,
2203 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
2204 if (! spec->bios_pin_configs)
2205 return -ENOMEM;
2206 }
2207
2208 for (i = 0; i < spec->num_pins; i++) {
2209 hda_nid_t nid = spec->pin_nids[i];
2210 unsigned int pin_cfg;
2211
2212 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2213 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2214 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2215 nid, pin_cfg);
2216 spec->bios_pin_configs[i] = pin_cfg;
2217 }
2218
2219 return 0;
2220}
2221
87d48363
MR		 2222static void stac92xx_set_config_reg(struct hda_codec *codec,
2223 hda_nid_t pin_nid, unsigned int pin_config)
2224{
2225 int i;
2226 snd_hda_codec_write(codec, pin_nid, 0,
2227 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2228 pin_config & 0x000000ff);
2229 snd_hda_codec_write(codec, pin_nid, 0,
2230 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2231 (pin_config & 0x0000ff00) >> 8);
2232 snd_hda_codec_write(codec, pin_nid, 0,
2233 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2234 (pin_config & 0x00ff0000) >> 16);
2235 snd_hda_codec_write(codec, pin_nid, 0,
2236 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2237 pin_config >> 24);
2238 i = snd_hda_codec_read(codec, pin_nid, 0,
2239 AC_VERB_GET_CONFIG_DEFAULT,
2240 0x00);
2241 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2242 pin_nid, i);
2243}
2244
2f2f4251
M		 2245static void stac92xx_set_config_regs(struct hda_codec *codec)
2246{
2247 int i;
2248 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2249
87d48363
MR		 2250 if (!spec->pin_configs)
2251 return;
11b44bbd 2252
87d48363
MR		 2253 for (i = 0; i < spec->num_pins; i++)
2254 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2255 spec->pin_configs[i]);
2f2f4251 2256}
2f2f4251 2257
dabbed6f 2258/*
c7d4b2fa 2259 * Analog playback callbacks
dabbed6f 2260 */
c7d4b2fa
M		 2261static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2262 struct hda_codec *codec,
c8b6bf9b 2263 struct snd_pcm_substream *substream)
2f2f4251 2264{
dabbed6f 2265 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2266 if (spec->stream_delay)
2267 msleep(spec->stream_delay);
9a08160b
TI		 2268 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2269 hinfo);
2f2f4251
M		 2270}
2271
2f2f4251
M		 2272static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2273 struct hda_codec *codec,
2274 unsigned int stream_tag,
2275 unsigned int format,
c8b6bf9b 2276 struct snd_pcm_substream *substream)
2f2f4251
M		 2277{
2278 struct sigmatel_spec *spec = codec->spec;
403d1944 2279 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2280}
2281
2282static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2283 struct hda_codec *codec,
c8b6bf9b 2284 struct snd_pcm_substream *substream)
2f2f4251
M		 2285{
2286 struct sigmatel_spec *spec = codec->spec;
2287 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2288}
2289
dabbed6f
M		 2290/*
2291 * Digital playback callbacks
2292 */
2293static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2294 struct hda_codec *codec,
c8b6bf9b 2295 struct snd_pcm_substream *substream)
dabbed6f
M		 2296{
2297 struct sigmatel_spec *spec = codec->spec;
2298 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2299}
2300
2301static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2302 struct hda_codec *codec,
c8b6bf9b 2303 struct snd_pcm_substream *substream)
dabbed6f
M		 2304{
2305 struct sigmatel_spec *spec = codec->spec;
2306 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2307}
2308
6b97eb45
TI		 2309static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2310 struct hda_codec *codec,
2311 unsigned int stream_tag,
2312 unsigned int format,
2313 struct snd_pcm_substream *substream)
2314{
2315 struct sigmatel_spec *spec = codec->spec;
2316 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2317 stream_tag, format, substream);
2318}
2319
dabbed6f 2320
2f2f4251
M		 2321/*
2322 * Analog capture callbacks
2323 */
2324static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2325 struct hda_codec *codec,
2326 unsigned int stream_tag,
2327 unsigned int format,
c8b6bf9b 2328 struct snd_pcm_substream *substream)
2f2f4251
M		 2329{
2330 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2331 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2332
8daaaa97
MR		 2333 if (spec->powerdown_adcs) {
2334 msleep(40);
2335 snd_hda_codec_write_cache(codec, nid, 0,
2336 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2337 }
2338 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2339 return 0;
2340}
2341
2342static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2343 struct hda_codec *codec,
c8b6bf9b 2344 struct snd_pcm_substream *substream)
2f2f4251
M		 2345{
2346 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2347 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2348
8daaaa97
MR		 2349 snd_hda_codec_cleanup_stream(codec, nid);
2350 if (spec->powerdown_adcs)
2351 snd_hda_codec_write_cache(codec, nid, 0,
2352 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2353 return 0;
2354}
2355
dabbed6f
M		 2356static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2357 .substreams = 1,
2358 .channels_min = 2,
2359 .channels_max = 2,
2360 /* NID is set in stac92xx_build_pcms */
2361 .ops = {
2362 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2363 .close = stac92xx_dig_playback_pcm_close,
2364 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2365 },
2366};
2367
2368static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2369 .substreams = 1,
2370 .channels_min = 2,
2371 .channels_max = 2,
2372 /* NID is set in stac92xx_build_pcms */
2373};
2374
2f2f4251
M		 2375static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2376 .substreams = 1,
2377 .channels_min = 2,
c7d4b2fa 2378 .channels_max = 8,
2f2f4251
M		 2379 .nid = 0x02, /* NID to query formats and rates */
2380 .ops = {
2381 .open = stac92xx_playback_pcm_open,
2382 .prepare = stac92xx_playback_pcm_prepare,
2383 .cleanup = stac92xx_playback_pcm_cleanup
2384 },
2385};
2386
3cc08dc6
MP		 2387static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2388 .substreams = 1,
2389 .channels_min = 2,
2390 .channels_max = 2,
2391 .nid = 0x06, /* NID to query formats and rates */
2392 .ops = {
2393 .open = stac92xx_playback_pcm_open,
2394 .prepare = stac92xx_playback_pcm_prepare,
2395 .cleanup = stac92xx_playback_pcm_cleanup
2396 },
2397};
2398
2f2f4251 2399static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2400 .channels_min = 2,
2401 .channels_max = 2,
9e05b7a3 2402 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2403 .ops = {
2404 .prepare = stac92xx_capture_pcm_prepare,
2405 .cleanup = stac92xx_capture_pcm_cleanup
2406 },
2407};
2408
2409static int stac92xx_build_pcms(struct hda_codec *codec)
2410{
2411 struct sigmatel_spec *spec = codec->spec;
2412 struct hda_pcm *info = spec->pcm_rec;
2413
2414 codec->num_pcms = 1;
2415 codec->pcm_info = info;
2416
c7d4b2fa 2417 info->name = "STAC92xx Analog";
2f2f4251 2418 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2419 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2420 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2421 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2422
2423 if (spec->alt_switch) {
2424 codec->num_pcms++;
2425 info++;
2426 info->name = "STAC92xx Analog Alt";
2427 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2428 }
2f2f4251 2429
dabbed6f
M		 2430 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2431 codec->num_pcms++;
2432 info++;
2433 info->name = "STAC92xx Digital";
7ba72ba1 2434 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2435 if (spec->multiout.dig_out_nid) {
2436 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2437 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2438 }
2439 if (spec->dig_in_nid) {
2440 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2441 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2442 }
2443 }
2444
2f2f4251
M		 2445 return 0;
2446}
2447
c960a03b
TI		 2448static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2449{
2450 unsigned int pincap = snd_hda_param_read(codec, nid,
2451 AC_PAR_PIN_CAP);
2452 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2453 if (pincap & AC_PINCAP_VREF_100)
2454 return AC_PINCTL_VREF_100;
2455 if (pincap & AC_PINCAP_VREF_80)
2456 return AC_PINCTL_VREF_80;
2457 if (pincap & AC_PINCAP_VREF_50)
2458 return AC_PINCTL_VREF_50;
2459 if (pincap & AC_PINCAP_VREF_GRD)
2460 return AC_PINCTL_VREF_GRD;
2461 return 0;
2462}
2463
403d1944
MP		 2464static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2465
2466{
82beb8fd
TI		 2467 snd_hda_codec_write_cache(codec, nid, 0,
2468 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2469}
2470
7c2ba97b
MR		 2471#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2472
2473static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2474 struct snd_ctl_elem_value *ucontrol)
2475{
2476 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2477 struct sigmatel_spec *spec = codec->spec;
2478
d7a89436 2479 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2480 return 0;
2481}
2482
2483static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2484 struct snd_ctl_elem_value *ucontrol)
2485{
2486 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2487 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2488 int nid = kcontrol->private_value;
2489
2490 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2491
2492 /* check to be sure that the ports are upto date with
2493 * switch changes
2494 */
2495 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2496
2497 return 1;
2498}
2499
a5ce8890 2500#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2501
2502static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2503{
2504 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2505 struct sigmatel_spec *spec = codec->spec;
2506 int io_idx = kcontrol-> private_value & 0xff;
2507
2508 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2509 return 0;
2510}
2511
2512static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2513{
2514 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2515 struct sigmatel_spec *spec = codec->spec;
2516 hda_nid_t nid = kcontrol->private_value >> 8;
2517 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2518 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2519
2520 spec->io_switch[io_idx] = val;
2521
2522 if (val)
2523 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2524 else {
2525 unsigned int pinctl = AC_PINCTL_IN_EN;
2526 if (io_idx) /* set VREF for mic */
2527 pinctl |= stac92xx_get_vref(codec, nid);
2528 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2529 }
40c1d308
JZ		 2530
2531 /* check the auto-mute again: we need to mute/unmute the speaker
2532 * appropriately according to the pin direction
2533 */
2534 if (spec->hp_detect)
2535 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2536
403d1944
MP		 2537 return 1;
2538}
2539
0fb87bb4
ML		 2540#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2541
2542static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2543 struct snd_ctl_elem_value *ucontrol)
2544{
2545 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2546 struct sigmatel_spec *spec = codec->spec;
2547
2548 ucontrol->value.integer.value[0] = spec->clfe_swap;
2549 return 0;
2550}
2551
2552static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2553 struct snd_ctl_elem_value *ucontrol)
2554{
2555 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2556 struct sigmatel_spec *spec = codec->spec;
2557 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2558 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2559
68ea7b2f 2560 if (spec->clfe_swap == val)
0fb87bb4
ML		 2561 return 0;
2562
68ea7b2f 2563 spec->clfe_swap = val;
0fb87bb4
ML		 2564
2565 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2566 spec->clfe_swap ? 0x4 : 0x0);
2567
2568 return 1;
2569}
2570
7c2ba97b
MR		 2571#define STAC_CODEC_HP_SWITCH(xname) \
2572 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2573 .name = xname, \
2574 .index = 0, \
2575 .info = stac92xx_hp_switch_info, \
2576 .get = stac92xx_hp_switch_get, \
2577 .put = stac92xx_hp_switch_put, \
2578 }
2579
403d1944
MP		 2580#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2581 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2582 .name = xname, \
2583 .index = 0, \
2584 .info = stac92xx_io_switch_info, \
2585 .get = stac92xx_io_switch_get, \
2586 .put = stac92xx_io_switch_put, \
2587 .private_value = xpval, \
2588 }
2589
0fb87bb4
ML		 2590#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2591 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2592 .name = xname, \
2593 .index = 0, \
2594 .info = stac92xx_clfe_switch_info, \
2595 .get = stac92xx_clfe_switch_get, \
2596 .put = stac92xx_clfe_switch_put, \
2597 .private_value = xpval, \
2598 }
403d1944 2599
c7d4b2fa
M		 2600enum {
2601 STAC_CTL_WIDGET_VOL,
2602 STAC_CTL_WIDGET_MUTE,
09a99959 2603 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2604 STAC_CTL_WIDGET_AMP_MUX,
2605 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2606 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2607 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2608 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2609};
2610
c8b6bf9b 2611static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2612 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2613 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2614 STAC_MONO_MUX,
89385035
MR		 2615 STAC_AMP_MUX,
2616 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2617 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2618 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2619 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2620};
2621
2622/* add dynamic controls */
4d4e9bb3
TI		 2623static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2624 struct snd_kcontrol_new *ktemp,
2625 int idx, const char *name,
2626 unsigned long val)
c7d4b2fa 2627{
c8b6bf9b 2628 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2629
2630 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2631 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2632
2633 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2634 if (! knew)
2635 return -ENOMEM;
2636 if (spec->kctl_alloc) {
2637 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2638 kfree(spec->kctl_alloc);
2639 }
2640 spec->kctl_alloc = knew;
2641 spec->num_kctl_alloc = num;
2642 }
2643
2644 knew = &spec->kctl_alloc[spec->num_kctl_used];
4d4e9bb3 2645 *knew = *ktemp;
4682eee0 2646 knew->index = idx;
82fe0c58 2647 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2648 if (!knew->name)
c7d4b2fa
M		 2649 return -ENOMEM;
2650 knew->private_value = val;
2651 spec->num_kctl_used++;
2652 return 0;
2653}
2654
4d4e9bb3
TI		 2655static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2656 int type, int idx, const char *name,
2657 unsigned long val)
2658{
2659 return stac92xx_add_control_temp(spec,
2660 &stac92xx_control_templates[type],
2661 idx, name, val);
2662}
2663
4682eee0
MR		 2664
2665/* add dynamic controls */
4d4e9bb3
TI		 2666static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2667 const char *name, unsigned long val)
4682eee0
MR		 2668{
2669 return stac92xx_add_control_idx(spec, type, 0, name, val);
2670}
2671
403d1944
MP		 2672/* flag inputs as additional dynamic lineouts */
2673static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2674{
2675 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2676 unsigned int wcaps, wtype;
2677 int i, num_dacs = 0;
2678
2679 /* use the wcaps cache to count all DACs available for line-outs */
2680 for (i = 0; i < codec->num_nodes; i++) {
2681 wcaps = codec->wcaps[i];
2682 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2683
7b043899
SL		 2684 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2685 num_dacs++;
2686 }
403d1944 2687
7b043899
SL		 2688 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2689
403d1944
MP		 2690 switch (cfg->line_outs) {
2691 case 3:
2692 /* add line-in as side */
7b043899 2693 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2694 cfg->line_out_pins[cfg->line_outs] =
2695 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2696 spec->line_switch = 1;
2697 cfg->line_outs++;
2698 }
2699 break;
2700 case 2:
2701 /* add line-in as clfe and mic as side */
7b043899 2702 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2703 cfg->line_out_pins[cfg->line_outs] =
2704 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2705 spec->line_switch = 1;
2706 cfg->line_outs++;
2707 }
7b043899 2708 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2709 cfg->line_out_pins[cfg->line_outs] =
2710 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2711 spec->mic_switch = 1;
2712 cfg->line_outs++;
2713 }
2714 break;
2715 case 1:
2716 /* add line-in as surr and mic as clfe */
7b043899 2717 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2718 cfg->line_out_pins[cfg->line_outs] =
2719 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2720 spec->line_switch = 1;
2721 cfg->line_outs++;
2722 }
7b043899 2723 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2724 cfg->line_out_pins[cfg->line_outs] =
2725 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2726 spec->mic_switch = 1;
2727 cfg->line_outs++;
2728 }
2729 break;
2730 }
2731
2732 return 0;
2733}
2734
7b043899
SL		 2735
2736static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2737{
2738 int i;
2739
2740 for (i = 0; i < spec->multiout.num_dacs; i++) {
2741 if (spec->multiout.dac_nids[i] == nid)
2742 return 1;
2743 }
2744
2745 return 0;
2746}
2747
3cc08dc6 2748/*
7b043899
SL		 2749 * Fill in the dac_nids table from the parsed pin configuration
2750 * This function only works when every pin in line_out_pins[]
2751 * contains atleast one DAC in its connection list. Some 92xx
2752 * codecs are not connected directly to a DAC, such as the 9200
2753 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2754 */
19039bd0 2755static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2756 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2757{
2758 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2759 int i, j, conn_len = 0;
2760 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2761 unsigned int wcaps, wtype;
2762
c7d4b2fa
M		 2763 for (i = 0; i < cfg->line_outs; i++) {
2764 nid = cfg->line_out_pins[i];
7b043899
SL		 2765 conn_len = snd_hda_get_connections(codec, nid, conn,
2766 HDA_MAX_CONNECTIONS);
2767 for (j = 0; j < conn_len; j++) {
2768 wcaps = snd_hda_param_read(codec, conn[j],
2769 AC_PAR_AUDIO_WIDGET_CAP);
2770 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2771 if (wtype != AC_WID_AUD_OUT ||
2772 (wcaps & AC_WCAP_DIGITAL))
2773 continue;
2774 /* conn[j] is a DAC routed to this line-out */
2775 if (!is_in_dac_nids(spec, conn[j]))
2776 break;
2777 }
2778
2779 if (j == conn_len) {
df802952
TI		 2780 if (spec->multiout.num_dacs > 0) {
2781 /* we have already working output pins,
2782 * so let's drop the broken ones again
2783 */
2784 cfg->line_outs = spec->multiout.num_dacs;
2785 break;
2786 }
7b043899
SL		 2787 /* error out, no available DAC found */
2788 snd_printk(KERN_ERR
2789 "%s: No available DAC for pin 0x%x\n",
2790 __func__, nid);
2791 return -ENODEV;
2792 }
2793
2794 spec->multiout.dac_nids[i] = conn[j];
2795 spec->multiout.num_dacs++;
2796 if (conn_len > 1) {
2797 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2798 snd_hda_codec_write_cache(codec, nid, 0,
2799 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2800
7b043899
SL		 2801 }
2802 }
c7d4b2fa 2803
7b043899
SL		 2804 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2805 spec->multiout.num_dacs,
2806 spec->multiout.dac_nids[0],
2807 spec->multiout.dac_nids[1],
2808 spec->multiout.dac_nids[2],
2809 spec->multiout.dac_nids[3],
2810 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2811 return 0;
2812}
2813
eb06ed8f
TI		 2814/* create volume control/switch for the given prefx type */
2815static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2816{
2817 char name[32];
2818 int err;
2819
2820 sprintf(name, "%s Playback Volume", pfx);
2821 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2822 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2823 if (err < 0)
2824 return err;
2825 sprintf(name, "%s Playback Switch", pfx);
2826 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2827 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2828 if (err < 0)
2829 return err;
2830 return 0;
2831}
2832
ae0afd81
MR		 2833static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2834{
2835 if (!spec->multiout.hp_nid)
2836 spec->multiout.hp_nid = nid;
2837 else if (spec->multiout.num_dacs > 4) {
2838 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2839 return 1;
2840 } else {
2841 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2842 spec->multiout.num_dacs++;
2843 }
2844 return 0;
2845}
2846
2847static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2848{
2849 if (is_in_dac_nids(spec, nid))
2850 return 1;
2851 if (spec->multiout.hp_nid == nid)
2852 return 1;
2853 return 0;
2854}
2855
c7d4b2fa 2856/* add playback controls from the parsed DAC table */
0fb87bb4 2857static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2858 const struct auto_pin_cfg *cfg)
c7d4b2fa 2859{
19039bd0
TI		 2860 static const char *chname[4] = {
2861 "Front", "Surround", NULL /*CLFE*/, "Side"
2862 };
d21995e3 2863 hda_nid_t nid = 0;
c7d4b2fa
M		 2864 int i, err;
2865
0fb87bb4 2866 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2867 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2868
2869
40ac8c4f 2870 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2871 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2872 continue;
2873
2874 nid = spec->multiout.dac_nids[i];
2875
2876 if (i == 2) {
2877 /* Center/LFE */
eb06ed8f
TI		 2878 err = create_controls(spec, "Center", nid, 1);
2879 if (err < 0)
c7d4b2fa 2880 return err;
eb06ed8f
TI		 2881 err = create_controls(spec, "LFE", nid, 2);
2882 if (err < 0)
c7d4b2fa 2883 return err;
0fb87bb4
ML		 2884
2885 wid_caps = get_wcaps(codec, nid);
2886
2887 if (wid_caps & AC_WCAP_LR_SWAP) {
2888 err = stac92xx_add_control(spec,
2889 STAC_CTL_WIDGET_CLFE_SWITCH,
2890 "Swap Center/LFE Playback Switch", nid);
2891
2892 if (err < 0)
2893 return err;
2894 }
2895
c7d4b2fa 2896 } else {
eb06ed8f
TI		 2897 err = create_controls(spec, chname[i], nid, 3);
2898 if (err < 0)
c7d4b2fa
M		 2899 return err;
2900 }
2901 }
2902
fedb7569
MR		 2903 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
2904 cfg->hp_outs && !spec->multiout.hp_nid)
2905 spec->multiout.hp_nid = nid;
2906
95026623 2907 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 2908 err = stac92xx_add_control(spec,
2909 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 2910 "Headphone as Line Out Switch",
2911 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 2912 if (err < 0)
2913 return err;
2914 }
2915
b5895dc8
MR		 2916 if (spec->line_switch) {
2917 nid = cfg->input_pins[AUTO_PIN_LINE];
2918 pincap = snd_hda_param_read(codec, nid,
2919 AC_PAR_PIN_CAP);
2920 if (pincap & AC_PINCAP_OUT) {
2921 err = stac92xx_add_control(spec,
2922 STAC_CTL_WIDGET_IO_SWITCH,
2923 "Line In as Output Switch", nid << 8);
2924 if (err < 0)
2925 return err;
2926 }
2927 }
403d1944 2928
b5895dc8 2929 if (spec->mic_switch) {
cace16f1 2930 unsigned int def_conf;
ae0afd81
MR		 2931 unsigned int mic_pin = AUTO_PIN_MIC;
2932again:
2933 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2934 def_conf = snd_hda_codec_read(codec, nid, 0,
2935 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2936 /* some laptops have an internal analog microphone
2937 * which can't be used as a output */
2938 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2939 pincap = snd_hda_param_read(codec, nid,
2940 AC_PAR_PIN_CAP);
2941 if (pincap & AC_PINCAP_OUT) {
2942 err = stac92xx_add_control(spec,
2943 STAC_CTL_WIDGET_IO_SWITCH,
2944 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2945 nid = snd_hda_codec_read(codec, nid, 0,
2946 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2947 if (!check_in_dac_nids(spec, nid))
2948 add_spec_dacs(spec, nid);
cace16f1
MR		 2949 if (err < 0)
2950 return err;
2951 }
ae0afd81
MR		 2952 } else if (mic_pin == AUTO_PIN_MIC) {
2953 mic_pin = AUTO_PIN_FRONT_MIC;
2954 goto again;
b5895dc8
MR		 2955 }
2956 }
403d1944 2957
c7d4b2fa
M		 2958 return 0;
2959}
2960
eb06ed8f
TI		 2961/* add playback controls for Speaker and HP outputs */
2962static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2963 struct auto_pin_cfg *cfg)
2964{
2965 struct sigmatel_spec *spec = codec->spec;
2966 hda_nid_t nid;
2967 int i, old_num_dacs, err;
2968
2969 old_num_dacs = spec->multiout.num_dacs;
2970 for (i = 0; i < cfg->hp_outs; i++) {
2971 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2972 if (wid_caps & AC_WCAP_UNSOL_CAP)
2973 spec->hp_detect = 1;
2974 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2975 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2976 if (check_in_dac_nids(spec, nid))
2977 nid = 0;
2978 if (! nid)
c7d4b2fa 2979 continue;
eb06ed8f
TI		 2980 add_spec_dacs(spec, nid);
2981 }
2982 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2983 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2984 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2985 if (check_in_dac_nids(spec, nid))
2986 nid = 0;
eb06ed8f
TI		 2987 if (! nid)
2988 continue;
2989 add_spec_dacs(spec, nid);
c7d4b2fa 2990 }
1b290a51
MR		 2991 for (i = 0; i < cfg->line_outs; i++) {
2992 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2993 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2994 if (check_in_dac_nids(spec, nid))
2995 nid = 0;
2996 if (! nid)
2997 continue;
2998 add_spec_dacs(spec, nid);
2999 }
eb06ed8f
TI		 3000 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
3001 static const char *pfxs[] = {
3002 "Speaker", "External Speaker", "Speaker2",
3003 };
3004 err = create_controls(spec, pfxs[i - old_num_dacs],
3005 spec->multiout.dac_nids[i], 3);
3006 if (err < 0)
3007 return err;
3008 }
3009 if (spec->multiout.hp_nid) {
2626a263
TI		 3010 err = create_controls(spec, "Headphone",
3011 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 3012 if (err < 0)
3013 return err;
3014 }
c7d4b2fa
M		 3015
3016 return 0;
3017}
3018
b22b4821 3019/* labels for mono mux outputs */
d0513fc6
MR		 3020static const char *stac92xx_mono_labels[4] = {
3021 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3022};
3023
3024/* create mono mux for mono out on capable codecs */
3025static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3026{
3027 struct sigmatel_spec *spec = codec->spec;
3028 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3029 int i, num_cons;
3030 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3031
3032 num_cons = snd_hda_get_connections(codec,
3033 spec->mono_nid,
3034 con_lst,
3035 HDA_MAX_NUM_INPUTS);
3036 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3037 return -EINVAL;
3038
3039 for (i = 0; i < num_cons; i++) {
3040 mono_mux->items[mono_mux->num_items].label =
3041 stac92xx_mono_labels[i];
3042 mono_mux->items[mono_mux->num_items].index = i;
3043 mono_mux->num_items++;
3044 }
09a99959
MR		 3045
3046 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3047 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3048}
3049
89385035
MR		 3050/* labels for amp mux outputs */
3051static const char *stac92xx_amp_labels[3] = {
4b33c767 3052 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3053};
3054
3055/* create amp out controls mux on capable codecs */
3056static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3057{
3058 struct sigmatel_spec *spec = codec->spec;
3059 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3060 int i, err;
3061
2a9c7816 3062 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3063 amp_mux->items[amp_mux->num_items].label =
3064 stac92xx_amp_labels[i];
3065 amp_mux->items[amp_mux->num_items].index = i;
3066 amp_mux->num_items++;
3067 }
3068
2a9c7816
MR		 3069 if (spec->num_amps > 1) {
3070 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3071 "Amp Selector Capture Switch", 0);
3072 if (err < 0)
3073 return err;
3074 }
89385035
MR		 3075 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3076 "Amp Capture Volume",
3077 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3078}
3079
3080
1cd2224c
MR		 3081/* create PC beep volume controls */
3082static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3083 hda_nid_t nid)
3084{
3085 struct sigmatel_spec *spec = codec->spec;
3086 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3087 int err;
3088
3089 /* check for mute support for the the amp */
3090 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3091 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3092 "PC Beep Playback Switch",
3093 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3094 if (err < 0)
3095 return err;
3096 }
3097
3098 /* check to see if there is volume support for the amp */
3099 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3100 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3101 "PC Beep Playback Volume",
3102 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3103 if (err < 0)
3104 return err;
3105 }
3106 return 0;
3107}
3108
4d4e9bb3
TI		 3109#ifdef CONFIG_SND_HDA_INPUT_BEEP
3110#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3111
3112static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3113 struct snd_ctl_elem_value *ucontrol)
3114{
3115 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3116 ucontrol->value.integer.value[0] = codec->beep->enabled;
3117 return 0;
3118}
3119
3120static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3121 struct snd_ctl_elem_value *ucontrol)
3122{
3123 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3124 int enabled = !!ucontrol->value.integer.value[0];
3125 if (codec->beep->enabled != enabled) {
3126 codec->beep->enabled = enabled;
3127 return 1;
3128 }
3129 return 0;
3130}
3131
3132static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3133 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3134 .info = stac92xx_dig_beep_switch_info,
3135 .get = stac92xx_dig_beep_switch_get,
3136 .put = stac92xx_dig_beep_switch_put,
3137};
3138
3139static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3140{
3141 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3142 0, "PC Beep Playback Switch", 0);
3143}
3144#endif
3145
4682eee0
MR		 3146static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3147{
3148 struct sigmatel_spec *spec = codec->spec;
3149 int wcaps, nid, i, err = 0;
3150
3151 for (i = 0; i < spec->num_muxes; i++) {
3152 nid = spec->mux_nids[i];
3153 wcaps = get_wcaps(codec, nid);
3154
3155 if (wcaps & AC_WCAP_OUT_AMP) {
3156 err = stac92xx_add_control_idx(spec,
3157 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3158 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3159 if (err < 0)
3160 return err;
3161 }
3162 }
3163 return 0;
3164};
3165
d9737751 3166static const char *stac92xx_spdif_labels[3] = {
65973632 3167 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3168};
3169
3170static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3171{
3172 struct sigmatel_spec *spec = codec->spec;
3173 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3174 const char **labels = spec->spdif_labels;
d9737751 3175 int i, num_cons;
65973632 3176 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3177
3178 num_cons = snd_hda_get_connections(codec,
3179 spec->smux_nids[0],
3180 con_lst,
3181 HDA_MAX_NUM_INPUTS);
65973632 3182 if (!num_cons)
d9737751
MR		 3183 return -EINVAL;
3184
65973632
MR		 3185 if (!labels)
3186 labels = stac92xx_spdif_labels;
3187
d9737751 3188 for (i = 0; i < num_cons; i++) {
65973632 3189 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3190 spdif_mux->items[spdif_mux->num_items].index = i;
3191 spdif_mux->num_items++;
3192 }
3193
3194 return 0;
3195}
3196
8b65727b 3197/* labels for dmic mux inputs */
ddc2cec4 3198static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3199 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3200 "Digital Mic 3", "Digital Mic 4"
3201};
3202
3203/* create playback/capture controls for input pins on dmic capable codecs */
3204static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3205 const struct auto_pin_cfg *cfg)
3206{
3207 struct sigmatel_spec *spec = codec->spec;
3208 struct hda_input_mux *dimux = &spec->private_dimux;
3209 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3210 int err, i, j;
3211 char name[32];
8b65727b
MP		 3212
3213 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3214 dimux->items[dimux->num_items].index = 0;
3215 dimux->num_items++;
3216
3217 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3218 hda_nid_t nid;
8b65727b
MP		 3219 int index;
3220 int num_cons;
0678accd 3221 unsigned int wcaps;
8b65727b
MP		 3222 unsigned int def_conf;
3223
3224 def_conf = snd_hda_codec_read(codec,
3225 spec->dmic_nids[i],
3226 0,
3227 AC_VERB_GET_CONFIG_DEFAULT,
3228 0);
3229 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3230 continue;
3231
0678accd 3232 nid = spec->dmic_nids[i];
8b65727b 3233 num_cons = snd_hda_get_connections(codec,
e1f0d669 3234 spec->dmux_nids[0],
8b65727b
MP		 3235 con_lst,
3236 HDA_MAX_NUM_INPUTS);
3237 for (j = 0; j < num_cons; j++)
0678accd 3238 if (con_lst[j] == nid) {
8b65727b
MP		 3239 index = j;
3240 goto found;
3241 }
3242 continue;
3243found:
d0513fc6
MR		 3244 wcaps = get_wcaps(codec, nid) &
3245 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3246
d0513fc6 3247 if (wcaps) {
0678accd
MR		 3248 sprintf(name, "%s Capture Volume",
3249 stac92xx_dmic_labels[dimux->num_items]);
3250
3251 err = stac92xx_add_control(spec,
3252 STAC_CTL_WIDGET_VOL,
3253 name,
d0513fc6
MR		 3254 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3255 (wcaps & AC_WCAP_OUT_AMP) ?
3256 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3257 if (err < 0)
3258 return err;
3259 }
3260
8b65727b
MP		 3261 dimux->items[dimux->num_items].label =
3262 stac92xx_dmic_labels[dimux->num_items];
3263 dimux->items[dimux->num_items].index = index;
3264 dimux->num_items++;
3265 }
3266
3267 return 0;
3268}
3269
c7d4b2fa
M		 3270/* create playback/capture controls for input pins */
3271static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3272{
3273 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3274 struct hda_input_mux *imux = &spec->private_imux;
3275 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3276 int i, j, k;
3277
3278 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3279 int index;
3280
3281 if (!cfg->input_pins[i])
3282 continue;
3283 index = -1;
3284 for (j = 0; j < spec->num_muxes; j++) {
3285 int num_cons;
3286 num_cons = snd_hda_get_connections(codec,
3287 spec->mux_nids[j],
3288 con_lst,
3289 HDA_MAX_NUM_INPUTS);
3290 for (k = 0; k < num_cons; k++)
3291 if (con_lst[k] == cfg->input_pins[i]) {
3292 index = k;
3293 goto found;
3294 }
c7d4b2fa 3295 }
314634bc
TI		 3296 continue;
3297 found:
3298 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3299 imux->items[imux->num_items].index = index;
3300 imux->num_items++;
c7d4b2fa
M		 3301 }
3302
7b043899 3303 if (imux->num_items) {
62fe78e9
SR		 3304 /*
3305 * Set the current input for the muxes.
3306 * The STAC9221 has two input muxes with identical source
3307 * NID lists. Hopefully this won't get confused.
3308 */
3309 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3310 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3311 AC_VERB_SET_CONNECT_SEL,
3312 imux->items[0].index);
62fe78e9
SR		 3313 }
3314 }
3315
c7d4b2fa
M		 3316 return 0;
3317}
3318
c7d4b2fa
M		 3319static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3320{
3321 struct sigmatel_spec *spec = codec->spec;
3322 int i;
3323
3324 for (i = 0; i < spec->autocfg.line_outs; i++) {
3325 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3326 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3327 }
3328}
3329
3330static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3331{
3332 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3333 int i;
c7d4b2fa 3334
eb06ed8f
TI		 3335 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3336 hda_nid_t pin;
3337 pin = spec->autocfg.hp_pins[i];
3338 if (pin) /* connect to front */
3339 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3340 }
3341 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3342 hda_nid_t pin;
3343 pin = spec->autocfg.speaker_pins[i];
3344 if (pin) /* connect to front */
3345 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3346 }
c7d4b2fa
M		 3347}
3348
3cc08dc6 3349static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3350{
3351 struct sigmatel_spec *spec = codec->spec;
3352 int err;
bcecd9bd 3353 int hp_speaker_swap = 0;
c7d4b2fa 3354
8b65727b
MP		 3355 if ((err = snd_hda_parse_pin_def_config(codec,
3356 &spec->autocfg,
3357 spec->dmic_nids)) < 0)
c7d4b2fa 3358 return err;
82bc955f 3359 if (! spec->autocfg.line_outs)
869264c4 3360 return 0; /* can't find valid pin config */
19039bd0 3361
bcecd9bd
JZ		 3362 /* If we have no real line-out pin and multiple hp-outs, HPs should
3363 * be set up as multi-channel outputs.
3364 */
3365 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3366 spec->autocfg.hp_outs > 1) {
3367 /* Copy hp_outs to line_outs, backup line_outs in
3368 * speaker_outs so that the following routines can handle
3369 * HP pins as primary outputs.
3370 */
3371 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3372 sizeof(spec->autocfg.line_out_pins));
3373 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3374 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3375 sizeof(spec->autocfg.hp_pins));
3376 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3377 hp_speaker_swap = 1;
3378 }
09a99959 3379 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3380 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3381 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3382 u32 caps = query_amp_caps(codec,
3383 spec->autocfg.mono_out_pin, dir);
3384 hda_nid_t conn_list[1];
3385
3386 /* get the mixer node and then the mono mux if it exists */
3387 if (snd_hda_get_connections(codec,
3388 spec->autocfg.mono_out_pin, conn_list, 1) &&
3389 snd_hda_get_connections(codec, conn_list[0],
3390 conn_list, 1)) {
3391
3392 int wcaps = get_wcaps(codec, conn_list[0]);
3393 int wid_type = (wcaps & AC_WCAP_TYPE)
3394 >> AC_WCAP_TYPE_SHIFT;
3395 /* LR swap check, some stac925x have a mux that
3396 * changes the DACs output path instead of the
3397 * mono-mux path.
3398 */
3399 if (wid_type == AC_WID_AUD_SEL &&
3400 !(wcaps & AC_WCAP_LR_SWAP))
3401 spec->mono_nid = conn_list[0];
3402 }
d0513fc6
MR		 3403 if (dir) {
3404 hda_nid_t nid = spec->autocfg.mono_out_pin;
3405
3406 /* most mono outs have a least a mute/unmute switch */
3407 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3408 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3409 "Mono Playback Switch",
3410 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3411 if (err < 0)
3412 return err;
d0513fc6
MR		 3413 /* check for volume support for the amp */
3414 if ((caps & AC_AMPCAP_NUM_STEPS)
3415 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3416 err = stac92xx_add_control(spec,
3417 STAC_CTL_WIDGET_VOL,
3418 "Mono Playback Volume",
3419 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3420 if (err < 0)
3421 return err;
3422 }
09a99959
MR		 3423 }
3424
3425 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3426 AC_PINCTL_OUT_EN);
3427 }
bcecd9bd 3428
403d1944
MP		 3429 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3430 return err;
19039bd0
TI		 3431 if (spec->multiout.num_dacs == 0)
3432 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3433 return err;
c7d4b2fa 3434
0fb87bb4
ML		 3435 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3436
3437 if (err < 0)
3438 return err;
3439
1cd2224c
MR		 3440 /* setup analog beep controls */
3441 if (spec->anabeep_nid > 0) {
3442 err = stac92xx_auto_create_beep_ctls(codec,
3443 spec->anabeep_nid);
3444 if (err < 0)
3445 return err;
3446 }
3447
3448 /* setup digital beep controls and input device */
3449#ifdef CONFIG_SND_HDA_INPUT_BEEP
3450 if (spec->digbeep_nid > 0) {
3451 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3452 unsigned int caps;
1cd2224c
MR		 3453
3454 err = stac92xx_auto_create_beep_ctls(codec, nid);
3455 if (err < 0)
3456 return err;
3457 err = snd_hda_attach_beep_device(codec, nid);
3458 if (err < 0)
3459 return err;
4d4e9bb3
TI		 3460 /* if no beep switch is available, make its own one */
3461 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3462 if (codec->beep &&
3463 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3464 err = stac92xx_beep_switch_ctl(codec);
3465 if (err < 0)
3466 return err;
3467 }
1cd2224c
MR		 3468 }
3469#endif
3470
bcecd9bd
JZ		 3471 if (hp_speaker_swap == 1) {
3472 /* Restore the hp_outs and line_outs */
3473 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3474 sizeof(spec->autocfg.line_out_pins));
3475 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3476 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3477 sizeof(spec->autocfg.speaker_pins));
3478 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3479 memset(spec->autocfg.speaker_pins, 0,
3480 sizeof(spec->autocfg.speaker_pins));
3481 spec->autocfg.speaker_outs = 0;
3482 }
3483
0fb87bb4
ML		 3484 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3485
3486 if (err < 0)
3487 return err;
3488
3489 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3490
3491 if (err < 0)
c7d4b2fa
M		 3492 return err;
3493
b22b4821
MR		 3494 if (spec->mono_nid > 0) {
3495 err = stac92xx_auto_create_mono_output_ctls(codec);
3496 if (err < 0)
3497 return err;
3498 }
2a9c7816 3499 if (spec->num_amps > 0) {
89385035
MR		 3500 err = stac92xx_auto_create_amp_output_ctls(codec);
3501 if (err < 0)
3502 return err;
3503 }
2a9c7816 3504 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3505 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3506 &spec->autocfg)) < 0)
3507 return err;
4682eee0
MR		 3508 if (spec->num_muxes > 0) {
3509 err = stac92xx_auto_create_mux_input_ctls(codec);
3510 if (err < 0)
3511 return err;
3512 }
d9737751
MR		 3513 if (spec->num_smuxes > 0) {
3514 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3515 if (err < 0)
3516 return err;
3517 }
8b65727b 3518
c7d4b2fa 3519 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3520 if (spec->multiout.max_channels > 2)
c7d4b2fa 3521 spec->surr_switch = 1;
c7d4b2fa 3522
82bc955f 3523 if (spec->autocfg.dig_out_pin)
3cc08dc6 3524 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3525 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3526 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 3527
3528 if (spec->kctl_alloc)
3529 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3530
3531 spec->input_mux = &spec->private_imux;
2a9c7816 3532 spec->dinput_mux = &spec->private_dimux;
d9737751 3533 spec->sinput_mux = &spec->private_smux;
b22b4821 3534 spec->mono_mux = &spec->private_mono_mux;
89385035 3535 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3536 return 1;
3537}
3538
82bc955f
TI		 3539/* add playback controls for HP output */
3540static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3541 struct auto_pin_cfg *cfg)
3542{
3543 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3544 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3545 unsigned int wid_caps;
3546
3547 if (! pin)
3548 return 0;
3549
3550 wid_caps = get_wcaps(codec, pin);
505cb341 3551 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3552 spec->hp_detect = 1;
82bc955f
TI		 3553
3554 return 0;
3555}
3556
160ea0dc
RF		 3557/* add playback controls for LFE output */
3558static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3559 struct auto_pin_cfg *cfg)
3560{
3561 struct sigmatel_spec *spec = codec->spec;
3562 int err;
3563 hda_nid_t lfe_pin = 0x0;
3564 int i;
3565
3566 /*
3567 * search speaker outs and line outs for a mono speaker pin
3568 * with an amp. If one is found, add LFE controls
3569 * for it.
3570 */
3571 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3572 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3573 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3574 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3575 if (wcaps == AC_WCAP_OUT_AMP)
3576 /* found a mono speaker with an amp, must be lfe */
3577 lfe_pin = pin;
3578 }
3579
3580 /* if speaker_outs is 0, then speakers may be in line_outs */
3581 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3582 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3583 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3584 unsigned int defcfg;
8b551785 3585 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3586 AC_VERB_GET_CONFIG_DEFAULT,
3587 0x00);
8b551785 3588 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3589 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3590 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3591 if (wcaps == AC_WCAP_OUT_AMP)
3592 /* found a mono speaker with an amp,
3593 must be lfe */
3594 lfe_pin = pin;
3595 }
3596 }
3597 }
3598
3599 if (lfe_pin) {
eb06ed8f 3600 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3601 if (err < 0)
3602 return err;
3603 }
3604
3605 return 0;
3606}
3607
c7d4b2fa
M		 3608static int stac9200_parse_auto_config(struct hda_codec *codec)
3609{
3610 struct sigmatel_spec *spec = codec->spec;
3611 int err;
3612
df694daa 3613 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3614 return err;
3615
3616 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3617 return err;
3618
82bc955f
TI		 3619 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3620 return err;
3621
160ea0dc
RF		 3622 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3623 return err;
3624
355a0ec4
TI		 3625 if (spec->num_muxes > 0) {
3626 err = stac92xx_auto_create_mux_input_ctls(codec);
3627 if (err < 0)
3628 return err;
3629 }
3630
82bc955f 3631 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3632 spec->multiout.dig_out_nid = 0x05;
82bc955f 3633 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3634 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 3635
3636 if (spec->kctl_alloc)
3637 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3638
3639 spec->input_mux = &spec->private_imux;
8b65727b 3640 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3641
3642 return 1;
3643}
3644
62fe78e9
SR		 3645/*
3646 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3647 * funky external mute control using GPIO pins.
3648 */
3649
76e1ddfb 3650static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3651 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3652{
3653 unsigned int gpiostate, gpiomask, gpiodir;
3654
3655 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3656 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3657 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3658
3659 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3660 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3661 gpiomask |= mask;
62fe78e9
SR		 3662
3663 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3664 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3665 gpiodir |= dir_mask;
62fe78e9 3666
76e1ddfb 3667 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3668 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3669
3670 snd_hda_codec_write(codec, codec->afg, 0,
3671 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3672 snd_hda_codec_read(codec, codec->afg, 0,
3673 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3674
3675 msleep(1);
3676
76e1ddfb
TI		 3677 snd_hda_codec_read(codec, codec->afg, 0,
3678 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3679}
3680
314634bc
TI		 3681static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3682 unsigned int event)
3683{
3684 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3685 snd_hda_codec_write_cache(codec, nid, 0,
3686 AC_VERB_SET_UNSOLICITED_ENABLE,
3687 (AC_USRSP_EN | event));
314634bc
TI		 3688}
3689
a64135a2
MR		 3690static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3691{
3692 int i;
3693 for (i = 0; i < cfg->hp_outs; i++)
3694 if (cfg->hp_pins[i] == nid)
3695 return 1; /* nid is a HP-Out */
3696
3697 return 0; /* nid is not a HP-Out */
3698};
3699
b76c850f
MR		 3700static void stac92xx_power_down(struct hda_codec *codec)
3701{
3702 struct sigmatel_spec *spec = codec->spec;
3703
3704 /* power down inactive DACs */
3705 hda_nid_t *dac;
3706 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3707 if (!is_in_dac_nids(spec, *dac) &&
3708 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3709 snd_hda_codec_write_cache(codec, *dac, 0,
3710 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3711}
3712
f73d3585
TI		 3713static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3714 int enable);
3715
c7d4b2fa
M		 3716static int stac92xx_init(struct hda_codec *codec)
3717{
3718 struct sigmatel_spec *spec = codec->spec;
82bc955f 3719 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3720 unsigned int gpio;
82bc955f 3721 int i;
c7d4b2fa 3722
c7d4b2fa
M		 3723 snd_hda_sequence_write(codec, spec->init);
3724
8daaaa97
MR		 3725 /* power down adcs initially */
3726 if (spec->powerdown_adcs)
3727 for (i = 0; i < spec->num_adcs; i++)
3728 snd_hda_codec_write_cache(codec,
3729 spec->adc_nids[i], 0,
3730 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI		 3731
3732 /* set up GPIO */
3733 gpio = spec->gpio_data;
3734 /* turn on EAPD statically when spec->eapd_switch isn't set.
3735 * otherwise, unsol event will turn it on/off dynamically
3736 */
3737 if (!spec->eapd_switch)
3738 gpio |= spec->eapd_mask;
3739 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3740
82bc955f
TI		 3741 /* set up pins */
3742 if (spec->hp_detect) {
505cb341 3743 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3744 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3745 enable_pin_detect(codec, cfg->hp_pins[i],
3746 STAC_HP_EVENT);
0a07acaf
TI		 3747 /* force to enable the first line-out; the others are set up
3748 * in unsol_event
3749 */
3750 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3751 AC_PINCTL_OUT_EN);
eb995a8c 3752 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3753 /* fake event to set up pins */
3754 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3755 } else {
3756 stac92xx_auto_init_multi_out(codec);
3757 stac92xx_auto_init_hp_out(codec);
3758 }
3759 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3760 hda_nid_t nid = cfg->input_pins[i];
3761 if (nid) {
4f1e6bc3
TI		 3762 unsigned int pinctl;
3763 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3764 /* for mic pins, force to initialize */
3765 pinctl = stac92xx_get_vref(codec, nid);
3766 } else {
3767 pinctl = snd_hda_codec_read(codec, nid, 0,
3768 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3769 /* if PINCTL already set then skip */
3770 if (pinctl & AC_PINCTL_IN_EN)
3771 continue;
3772 }
3773 pinctl |= AC_PINCTL_IN_EN;
c960a03b
TI		 3774 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3775 }
82bc955f 3776 }
a64135a2
MR		 3777 for (i = 0; i < spec->num_dmics; i++)
3778 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3779 AC_PINCTL_IN_EN);
f73d3585
TI		 3780 if (cfg->dig_out_pin)
3781 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3782 AC_PINCTL_OUT_EN);
3783 if (cfg->dig_in_pin)
3784 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3785 AC_PINCTL_IN_EN);
a64135a2 3786 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 3787 hda_nid_t nid = spec->pwr_nids[i];
3788 int pinctl, def_conf;
3789 int event = STAC_PWR_EVENT;
3790
3791 if (is_nid_hp_pin(cfg, nid) && spec->hp_detect)
3792 continue; /* already has an unsol event */
3793
3794 pinctl = snd_hda_codec_read(codec, nid, 0,
3795 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 3796 /* outputs are only ports capable of power management
3797 * any attempts on powering down a input port cause the
3798 * referenced VREF to act quirky.
3799 */
3800 if (pinctl & AC_PINCTL_IN_EN)
3801 continue;
f73d3585
TI		 3802 def_conf = snd_hda_codec_read(codec, nid, 0,
3803 AC_VERB_GET_CONFIG_DEFAULT, 0);
3804 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 3805 /* skip any ports that don't have jacks since presence
3806 * detection is useless */
f73d3585
TI		 3807 if (def_conf != AC_JACK_PORT_COMPLEX) {
3808 if (def_conf != AC_JACK_PORT_NONE)
3809 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 3810 continue;
f73d3585 3811 }
a64135a2
MR		 3812 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3813 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3814 }
b76c850f
MR		 3815 if (spec->dac_list)
3816 stac92xx_power_down(codec);
c7d4b2fa
M		 3817 return 0;
3818}
3819
2f2f4251
M		 3820static void stac92xx_free(struct hda_codec *codec)
3821{
c7d4b2fa
M		 3822 struct sigmatel_spec *spec = codec->spec;
3823 int i;
3824
3825 if (! spec)
3826 return;
3827
3828 if (spec->kctl_alloc) {
3829 for (i = 0; i < spec->num_kctl_used; i++)
3830 kfree(spec->kctl_alloc[i].name);
3831 kfree(spec->kctl_alloc);
3832 }
3833
11b44bbd
RF		 3834 if (spec->bios_pin_configs)
3835 kfree(spec->bios_pin_configs);
3836
c7d4b2fa 3837 kfree(spec);
1cd2224c 3838 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3839}
3840
4e55096e
M		 3841static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3842 unsigned int flag)
3843{
3844 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3845 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3846
f9acba43
TI		 3847 if (pin_ctl & AC_PINCTL_IN_EN) {
3848 /*
3849 * we need to check the current set-up direction of
3850 * shared input pins since they can be switched via
3851 * "xxx as Output" mixer switch
3852 */
3853 struct sigmatel_spec *spec = codec->spec;
3854 struct auto_pin_cfg *cfg = &spec->autocfg;
3855 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3856 spec->line_switch) ||
3857 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3858 spec->mic_switch))
3859 return;
3860 }
3861
7b043899
SL		 3862 /* if setting pin direction bits, clear the current
3863 direction bits first */
3864 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3865 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3866
82beb8fd 3867 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3868 AC_VERB_SET_PIN_WIDGET_CONTROL,
3869 pin_ctl | flag);
3870}
3871
3872static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3873 unsigned int flag)
3874{
3875 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3876 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3877 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3878 AC_VERB_SET_PIN_WIDGET_CONTROL,
3879 pin_ctl & ~flag);
3880}
3881
40c1d308 3882static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3883{
3884 if (!nid)
3885 return 0;
3886 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3887 & (1 << 31)) {
3888 unsigned int pinctl;
3889 pinctl = snd_hda_codec_read(codec, nid, 0,
3890 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3891 if (pinctl & AC_PINCTL_IN_EN)
3892 return 0; /* mic- or line-input */
3893 else
3894 return 1; /* HP-output */
3895 }
314634bc
TI		 3896 return 0;
3897}
3898
d7a89436
TI		 3899/* return non-zero if the hp-pin of the given array index isn't
3900 * a jack-detection target
3901 */
3902static int no_hp_sensing(struct sigmatel_spec *spec, int i)
3903{
3904 struct auto_pin_cfg *cfg = &spec->autocfg;
3905
3906 /* ignore sensing of shared line and mic jacks */
3907 if (spec->line_switch &&
3908 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_LINE])
3909 return 1;
3910 if (spec->mic_switch &&
3911 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_MIC])
3912 return 1;
3913 /* ignore if the pin is set as line-out */
3914 if (cfg->hp_pins[i] == spec->hp_switch)
3915 return 1;
3916 return 0;
3917}
3918
314634bc 3919static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3920{
3921 struct sigmatel_spec *spec = codec->spec;
3922 struct auto_pin_cfg *cfg = &spec->autocfg;
3923 int i, presence;
3924
eb06ed8f 3925 presence = 0;
4fe5195c
MR		 3926 if (spec->gpio_mute)
3927 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3928 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3929
eb06ed8f 3930 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3931 if (presence)
3932 break;
d7a89436
TI		 3933 if (no_hp_sensing(spec, i))
3934 continue;
4fe5195c 3935 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3936 }
4e55096e
M		 3937
3938 if (presence) {
d7a89436 3939 /* disable lineouts */
7c2ba97b 3940 if (spec->hp_switch)
d7a89436
TI		 3941 stac92xx_reset_pinctl(codec, spec->hp_switch,
3942 AC_PINCTL_OUT_EN);
4e55096e
M		 3943 for (i = 0; i < cfg->line_outs; i++)
3944 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3945 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3946 for (i = 0; i < cfg->speaker_outs; i++)
3947 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3948 AC_PINCTL_OUT_EN);
0253fdcd 3949 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 3950 stac_gpio_set(codec, spec->gpio_mask,
3951 spec->gpio_dir, spec->gpio_data &
3952 ~spec->eapd_mask);
4e55096e 3953 } else {
d7a89436 3954 /* enable lineouts */
7c2ba97b 3955 if (spec->hp_switch)
d7a89436
TI		 3956 stac92xx_set_pinctl(codec, spec->hp_switch,
3957 AC_PINCTL_OUT_EN);
4e55096e
M		 3958 for (i = 0; i < cfg->line_outs; i++)
3959 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3960 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3961 for (i = 0; i < cfg->speaker_outs; i++)
3962 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3963 AC_PINCTL_OUT_EN);
0253fdcd 3964 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 3965 stac_gpio_set(codec, spec->gpio_mask,
3966 spec->gpio_dir, spec->gpio_data |
3967 spec->eapd_mask);
4e55096e 3968 }
d7a89436
TI		 3969 /* toggle hp outs */
3970 for (i = 0; i < cfg->hp_outs; i++) {
3971 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
3972 if (no_hp_sensing(spec, i))
3973 continue;
3974 if (presence)
3975 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
3976 else
3977 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
3978 }
4e55096e
M		 3979}
3980
f73d3585
TI		 3981static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3982 int enable)
a64135a2
MR		 3983{
3984 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 3985 unsigned int idx, val;
3986
3987 for (idx = 0; idx < spec->num_pwrs; idx++) {
3988 if (spec->pwr_nids[idx] == nid)
3989 break;
3990 }
3991 if (idx >= spec->num_pwrs)
3992 return;
d0513fc6
MR		 3993
3994 /* several codecs have two power down bits */
3995 if (spec->pwr_mapping)
3996 idx = spec->pwr_mapping[idx];
3997 else
3998 idx = 1 << idx;
a64135a2 3999
f73d3585
TI		 4000 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4001 if (enable)
a64135a2
MR		 4002 val &= ~idx;
4003 else
4004 val |= idx;
4005
4006 /* power down unused output ports */
4007 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
f73d3585
TI		 4008}
4009
4010static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4011{
4012 stac_toggle_power_map(codec, nid, get_hp_pin_presence(codec, nid));
4013}
a64135a2 4014
314634bc
TI		 4015static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4016{
a64135a2
MR		 4017 struct sigmatel_spec *spec = codec->spec;
4018 int idx = res >> 26 & 0x0f;
4019
72474be6 4020 switch ((res >> 26) & 0x70) {
314634bc
TI		 4021 case STAC_HP_EVENT:
4022 stac92xx_hp_detect(codec, res);
a64135a2
MR		 4023 /* fallthru */
4024 case STAC_PWR_EVENT:
4025 if (spec->num_pwrs > 0)
4026 stac92xx_pin_sense(codec, idx);
72474be6
MR		 4027 break;
4028 case STAC_VREF_EVENT: {
4029 int data = snd_hda_codec_read(codec, codec->afg, 0,
4030 AC_VERB_GET_GPIO_DATA, 0);
4031 /* toggle VREF state based on GPIOx status */
4032 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
4033 !!(data & (1 << idx)));
4034 break;
4035 }
314634bc
TI		 4036 }
4037}
4038
cb53c626 4039#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4040static int stac92xx_resume(struct hda_codec *codec)
4041{
dc81bed1
TI		 4042 struct sigmatel_spec *spec = codec->spec;
4043
11b44bbd 4044 stac92xx_set_config_regs(codec);
dc81bed1 4045 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 4046 stac_gpio_set(codec, spec->gpio_mask,
4047 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 4048 snd_hda_codec_resume_amp(codec);
4049 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 4050 /* power down inactive DACs */
4051 if (spec->dac_list)
4052 stac92xx_power_down(codec);
dc81bed1
TI		 4053 /* invoke unsolicited event to reset the HP state */
4054 if (spec->hp_detect)
4055 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 4056 return 0;
4057}
4058#endif
4059
2f2f4251
M		 4060static struct hda_codec_ops stac92xx_patch_ops = {
4061 .build_controls = stac92xx_build_controls,
4062 .build_pcms = stac92xx_build_pcms,
4063 .init = stac92xx_init,
4064 .free = stac92xx_free,
4e55096e 4065 .unsol_event = stac92xx_unsol_event,
cb53c626 4066#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4067 .resume = stac92xx_resume,
4068#endif
2f2f4251
M		 4069};
4070
4071static int patch_stac9200(struct hda_codec *codec)
4072{
4073 struct sigmatel_spec *spec;
c7d4b2fa 4074 int err;
2f2f4251 4075
e560d8d8 4076 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4077 if (spec == NULL)
4078 return -ENOMEM;
4079
4080 codec->spec = spec;
a4eed138 4081 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4082 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4083 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4084 stac9200_models,
4085 stac9200_cfg_tbl);
11b44bbd
RF		 4086 if (spec->board_config < 0) {
4087 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4088 err = stac92xx_save_bios_config_regs(codec);
4089 if (err < 0) {
4090 stac92xx_free(codec);
4091 return err;
4092 }
4093 spec->pin_configs = spec->bios_pin_configs;
4094 } else {
403d1944
MP		 4095 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
4096 stac92xx_set_config_regs(codec);
4097 }
2f2f4251
M		 4098
4099 spec->multiout.max_channels = 2;
4100 spec->multiout.num_dacs = 1;
4101 spec->multiout.dac_nids = stac9200_dac_nids;
4102 spec->adc_nids = stac9200_adc_nids;
4103 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4104 spec->num_muxes = 1;
8b65727b 4105 spec->num_dmics = 0;
9e05b7a3 4106 spec->num_adcs = 1;
a64135a2 4107 spec->num_pwrs = 0;
c7d4b2fa 4108
bf277785
TD		 4109 if (spec->board_config == STAC_9200_GATEWAY ||
4110 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4111 spec->init = stac9200_eapd_init;
4112 else
4113 spec->init = stac9200_core_init;
2f2f4251 4114 spec->mixer = stac9200_mixer;
c7d4b2fa 4115
117f257d
TI		 4116 if (spec->board_config == STAC_9200_PANASONIC) {
4117 spec->gpio_mask = spec->gpio_dir = 0x09;
4118 spec->gpio_data = 0x00;
4119 }
4120
c7d4b2fa
M		 4121 err = stac9200_parse_auto_config(codec);
4122 if (err < 0) {
4123 stac92xx_free(codec);
4124 return err;
4125 }
2f2f4251
M		 4126
4127 codec->patch_ops = stac92xx_patch_ops;
4128
4129 return 0;
4130}
4131
8e21c34c
TD		 4132static int patch_stac925x(struct hda_codec *codec)
4133{
4134 struct sigmatel_spec *spec;
4135 int err;
4136
4137 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4138 if (spec == NULL)
4139 return -ENOMEM;
4140
4141 codec->spec = spec;
a4eed138 4142 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 4143 spec->pin_nids = stac925x_pin_nids;
4144 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
4145 stac925x_models,
4146 stac925x_cfg_tbl);
9e507abd 4147 again:
8e21c34c 4148 if (spec->board_config < 0) {
2c11f955
TD		 4149 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
4150 "using BIOS defaults\n");
8e21c34c
TD		 4151 err = stac92xx_save_bios_config_regs(codec);
4152 if (err < 0) {
4153 stac92xx_free(codec);
4154 return err;
4155 }
4156 spec->pin_configs = spec->bios_pin_configs;
4157 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
4158 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
4159 stac92xx_set_config_regs(codec);
4160 }
4161
4162 spec->multiout.max_channels = 2;
4163 spec->multiout.num_dacs = 1;
4164 spec->multiout.dac_nids = stac925x_dac_nids;
4165 spec->adc_nids = stac925x_adc_nids;
4166 spec->mux_nids = stac925x_mux_nids;
4167 spec->num_muxes = 1;
9e05b7a3 4168 spec->num_adcs = 1;
a64135a2 4169 spec->num_pwrs = 0;
2c11f955
TD		 4170 switch (codec->vendor_id) {
4171 case 0x83847632: /* STAC9202 */
4172 case 0x83847633: /* STAC9202D */
4173 case 0x83847636: /* STAC9251 */
4174 case 0x83847637: /* STAC9251D */
f6e9852a 4175 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4176 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4177 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4178 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4179 break;
4180 default:
4181 spec->num_dmics = 0;
4182 break;
4183 }
8e21c34c
TD		 4184
4185 spec->init = stac925x_core_init;
4186 spec->mixer = stac925x_mixer;
4187
4188 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4189 if (!err) {
4190 if (spec->board_config < 0) {
4191 printk(KERN_WARNING "hda_codec: No auto-config is "
4192 "available, default to model=ref\n");
4193 spec->board_config = STAC_925x_REF;
4194 goto again;
4195 }
4196 err = -EINVAL;
4197 }
8e21c34c
TD		 4198 if (err < 0) {
4199 stac92xx_free(codec);
4200 return err;
4201 }
4202
4203 codec->patch_ops = stac92xx_patch_ops;
4204
4205 return 0;
4206}
4207
e1f0d669
MR		 4208static struct hda_input_mux stac92hd73xx_dmux = {
4209 .num_items = 4,
4210 .items = {
4211 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4212 { "Digital Mic 1", 0x09 },
4213 { "Digital Mic 2", 0x0a },
2a9c7816 4214 { "CD", 0x08 },
e1f0d669
MR		 4215 }
4216};
4217
4218static int patch_stac92hd73xx(struct hda_codec *codec)
4219{
4220 struct sigmatel_spec *spec;
4221 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4222 int err = 0;
4223
4224 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4225 if (spec == NULL)
4226 return -ENOMEM;
4227
4228 codec->spec = spec;
e99d32b3 4229 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4230 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4231 spec->pin_nids = stac92hd73xx_pin_nids;
4232 spec->board_config = snd_hda_check_board_config(codec,
4233 STAC_92HD73XX_MODELS,
4234 stac92hd73xx_models,
4235 stac92hd73xx_cfg_tbl);
4236again:
4237 if (spec->board_config < 0) {
4238 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4239 " STAC92HD73XX, using BIOS defaults\n");
4240 err = stac92xx_save_bios_config_regs(codec);
4241 if (err < 0) {
4242 stac92xx_free(codec);
4243 return err;
4244 }
4245 spec->pin_configs = spec->bios_pin_configs;
4246 } else {
4247 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
4248 stac92xx_set_config_regs(codec);
4249 }
4250
4251 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4252 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4253
4254 if (spec->multiout.num_dacs < 0) {
4255 printk(KERN_WARNING "hda_codec: Could not determine "
4256 "number of channels defaulting to DAC count\n");
4257 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4258 }
4259
4260 switch (spec->multiout.num_dacs) {
4261 case 0x3: /* 6 Channel */
85f13b67 4262 spec->multiout.hp_nid = 0x17;
e1f0d669
MR		 4263 spec->mixer = stac92hd73xx_6ch_mixer;
4264 spec->init = stac92hd73xx_6ch_core_init;
4265 break;
4266 case 0x4: /* 8 Channel */
85f13b67 4267 spec->multiout.hp_nid = 0x18;
e1f0d669
MR		 4268 spec->mixer = stac92hd73xx_8ch_mixer;
4269 spec->init = stac92hd73xx_8ch_core_init;
4270 break;
4271 case 0x5: /* 10 Channel */
85f13b67 4272 spec->multiout.hp_nid = 0x19;
e1f0d669
MR		 4273 spec->mixer = stac92hd73xx_10ch_mixer;
4274 spec->init = stac92hd73xx_10ch_core_init;
4275 };
4276
4277 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4278 spec->aloopback_mask = 0x01;
4279 spec->aloopback_shift = 8;
4280
1cd2224c 4281 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4282 spec->mux_nids = stac92hd73xx_mux_nids;
4283 spec->adc_nids = stac92hd73xx_adc_nids;
4284 spec->dmic_nids = stac92hd73xx_dmic_nids;
4285 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4286 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4287 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4288 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4289
4290 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4291 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4292 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4293 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4294 sizeof(stac92hd73xx_dmux));
4295
a7662640 4296 switch (spec->board_config) {
6b3ab21e 4297 case STAC_DELL_EQ:
d654a660 4298 spec->init = dell_eq_core_init;
6b3ab21e 4299 /* fallthru */
661cd8fb
TI		 4300 case STAC_DELL_M6_AMIC:
4301 case STAC_DELL_M6_DMIC:
4302 case STAC_DELL_M6_BOTH:
2a9c7816 4303 spec->num_smuxes = 0;
2a9c7816
MR		 4304 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4305 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
0253fdcd 4306 spec->eapd_switch = 0;
2a9c7816 4307 spec->num_amps = 1;
6b3ab21e
MR		 4308
4309 if (!spec->init)
4310 spec->init = dell_m6_core_init;
661cd8fb
TI		 4311 switch (spec->board_config) {
4312 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR		 4313 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4314 spec->num_dmics = 0;
2a9c7816 4315 spec->private_dimux.num_items = 1;
a7662640 4316 break;
661cd8fb 4317 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR		 4318 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4319 spec->num_dmics = 1;
2a9c7816 4320 spec->private_dimux.num_items = 2;
a7662640 4321 break;
661cd8fb 4322 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR		 4323 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4324 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4325 spec->num_dmics = 1;
2a9c7816 4326 spec->private_dimux.num_items = 2;
a7662640
MR		 4327 break;
4328 }
4329 break;
4330 default:
4331 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4332 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
0253fdcd 4333 spec->eapd_switch = 1;
a7662640 4334 }
b2c4f4d7
MR		 4335 if (spec->board_config > STAC_92HD73XX_REF) {
4336 /* GPIO0 High = Enable EAPD */
4337 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4338 spec->gpio_data = 0x01;
4339 }
2a9c7816 4340 spec->dinput_mux = &spec->private_dimux;
a7662640 4341
a64135a2
MR		 4342 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4343 spec->pwr_nids = stac92hd73xx_pwr_nids;
4344
d9737751 4345 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4346
4347 if (!err) {
4348 if (spec->board_config < 0) {
4349 printk(KERN_WARNING "hda_codec: No auto-config is "
4350 "available, default to model=ref\n");
4351 spec->board_config = STAC_92HD73XX_REF;
4352 goto again;
4353 }
4354 err = -EINVAL;
4355 }
4356
4357 if (err < 0) {
4358 stac92xx_free(codec);
4359 return err;
4360 }
4361
4362 codec->patch_ops = stac92xx_patch_ops;
4363
4364 return 0;
4365}
4366
d0513fc6
MR		 4367static struct hda_input_mux stac92hd83xxx_dmux = {
4368 .num_items = 3,
4369 .items = {
4370 { "Analog Inputs", 0x03 },
4371 { "Digital Mic 1", 0x04 },
4372 { "Digital Mic 2", 0x05 },
4373 }
4374};
4375
4376static int patch_stac92hd83xxx(struct hda_codec *codec)
4377{
4378 struct sigmatel_spec *spec;
4379 int err;
4380
4381 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4382 if (spec == NULL)
4383 return -ENOMEM;
4384
4385 codec->spec = spec;
0ffa9807 4386 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4387 spec->mono_nid = 0x19;
4388 spec->digbeep_nid = 0x21;
4389 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4390 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4391 spec->adc_nids = stac92hd83xxx_adc_nids;
4392 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4393 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4394 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4395 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4396
4397 spec->init = stac92hd83xxx_core_init;
4398 switch (codec->vendor_id) {
4399 case 0x111d7605:
4400 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4401 break;
4402 default:
4403 spec->num_pwrs--;
4404 spec->init++; /* switch to config #2 */
4405 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4406 }
4407
4408 spec->mixer = stac92hd83xxx_mixer;
4409 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4410 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4411 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4412 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4413 spec->dinput_mux = &stac92hd83xxx_dmux;
4414 spec->pin_nids = stac92hd83xxx_pin_nids;
4415 spec->board_config = snd_hda_check_board_config(codec,
4416 STAC_92HD83XXX_MODELS,
4417 stac92hd83xxx_models,
4418 stac92hd83xxx_cfg_tbl);
4419again:
4420 if (spec->board_config < 0) {
4421 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4422 " STAC92HD83XXX, using BIOS defaults\n");
4423 err = stac92xx_save_bios_config_regs(codec);
4424 if (err < 0) {
4425 stac92xx_free(codec);
4426 return err;
4427 }
4428 spec->pin_configs = spec->bios_pin_configs;
4429 } else {
4430 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
4431 stac92xx_set_config_regs(codec);
4432 }
4433
4434 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4435 if (!err) {
4436 if (spec->board_config < 0) {
4437 printk(KERN_WARNING "hda_codec: No auto-config is "
4438 "available, default to model=ref\n");
4439 spec->board_config = STAC_92HD83XXX_REF;
4440 goto again;
4441 }
4442 err = -EINVAL;
4443 }
4444
4445 if (err < 0) {
4446 stac92xx_free(codec);
4447 return err;
4448 }
4449
4450 codec->patch_ops = stac92xx_patch_ops;
4451
4452 return 0;
4453}
4454
8daaaa97
MR		 4455#ifdef SND_HDA_NEEDS_RESUME
4456static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4457{
4458 struct sigmatel_spec *spec = codec->spec;
4459 int i;
4460 snd_hda_codec_write_cache(codec, codec->afg, 0,
4461 AC_VERB_SET_POWER_STATE, pwr);
4462
4463 msleep(1);
4464 for (i = 0; i < spec->num_adcs; i++) {
4465 snd_hda_codec_write_cache(codec,
4466 spec->adc_nids[i], 0,
4467 AC_VERB_SET_POWER_STATE, pwr);
4468 }
4469};
4470
4471static int stac92hd71xx_resume(struct hda_codec *codec)
4472{
4473 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4474 return stac92xx_resume(codec);
4475}
4476
4477static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4478{
0253fdcd
MR		 4479 struct sigmatel_spec *spec = codec->spec;
4480
8daaaa97 4481 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
0253fdcd
MR		 4482 if (spec->eapd_mask)
4483 stac_gpio_set(codec, spec->gpio_mask,
4484 spec->gpio_dir, spec->gpio_data &
4485 ~spec->eapd_mask);
8daaaa97
MR		 4486 return 0;
4487};
4488
4489#endif
4490
4491static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4492 .build_controls = stac92xx_build_controls,
4493 .build_pcms = stac92xx_build_pcms,
4494 .init = stac92xx_init,
4495 .free = stac92xx_free,
4496 .unsol_event = stac92xx_unsol_event,
4497#ifdef SND_HDA_NEEDS_RESUME
4498 .resume = stac92hd71xx_resume,
4499 .suspend = stac92hd71xx_suspend,
4500#endif
4501};
d0513fc6 4502
4b33c767
MR		 4503static struct hda_input_mux stac92hd71bxx_dmux = {
4504 .num_items = 4,
4505 .items = {
4506 { "Analog Inputs", 0x00 },
4507 { "Mixer", 0x01 },
4508 { "Digital Mic 1", 0x02 },
4509 { "Digital Mic 2", 0x03 },
4510 }
4511};
4512
e035b841
MR		 4513static int patch_stac92hd71bxx(struct hda_codec *codec)
4514{
4515 struct sigmatel_spec *spec;
4516 int err = 0;
4517
4518 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4519 if (spec == NULL)
4520 return -ENOMEM;
4521
4522 codec->spec = spec;
8daaaa97 4523 codec->patch_ops = stac92xx_patch_ops;
e035b841 4524 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4525 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4526 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4527 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4528 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4529 spec->board_config = snd_hda_check_board_config(codec,
4530 STAC_92HD71BXX_MODELS,
4531 stac92hd71bxx_models,
4532 stac92hd71bxx_cfg_tbl);
4533again:
4534 if (spec->board_config < 0) {
4535 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4536 " STAC92HD71BXX, using BIOS defaults\n");
4537 err = stac92xx_save_bios_config_regs(codec);
4538 if (err < 0) {
4539 stac92xx_free(codec);
4540 return err;
4541 }
4542 spec->pin_configs = spec->bios_pin_configs;
4543 } else {
4544 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
4545 stac92xx_set_config_regs(codec);
4546 }
4547
41c3b648
TI		 4548 if (spec->board_config > STAC_92HD71BXX_REF) {
4549 /* GPIO0 = EAPD */
4550 spec->gpio_mask = 0x01;
4551 spec->gpio_dir = 0x01;
4552 spec->gpio_data = 0x01;
4553 }
4554
541eee87
MR		 4555 switch (codec->vendor_id) {
4556 case 0x111d76b6: /* 4 Port without Analog Mixer */
4557 case 0x111d76b7:
4558 case 0x111d76b4: /* 6 Port without Analog Mixer */
4559 case 0x111d76b5:
4560 spec->mixer = stac92hd71bxx_mixer;
4561 spec->init = stac92hd71bxx_core_init;
0ffa9807 4562 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4563 break;
aafc4412 4564 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4565 switch (spec->board_config) {
4566 case STAC_HP_M4:
72474be6 4567 /* Enable VREF power saving on GPIO1 detect */
c5d08bb5 4568 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4569 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4570 snd_hda_codec_write_cache(codec, codec->afg, 0,
4571 AC_VERB_SET_UNSOLICITED_ENABLE,
4572 (AC_USRSP_EN | STAC_VREF_EVENT | 0x01));
4573 spec->gpio_mask |= 0x02;
4574 break;
4575 }
8daaaa97
MR		 4576 if ((codec->revision_id & 0xf) == 0 ||
4577 (codec->revision_id & 0xf) == 1) {
4578#ifdef SND_HDA_NEEDS_RESUME
4579 codec->patch_ops = stac92hd71bxx_patch_ops;
4580#endif
4581 spec->stream_delay = 40; /* 40 milliseconds */
4582 }
4583
aafc4412
MR		 4584 /* no output amps */
4585 spec->num_pwrs = 0;
4586 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4587 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4588
4589 /* disable VSW */
4590 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
4591 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
4592 break;
4593 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4594 if ((codec->revision_id & 0xf) == 1) {
4595#ifdef SND_HDA_NEEDS_RESUME
4596 codec->patch_ops = stac92hd71bxx_patch_ops;
4597#endif
4598 spec->stream_delay = 40; /* 40 milliseconds */
4599 }
4600
aafc4412
MR		 4601 /* no output amps */
4602 spec->num_pwrs = 0;
4603 /* fallthru */
541eee87 4604 default:
4b33c767 4605 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4606 spec->mixer = stac92hd71bxx_analog_mixer;
4607 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4608 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4609 }
4610
4b33c767 4611 spec->aloopback_mask = 0x50;
541eee87
MR		 4612 spec->aloopback_shift = 0;
4613
8daaaa97 4614 spec->powerdown_adcs = 1;
1cd2224c 4615 spec->digbeep_nid = 0x26;
e035b841
MR		 4616 spec->mux_nids = stac92hd71bxx_mux_nids;
4617 spec->adc_nids = stac92hd71bxx_adc_nids;
4618 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4619 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4620 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4621 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4622
4623 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4624 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4625
6a14f585
MR		 4626 switch (spec->board_config) {
4627 case STAC_HP_M4:
6a14f585 4628 /* enable internal microphone */
b9aea715
MR		 4629 stac92xx_set_config_reg(codec, 0x0e, 0x01813040);
4630 stac92xx_auto_set_pinctl(codec, 0x0e,
4631 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4632 /* fallthru */
4633 case STAC_DELL_M4_2:
4634 spec->num_dmics = 0;
4635 spec->num_smuxes = 0;
4636 spec->num_dmuxes = 0;
4637 break;
4638 case STAC_DELL_M4_1:
4639 case STAC_DELL_M4_3:
4640 spec->num_dmics = 1;
4641 spec->num_smuxes = 0;
4642 spec->num_dmuxes = 0;
6a14f585
MR		 4643 break;
4644 default:
4645 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4646 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4647 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4648 };
4649
aea7bb0a 4650 spec->multiout.num_dacs = 1;
e035b841
MR		 4651 spec->multiout.hp_nid = 0x11;
4652 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4b33c767
MR		 4653 if (spec->dinput_mux)
4654 spec->private_dimux.num_items +=
4655 spec->num_dmics -
4656 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4657
4658 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4659 if (!err) {
4660 if (spec->board_config < 0) {
4661 printk(KERN_WARNING "hda_codec: No auto-config is "
4662 "available, default to model=ref\n");
4663 spec->board_config = STAC_92HD71BXX_REF;
4664 goto again;
4665 }
4666 err = -EINVAL;
4667 }
4668
4669 if (err < 0) {
4670 stac92xx_free(codec);
4671 return err;
4672 }
4673
e035b841
MR		 4674 return 0;
4675};
4676
2f2f4251
M		 4677static int patch_stac922x(struct hda_codec *codec)
4678{
4679 struct sigmatel_spec *spec;
c7d4b2fa 4680 int err;
2f2f4251 4681
e560d8d8 4682 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4683 if (spec == NULL)
4684 return -ENOMEM;
4685
4686 codec->spec = spec;
a4eed138 4687 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4688 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4689 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4690 stac922x_models,
4691 stac922x_cfg_tbl);
536319af 4692 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4693 spec->gpio_mask = spec->gpio_dir = 0x03;
4694 spec->gpio_data = 0x03;
3fc24d85
TI		 4695 /* Intel Macs have all same PCI SSID, so we need to check
4696 * codec SSID to distinguish the exact models
4697 */
6f0778d8 4698 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4699 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4700
4701 case 0x106b0800:
4702 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4703 break;
5d5d3bc3
IZ		 4704 case 0x106b0600:
4705 case 0x106b0700:
4706 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4707 break;
5d5d3bc3
IZ		 4708 case 0x106b0e00:
4709 case 0x106b0f00:
4710 case 0x106b1600:
4711 case 0x106b1700:
4712 case 0x106b0200:
4713 case 0x106b1e00:
4714 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4715 break;
5d5d3bc3
IZ		 4716 case 0x106b1a00:
4717 case 0x00000100:
4718 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4719 break;
5d5d3bc3
IZ		 4720 case 0x106b0a00:
4721 case 0x106b2200:
4722 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4723 break;
536319af
NB		 4724 default:
4725 spec->board_config = STAC_INTEL_MAC_V3;
4726 break;
3fc24d85
TI		 4727 }
4728 }
4729
9e507abd 4730 again:
11b44bbd
RF		 4731 if (spec->board_config < 0) {
4732 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4733 "using BIOS defaults\n");
4734 err = stac92xx_save_bios_config_regs(codec);
4735 if (err < 0) {
4736 stac92xx_free(codec);
4737 return err;
4738 }
4739 spec->pin_configs = spec->bios_pin_configs;
4740 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4741 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4742 stac92xx_set_config_regs(codec);
4743 }
2f2f4251 4744
c7d4b2fa
M		 4745 spec->adc_nids = stac922x_adc_nids;
4746 spec->mux_nids = stac922x_mux_nids;
2549413e 4747 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4748 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4749 spec->num_dmics = 0;
a64135a2 4750 spec->num_pwrs = 0;
c7d4b2fa
M		 4751
4752 spec->init = stac922x_core_init;
2f2f4251 4753 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4754
4755 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4756
3cc08dc6 4757 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4758 if (!err) {
4759 if (spec->board_config < 0) {
4760 printk(KERN_WARNING "hda_codec: No auto-config is "
4761 "available, default to model=ref\n");
4762 spec->board_config = STAC_D945_REF;
4763 goto again;
4764 }
4765 err = -EINVAL;
4766 }
3cc08dc6
MP		 4767 if (err < 0) {
4768 stac92xx_free(codec);
4769 return err;
4770 }
4771
4772 codec->patch_ops = stac92xx_patch_ops;
4773
807a4636
TI		 4774 /* Fix Mux capture level; max to 2 */
4775 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4776 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4777 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4778 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4779 (0 << AC_AMPCAP_MUTE_SHIFT));
4780
3cc08dc6
MP		 4781 return 0;
4782}
4783
4784static int patch_stac927x(struct hda_codec *codec)
4785{
4786 struct sigmatel_spec *spec;
4787 int err;
4788
4789 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4790 if (spec == NULL)
4791 return -ENOMEM;
4792
4793 codec->spec = spec;
a4eed138 4794 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4795 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4796 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4797 stac927x_models,
4798 stac927x_cfg_tbl);
9e507abd 4799 again:
8e9068b1
MR		 4800 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4801 if (spec->board_config < 0)
4802 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4803 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4804 err = stac92xx_save_bios_config_regs(codec);
4805 if (err < 0) {
4806 stac92xx_free(codec);
4807 return err;
4808 }
4809 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4810 } else {
3cc08dc6
MP		 4811 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4812 stac92xx_set_config_regs(codec);
4813 }
4814
1cd2224c 4815 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4816 spec->adc_nids = stac927x_adc_nids;
4817 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4818 spec->mux_nids = stac927x_mux_nids;
4819 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4820 spec->smux_nids = stac927x_smux_nids;
4821 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 4822 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 4823 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4824 spec->multiout.dac_nids = spec->dac_nids;
4825
81d3dbde 4826 switch (spec->board_config) {
93ed1503 4827 case STAC_D965_3ST:
93ed1503 4828 case STAC_D965_5ST:
8e9068b1 4829 /* GPIO0 High = Enable EAPD */
0fc9dec4 4830 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4831 spec->gpio_data = 0x01;
8e9068b1
MR		 4832 spec->num_dmics = 0;
4833
93ed1503 4834 spec->init = d965_core_init;
9e05b7a3 4835 spec->mixer = stac927x_mixer;
81d3dbde 4836 break;
8e9068b1 4837 case STAC_DELL_BIOS:
780c8be4
MR		 4838 switch (codec->subsystem_id) {
4839 case 0x10280209:
4840 case 0x1028022e:
4841 /* correct the device field to SPDIF out */
4842 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4843 break;
4844 };
03d7ca17
MR		 4845 /* configure the analog microphone on some laptops */
4846 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4847 /* correct the front output jack as a hp out */
7989fba9 4848 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4849 /* correct the front input jack as a mic */
4850 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4851 /* fallthru */
8e9068b1
MR		 4852 case STAC_DELL_3ST:
4853 /* GPIO2 High = Enable EAPD */
0fc9dec4 4854 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4855 spec->gpio_data = 0x04;
7f16859a
MR		 4856 spec->dmic_nids = stac927x_dmic_nids;
4857 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4858
8e9068b1
MR		 4859 spec->init = d965_core_init;
4860 spec->mixer = stac927x_mixer;
4861 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4862 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4863 break;
4864 default:
b2c4f4d7
MR		 4865 if (spec->board_config > STAC_D965_REF) {
4866 /* GPIO0 High = Enable EAPD */
4867 spec->eapd_mask = spec->gpio_mask = 0x01;
4868 spec->gpio_dir = spec->gpio_data = 0x01;
4869 }
8e9068b1
MR		 4870 spec->num_dmics = 0;
4871
4872 spec->init = stac927x_core_init;
4873 spec->mixer = stac927x_mixer;
7f16859a
MR		 4874 }
4875
a64135a2 4876 spec->num_pwrs = 0;
e1f0d669
MR		 4877 spec->aloopback_mask = 0x40;
4878 spec->aloopback_shift = 0;
0253fdcd 4879 spec->eapd_switch = 1;
8e9068b1 4880
3cc08dc6 4881 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4882 if (!err) {
4883 if (spec->board_config < 0) {
4884 printk(KERN_WARNING "hda_codec: No auto-config is "
4885 "available, default to model=ref\n");
4886 spec->board_config = STAC_D965_REF;
4887 goto again;
4888 }
4889 err = -EINVAL;
4890 }
c7d4b2fa
M		 4891 if (err < 0) {
4892 stac92xx_free(codec);
4893 return err;
4894 }
2f2f4251
M		 4895
4896 codec->patch_ops = stac92xx_patch_ops;
4897
52987656
TI		 4898 /*
4899 * !!FIXME!!
4900 * The STAC927x seem to require fairly long delays for certain
4901 * command sequences. With too short delays (even if the answer
4902 * is set to RIRB properly), it results in the silence output
4903 * on some hardwares like Dell.
4904 *
4905 * The below flag enables the longer delay (see get_response
4906 * in hda_intel.c).
4907 */
4908 codec->bus->needs_damn_long_delay = 1;
4909
e28d8322
TI		 4910 /* no jack detecion for ref-no-jd model */
4911 if (spec->board_config == STAC_D965_REF_NO_JD)
4912 spec->hp_detect = 0;
4913
2f2f4251
M		 4914 return 0;
4915}
4916
f3302a59
MP		 4917static int patch_stac9205(struct hda_codec *codec)
4918{
4919 struct sigmatel_spec *spec;
8259980e 4920 int err;
f3302a59
MP		 4921
4922 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4923 if (spec == NULL)
4924 return -ENOMEM;
4925
4926 codec->spec = spec;
a4eed138 4927 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4928 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4929 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4930 stac9205_models,
4931 stac9205_cfg_tbl);
9e507abd 4932 again:
11b44bbd
RF		 4933 if (spec->board_config < 0) {
4934 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4935 err = stac92xx_save_bios_config_regs(codec);
4936 if (err < 0) {
4937 stac92xx_free(codec);
4938 return err;
4939 }
4940 spec->pin_configs = spec->bios_pin_configs;
4941 } else {
f3302a59
MP		 4942 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4943 stac92xx_set_config_regs(codec);
4944 }
4945
1cd2224c 4946 spec->digbeep_nid = 0x23;
f3302a59 4947 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4948 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4949 spec->mux_nids = stac9205_mux_nids;
2549413e 4950 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 4951 spec->smux_nids = stac9205_smux_nids;
4952 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 4953 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4954 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4955 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4956 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4957 spec->num_pwrs = 0;
f3302a59
MP		 4958
4959 spec->init = stac9205_core_init;
4960 spec->mixer = stac9205_mixer;
4961
e1f0d669
MR		 4962 spec->aloopback_mask = 0x40;
4963 spec->aloopback_shift = 0;
0253fdcd 4964 spec->eapd_switch = 1;
f3302a59 4965 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4966
ae0a8ed8 4967 switch (spec->board_config){
ae0a8ed8 4968 case STAC_9205_DELL_M43:
87d48363
MR		 4969 /* Enable SPDIF in/out */
4970 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4971 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4972
4fe5195c 4973 /* Enable unsol response for GPIO4/Dock HP connection */
c5d08bb5 4974 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 4975 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4976 snd_hda_codec_write_cache(codec, codec->afg, 0,
4977 AC_VERB_SET_UNSOLICITED_ENABLE,
4978 (AC_USRSP_EN | STAC_HP_EVENT));
4979
4980 spec->gpio_dir = 0x0b;
0fc9dec4 4981 spec->eapd_mask = 0x01;
4fe5195c
MR		 4982 spec->gpio_mask = 0x1b;
4983 spec->gpio_mute = 0x10;
e2e7d624 4984 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4985 * GPIO3 Low = DRM
87d48363 4986 */
4fe5195c 4987 spec->gpio_data = 0x01;
ae0a8ed8 4988 break;
b2c4f4d7
MR		 4989 case STAC_9205_REF:
4990 /* SPDIF-In enabled */
4991 break;
ae0a8ed8
TD		 4992 default:
4993 /* GPIO0 High = EAPD */
0fc9dec4 4994 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4995 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4996 break;
4997 }
33382403 4998
f3302a59 4999 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5000 if (!err) {
5001 if (spec->board_config < 0) {
5002 printk(KERN_WARNING "hda_codec: No auto-config is "
5003 "available, default to model=ref\n");
5004 spec->board_config = STAC_9205_REF;
5005 goto again;
5006 }
5007 err = -EINVAL;
5008 }
f3302a59
MP		 5009 if (err < 0) {
5010 stac92xx_free(codec);
5011 return err;
5012 }
5013
5014 codec->patch_ops = stac92xx_patch_ops;
5015
5016 return 0;
5017}
5018
db064e50 5019/*
6d859065 5020 * STAC9872 hack
db064e50
TI		 5021 */
5022
99ccc560 5023/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 5024static hda_nid_t vaio_dacs[] = { 0x2 };
5025#define VAIO_HP_DAC 0x5
5026static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5027static hda_nid_t vaio_mux_nids[] = { 0x15 };
5028
5029static struct hda_input_mux vaio_mux = {
a3a2f429 5030 .num_items = 3,
db064e50 5031 .items = {
d773781c 5032 /* { "HP", 0x0 }, */
1624cb9a
TI		 5033 { "Mic Jack", 0x1 },
5034 { "Internal Mic", 0x2 },
db064e50
TI		 5035 { "PCM", 0x3 },
5036 }
5037};
5038
5039static struct hda_verb vaio_init[] = {
5040 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5041 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 5042 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5043 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5044 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5045 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5046 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 5047 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5048 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5049 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5050 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5051 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5052 {}
5053};
5054
6d859065
GM		 5055static struct hda_verb vaio_ar_init[] = {
5056 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5057 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5058 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5059 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5060/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5061 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5062 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5063 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5064 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5065/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5066 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5067 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5068 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5069 {}
5070};
5071
db064e50 5072/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 5073static struct hda_bind_ctls vaio_bind_master_vol = {
5074 .ops = &snd_hda_bind_vol,
5075 .values = {
5076 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
5077 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
5078 0
5079 },
5080};
db064e50
TI		 5081
5082/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 5083static struct hda_bind_ctls vaio_bind_master_sw = {
5084 .ops = &snd_hda_bind_sw,
5085 .values = {
5086 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
5087 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
5088 0,
5089 },
5090};
db064e50
TI		 5091
5092static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 5093 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
5094 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 5095 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5096 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5097 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5098 {
5099 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5100 .name = "Capture Source",
5101 .count = 1,
5102 .info = stac92xx_mux_enum_info,
5103 .get = stac92xx_mux_enum_get,
5104 .put = stac92xx_mux_enum_put,
5105 },
5106 {}
5107};
5108
6d859065 5109static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 5110 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
5111 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 5112 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5113 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5114 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5115 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5116 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5117 {
5118 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5119 .name = "Capture Source",
5120 .count = 1,
5121 .info = stac92xx_mux_enum_info,
5122 .get = stac92xx_mux_enum_get,
5123 .put = stac92xx_mux_enum_put,
5124 },
5125 {}
5126};
5127
5128static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5129 .build_controls = stac92xx_build_controls,
5130 .build_pcms = stac92xx_build_pcms,
5131 .init = stac92xx_init,
5132 .free = stac92xx_free,
cb53c626 5133#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5134 .resume = stac92xx_resume,
5135#endif
5136};
5137
72e7b0dd
TI		 5138static int stac9872_vaio_init(struct hda_codec *codec)
5139{
5140 int err;
5141
5142 err = stac92xx_init(codec);
5143 if (err < 0)
5144 return err;
5145 if (codec->patch_ops.unsol_event)
5146 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5147 return 0;
5148}
5149
5150static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5151{
40c1d308 5152 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5153 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5154 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5155 } else {
5156 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5157 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5158 }
5159}
5160
5161static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5162{
5163 switch (res >> 26) {
5164 case STAC_HP_EVENT:
5165 stac9872_vaio_hp_detect(codec, res);
5166 break;
5167 }
5168}
5169
5170static struct hda_codec_ops stac9872_vaio_patch_ops = {
5171 .build_controls = stac92xx_build_controls,
5172 .build_pcms = stac92xx_build_pcms,
5173 .init = stac9872_vaio_init,
5174 .free = stac92xx_free,
5175 .unsol_event = stac9872_vaio_unsol_event,
5176#ifdef CONFIG_PM
5177 .resume = stac92xx_resume,
5178#endif
5179};
5180
6d859065
GM		 5181enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5182 CXD9872RD_VAIO,
5183 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5184 STAC9872AK_VAIO,
5185 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5186 STAC9872K_VAIO,
5187 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5188 CXD9872AKD_VAIO,
5189 STAC_9872_MODELS,
5190};
5191
5192static const char *stac9872_models[STAC_9872_MODELS] = {
5193 [CXD9872RD_VAIO] = "vaio",
5194 [CXD9872AKD_VAIO] = "vaio-ar",
5195};
5196
5197static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5198 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5199 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5200 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5201 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5202 {}
5203};
5204
6d859065 5205static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5206{
5207 struct sigmatel_spec *spec;
5208 int board_config;
5209
f5fcc13c
TI		 5210 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5211 stac9872_models,
5212 stac9872_cfg_tbl);
db064e50
TI		 5213 if (board_config < 0)
5214 /* unknown config, let generic-parser do its job... */
5215 return snd_hda_parse_generic_codec(codec);
5216
5217 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5218 if (spec == NULL)
5219 return -ENOMEM;
5220
5221 codec->spec = spec;
5222 switch (board_config) {
6d859065
GM		 5223 case CXD9872RD_VAIO:
5224 case STAC9872AK_VAIO:
5225 case STAC9872K_VAIO:
db064e50
TI		 5226 spec->mixer = vaio_mixer;
5227 spec->init = vaio_init;
5228 spec->multiout.max_channels = 2;
5229 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5230 spec->multiout.dac_nids = vaio_dacs;
5231 spec->multiout.hp_nid = VAIO_HP_DAC;
5232 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5233 spec->adc_nids = vaio_adcs;
a64135a2 5234 spec->num_pwrs = 0;
db064e50
TI		 5235 spec->input_mux = &vaio_mux;
5236 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5237 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5238 break;
6d859065
GM		 5239
5240 case CXD9872AKD_VAIO:
5241 spec->mixer = vaio_ar_mixer;
5242 spec->init = vaio_ar_init;
5243 spec->multiout.max_channels = 2;
5244 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5245 spec->multiout.dac_nids = vaio_dacs;
5246 spec->multiout.hp_nid = VAIO_HP_DAC;
5247 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5248 spec->num_pwrs = 0;
6d859065
GM		 5249 spec->adc_nids = vaio_adcs;
5250 spec->input_mux = &vaio_mux;
5251 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5252 codec->patch_ops = stac9872_patch_ops;
6d859065 5253 break;
db064e50
TI		 5254 }
5255
db064e50
TI		 5256 return 0;
5257}
5258
5259
2f2f4251
M		 5260/*
5261 * patch entries
5262 */
5263struct hda_codec_preset snd_hda_preset_sigmatel[] = {
5264 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5265 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5266 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5267 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5268 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5269 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5270 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5271 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5272 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5273 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5274 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5275 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5276 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5277 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5278 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5279 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5280 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5281 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5282 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5283 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5284 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5285 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5286 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5287 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5288 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5289 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5290 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5291 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5292 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5293 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5294 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5295 /* The following does not take into account .id=0x83847661 when subsys =
5296 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5297 * currently not fully supported.
5298 */
5299 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5300 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5301 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5302 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5303 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5304 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5305 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5306 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5307 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5308 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5309 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5310 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5311 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5312 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5313 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5314 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5315 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5316 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5317 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5318 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5319 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5320 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5321 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5322 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5323 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5324 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5325 {} /* terminator */
5326};
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