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[ALSA] PCM interface - rename SNDRV_PCM_TSTAMP_MMAP to SNDRV_PCM_TSTAMP_ENABLE
[mirror_ubuntu-zesty-kernel.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
35
4e55096e 36#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 37#define STAC_PWR_EVENT 0x20
38#define STAC_HP_EVENT 0x30
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
dfe495d0
TI		 42 STAC_9200_DELL_D21,
43 STAC_9200_DELL_D22,
44 STAC_9200_DELL_D23,
45 STAC_9200_DELL_M21,
46 STAC_9200_DELL_M22,
47 STAC_9200_DELL_M23,
48 STAC_9200_DELL_M24,
49 STAC_9200_DELL_M25,
50 STAC_9200_DELL_M26,
51 STAC_9200_DELL_M27,
1194b5b7 52 STAC_9200_GATEWAY,
f5fcc13c
TI		 53 STAC_9200_MODELS
54};
55
56enum {
57 STAC_9205_REF,
dfe495d0 58 STAC_9205_DELL_M42,
ae0a8ed8
TD		 59 STAC_9205_DELL_M43,
60 STAC_9205_DELL_M44,
f5fcc13c
TI		 61 STAC_9205_MODELS
62};
63
e1f0d669
MR		 64enum {
65 STAC_92HD73XX_REF,
66 STAC_92HD73XX_MODELS
67};
68
e035b841
MR		 69enum {
70 STAC_92HD71BXX_REF,
71 STAC_92HD71BXX_MODELS
72};
73
8e21c34c
TD		 74enum {
75 STAC_925x_REF,
76 STAC_M2_2,
77 STAC_MA6,
2c11f955 78 STAC_PA6,
8e21c34c
TD		 79 STAC_925x_MODELS
80};
81
f5fcc13c
TI		 82enum {
83 STAC_D945_REF,
84 STAC_D945GTP3,
85 STAC_D945GTP5,
5d5d3bc3
IZ		 86 STAC_INTEL_MAC_V1,
87 STAC_INTEL_MAC_V2,
88 STAC_INTEL_MAC_V3,
89 STAC_INTEL_MAC_V4,
90 STAC_INTEL_MAC_V5,
dfe495d0 91 /* for backward compatibility */
f5fcc13c 92 STAC_MACMINI,
3fc24d85 93 STAC_MACBOOK,
6f0778d8
NB		 94 STAC_MACBOOK_PRO_V1,
95 STAC_MACBOOK_PRO_V2,
f16928fb 96 STAC_IMAC_INTEL,
0dae0f83 97 STAC_IMAC_INTEL_20,
dfe495d0
TI		 98 STAC_922X_DELL_D81,
99 STAC_922X_DELL_D82,
100 STAC_922X_DELL_M81,
101 STAC_922X_DELL_M82,
f5fcc13c
TI		 102 STAC_922X_MODELS
103};
104
105enum {
106 STAC_D965_REF,
107 STAC_D965_3ST,
108 STAC_D965_5ST,
4ff076e5 109 STAC_DELL_3ST,
8e9068b1 110 STAC_DELL_BIOS,
f5fcc13c
TI		 111 STAC_927X_MODELS
112};
403d1944 113
2f2f4251 114struct sigmatel_spec {
c8b6bf9b 115 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 116 unsigned int num_mixers;
117
403d1944 118 int board_config;
c7d4b2fa 119 unsigned int surr_switch: 1;
403d1944
MP		 120 unsigned int line_switch: 1;
121 unsigned int mic_switch: 1;
3cc08dc6 122 unsigned int alt_switch: 1;
82bc955f 123 unsigned int hp_detect: 1;
62fe78e9 124 unsigned int gpio_mute: 1;
c7d4b2fa 125
8259980e 126 unsigned int gpio_mask, gpio_data;
e1f0d669
MR		 127 unsigned char aloopback_mask;
128 unsigned char aloopback_shift;
8259980e 129
a64135a2
MR		 130 /* power management */
131 unsigned int num_pwrs;
132 hda_nid_t *pwr_nids;
133
2f2f4251
M		 134 /* playback */
135 struct hda_multi_out multiout;
3cc08dc6 136 hda_nid_t dac_nids[5];
2f2f4251
M		 137
138 /* capture */
139 hda_nid_t *adc_nids;
2f2f4251 140 unsigned int num_adcs;
dabbed6f
M		 141 hda_nid_t *mux_nids;
142 unsigned int num_muxes;
8b65727b
MP		 143 hda_nid_t *dmic_nids;
144 unsigned int num_dmics;
e1f0d669 145 hda_nid_t *dmux_nids;
1697055e 146 unsigned int num_dmuxes;
dabbed6f 147 hda_nid_t dig_in_nid;
2f2f4251 148
2f2f4251
M		 149 /* pin widgets */
150 hda_nid_t *pin_nids;
151 unsigned int num_pins;
2f2f4251 152 unsigned int *pin_configs;
11b44bbd 153 unsigned int *bios_pin_configs;
2f2f4251
M		 154
155 /* codec specific stuff */
156 struct hda_verb *init;
c8b6bf9b 157 struct snd_kcontrol_new *mixer;
2f2f4251
M		 158
159 /* capture source */
8b65727b 160 struct hda_input_mux *dinput_mux;
e1f0d669 161 unsigned int cur_dmux[2];
c7d4b2fa 162 struct hda_input_mux *input_mux;
3cc08dc6 163 unsigned int cur_mux[3];
2f2f4251 164
403d1944
MP		 165 /* i/o switches */
166 unsigned int io_switch[2];
0fb87bb4 167 unsigned int clfe_swap;
5f10c4a9 168 unsigned int aloopback;
2f2f4251 169
c7d4b2fa
M		 170 struct hda_pcm pcm_rec[2]; /* PCM information */
171
172 /* dynamic controls and input_mux */
173 struct auto_pin_cfg autocfg;
174 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 175 struct snd_kcontrol_new *kctl_alloc;
8b65727b 176 struct hda_input_mux private_dimux;
c7d4b2fa 177 struct hda_input_mux private_imux;
2134ea4f
TI		 178
179 /* virtual master */
180 unsigned int vmaster_tlv[4];
2f2f4251
M		 181};
182
183static hda_nid_t stac9200_adc_nids[1] = {
184 0x03,
185};
186
187static hda_nid_t stac9200_mux_nids[1] = {
188 0x0c,
189};
190
191static hda_nid_t stac9200_dac_nids[1] = {
192 0x02,
193};
194
a64135a2
MR		 195static hda_nid_t stac92hd73xx_pwr_nids[8] = {
196 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
197 0x0f, 0x10, 0x11
198};
199
e1f0d669
MR		 200static hda_nid_t stac92hd73xx_adc_nids[2] = {
201 0x1a, 0x1b
202};
203
204#define STAC92HD73XX_NUM_DMICS 2
205static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
206 0x13, 0x14, 0
207};
208
209#define STAC92HD73_DAC_COUNT 5
210static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
211 0x15, 0x16, 0x17, 0x18, 0x19,
212};
213
214static hda_nid_t stac92hd73xx_mux_nids[4] = {
215 0x28, 0x29, 0x2a, 0x2b,
216};
217
218static hda_nid_t stac92hd73xx_dmux_nids[2] = {
219 0x20, 0x21,
220};
221
a64135a2
MR		 222static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
223 0x0a, 0x0d, 0x0f
224};
225
e035b841
MR		 226static hda_nid_t stac92hd71bxx_adc_nids[2] = {
227 0x12, 0x13,
228};
229
230static hda_nid_t stac92hd71bxx_mux_nids[2] = {
231 0x1a, 0x1b
232};
233
e1f0d669
MR		 234static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
235 0x1c,
236};
237
e035b841
MR		 238static hda_nid_t stac92hd71bxx_dac_nids[2] = {
239 0x10, /*0x11, */
240};
241
242#define STAC92HD71BXX_NUM_DMICS 2
243static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
244 0x18, 0x19, 0
245};
246
8e21c34c
TD		 247static hda_nid_t stac925x_adc_nids[1] = {
248 0x03,
249};
250
251static hda_nid_t stac925x_mux_nids[1] = {
252 0x0f,
253};
254
255static hda_nid_t stac925x_dac_nids[1] = {
256 0x02,
257};
258
f6e9852a
TI		 259#define STAC925X_NUM_DMICS 1
260static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
261 0x15, 0
2c11f955
TD		 262};
263
1697055e
TI		 264static hda_nid_t stac925x_dmux_nids[1] = {
265 0x14,
266};
267
2f2f4251
M		 268static hda_nid_t stac922x_adc_nids[2] = {
269 0x06, 0x07,
270};
271
272static hda_nid_t stac922x_mux_nids[2] = {
273 0x12, 0x13,
274};
275
3cc08dc6
MP		 276static hda_nid_t stac927x_adc_nids[3] = {
277 0x07, 0x08, 0x09
278};
279
280static hda_nid_t stac927x_mux_nids[3] = {
281 0x15, 0x16, 0x17
282};
283
e1f0d669
MR		 284static hda_nid_t stac927x_dmux_nids[1] = {
285 0x1b,
286};
287
7f16859a
MR		 288#define STAC927X_NUM_DMICS 2
289static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
290 0x13, 0x14, 0
291};
292
f3302a59
MP		 293static hda_nid_t stac9205_adc_nids[2] = {
294 0x12, 0x13
295};
296
297static hda_nid_t stac9205_mux_nids[2] = {
298 0x19, 0x1a
299};
300
e1f0d669 301static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 302 0x1d,
e1f0d669
MR		 303};
304
f6e9852a
TI		 305#define STAC9205_NUM_DMICS 2
306static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
307 0x17, 0x18, 0
8b65727b
MP		 308};
309
c7d4b2fa 310static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 311 0x08, 0x09, 0x0d, 0x0e,
312 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 313};
314
8e21c34c
TD		 315static hda_nid_t stac925x_pin_nids[8] = {
316 0x07, 0x08, 0x0a, 0x0b,
317 0x0c, 0x0d, 0x10, 0x11,
318};
319
2f2f4251
M		 320static hda_nid_t stac922x_pin_nids[10] = {
321 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
322 0x0f, 0x10, 0x11, 0x15, 0x1b,
323};
324
e1f0d669
MR		 325static hda_nid_t stac92hd73xx_pin_nids[12] = {
326 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
327 0x0f, 0x10, 0x11, 0x12, 0x13,
328 0x14, 0x22
329};
330
e035b841
MR		 331static hda_nid_t stac92hd71bxx_pin_nids[10] = {
332 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
333 0x0f, 0x14, 0x18, 0x19, 0x1e,
334};
335
3cc08dc6
MP		 336static hda_nid_t stac927x_pin_nids[14] = {
337 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
338 0x0f, 0x10, 0x11, 0x12, 0x13,
339 0x14, 0x21, 0x22, 0x23,
340};
341
f3302a59
MP		 342static hda_nid_t stac9205_pin_nids[12] = {
343 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
344 0x0f, 0x14, 0x16, 0x17, 0x18,
345 0x21, 0x22,
f3302a59
MP		 346};
347
8b65727b
MP		 348static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
349 struct snd_ctl_elem_info *uinfo)
350{
351 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
352 struct sigmatel_spec *spec = codec->spec;
353 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
354}
355
356static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
357 struct snd_ctl_elem_value *ucontrol)
358{
359 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
360 struct sigmatel_spec *spec = codec->spec;
e1f0d669 361 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 362
e1f0d669 363 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 364 return 0;
365}
366
367static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
368 struct snd_ctl_elem_value *ucontrol)
369{
370 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
371 struct sigmatel_spec *spec = codec->spec;
e1f0d669 372 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 373
374 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 375 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 376}
377
c8b6bf9b 378static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 379{
380 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
381 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 382 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 383}
384
c8b6bf9b 385static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 386{
387 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
388 struct sigmatel_spec *spec = codec->spec;
389 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
390
391 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
392 return 0;
393}
394
c8b6bf9b 395static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 396{
397 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
398 struct sigmatel_spec *spec = codec->spec;
399 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
400
c7d4b2fa 401 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 402 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
403}
404
5f10c4a9
ML		 405#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
406
407static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
408 struct snd_ctl_elem_value *ucontrol)
409{
410 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 411 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 412 struct sigmatel_spec *spec = codec->spec;
413
e1f0d669
MR		 414 ucontrol->value.integer.value[0] = !!(spec->aloopback &
415 (spec->aloopback_mask << idx));
5f10c4a9
ML		 416 return 0;
417}
418
419static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
420 struct snd_ctl_elem_value *ucontrol)
421{
422 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
423 struct sigmatel_spec *spec = codec->spec;
e1f0d669 424 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 425 unsigned int dac_mode;
e1f0d669 426 unsigned int val, idx_val;
5f10c4a9 427
e1f0d669
MR		 428 idx_val = spec->aloopback_mask << idx;
429 if (ucontrol->value.integer.value[0])
430 val = spec->aloopback | idx_val;
431 else
432 val = spec->aloopback & ~idx_val;
68ea7b2f 433 if (spec->aloopback == val)
5f10c4a9
ML		 434 return 0;
435
68ea7b2f 436 spec->aloopback = val;
5f10c4a9 437
e1f0d669
MR		 438 /* Only return the bits defined by the shift value of the
439 * first two bytes of the mask
440 */
5f10c4a9 441 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 442 kcontrol->private_value & 0xFFFF, 0x0);
443 dac_mode >>= spec->aloopback_shift;
5f10c4a9 444
e1f0d669 445 if (spec->aloopback & idx_val) {
5f10c4a9 446 snd_hda_power_up(codec);
e1f0d669 447 dac_mode |= idx_val;
5f10c4a9
ML		 448 } else {
449 snd_hda_power_down(codec);
e1f0d669 450 dac_mode &= ~idx_val;
5f10c4a9
ML		 451 }
452
453 snd_hda_codec_write_cache(codec, codec->afg, 0,
454 kcontrol->private_value >> 16, dac_mode);
455
456 return 1;
457}
458
c7d4b2fa 459static struct hda_verb stac9200_core_init[] = {
2f2f4251 460 /* set dac0mux for dac converter */
c7d4b2fa 461 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 462 {}
463};
464
1194b5b7
TI		 465static struct hda_verb stac9200_eapd_init[] = {
466 /* set dac0mux for dac converter */
467 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
468 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
469 {}
470};
471
e1f0d669
MR		 472static struct hda_verb stac92hd73xx_6ch_core_init[] = {
473 /* set master volume and direct control */
474 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
475 /* setup audio connections */
476 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
477 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
478 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
479 /* setup adcs to point to mixer */
480 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
481 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 482 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
483 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
484 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
485 /* setup import muxs */
486 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
487 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
488 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
489 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
490 {}
491};
492
493static struct hda_verb stac92hd73xx_8ch_core_init[] = {
494 /* set master volume and direct control */
495 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
496 /* setup audio connections */
497 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
498 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
499 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
500 /* connect hp ports to dac3 */
501 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
502 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
503 /* setup adcs to point to mixer */
504 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
505 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 506 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
507 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
508 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
509 /* setup import muxs */
510 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
511 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
512 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
513 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
514 {}
515};
516
517static struct hda_verb stac92hd73xx_10ch_core_init[] = {
518 /* set master volume and direct control */
519 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
520 /* setup audio connections */
521 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
522 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
523 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
524 /* dac3 is connected to import3 mux */
525 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
526 /* connect hp ports to dac4 */
527 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
528 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
529 /* setup adcs to point to mixer */
530 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
531 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 532 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
533 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
534 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
535 /* setup import muxs */
536 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
537 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
538 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
539 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
540 {}
541};
542
e035b841 543static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 544 /* set master volume and direct control */
545 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
546 /* connect headphone jack to dac1 */
547 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
548 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
549 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
550 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
551 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
552 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 553};
554
555static struct hda_verb stac92hd71bxx_analog_core_init[] = {
e035b841
MR		 556 /* set master volume and direct control */
557 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
558 /* connect headphone jack to dac1 */
559 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
9b35947f
MR		 560 /* connect ports 0d and 0f to audio mixer */
561 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
562 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
a64135a2 563 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
9b35947f
MR		 564 /* unmute dac0 input in audio mixer */
565 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
e035b841
MR		 566 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
567 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
568 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
569 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 570 {}
571};
572
8e21c34c
TD		 573static struct hda_verb stac925x_core_init[] = {
574 /* set dac0mux for dac converter */
575 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
576 {}
577};
578
c7d4b2fa 579static struct hda_verb stac922x_core_init[] = {
2f2f4251 580 /* set master volume and direct control */
c7d4b2fa 581 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 582 {}
583};
584
93ed1503 585static struct hda_verb d965_core_init[] = {
19039bd0 586 /* set master volume and direct control */
93ed1503 587 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 588 /* unmute node 0x1b */
589 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
590 /* select node 0x03 as DAC */
591 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
592 {}
593};
594
3cc08dc6
MP		 595static struct hda_verb stac927x_core_init[] = {
596 /* set master volume and direct control */
597 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
598 {}
599};
600
f3302a59
MP		 601static struct hda_verb stac9205_core_init[] = {
602 /* set master volume and direct control */
603 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
604 {}
605};
606
9e05b7a3 607#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 608 { \
609 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
610 .name = "Input Source", \
9e05b7a3 611 .count = cnt, \
ca7c5a8b
ML		 612 .info = stac92xx_mux_enum_info, \
613 .get = stac92xx_mux_enum_get, \
614 .put = stac92xx_mux_enum_put, \
615 }
616
e1f0d669 617#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 618 { \
619 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
620 .name = "Analog Loopback", \
e1f0d669 621 .count = cnt, \
5f10c4a9
ML		 622 .info = stac92xx_aloopback_info, \
623 .get = stac92xx_aloopback_get, \
624 .put = stac92xx_aloopback_put, \
625 .private_value = verb_read | (verb_write << 16), \
626 }
627
c8b6bf9b 628static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 629 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
630 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 631 STAC_INPUT_SOURCE(1),
2f2f4251
M		 632 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
633 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 634 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 635 { } /* end */
636};
637
e1f0d669 638static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 639 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
640
e1f0d669
MR		 641 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
642 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
643
644 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
645 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
646
647 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
648 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
649
650 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
651 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
652
653 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
654 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
655
656 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
657 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
658
659 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
660 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
661 { } /* end */
662};
663
664static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 665 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
666
e1f0d669
MR		 667 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
668 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
669
670 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
671 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
672
673 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
674 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
675
676 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
677 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
678
679 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
680 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
681
682 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
683 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
684
685 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
686 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
687 { } /* end */
688};
689
690static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 691 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
692
e1f0d669
MR		 693 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
694 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
695
696 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
697 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
698
699 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
700 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
701
702 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
703 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
704
705 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
706 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
707
708 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
709 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
710
711 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
712 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
713 { } /* end */
714};
715
541eee87 716static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 717 STAC_INPUT_SOURCE(2),
e035b841 718
9b35947f
MR		 719 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
720 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
721 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
722
723 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
724 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
725 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 726
9b35947f
MR		 727 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
728 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
a780c0ae
MR		 729
730 HDA_CODEC_MUTE_MONO("Mono Playback Switch", 0x14, 0x1, 0, HDA_INPUT),
e035b841
MR		 731 { } /* end */
732};
733
541eee87 734static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 735 STAC_INPUT_SOURCE(2),
736 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
737
541eee87
MR		 738 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
739 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
740 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
741
742 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
743 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
744 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
a780c0ae
MR		 745
746 HDA_CODEC_MUTE_MONO("Mono Playback Switch", 0x14, 0x1, 0, HDA_INPUT),
541eee87
MR		 747 { } /* end */
748};
749
8e21c34c 750static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 751 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 752 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
753 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
754 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
755 { } /* end */
756};
757
9e05b7a3 758static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 759 STAC_INPUT_SOURCE(2),
e1f0d669 760 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 761
762 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
763 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
764 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
765
766 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
767 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
768 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
769
2f2f4251
M		 770 { } /* end */
771};
772
19039bd0 773/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 774static struct snd_kcontrol_new stac922x_mixer[] = {
775 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 776 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
777 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
778 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
779
780 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
781 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
782 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 783 { } /* end */
784};
785
9e05b7a3 786
d1d985f0 787static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 788 STAC_INPUT_SOURCE(3),
e1f0d669 789 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 790
9e05b7a3
ML		 791 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
792 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
793 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
794
795 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
796 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
797 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
798
799 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
800 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
801 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 802 { } /* end */
803};
804
1697055e
TI		 805static struct snd_kcontrol_new stac_dmux_mixer = {
806 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
807 .name = "Digital Input Source",
808 /* count set later */
809 .info = stac92xx_dmux_enum_info,
810 .get = stac92xx_dmux_enum_get,
811 .put = stac92xx_dmux_enum_put,
812};
813
2134ea4f
TI		 814static const char *slave_vols[] = {
815 "Front Playback Volume",
816 "Surround Playback Volume",
817 "Center Playback Volume",
818 "LFE Playback Volume",
819 "Side Playback Volume",
820 "Headphone Playback Volume",
821 "Headphone Playback Volume",
822 "Speaker Playback Volume",
823 "External Speaker Playback Volume",
824 "Speaker2 Playback Volume",
825 NULL
826};
827
828static const char *slave_sws[] = {
829 "Front Playback Switch",
830 "Surround Playback Switch",
831 "Center Playback Switch",
832 "LFE Playback Switch",
833 "Side Playback Switch",
834 "Headphone Playback Switch",
835 "Headphone Playback Switch",
836 "Speaker Playback Switch",
837 "External Speaker Playback Switch",
838 "Speaker2 Playback Switch",
839 NULL
840};
841
2f2f4251
M		 842static int stac92xx_build_controls(struct hda_codec *codec)
843{
844 struct sigmatel_spec *spec = codec->spec;
845 int err;
c7d4b2fa 846 int i;
2f2f4251
M		 847
848 err = snd_hda_add_new_ctls(codec, spec->mixer);
849 if (err < 0)
850 return err;
c7d4b2fa
M		 851
852 for (i = 0; i < spec->num_mixers; i++) {
853 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
854 if (err < 0)
855 return err;
856 }
1697055e
TI		 857 if (spec->num_dmuxes > 0) {
858 stac_dmux_mixer.count = spec->num_dmuxes;
859 err = snd_ctl_add(codec->bus->card,
860 snd_ctl_new1(&stac_dmux_mixer, codec));
861 if (err < 0)
862 return err;
863 }
c7d4b2fa 864
dabbed6f
M		 865 if (spec->multiout.dig_out_nid) {
866 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
867 if (err < 0)
868 return err;
869 }
870 if (spec->dig_in_nid) {
871 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
872 if (err < 0)
873 return err;
874 }
2134ea4f
TI		 875
876 /* if we have no master control, let's create it */
877 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
878 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
879 HDA_OUTPUT, spec->vmaster_tlv);
880 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
881 spec->vmaster_tlv, slave_vols);
882 if (err < 0)
883 return err;
884 }
885 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
886 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
887 NULL, slave_sws);
888 if (err < 0)
889 return err;
890 }
891
dabbed6f 892 return 0;
2f2f4251
M		 893}
894
403d1944 895static unsigned int ref9200_pin_configs[8] = {
dabbed6f 896 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 897 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
898};
899
dfe495d0
TI		 900/*
901 STAC 9200 pin configs for
902 102801A8
903 102801DE
904 102801E8
905*/
906static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 907 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
908 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 909};
910
911/*
912 STAC 9200 pin configs for
913 102801C0
914 102801C1
915*/
916static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 917 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
918 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 919};
920
921/*
922 STAC 9200 pin configs for
923 102801C4 (Dell Dimension E310)
924 102801C5
925 102801C7
926 102801D9
927 102801DA
928 102801E3
929*/
930static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 931 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
932 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 933};
934
935
936/*
937 STAC 9200-32 pin configs for
938 102801B5 (Dell Inspiron 630m)
939 102801D8 (Dell Inspiron 640m)
940*/
941static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 942 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
943 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 944};
945
946/*
947 STAC 9200-32 pin configs for
948 102801C2 (Dell Latitude D620)
949 102801C8
950 102801CC (Dell Latitude D820)
951 102801D4
952 102801D6
953*/
954static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 955 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
956 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 957};
958
959/*
960 STAC 9200-32 pin configs for
961 102801CE (Dell XPS M1710)
962 102801CF (Dell Precision M90)
963*/
964static unsigned int dell9200_m23_pin_configs[8] = {
965 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
966 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
967};
968
969/*
970 STAC 9200-32 pin configs for
971 102801C9
972 102801CA
973 102801CB (Dell Latitude 120L)
974 102801D3
975*/
976static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 977 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
978 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 979};
980
981/*
982 STAC 9200-32 pin configs for
983 102801BD (Dell Inspiron E1505n)
984 102801EE
985 102801EF
986*/
987static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 988 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
989 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 990};
991
992/*
993 STAC 9200-32 pin configs for
994 102801F5 (Dell Inspiron 1501)
995 102801F6
996*/
997static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 998 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
999 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1000};
1001
1002/*
1003 STAC 9200-32
1004 102801CD (Dell Inspiron E1705/9400)
1005*/
1006static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1007 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1008 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1009};
1010
1011
f5fcc13c
TI		 1012static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1013 [STAC_REF] = ref9200_pin_configs,
dfe495d0
TI		 1014 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1015 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1016 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1017 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1018 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1019 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1020 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1021 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1022 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1023 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 1024};
1025
f5fcc13c
TI		 1026static const char *stac9200_models[STAC_9200_MODELS] = {
1027 [STAC_REF] = "ref",
dfe495d0
TI		 1028 [STAC_9200_DELL_D21] = "dell-d21",
1029 [STAC_9200_DELL_D22] = "dell-d22",
1030 [STAC_9200_DELL_D23] = "dell-d23",
1031 [STAC_9200_DELL_M21] = "dell-m21",
1032 [STAC_9200_DELL_M22] = "dell-m22",
1033 [STAC_9200_DELL_M23] = "dell-m23",
1034 [STAC_9200_DELL_M24] = "dell-m24",
1035 [STAC_9200_DELL_M25] = "dell-m25",
1036 [STAC_9200_DELL_M26] = "dell-m26",
1037 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1038 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 1039};
1040
1041static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1042 /* SigmaTel reference board */
1043 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1044 "DFI LanParty", STAC_REF),
e7377071 1045 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1046 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1047 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1048 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1049 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1050 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1051 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1052 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1053 "unknown Dell", STAC_9200_DELL_D22),
1054 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1055 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1056 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1057 "Dell Latitude D620", STAC_9200_DELL_M22),
1058 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1059 "unknown Dell", STAC_9200_DELL_D23),
1060 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1061 "unknown Dell", STAC_9200_DELL_D23),
1062 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1063 "unknown Dell", STAC_9200_DELL_M22),
1064 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1065 "unknown Dell", STAC_9200_DELL_M24),
1066 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1067 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1068 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1069 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1070 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1071 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1072 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1073 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1074 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1075 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1076 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1077 "Dell Precision M90", STAC_9200_DELL_M23),
1078 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1079 "unknown Dell", STAC_9200_DELL_M22),
1080 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1081 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1082 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1083 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1084 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1085 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1086 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1087 "unknown Dell", STAC_9200_DELL_D23),
1088 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1089 "unknown Dell", STAC_9200_DELL_D23),
1090 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1091 "unknown Dell", STAC_9200_DELL_D21),
1092 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1093 "unknown Dell", STAC_9200_DELL_D23),
1094 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1095 "unknown Dell", STAC_9200_DELL_D21),
1096 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1097 "unknown Dell", STAC_9200_DELL_M25),
1098 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1099 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1100 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1101 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1102 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1103 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 1104 /* Panasonic */
1105 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 1106 /* Gateway machines needs EAPD to be set on resume */
1107 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1108 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1109 STAC_9200_GATEWAY),
1110 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1111 STAC_9200_GATEWAY),
403d1944
MP		 1112 {} /* terminator */
1113};
1114
8e21c34c
TD		 1115static unsigned int ref925x_pin_configs[8] = {
1116 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1117 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
1118};
1119
1120static unsigned int stac925x_MA6_pin_configs[8] = {
1121 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1122 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1123};
1124
2c11f955
TD		 1125static unsigned int stac925x_PA6_pin_configs[8] = {
1126 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1127 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1128};
1129
8e21c34c 1130static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1131 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1132 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1133};
1134
1135static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1136 [STAC_REF] = ref925x_pin_configs,
1137 [STAC_M2_2] = stac925xM2_2_pin_configs,
1138 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1139 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1140};
1141
1142static const char *stac925x_models[STAC_925x_MODELS] = {
1143 [STAC_REF] = "ref",
1144 [STAC_M2_2] = "m2-2",
1145 [STAC_MA6] = "m6",
2c11f955 1146 [STAC_PA6] = "pa6",
8e21c34c
TD		 1147};
1148
1149static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1150 /* SigmaTel reference board */
1151 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1152 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1153 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1154 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1155 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1156 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1157 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1158 {} /* terminator */
1159};
1160
e1f0d669
MR		 1161static unsigned int ref92hd73xx_pin_configs[12] = {
1162 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1163 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1164 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
1165};
1166
1167static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
1168 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1169};
1170
1171static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1172 [STAC_92HD73XX_REF] = "ref",
1173};
1174
1175static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1176 /* SigmaTel reference board */
1177 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1178 "DFI LanParty", STAC_92HD73XX_REF),
1179 {} /* terminator */
1180};
1181
e035b841
MR		 1182static unsigned int ref92hd71bxx_pin_configs[10] = {
1183 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
1184 0x0181302e, 0x01114010, 0x01a19020, 0x90a000f0,
1185 0x90a000f0, 0x01452050,
1186};
1187
1188static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1189 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
1190};
1191
1192static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1193 [STAC_92HD71BXX_REF] = "ref",
1194};
1195
1196static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1197 /* SigmaTel reference board */
1198 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1199 "DFI LanParty", STAC_92HD71BXX_REF),
1200 {} /* terminator */
1201};
1202
403d1944
MP		 1203static unsigned int ref922x_pin_configs[10] = {
1204 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1205 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1206 0x40000100, 0x40000100,
1207};
1208
dfe495d0
TI		 1209/*
1210 STAC 922X pin configs for
1211 102801A7
1212 102801AB
1213 102801A9
1214 102801D1
1215 102801D2
1216*/
1217static unsigned int dell_922x_d81_pin_configs[10] = {
1218 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1219 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1220 0x01813122, 0x400001f2,
1221};
1222
1223/*
1224 STAC 922X pin configs for
1225 102801AC
1226 102801D0
1227*/
1228static unsigned int dell_922x_d82_pin_configs[10] = {
1229 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1230 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1231 0x01813122, 0x400001f1,
1232};
1233
1234/*
1235 STAC 922X pin configs for
1236 102801BF
1237*/
1238static unsigned int dell_922x_m81_pin_configs[10] = {
1239 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1240 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1241 0x40C003f1, 0x405003f0,
1242};
1243
1244/*
1245 STAC 9221 A1 pin configs for
1246 102801D7 (Dell XPS M1210)
1247*/
1248static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1249 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1250 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1251 0x508003f3, 0x405003f4,
1252};
1253
403d1944 1254static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1255 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1256 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1257 0x02a19120, 0x40000100,
1258};
1259
1260static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1261 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1262 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1263 0x02a19320, 0x40000100,
1264};
1265
5d5d3bc3
IZ		 1266static unsigned int intel_mac_v1_pin_configs[10] = {
1267 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1268 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1269 0x400000fc, 0x400000fb,
1270};
1271
1272static unsigned int intel_mac_v2_pin_configs[10] = {
1273 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1274 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1275 0x400000fc, 0x400000fb,
6f0778d8
NB		 1276};
1277
5d5d3bc3
IZ		 1278static unsigned int intel_mac_v3_pin_configs[10] = {
1279 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1280 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1281 0x400000fc, 0x400000fb,
1282};
1283
5d5d3bc3
IZ		 1284static unsigned int intel_mac_v4_pin_configs[10] = {
1285 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1286 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1287 0x400000fc, 0x400000fb,
1288};
1289
5d5d3bc3
IZ		 1290static unsigned int intel_mac_v5_pin_configs[10] = {
1291 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1292 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1293 0x400000fc, 0x400000fb,
0dae0f83
TI		 1294};
1295
76c08828 1296
19039bd0 1297static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1298 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1299 [STAC_D945GTP3] = d945gtp3_pin_configs,
1300 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1301 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1302 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1303 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1304 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1305 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1306 /* for backward compatibility */
5d5d3bc3
IZ		 1307 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1308 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1309 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1310 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1311 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1312 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1313 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1314 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1315 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1316 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1317};
1318
f5fcc13c
TI		 1319static const char *stac922x_models[STAC_922X_MODELS] = {
1320 [STAC_D945_REF] = "ref",
1321 [STAC_D945GTP5] = "5stack",
1322 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1323 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1324 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1325 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1326 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1327 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1328 /* for backward compatibility */
f5fcc13c 1329 [STAC_MACMINI] = "macmini",
3fc24d85 1330 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1331 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1332 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1333 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1334 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1335 [STAC_922X_DELL_D81] = "dell-d81",
1336 [STAC_922X_DELL_D82] = "dell-d82",
1337 [STAC_922X_DELL_M81] = "dell-m81",
1338 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1339};
1340
1341static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1342 /* SigmaTel reference board */
1343 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1344 "DFI LanParty", STAC_D945_REF),
1345 /* Intel 945G based systems */
1346 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1347 "Intel D945G", STAC_D945GTP3),
1348 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1349 "Intel D945G", STAC_D945GTP3),
1350 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1351 "Intel D945G", STAC_D945GTP3),
1352 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1353 "Intel D945G", STAC_D945GTP3),
1354 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1355 "Intel D945G", STAC_D945GTP3),
1356 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1357 "Intel D945G", STAC_D945GTP3),
1358 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1359 "Intel D945G", STAC_D945GTP3),
1360 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1361 "Intel D945G", STAC_D945GTP3),
1362 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1363 "Intel D945G", STAC_D945GTP3),
1364 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1365 "Intel D945G", STAC_D945GTP3),
1366 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1367 "Intel D945G", STAC_D945GTP3),
1368 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1369 "Intel D945G", STAC_D945GTP3),
1370 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1371 "Intel D945G", STAC_D945GTP3),
1372 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1373 "Intel D945G", STAC_D945GTP3),
1374 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1375 "Intel D945G", STAC_D945GTP3),
1376 /* Intel D945G 5-stack systems */
1377 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1378 "Intel D945G", STAC_D945GTP5),
1379 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1380 "Intel D945G", STAC_D945GTP5),
1381 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1382 "Intel D945G", STAC_D945GTP5),
1383 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1384 "Intel D945G", STAC_D945GTP5),
1385 /* Intel 945P based systems */
1386 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1387 "Intel D945P", STAC_D945GTP3),
1388 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1389 "Intel D945P", STAC_D945GTP3),
1390 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1391 "Intel D945P", STAC_D945GTP3),
1392 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1393 "Intel D945P", STAC_D945GTP3),
1394 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1395 "Intel D945P", STAC_D945GTP3),
1396 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1397 "Intel D945P", STAC_D945GTP5),
1398 /* other systems */
1399 /* Apple Mac Mini (early 2006) */
1400 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1401 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1402 /* Dell systems */
1403 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1404 "unknown Dell", STAC_922X_DELL_D81),
1405 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1406 "unknown Dell", STAC_922X_DELL_D81),
1407 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1408 "unknown Dell", STAC_922X_DELL_D81),
1409 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1410 "unknown Dell", STAC_922X_DELL_D82),
1411 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1412 "unknown Dell", STAC_922X_DELL_M81),
1413 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1414 "unknown Dell", STAC_922X_DELL_D82),
1415 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1416 "unknown Dell", STAC_922X_DELL_D81),
1417 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1418 "unknown Dell", STAC_922X_DELL_D81),
1419 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1420 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1421 {} /* terminator */
1422};
1423
3cc08dc6 1424static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1425 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1426 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1427 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1428 0x01c42190, 0x40000100,
3cc08dc6
MP		 1429};
1430
93ed1503 1431static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1432 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1433 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1434 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1435 0x40000100, 0x40000100
1436};
1437
93ed1503
TD		 1438static unsigned int d965_5st_pin_configs[14] = {
1439 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1440 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1441 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1442 0x40000100, 0x40000100
1443};
1444
4ff076e5
TD		 1445static unsigned int dell_3st_pin_configs[14] = {
1446 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1447 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1448 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1449 0x40c003fc, 0x40000100
1450};
1451
93ed1503 1452static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1453 [STAC_D965_REF] = ref927x_pin_configs,
1454 [STAC_D965_3ST] = d965_3st_pin_configs,
1455 [STAC_D965_5ST] = d965_5st_pin_configs,
1456 [STAC_DELL_3ST] = dell_3st_pin_configs,
1457 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1458};
1459
f5fcc13c 1460static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1461 [STAC_D965_REF] = "ref",
1462 [STAC_D965_3ST] = "3stack",
1463 [STAC_D965_5ST] = "5stack",
1464 [STAC_DELL_3ST] = "dell-3stack",
1465 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1466};
1467
1468static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1469 /* SigmaTel reference board */
1470 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1471 "DFI LanParty", STAC_D965_REF),
81d3dbde 1472 /* Intel 946 based systems */
f5fcc13c
TI		 1473 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1474 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1475 /* 965 based 3 stack systems */
f5fcc13c
TI		 1476 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1477 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1478 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1479 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1480 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1481 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1482 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1483 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1484 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1485 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1487 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1488 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1489 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1490 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1491 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1492 /* Dell 3 stack systems */
8e9068b1 1493 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1495 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1497 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1499 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1
MR		 1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1501 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1503 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1505 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1506 /* 965 based 5 stack systems */
f5fcc13c
TI		 1507 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1508 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1509 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1511 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1513 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1516 {} /* terminator */
1517};
1518
f3302a59
MP		 1519static unsigned int ref9205_pin_configs[12] = {
1520 0x40000100, 0x40000100, 0x01016011, 0x01014010,
8b65727b
MP		 1521 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
1522 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1523};
1524
dfe495d0
TI		 1525/*
1526 STAC 9205 pin configs for
1527 102801F1
1528 102801F2
1529 102801FC
1530 102801FD
1531 10280204
1532 1028021F
1533*/
1534static unsigned int dell_9205_m42_pin_configs[12] = {
1535 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1536 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1537 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1538};
1539
1540/*
1541 STAC 9205 pin configs for
1542 102801F9
1543 102801FA
1544 102801FE
1545 102801FF (Dell Precision M4300)
1546 10280206
1547 10280200
1548 10280201
1549*/
1550static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1551 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1552 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1553 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1554};
1555
dfe495d0 1556static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1557 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1558 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1559 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1560};
1561
f5fcc13c 1562static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1563 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1564 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1565 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1566 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1567};
1568
f5fcc13c
TI		 1569static const char *stac9205_models[STAC_9205_MODELS] = {
1570 [STAC_9205_REF] = "ref",
dfe495d0 1571 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1572 [STAC_9205_DELL_M43] = "dell-m43",
1573 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1574};
1575
1576static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1577 /* SigmaTel reference board */
1578 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1579 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1580 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1581 "unknown Dell", STAC_9205_DELL_M42),
1582 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1583 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1584 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1585 "Dell Precision", STAC_9205_DELL_M43),
1586 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1587 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1588 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1589 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1590 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1591 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1592 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1593 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1594 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1595 "unknown Dell", STAC_9205_DELL_M42),
1596 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1597 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1598 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1599 "Dell Precision", STAC_9205_DELL_M43),
1600 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1601 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1602 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1603 "Dell Precision", STAC_9205_DELL_M43),
1604 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1605 "Dell Inspiron", STAC_9205_DELL_M44),
1606 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1607 "Dell Inspiron", STAC_9205_DELL_M44),
1608 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1609 "Dell Inspiron", STAC_9205_DELL_M44),
1610 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1611 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1612 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1613 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1614 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1615 "Dell Inspiron", STAC_9205_DELL_M44),
f3302a59
MP		 1616 {} /* terminator */
1617};
1618
11b44bbd
RF		 1619static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1620{
1621 int i;
1622 struct sigmatel_spec *spec = codec->spec;
1623
1624 if (! spec->bios_pin_configs) {
1625 spec->bios_pin_configs = kcalloc(spec->num_pins,
1626 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1627 if (! spec->bios_pin_configs)
1628 return -ENOMEM;
1629 }
1630
1631 for (i = 0; i < spec->num_pins; i++) {
1632 hda_nid_t nid = spec->pin_nids[i];
1633 unsigned int pin_cfg;
1634
1635 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1636 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1637 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1638 nid, pin_cfg);
1639 spec->bios_pin_configs[i] = pin_cfg;
1640 }
1641
1642 return 0;
1643}
1644
87d48363
MR		 1645static void stac92xx_set_config_reg(struct hda_codec *codec,
1646 hda_nid_t pin_nid, unsigned int pin_config)
1647{
1648 int i;
1649 snd_hda_codec_write(codec, pin_nid, 0,
1650 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1651 pin_config & 0x000000ff);
1652 snd_hda_codec_write(codec, pin_nid, 0,
1653 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1654 (pin_config & 0x0000ff00) >> 8);
1655 snd_hda_codec_write(codec, pin_nid, 0,
1656 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1657 (pin_config & 0x00ff0000) >> 16);
1658 snd_hda_codec_write(codec, pin_nid, 0,
1659 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1660 pin_config >> 24);
1661 i = snd_hda_codec_read(codec, pin_nid, 0,
1662 AC_VERB_GET_CONFIG_DEFAULT,
1663 0x00);
1664 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1665 pin_nid, i);
1666}
1667
2f2f4251
M		 1668static void stac92xx_set_config_regs(struct hda_codec *codec)
1669{
1670 int i;
1671 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1672
87d48363
MR		 1673 if (!spec->pin_configs)
1674 return;
11b44bbd 1675
87d48363
MR		 1676 for (i = 0; i < spec->num_pins; i++)
1677 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1678 spec->pin_configs[i]);
2f2f4251 1679}
2f2f4251 1680
8259980e 1681static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
92a22beb 1682{
8259980e 1683 struct sigmatel_spec *spec = codec->spec;
87d48363 1684 /* Configure GPIOx as output */
82beb8fd
TI		 1685 snd_hda_codec_write_cache(codec, codec->afg, 0,
1686 AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
87d48363 1687 /* Configure GPIOx as CMOS */
82beb8fd 1688 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
87d48363 1689 /* Assert GPIOx */
82beb8fd
TI		 1690 snd_hda_codec_write_cache(codec, codec->afg, 0,
1691 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
87d48363 1692 /* Enable GPIOx */
82beb8fd
TI		 1693 snd_hda_codec_write_cache(codec, codec->afg, 0,
1694 AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
92a22beb
MR		 1695}
1696
dabbed6f 1697/*
c7d4b2fa 1698 * Analog playback callbacks
dabbed6f 1699 */
c7d4b2fa
M		 1700static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1701 struct hda_codec *codec,
c8b6bf9b 1702 struct snd_pcm_substream *substream)
2f2f4251 1703{
dabbed6f 1704 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1705 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1706}
1707
2f2f4251
M		 1708static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1709 struct hda_codec *codec,
1710 unsigned int stream_tag,
1711 unsigned int format,
c8b6bf9b 1712 struct snd_pcm_substream *substream)
2f2f4251
M		 1713{
1714 struct sigmatel_spec *spec = codec->spec;
403d1944 1715 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1716}
1717
1718static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1719 struct hda_codec *codec,
c8b6bf9b 1720 struct snd_pcm_substream *substream)
2f2f4251
M		 1721{
1722 struct sigmatel_spec *spec = codec->spec;
1723 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1724}
1725
dabbed6f
M		 1726/*
1727 * Digital playback callbacks
1728 */
1729static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1730 struct hda_codec *codec,
c8b6bf9b 1731 struct snd_pcm_substream *substream)
dabbed6f
M		 1732{
1733 struct sigmatel_spec *spec = codec->spec;
1734 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1735}
1736
1737static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1738 struct hda_codec *codec,
c8b6bf9b 1739 struct snd_pcm_substream *substream)
dabbed6f
M		 1740{
1741 struct sigmatel_spec *spec = codec->spec;
1742 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1743}
1744
6b97eb45
TI		 1745static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1746 struct hda_codec *codec,
1747 unsigned int stream_tag,
1748 unsigned int format,
1749 struct snd_pcm_substream *substream)
1750{
1751 struct sigmatel_spec *spec = codec->spec;
1752 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1753 stream_tag, format, substream);
1754}
1755
dabbed6f 1756
2f2f4251
M		 1757/*
1758 * Analog capture callbacks
1759 */
1760static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1761 struct hda_codec *codec,
1762 unsigned int stream_tag,
1763 unsigned int format,
c8b6bf9b 1764 struct snd_pcm_substream *substream)
2f2f4251
M		 1765{
1766 struct sigmatel_spec *spec = codec->spec;
1767
1768 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1769 stream_tag, 0, format);
1770 return 0;
1771}
1772
1773static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1774 struct hda_codec *codec,
c8b6bf9b 1775 struct snd_pcm_substream *substream)
2f2f4251
M		 1776{
1777 struct sigmatel_spec *spec = codec->spec;
1778
1779 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1780 return 0;
1781}
1782
dabbed6f
M		 1783static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1784 .substreams = 1,
1785 .channels_min = 2,
1786 .channels_max = 2,
1787 /* NID is set in stac92xx_build_pcms */
1788 .ops = {
1789 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1790 .close = stac92xx_dig_playback_pcm_close,
1791 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1792 },
1793};
1794
1795static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1796 .substreams = 1,
1797 .channels_min = 2,
1798 .channels_max = 2,
1799 /* NID is set in stac92xx_build_pcms */
1800};
1801
2f2f4251
M		 1802static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1803 .substreams = 1,
1804 .channels_min = 2,
c7d4b2fa 1805 .channels_max = 8,
2f2f4251
M		 1806 .nid = 0x02, /* NID to query formats and rates */
1807 .ops = {
1808 .open = stac92xx_playback_pcm_open,
1809 .prepare = stac92xx_playback_pcm_prepare,
1810 .cleanup = stac92xx_playback_pcm_cleanup
1811 },
1812};
1813
3cc08dc6
MP		 1814static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1815 .substreams = 1,
1816 .channels_min = 2,
1817 .channels_max = 2,
1818 .nid = 0x06, /* NID to query formats and rates */
1819 .ops = {
1820 .open = stac92xx_playback_pcm_open,
1821 .prepare = stac92xx_playback_pcm_prepare,
1822 .cleanup = stac92xx_playback_pcm_cleanup
1823 },
1824};
1825
2f2f4251 1826static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1827 .channels_min = 2,
1828 .channels_max = 2,
9e05b7a3 1829 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1830 .ops = {
1831 .prepare = stac92xx_capture_pcm_prepare,
1832 .cleanup = stac92xx_capture_pcm_cleanup
1833 },
1834};
1835
1836static int stac92xx_build_pcms(struct hda_codec *codec)
1837{
1838 struct sigmatel_spec *spec = codec->spec;
1839 struct hda_pcm *info = spec->pcm_rec;
1840
1841 codec->num_pcms = 1;
1842 codec->pcm_info = info;
1843
c7d4b2fa 1844 info->name = "STAC92xx Analog";
2f2f4251 1845 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1846 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1847 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1848 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1849
1850 if (spec->alt_switch) {
1851 codec->num_pcms++;
1852 info++;
1853 info->name = "STAC92xx Analog Alt";
1854 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1855 }
2f2f4251 1856
dabbed6f
M		 1857 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1858 codec->num_pcms++;
1859 info++;
1860 info->name = "STAC92xx Digital";
1861 if (spec->multiout.dig_out_nid) {
1862 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1863 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1864 }
1865 if (spec->dig_in_nid) {
1866 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1867 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1868 }
1869 }
1870
2f2f4251
M		 1871 return 0;
1872}
1873
c960a03b
TI		 1874static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1875{
1876 unsigned int pincap = snd_hda_param_read(codec, nid,
1877 AC_PAR_PIN_CAP);
1878 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1879 if (pincap & AC_PINCAP_VREF_100)
1880 return AC_PINCTL_VREF_100;
1881 if (pincap & AC_PINCAP_VREF_80)
1882 return AC_PINCTL_VREF_80;
1883 if (pincap & AC_PINCAP_VREF_50)
1884 return AC_PINCTL_VREF_50;
1885 if (pincap & AC_PINCAP_VREF_GRD)
1886 return AC_PINCTL_VREF_GRD;
1887 return 0;
1888}
1889
403d1944
MP		 1890static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1891
1892{
82beb8fd
TI		 1893 snd_hda_codec_write_cache(codec, nid, 0,
1894 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1895}
1896
a5ce8890 1897#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1898
1899static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1900{
1901 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1902 struct sigmatel_spec *spec = codec->spec;
1903 int io_idx = kcontrol-> private_value & 0xff;
1904
1905 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1906 return 0;
1907}
1908
1909static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1910{
1911 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1912 struct sigmatel_spec *spec = codec->spec;
1913 hda_nid_t nid = kcontrol->private_value >> 8;
1914 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 1915 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 1916
1917 spec->io_switch[io_idx] = val;
1918
1919 if (val)
1920 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1921 else {
1922 unsigned int pinctl = AC_PINCTL_IN_EN;
1923 if (io_idx) /* set VREF for mic */
1924 pinctl |= stac92xx_get_vref(codec, nid);
1925 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1926 }
40c1d308
JZ		 1927
1928 /* check the auto-mute again: we need to mute/unmute the speaker
1929 * appropriately according to the pin direction
1930 */
1931 if (spec->hp_detect)
1932 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
1933
403d1944
MP		 1934 return 1;
1935}
1936
0fb87bb4
ML		 1937#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
1938
1939static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
1940 struct snd_ctl_elem_value *ucontrol)
1941{
1942 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1943 struct sigmatel_spec *spec = codec->spec;
1944
1945 ucontrol->value.integer.value[0] = spec->clfe_swap;
1946 return 0;
1947}
1948
1949static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
1950 struct snd_ctl_elem_value *ucontrol)
1951{
1952 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1953 struct sigmatel_spec *spec = codec->spec;
1954 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 1955 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 1956
68ea7b2f 1957 if (spec->clfe_swap == val)
0fb87bb4
ML		 1958 return 0;
1959
68ea7b2f 1960 spec->clfe_swap = val;
0fb87bb4
ML		 1961
1962 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
1963 spec->clfe_swap ? 0x4 : 0x0);
1964
1965 return 1;
1966}
1967
403d1944
MP		 1968#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1969 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1970 .name = xname, \
1971 .index = 0, \
1972 .info = stac92xx_io_switch_info, \
1973 .get = stac92xx_io_switch_get, \
1974 .put = stac92xx_io_switch_put, \
1975 .private_value = xpval, \
1976 }
1977
0fb87bb4
ML		 1978#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
1979 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1980 .name = xname, \
1981 .index = 0, \
1982 .info = stac92xx_clfe_switch_info, \
1983 .get = stac92xx_clfe_switch_get, \
1984 .put = stac92xx_clfe_switch_put, \
1985 .private_value = xpval, \
1986 }
403d1944 1987
c7d4b2fa
M		 1988enum {
1989 STAC_CTL_WIDGET_VOL,
1990 STAC_CTL_WIDGET_MUTE,
403d1944 1991 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 1992 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 1993};
1994
c8b6bf9b 1995static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 1996 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
1997 HDA_CODEC_MUTE(NULL, 0, 0, 0),
403d1944 1998 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 1999 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2000};
2001
2002/* add dynamic controls */
2003static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2004{
c8b6bf9b 2005 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2006
2007 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2008 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2009
2010 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2011 if (! knew)
2012 return -ENOMEM;
2013 if (spec->kctl_alloc) {
2014 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2015 kfree(spec->kctl_alloc);
2016 }
2017 spec->kctl_alloc = knew;
2018 spec->num_kctl_alloc = num;
2019 }
2020
2021 knew = &spec->kctl_alloc[spec->num_kctl_used];
2022 *knew = stac92xx_control_templates[type];
82fe0c58 2023 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2024 if (! knew->name)
2025 return -ENOMEM;
2026 knew->private_value = val;
2027 spec->num_kctl_used++;
2028 return 0;
2029}
2030
403d1944
MP		 2031/* flag inputs as additional dynamic lineouts */
2032static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2033{
2034 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2035 unsigned int wcaps, wtype;
2036 int i, num_dacs = 0;
2037
2038 /* use the wcaps cache to count all DACs available for line-outs */
2039 for (i = 0; i < codec->num_nodes; i++) {
2040 wcaps = codec->wcaps[i];
2041 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2042
7b043899
SL		 2043 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2044 num_dacs++;
2045 }
403d1944 2046
7b043899
SL		 2047 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2048
403d1944
MP		 2049 switch (cfg->line_outs) {
2050 case 3:
2051 /* add line-in as side */
7b043899 2052 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2053 cfg->line_out_pins[cfg->line_outs] =
2054 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2055 spec->line_switch = 1;
2056 cfg->line_outs++;
2057 }
2058 break;
2059 case 2:
2060 /* add line-in as clfe and mic as side */
7b043899 2061 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2062 cfg->line_out_pins[cfg->line_outs] =
2063 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2064 spec->line_switch = 1;
2065 cfg->line_outs++;
2066 }
7b043899 2067 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2068 cfg->line_out_pins[cfg->line_outs] =
2069 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2070 spec->mic_switch = 1;
2071 cfg->line_outs++;
2072 }
2073 break;
2074 case 1:
2075 /* add line-in as surr and mic as clfe */
7b043899 2076 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2077 cfg->line_out_pins[cfg->line_outs] =
2078 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2079 spec->line_switch = 1;
2080 cfg->line_outs++;
2081 }
7b043899 2082 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2083 cfg->line_out_pins[cfg->line_outs] =
2084 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2085 spec->mic_switch = 1;
2086 cfg->line_outs++;
2087 }
2088 break;
2089 }
2090
2091 return 0;
2092}
2093
7b043899
SL		 2094
2095static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2096{
2097 int i;
2098
2099 for (i = 0; i < spec->multiout.num_dacs; i++) {
2100 if (spec->multiout.dac_nids[i] == nid)
2101 return 1;
2102 }
2103
2104 return 0;
2105}
2106
3cc08dc6 2107/*
7b043899
SL		 2108 * Fill in the dac_nids table from the parsed pin configuration
2109 * This function only works when every pin in line_out_pins[]
2110 * contains atleast one DAC in its connection list. Some 92xx
2111 * codecs are not connected directly to a DAC, such as the 9200
2112 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2113 */
19039bd0 2114static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2115 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2116{
2117 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2118 int i, j, conn_len = 0;
2119 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2120 unsigned int wcaps, wtype;
2121
c7d4b2fa
M		 2122 for (i = 0; i < cfg->line_outs; i++) {
2123 nid = cfg->line_out_pins[i];
7b043899
SL		 2124 conn_len = snd_hda_get_connections(codec, nid, conn,
2125 HDA_MAX_CONNECTIONS);
2126 for (j = 0; j < conn_len; j++) {
2127 wcaps = snd_hda_param_read(codec, conn[j],
2128 AC_PAR_AUDIO_WIDGET_CAP);
2129 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2130 if (wtype != AC_WID_AUD_OUT ||
2131 (wcaps & AC_WCAP_DIGITAL))
2132 continue;
2133 /* conn[j] is a DAC routed to this line-out */
2134 if (!is_in_dac_nids(spec, conn[j]))
2135 break;
2136 }
2137
2138 if (j == conn_len) {
df802952
TI		 2139 if (spec->multiout.num_dacs > 0) {
2140 /* we have already working output pins,
2141 * so let's drop the broken ones again
2142 */
2143 cfg->line_outs = spec->multiout.num_dacs;
2144 break;
2145 }
7b043899
SL		 2146 /* error out, no available DAC found */
2147 snd_printk(KERN_ERR
2148 "%s: No available DAC for pin 0x%x\n",
2149 __func__, nid);
2150 return -ENODEV;
2151 }
2152
2153 spec->multiout.dac_nids[i] = conn[j];
2154 spec->multiout.num_dacs++;
2155 if (conn_len > 1) {
2156 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2157 snd_hda_codec_write_cache(codec, nid, 0,
2158 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2159
7b043899
SL		 2160 }
2161 }
c7d4b2fa 2162
7b043899
SL		 2163 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2164 spec->multiout.num_dacs,
2165 spec->multiout.dac_nids[0],
2166 spec->multiout.dac_nids[1],
2167 spec->multiout.dac_nids[2],
2168 spec->multiout.dac_nids[3],
2169 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2170 return 0;
2171}
2172
eb06ed8f
TI		 2173/* create volume control/switch for the given prefx type */
2174static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2175{
2176 char name[32];
2177 int err;
2178
2179 sprintf(name, "%s Playback Volume", pfx);
2180 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2181 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2182 if (err < 0)
2183 return err;
2184 sprintf(name, "%s Playback Switch", pfx);
2185 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2186 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2187 if (err < 0)
2188 return err;
2189 return 0;
2190}
2191
c7d4b2fa 2192/* add playback controls from the parsed DAC table */
0fb87bb4 2193static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2194 const struct auto_pin_cfg *cfg)
c7d4b2fa 2195{
19039bd0
TI		 2196 static const char *chname[4] = {
2197 "Front", "Surround", NULL /*CLFE*/, "Side"
2198 };
c7d4b2fa
M		 2199 hda_nid_t nid;
2200 int i, err;
2201
0fb87bb4
ML		 2202 struct sigmatel_spec *spec = codec->spec;
2203 unsigned int wid_caps;
2204
2205
c7d4b2fa 2206 for (i = 0; i < cfg->line_outs; i++) {
403d1944 2207 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2208 continue;
2209
2210 nid = spec->multiout.dac_nids[i];
2211
2212 if (i == 2) {
2213 /* Center/LFE */
eb06ed8f
TI		 2214 err = create_controls(spec, "Center", nid, 1);
2215 if (err < 0)
c7d4b2fa 2216 return err;
eb06ed8f
TI		 2217 err = create_controls(spec, "LFE", nid, 2);
2218 if (err < 0)
c7d4b2fa 2219 return err;
0fb87bb4
ML		 2220
2221 wid_caps = get_wcaps(codec, nid);
2222
2223 if (wid_caps & AC_WCAP_LR_SWAP) {
2224 err = stac92xx_add_control(spec,
2225 STAC_CTL_WIDGET_CLFE_SWITCH,
2226 "Swap Center/LFE Playback Switch", nid);
2227
2228 if (err < 0)
2229 return err;
2230 }
2231
c7d4b2fa 2232 } else {
eb06ed8f
TI		 2233 err = create_controls(spec, chname[i], nid, 3);
2234 if (err < 0)
c7d4b2fa
M		 2235 return err;
2236 }
2237 }
2238
403d1944
MP		 2239 if (spec->line_switch)
2240 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
2241 return err;
2242
2243 if (spec->mic_switch)
2244 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
2245 return err;
2246
c7d4b2fa
M		 2247 return 0;
2248}
2249
eb06ed8f 2250static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 2251{
7b043899
SL		 2252 if (is_in_dac_nids(spec, nid))
2253 return 1;
eb06ed8f
TI		 2254 if (spec->multiout.hp_nid == nid)
2255 return 1;
2256 return 0;
2257}
c7d4b2fa 2258
eb06ed8f
TI		 2259static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2260{
2261 if (!spec->multiout.hp_nid)
2262 spec->multiout.hp_nid = nid;
2263 else if (spec->multiout.num_dacs > 4) {
2264 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2265 return 1;
2266 } else {
2267 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2268 spec->multiout.num_dacs++;
2269 }
2270 return 0;
2271}
4e55096e 2272
eb06ed8f
TI		 2273/* add playback controls for Speaker and HP outputs */
2274static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2275 struct auto_pin_cfg *cfg)
2276{
2277 struct sigmatel_spec *spec = codec->spec;
2278 hda_nid_t nid;
2279 int i, old_num_dacs, err;
2280
2281 old_num_dacs = spec->multiout.num_dacs;
2282 for (i = 0; i < cfg->hp_outs; i++) {
2283 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2284 if (wid_caps & AC_WCAP_UNSOL_CAP)
2285 spec->hp_detect = 1;
2286 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2287 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2288 if (check_in_dac_nids(spec, nid))
2289 nid = 0;
2290 if (! nid)
c7d4b2fa 2291 continue;
eb06ed8f
TI		 2292 add_spec_dacs(spec, nid);
2293 }
2294 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2295 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2296 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2297 if (check_in_dac_nids(spec, nid))
2298 nid = 0;
eb06ed8f
TI		 2299 if (! nid)
2300 continue;
2301 add_spec_dacs(spec, nid);
c7d4b2fa 2302 }
1b290a51
MR		 2303 for (i = 0; i < cfg->line_outs; i++) {
2304 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2305 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2306 if (check_in_dac_nids(spec, nid))
2307 nid = 0;
2308 if (! nid)
2309 continue;
2310 add_spec_dacs(spec, nid);
2311 }
eb06ed8f
TI		 2312 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2313 static const char *pfxs[] = {
2314 "Speaker", "External Speaker", "Speaker2",
2315 };
2316 err = create_controls(spec, pfxs[i - old_num_dacs],
2317 spec->multiout.dac_nids[i], 3);
2318 if (err < 0)
2319 return err;
2320 }
2321 if (spec->multiout.hp_nid) {
2322 const char *pfx;
6020c008 2323 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 2324 pfx = "Master";
2325 else
2326 pfx = "Headphone";
2327 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
2328 if (err < 0)
2329 return err;
2330 }
c7d4b2fa
M		 2331
2332 return 0;
2333}
2334
8b65727b 2335/* labels for dmic mux inputs */
ddc2cec4 2336static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2337 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2338 "Digital Mic 3", "Digital Mic 4"
2339};
2340
2341/* create playback/capture controls for input pins on dmic capable codecs */
2342static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2343 const struct auto_pin_cfg *cfg)
2344{
2345 struct sigmatel_spec *spec = codec->spec;
2346 struct hda_input_mux *dimux = &spec->private_dimux;
2347 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2348 int err, i, j;
2349 char name[32];
8b65727b
MP		 2350
2351 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2352 dimux->items[dimux->num_items].index = 0;
2353 dimux->num_items++;
2354
2355 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2356 hda_nid_t nid;
8b65727b
MP		 2357 int index;
2358 int num_cons;
0678accd 2359 unsigned int wcaps;
8b65727b
MP		 2360 unsigned int def_conf;
2361
2362 def_conf = snd_hda_codec_read(codec,
2363 spec->dmic_nids[i],
2364 0,
2365 AC_VERB_GET_CONFIG_DEFAULT,
2366 0);
2367 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2368 continue;
2369
0678accd 2370 nid = spec->dmic_nids[i];
8b65727b 2371 num_cons = snd_hda_get_connections(codec,
e1f0d669 2372 spec->dmux_nids[0],
8b65727b
MP		 2373 con_lst,
2374 HDA_MAX_NUM_INPUTS);
2375 for (j = 0; j < num_cons; j++)
0678accd 2376 if (con_lst[j] == nid) {
8b65727b
MP		 2377 index = j;
2378 goto found;
2379 }
2380 continue;
2381found:
0678accd
MR		 2382 wcaps = get_wcaps(codec, nid);
2383
2384 if (wcaps & AC_WCAP_OUT_AMP) {
2385 sprintf(name, "%s Capture Volume",
2386 stac92xx_dmic_labels[dimux->num_items]);
2387
2388 err = stac92xx_add_control(spec,
2389 STAC_CTL_WIDGET_VOL,
2390 name,
2391 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2392 if (err < 0)
2393 return err;
2394 }
2395
8b65727b
MP		 2396 dimux->items[dimux->num_items].label =
2397 stac92xx_dmic_labels[dimux->num_items];
2398 dimux->items[dimux->num_items].index = index;
2399 dimux->num_items++;
2400 }
2401
2402 return 0;
2403}
2404
c7d4b2fa
M		 2405/* create playback/capture controls for input pins */
2406static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2407{
2408 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2409 struct hda_input_mux *imux = &spec->private_imux;
2410 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2411 int i, j, k;
2412
2413 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2414 int index;
2415
2416 if (!cfg->input_pins[i])
2417 continue;
2418 index = -1;
2419 for (j = 0; j < spec->num_muxes; j++) {
2420 int num_cons;
2421 num_cons = snd_hda_get_connections(codec,
2422 spec->mux_nids[j],
2423 con_lst,
2424 HDA_MAX_NUM_INPUTS);
2425 for (k = 0; k < num_cons; k++)
2426 if (con_lst[k] == cfg->input_pins[i]) {
2427 index = k;
2428 goto found;
2429 }
c7d4b2fa 2430 }
314634bc
TI		 2431 continue;
2432 found:
2433 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2434 imux->items[imux->num_items].index = index;
2435 imux->num_items++;
c7d4b2fa
M		 2436 }
2437
7b043899 2438 if (imux->num_items) {
62fe78e9
SR		 2439 /*
2440 * Set the current input for the muxes.
2441 * The STAC9221 has two input muxes with identical source
2442 * NID lists. Hopefully this won't get confused.
2443 */
2444 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2445 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2446 AC_VERB_SET_CONNECT_SEL,
2447 imux->items[0].index);
62fe78e9
SR		 2448 }
2449 }
2450
c7d4b2fa
M		 2451 return 0;
2452}
2453
c7d4b2fa
M		 2454static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2455{
2456 struct sigmatel_spec *spec = codec->spec;
2457 int i;
2458
2459 for (i = 0; i < spec->autocfg.line_outs; i++) {
2460 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2461 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2462 }
2463}
2464
2465static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2466{
2467 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2468 int i;
c7d4b2fa 2469
eb06ed8f
TI		 2470 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2471 hda_nid_t pin;
2472 pin = spec->autocfg.hp_pins[i];
2473 if (pin) /* connect to front */
2474 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2475 }
2476 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2477 hda_nid_t pin;
2478 pin = spec->autocfg.speaker_pins[i];
2479 if (pin) /* connect to front */
2480 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2481 }
c7d4b2fa
M		 2482}
2483
3cc08dc6 2484static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2485{
2486 struct sigmatel_spec *spec = codec->spec;
2487 int err;
bcecd9bd 2488 int hp_speaker_swap = 0;
c7d4b2fa 2489
8b65727b
MP		 2490 if ((err = snd_hda_parse_pin_def_config(codec,
2491 &spec->autocfg,
2492 spec->dmic_nids)) < 0)
c7d4b2fa 2493 return err;
82bc955f 2494 if (! spec->autocfg.line_outs)
869264c4 2495 return 0; /* can't find valid pin config */
19039bd0 2496
bcecd9bd
JZ		 2497 /* If we have no real line-out pin and multiple hp-outs, HPs should
2498 * be set up as multi-channel outputs.
2499 */
2500 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2501 spec->autocfg.hp_outs > 1) {
2502 /* Copy hp_outs to line_outs, backup line_outs in
2503 * speaker_outs so that the following routines can handle
2504 * HP pins as primary outputs.
2505 */
2506 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2507 sizeof(spec->autocfg.line_out_pins));
2508 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2509 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2510 sizeof(spec->autocfg.hp_pins));
2511 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2512 hp_speaker_swap = 1;
2513 }
2514
403d1944
MP		 2515 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2516 return err;
19039bd0
TI		 2517 if (spec->multiout.num_dacs == 0)
2518 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2519 return err;
c7d4b2fa 2520
0fb87bb4
ML		 2521 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2522
2523 if (err < 0)
2524 return err;
2525
bcecd9bd
JZ		 2526 if (hp_speaker_swap == 1) {
2527 /* Restore the hp_outs and line_outs */
2528 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2529 sizeof(spec->autocfg.line_out_pins));
2530 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2531 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2532 sizeof(spec->autocfg.speaker_pins));
2533 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2534 memset(spec->autocfg.speaker_pins, 0,
2535 sizeof(spec->autocfg.speaker_pins));
2536 spec->autocfg.speaker_outs = 0;
2537 }
2538
0fb87bb4
ML		 2539 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2540
2541 if (err < 0)
2542 return err;
2543
2544 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2545
2546 if (err < 0)
c7d4b2fa
M		 2547 return err;
2548
8b65727b
MP		 2549 if (spec->num_dmics > 0)
2550 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2551 &spec->autocfg)) < 0)
2552 return err;
2553
c7d4b2fa 2554 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2555 if (spec->multiout.max_channels > 2)
c7d4b2fa 2556 spec->surr_switch = 1;
c7d4b2fa 2557
82bc955f 2558 if (spec->autocfg.dig_out_pin)
3cc08dc6 2559 spec->multiout.dig_out_nid = dig_out;
82bc955f 2560 if (spec->autocfg.dig_in_pin)
3cc08dc6 2561 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2562
2563 if (spec->kctl_alloc)
2564 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2565
2566 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2567 if (!spec->dinput_mux)
2568 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2569
2570 return 1;
2571}
2572
82bc955f
TI		 2573/* add playback controls for HP output */
2574static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2575 struct auto_pin_cfg *cfg)
2576{
2577 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2578 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2579 unsigned int wid_caps;
2580
2581 if (! pin)
2582 return 0;
2583
2584 wid_caps = get_wcaps(codec, pin);
505cb341 2585 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2586 spec->hp_detect = 1;
82bc955f
TI		 2587
2588 return 0;
2589}
2590
160ea0dc
RF		 2591/* add playback controls for LFE output */
2592static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2593 struct auto_pin_cfg *cfg)
2594{
2595 struct sigmatel_spec *spec = codec->spec;
2596 int err;
2597 hda_nid_t lfe_pin = 0x0;
2598 int i;
2599
2600 /*
2601 * search speaker outs and line outs for a mono speaker pin
2602 * with an amp. If one is found, add LFE controls
2603 * for it.
2604 */
2605 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2606 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2607 unsigned long wcaps = get_wcaps(codec, pin);
2608 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2609 if (wcaps == AC_WCAP_OUT_AMP)
2610 /* found a mono speaker with an amp, must be lfe */
2611 lfe_pin = pin;
2612 }
2613
2614 /* if speaker_outs is 0, then speakers may be in line_outs */
2615 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2616 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2617 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2618 unsigned long cfg;
2619 cfg = snd_hda_codec_read(codec, pin, 0,
2620 AC_VERB_GET_CONFIG_DEFAULT,
2621 0x00);
2622 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2623 unsigned long wcaps = get_wcaps(codec, pin);
2624 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2625 if (wcaps == AC_WCAP_OUT_AMP)
2626 /* found a mono speaker with an amp,
2627 must be lfe */
2628 lfe_pin = pin;
2629 }
2630 }
2631 }
2632
2633 if (lfe_pin) {
eb06ed8f 2634 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2635 if (err < 0)
2636 return err;
2637 }
2638
2639 return 0;
2640}
2641
c7d4b2fa
M		 2642static int stac9200_parse_auto_config(struct hda_codec *codec)
2643{
2644 struct sigmatel_spec *spec = codec->spec;
2645 int err;
2646
df694daa 2647 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2648 return err;
2649
2650 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2651 return err;
2652
82bc955f
TI		 2653 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2654 return err;
2655
160ea0dc
RF		 2656 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2657 return err;
2658
82bc955f 2659 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2660 spec->multiout.dig_out_nid = 0x05;
82bc955f 2661 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2662 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2663
2664 if (spec->kctl_alloc)
2665 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2666
2667 spec->input_mux = &spec->private_imux;
8b65727b 2668 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2669
2670 return 1;
2671}
2672
62fe78e9
SR		 2673/*
2674 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2675 * funky external mute control using GPIO pins.
2676 */
2677
2678static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
2679{
2680 unsigned int gpiostate, gpiomask, gpiodir;
2681
2682 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2683 AC_VERB_GET_GPIO_DATA, 0);
2684
2685 if (!muted)
2686 gpiostate |= (1 << pin);
2687 else
2688 gpiostate &= ~(1 << pin);
2689
2690 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2691 AC_VERB_GET_GPIO_MASK, 0);
2692 gpiomask |= (1 << pin);
2693
2694 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2695 AC_VERB_GET_GPIO_DIRECTION, 0);
2696 gpiodir |= (1 << pin);
2697
2698 /* AppleHDA seems to do this -- WTF is this verb?? */
2699 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2700
2701 snd_hda_codec_write(codec, codec->afg, 0,
2702 AC_VERB_SET_GPIO_MASK, gpiomask);
2703 snd_hda_codec_write(codec, codec->afg, 0,
2704 AC_VERB_SET_GPIO_DIRECTION, gpiodir);
2705
2706 msleep(1);
2707
2708 snd_hda_codec_write(codec, codec->afg, 0,
2709 AC_VERB_SET_GPIO_DATA, gpiostate);
2710}
2711
314634bc
TI		 2712static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2713 unsigned int event)
2714{
2715 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2716 snd_hda_codec_write_cache(codec, nid, 0,
2717 AC_VERB_SET_UNSOLICITED_ENABLE,
2718 (AC_USRSP_EN | event));
314634bc
TI		 2719}
2720
a64135a2
MR		 2721static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
2722{
2723 int i;
2724 for (i = 0; i < cfg->hp_outs; i++)
2725 if (cfg->hp_pins[i] == nid)
2726 return 1; /* nid is a HP-Out */
2727
2728 return 0; /* nid is not a HP-Out */
2729};
2730
c7d4b2fa
M		 2731static int stac92xx_init(struct hda_codec *codec)
2732{
2733 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2734 struct auto_pin_cfg *cfg = &spec->autocfg;
2735 int i;
c7d4b2fa 2736
c7d4b2fa
M		 2737 snd_hda_sequence_write(codec, spec->init);
2738
82bc955f
TI		 2739 /* set up pins */
2740 if (spec->hp_detect) {
505cb341 2741 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2742 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2743 enable_pin_detect(codec, cfg->hp_pins[i],
2744 STAC_HP_EVENT);
0a07acaf
TI		 2745 /* force to enable the first line-out; the others are set up
2746 * in unsol_event
2747 */
2748 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2749 AC_PINCTL_OUT_EN);
eb995a8c 2750 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2751 /* fake event to set up pins */
2752 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2753 } else {
2754 stac92xx_auto_init_multi_out(codec);
2755 stac92xx_auto_init_hp_out(codec);
2756 }
2757 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2758 hda_nid_t nid = cfg->input_pins[i];
2759 if (nid) {
2760 unsigned int pinctl = AC_PINCTL_IN_EN;
2761 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2762 pinctl |= stac92xx_get_vref(codec, nid);
2763 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2764 }
82bc955f 2765 }
a64135a2
MR		 2766 for (i = 0; i < spec->num_dmics; i++)
2767 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2768 AC_PINCTL_IN_EN);
2769 for (i = 0; i < spec->num_pwrs; i++) {
2770 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
2771 ? STAC_HP_EVENT : STAC_PWR_EVENT;
2772 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
2773 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2774 /* outputs are only ports capable of power management
2775 * any attempts on powering down a input port cause the
2776 * referenced VREF to act quirky.
2777 */
2778 if (pinctl & AC_PINCTL_IN_EN)
2779 continue;
2780 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
2781 codec->patch_ops.unsol_event(codec, (event | i) << 26);
2782 }
8b65727b 2783
82bc955f
TI		 2784 if (cfg->dig_out_pin)
2785 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2786 AC_PINCTL_OUT_EN);
2787 if (cfg->dig_in_pin)
2788 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2789 AC_PINCTL_IN_EN);
2790
62fe78e9
SR		 2791 if (spec->gpio_mute) {
2792 stac922x_gpio_mute(codec, 0, 0);
2793 stac922x_gpio_mute(codec, 1, 0);
2794 }
2795
c7d4b2fa
M		 2796 return 0;
2797}
2798
2f2f4251
M		 2799static void stac92xx_free(struct hda_codec *codec)
2800{
c7d4b2fa
M		 2801 struct sigmatel_spec *spec = codec->spec;
2802 int i;
2803
2804 if (! spec)
2805 return;
2806
2807 if (spec->kctl_alloc) {
2808 for (i = 0; i < spec->num_kctl_used; i++)
2809 kfree(spec->kctl_alloc[i].name);
2810 kfree(spec->kctl_alloc);
2811 }
2812
11b44bbd
RF		 2813 if (spec->bios_pin_configs)
2814 kfree(spec->bios_pin_configs);
2815
c7d4b2fa 2816 kfree(spec);
2f2f4251
M		 2817}
2818
4e55096e
M		 2819static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2820 unsigned int flag)
2821{
2822 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2823 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2824
f9acba43
TI		 2825 if (pin_ctl & AC_PINCTL_IN_EN) {
2826 /*
2827 * we need to check the current set-up direction of
2828 * shared input pins since they can be switched via
2829 * "xxx as Output" mixer switch
2830 */
2831 struct sigmatel_spec *spec = codec->spec;
2832 struct auto_pin_cfg *cfg = &spec->autocfg;
2833 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2834 spec->line_switch) ||
2835 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2836 spec->mic_switch))
2837 return;
2838 }
2839
7b043899
SL		 2840 /* if setting pin direction bits, clear the current
2841 direction bits first */
2842 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2843 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2844
82beb8fd 2845 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2846 AC_VERB_SET_PIN_WIDGET_CONTROL,
2847 pin_ctl | flag);
2848}
2849
2850static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2851 unsigned int flag)
2852{
2853 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2854 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 2855 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2856 AC_VERB_SET_PIN_WIDGET_CONTROL,
2857 pin_ctl & ~flag);
2858}
2859
40c1d308 2860static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 2861{
2862 if (!nid)
2863 return 0;
2864 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 2865 & (1 << 31)) {
2866 unsigned int pinctl;
2867 pinctl = snd_hda_codec_read(codec, nid, 0,
2868 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2869 if (pinctl & AC_PINCTL_IN_EN)
2870 return 0; /* mic- or line-input */
2871 else
2872 return 1; /* HP-output */
2873 }
314634bc
TI		 2874 return 0;
2875}
2876
2877static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 2878{
2879 struct sigmatel_spec *spec = codec->spec;
2880 struct auto_pin_cfg *cfg = &spec->autocfg;
2881 int i, presence;
2882
eb06ed8f
TI		 2883 presence = 0;
2884 for (i = 0; i < cfg->hp_outs; i++) {
40c1d308 2885 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
314634bc
TI		 2886 if (presence)
2887 break;
eb06ed8f 2888 }
4e55096e
M		 2889
2890 if (presence) {
2891 /* disable lineouts, enable hp */
2892 for (i = 0; i < cfg->line_outs; i++)
2893 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
2894 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2895 for (i = 0; i < cfg->speaker_outs; i++)
2896 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
2897 AC_PINCTL_OUT_EN);
4e55096e
M		 2898 } else {
2899 /* enable lineouts, disable hp */
2900 for (i = 0; i < cfg->line_outs; i++)
2901 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
2902 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2903 for (i = 0; i < cfg->speaker_outs; i++)
2904 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
2905 AC_PINCTL_OUT_EN);
4e55096e
M		 2906 }
2907}
2908
a64135a2
MR		 2909static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
2910{
2911 struct sigmatel_spec *spec = codec->spec;
2912 hda_nid_t nid = spec->pwr_nids[idx];
2913 int presence, val;
2914 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
2915 & 0x000000ff;
2916 presence = get_hp_pin_presence(codec, nid);
2917 idx = 1 << idx;
2918
2919 if (presence)
2920 val &= ~idx;
2921 else
2922 val |= idx;
2923
2924 /* power down unused output ports */
2925 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
2926};
2927
314634bc
TI		 2928static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
2929{
a64135a2
MR		 2930 struct sigmatel_spec *spec = codec->spec;
2931 int idx = res >> 26 & 0x0f;
2932
2933 switch ((res >> 26) & 0x30) {
314634bc
TI		 2934 case STAC_HP_EVENT:
2935 stac92xx_hp_detect(codec, res);
a64135a2
MR		 2936 /* fallthru */
2937 case STAC_PWR_EVENT:
2938 if (spec->num_pwrs > 0)
2939 stac92xx_pin_sense(codec, idx);
314634bc
TI		 2940 }
2941}
2942
cb53c626 2943#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2944static int stac92xx_resume(struct hda_codec *codec)
2945{
dc81bed1
TI		 2946 struct sigmatel_spec *spec = codec->spec;
2947
11b44bbd 2948 stac92xx_set_config_regs(codec);
dc81bed1
TI		 2949 snd_hda_sequence_write(codec, spec->init);
2950 if (spec->gpio_mute) {
2951 stac922x_gpio_mute(codec, 0, 0);
2952 stac922x_gpio_mute(codec, 1, 0);
2953 }
82beb8fd
TI		 2954 snd_hda_codec_resume_amp(codec);
2955 snd_hda_codec_resume_cache(codec);
dc81bed1
TI		 2956 /* invoke unsolicited event to reset the HP state */
2957 if (spec->hp_detect)
2958 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 2959 return 0;
2960}
2961#endif
2962
2f2f4251
M		 2963static struct hda_codec_ops stac92xx_patch_ops = {
2964 .build_controls = stac92xx_build_controls,
2965 .build_pcms = stac92xx_build_pcms,
2966 .init = stac92xx_init,
2967 .free = stac92xx_free,
4e55096e 2968 .unsol_event = stac92xx_unsol_event,
cb53c626 2969#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2970 .resume = stac92xx_resume,
2971#endif
2f2f4251
M		 2972};
2973
2974static int patch_stac9200(struct hda_codec *codec)
2975{
2976 struct sigmatel_spec *spec;
c7d4b2fa 2977 int err;
2f2f4251 2978
e560d8d8 2979 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2980 if (spec == NULL)
2981 return -ENOMEM;
2982
2983 codec->spec = spec;
a4eed138 2984 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 2985 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 2986 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
2987 stac9200_models,
2988 stac9200_cfg_tbl);
11b44bbd
RF		 2989 if (spec->board_config < 0) {
2990 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
2991 err = stac92xx_save_bios_config_regs(codec);
2992 if (err < 0) {
2993 stac92xx_free(codec);
2994 return err;
2995 }
2996 spec->pin_configs = spec->bios_pin_configs;
2997 } else {
403d1944
MP		 2998 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
2999 stac92xx_set_config_regs(codec);
3000 }
2f2f4251
M		 3001
3002 spec->multiout.max_channels = 2;
3003 spec->multiout.num_dacs = 1;
3004 spec->multiout.dac_nids = stac9200_dac_nids;
3005 spec->adc_nids = stac9200_adc_nids;
3006 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3007 spec->num_muxes = 1;
8b65727b 3008 spec->num_dmics = 0;
9e05b7a3 3009 spec->num_adcs = 1;
a64135a2 3010 spec->num_pwrs = 0;
c7d4b2fa 3011
1194b5b7
TI		 3012 if (spec->board_config == STAC_9200_GATEWAY)
3013 spec->init = stac9200_eapd_init;
3014 else
3015 spec->init = stac9200_core_init;
2f2f4251 3016 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 3017
3018 err = stac9200_parse_auto_config(codec);
3019 if (err < 0) {
3020 stac92xx_free(codec);
3021 return err;
3022 }
2f2f4251
M		 3023
3024 codec->patch_ops = stac92xx_patch_ops;
3025
3026 return 0;
3027}
3028
8e21c34c
TD		 3029static int patch_stac925x(struct hda_codec *codec)
3030{
3031 struct sigmatel_spec *spec;
3032 int err;
3033
3034 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3035 if (spec == NULL)
3036 return -ENOMEM;
3037
3038 codec->spec = spec;
a4eed138 3039 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3040 spec->pin_nids = stac925x_pin_nids;
3041 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3042 stac925x_models,
3043 stac925x_cfg_tbl);
9e507abd 3044 again:
8e21c34c 3045 if (spec->board_config < 0) {
2c11f955
TD		 3046 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3047 "using BIOS defaults\n");
8e21c34c
TD		 3048 err = stac92xx_save_bios_config_regs(codec);
3049 if (err < 0) {
3050 stac92xx_free(codec);
3051 return err;
3052 }
3053 spec->pin_configs = spec->bios_pin_configs;
3054 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3055 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3056 stac92xx_set_config_regs(codec);
3057 }
3058
3059 spec->multiout.max_channels = 2;
3060 spec->multiout.num_dacs = 1;
3061 spec->multiout.dac_nids = stac925x_dac_nids;
3062 spec->adc_nids = stac925x_adc_nids;
3063 spec->mux_nids = stac925x_mux_nids;
3064 spec->num_muxes = 1;
9e05b7a3 3065 spec->num_adcs = 1;
a64135a2 3066 spec->num_pwrs = 0;
2c11f955
TD		 3067 switch (codec->vendor_id) {
3068 case 0x83847632: /* STAC9202 */
3069 case 0x83847633: /* STAC9202D */
3070 case 0x83847636: /* STAC9251 */
3071 case 0x83847637: /* STAC9251D */
f6e9852a 3072 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3073 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3074 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3075 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3076 break;
3077 default:
3078 spec->num_dmics = 0;
3079 break;
3080 }
8e21c34c
TD		 3081
3082 spec->init = stac925x_core_init;
3083 spec->mixer = stac925x_mixer;
3084
3085 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3086 if (!err) {
3087 if (spec->board_config < 0) {
3088 printk(KERN_WARNING "hda_codec: No auto-config is "
3089 "available, default to model=ref\n");
3090 spec->board_config = STAC_925x_REF;
3091 goto again;
3092 }
3093 err = -EINVAL;
3094 }
8e21c34c
TD		 3095 if (err < 0) {
3096 stac92xx_free(codec);
3097 return err;
3098 }
3099
3100 codec->patch_ops = stac92xx_patch_ops;
3101
3102 return 0;
3103}
3104
e1f0d669
MR		 3105static struct hda_input_mux stac92hd73xx_dmux = {
3106 .num_items = 4,
3107 .items = {
3108 { "Analog Inputs", 0x0b },
3109 { "CD", 0x08 },
3110 { "Digital Mic 1", 0x09 },
3111 { "Digital Mic 2", 0x0a },
3112 }
3113};
3114
3115static int patch_stac92hd73xx(struct hda_codec *codec)
3116{
3117 struct sigmatel_spec *spec;
3118 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3119 int err = 0;
3120
3121 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3122 if (spec == NULL)
3123 return -ENOMEM;
3124
3125 codec->spec = spec;
3126 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3127 spec->pin_nids = stac92hd73xx_pin_nids;
3128 spec->board_config = snd_hda_check_board_config(codec,
3129 STAC_92HD73XX_MODELS,
3130 stac92hd73xx_models,
3131 stac92hd73xx_cfg_tbl);
3132again:
3133 if (spec->board_config < 0) {
3134 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3135 " STAC92HD73XX, using BIOS defaults\n");
3136 err = stac92xx_save_bios_config_regs(codec);
3137 if (err < 0) {
3138 stac92xx_free(codec);
3139 return err;
3140 }
3141 spec->pin_configs = spec->bios_pin_configs;
3142 } else {
3143 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3144 stac92xx_set_config_regs(codec);
3145 }
3146
3147 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3148 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3149
3150 if (spec->multiout.num_dacs < 0) {
3151 printk(KERN_WARNING "hda_codec: Could not determine "
3152 "number of channels defaulting to DAC count\n");
3153 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3154 }
3155
3156 switch (spec->multiout.num_dacs) {
3157 case 0x3: /* 6 Channel */
3158 spec->mixer = stac92hd73xx_6ch_mixer;
3159 spec->init = stac92hd73xx_6ch_core_init;
3160 break;
3161 case 0x4: /* 8 Channel */
3162 spec->multiout.hp_nid = 0x18;
3163 spec->mixer = stac92hd73xx_8ch_mixer;
3164 spec->init = stac92hd73xx_8ch_core_init;
3165 break;
3166 case 0x5: /* 10 Channel */
3167 spec->multiout.hp_nid = 0x19;
3168 spec->mixer = stac92hd73xx_10ch_mixer;
3169 spec->init = stac92hd73xx_10ch_core_init;
3170 };
3171
3172 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3173 spec->aloopback_mask = 0x01;
3174 spec->aloopback_shift = 8;
3175
3176 spec->mux_nids = stac92hd73xx_mux_nids;
3177 spec->adc_nids = stac92hd73xx_adc_nids;
3178 spec->dmic_nids = stac92hd73xx_dmic_nids;
3179 spec->dmux_nids = stac92hd73xx_dmux_nids;
3180
3181 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3182 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
3183 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
1697055e 3184 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3185 spec->dinput_mux = &stac92hd73xx_dmux;
3186 /* GPIO0 High = Enable EAPD */
3187 spec->gpio_mask = spec->gpio_data = 0x000001;
3188 stac92xx_enable_gpio_mask(codec);
3189
a64135a2
MR		 3190 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3191 spec->pwr_nids = stac92hd73xx_pwr_nids;
3192
e1f0d669
MR		 3193 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3194
3195 if (!err) {
3196 if (spec->board_config < 0) {
3197 printk(KERN_WARNING "hda_codec: No auto-config is "
3198 "available, default to model=ref\n");
3199 spec->board_config = STAC_92HD73XX_REF;
3200 goto again;
3201 }
3202 err = -EINVAL;
3203 }
3204
3205 if (err < 0) {
3206 stac92xx_free(codec);
3207 return err;
3208 }
3209
3210 codec->patch_ops = stac92xx_patch_ops;
3211
3212 return 0;
3213}
3214
e035b841
MR		 3215static int patch_stac92hd71bxx(struct hda_codec *codec)
3216{
3217 struct sigmatel_spec *spec;
3218 int err = 0;
3219
3220 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3221 if (spec == NULL)
3222 return -ENOMEM;
3223
3224 codec->spec = spec;
3225 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
3226 spec->pin_nids = stac92hd71bxx_pin_nids;
3227 spec->board_config = snd_hda_check_board_config(codec,
3228 STAC_92HD71BXX_MODELS,
3229 stac92hd71bxx_models,
3230 stac92hd71bxx_cfg_tbl);
3231again:
3232 if (spec->board_config < 0) {
3233 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3234 " STAC92HD71BXX, using BIOS defaults\n");
3235 err = stac92xx_save_bios_config_regs(codec);
3236 if (err < 0) {
3237 stac92xx_free(codec);
3238 return err;
3239 }
3240 spec->pin_configs = spec->bios_pin_configs;
3241 } else {
3242 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3243 stac92xx_set_config_regs(codec);
3244 }
3245
541eee87
MR		 3246 switch (codec->vendor_id) {
3247 case 0x111d76b6: /* 4 Port without Analog Mixer */
3248 case 0x111d76b7:
3249 case 0x111d76b4: /* 6 Port without Analog Mixer */
3250 case 0x111d76b5:
3251 spec->mixer = stac92hd71bxx_mixer;
3252 spec->init = stac92hd71bxx_core_init;
3253 break;
3254 default:
3255 spec->mixer = stac92hd71bxx_analog_mixer;
3256 spec->init = stac92hd71bxx_analog_core_init;
3257 }
3258
3259 spec->aloopback_mask = 0x20;
3260 spec->aloopback_shift = 0;
3261
e035b841
MR		 3262 spec->gpio_mask = spec->gpio_data = 0x00000001; /* GPIO0 High = EAPD */
3263 stac92xx_enable_gpio_mask(codec);
3264
e035b841
MR		 3265 spec->mux_nids = stac92hd71bxx_mux_nids;
3266 spec->adc_nids = stac92hd71bxx_adc_nids;
3267 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3268 spec->dmux_nids = stac92hd71bxx_dmux_nids;
e035b841
MR		 3269
3270 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3271 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3272 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3273 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3274
a64135a2
MR		 3275 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3276 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3277
e035b841
MR		 3278 spec->multiout.num_dacs = 2;
3279 spec->multiout.hp_nid = 0x11;
3280 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3281
3282 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3283 if (!err) {
3284 if (spec->board_config < 0) {
3285 printk(KERN_WARNING "hda_codec: No auto-config is "
3286 "available, default to model=ref\n");
3287 spec->board_config = STAC_92HD71BXX_REF;
3288 goto again;
3289 }
3290 err = -EINVAL;
3291 }
3292
3293 if (err < 0) {
3294 stac92xx_free(codec);
3295 return err;
3296 }
3297
3298 codec->patch_ops = stac92xx_patch_ops;
3299
3300 return 0;
3301};
3302
2f2f4251
M		 3303static int patch_stac922x(struct hda_codec *codec)
3304{
3305 struct sigmatel_spec *spec;
c7d4b2fa 3306 int err;
2f2f4251 3307
e560d8d8 3308 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3309 if (spec == NULL)
3310 return -ENOMEM;
3311
3312 codec->spec = spec;
a4eed138 3313 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3314 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3315 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3316 stac922x_models,
3317 stac922x_cfg_tbl);
5d5d3bc3 3318 if (spec->board_config == STAC_INTEL_MAC_V3) {
3fc24d85
TI		 3319 spec->gpio_mute = 1;
3320 /* Intel Macs have all same PCI SSID, so we need to check
3321 * codec SSID to distinguish the exact models
3322 */
6f0778d8 3323 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3324 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3325
3326 case 0x106b0800:
3327 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3328 break;
5d5d3bc3
IZ		 3329 case 0x106b0600:
3330 case 0x106b0700:
3331 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3332 break;
5d5d3bc3
IZ		 3333 case 0x106b0e00:
3334 case 0x106b0f00:
3335 case 0x106b1600:
3336 case 0x106b1700:
3337 case 0x106b0200:
3338 case 0x106b1e00:
3339 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3340 break;
5d5d3bc3
IZ		 3341 case 0x106b1a00:
3342 case 0x00000100:
3343 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3344 break;
5d5d3bc3
IZ		 3345 case 0x106b0a00:
3346 case 0x106b2200:
3347 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3348 break;
3fc24d85
TI		 3349 }
3350 }
3351
9e507abd 3352 again:
11b44bbd
RF		 3353 if (spec->board_config < 0) {
3354 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3355 "using BIOS defaults\n");
3356 err = stac92xx_save_bios_config_regs(codec);
3357 if (err < 0) {
3358 stac92xx_free(codec);
3359 return err;
3360 }
3361 spec->pin_configs = spec->bios_pin_configs;
3362 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3363 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3364 stac92xx_set_config_regs(codec);
3365 }
2f2f4251 3366
c7d4b2fa
M		 3367 spec->adc_nids = stac922x_adc_nids;
3368 spec->mux_nids = stac922x_mux_nids;
2549413e 3369 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3370 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3371 spec->num_dmics = 0;
a64135a2 3372 spec->num_pwrs = 0;
c7d4b2fa
M		 3373
3374 spec->init = stac922x_core_init;
2f2f4251 3375 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3376
3377 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3378
3cc08dc6 3379 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3380 if (!err) {
3381 if (spec->board_config < 0) {
3382 printk(KERN_WARNING "hda_codec: No auto-config is "
3383 "available, default to model=ref\n");
3384 spec->board_config = STAC_D945_REF;
3385 goto again;
3386 }
3387 err = -EINVAL;
3388 }
3cc08dc6
MP		 3389 if (err < 0) {
3390 stac92xx_free(codec);
3391 return err;
3392 }
3393
3394 codec->patch_ops = stac92xx_patch_ops;
3395
807a4636
TI		 3396 /* Fix Mux capture level; max to 2 */
3397 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3398 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3399 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3400 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3401 (0 << AC_AMPCAP_MUTE_SHIFT));
3402
3cc08dc6
MP		 3403 return 0;
3404}
3405
3406static int patch_stac927x(struct hda_codec *codec)
3407{
3408 struct sigmatel_spec *spec;
3409 int err;
3410
3411 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3412 if (spec == NULL)
3413 return -ENOMEM;
3414
3415 codec->spec = spec;
a4eed138 3416 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3417 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3418 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3419 stac927x_models,
3420 stac927x_cfg_tbl);
9e507abd 3421 again:
8e9068b1
MR		 3422 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3423 if (spec->board_config < 0)
3424 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3425 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3426 err = stac92xx_save_bios_config_regs(codec);
3427 if (err < 0) {
3428 stac92xx_free(codec);
3429 return err;
3430 }
3431 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3432 } else {
3cc08dc6
MP		 3433 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3434 stac92xx_set_config_regs(codec);
3435 }
3436
8e9068b1
MR		 3437 spec->adc_nids = stac927x_adc_nids;
3438 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3439 spec->mux_nids = stac927x_mux_nids;
3440 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
3441 spec->multiout.dac_nids = spec->dac_nids;
3442
81d3dbde 3443 switch (spec->board_config) {
93ed1503 3444 case STAC_D965_3ST:
93ed1503 3445 case STAC_D965_5ST:
8e9068b1
MR		 3446 /* GPIO0 High = Enable EAPD */
3447 spec->gpio_mask = spec->gpio_data = 0x00000001;
3448 spec->num_dmics = 0;
3449
93ed1503 3450 spec->init = d965_core_init;
9e05b7a3 3451 spec->mixer = stac927x_mixer;
81d3dbde 3452 break;
8e9068b1 3453 case STAC_DELL_BIOS:
2f32d909
MR		 3454 /* correct the front output jack as a hp out */
3455 stac92xx_set_config_reg(codec, 0x0f, 0x02270110);
c481fca3
MR		 3456 /* correct the front input jack as a mic */
3457 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3458 /* fallthru */
8e9068b1
MR		 3459 case STAC_DELL_3ST:
3460 /* GPIO2 High = Enable EAPD */
3461 spec->gpio_mask = spec->gpio_data = 0x00000004;
7f16859a
MR		 3462 spec->dmic_nids = stac927x_dmic_nids;
3463 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3464
8e9068b1
MR		 3465 spec->init = d965_core_init;
3466 spec->mixer = stac927x_mixer;
3467 spec->dmux_nids = stac927x_dmux_nids;
1697055e 3468 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 3469 break;
3470 default:
f1f208d0
MR		 3471 /* GPIO0 High = Enable EAPD */
3472 spec->gpio_mask = spec->gpio_data = 0x00000001;
8e9068b1
MR		 3473 spec->num_dmics = 0;
3474
3475 spec->init = stac927x_core_init;
3476 spec->mixer = stac927x_mixer;
7f16859a
MR		 3477 }
3478
a64135a2 3479 spec->num_pwrs = 0;
e1f0d669
MR		 3480 spec->aloopback_mask = 0x40;
3481 spec->aloopback_shift = 0;
8e9068b1 3482
8259980e 3483 stac92xx_enable_gpio_mask(codec);
3cc08dc6 3484 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3485 if (!err) {
3486 if (spec->board_config < 0) {
3487 printk(KERN_WARNING "hda_codec: No auto-config is "
3488 "available, default to model=ref\n");
3489 spec->board_config = STAC_D965_REF;
3490 goto again;
3491 }
3492 err = -EINVAL;
3493 }
c7d4b2fa
M		 3494 if (err < 0) {
3495 stac92xx_free(codec);
3496 return err;
3497 }
2f2f4251
M		 3498
3499 codec->patch_ops = stac92xx_patch_ops;
3500
3501 return 0;
3502}
3503
f3302a59
MP		 3504static int patch_stac9205(struct hda_codec *codec)
3505{
3506 struct sigmatel_spec *spec;
8259980e 3507 int err;
f3302a59
MP		 3508
3509 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3510 if (spec == NULL)
3511 return -ENOMEM;
3512
3513 codec->spec = spec;
a4eed138 3514 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3515 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3516 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3517 stac9205_models,
3518 stac9205_cfg_tbl);
9e507abd 3519 again:
11b44bbd
RF		 3520 if (spec->board_config < 0) {
3521 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3522 err = stac92xx_save_bios_config_regs(codec);
3523 if (err < 0) {
3524 stac92xx_free(codec);
3525 return err;
3526 }
3527 spec->pin_configs = spec->bios_pin_configs;
3528 } else {
f3302a59
MP		 3529 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3530 stac92xx_set_config_regs(codec);
3531 }
3532
3533 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3534 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3535 spec->mux_nids = stac9205_mux_nids;
2549413e 3536 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3537 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3538 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3539 spec->dmux_nids = stac9205_dmux_nids;
1697055e 3540 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 3541 spec->num_pwrs = 0;
f3302a59
MP		 3542
3543 spec->init = stac9205_core_init;
3544 spec->mixer = stac9205_mixer;
3545
e1f0d669
MR		 3546 spec->aloopback_mask = 0x40;
3547 spec->aloopback_shift = 0;
f3302a59 3548 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3549
ae0a8ed8 3550 switch (spec->board_config){
ae0a8ed8 3551 case STAC_9205_DELL_M43:
87d48363
MR		 3552 /* Enable SPDIF in/out */
3553 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3554 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3555
8259980e 3556 spec->gpio_mask = 0x00000007; /* GPIO0-2 */
87d48363
MR		 3557 /* GPIO0 High = EAPD, GPIO1 Low = DRM,
3558 * GPIO2 High = Headphone Mute
3559 */
8259980e 3560 spec->gpio_data = 0x00000005;
ae0a8ed8
TD		 3561 break;
3562 default:
3563 /* GPIO0 High = EAPD */
3564 spec->gpio_mask = spec->gpio_data = 0x00000001;
3565 break;
3566 }
33382403 3567
8259980e 3568 stac92xx_enable_gpio_mask(codec);
f3302a59 3569 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 3570 if (!err) {
3571 if (spec->board_config < 0) {
3572 printk(KERN_WARNING "hda_codec: No auto-config is "
3573 "available, default to model=ref\n");
3574 spec->board_config = STAC_9205_REF;
3575 goto again;
3576 }
3577 err = -EINVAL;
3578 }
f3302a59
MP		 3579 if (err < 0) {
3580 stac92xx_free(codec);
3581 return err;
3582 }
3583
3584 codec->patch_ops = stac92xx_patch_ops;
3585
3586 return 0;
3587}
3588
db064e50 3589/*
6d859065 3590 * STAC9872 hack
db064e50
TI		 3591 */
3592
99ccc560 3593/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 3594static hda_nid_t vaio_dacs[] = { 0x2 };
3595#define VAIO_HP_DAC 0x5
3596static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
3597static hda_nid_t vaio_mux_nids[] = { 0x15 };
3598
3599static struct hda_input_mux vaio_mux = {
a3a2f429 3600 .num_items = 3,
db064e50 3601 .items = {
d773781c 3602 /* { "HP", 0x0 }, */
1624cb9a
TI		 3603 { "Mic Jack", 0x1 },
3604 { "Internal Mic", 0x2 },
db064e50
TI		 3605 { "PCM", 0x3 },
3606 }
3607};
3608
3609static struct hda_verb vaio_init[] = {
3610 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 3611 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 3612 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3613 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3614 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3615 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3616 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 3617 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3618 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3619 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3620 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3621 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3622 {}
3623};
3624
6d859065
GM		 3625static struct hda_verb vaio_ar_init[] = {
3626 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
3627 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3628 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3629 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3630/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
3631 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3632 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 3633 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3634 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3635/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
3636 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3637 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3638 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3639 {}
3640};
3641
db064e50 3642/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3643static struct hda_bind_ctls vaio_bind_master_vol = {
3644 .ops = &snd_hda_bind_vol,
3645 .values = {
3646 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3647 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3648 0
3649 },
3650};
db064e50
TI		 3651
3652/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3653static struct hda_bind_ctls vaio_bind_master_sw = {
3654 .ops = &snd_hda_bind_sw,
3655 .values = {
3656 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3657 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3658 0,
3659 },
3660};
db064e50
TI		 3661
3662static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 3663 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3664 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 3665 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3666 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3667 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3668 {
3669 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3670 .name = "Capture Source",
3671 .count = 1,
3672 .info = stac92xx_mux_enum_info,
3673 .get = stac92xx_mux_enum_get,
3674 .put = stac92xx_mux_enum_put,
3675 },
3676 {}
3677};
3678
6d859065 3679static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 3680 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3681 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 3682 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3683 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3684 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3685 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
3686 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
3687 {
3688 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3689 .name = "Capture Source",
3690 .count = 1,
3691 .info = stac92xx_mux_enum_info,
3692 .get = stac92xx_mux_enum_get,
3693 .put = stac92xx_mux_enum_put,
3694 },
3695 {}
3696};
3697
3698static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 3699 .build_controls = stac92xx_build_controls,
3700 .build_pcms = stac92xx_build_pcms,
3701 .init = stac92xx_init,
3702 .free = stac92xx_free,
cb53c626 3703#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 3704 .resume = stac92xx_resume,
3705#endif
3706};
3707
72e7b0dd
TI		 3708static int stac9872_vaio_init(struct hda_codec *codec)
3709{
3710 int err;
3711
3712 err = stac92xx_init(codec);
3713 if (err < 0)
3714 return err;
3715 if (codec->patch_ops.unsol_event)
3716 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3717 return 0;
3718}
3719
3720static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
3721{
40c1d308 3722 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 3723 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3724 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3725 } else {
3726 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3727 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3728 }
3729}
3730
3731static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
3732{
3733 switch (res >> 26) {
3734 case STAC_HP_EVENT:
3735 stac9872_vaio_hp_detect(codec, res);
3736 break;
3737 }
3738}
3739
3740static struct hda_codec_ops stac9872_vaio_patch_ops = {
3741 .build_controls = stac92xx_build_controls,
3742 .build_pcms = stac92xx_build_pcms,
3743 .init = stac9872_vaio_init,
3744 .free = stac92xx_free,
3745 .unsol_event = stac9872_vaio_unsol_event,
3746#ifdef CONFIG_PM
3747 .resume = stac92xx_resume,
3748#endif
3749};
3750
6d859065
GM		 3751enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
3752 CXD9872RD_VAIO,
3753 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
3754 STAC9872AK_VAIO,
3755 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
3756 STAC9872K_VAIO,
3757 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 3758 CXD9872AKD_VAIO,
3759 STAC_9872_MODELS,
3760};
3761
3762static const char *stac9872_models[STAC_9872_MODELS] = {
3763 [CXD9872RD_VAIO] = "vaio",
3764 [CXD9872AKD_VAIO] = "vaio-ar",
3765};
3766
3767static struct snd_pci_quirk stac9872_cfg_tbl[] = {
3768 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
3769 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
3770 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 3771 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 3772 {}
3773};
3774
6d859065 3775static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 3776{
3777 struct sigmatel_spec *spec;
3778 int board_config;
3779
f5fcc13c
TI		 3780 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
3781 stac9872_models,
3782 stac9872_cfg_tbl);
db064e50
TI		 3783 if (board_config < 0)
3784 /* unknown config, let generic-parser do its job... */
3785 return snd_hda_parse_generic_codec(codec);
3786
3787 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3788 if (spec == NULL)
3789 return -ENOMEM;
3790
3791 codec->spec = spec;
3792 switch (board_config) {
6d859065
GM		 3793 case CXD9872RD_VAIO:
3794 case STAC9872AK_VAIO:
3795 case STAC9872K_VAIO:
db064e50
TI		 3796 spec->mixer = vaio_mixer;
3797 spec->init = vaio_init;
3798 spec->multiout.max_channels = 2;
3799 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3800 spec->multiout.dac_nids = vaio_dacs;
3801 spec->multiout.hp_nid = VAIO_HP_DAC;
3802 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3803 spec->adc_nids = vaio_adcs;
a64135a2 3804 spec->num_pwrs = 0;
db064e50
TI		 3805 spec->input_mux = &vaio_mux;
3806 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3807 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 3808 break;
6d859065
GM		 3809
3810 case CXD9872AKD_VAIO:
3811 spec->mixer = vaio_ar_mixer;
3812 spec->init = vaio_ar_init;
3813 spec->multiout.max_channels = 2;
3814 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3815 spec->multiout.dac_nids = vaio_dacs;
3816 spec->multiout.hp_nid = VAIO_HP_DAC;
3817 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 3818 spec->num_pwrs = 0;
6d859065
GM		 3819 spec->adc_nids = vaio_adcs;
3820 spec->input_mux = &vaio_mux;
3821 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3822 codec->patch_ops = stac9872_patch_ops;
6d859065 3823 break;
db064e50
TI		 3824 }
3825
db064e50
TI		 3826 return 0;
3827}
3828
3829
2f2f4251
M		 3830/*
3831 * patch entries
3832 */
3833struct hda_codec_preset snd_hda_preset_sigmatel[] = {
3834 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
3835 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
3836 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
3837 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
3838 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
3839 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
3840 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 3841 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
3842 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
3843 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
3844 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
3845 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
3846 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 3847 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
3848 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
3849 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
3850 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
3851 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
3852 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
3853 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
3854 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
3855 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
3856 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 3857 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
3858 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
3859 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
3860 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
3861 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
3862 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 3863 /* The following does not take into account .id=0x83847661 when subsys =
3864 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
3865 * currently not fully supported.
3866 */
3867 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
3868 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
3869 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 3870 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
3871 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
3872 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
3873 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
3874 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
3875 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
3876 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
3877 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
541eee87
MR		 3878 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
3879 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 3880 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 3881 { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
3882 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
3883 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
3884 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
3885 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
3886 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
3887 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
3888 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
3889 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 3890 {} /* terminator */
3891};
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