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ALSA: hda - Fix SPDIF mute on IDT/STAC codecs
[mirror_ubuntu-jammy-kernel.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
4e55096e 38#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 39#define STAC_PWR_EVENT 0x20
40#define STAC_HP_EVENT 0x30
72474be6 41#define STAC_VREF_EVENT 0x40
4e55096e 42
f5fcc13c
TI		 43enum {
44 STAC_REF,
bf277785 45 STAC_9200_OQO,
dfe495d0
TI		 46 STAC_9200_DELL_D21,
47 STAC_9200_DELL_D22,
48 STAC_9200_DELL_D23,
49 STAC_9200_DELL_M21,
50 STAC_9200_DELL_M22,
51 STAC_9200_DELL_M23,
52 STAC_9200_DELL_M24,
53 STAC_9200_DELL_M25,
54 STAC_9200_DELL_M26,
55 STAC_9200_DELL_M27,
1194b5b7 56 STAC_9200_GATEWAY,
117f257d 57 STAC_9200_PANASONIC,
f5fcc13c
TI		 58 STAC_9200_MODELS
59};
60
61enum {
62 STAC_9205_REF,
dfe495d0 63 STAC_9205_DELL_M42,
ae0a8ed8
TD		 64 STAC_9205_DELL_M43,
65 STAC_9205_DELL_M44,
f5fcc13c
TI		 66 STAC_9205_MODELS
67};
68
e1f0d669
MR		 69enum {
70 STAC_92HD73XX_REF,
a7662640 71 STAC_DELL_M6,
e1f0d669
MR		 72 STAC_92HD73XX_MODELS
73};
74
d0513fc6
MR		 75enum {
76 STAC_92HD83XXX_REF,
77 STAC_92HD83XXX_MODELS
78};
79
e035b841
MR		 80enum {
81 STAC_92HD71BXX_REF,
a7662640
MR		 82 STAC_DELL_M4_1,
83 STAC_DELL_M4_2,
6a14f585 84 STAC_HP_M4,
e035b841
MR		 85 STAC_92HD71BXX_MODELS
86};
87
8e21c34c
TD		 88enum {
89 STAC_925x_REF,
90 STAC_M2_2,
91 STAC_MA6,
2c11f955 92 STAC_PA6,
8e21c34c
TD		 93 STAC_925x_MODELS
94};
95
f5fcc13c
TI		 96enum {
97 STAC_D945_REF,
98 STAC_D945GTP3,
99 STAC_D945GTP5,
5d5d3bc3
IZ		 100 STAC_INTEL_MAC_V1,
101 STAC_INTEL_MAC_V2,
102 STAC_INTEL_MAC_V3,
103 STAC_INTEL_MAC_V4,
104 STAC_INTEL_MAC_V5,
536319af
NB		 105 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
106 * is given, one of the above models will be
107 * chosen according to the subsystem id. */
dfe495d0 108 /* for backward compatibility */
f5fcc13c 109 STAC_MACMINI,
3fc24d85 110 STAC_MACBOOK,
6f0778d8
NB		 111 STAC_MACBOOK_PRO_V1,
112 STAC_MACBOOK_PRO_V2,
f16928fb 113 STAC_IMAC_INTEL,
0dae0f83 114 STAC_IMAC_INTEL_20,
8c650087 115 STAC_ECS_202,
dfe495d0
TI		 116 STAC_922X_DELL_D81,
117 STAC_922X_DELL_D82,
118 STAC_922X_DELL_M81,
119 STAC_922X_DELL_M82,
f5fcc13c
TI		 120 STAC_922X_MODELS
121};
122
123enum {
124 STAC_D965_REF,
125 STAC_D965_3ST,
126 STAC_D965_5ST,
4ff076e5 127 STAC_DELL_3ST,
8e9068b1 128 STAC_DELL_BIOS,
f5fcc13c
TI		 129 STAC_927X_MODELS
130};
403d1944 131
2f2f4251 132struct sigmatel_spec {
c8b6bf9b 133 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 134 unsigned int num_mixers;
135
403d1944 136 int board_config;
c7d4b2fa 137 unsigned int surr_switch: 1;
403d1944
MP		 138 unsigned int line_switch: 1;
139 unsigned int mic_switch: 1;
3cc08dc6 140 unsigned int alt_switch: 1;
82bc955f 141 unsigned int hp_detect: 1;
00ef50c2 142 unsigned int spdif_mute: 1;
c7d4b2fa 143
4fe5195c 144 /* gpio lines */
0fc9dec4 145 unsigned int eapd_mask;
4fe5195c
MR		 146 unsigned int gpio_mask;
147 unsigned int gpio_dir;
148 unsigned int gpio_data;
149 unsigned int gpio_mute;
150
8daaaa97
MR		 151 /* stream */
152 unsigned int stream_delay;
153
4fe5195c 154 /* analog loopback */
e1f0d669
MR		 155 unsigned char aloopback_mask;
156 unsigned char aloopback_shift;
8259980e 157
a64135a2
MR		 158 /* power management */
159 unsigned int num_pwrs;
d0513fc6 160 unsigned int *pwr_mapping;
a64135a2 161 hda_nid_t *pwr_nids;
b76c850f 162 hda_nid_t *dac_list;
a64135a2 163
2f2f4251 164 /* playback */
b22b4821 165 struct hda_input_mux *mono_mux;
89385035 166 struct hda_input_mux *amp_mux;
b22b4821 167 unsigned int cur_mmux;
2f2f4251 168 struct hda_multi_out multiout;
3cc08dc6 169 hda_nid_t dac_nids[5];
2f2f4251
M		 170
171 /* capture */
172 hda_nid_t *adc_nids;
2f2f4251 173 unsigned int num_adcs;
dabbed6f
M		 174 hda_nid_t *mux_nids;
175 unsigned int num_muxes;
8b65727b
MP		 176 hda_nid_t *dmic_nids;
177 unsigned int num_dmics;
e1f0d669 178 hda_nid_t *dmux_nids;
1697055e 179 unsigned int num_dmuxes;
d9737751
MR		 180 hda_nid_t *smux_nids;
181 unsigned int num_smuxes;
65973632 182 const char **spdif_labels;
d9737751 183
dabbed6f 184 hda_nid_t dig_in_nid;
b22b4821 185 hda_nid_t mono_nid;
1cd2224c
MR		 186 hda_nid_t anabeep_nid;
187 hda_nid_t digbeep_nid;
2f2f4251 188
2f2f4251
M		 189 /* pin widgets */
190 hda_nid_t *pin_nids;
191 unsigned int num_pins;
2f2f4251 192 unsigned int *pin_configs;
11b44bbd 193 unsigned int *bios_pin_configs;
2f2f4251
M		 194
195 /* codec specific stuff */
196 struct hda_verb *init;
c8b6bf9b 197 struct snd_kcontrol_new *mixer;
2f2f4251
M		 198
199 /* capture source */
8b65727b 200 struct hda_input_mux *dinput_mux;
e1f0d669 201 unsigned int cur_dmux[2];
c7d4b2fa 202 struct hda_input_mux *input_mux;
3cc08dc6 203 unsigned int cur_mux[3];
d9737751
MR		 204 struct hda_input_mux *sinput_mux;
205 unsigned int cur_smux[2];
2a9c7816
MR		 206 unsigned int cur_amux;
207 hda_nid_t *amp_nids;
208 unsigned int num_amps;
8daaaa97 209 unsigned int powerdown_adcs;
2f2f4251 210
403d1944
MP		 211 /* i/o switches */
212 unsigned int io_switch[2];
0fb87bb4 213 unsigned int clfe_swap;
7c2ba97b 214 unsigned int hp_switch;
5f10c4a9 215 unsigned int aloopback;
2f2f4251 216
c7d4b2fa
M		 217 struct hda_pcm pcm_rec[2]; /* PCM information */
218
219 /* dynamic controls and input_mux */
220 struct auto_pin_cfg autocfg;
221 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 222 struct snd_kcontrol_new *kctl_alloc;
8b65727b 223 struct hda_input_mux private_dimux;
c7d4b2fa 224 struct hda_input_mux private_imux;
d9737751 225 struct hda_input_mux private_smux;
89385035 226 struct hda_input_mux private_amp_mux;
b22b4821 227 struct hda_input_mux private_mono_mux;
2f2f4251
M		 228};
229
230static hda_nid_t stac9200_adc_nids[1] = {
231 0x03,
232};
233
234static hda_nid_t stac9200_mux_nids[1] = {
235 0x0c,
236};
237
238static hda_nid_t stac9200_dac_nids[1] = {
239 0x02,
240};
241
a64135a2
MR		 242static hda_nid_t stac92hd73xx_pwr_nids[8] = {
243 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
244 0x0f, 0x10, 0x11
245};
246
0ffa9807
MR		 247static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
248 0x26, 0,
249};
250
e1f0d669
MR		 251static hda_nid_t stac92hd73xx_adc_nids[2] = {
252 0x1a, 0x1b
253};
254
2a9c7816
MR		 255#define DELL_M6_AMP 2
256static hda_nid_t stac92hd73xx_amp_nids[3] = {
257 0x0b, 0x0c, 0x0e
89385035
MR		 258};
259
e1f0d669
MR		 260#define STAC92HD73XX_NUM_DMICS 2
261static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
262 0x13, 0x14, 0
263};
264
265#define STAC92HD73_DAC_COUNT 5
266static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
267 0x15, 0x16, 0x17, 0x18, 0x19,
268};
269
270static hda_nid_t stac92hd73xx_mux_nids[4] = {
271 0x28, 0x29, 0x2a, 0x2b,
272};
273
274static hda_nid_t stac92hd73xx_dmux_nids[2] = {
275 0x20, 0x21,
276};
277
d9737751
MR		 278static hda_nid_t stac92hd73xx_smux_nids[2] = {
279 0x22, 0x23,
280};
281
d0513fc6
MR		 282#define STAC92HD83XXX_NUM_DMICS 2
283static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
284 0x11, 0x12, 0
285};
286
287#define STAC92HD81_DAC_COUNT 2
288#define STAC92HD83_DAC_COUNT 3
289static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
290 0x13, 0x14, 0x22,
291};
292
293static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
294 0x17, 0x18,
295};
296
297static hda_nid_t stac92hd83xxx_adc_nids[2] = {
298 0x15, 0x16,
299};
300
301static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
302 0xa, 0xb, 0xd, 0xe,
303};
304
0ffa9807
MR		 305static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
306 0x1e, 0,
307};
308
d0513fc6
MR		 309static unsigned int stac92hd83xxx_pwr_mapping[4] = {
310 0x03, 0x0c, 0x10, 0x40,
311};
312
a64135a2
MR		 313static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
314 0x0a, 0x0d, 0x0f
315};
316
e035b841
MR		 317static hda_nid_t stac92hd71bxx_adc_nids[2] = {
318 0x12, 0x13,
319};
320
321static hda_nid_t stac92hd71bxx_mux_nids[2] = {
322 0x1a, 0x1b
323};
324
4b33c767
MR		 325static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
326 0x1c, 0x1d,
e1f0d669
MR		 327};
328
d9737751
MR		 329static hda_nid_t stac92hd71bxx_smux_nids[2] = {
330 0x24, 0x25,
331};
332
aea7bb0a 333static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 334 0x10, /*0x11, */
335};
336
337#define STAC92HD71BXX_NUM_DMICS 2
338static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
339 0x18, 0x19, 0
340};
341
0ffa9807
MR		 342static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
343 0x22, 0
344};
345
8e21c34c
TD		 346static hda_nid_t stac925x_adc_nids[1] = {
347 0x03,
348};
349
350static hda_nid_t stac925x_mux_nids[1] = {
351 0x0f,
352};
353
354static hda_nid_t stac925x_dac_nids[1] = {
355 0x02,
356};
357
f6e9852a
TI		 358#define STAC925X_NUM_DMICS 1
359static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
360 0x15, 0
2c11f955
TD		 361};
362
1697055e
TI		 363static hda_nid_t stac925x_dmux_nids[1] = {
364 0x14,
365};
366
2f2f4251
M		 367static hda_nid_t stac922x_adc_nids[2] = {
368 0x06, 0x07,
369};
370
371static hda_nid_t stac922x_mux_nids[2] = {
372 0x12, 0x13,
373};
374
3cc08dc6
MP		 375static hda_nid_t stac927x_adc_nids[3] = {
376 0x07, 0x08, 0x09
377};
378
379static hda_nid_t stac927x_mux_nids[3] = {
380 0x15, 0x16, 0x17
381};
382
d9737751
MR		 383static hda_nid_t stac927x_smux_nids[1] = {
384 0x21,
385};
386
b76c850f
MR		 387static hda_nid_t stac927x_dac_nids[6] = {
388 0x02, 0x03, 0x04, 0x05, 0x06, 0
389};
390
e1f0d669
MR		 391static hda_nid_t stac927x_dmux_nids[1] = {
392 0x1b,
393};
394
7f16859a
MR		 395#define STAC927X_NUM_DMICS 2
396static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
397 0x13, 0x14, 0
398};
399
65973632
MR		 400static const char *stac927x_spdif_labels[5] = {
401 "Digital Playback", "ADAT", "Analog Mux 1",
402 "Analog Mux 2", "Analog Mux 3"
403};
404
f3302a59
MP		 405static hda_nid_t stac9205_adc_nids[2] = {
406 0x12, 0x13
407};
408
409static hda_nid_t stac9205_mux_nids[2] = {
410 0x19, 0x1a
411};
412
e1f0d669 413static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 414 0x1d,
e1f0d669
MR		 415};
416
d9737751
MR		 417static hda_nid_t stac9205_smux_nids[1] = {
418 0x21,
419};
420
f6e9852a
TI		 421#define STAC9205_NUM_DMICS 2
422static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
423 0x17, 0x18, 0
8b65727b
MP		 424};
425
c7d4b2fa 426static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 427 0x08, 0x09, 0x0d, 0x0e,
428 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 429};
430
8e21c34c
TD		 431static hda_nid_t stac925x_pin_nids[8] = {
432 0x07, 0x08, 0x0a, 0x0b,
433 0x0c, 0x0d, 0x10, 0x11,
434};
435
2f2f4251
M		 436static hda_nid_t stac922x_pin_nids[10] = {
437 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
438 0x0f, 0x10, 0x11, 0x15, 0x1b,
439};
440
a7662640 441static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 442 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
443 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 444 0x14, 0x22, 0x23
e1f0d669
MR		 445};
446
d0513fc6
MR		 447static hda_nid_t stac92hd83xxx_pin_nids[14] = {
448 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
449 0x0f, 0x10, 0x11, 0x12, 0x13,
450 0x1d, 0x1e, 0x1f, 0x20
451};
0ffa9807 452static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 453 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
454 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 455 0x1f,
e035b841
MR		 456};
457
3cc08dc6
MP		 458static hda_nid_t stac927x_pin_nids[14] = {
459 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
460 0x0f, 0x10, 0x11, 0x12, 0x13,
461 0x14, 0x21, 0x22, 0x23,
462};
463
f3302a59
MP		 464static hda_nid_t stac9205_pin_nids[12] = {
465 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
466 0x0f, 0x14, 0x16, 0x17, 0x18,
467 0x21, 0x22,
f3302a59
MP		 468};
469
89385035
MR		 470#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
471
472static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
473 struct snd_ctl_elem_value *ucontrol)
474{
475 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
476 struct sigmatel_spec *spec = codec->spec;
477 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
478
479 kcontrol->private_value ^= get_amp_nid(kcontrol);
480 kcontrol->private_value |= nid;
481
482 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
483}
484
485static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
486 struct snd_ctl_elem_value *ucontrol)
487{
488 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
489 struct sigmatel_spec *spec = codec->spec;
490 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
491
492 kcontrol->private_value ^= get_amp_nid(kcontrol);
493 kcontrol->private_value |= nid;
494
495 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
496}
497
8b65727b
MP		 498static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
499 struct snd_ctl_elem_info *uinfo)
500{
501 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
502 struct sigmatel_spec *spec = codec->spec;
503 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
504}
505
506static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
507 struct snd_ctl_elem_value *ucontrol)
508{
509 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
510 struct sigmatel_spec *spec = codec->spec;
e1f0d669 511 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 512
e1f0d669 513 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 514 return 0;
515}
516
517static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
518 struct snd_ctl_elem_value *ucontrol)
519{
520 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
521 struct sigmatel_spec *spec = codec->spec;
e1f0d669 522 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 523
524 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 525 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 526}
527
d9737751
MR		 528static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
529 struct snd_ctl_elem_info *uinfo)
530{
531 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
532 struct sigmatel_spec *spec = codec->spec;
533 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
534}
535
536static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
537 struct snd_ctl_elem_value *ucontrol)
538{
539 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
540 struct sigmatel_spec *spec = codec->spec;
541 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
542
543 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
544 return 0;
545}
546
547static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
548 struct snd_ctl_elem_value *ucontrol)
549{
550 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
551 struct sigmatel_spec *spec = codec->spec;
00ef50c2 552 struct hda_input_mux *smux = &spec->private_smux;
d9737751 553 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 554 int err, val;
555 hda_nid_t nid;
d9737751 556
00ef50c2 557 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 558 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 559 if (err < 0)
560 return err;
561
562 if (spec->spdif_mute) {
563 if (smux_idx == 0)
564 nid = spec->multiout.dig_out_nid;
565 else
566 nid = codec->slave_dig_outs[smux_idx - 1];
567 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
568 val = AMP_OUT_MUTE;
00ef50c2 569 else
c1e99bd9 570 val = AMP_OUT_UNMUTE;
00ef50c2
MR		 571 /* un/mute SPDIF out */
572 snd_hda_codec_write_cache(codec, nid, 0,
573 AC_VERB_SET_AMP_GAIN_MUTE, val);
574 }
575 return 0;
d9737751
MR		 576}
577
c8b6bf9b 578static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 579{
580 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
581 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 582 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 583}
584
c8b6bf9b 585static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 586{
587 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
588 struct sigmatel_spec *spec = codec->spec;
589 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
590
591 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
592 return 0;
593}
594
c8b6bf9b 595static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 596{
597 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
598 struct sigmatel_spec *spec = codec->spec;
599 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
600
c7d4b2fa 601 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 602 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
603}
604
b22b4821
MR		 605static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
606 struct snd_ctl_elem_info *uinfo)
607{
608 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
609 struct sigmatel_spec *spec = codec->spec;
610 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
611}
612
613static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
614 struct snd_ctl_elem_value *ucontrol)
615{
616 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
617 struct sigmatel_spec *spec = codec->spec;
618
619 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
620 return 0;
621}
622
623static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
624 struct snd_ctl_elem_value *ucontrol)
625{
626 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
627 struct sigmatel_spec *spec = codec->spec;
628
629 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
630 spec->mono_nid, &spec->cur_mmux);
631}
632
89385035
MR		 633static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
634 struct snd_ctl_elem_info *uinfo)
635{
636 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
637 struct sigmatel_spec *spec = codec->spec;
638 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
639}
640
641static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
642 struct snd_ctl_elem_value *ucontrol)
643{
644 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
645 struct sigmatel_spec *spec = codec->spec;
646
647 ucontrol->value.enumerated.item[0] = spec->cur_amux;
648 return 0;
649}
650
651static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
652 struct snd_ctl_elem_value *ucontrol)
653{
654 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
655 struct sigmatel_spec *spec = codec->spec;
656 struct snd_kcontrol *ctl =
657 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
658 if (!ctl)
659 return -EINVAL;
660
661 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
662 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
663
664 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
665 0, &spec->cur_amux);
666}
667
5f10c4a9
ML		 668#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
669
670static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
671 struct snd_ctl_elem_value *ucontrol)
672{
673 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 674 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 675 struct sigmatel_spec *spec = codec->spec;
676
e1f0d669
MR		 677 ucontrol->value.integer.value[0] = !!(spec->aloopback &
678 (spec->aloopback_mask << idx));
5f10c4a9
ML		 679 return 0;
680}
681
682static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
683 struct snd_ctl_elem_value *ucontrol)
684{
685 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
686 struct sigmatel_spec *spec = codec->spec;
e1f0d669 687 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 688 unsigned int dac_mode;
e1f0d669 689 unsigned int val, idx_val;
5f10c4a9 690
e1f0d669
MR		 691 idx_val = spec->aloopback_mask << idx;
692 if (ucontrol->value.integer.value[0])
693 val = spec->aloopback | idx_val;
694 else
695 val = spec->aloopback & ~idx_val;
68ea7b2f 696 if (spec->aloopback == val)
5f10c4a9
ML		 697 return 0;
698
68ea7b2f 699 spec->aloopback = val;
5f10c4a9 700
e1f0d669
MR		 701 /* Only return the bits defined by the shift value of the
702 * first two bytes of the mask
703 */
5f10c4a9 704 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 705 kcontrol->private_value & 0xFFFF, 0x0);
706 dac_mode >>= spec->aloopback_shift;
5f10c4a9 707
e1f0d669 708 if (spec->aloopback & idx_val) {
5f10c4a9 709 snd_hda_power_up(codec);
e1f0d669 710 dac_mode |= idx_val;
5f10c4a9
ML		 711 } else {
712 snd_hda_power_down(codec);
e1f0d669 713 dac_mode &= ~idx_val;
5f10c4a9
ML		 714 }
715
716 snd_hda_codec_write_cache(codec, codec->afg, 0,
717 kcontrol->private_value >> 16, dac_mode);
718
719 return 1;
720}
721
c7d4b2fa 722static struct hda_verb stac9200_core_init[] = {
2f2f4251 723 /* set dac0mux for dac converter */
c7d4b2fa 724 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 725 {}
726};
727
1194b5b7
TI		 728static struct hda_verb stac9200_eapd_init[] = {
729 /* set dac0mux for dac converter */
730 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
731 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
732 {}
733};
734
e1f0d669
MR		 735static struct hda_verb stac92hd73xx_6ch_core_init[] = {
736 /* set master volume and direct control */
737 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
738 /* setup audio connections */
739 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
740 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
741 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
742 /* setup adcs to point to mixer */
743 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
744 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 745 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
746 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
747 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
748 /* setup import muxs */
749 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
750 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
751 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
752 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
753 {}
754};
755
d654a660
MR		 756static struct hda_verb dell_eq_core_init[] = {
757 /* set master volume to max value without distortion
758 * and direct control */
759 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
760 /* setup audio connections */
761 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 762 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
763 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 764 /* setup adcs to point to mixer */
765 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
766 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
767 /* setup import muxs */
768 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
769 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
770 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
771 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
772 {}
773};
774
52fe0f9d 775static struct hda_verb dell_m6_core_init[] = {
20f5f95d
MR		 776 /* set master volume to max value without distortion
777 * and direct control */
778 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
52fe0f9d 779 /* setup audio connections */
7747ecce
MR		 780 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
781 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 782 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
783 /* setup adcs to point to mixer */
784 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
785 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
786 /* setup import muxs */
787 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
788 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
789 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
790 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
791 {}
792};
793
e1f0d669
MR		 794static struct hda_verb stac92hd73xx_8ch_core_init[] = {
795 /* set master volume and direct control */
796 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
797 /* setup audio connections */
798 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
799 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
800 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
801 /* connect hp ports to dac3 */
802 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
803 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
804 /* setup adcs to point to mixer */
805 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
806 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 807 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
808 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
809 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
810 /* setup import muxs */
811 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
812 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
813 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
814 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
815 {}
816};
817
818static struct hda_verb stac92hd73xx_10ch_core_init[] = {
819 /* set master volume and direct control */
820 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
821 /* setup audio connections */
822 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
823 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
824 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
825 /* dac3 is connected to import3 mux */
826 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
827 /* connect hp ports to dac4 */
828 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
829 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
830 /* setup adcs to point to mixer */
831 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
832 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 833 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
834 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
835 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
836 /* setup import muxs */
837 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
838 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
839 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
840 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
841 {}
842};
843
d0513fc6
MR		 844static struct hda_verb stac92hd83xxx_core_init[] = {
845 /* start of config #1 */
846 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
847
848 /* start of config #2 */
849 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
850 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
851 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
852
853 /* power state controls amps */
854 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
855};
856
e035b841 857static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 858 /* set master volume and direct control */
859 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
860 /* connect headphone jack to dac1 */
861 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
541eee87
MR		 862 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
863 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
864 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
865 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 866};
867
4b33c767 868#define HD_DISABLE_PORTF 2
541eee87 869static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 870 /* start of config #1 */
871
872 /* connect port 0f to audio mixer */
873 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 874 /* unmute right and left channels for node 0x0f */
875 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
876 /* start of config #2 */
877
e035b841
MR		 878 /* set master volume and direct control */
879 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
880 /* connect headphone jack to dac1 */
881 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 882 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 883 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
884 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 885 {}
886};
887
8e21c34c
TD		 888static struct hda_verb stac925x_core_init[] = {
889 /* set dac0mux for dac converter */
890 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
891 {}
892};
893
c7d4b2fa 894static struct hda_verb stac922x_core_init[] = {
2f2f4251 895 /* set master volume and direct control */
c7d4b2fa 896 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 897 {}
898};
899
93ed1503 900static struct hda_verb d965_core_init[] = {
19039bd0 901 /* set master volume and direct control */
93ed1503 902 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 903 /* unmute node 0x1b */
904 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
905 /* select node 0x03 as DAC */
906 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
907 {}
908};
909
3cc08dc6
MP		 910static struct hda_verb stac927x_core_init[] = {
911 /* set master volume and direct control */
912 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 913 /* enable analog pc beep path */
914 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 915 {}
916};
917
f3302a59
MP		 918static struct hda_verb stac9205_core_init[] = {
919 /* set master volume and direct control */
920 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 921 /* enable analog pc beep path */
922 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 923 {}
924};
925
b22b4821
MR		 926#define STAC_MONO_MUX \
927 { \
928 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
929 .name = "Mono Mux", \
930 .count = 1, \
931 .info = stac92xx_mono_mux_enum_info, \
932 .get = stac92xx_mono_mux_enum_get, \
933 .put = stac92xx_mono_mux_enum_put, \
934 }
935
89385035
MR		 936#define STAC_AMP_MUX \
937 { \
938 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
939 .name = "Amp Selector Capture Switch", \
940 .count = 1, \
941 .info = stac92xx_amp_mux_enum_info, \
942 .get = stac92xx_amp_mux_enum_get, \
943 .put = stac92xx_amp_mux_enum_put, \
944 }
945
946#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
947 { \
948 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
949 .name = xname, \
950 .index = 0, \
951 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
952 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
953 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
954 .info = stac92xx_amp_volume_info, \
955 .get = stac92xx_amp_volume_get, \
956 .put = stac92xx_amp_volume_put, \
957 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
958 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
959 }
960
9e05b7a3 961#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 962 { \
963 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
964 .name = "Input Source", \
9e05b7a3 965 .count = cnt, \
ca7c5a8b
ML		 966 .info = stac92xx_mux_enum_info, \
967 .get = stac92xx_mux_enum_get, \
968 .put = stac92xx_mux_enum_put, \
969 }
970
e1f0d669 971#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 972 { \
973 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
974 .name = "Analog Loopback", \
e1f0d669 975 .count = cnt, \
5f10c4a9
ML		 976 .info = stac92xx_aloopback_info, \
977 .get = stac92xx_aloopback_get, \
978 .put = stac92xx_aloopback_put, \
979 .private_value = verb_read | (verb_write << 16), \
980 }
981
c8b6bf9b 982static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 983 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
984 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 985 STAC_INPUT_SOURCE(1),
2f2f4251
M		 986 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
987 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 988 { } /* end */
989};
990
2a9c7816 991#define DELL_M6_MIXER 6
e1f0d669 992static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 993 /* start of config #1 */
e1f0d669
MR		 994 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
995 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
996
e1f0d669
MR		 997 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
998 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
999
2a9c7816
MR		 1000 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1001 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1002
1003 /* start of config #2 */
1004 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1005 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1006
e1f0d669
MR		 1007 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1008 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1009
2a9c7816
MR		 1010 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1011
1012 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1013 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1014
1015 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1016 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1017
e1f0d669
MR		 1018 { } /* end */
1019};
1020
1021static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1022 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1023
e1f0d669
MR		 1024 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1025 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1026
1027 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1028 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1029
1030 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1031 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1032
1033 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1034 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1035
1036 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1037 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1038
1039 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1040 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1041
1042 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1043 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1044 { } /* end */
1045};
1046
1047static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1048 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1049
e1f0d669
MR		 1050 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1051 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1052
1053 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1054 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1055
1056 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1057 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1058
1059 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1060 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1061
1062 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1063 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1064
1065 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1066 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1067
1068 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1069 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1070 { } /* end */
1071};
1072
d0513fc6
MR		 1073
1074static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1075 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1076 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1077
1078 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1079 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1080
1081 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1082 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1083
1084 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1085 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1086
1087 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1088 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1089
1090 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1091 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1092
1093 /*
1094 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1095 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1096 */
1097 { } /* end */
1098};
1099
541eee87 1100static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1101 STAC_INPUT_SOURCE(2),
4b33c767 1102 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1103
9b35947f
MR		 1104 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1105 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1106
1107 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1108 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1109 /* analog pc-beep replaced with digital beep support */
1110 /*
f7c5dda2
MR		 1111 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1112 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1113 */
f7c5dda2 1114
687cb98e
MR		 1115 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1116 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1117
687cb98e
MR		 1118 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1119 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1120
1121 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1122 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1123
1124 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1125 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1126 { } /* end */
1127};
1128
541eee87 1129static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1130 STAC_INPUT_SOURCE(2),
1131 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1132
541eee87
MR		 1133 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1134 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1135
1136 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1137 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1138 { } /* end */
1139};
1140
8e21c34c 1141static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1142 STAC_INPUT_SOURCE(1),
8e21c34c 1143 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1144 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1145 { } /* end */
1146};
1147
9e05b7a3 1148static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1149 STAC_INPUT_SOURCE(2),
e1f0d669 1150 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1151
1152 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1153 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1154
1155 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1156 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1157 { } /* end */
1158};
1159
19039bd0 1160/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1161static struct snd_kcontrol_new stac922x_mixer[] = {
1162 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1163 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1164 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1165
1166 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1167 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1168 { } /* end */
1169};
1170
9e05b7a3 1171
d1d985f0 1172static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1173 STAC_INPUT_SOURCE(3),
e1f0d669 1174 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1175
9e05b7a3
ML		 1176 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1177 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1178
1179 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1180 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1181
1182 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1183 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1184 { } /* end */
1185};
1186
1697055e
TI		 1187static struct snd_kcontrol_new stac_dmux_mixer = {
1188 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1189 .name = "Digital Input Source",
1190 /* count set later */
1191 .info = stac92xx_dmux_enum_info,
1192 .get = stac92xx_dmux_enum_get,
1193 .put = stac92xx_dmux_enum_put,
1194};
1195
d9737751
MR		 1196static struct snd_kcontrol_new stac_smux_mixer = {
1197 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1198 .name = "IEC958 Playback Source",
d9737751
MR		 1199 /* count set later */
1200 .info = stac92xx_smux_enum_info,
1201 .get = stac92xx_smux_enum_get,
1202 .put = stac92xx_smux_enum_put,
1203};
1204
2134ea4f
TI		 1205static const char *slave_vols[] = {
1206 "Front Playback Volume",
1207 "Surround Playback Volume",
1208 "Center Playback Volume",
1209 "LFE Playback Volume",
1210 "Side Playback Volume",
1211 "Headphone Playback Volume",
1212 "Headphone Playback Volume",
1213 "Speaker Playback Volume",
1214 "External Speaker Playback Volume",
1215 "Speaker2 Playback Volume",
1216 NULL
1217};
1218
1219static const char *slave_sws[] = {
1220 "Front Playback Switch",
1221 "Surround Playback Switch",
1222 "Center Playback Switch",
1223 "LFE Playback Switch",
1224 "Side Playback Switch",
1225 "Headphone Playback Switch",
1226 "Headphone Playback Switch",
1227 "Speaker Playback Switch",
1228 "External Speaker Playback Switch",
1229 "Speaker2 Playback Switch",
edb54a55 1230 "IEC958 Playback Switch",
2134ea4f
TI		 1231 NULL
1232};
1233
2f2f4251
M		 1234static int stac92xx_build_controls(struct hda_codec *codec)
1235{
1236 struct sigmatel_spec *spec = codec->spec;
1237 int err;
c7d4b2fa 1238 int i;
2f2f4251
M		 1239
1240 err = snd_hda_add_new_ctls(codec, spec->mixer);
1241 if (err < 0)
1242 return err;
c7d4b2fa
M		 1243
1244 for (i = 0; i < spec->num_mixers; i++) {
1245 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1246 if (err < 0)
1247 return err;
1248 }
1697055e
TI		 1249 if (spec->num_dmuxes > 0) {
1250 stac_dmux_mixer.count = spec->num_dmuxes;
1251 err = snd_ctl_add(codec->bus->card,
1252 snd_ctl_new1(&stac_dmux_mixer, codec));
1253 if (err < 0)
1254 return err;
1255 }
d9737751 1256 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1257 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1258 struct hda_input_mux *smux = &spec->private_smux;
1259 /* check for mute support on SPDIF out */
1260 if (wcaps & AC_WCAP_OUT_AMP) {
1261 smux->items[smux->num_items].label = "Off";
1262 smux->items[smux->num_items].index = 0;
1263 smux->num_items++;
1264 spec->spdif_mute = 1;
1265 }
d9737751
MR		 1266 stac_smux_mixer.count = spec->num_smuxes;
1267 err = snd_ctl_add(codec->bus->card,
1268 snd_ctl_new1(&stac_smux_mixer, codec));
1269 if (err < 0)
1270 return err;
1271 }
c7d4b2fa 1272
dabbed6f
M		 1273 if (spec->multiout.dig_out_nid) {
1274 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1275 if (err < 0)
1276 return err;
9a08160b
TI		 1277 err = snd_hda_create_spdif_share_sw(codec,
1278 &spec->multiout);
1279 if (err < 0)
1280 return err;
1281 spec->multiout.share_spdif = 1;
dabbed6f 1282 }
da74ae3e 1283 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1284 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1285 if (err < 0)
1286 return err;
1287 }
2134ea4f
TI		 1288
1289 /* if we have no master control, let's create it */
1290 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1291 unsigned int vmaster_tlv[4];
2134ea4f 1292 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1293 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1294 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1295 vmaster_tlv, slave_vols);
2134ea4f
TI		 1296 if (err < 0)
1297 return err;
1298 }
1299 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1300 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1301 NULL, slave_sws);
1302 if (err < 0)
1303 return err;
1304 }
1305
dabbed6f 1306 return 0;
2f2f4251
M		 1307}
1308
403d1944 1309static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1310 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1311 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1312};
1313
dfe495d0
TI		 1314/*
1315 STAC 9200 pin configs for
1316 102801A8
1317 102801DE
1318 102801E8
1319*/
1320static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1321 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1322 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1323};
1324
1325/*
1326 STAC 9200 pin configs for
1327 102801C0
1328 102801C1
1329*/
1330static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1331 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1332 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1333};
1334
1335/*
1336 STAC 9200 pin configs for
1337 102801C4 (Dell Dimension E310)
1338 102801C5
1339 102801C7
1340 102801D9
1341 102801DA
1342 102801E3
1343*/
1344static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1345 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1346 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1347};
1348
1349
1350/*
1351 STAC 9200-32 pin configs for
1352 102801B5 (Dell Inspiron 630m)
1353 102801D8 (Dell Inspiron 640m)
1354*/
1355static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1356 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1357 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1358};
1359
1360/*
1361 STAC 9200-32 pin configs for
1362 102801C2 (Dell Latitude D620)
1363 102801C8
1364 102801CC (Dell Latitude D820)
1365 102801D4
1366 102801D6
1367*/
1368static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1369 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1370 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1371};
1372
1373/*
1374 STAC 9200-32 pin configs for
1375 102801CE (Dell XPS M1710)
1376 102801CF (Dell Precision M90)
1377*/
1378static unsigned int dell9200_m23_pin_configs[8] = {
1379 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1380 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1381};
1382
1383/*
1384 STAC 9200-32 pin configs for
1385 102801C9
1386 102801CA
1387 102801CB (Dell Latitude 120L)
1388 102801D3
1389*/
1390static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1391 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1392 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1393};
1394
1395/*
1396 STAC 9200-32 pin configs for
1397 102801BD (Dell Inspiron E1505n)
1398 102801EE
1399 102801EF
1400*/
1401static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1402 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1403 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1404};
1405
1406/*
1407 STAC 9200-32 pin configs for
1408 102801F5 (Dell Inspiron 1501)
1409 102801F6
1410*/
1411static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1412 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1413 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1414};
1415
1416/*
1417 STAC 9200-32
1418 102801CD (Dell Inspiron E1705/9400)
1419*/
1420static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1421 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1422 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1423};
1424
bf277785
TD		 1425static unsigned int oqo9200_pin_configs[8] = {
1426 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1427 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1428};
1429
dfe495d0 1430
f5fcc13c
TI		 1431static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1432 [STAC_REF] = ref9200_pin_configs,
bf277785 1433 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1434 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1435 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1436 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1437 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1438 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1439 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1440 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1441 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1442 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1443 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1444 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1445};
1446
f5fcc13c
TI		 1447static const char *stac9200_models[STAC_9200_MODELS] = {
1448 [STAC_REF] = "ref",
bf277785 1449 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1450 [STAC_9200_DELL_D21] = "dell-d21",
1451 [STAC_9200_DELL_D22] = "dell-d22",
1452 [STAC_9200_DELL_D23] = "dell-d23",
1453 [STAC_9200_DELL_M21] = "dell-m21",
1454 [STAC_9200_DELL_M22] = "dell-m22",
1455 [STAC_9200_DELL_M23] = "dell-m23",
1456 [STAC_9200_DELL_M24] = "dell-m24",
1457 [STAC_9200_DELL_M25] = "dell-m25",
1458 [STAC_9200_DELL_M26] = "dell-m26",
1459 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1460 [STAC_9200_GATEWAY] = "gateway",
117f257d 1461 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1462};
1463
1464static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1465 /* SigmaTel reference board */
1466 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1467 "DFI LanParty", STAC_REF),
e7377071 1468 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1469 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1470 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1471 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1472 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1473 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1474 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1475 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1476 "unknown Dell", STAC_9200_DELL_D22),
1477 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1478 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1479 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1480 "Dell Latitude D620", STAC_9200_DELL_M22),
1481 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1482 "unknown Dell", STAC_9200_DELL_D23),
1483 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1484 "unknown Dell", STAC_9200_DELL_D23),
1485 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1486 "unknown Dell", STAC_9200_DELL_M22),
1487 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1488 "unknown Dell", STAC_9200_DELL_M24),
1489 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1490 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1491 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1492 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1493 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1494 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1495 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1496 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1497 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1498 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1499 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1500 "Dell Precision M90", STAC_9200_DELL_M23),
1501 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1502 "unknown Dell", STAC_9200_DELL_M22),
1503 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1504 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1505 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1506 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1507 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1508 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1509 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1510 "unknown Dell", STAC_9200_DELL_D23),
1511 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1512 "unknown Dell", STAC_9200_DELL_D23),
1513 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1514 "unknown Dell", STAC_9200_DELL_D21),
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1516 "unknown Dell", STAC_9200_DELL_D23),
1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1518 "unknown Dell", STAC_9200_DELL_D21),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1520 "unknown Dell", STAC_9200_DELL_M25),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1522 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1524 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1526 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1527 /* Panasonic */
117f257d 1528 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1529 /* Gateway machines needs EAPD to be set on resume */
1530 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1531 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1532 STAC_9200_GATEWAY),
1533 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1534 STAC_9200_GATEWAY),
bf277785
TD		 1535 /* OQO Mobile */
1536 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1537 {} /* terminator */
1538};
1539
8e21c34c
TD		 1540static unsigned int ref925x_pin_configs[8] = {
1541 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1542 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1543};
1544
1545static unsigned int stac925x_MA6_pin_configs[8] = {
1546 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1547 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1548};
1549
2c11f955
TD		 1550static unsigned int stac925x_PA6_pin_configs[8] = {
1551 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1552 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1553};
1554
8e21c34c 1555static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1556 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1557 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1558};
1559
1560static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1561 [STAC_REF] = ref925x_pin_configs,
1562 [STAC_M2_2] = stac925xM2_2_pin_configs,
1563 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1564 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1565};
1566
1567static const char *stac925x_models[STAC_925x_MODELS] = {
1568 [STAC_REF] = "ref",
1569 [STAC_M2_2] = "m2-2",
1570 [STAC_MA6] = "m6",
2c11f955 1571 [STAC_PA6] = "pa6",
8e21c34c
TD		 1572};
1573
1574static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1575 /* SigmaTel reference board */
1576 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1577 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1578 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1579 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1580 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1581 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1582 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1583 {} /* terminator */
1584};
1585
a7662640 1586static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1587 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1588 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1589 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1590 0x01452050,
1591};
1592
1593static unsigned int dell_m6_pin_configs[13] = {
1594 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1595 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1596 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1597 0x4f0000f0,
e1f0d669
MR		 1598};
1599
1600static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1601 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1602 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1603};
1604
1605static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1606 [STAC_92HD73XX_REF] = "ref",
a7662640 1607 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1608};
1609
1610static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1611 /* SigmaTel reference board */
1612 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1613 "DFI LanParty", STAC_92HD73XX_REF),
1614 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1615 "unknown Dell", STAC_DELL_M6),
1616 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1617 "unknown Dell", STAC_DELL_M6),
1618 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1619 "unknown Dell", STAC_DELL_M6),
1620 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1621 "unknown Dell", STAC_DELL_M6),
1622 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1623 "unknown Dell", STAC_DELL_M6),
1624 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1625 "unknown Dell", STAC_DELL_M6),
1626 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1627 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1628 {} /* terminator */
1629};
1630
d0513fc6
MR		 1631static unsigned int ref92hd83xxx_pin_configs[14] = {
1632 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1633 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1634 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1635 0x01451160, 0x98560170,
1636};
1637
1638static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1639 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1640};
1641
1642static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1643 [STAC_92HD83XXX_REF] = "ref",
1644};
1645
1646static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1647 /* SigmaTel reference board */
1648 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1649 "DFI LanParty", STAC_92HD71BXX_REF),
1650};
1651
0ffa9807 1652static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1653 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1654 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1655 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1656};
1657
0ffa9807 1658static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1659 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1660 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1661 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1662};
1663
0ffa9807 1664static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1665 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1666 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1667 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1668};
1669
e035b841
MR		 1670static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1671 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1672 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1673 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
6a14f585 1674 [STAC_HP_M4] = NULL,
e035b841
MR		 1675};
1676
1677static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1678 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1679 [STAC_DELL_M4_1] = "dell-m4-1",
1680 [STAC_DELL_M4_2] = "dell-m4-2",
6a14f585 1681 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1682};
1683
1684static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1685 /* SigmaTel reference board */
1686 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1687 "DFI LanParty", STAC_92HD71BXX_REF),
9a9e2359
MR		 1688 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1689 "unknown HP", STAC_HP_M4),
a7662640
MR		 1690 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1691 "unknown Dell", STAC_DELL_M4_1),
1692 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1693 "unknown Dell", STAC_DELL_M4_1),
1694 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1695 "unknown Dell", STAC_DELL_M4_1),
1696 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1697 "unknown Dell", STAC_DELL_M4_1),
1698 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1699 "unknown Dell", STAC_DELL_M4_1),
1700 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1701 "unknown Dell", STAC_DELL_M4_1),
1702 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1703 "unknown Dell", STAC_DELL_M4_1),
1704 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1705 "unknown Dell", STAC_DELL_M4_2),
1706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1707 "unknown Dell", STAC_DELL_M4_2),
1708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1709 "unknown Dell", STAC_DELL_M4_2),
1710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1711 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1712 {} /* terminator */
1713};
1714
403d1944
MP		 1715static unsigned int ref922x_pin_configs[10] = {
1716 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1717 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1718 0x40000100, 0x40000100,
1719};
1720
dfe495d0
TI		 1721/*
1722 STAC 922X pin configs for
1723 102801A7
1724 102801AB
1725 102801A9
1726 102801D1
1727 102801D2
1728*/
1729static unsigned int dell_922x_d81_pin_configs[10] = {
1730 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1731 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1732 0x01813122, 0x400001f2,
1733};
1734
1735/*
1736 STAC 922X pin configs for
1737 102801AC
1738 102801D0
1739*/
1740static unsigned int dell_922x_d82_pin_configs[10] = {
1741 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1742 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1743 0x01813122, 0x400001f1,
1744};
1745
1746/*
1747 STAC 922X pin configs for
1748 102801BF
1749*/
1750static unsigned int dell_922x_m81_pin_configs[10] = {
1751 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1752 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1753 0x40C003f1, 0x405003f0,
1754};
1755
1756/*
1757 STAC 9221 A1 pin configs for
1758 102801D7 (Dell XPS M1210)
1759*/
1760static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1761 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1762 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1763 0x508003f3, 0x405003f4,
1764};
1765
403d1944 1766static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1767 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1768 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1769 0x02a19120, 0x40000100,
1770};
1771
1772static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1773 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1774 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1775 0x02a19320, 0x40000100,
1776};
1777
5d5d3bc3
IZ		 1778static unsigned int intel_mac_v1_pin_configs[10] = {
1779 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1780 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1781 0x400000fc, 0x400000fb,
1782};
1783
1784static unsigned int intel_mac_v2_pin_configs[10] = {
1785 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1786 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1787 0x400000fc, 0x400000fb,
6f0778d8
NB		 1788};
1789
5d5d3bc3
IZ		 1790static unsigned int intel_mac_v3_pin_configs[10] = {
1791 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1792 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1793 0x400000fc, 0x400000fb,
1794};
1795
5d5d3bc3
IZ		 1796static unsigned int intel_mac_v4_pin_configs[10] = {
1797 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1798 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1799 0x400000fc, 0x400000fb,
1800};
1801
5d5d3bc3
IZ		 1802static unsigned int intel_mac_v5_pin_configs[10] = {
1803 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1804 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1805 0x400000fc, 0x400000fb,
0dae0f83
TI		 1806};
1807
8c650087
MCC		 1808static unsigned int ecs202_pin_configs[10] = {
1809 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1810 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1811 0x9037012e, 0x40e000f2,
1812};
76c08828 1813
19039bd0 1814static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1815 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1816 [STAC_D945GTP3] = d945gtp3_pin_configs,
1817 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1818 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1819 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1820 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1821 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1822 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1823 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1824 /* for backward compatibility */
5d5d3bc3
IZ		 1825 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1826 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1827 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1828 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1829 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1830 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1831 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1832 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1833 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1834 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1835 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1836};
1837
f5fcc13c
TI		 1838static const char *stac922x_models[STAC_922X_MODELS] = {
1839 [STAC_D945_REF] = "ref",
1840 [STAC_D945GTP5] = "5stack",
1841 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1842 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1843 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1844 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1845 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1846 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1847 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1848 /* for backward compatibility */
f5fcc13c 1849 [STAC_MACMINI] = "macmini",
3fc24d85 1850 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1851 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1852 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1853 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1854 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1855 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1856 [STAC_922X_DELL_D81] = "dell-d81",
1857 [STAC_922X_DELL_D82] = "dell-d82",
1858 [STAC_922X_DELL_M81] = "dell-m81",
1859 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1860};
1861
1862static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1863 /* SigmaTel reference board */
1864 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1865 "DFI LanParty", STAC_D945_REF),
1866 /* Intel 945G based systems */
1867 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1868 "Intel D945G", STAC_D945GTP3),
1869 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1870 "Intel D945G", STAC_D945GTP3),
1871 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1872 "Intel D945G", STAC_D945GTP3),
1873 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1874 "Intel D945G", STAC_D945GTP3),
1875 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1876 "Intel D945G", STAC_D945GTP3),
1877 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1878 "Intel D945G", STAC_D945GTP3),
1879 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1880 "Intel D945G", STAC_D945GTP3),
1881 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1882 "Intel D945G", STAC_D945GTP3),
1883 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1884 "Intel D945G", STAC_D945GTP3),
1885 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1886 "Intel D945G", STAC_D945GTP3),
1887 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1888 "Intel D945G", STAC_D945GTP3),
1889 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1890 "Intel D945G", STAC_D945GTP3),
1891 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1892 "Intel D945G", STAC_D945GTP3),
1893 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1894 "Intel D945G", STAC_D945GTP3),
1895 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1896 "Intel D945G", STAC_D945GTP3),
1897 /* Intel D945G 5-stack systems */
1898 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1899 "Intel D945G", STAC_D945GTP5),
1900 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1901 "Intel D945G", STAC_D945GTP5),
1902 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1903 "Intel D945G", STAC_D945GTP5),
1904 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1905 "Intel D945G", STAC_D945GTP5),
1906 /* Intel 945P based systems */
1907 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1908 "Intel D945P", STAC_D945GTP3),
1909 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1910 "Intel D945P", STAC_D945GTP3),
1911 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1912 "Intel D945P", STAC_D945GTP3),
1913 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1914 "Intel D945P", STAC_D945GTP3),
1915 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1916 "Intel D945P", STAC_D945GTP3),
1917 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1918 "Intel D945P", STAC_D945GTP5),
1919 /* other systems */
536319af 1920 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1921 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1922 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1923 /* Dell systems */
1924 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1925 "unknown Dell", STAC_922X_DELL_D81),
1926 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1927 "unknown Dell", STAC_922X_DELL_D81),
1928 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1929 "unknown Dell", STAC_922X_DELL_D81),
1930 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1931 "unknown Dell", STAC_922X_DELL_D82),
1932 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1933 "unknown Dell", STAC_922X_DELL_M81),
1934 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1935 "unknown Dell", STAC_922X_DELL_D82),
1936 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1937 "unknown Dell", STAC_922X_DELL_D81),
1938 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1939 "unknown Dell", STAC_922X_DELL_D81),
1940 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1941 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1942 /* ECS/PC Chips boards */
1943 SND_PCI_QUIRK(0x1019, 0x2144,
1944 "ECS/PC chips", STAC_ECS_202),
1945 SND_PCI_QUIRK(0x1019, 0x2608,
1946 "ECS/PC chips", STAC_ECS_202),
1947 SND_PCI_QUIRK(0x1019, 0x2633,
1948 "ECS/PC chips P17G/1333", STAC_ECS_202),
1949 SND_PCI_QUIRK(0x1019, 0x2811,
1950 "ECS/PC chips", STAC_ECS_202),
1951 SND_PCI_QUIRK(0x1019, 0x2812,
1952 "ECS/PC chips", STAC_ECS_202),
1953 SND_PCI_QUIRK(0x1019, 0x2813,
1954 "ECS/PC chips", STAC_ECS_202),
1955 SND_PCI_QUIRK(0x1019, 0x2814,
1956 "ECS/PC chips", STAC_ECS_202),
1957 SND_PCI_QUIRK(0x1019, 0x2815,
1958 "ECS/PC chips", STAC_ECS_202),
1959 SND_PCI_QUIRK(0x1019, 0x2816,
1960 "ECS/PC chips", STAC_ECS_202),
1961 SND_PCI_QUIRK(0x1019, 0x2817,
1962 "ECS/PC chips", STAC_ECS_202),
1963 SND_PCI_QUIRK(0x1019, 0x2818,
1964 "ECS/PC chips", STAC_ECS_202),
1965 SND_PCI_QUIRK(0x1019, 0x2819,
1966 "ECS/PC chips", STAC_ECS_202),
1967 SND_PCI_QUIRK(0x1019, 0x2820,
1968 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 1969 {} /* terminator */
1970};
1971
3cc08dc6 1972static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1973 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1974 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1975 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1976 0x01c42190, 0x40000100,
3cc08dc6
MP		 1977};
1978
93ed1503 1979static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1980 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1981 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1982 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1983 0x40000100, 0x40000100
1984};
1985
93ed1503
TD		 1986static unsigned int d965_5st_pin_configs[14] = {
1987 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1988 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1989 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1990 0x40000100, 0x40000100
1991};
1992
4ff076e5
TD		 1993static unsigned int dell_3st_pin_configs[14] = {
1994 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1995 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1996 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1997 0x40c003fc, 0x40000100
1998};
1999
93ed1503 2000static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 2001 [STAC_D965_REF] = ref927x_pin_configs,
2002 [STAC_D965_3ST] = d965_3st_pin_configs,
2003 [STAC_D965_5ST] = d965_5st_pin_configs,
2004 [STAC_DELL_3ST] = dell_3st_pin_configs,
2005 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2006};
2007
f5fcc13c 2008static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 2009 [STAC_D965_REF] = "ref",
2010 [STAC_D965_3ST] = "3stack",
2011 [STAC_D965_5ST] = "5stack",
2012 [STAC_DELL_3ST] = "dell-3stack",
2013 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2014};
2015
2016static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2017 /* SigmaTel reference board */
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2019 "DFI LanParty", STAC_D965_REF),
81d3dbde 2020 /* Intel 946 based systems */
f5fcc13c
TI		 2021 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2023 /* 965 based 3 stack systems */
f5fcc13c
TI		 2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2028 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2029 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2031 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2033 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2035 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2037 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2039 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2040 /* Dell 3 stack systems */
8e9068b1 2041 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2042 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2043 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2044 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2045 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2046 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2048 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2049 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2050 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2052 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2054 /* 965 based 5 stack systems */
f5fcc13c
TI		 2055 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2058 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2062 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2064 {} /* terminator */
2065};
2066
f3302a59
MP		 2067static unsigned int ref9205_pin_configs[12] = {
2068 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2069 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2070 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2071};
2072
dfe495d0
TI		 2073/*
2074 STAC 9205 pin configs for
2075 102801F1
2076 102801F2
2077 102801FC
2078 102801FD
2079 10280204
2080 1028021F
3fa2ef74 2081 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2082*/
2083static unsigned int dell_9205_m42_pin_configs[12] = {
2084 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2085 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2086 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2087};
2088
2089/*
2090 STAC 9205 pin configs for
2091 102801F9
2092 102801FA
2093 102801FE
2094 102801FF (Dell Precision M4300)
2095 10280206
2096 10280200
2097 10280201
2098*/
2099static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2100 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2101 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2102 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2103};
2104
dfe495d0 2105static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2106 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2107 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2108 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2109};
2110
f5fcc13c 2111static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2112 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2113 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2114 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2115 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2116};
2117
f5fcc13c
TI		 2118static const char *stac9205_models[STAC_9205_MODELS] = {
2119 [STAC_9205_REF] = "ref",
dfe495d0 2120 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2121 [STAC_9205_DELL_M43] = "dell-m43",
2122 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2123};
2124
2125static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2126 /* SigmaTel reference board */
2127 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2128 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2129 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2130 "unknown Dell", STAC_9205_DELL_M42),
2131 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2132 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2133 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2134 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2135 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2136 "Dell Precision", STAC_9205_DELL_M43),
2137 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2138 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2139 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2140 "unknown Dell", STAC_9205_DELL_M42),
2141 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2142 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2143 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2144 "Dell Precision", STAC_9205_DELL_M43),
2145 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2146 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2147 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2148 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2149 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2150 "Dell Precision", STAC_9205_DELL_M43),
2151 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2152 "Dell Precision", STAC_9205_DELL_M43),
2153 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2154 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2155 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2156 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2157 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2158 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2159 {} /* terminator */
2160};
2161
11b44bbd
RF		 2162static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2163{
2164 int i;
2165 struct sigmatel_spec *spec = codec->spec;
2166
2167 if (! spec->bios_pin_configs) {
2168 spec->bios_pin_configs = kcalloc(spec->num_pins,
2169 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
2170 if (! spec->bios_pin_configs)
2171 return -ENOMEM;
2172 }
2173
2174 for (i = 0; i < spec->num_pins; i++) {
2175 hda_nid_t nid = spec->pin_nids[i];
2176 unsigned int pin_cfg;
2177
2178 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2179 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2180 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2181 nid, pin_cfg);
2182 spec->bios_pin_configs[i] = pin_cfg;
2183 }
2184
2185 return 0;
2186}
2187
87d48363
MR		 2188static void stac92xx_set_config_reg(struct hda_codec *codec,
2189 hda_nid_t pin_nid, unsigned int pin_config)
2190{
2191 int i;
2192 snd_hda_codec_write(codec, pin_nid, 0,
2193 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2194 pin_config & 0x000000ff);
2195 snd_hda_codec_write(codec, pin_nid, 0,
2196 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2197 (pin_config & 0x0000ff00) >> 8);
2198 snd_hda_codec_write(codec, pin_nid, 0,
2199 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2200 (pin_config & 0x00ff0000) >> 16);
2201 snd_hda_codec_write(codec, pin_nid, 0,
2202 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2203 pin_config >> 24);
2204 i = snd_hda_codec_read(codec, pin_nid, 0,
2205 AC_VERB_GET_CONFIG_DEFAULT,
2206 0x00);
2207 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2208 pin_nid, i);
2209}
2210
2f2f4251
M		 2211static void stac92xx_set_config_regs(struct hda_codec *codec)
2212{
2213 int i;
2214 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2215
87d48363
MR		 2216 if (!spec->pin_configs)
2217 return;
11b44bbd 2218
87d48363
MR		 2219 for (i = 0; i < spec->num_pins; i++)
2220 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2221 spec->pin_configs[i]);
2f2f4251 2222}
2f2f4251 2223
dabbed6f 2224/*
c7d4b2fa 2225 * Analog playback callbacks
dabbed6f 2226 */
c7d4b2fa
M		 2227static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2228 struct hda_codec *codec,
c8b6bf9b 2229 struct snd_pcm_substream *substream)
2f2f4251 2230{
dabbed6f 2231 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2232 if (spec->stream_delay)
2233 msleep(spec->stream_delay);
9a08160b
TI		 2234 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2235 hinfo);
2f2f4251
M		 2236}
2237
2f2f4251
M		 2238static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2239 struct hda_codec *codec,
2240 unsigned int stream_tag,
2241 unsigned int format,
c8b6bf9b 2242 struct snd_pcm_substream *substream)
2f2f4251
M		 2243{
2244 struct sigmatel_spec *spec = codec->spec;
403d1944 2245 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2246}
2247
2248static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2249 struct hda_codec *codec,
c8b6bf9b 2250 struct snd_pcm_substream *substream)
2f2f4251
M		 2251{
2252 struct sigmatel_spec *spec = codec->spec;
2253 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2254}
2255
dabbed6f
M		 2256/*
2257 * Digital playback callbacks
2258 */
2259static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2260 struct hda_codec *codec,
c8b6bf9b 2261 struct snd_pcm_substream *substream)
dabbed6f
M		 2262{
2263 struct sigmatel_spec *spec = codec->spec;
2264 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2265}
2266
2267static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2268 struct hda_codec *codec,
c8b6bf9b 2269 struct snd_pcm_substream *substream)
dabbed6f
M		 2270{
2271 struct sigmatel_spec *spec = codec->spec;
2272 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2273}
2274
6b97eb45
TI		 2275static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2276 struct hda_codec *codec,
2277 unsigned int stream_tag,
2278 unsigned int format,
2279 struct snd_pcm_substream *substream)
2280{
2281 struct sigmatel_spec *spec = codec->spec;
2282 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2283 stream_tag, format, substream);
2284}
2285
dabbed6f 2286
2f2f4251
M		 2287/*
2288 * Analog capture callbacks
2289 */
2290static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2291 struct hda_codec *codec,
2292 unsigned int stream_tag,
2293 unsigned int format,
c8b6bf9b 2294 struct snd_pcm_substream *substream)
2f2f4251
M		 2295{
2296 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2297 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2298
8daaaa97
MR		 2299 if (spec->powerdown_adcs) {
2300 msleep(40);
2301 snd_hda_codec_write_cache(codec, nid, 0,
2302 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2303 }
2304 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2305 return 0;
2306}
2307
2308static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2309 struct hda_codec *codec,
c8b6bf9b 2310 struct snd_pcm_substream *substream)
2f2f4251
M		 2311{
2312 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2313 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2314
8daaaa97
MR		 2315 snd_hda_codec_cleanup_stream(codec, nid);
2316 if (spec->powerdown_adcs)
2317 snd_hda_codec_write_cache(codec, nid, 0,
2318 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2319 return 0;
2320}
2321
dabbed6f
M		 2322static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2323 .substreams = 1,
2324 .channels_min = 2,
2325 .channels_max = 2,
2326 /* NID is set in stac92xx_build_pcms */
2327 .ops = {
2328 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2329 .close = stac92xx_dig_playback_pcm_close,
2330 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2331 },
2332};
2333
2334static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2335 .substreams = 1,
2336 .channels_min = 2,
2337 .channels_max = 2,
2338 /* NID is set in stac92xx_build_pcms */
2339};
2340
2f2f4251
M		 2341static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2342 .substreams = 1,
2343 .channels_min = 2,
c7d4b2fa 2344 .channels_max = 8,
2f2f4251
M		 2345 .nid = 0x02, /* NID to query formats and rates */
2346 .ops = {
2347 .open = stac92xx_playback_pcm_open,
2348 .prepare = stac92xx_playback_pcm_prepare,
2349 .cleanup = stac92xx_playback_pcm_cleanup
2350 },
2351};
2352
3cc08dc6
MP		 2353static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2354 .substreams = 1,
2355 .channels_min = 2,
2356 .channels_max = 2,
2357 .nid = 0x06, /* NID to query formats and rates */
2358 .ops = {
2359 .open = stac92xx_playback_pcm_open,
2360 .prepare = stac92xx_playback_pcm_prepare,
2361 .cleanup = stac92xx_playback_pcm_cleanup
2362 },
2363};
2364
2f2f4251 2365static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2366 .channels_min = 2,
2367 .channels_max = 2,
9e05b7a3 2368 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2369 .ops = {
2370 .prepare = stac92xx_capture_pcm_prepare,
2371 .cleanup = stac92xx_capture_pcm_cleanup
2372 },
2373};
2374
2375static int stac92xx_build_pcms(struct hda_codec *codec)
2376{
2377 struct sigmatel_spec *spec = codec->spec;
2378 struct hda_pcm *info = spec->pcm_rec;
2379
2380 codec->num_pcms = 1;
2381 codec->pcm_info = info;
2382
c7d4b2fa 2383 info->name = "STAC92xx Analog";
2f2f4251 2384 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2385 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2386 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2387 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2388
2389 if (spec->alt_switch) {
2390 codec->num_pcms++;
2391 info++;
2392 info->name = "STAC92xx Analog Alt";
2393 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2394 }
2f2f4251 2395
dabbed6f
M		 2396 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2397 codec->num_pcms++;
2398 info++;
2399 info->name = "STAC92xx Digital";
7ba72ba1 2400 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2401 if (spec->multiout.dig_out_nid) {
2402 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2403 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2404 }
2405 if (spec->dig_in_nid) {
2406 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2407 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2408 }
2409 }
2410
2f2f4251
M		 2411 return 0;
2412}
2413
c960a03b
TI		 2414static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2415{
2416 unsigned int pincap = snd_hda_param_read(codec, nid,
2417 AC_PAR_PIN_CAP);
2418 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2419 if (pincap & AC_PINCAP_VREF_100)
2420 return AC_PINCTL_VREF_100;
2421 if (pincap & AC_PINCAP_VREF_80)
2422 return AC_PINCTL_VREF_80;
2423 if (pincap & AC_PINCAP_VREF_50)
2424 return AC_PINCTL_VREF_50;
2425 if (pincap & AC_PINCAP_VREF_GRD)
2426 return AC_PINCTL_VREF_GRD;
2427 return 0;
2428}
2429
403d1944
MP		 2430static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2431
2432{
82beb8fd
TI		 2433 snd_hda_codec_write_cache(codec, nid, 0,
2434 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2435}
2436
7c2ba97b
MR		 2437#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2438
2439static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2440 struct snd_ctl_elem_value *ucontrol)
2441{
2442 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2443 struct sigmatel_spec *spec = codec->spec;
2444
2445 ucontrol->value.integer.value[0] = spec->hp_switch;
2446 return 0;
2447}
2448
2449static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2450 struct snd_ctl_elem_value *ucontrol)
2451{
2452 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2453 struct sigmatel_spec *spec = codec->spec;
2454
2455 spec->hp_switch = ucontrol->value.integer.value[0];
2456
2457 /* check to be sure that the ports are upto date with
2458 * switch changes
2459 */
2460 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2461
2462 return 1;
2463}
2464
a5ce8890 2465#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2466
2467static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2468{
2469 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2470 struct sigmatel_spec *spec = codec->spec;
2471 int io_idx = kcontrol-> private_value & 0xff;
2472
2473 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2474 return 0;
2475}
2476
2477static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2478{
2479 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2480 struct sigmatel_spec *spec = codec->spec;
2481 hda_nid_t nid = kcontrol->private_value >> 8;
2482 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2483 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2484
2485 spec->io_switch[io_idx] = val;
2486
2487 if (val)
2488 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2489 else {
2490 unsigned int pinctl = AC_PINCTL_IN_EN;
2491 if (io_idx) /* set VREF for mic */
2492 pinctl |= stac92xx_get_vref(codec, nid);
2493 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2494 }
40c1d308
JZ		 2495
2496 /* check the auto-mute again: we need to mute/unmute the speaker
2497 * appropriately according to the pin direction
2498 */
2499 if (spec->hp_detect)
2500 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2501
403d1944
MP		 2502 return 1;
2503}
2504
0fb87bb4
ML		 2505#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2506
2507static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2508 struct snd_ctl_elem_value *ucontrol)
2509{
2510 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2511 struct sigmatel_spec *spec = codec->spec;
2512
2513 ucontrol->value.integer.value[0] = spec->clfe_swap;
2514 return 0;
2515}
2516
2517static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2518 struct snd_ctl_elem_value *ucontrol)
2519{
2520 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2521 struct sigmatel_spec *spec = codec->spec;
2522 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2523 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2524
68ea7b2f 2525 if (spec->clfe_swap == val)
0fb87bb4
ML		 2526 return 0;
2527
68ea7b2f 2528 spec->clfe_swap = val;
0fb87bb4
ML		 2529
2530 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2531 spec->clfe_swap ? 0x4 : 0x0);
2532
2533 return 1;
2534}
2535
7c2ba97b
MR		 2536#define STAC_CODEC_HP_SWITCH(xname) \
2537 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2538 .name = xname, \
2539 .index = 0, \
2540 .info = stac92xx_hp_switch_info, \
2541 .get = stac92xx_hp_switch_get, \
2542 .put = stac92xx_hp_switch_put, \
2543 }
2544
403d1944
MP		 2545#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2546 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2547 .name = xname, \
2548 .index = 0, \
2549 .info = stac92xx_io_switch_info, \
2550 .get = stac92xx_io_switch_get, \
2551 .put = stac92xx_io_switch_put, \
2552 .private_value = xpval, \
2553 }
2554
0fb87bb4
ML		 2555#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2556 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2557 .name = xname, \
2558 .index = 0, \
2559 .info = stac92xx_clfe_switch_info, \
2560 .get = stac92xx_clfe_switch_get, \
2561 .put = stac92xx_clfe_switch_put, \
2562 .private_value = xpval, \
2563 }
403d1944 2564
c7d4b2fa
M		 2565enum {
2566 STAC_CTL_WIDGET_VOL,
2567 STAC_CTL_WIDGET_MUTE,
09a99959 2568 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2569 STAC_CTL_WIDGET_AMP_MUX,
2570 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2571 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2572 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2573 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2574};
2575
c8b6bf9b 2576static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2577 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2578 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2579 STAC_MONO_MUX,
89385035
MR		 2580 STAC_AMP_MUX,
2581 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2582 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2583 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2584 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2585};
2586
2587/* add dynamic controls */
4682eee0
MR		 2588static int stac92xx_add_control_idx(struct sigmatel_spec *spec, int type,
2589 int idx, const char *name, unsigned long val)
c7d4b2fa 2590{
c8b6bf9b 2591 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2592
2593 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2594 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2595
2596 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2597 if (! knew)
2598 return -ENOMEM;
2599 if (spec->kctl_alloc) {
2600 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2601 kfree(spec->kctl_alloc);
2602 }
2603 spec->kctl_alloc = knew;
2604 spec->num_kctl_alloc = num;
2605 }
2606
2607 knew = &spec->kctl_alloc[spec->num_kctl_used];
2608 *knew = stac92xx_control_templates[type];
4682eee0 2609 knew->index = idx;
82fe0c58 2610 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2611 if (! knew->name)
2612 return -ENOMEM;
2613 knew->private_value = val;
2614 spec->num_kctl_used++;
2615 return 0;
2616}
2617
4682eee0
MR		 2618
2619/* add dynamic controls */
2620static int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2621 const char *name, unsigned long val)
2622{
2623 return stac92xx_add_control_idx(spec, type, 0, name, val);
2624}
2625
403d1944
MP		 2626/* flag inputs as additional dynamic lineouts */
2627static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2628{
2629 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2630 unsigned int wcaps, wtype;
2631 int i, num_dacs = 0;
2632
2633 /* use the wcaps cache to count all DACs available for line-outs */
2634 for (i = 0; i < codec->num_nodes; i++) {
2635 wcaps = codec->wcaps[i];
2636 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2637
7b043899
SL		 2638 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2639 num_dacs++;
2640 }
403d1944 2641
7b043899
SL		 2642 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2643
403d1944
MP		 2644 switch (cfg->line_outs) {
2645 case 3:
2646 /* add line-in as side */
7b043899 2647 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2648 cfg->line_out_pins[cfg->line_outs] =
2649 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2650 spec->line_switch = 1;
2651 cfg->line_outs++;
2652 }
2653 break;
2654 case 2:
2655 /* add line-in as clfe and mic as side */
7b043899 2656 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2657 cfg->line_out_pins[cfg->line_outs] =
2658 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2659 spec->line_switch = 1;
2660 cfg->line_outs++;
2661 }
7b043899 2662 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2663 cfg->line_out_pins[cfg->line_outs] =
2664 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2665 spec->mic_switch = 1;
2666 cfg->line_outs++;
2667 }
2668 break;
2669 case 1:
2670 /* add line-in as surr and mic as clfe */
7b043899 2671 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2672 cfg->line_out_pins[cfg->line_outs] =
2673 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2674 spec->line_switch = 1;
2675 cfg->line_outs++;
2676 }
7b043899 2677 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2678 cfg->line_out_pins[cfg->line_outs] =
2679 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2680 spec->mic_switch = 1;
2681 cfg->line_outs++;
2682 }
2683 break;
2684 }
2685
2686 return 0;
2687}
2688
7b043899
SL		 2689
2690static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2691{
2692 int i;
2693
2694 for (i = 0; i < spec->multiout.num_dacs; i++) {
2695 if (spec->multiout.dac_nids[i] == nid)
2696 return 1;
2697 }
2698
2699 return 0;
2700}
2701
3cc08dc6 2702/*
7b043899
SL		 2703 * Fill in the dac_nids table from the parsed pin configuration
2704 * This function only works when every pin in line_out_pins[]
2705 * contains atleast one DAC in its connection list. Some 92xx
2706 * codecs are not connected directly to a DAC, such as the 9200
2707 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2708 */
19039bd0 2709static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2710 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2711{
2712 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2713 int i, j, conn_len = 0;
2714 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2715 unsigned int wcaps, wtype;
2716
c7d4b2fa
M		 2717 for (i = 0; i < cfg->line_outs; i++) {
2718 nid = cfg->line_out_pins[i];
7b043899
SL		 2719 conn_len = snd_hda_get_connections(codec, nid, conn,
2720 HDA_MAX_CONNECTIONS);
2721 for (j = 0; j < conn_len; j++) {
2722 wcaps = snd_hda_param_read(codec, conn[j],
2723 AC_PAR_AUDIO_WIDGET_CAP);
2724 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2725 if (wtype != AC_WID_AUD_OUT ||
2726 (wcaps & AC_WCAP_DIGITAL))
2727 continue;
2728 /* conn[j] is a DAC routed to this line-out */
2729 if (!is_in_dac_nids(spec, conn[j]))
2730 break;
2731 }
2732
2733 if (j == conn_len) {
df802952
TI		 2734 if (spec->multiout.num_dacs > 0) {
2735 /* we have already working output pins,
2736 * so let's drop the broken ones again
2737 */
2738 cfg->line_outs = spec->multiout.num_dacs;
2739 break;
2740 }
7b043899
SL		 2741 /* error out, no available DAC found */
2742 snd_printk(KERN_ERR
2743 "%s: No available DAC for pin 0x%x\n",
2744 __func__, nid);
2745 return -ENODEV;
2746 }
2747
2748 spec->multiout.dac_nids[i] = conn[j];
2749 spec->multiout.num_dacs++;
2750 if (conn_len > 1) {
2751 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2752 snd_hda_codec_write_cache(codec, nid, 0,
2753 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2754
7b043899
SL		 2755 }
2756 }
c7d4b2fa 2757
7b043899
SL		 2758 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2759 spec->multiout.num_dacs,
2760 spec->multiout.dac_nids[0],
2761 spec->multiout.dac_nids[1],
2762 spec->multiout.dac_nids[2],
2763 spec->multiout.dac_nids[3],
2764 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2765 return 0;
2766}
2767
eb06ed8f
TI		 2768/* create volume control/switch for the given prefx type */
2769static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2770{
2771 char name[32];
2772 int err;
2773
2774 sprintf(name, "%s Playback Volume", pfx);
2775 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2776 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2777 if (err < 0)
2778 return err;
2779 sprintf(name, "%s Playback Switch", pfx);
2780 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2781 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2782 if (err < 0)
2783 return err;
2784 return 0;
2785}
2786
ae0afd81
MR		 2787static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2788{
2789 if (!spec->multiout.hp_nid)
2790 spec->multiout.hp_nid = nid;
2791 else if (spec->multiout.num_dacs > 4) {
2792 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2793 return 1;
2794 } else {
2795 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2796 spec->multiout.num_dacs++;
2797 }
2798 return 0;
2799}
2800
2801static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2802{
2803 if (is_in_dac_nids(spec, nid))
2804 return 1;
2805 if (spec->multiout.hp_nid == nid)
2806 return 1;
2807 return 0;
2808}
2809
c7d4b2fa 2810/* add playback controls from the parsed DAC table */
0fb87bb4 2811static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2812 const struct auto_pin_cfg *cfg)
c7d4b2fa 2813{
19039bd0
TI		 2814 static const char *chname[4] = {
2815 "Front", "Surround", NULL /*CLFE*/, "Side"
2816 };
d21995e3 2817 hda_nid_t nid = 0;
c7d4b2fa
M		 2818 int i, err;
2819
0fb87bb4 2820 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2821 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2822
2823
40ac8c4f 2824 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2825 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2826 continue;
2827
2828 nid = spec->multiout.dac_nids[i];
2829
2830 if (i == 2) {
2831 /* Center/LFE */
eb06ed8f
TI		 2832 err = create_controls(spec, "Center", nid, 1);
2833 if (err < 0)
c7d4b2fa 2834 return err;
eb06ed8f
TI		 2835 err = create_controls(spec, "LFE", nid, 2);
2836 if (err < 0)
c7d4b2fa 2837 return err;
0fb87bb4
ML		 2838
2839 wid_caps = get_wcaps(codec, nid);
2840
2841 if (wid_caps & AC_WCAP_LR_SWAP) {
2842 err = stac92xx_add_control(spec,
2843 STAC_CTL_WIDGET_CLFE_SWITCH,
2844 "Swap Center/LFE Playback Switch", nid);
2845
2846 if (err < 0)
2847 return err;
2848 }
2849
c7d4b2fa 2850 } else {
eb06ed8f
TI		 2851 err = create_controls(spec, chname[i], nid, 3);
2852 if (err < 0)
c7d4b2fa
M		 2853 return err;
2854 }
2855 }
2856
fedb7569
MR		 2857 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
2858 cfg->hp_outs && !spec->multiout.hp_nid)
2859 spec->multiout.hp_nid = nid;
2860
7c2ba97b
MR		 2861 if (cfg->hp_outs > 1) {
2862 err = stac92xx_add_control(spec,
2863 STAC_CTL_WIDGET_HP_SWITCH,
2864 "Headphone as Line Out Switch", 0);
2865 if (err < 0)
2866 return err;
2867 }
2868
b5895dc8
MR		 2869 if (spec->line_switch) {
2870 nid = cfg->input_pins[AUTO_PIN_LINE];
2871 pincap = snd_hda_param_read(codec, nid,
2872 AC_PAR_PIN_CAP);
2873 if (pincap & AC_PINCAP_OUT) {
2874 err = stac92xx_add_control(spec,
2875 STAC_CTL_WIDGET_IO_SWITCH,
2876 "Line In as Output Switch", nid << 8);
2877 if (err < 0)
2878 return err;
2879 }
2880 }
403d1944 2881
b5895dc8 2882 if (spec->mic_switch) {
cace16f1 2883 unsigned int def_conf;
ae0afd81
MR		 2884 unsigned int mic_pin = AUTO_PIN_MIC;
2885again:
2886 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2887 def_conf = snd_hda_codec_read(codec, nid, 0,
2888 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2889 /* some laptops have an internal analog microphone
2890 * which can't be used as a output */
2891 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2892 pincap = snd_hda_param_read(codec, nid,
2893 AC_PAR_PIN_CAP);
2894 if (pincap & AC_PINCAP_OUT) {
2895 err = stac92xx_add_control(spec,
2896 STAC_CTL_WIDGET_IO_SWITCH,
2897 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2898 nid = snd_hda_codec_read(codec, nid, 0,
2899 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2900 if (!check_in_dac_nids(spec, nid))
2901 add_spec_dacs(spec, nid);
cace16f1
MR		 2902 if (err < 0)
2903 return err;
2904 }
ae0afd81
MR		 2905 } else if (mic_pin == AUTO_PIN_MIC) {
2906 mic_pin = AUTO_PIN_FRONT_MIC;
2907 goto again;
b5895dc8
MR		 2908 }
2909 }
403d1944 2910
c7d4b2fa
M		 2911 return 0;
2912}
2913
eb06ed8f
TI		 2914/* add playback controls for Speaker and HP outputs */
2915static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2916 struct auto_pin_cfg *cfg)
2917{
2918 struct sigmatel_spec *spec = codec->spec;
2919 hda_nid_t nid;
2920 int i, old_num_dacs, err;
2921
2922 old_num_dacs = spec->multiout.num_dacs;
2923 for (i = 0; i < cfg->hp_outs; i++) {
2924 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2925 if (wid_caps & AC_WCAP_UNSOL_CAP)
2926 spec->hp_detect = 1;
2927 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2928 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2929 if (check_in_dac_nids(spec, nid))
2930 nid = 0;
2931 if (! nid)
c7d4b2fa 2932 continue;
eb06ed8f
TI		 2933 add_spec_dacs(spec, nid);
2934 }
2935 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2936 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2937 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2938 if (check_in_dac_nids(spec, nid))
2939 nid = 0;
eb06ed8f
TI		 2940 if (! nid)
2941 continue;
2942 add_spec_dacs(spec, nid);
c7d4b2fa 2943 }
1b290a51
MR		 2944 for (i = 0; i < cfg->line_outs; i++) {
2945 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2946 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2947 if (check_in_dac_nids(spec, nid))
2948 nid = 0;
2949 if (! nid)
2950 continue;
2951 add_spec_dacs(spec, nid);
2952 }
eb06ed8f
TI		 2953 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2954 static const char *pfxs[] = {
2955 "Speaker", "External Speaker", "Speaker2",
2956 };
2957 err = create_controls(spec, pfxs[i - old_num_dacs],
2958 spec->multiout.dac_nids[i], 3);
2959 if (err < 0)
2960 return err;
2961 }
2962 if (spec->multiout.hp_nid) {
2626a263
TI		 2963 err = create_controls(spec, "Headphone",
2964 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2965 if (err < 0)
2966 return err;
2967 }
c7d4b2fa
M		 2968
2969 return 0;
2970}
2971
b22b4821 2972/* labels for mono mux outputs */
d0513fc6
MR		 2973static const char *stac92xx_mono_labels[4] = {
2974 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 2975};
2976
2977/* create mono mux for mono out on capable codecs */
2978static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2979{
2980 struct sigmatel_spec *spec = codec->spec;
2981 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2982 int i, num_cons;
2983 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2984
2985 num_cons = snd_hda_get_connections(codec,
2986 spec->mono_nid,
2987 con_lst,
2988 HDA_MAX_NUM_INPUTS);
2989 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2990 return -EINVAL;
2991
2992 for (i = 0; i < num_cons; i++) {
2993 mono_mux->items[mono_mux->num_items].label =
2994 stac92xx_mono_labels[i];
2995 mono_mux->items[mono_mux->num_items].index = i;
2996 mono_mux->num_items++;
2997 }
09a99959
MR		 2998
2999 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3000 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3001}
3002
89385035
MR		 3003/* labels for amp mux outputs */
3004static const char *stac92xx_amp_labels[3] = {
4b33c767 3005 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3006};
3007
3008/* create amp out controls mux on capable codecs */
3009static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3010{
3011 struct sigmatel_spec *spec = codec->spec;
3012 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3013 int i, err;
3014
2a9c7816 3015 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3016 amp_mux->items[amp_mux->num_items].label =
3017 stac92xx_amp_labels[i];
3018 amp_mux->items[amp_mux->num_items].index = i;
3019 amp_mux->num_items++;
3020 }
3021
2a9c7816
MR		 3022 if (spec->num_amps > 1) {
3023 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3024 "Amp Selector Capture Switch", 0);
3025 if (err < 0)
3026 return err;
3027 }
89385035
MR		 3028 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3029 "Amp Capture Volume",
3030 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3031}
3032
3033
1cd2224c
MR		 3034/* create PC beep volume controls */
3035static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3036 hda_nid_t nid)
3037{
3038 struct sigmatel_spec *spec = codec->spec;
3039 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3040 int err;
3041
3042 /* check for mute support for the the amp */
3043 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3044 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3045 "PC Beep Playback Switch",
3046 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3047 if (err < 0)
3048 return err;
3049 }
3050
3051 /* check to see if there is volume support for the amp */
3052 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3053 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3054 "PC Beep Playback Volume",
3055 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3056 if (err < 0)
3057 return err;
3058 }
3059 return 0;
3060}
3061
4682eee0
MR		 3062static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3063{
3064 struct sigmatel_spec *spec = codec->spec;
3065 int wcaps, nid, i, err = 0;
3066
3067 for (i = 0; i < spec->num_muxes; i++) {
3068 nid = spec->mux_nids[i];
3069 wcaps = get_wcaps(codec, nid);
3070
3071 if (wcaps & AC_WCAP_OUT_AMP) {
3072 err = stac92xx_add_control_idx(spec,
3073 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3074 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3075 if (err < 0)
3076 return err;
3077 }
3078 }
3079 return 0;
3080};
3081
d9737751 3082static const char *stac92xx_spdif_labels[3] = {
65973632 3083 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3084};
3085
3086static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3087{
3088 struct sigmatel_spec *spec = codec->spec;
3089 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3090 const char **labels = spec->spdif_labels;
d9737751 3091 int i, num_cons;
65973632 3092 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3093
3094 num_cons = snd_hda_get_connections(codec,
3095 spec->smux_nids[0],
3096 con_lst,
3097 HDA_MAX_NUM_INPUTS);
65973632 3098 if (!num_cons)
d9737751
MR		 3099 return -EINVAL;
3100
65973632
MR		 3101 if (!labels)
3102 labels = stac92xx_spdif_labels;
3103
d9737751 3104 for (i = 0; i < num_cons; i++) {
65973632 3105 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3106 spdif_mux->items[spdif_mux->num_items].index = i;
3107 spdif_mux->num_items++;
3108 }
3109
3110 return 0;
3111}
3112
8b65727b 3113/* labels for dmic mux inputs */
ddc2cec4 3114static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3115 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3116 "Digital Mic 3", "Digital Mic 4"
3117};
3118
3119/* create playback/capture controls for input pins on dmic capable codecs */
3120static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3121 const struct auto_pin_cfg *cfg)
3122{
3123 struct sigmatel_spec *spec = codec->spec;
3124 struct hda_input_mux *dimux = &spec->private_dimux;
3125 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3126 int err, i, j;
3127 char name[32];
8b65727b
MP		 3128
3129 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3130 dimux->items[dimux->num_items].index = 0;
3131 dimux->num_items++;
3132
3133 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3134 hda_nid_t nid;
8b65727b
MP		 3135 int index;
3136 int num_cons;
0678accd 3137 unsigned int wcaps;
8b65727b
MP		 3138 unsigned int def_conf;
3139
3140 def_conf = snd_hda_codec_read(codec,
3141 spec->dmic_nids[i],
3142 0,
3143 AC_VERB_GET_CONFIG_DEFAULT,
3144 0);
3145 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3146 continue;
3147
0678accd 3148 nid = spec->dmic_nids[i];
8b65727b 3149 num_cons = snd_hda_get_connections(codec,
e1f0d669 3150 spec->dmux_nids[0],
8b65727b
MP		 3151 con_lst,
3152 HDA_MAX_NUM_INPUTS);
3153 for (j = 0; j < num_cons; j++)
0678accd 3154 if (con_lst[j] == nid) {
8b65727b
MP		 3155 index = j;
3156 goto found;
3157 }
3158 continue;
3159found:
d0513fc6
MR		 3160 wcaps = get_wcaps(codec, nid) &
3161 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3162
d0513fc6 3163 if (wcaps) {
0678accd
MR		 3164 sprintf(name, "%s Capture Volume",
3165 stac92xx_dmic_labels[dimux->num_items]);
3166
3167 err = stac92xx_add_control(spec,
3168 STAC_CTL_WIDGET_VOL,
3169 name,
d0513fc6
MR		 3170 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3171 (wcaps & AC_WCAP_OUT_AMP) ?
3172 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3173 if (err < 0)
3174 return err;
3175 }
3176
8b65727b
MP		 3177 dimux->items[dimux->num_items].label =
3178 stac92xx_dmic_labels[dimux->num_items];
3179 dimux->items[dimux->num_items].index = index;
3180 dimux->num_items++;
3181 }
3182
3183 return 0;
3184}
3185
c7d4b2fa
M		 3186/* create playback/capture controls for input pins */
3187static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3188{
3189 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3190 struct hda_input_mux *imux = &spec->private_imux;
3191 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3192 int i, j, k;
3193
3194 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3195 int index;
3196
3197 if (!cfg->input_pins[i])
3198 continue;
3199 index = -1;
3200 for (j = 0; j < spec->num_muxes; j++) {
3201 int num_cons;
3202 num_cons = snd_hda_get_connections(codec,
3203 spec->mux_nids[j],
3204 con_lst,
3205 HDA_MAX_NUM_INPUTS);
3206 for (k = 0; k < num_cons; k++)
3207 if (con_lst[k] == cfg->input_pins[i]) {
3208 index = k;
3209 goto found;
3210 }
c7d4b2fa 3211 }
314634bc
TI		 3212 continue;
3213 found:
3214 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3215 imux->items[imux->num_items].index = index;
3216 imux->num_items++;
c7d4b2fa
M		 3217 }
3218
7b043899 3219 if (imux->num_items) {
62fe78e9
SR		 3220 /*
3221 * Set the current input for the muxes.
3222 * The STAC9221 has two input muxes with identical source
3223 * NID lists. Hopefully this won't get confused.
3224 */
3225 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3226 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3227 AC_VERB_SET_CONNECT_SEL,
3228 imux->items[0].index);
62fe78e9
SR		 3229 }
3230 }
3231
c7d4b2fa
M		 3232 return 0;
3233}
3234
c7d4b2fa
M		 3235static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3236{
3237 struct sigmatel_spec *spec = codec->spec;
3238 int i;
3239
3240 for (i = 0; i < spec->autocfg.line_outs; i++) {
3241 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3242 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3243 }
3244}
3245
3246static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3247{
3248 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3249 int i;
c7d4b2fa 3250
eb06ed8f
TI		 3251 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3252 hda_nid_t pin;
3253 pin = spec->autocfg.hp_pins[i];
3254 if (pin) /* connect to front */
3255 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3256 }
3257 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3258 hda_nid_t pin;
3259 pin = spec->autocfg.speaker_pins[i];
3260 if (pin) /* connect to front */
3261 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3262 }
c7d4b2fa
M		 3263}
3264
3cc08dc6 3265static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3266{
3267 struct sigmatel_spec *spec = codec->spec;
3268 int err;
bcecd9bd 3269 int hp_speaker_swap = 0;
c7d4b2fa 3270
8b65727b
MP		 3271 if ((err = snd_hda_parse_pin_def_config(codec,
3272 &spec->autocfg,
3273 spec->dmic_nids)) < 0)
c7d4b2fa 3274 return err;
82bc955f 3275 if (! spec->autocfg.line_outs)
869264c4 3276 return 0; /* can't find valid pin config */
19039bd0 3277
bcecd9bd
JZ		 3278 /* If we have no real line-out pin and multiple hp-outs, HPs should
3279 * be set up as multi-channel outputs.
3280 */
3281 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3282 spec->autocfg.hp_outs > 1) {
3283 /* Copy hp_outs to line_outs, backup line_outs in
3284 * speaker_outs so that the following routines can handle
3285 * HP pins as primary outputs.
3286 */
3287 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3288 sizeof(spec->autocfg.line_out_pins));
3289 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3290 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3291 sizeof(spec->autocfg.hp_pins));
3292 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3293 hp_speaker_swap = 1;
3294 }
09a99959 3295 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3296 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3297 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3298 u32 caps = query_amp_caps(codec,
3299 spec->autocfg.mono_out_pin, dir);
3300 hda_nid_t conn_list[1];
3301
3302 /* get the mixer node and then the mono mux if it exists */
3303 if (snd_hda_get_connections(codec,
3304 spec->autocfg.mono_out_pin, conn_list, 1) &&
3305 snd_hda_get_connections(codec, conn_list[0],
3306 conn_list, 1)) {
3307
3308 int wcaps = get_wcaps(codec, conn_list[0]);
3309 int wid_type = (wcaps & AC_WCAP_TYPE)
3310 >> AC_WCAP_TYPE_SHIFT;
3311 /* LR swap check, some stac925x have a mux that
3312 * changes the DACs output path instead of the
3313 * mono-mux path.
3314 */
3315 if (wid_type == AC_WID_AUD_SEL &&
3316 !(wcaps & AC_WCAP_LR_SWAP))
3317 spec->mono_nid = conn_list[0];
3318 }
d0513fc6
MR		 3319 if (dir) {
3320 hda_nid_t nid = spec->autocfg.mono_out_pin;
3321
3322 /* most mono outs have a least a mute/unmute switch */
3323 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3324 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3325 "Mono Playback Switch",
3326 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3327 if (err < 0)
3328 return err;
d0513fc6
MR		 3329 /* check for volume support for the amp */
3330 if ((caps & AC_AMPCAP_NUM_STEPS)
3331 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3332 err = stac92xx_add_control(spec,
3333 STAC_CTL_WIDGET_VOL,
3334 "Mono Playback Volume",
3335 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3336 if (err < 0)
3337 return err;
3338 }
09a99959
MR		 3339 }
3340
3341 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3342 AC_PINCTL_OUT_EN);
3343 }
bcecd9bd 3344
403d1944
MP		 3345 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3346 return err;
19039bd0
TI		 3347 if (spec->multiout.num_dacs == 0)
3348 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3349 return err;
c7d4b2fa 3350
0fb87bb4
ML		 3351 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3352
3353 if (err < 0)
3354 return err;
3355
1cd2224c
MR		 3356 /* setup analog beep controls */
3357 if (spec->anabeep_nid > 0) {
3358 err = stac92xx_auto_create_beep_ctls(codec,
3359 spec->anabeep_nid);
3360 if (err < 0)
3361 return err;
3362 }
3363
3364 /* setup digital beep controls and input device */
3365#ifdef CONFIG_SND_HDA_INPUT_BEEP
3366 if (spec->digbeep_nid > 0) {
3367 hda_nid_t nid = spec->digbeep_nid;
3368
3369 err = stac92xx_auto_create_beep_ctls(codec, nid);
3370 if (err < 0)
3371 return err;
3372 err = snd_hda_attach_beep_device(codec, nid);
3373 if (err < 0)
3374 return err;
3375 }
3376#endif
3377
bcecd9bd
JZ		 3378 if (hp_speaker_swap == 1) {
3379 /* Restore the hp_outs and line_outs */
3380 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3381 sizeof(spec->autocfg.line_out_pins));
3382 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3383 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3384 sizeof(spec->autocfg.speaker_pins));
3385 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3386 memset(spec->autocfg.speaker_pins, 0,
3387 sizeof(spec->autocfg.speaker_pins));
3388 spec->autocfg.speaker_outs = 0;
3389 }
3390
0fb87bb4
ML		 3391 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3392
3393 if (err < 0)
3394 return err;
3395
3396 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3397
3398 if (err < 0)
c7d4b2fa
M		 3399 return err;
3400
b22b4821
MR		 3401 if (spec->mono_nid > 0) {
3402 err = stac92xx_auto_create_mono_output_ctls(codec);
3403 if (err < 0)
3404 return err;
3405 }
2a9c7816 3406 if (spec->num_amps > 0) {
89385035
MR		 3407 err = stac92xx_auto_create_amp_output_ctls(codec);
3408 if (err < 0)
3409 return err;
3410 }
2a9c7816 3411 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3412 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3413 &spec->autocfg)) < 0)
3414 return err;
4682eee0
MR		 3415 if (spec->num_muxes > 0) {
3416 err = stac92xx_auto_create_mux_input_ctls(codec);
3417 if (err < 0)
3418 return err;
3419 }
d9737751
MR		 3420 if (spec->num_smuxes > 0) {
3421 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3422 if (err < 0)
3423 return err;
3424 }
8b65727b 3425
c7d4b2fa 3426 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3427 if (spec->multiout.max_channels > 2)
c7d4b2fa 3428 spec->surr_switch = 1;
c7d4b2fa 3429
82bc955f 3430 if (spec->autocfg.dig_out_pin)
3cc08dc6 3431 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3432 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3433 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 3434
3435 if (spec->kctl_alloc)
3436 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3437
3438 spec->input_mux = &spec->private_imux;
2a9c7816 3439 spec->dinput_mux = &spec->private_dimux;
d9737751 3440 spec->sinput_mux = &spec->private_smux;
b22b4821 3441 spec->mono_mux = &spec->private_mono_mux;
89385035 3442 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3443 return 1;
3444}
3445
82bc955f
TI		 3446/* add playback controls for HP output */
3447static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3448 struct auto_pin_cfg *cfg)
3449{
3450 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3451 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3452 unsigned int wid_caps;
3453
3454 if (! pin)
3455 return 0;
3456
3457 wid_caps = get_wcaps(codec, pin);
505cb341 3458 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3459 spec->hp_detect = 1;
82bc955f
TI		 3460
3461 return 0;
3462}
3463
160ea0dc
RF		 3464/* add playback controls for LFE output */
3465static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3466 struct auto_pin_cfg *cfg)
3467{
3468 struct sigmatel_spec *spec = codec->spec;
3469 int err;
3470 hda_nid_t lfe_pin = 0x0;
3471 int i;
3472
3473 /*
3474 * search speaker outs and line outs for a mono speaker pin
3475 * with an amp. If one is found, add LFE controls
3476 * for it.
3477 */
3478 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3479 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3480 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3481 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3482 if (wcaps == AC_WCAP_OUT_AMP)
3483 /* found a mono speaker with an amp, must be lfe */
3484 lfe_pin = pin;
3485 }
3486
3487 /* if speaker_outs is 0, then speakers may be in line_outs */
3488 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3489 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3490 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3491 unsigned int defcfg;
8b551785 3492 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3493 AC_VERB_GET_CONFIG_DEFAULT,
3494 0x00);
8b551785 3495 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3496 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3497 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3498 if (wcaps == AC_WCAP_OUT_AMP)
3499 /* found a mono speaker with an amp,
3500 must be lfe */
3501 lfe_pin = pin;
3502 }
3503 }
3504 }
3505
3506 if (lfe_pin) {
eb06ed8f 3507 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3508 if (err < 0)
3509 return err;
3510 }
3511
3512 return 0;
3513}
3514
c7d4b2fa
M		 3515static int stac9200_parse_auto_config(struct hda_codec *codec)
3516{
3517 struct sigmatel_spec *spec = codec->spec;
3518 int err;
3519
df694daa 3520 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3521 return err;
3522
3523 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3524 return err;
3525
82bc955f
TI		 3526 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3527 return err;
3528
160ea0dc
RF		 3529 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3530 return err;
3531
82bc955f 3532 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3533 spec->multiout.dig_out_nid = 0x05;
82bc955f 3534 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3535 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 3536
3537 if (spec->kctl_alloc)
3538 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3539
3540 spec->input_mux = &spec->private_imux;
8b65727b 3541 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3542
3543 return 1;
3544}
3545
62fe78e9
SR		 3546/*
3547 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3548 * funky external mute control using GPIO pins.
3549 */
3550
76e1ddfb 3551static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3552 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3553{
3554 unsigned int gpiostate, gpiomask, gpiodir;
3555
3556 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3557 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3558 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3559
3560 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3561 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3562 gpiomask |= mask;
62fe78e9
SR		 3563
3564 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3565 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3566 gpiodir |= dir_mask;
62fe78e9 3567
76e1ddfb 3568 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3569 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3570
3571 snd_hda_codec_write(codec, codec->afg, 0,
3572 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3573 snd_hda_codec_read(codec, codec->afg, 0,
3574 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3575
3576 msleep(1);
3577
76e1ddfb
TI		 3578 snd_hda_codec_read(codec, codec->afg, 0,
3579 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3580}
3581
314634bc
TI		 3582static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3583 unsigned int event)
3584{
3585 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3586 snd_hda_codec_write_cache(codec, nid, 0,
3587 AC_VERB_SET_UNSOLICITED_ENABLE,
3588 (AC_USRSP_EN | event));
314634bc
TI		 3589}
3590
a64135a2
MR		 3591static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3592{
3593 int i;
3594 for (i = 0; i < cfg->hp_outs; i++)
3595 if (cfg->hp_pins[i] == nid)
3596 return 1; /* nid is a HP-Out */
3597
3598 return 0; /* nid is not a HP-Out */
3599};
3600
b76c850f
MR		 3601static void stac92xx_power_down(struct hda_codec *codec)
3602{
3603 struct sigmatel_spec *spec = codec->spec;
3604
3605 /* power down inactive DACs */
3606 hda_nid_t *dac;
3607 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3608 if (!is_in_dac_nids(spec, *dac) &&
3609 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3610 snd_hda_codec_write_cache(codec, *dac, 0,
3611 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3612}
3613
c7d4b2fa
M		 3614static int stac92xx_init(struct hda_codec *codec)
3615{
3616 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3617 struct auto_pin_cfg *cfg = &spec->autocfg;
3618 int i;
c7d4b2fa 3619
c7d4b2fa
M		 3620 snd_hda_sequence_write(codec, spec->init);
3621
8daaaa97
MR		 3622 /* power down adcs initially */
3623 if (spec->powerdown_adcs)
3624 for (i = 0; i < spec->num_adcs; i++)
3625 snd_hda_codec_write_cache(codec,
3626 spec->adc_nids[i], 0,
3627 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
82bc955f
TI		 3628 /* set up pins */
3629 if (spec->hp_detect) {
505cb341 3630 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3631 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3632 enable_pin_detect(codec, cfg->hp_pins[i],
3633 STAC_HP_EVENT);
0a07acaf
TI		 3634 /* force to enable the first line-out; the others are set up
3635 * in unsol_event
3636 */
3637 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3638 AC_PINCTL_OUT_EN);
eb995a8c 3639 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3640 /* fake event to set up pins */
3641 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3642 } else {
3643 stac92xx_auto_init_multi_out(codec);
3644 stac92xx_auto_init_hp_out(codec);
3645 }
3646 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3647 hda_nid_t nid = cfg->input_pins[i];
3648 if (nid) {
b9aea715
MR		 3649 unsigned int pinctl = snd_hda_codec_read(codec, nid,
3650 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3651 /* if PINCTL already set then skip */
3652 if (pinctl & AC_PINCAP_IN)
3653 continue;
3654 pinctl = AC_PINCTL_IN_EN;
c960a03b
TI		 3655 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3656 pinctl |= stac92xx_get_vref(codec, nid);
3657 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3658 }
82bc955f 3659 }
a64135a2
MR		 3660 for (i = 0; i < spec->num_dmics; i++)
3661 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3662 AC_PINCTL_IN_EN);
3663 for (i = 0; i < spec->num_pwrs; i++) {
3664 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3665 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3666 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3667 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3668 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3669 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3670 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3671 /* outputs are only ports capable of power management
3672 * any attempts on powering down a input port cause the
3673 * referenced VREF to act quirky.
3674 */
3675 if (pinctl & AC_PINCTL_IN_EN)
3676 continue;
aafc4412
MR		 3677 /* skip any ports that don't have jacks since presence
3678 * detection is useless */
3679 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3680 continue;
a64135a2
MR		 3681 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3682 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3683 }
b76c850f
MR		 3684 if (spec->dac_list)
3685 stac92xx_power_down(codec);
82bc955f
TI		 3686 if (cfg->dig_out_pin)
3687 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3688 AC_PINCTL_OUT_EN);
3689 if (cfg->dig_in_pin)
3690 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3691 AC_PINCTL_IN_EN);
3692
4fe5195c
MR		 3693 stac_gpio_set(codec, spec->gpio_mask,
3694 spec->gpio_dir, spec->gpio_data);
62fe78e9 3695
c7d4b2fa
M		 3696 return 0;
3697}
3698
2f2f4251
M		 3699static void stac92xx_free(struct hda_codec *codec)
3700{
c7d4b2fa
M		 3701 struct sigmatel_spec *spec = codec->spec;
3702 int i;
3703
3704 if (! spec)
3705 return;
3706
3707 if (spec->kctl_alloc) {
3708 for (i = 0; i < spec->num_kctl_used; i++)
3709 kfree(spec->kctl_alloc[i].name);
3710 kfree(spec->kctl_alloc);
3711 }
3712
11b44bbd
RF		 3713 if (spec->bios_pin_configs)
3714 kfree(spec->bios_pin_configs);
3715
c7d4b2fa 3716 kfree(spec);
1cd2224c 3717 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3718}
3719
4e55096e
M		 3720static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3721 unsigned int flag)
3722{
3723 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3724 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3725
f9acba43
TI		 3726 if (pin_ctl & AC_PINCTL_IN_EN) {
3727 /*
3728 * we need to check the current set-up direction of
3729 * shared input pins since they can be switched via
3730 * "xxx as Output" mixer switch
3731 */
3732 struct sigmatel_spec *spec = codec->spec;
3733 struct auto_pin_cfg *cfg = &spec->autocfg;
3734 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3735 spec->line_switch) ||
3736 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3737 spec->mic_switch))
3738 return;
3739 }
3740
7b043899
SL		 3741 /* if setting pin direction bits, clear the current
3742 direction bits first */
3743 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3744 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3745
82beb8fd 3746 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3747 AC_VERB_SET_PIN_WIDGET_CONTROL,
3748 pin_ctl | flag);
3749}
3750
3751static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3752 unsigned int flag)
3753{
3754 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3755 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3756 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3757 AC_VERB_SET_PIN_WIDGET_CONTROL,
3758 pin_ctl & ~flag);
3759}
3760
40c1d308 3761static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3762{
3763 if (!nid)
3764 return 0;
3765 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3766 & (1 << 31)) {
3767 unsigned int pinctl;
3768 pinctl = snd_hda_codec_read(codec, nid, 0,
3769 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3770 if (pinctl & AC_PINCTL_IN_EN)
3771 return 0; /* mic- or line-input */
3772 else
3773 return 1; /* HP-output */
3774 }
314634bc
TI		 3775 return 0;
3776}
3777
3778static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3779{
3780 struct sigmatel_spec *spec = codec->spec;
3781 struct auto_pin_cfg *cfg = &spec->autocfg;
7c2ba97b 3782 int nid = cfg->hp_pins[cfg->hp_outs - 1];
4e55096e
M		 3783 int i, presence;
3784
eb06ed8f 3785 presence = 0;
4fe5195c
MR		 3786 if (spec->gpio_mute)
3787 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3788 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3789
eb06ed8f 3790 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3791 if (presence)
3792 break;
7c2ba97b
MR		 3793 if (spec->hp_switch && cfg->hp_pins[i] == nid)
3794 break;
4fe5195c 3795 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3796 }
4e55096e
M		 3797
3798 if (presence) {
3799 /* disable lineouts, enable hp */
7c2ba97b
MR		 3800 if (spec->hp_switch)
3801 stac92xx_reset_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3802 for (i = 0; i < cfg->line_outs; i++)
3803 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3804 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3805 for (i = 0; i < cfg->speaker_outs; i++)
3806 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3807 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3808 if (spec->eapd_mask)
3809 stac_gpio_set(codec, spec->gpio_mask,
3810 spec->gpio_dir, spec->gpio_data &
3811 ~spec->eapd_mask);
4e55096e
M		 3812 } else {
3813 /* enable lineouts, disable hp */
7c2ba97b
MR		 3814 if (spec->hp_switch)
3815 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3816 for (i = 0; i < cfg->line_outs; i++)
3817 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3818 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3819 for (i = 0; i < cfg->speaker_outs; i++)
3820 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3821 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3822 if (spec->eapd_mask)
3823 stac_gpio_set(codec, spec->gpio_mask,
3824 spec->gpio_dir, spec->gpio_data |
3825 spec->eapd_mask);
4e55096e 3826 }
7c2ba97b
MR		 3827 if (!spec->hp_switch && cfg->hp_outs > 1 && presence)
3828 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3829}
3830
a64135a2
MR		 3831static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3832{
3833 struct sigmatel_spec *spec = codec->spec;
3834 hda_nid_t nid = spec->pwr_nids[idx];
3835 int presence, val;
3836 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3837 & 0x000000ff;
3838 presence = get_hp_pin_presence(codec, nid);
d0513fc6
MR		 3839
3840 /* several codecs have two power down bits */
3841 if (spec->pwr_mapping)
3842 idx = spec->pwr_mapping[idx];
3843 else
3844 idx = 1 << idx;
a64135a2
MR		 3845
3846 if (presence)
3847 val &= ~idx;
3848 else
3849 val |= idx;
3850
3851 /* power down unused output ports */
3852 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3853};
3854
314634bc
TI		 3855static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3856{
a64135a2
MR		 3857 struct sigmatel_spec *spec = codec->spec;
3858 int idx = res >> 26 & 0x0f;
3859
72474be6 3860 switch ((res >> 26) & 0x70) {
314634bc
TI		 3861 case STAC_HP_EVENT:
3862 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3863 /* fallthru */
3864 case STAC_PWR_EVENT:
3865 if (spec->num_pwrs > 0)
3866 stac92xx_pin_sense(codec, idx);
72474be6
MR		 3867 break;
3868 case STAC_VREF_EVENT: {
3869 int data = snd_hda_codec_read(codec, codec->afg, 0,
3870 AC_VERB_GET_GPIO_DATA, 0);
3871 /* toggle VREF state based on GPIOx status */
3872 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
3873 !!(data & (1 << idx)));
3874 break;
3875 }
314634bc
TI		 3876 }
3877}
3878
cb53c626 3879#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3880static int stac92xx_resume(struct hda_codec *codec)
3881{
dc81bed1
TI		 3882 struct sigmatel_spec *spec = codec->spec;
3883
11b44bbd 3884 stac92xx_set_config_regs(codec);
dc81bed1 3885 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3886 stac_gpio_set(codec, spec->gpio_mask,
3887 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3888 snd_hda_codec_resume_amp(codec);
3889 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3890 /* power down inactive DACs */
3891 if (spec->dac_list)
3892 stac92xx_power_down(codec);
dc81bed1
TI		 3893 /* invoke unsolicited event to reset the HP state */
3894 if (spec->hp_detect)
3895 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3896 return 0;
3897}
3898#endif
3899
2f2f4251
M		 3900static struct hda_codec_ops stac92xx_patch_ops = {
3901 .build_controls = stac92xx_build_controls,
3902 .build_pcms = stac92xx_build_pcms,
3903 .init = stac92xx_init,
3904 .free = stac92xx_free,
4e55096e 3905 .unsol_event = stac92xx_unsol_event,
cb53c626 3906#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3907 .resume = stac92xx_resume,
3908#endif
2f2f4251
M		 3909};
3910
3911static int patch_stac9200(struct hda_codec *codec)
3912{
3913 struct sigmatel_spec *spec;
c7d4b2fa 3914 int err;
2f2f4251 3915
e560d8d8 3916 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3917 if (spec == NULL)
3918 return -ENOMEM;
3919
3920 codec->spec = spec;
a4eed138 3921 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3922 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3923 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3924 stac9200_models,
3925 stac9200_cfg_tbl);
11b44bbd
RF		 3926 if (spec->board_config < 0) {
3927 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3928 err = stac92xx_save_bios_config_regs(codec);
3929 if (err < 0) {
3930 stac92xx_free(codec);
3931 return err;
3932 }
3933 spec->pin_configs = spec->bios_pin_configs;
3934 } else {
403d1944
MP		 3935 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3936 stac92xx_set_config_regs(codec);
3937 }
2f2f4251
M		 3938
3939 spec->multiout.max_channels = 2;
3940 spec->multiout.num_dacs = 1;
3941 spec->multiout.dac_nids = stac9200_dac_nids;
3942 spec->adc_nids = stac9200_adc_nids;
3943 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3944 spec->num_muxes = 1;
8b65727b 3945 spec->num_dmics = 0;
9e05b7a3 3946 spec->num_adcs = 1;
a64135a2 3947 spec->num_pwrs = 0;
c7d4b2fa 3948
bf277785
TD		 3949 if (spec->board_config == STAC_9200_GATEWAY ||
3950 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3951 spec->init = stac9200_eapd_init;
3952 else
3953 spec->init = stac9200_core_init;
2f2f4251 3954 spec->mixer = stac9200_mixer;
c7d4b2fa 3955
117f257d
TI		 3956 if (spec->board_config == STAC_9200_PANASONIC) {
3957 spec->gpio_mask = spec->gpio_dir = 0x09;
3958 spec->gpio_data = 0x00;
3959 }
3960
c7d4b2fa
M		 3961 err = stac9200_parse_auto_config(codec);
3962 if (err < 0) {
3963 stac92xx_free(codec);
3964 return err;
3965 }
2f2f4251
M		 3966
3967 codec->patch_ops = stac92xx_patch_ops;
3968
3969 return 0;
3970}
3971
8e21c34c
TD		 3972static int patch_stac925x(struct hda_codec *codec)
3973{
3974 struct sigmatel_spec *spec;
3975 int err;
3976
3977 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3978 if (spec == NULL)
3979 return -ENOMEM;
3980
3981 codec->spec = spec;
a4eed138 3982 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3983 spec->pin_nids = stac925x_pin_nids;
3984 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3985 stac925x_models,
3986 stac925x_cfg_tbl);
9e507abd 3987 again:
8e21c34c 3988 if (spec->board_config < 0) {
2c11f955
TD		 3989 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3990 "using BIOS defaults\n");
8e21c34c
TD		 3991 err = stac92xx_save_bios_config_regs(codec);
3992 if (err < 0) {
3993 stac92xx_free(codec);
3994 return err;
3995 }
3996 spec->pin_configs = spec->bios_pin_configs;
3997 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3998 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3999 stac92xx_set_config_regs(codec);
4000 }
4001
4002 spec->multiout.max_channels = 2;
4003 spec->multiout.num_dacs = 1;
4004 spec->multiout.dac_nids = stac925x_dac_nids;
4005 spec->adc_nids = stac925x_adc_nids;
4006 spec->mux_nids = stac925x_mux_nids;
4007 spec->num_muxes = 1;
9e05b7a3 4008 spec->num_adcs = 1;
a64135a2 4009 spec->num_pwrs = 0;
2c11f955
TD		 4010 switch (codec->vendor_id) {
4011 case 0x83847632: /* STAC9202 */
4012 case 0x83847633: /* STAC9202D */
4013 case 0x83847636: /* STAC9251 */
4014 case 0x83847637: /* STAC9251D */
f6e9852a 4015 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4016 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4017 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4018 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4019 break;
4020 default:
4021 spec->num_dmics = 0;
4022 break;
4023 }
8e21c34c
TD		 4024
4025 spec->init = stac925x_core_init;
4026 spec->mixer = stac925x_mixer;
4027
4028 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4029 if (!err) {
4030 if (spec->board_config < 0) {
4031 printk(KERN_WARNING "hda_codec: No auto-config is "
4032 "available, default to model=ref\n");
4033 spec->board_config = STAC_925x_REF;
4034 goto again;
4035 }
4036 err = -EINVAL;
4037 }
8e21c34c
TD		 4038 if (err < 0) {
4039 stac92xx_free(codec);
4040 return err;
4041 }
4042
4043 codec->patch_ops = stac92xx_patch_ops;
4044
4045 return 0;
4046}
4047
e1f0d669
MR		 4048static struct hda_input_mux stac92hd73xx_dmux = {
4049 .num_items = 4,
4050 .items = {
4051 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4052 { "Digital Mic 1", 0x09 },
4053 { "Digital Mic 2", 0x0a },
2a9c7816 4054 { "CD", 0x08 },
e1f0d669
MR		 4055 }
4056};
4057
4058static int patch_stac92hd73xx(struct hda_codec *codec)
4059{
4060 struct sigmatel_spec *spec;
4061 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4062 int err = 0;
4063
4064 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4065 if (spec == NULL)
4066 return -ENOMEM;
4067
4068 codec->spec = spec;
e99d32b3 4069 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4070 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4071 spec->pin_nids = stac92hd73xx_pin_nids;
4072 spec->board_config = snd_hda_check_board_config(codec,
4073 STAC_92HD73XX_MODELS,
4074 stac92hd73xx_models,
4075 stac92hd73xx_cfg_tbl);
4076again:
4077 if (spec->board_config < 0) {
4078 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4079 " STAC92HD73XX, using BIOS defaults\n");
4080 err = stac92xx_save_bios_config_regs(codec);
4081 if (err < 0) {
4082 stac92xx_free(codec);
4083 return err;
4084 }
4085 spec->pin_configs = spec->bios_pin_configs;
4086 } else {
4087 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
4088 stac92xx_set_config_regs(codec);
4089 }
4090
4091 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4092 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4093
4094 if (spec->multiout.num_dacs < 0) {
4095 printk(KERN_WARNING "hda_codec: Could not determine "
4096 "number of channels defaulting to DAC count\n");
4097 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4098 }
4099
4100 switch (spec->multiout.num_dacs) {
4101 case 0x3: /* 6 Channel */
4102 spec->mixer = stac92hd73xx_6ch_mixer;
4103 spec->init = stac92hd73xx_6ch_core_init;
4104 break;
4105 case 0x4: /* 8 Channel */
e1f0d669
MR		 4106 spec->mixer = stac92hd73xx_8ch_mixer;
4107 spec->init = stac92hd73xx_8ch_core_init;
4108 break;
4109 case 0x5: /* 10 Channel */
e1f0d669
MR		 4110 spec->mixer = stac92hd73xx_10ch_mixer;
4111 spec->init = stac92hd73xx_10ch_core_init;
4112 };
4113
4114 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4115 spec->aloopback_mask = 0x01;
4116 spec->aloopback_shift = 8;
4117
1cd2224c 4118 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4119 spec->mux_nids = stac92hd73xx_mux_nids;
4120 spec->adc_nids = stac92hd73xx_adc_nids;
4121 spec->dmic_nids = stac92hd73xx_dmic_nids;
4122 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4123 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4124 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4125 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4126
4127 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4128 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4129 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4130 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4131 sizeof(stac92hd73xx_dmux));
4132
a7662640
MR		 4133 switch (spec->board_config) {
4134 case STAC_DELL_M6:
d654a660 4135 spec->init = dell_eq_core_init;
2a9c7816 4136 spec->num_smuxes = 0;
2a9c7816
MR		 4137 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4138 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
4139 spec->num_amps = 1;
a7662640
MR		 4140 switch (codec->subsystem_id) {
4141 case 0x1028025e: /* Analog Mics */
4142 case 0x1028025f:
4143 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4144 spec->num_dmics = 0;
2a9c7816 4145 spec->private_dimux.num_items = 1;
a7662640 4146 break;
d654a660 4147 case 0x10280271: /* Digital Mics */
a7662640 4148 case 0x10280272:
d654a660
MR		 4149 spec->init = dell_m6_core_init;
4150 /* fall-through */
4151 case 0x10280254:
4152 case 0x10280255:
a7662640
MR		 4153 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4154 spec->num_dmics = 1;
2a9c7816 4155 spec->private_dimux.num_items = 2;
a7662640
MR		 4156 break;
4157 case 0x10280256: /* Both */
4158 case 0x10280057:
4159 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4160 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4161 spec->num_dmics = 1;
2a9c7816 4162 spec->private_dimux.num_items = 2;
a7662640
MR		 4163 break;
4164 }
4165 break;
4166 default:
4167 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4168 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
a7662640 4169 }
b2c4f4d7
MR		 4170 if (spec->board_config > STAC_92HD73XX_REF) {
4171 /* GPIO0 High = Enable EAPD */
4172 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4173 spec->gpio_data = 0x01;
4174 }
2a9c7816 4175 spec->dinput_mux = &spec->private_dimux;
a7662640 4176
a64135a2
MR		 4177 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4178 spec->pwr_nids = stac92hd73xx_pwr_nids;
4179
d9737751 4180 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4181
4182 if (!err) {
4183 if (spec->board_config < 0) {
4184 printk(KERN_WARNING "hda_codec: No auto-config is "
4185 "available, default to model=ref\n");
4186 spec->board_config = STAC_92HD73XX_REF;
4187 goto again;
4188 }
4189 err = -EINVAL;
4190 }
4191
4192 if (err < 0) {
4193 stac92xx_free(codec);
4194 return err;
4195 }
4196
4197 codec->patch_ops = stac92xx_patch_ops;
4198
4199 return 0;
4200}
4201
d0513fc6
MR		 4202static struct hda_input_mux stac92hd83xxx_dmux = {
4203 .num_items = 3,
4204 .items = {
4205 { "Analog Inputs", 0x03 },
4206 { "Digital Mic 1", 0x04 },
4207 { "Digital Mic 2", 0x05 },
4208 }
4209};
4210
4211static int patch_stac92hd83xxx(struct hda_codec *codec)
4212{
4213 struct sigmatel_spec *spec;
4214 int err;
4215
4216 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4217 if (spec == NULL)
4218 return -ENOMEM;
4219
4220 codec->spec = spec;
0ffa9807 4221 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4222 spec->mono_nid = 0x19;
4223 spec->digbeep_nid = 0x21;
4224 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4225 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4226 spec->adc_nids = stac92hd83xxx_adc_nids;
4227 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4228 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4229 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4230 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4231
4232 spec->init = stac92hd83xxx_core_init;
4233 switch (codec->vendor_id) {
4234 case 0x111d7605:
4235 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4236 break;
4237 default:
4238 spec->num_pwrs--;
4239 spec->init++; /* switch to config #2 */
4240 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4241 }
4242
4243 spec->mixer = stac92hd83xxx_mixer;
4244 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4245 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4246 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4247 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4248 spec->dinput_mux = &stac92hd83xxx_dmux;
4249 spec->pin_nids = stac92hd83xxx_pin_nids;
4250 spec->board_config = snd_hda_check_board_config(codec,
4251 STAC_92HD83XXX_MODELS,
4252 stac92hd83xxx_models,
4253 stac92hd83xxx_cfg_tbl);
4254again:
4255 if (spec->board_config < 0) {
4256 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4257 " STAC92HD83XXX, using BIOS defaults\n");
4258 err = stac92xx_save_bios_config_regs(codec);
4259 if (err < 0) {
4260 stac92xx_free(codec);
4261 return err;
4262 }
4263 spec->pin_configs = spec->bios_pin_configs;
4264 } else {
4265 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
4266 stac92xx_set_config_regs(codec);
4267 }
4268
4269 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4270 if (!err) {
4271 if (spec->board_config < 0) {
4272 printk(KERN_WARNING "hda_codec: No auto-config is "
4273 "available, default to model=ref\n");
4274 spec->board_config = STAC_92HD83XXX_REF;
4275 goto again;
4276 }
4277 err = -EINVAL;
4278 }
4279
4280 if (err < 0) {
4281 stac92xx_free(codec);
4282 return err;
4283 }
4284
4285 codec->patch_ops = stac92xx_patch_ops;
4286
4287 return 0;
4288}
4289
8daaaa97
MR		 4290#ifdef SND_HDA_NEEDS_RESUME
4291static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4292{
4293 struct sigmatel_spec *spec = codec->spec;
4294 int i;
4295 snd_hda_codec_write_cache(codec, codec->afg, 0,
4296 AC_VERB_SET_POWER_STATE, pwr);
4297
4298 msleep(1);
4299 for (i = 0; i < spec->num_adcs; i++) {
4300 snd_hda_codec_write_cache(codec,
4301 spec->adc_nids[i], 0,
4302 AC_VERB_SET_POWER_STATE, pwr);
4303 }
4304};
4305
4306static int stac92hd71xx_resume(struct hda_codec *codec)
4307{
4308 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4309 return stac92xx_resume(codec);
4310}
4311
4312static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4313{
4314 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
4315 return 0;
4316};
4317
4318#endif
4319
4320static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4321 .build_controls = stac92xx_build_controls,
4322 .build_pcms = stac92xx_build_pcms,
4323 .init = stac92xx_init,
4324 .free = stac92xx_free,
4325 .unsol_event = stac92xx_unsol_event,
4326#ifdef SND_HDA_NEEDS_RESUME
4327 .resume = stac92hd71xx_resume,
4328 .suspend = stac92hd71xx_suspend,
4329#endif
4330};
d0513fc6 4331
4b33c767
MR		 4332static struct hda_input_mux stac92hd71bxx_dmux = {
4333 .num_items = 4,
4334 .items = {
4335 { "Analog Inputs", 0x00 },
4336 { "Mixer", 0x01 },
4337 { "Digital Mic 1", 0x02 },
4338 { "Digital Mic 2", 0x03 },
4339 }
4340};
4341
e035b841
MR		 4342static int patch_stac92hd71bxx(struct hda_codec *codec)
4343{
4344 struct sigmatel_spec *spec;
4345 int err = 0;
4346
4347 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4348 if (spec == NULL)
4349 return -ENOMEM;
4350
4351 codec->spec = spec;
8daaaa97 4352 codec->patch_ops = stac92xx_patch_ops;
e035b841 4353 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4354 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4355 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4356 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4357 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4358 spec->board_config = snd_hda_check_board_config(codec,
4359 STAC_92HD71BXX_MODELS,
4360 stac92hd71bxx_models,
4361 stac92hd71bxx_cfg_tbl);
4362again:
4363 if (spec->board_config < 0) {
4364 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4365 " STAC92HD71BXX, using BIOS defaults\n");
4366 err = stac92xx_save_bios_config_regs(codec);
4367 if (err < 0) {
4368 stac92xx_free(codec);
4369 return err;
4370 }
4371 spec->pin_configs = spec->bios_pin_configs;
4372 } else {
4373 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
4374 stac92xx_set_config_regs(codec);
4375 }
4376
541eee87
MR		 4377 switch (codec->vendor_id) {
4378 case 0x111d76b6: /* 4 Port without Analog Mixer */
4379 case 0x111d76b7:
4380 case 0x111d76b4: /* 6 Port without Analog Mixer */
4381 case 0x111d76b5:
4382 spec->mixer = stac92hd71bxx_mixer;
4383 spec->init = stac92hd71bxx_core_init;
0ffa9807 4384 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4385 break;
aafc4412 4386 case 0x111d7608: /* 5 Port with Analog Mixer */
72474be6
MR		 4387 switch (codec->subsystem_id) {
4388 case 0x103c361a:
4389 /* Enable VREF power saving on GPIO1 detect */
4390 snd_hda_codec_write(codec, codec->afg, 0,
4391 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4392 snd_hda_codec_write_cache(codec, codec->afg, 0,
4393 AC_VERB_SET_UNSOLICITED_ENABLE,
4394 (AC_USRSP_EN | STAC_VREF_EVENT | 0x01));
4395 spec->gpio_mask |= 0x02;
4396 break;
4397 }
8daaaa97
MR		 4398 if ((codec->revision_id & 0xf) == 0 ||
4399 (codec->revision_id & 0xf) == 1) {
4400#ifdef SND_HDA_NEEDS_RESUME
4401 codec->patch_ops = stac92hd71bxx_patch_ops;
4402#endif
4403 spec->stream_delay = 40; /* 40 milliseconds */
4404 }
4405
aafc4412
MR		 4406 /* no output amps */
4407 spec->num_pwrs = 0;
4408 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4409 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4410
4411 /* disable VSW */
4412 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
4413 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
4414 break;
4415 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4416 if ((codec->revision_id & 0xf) == 1) {
4417#ifdef SND_HDA_NEEDS_RESUME
4418 codec->patch_ops = stac92hd71bxx_patch_ops;
4419#endif
4420 spec->stream_delay = 40; /* 40 milliseconds */
4421 }
4422
aafc4412
MR		 4423 /* no output amps */
4424 spec->num_pwrs = 0;
4425 /* fallthru */
541eee87 4426 default:
4b33c767 4427 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4428 spec->mixer = stac92hd71bxx_analog_mixer;
4429 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4430 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4431 }
4432
4b33c767 4433 spec->aloopback_mask = 0x50;
541eee87
MR		 4434 spec->aloopback_shift = 0;
4435
b2c4f4d7
MR		 4436 if (spec->board_config > STAC_92HD71BXX_REF) {
4437 /* GPIO0 = EAPD */
4438 spec->gpio_mask = 0x01;
4439 spec->gpio_dir = 0x01;
4440 spec->gpio_data = 0x01;
4441 }
e035b841 4442
8daaaa97 4443 spec->powerdown_adcs = 1;
1cd2224c 4444 spec->digbeep_nid = 0x26;
e035b841
MR		 4445 spec->mux_nids = stac92hd71bxx_mux_nids;
4446 spec->adc_nids = stac92hd71bxx_adc_nids;
4447 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4448 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4449 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4450 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4451
4452 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4453 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4454
6a14f585
MR		 4455 switch (spec->board_config) {
4456 case STAC_HP_M4:
4457 spec->num_dmics = 0;
b9aea715 4458 spec->num_smuxes = 0;
6a14f585
MR		 4459 spec->num_dmuxes = 0;
4460
4461 /* enable internal microphone */
b9aea715
MR		 4462 stac92xx_set_config_reg(codec, 0x0e, 0x01813040);
4463 stac92xx_auto_set_pinctl(codec, 0x0e,
4464 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
6a14f585
MR		 4465 break;
4466 default:
4467 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4468 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4469 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4470 };
4471
aea7bb0a 4472 spec->multiout.num_dacs = 1;
e035b841
MR		 4473 spec->multiout.hp_nid = 0x11;
4474 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4b33c767
MR		 4475 if (spec->dinput_mux)
4476 spec->private_dimux.num_items +=
4477 spec->num_dmics -
4478 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4479
4480 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4481 if (!err) {
4482 if (spec->board_config < 0) {
4483 printk(KERN_WARNING "hda_codec: No auto-config is "
4484 "available, default to model=ref\n");
4485 spec->board_config = STAC_92HD71BXX_REF;
4486 goto again;
4487 }
4488 err = -EINVAL;
4489 }
4490
4491 if (err < 0) {
4492 stac92xx_free(codec);
4493 return err;
4494 }
4495
e035b841
MR		 4496 return 0;
4497};
4498
2f2f4251
M		 4499static int patch_stac922x(struct hda_codec *codec)
4500{
4501 struct sigmatel_spec *spec;
c7d4b2fa 4502 int err;
2f2f4251 4503
e560d8d8 4504 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4505 if (spec == NULL)
4506 return -ENOMEM;
4507
4508 codec->spec = spec;
a4eed138 4509 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4510 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4511 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4512 stac922x_models,
4513 stac922x_cfg_tbl);
536319af 4514 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4515 spec->gpio_mask = spec->gpio_dir = 0x03;
4516 spec->gpio_data = 0x03;
3fc24d85
TI		 4517 /* Intel Macs have all same PCI SSID, so we need to check
4518 * codec SSID to distinguish the exact models
4519 */
6f0778d8 4520 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4521 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4522
4523 case 0x106b0800:
4524 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4525 break;
5d5d3bc3
IZ		 4526 case 0x106b0600:
4527 case 0x106b0700:
4528 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4529 break;
5d5d3bc3
IZ		 4530 case 0x106b0e00:
4531 case 0x106b0f00:
4532 case 0x106b1600:
4533 case 0x106b1700:
4534 case 0x106b0200:
4535 case 0x106b1e00:
4536 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4537 break;
5d5d3bc3
IZ		 4538 case 0x106b1a00:
4539 case 0x00000100:
4540 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4541 break;
5d5d3bc3
IZ		 4542 case 0x106b0a00:
4543 case 0x106b2200:
4544 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4545 break;
536319af
NB		 4546 default:
4547 spec->board_config = STAC_INTEL_MAC_V3;
4548 break;
3fc24d85
TI		 4549 }
4550 }
4551
9e507abd 4552 again:
11b44bbd
RF		 4553 if (spec->board_config < 0) {
4554 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4555 "using BIOS defaults\n");
4556 err = stac92xx_save_bios_config_regs(codec);
4557 if (err < 0) {
4558 stac92xx_free(codec);
4559 return err;
4560 }
4561 spec->pin_configs = spec->bios_pin_configs;
4562 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4563 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4564 stac92xx_set_config_regs(codec);
4565 }
2f2f4251 4566
c7d4b2fa
M		 4567 spec->adc_nids = stac922x_adc_nids;
4568 spec->mux_nids = stac922x_mux_nids;
2549413e 4569 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4570 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4571 spec->num_dmics = 0;
a64135a2 4572 spec->num_pwrs = 0;
c7d4b2fa
M		 4573
4574 spec->init = stac922x_core_init;
2f2f4251 4575 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4576
4577 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4578
3cc08dc6 4579 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4580 if (!err) {
4581 if (spec->board_config < 0) {
4582 printk(KERN_WARNING "hda_codec: No auto-config is "
4583 "available, default to model=ref\n");
4584 spec->board_config = STAC_D945_REF;
4585 goto again;
4586 }
4587 err = -EINVAL;
4588 }
3cc08dc6
MP		 4589 if (err < 0) {
4590 stac92xx_free(codec);
4591 return err;
4592 }
4593
4594 codec->patch_ops = stac92xx_patch_ops;
4595
807a4636
TI		 4596 /* Fix Mux capture level; max to 2 */
4597 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4598 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4599 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4600 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4601 (0 << AC_AMPCAP_MUTE_SHIFT));
4602
3cc08dc6
MP		 4603 return 0;
4604}
4605
4606static int patch_stac927x(struct hda_codec *codec)
4607{
4608 struct sigmatel_spec *spec;
4609 int err;
4610
4611 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4612 if (spec == NULL)
4613 return -ENOMEM;
4614
4615 codec->spec = spec;
a4eed138 4616 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4617 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4618 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4619 stac927x_models,
4620 stac927x_cfg_tbl);
9e507abd 4621 again:
8e9068b1
MR		 4622 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4623 if (spec->board_config < 0)
4624 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4625 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4626 err = stac92xx_save_bios_config_regs(codec);
4627 if (err < 0) {
4628 stac92xx_free(codec);
4629 return err;
4630 }
4631 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4632 } else {
3cc08dc6
MP		 4633 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4634 stac92xx_set_config_regs(codec);
4635 }
4636
1cd2224c 4637 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4638 spec->adc_nids = stac927x_adc_nids;
4639 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4640 spec->mux_nids = stac927x_mux_nids;
4641 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4642 spec->smux_nids = stac927x_smux_nids;
4643 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 4644 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 4645 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4646 spec->multiout.dac_nids = spec->dac_nids;
4647
81d3dbde 4648 switch (spec->board_config) {
93ed1503 4649 case STAC_D965_3ST:
93ed1503 4650 case STAC_D965_5ST:
8e9068b1 4651 /* GPIO0 High = Enable EAPD */
0fc9dec4 4652 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4653 spec->gpio_data = 0x01;
8e9068b1
MR		 4654 spec->num_dmics = 0;
4655
93ed1503 4656 spec->init = d965_core_init;
9e05b7a3 4657 spec->mixer = stac927x_mixer;
81d3dbde 4658 break;
8e9068b1 4659 case STAC_DELL_BIOS:
780c8be4
MR		 4660 switch (codec->subsystem_id) {
4661 case 0x10280209:
4662 case 0x1028022e:
4663 /* correct the device field to SPDIF out */
4664 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4665 break;
4666 };
03d7ca17
MR		 4667 /* configure the analog microphone on some laptops */
4668 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4669 /* correct the front output jack as a hp out */
7989fba9 4670 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4671 /* correct the front input jack as a mic */
4672 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4673 /* fallthru */
8e9068b1
MR		 4674 case STAC_DELL_3ST:
4675 /* GPIO2 High = Enable EAPD */
0fc9dec4 4676 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4677 spec->gpio_data = 0x04;
7f16859a
MR		 4678 spec->dmic_nids = stac927x_dmic_nids;
4679 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4680
8e9068b1
MR		 4681 spec->init = d965_core_init;
4682 spec->mixer = stac927x_mixer;
4683 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4684 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4685 break;
4686 default:
b2c4f4d7
MR		 4687 if (spec->board_config > STAC_D965_REF) {
4688 /* GPIO0 High = Enable EAPD */
4689 spec->eapd_mask = spec->gpio_mask = 0x01;
4690 spec->gpio_dir = spec->gpio_data = 0x01;
4691 }
8e9068b1
MR		 4692 spec->num_dmics = 0;
4693
4694 spec->init = stac927x_core_init;
4695 spec->mixer = stac927x_mixer;
7f16859a
MR		 4696 }
4697
a64135a2 4698 spec->num_pwrs = 0;
e1f0d669
MR		 4699 spec->aloopback_mask = 0x40;
4700 spec->aloopback_shift = 0;
8e9068b1 4701
3cc08dc6 4702 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4703 if (!err) {
4704 if (spec->board_config < 0) {
4705 printk(KERN_WARNING "hda_codec: No auto-config is "
4706 "available, default to model=ref\n");
4707 spec->board_config = STAC_D965_REF;
4708 goto again;
4709 }
4710 err = -EINVAL;
4711 }
c7d4b2fa
M		 4712 if (err < 0) {
4713 stac92xx_free(codec);
4714 return err;
4715 }
2f2f4251
M		 4716
4717 codec->patch_ops = stac92xx_patch_ops;
4718
52987656
TI		 4719 /*
4720 * !!FIXME!!
4721 * The STAC927x seem to require fairly long delays for certain
4722 * command sequences. With too short delays (even if the answer
4723 * is set to RIRB properly), it results in the silence output
4724 * on some hardwares like Dell.
4725 *
4726 * The below flag enables the longer delay (see get_response
4727 * in hda_intel.c).
4728 */
4729 codec->bus->needs_damn_long_delay = 1;
4730
2f2f4251
M		 4731 return 0;
4732}
4733
f3302a59
MP		 4734static int patch_stac9205(struct hda_codec *codec)
4735{
4736 struct sigmatel_spec *spec;
8259980e 4737 int err;
f3302a59
MP		 4738
4739 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4740 if (spec == NULL)
4741 return -ENOMEM;
4742
4743 codec->spec = spec;
a4eed138 4744 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4745 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4746 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4747 stac9205_models,
4748 stac9205_cfg_tbl);
9e507abd 4749 again:
11b44bbd
RF		 4750 if (spec->board_config < 0) {
4751 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4752 err = stac92xx_save_bios_config_regs(codec);
4753 if (err < 0) {
4754 stac92xx_free(codec);
4755 return err;
4756 }
4757 spec->pin_configs = spec->bios_pin_configs;
4758 } else {
f3302a59
MP		 4759 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4760 stac92xx_set_config_regs(codec);
4761 }
4762
1cd2224c 4763 spec->digbeep_nid = 0x23;
f3302a59 4764 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4765 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4766 spec->mux_nids = stac9205_mux_nids;
2549413e 4767 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 4768 spec->smux_nids = stac9205_smux_nids;
4769 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 4770 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4771 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4772 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4773 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4774 spec->num_pwrs = 0;
f3302a59
MP		 4775
4776 spec->init = stac9205_core_init;
4777 spec->mixer = stac9205_mixer;
4778
e1f0d669
MR		 4779 spec->aloopback_mask = 0x40;
4780 spec->aloopback_shift = 0;
f3302a59 4781 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4782
ae0a8ed8 4783 switch (spec->board_config){
ae0a8ed8 4784 case STAC_9205_DELL_M43:
87d48363
MR		 4785 /* Enable SPDIF in/out */
4786 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4787 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4788
4fe5195c
MR		 4789 /* Enable unsol response for GPIO4/Dock HP connection */
4790 snd_hda_codec_write(codec, codec->afg, 0,
4791 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4792 snd_hda_codec_write_cache(codec, codec->afg, 0,
4793 AC_VERB_SET_UNSOLICITED_ENABLE,
4794 (AC_USRSP_EN | STAC_HP_EVENT));
4795
4796 spec->gpio_dir = 0x0b;
0fc9dec4 4797 spec->eapd_mask = 0x01;
4fe5195c
MR		 4798 spec->gpio_mask = 0x1b;
4799 spec->gpio_mute = 0x10;
e2e7d624 4800 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4801 * GPIO3 Low = DRM
87d48363 4802 */
4fe5195c 4803 spec->gpio_data = 0x01;
ae0a8ed8 4804 break;
b2c4f4d7
MR		 4805 case STAC_9205_REF:
4806 /* SPDIF-In enabled */
4807 break;
ae0a8ed8
TD		 4808 default:
4809 /* GPIO0 High = EAPD */
0fc9dec4 4810 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4811 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4812 break;
4813 }
33382403 4814
f3302a59 4815 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 4816 if (!err) {
4817 if (spec->board_config < 0) {
4818 printk(KERN_WARNING "hda_codec: No auto-config is "
4819 "available, default to model=ref\n");
4820 spec->board_config = STAC_9205_REF;
4821 goto again;
4822 }
4823 err = -EINVAL;
4824 }
f3302a59
MP		 4825 if (err < 0) {
4826 stac92xx_free(codec);
4827 return err;
4828 }
4829
4830 codec->patch_ops = stac92xx_patch_ops;
4831
4832 return 0;
4833}
4834
db064e50 4835/*
6d859065 4836 * STAC9872 hack
db064e50
TI		 4837 */
4838
99ccc560 4839/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 4840static hda_nid_t vaio_dacs[] = { 0x2 };
4841#define VAIO_HP_DAC 0x5
4842static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
4843static hda_nid_t vaio_mux_nids[] = { 0x15 };
4844
4845static struct hda_input_mux vaio_mux = {
a3a2f429 4846 .num_items = 3,
db064e50 4847 .items = {
d773781c 4848 /* { "HP", 0x0 }, */
1624cb9a
TI		 4849 { "Mic Jack", 0x1 },
4850 { "Internal Mic", 0x2 },
db064e50
TI		 4851 { "PCM", 0x3 },
4852 }
4853};
4854
4855static struct hda_verb vaio_init[] = {
4856 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 4857 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 4858 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4859 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4860 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4861 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4862 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 4863 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4864 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4865 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4866 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4867 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4868 {}
4869};
4870
6d859065
GM		 4871static struct hda_verb vaio_ar_init[] = {
4872 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
4873 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4874 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4875 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4876/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
4877 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4878 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4879 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4880 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4881/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
4882 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4883 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4884 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4885 {}
4886};
4887
db064e50 4888/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4889static struct hda_bind_ctls vaio_bind_master_vol = {
4890 .ops = &snd_hda_bind_vol,
4891 .values = {
4892 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4893 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4894 0
4895 },
4896};
db064e50
TI		 4897
4898/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4899static struct hda_bind_ctls vaio_bind_master_sw = {
4900 .ops = &snd_hda_bind_sw,
4901 .values = {
4902 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4903 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4904 0,
4905 },
4906};
db064e50
TI		 4907
4908static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 4909 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4910 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 4911 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4912 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4913 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4914 {
4915 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4916 .name = "Capture Source",
4917 .count = 1,
4918 .info = stac92xx_mux_enum_info,
4919 .get = stac92xx_mux_enum_get,
4920 .put = stac92xx_mux_enum_put,
4921 },
4922 {}
4923};
4924
6d859065 4925static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 4926 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4927 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 4928 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4929 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4930 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4931 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
4932 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
4933 {
4934 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4935 .name = "Capture Source",
4936 .count = 1,
4937 .info = stac92xx_mux_enum_info,
4938 .get = stac92xx_mux_enum_get,
4939 .put = stac92xx_mux_enum_put,
4940 },
4941 {}
4942};
4943
4944static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4945 .build_controls = stac92xx_build_controls,
4946 .build_pcms = stac92xx_build_pcms,
4947 .init = stac92xx_init,
4948 .free = stac92xx_free,
cb53c626 4949#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4950 .resume = stac92xx_resume,
4951#endif
4952};
4953
72e7b0dd
TI		 4954static int stac9872_vaio_init(struct hda_codec *codec)
4955{
4956 int err;
4957
4958 err = stac92xx_init(codec);
4959 if (err < 0)
4960 return err;
4961 if (codec->patch_ops.unsol_event)
4962 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4963 return 0;
4964}
4965
4966static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4967{
40c1d308 4968 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4969 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4970 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4971 } else {
4972 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4973 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4974 }
4975}
4976
4977static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4978{
4979 switch (res >> 26) {
4980 case STAC_HP_EVENT:
4981 stac9872_vaio_hp_detect(codec, res);
4982 break;
4983 }
4984}
4985
4986static struct hda_codec_ops stac9872_vaio_patch_ops = {
4987 .build_controls = stac92xx_build_controls,
4988 .build_pcms = stac92xx_build_pcms,
4989 .init = stac9872_vaio_init,
4990 .free = stac92xx_free,
4991 .unsol_event = stac9872_vaio_unsol_event,
4992#ifdef CONFIG_PM
4993 .resume = stac92xx_resume,
4994#endif
4995};
4996
6d859065
GM		 4997enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4998 CXD9872RD_VAIO,
4999 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5000 STAC9872AK_VAIO,
5001 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5002 STAC9872K_VAIO,
5003 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5004 CXD9872AKD_VAIO,
5005 STAC_9872_MODELS,
5006};
5007
5008static const char *stac9872_models[STAC_9872_MODELS] = {
5009 [CXD9872RD_VAIO] = "vaio",
5010 [CXD9872AKD_VAIO] = "vaio-ar",
5011};
5012
5013static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5014 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5015 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5016 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5017 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5018 {}
5019};
5020
6d859065 5021static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5022{
5023 struct sigmatel_spec *spec;
5024 int board_config;
5025
f5fcc13c
TI		 5026 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5027 stac9872_models,
5028 stac9872_cfg_tbl);
db064e50
TI		 5029 if (board_config < 0)
5030 /* unknown config, let generic-parser do its job... */
5031 return snd_hda_parse_generic_codec(codec);
5032
5033 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5034 if (spec == NULL)
5035 return -ENOMEM;
5036
5037 codec->spec = spec;
5038 switch (board_config) {
6d859065
GM		 5039 case CXD9872RD_VAIO:
5040 case STAC9872AK_VAIO:
5041 case STAC9872K_VAIO:
db064e50
TI		 5042 spec->mixer = vaio_mixer;
5043 spec->init = vaio_init;
5044 spec->multiout.max_channels = 2;
5045 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5046 spec->multiout.dac_nids = vaio_dacs;
5047 spec->multiout.hp_nid = VAIO_HP_DAC;
5048 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5049 spec->adc_nids = vaio_adcs;
a64135a2 5050 spec->num_pwrs = 0;
db064e50
TI		 5051 spec->input_mux = &vaio_mux;
5052 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5053 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5054 break;
6d859065
GM		 5055
5056 case CXD9872AKD_VAIO:
5057 spec->mixer = vaio_ar_mixer;
5058 spec->init = vaio_ar_init;
5059 spec->multiout.max_channels = 2;
5060 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5061 spec->multiout.dac_nids = vaio_dacs;
5062 spec->multiout.hp_nid = VAIO_HP_DAC;
5063 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5064 spec->num_pwrs = 0;
6d859065
GM		 5065 spec->adc_nids = vaio_adcs;
5066 spec->input_mux = &vaio_mux;
5067 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5068 codec->patch_ops = stac9872_patch_ops;
6d859065 5069 break;
db064e50
TI		 5070 }
5071
db064e50
TI		 5072 return 0;
5073}
5074
5075
2f2f4251
M		 5076/*
5077 * patch entries
5078 */
5079struct hda_codec_preset snd_hda_preset_sigmatel[] = {
5080 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5081 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5082 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5083 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5084 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5085 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5086 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5087 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5088 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5089 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5090 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5091 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5092 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5093 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5094 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5095 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5096 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5097 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5098 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5099 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5100 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5101 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5102 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5103 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5104 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5105 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5106 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5107 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5108 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5109 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5110 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5111 /* The following does not take into account .id=0x83847661 when subsys =
5112 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5113 * currently not fully supported.
5114 */
5115 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5116 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5117 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5118 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5119 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5120 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5121 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5122 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5123 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5124 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5125 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5126 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5127 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5128 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5129 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5130 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5131 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5132 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5133 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5134 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5135 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5136 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5137 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5138 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5139 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5140 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5141 {} /* terminator */
5142};
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