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[mirror_ubuntu-artful-kernel.git] / sound / pci / hda / patch_sigmatel.c
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2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
da155d5b 32#include <linux/module.h>
2f2f4251 33#include <sound/core.h>
45a6ac16 34#include <sound/jack.h>
a74ccea5 35#include <sound/tlv.h>
2f2f4251
M		 36#include "hda_codec.h"
37#include "hda_local.h"
128bc4ba 38#include "hda_auto_parser.h"
1cd2224c 39#include "hda_beep.h"
1835a0f9 40#include "hda_jack.h"
36c9db7a 41#include "hda_generic.h"
2f2f4251 42
c6e4c666 43enum {
36c9db7a 44 STAC_VREF_EVENT = 8,
c6e4c666 45 STAC_PWR_EVENT,
c6e4c666 46};
4e55096e 47
f5fcc13c
TI		 48enum {
49 STAC_REF,
bf277785 50 STAC_9200_OQO,
dfe495d0
TI		 51 STAC_9200_DELL_D21,
52 STAC_9200_DELL_D22,
53 STAC_9200_DELL_D23,
54 STAC_9200_DELL_M21,
55 STAC_9200_DELL_M22,
56 STAC_9200_DELL_M23,
57 STAC_9200_DELL_M24,
58 STAC_9200_DELL_M25,
59 STAC_9200_DELL_M26,
60 STAC_9200_DELL_M27,
58eec423
MCC		 61 STAC_9200_M4,
62 STAC_9200_M4_2,
117f257d 63 STAC_9200_PANASONIC,
d39a3ae8 64 STAC_9200_EAPD_INIT,
f5fcc13c
TI		 65 STAC_9200_MODELS
66};
67
68enum {
69 STAC_9205_REF,
dfe495d0 70 STAC_9205_DELL_M42,
ae0a8ed8
TD		 71 STAC_9205_DELL_M43,
72 STAC_9205_DELL_M44,
d9a4268e 73 STAC_9205_EAPD,
f5fcc13c
TI		 74 STAC_9205_MODELS
75};
76
e1f0d669 77enum {
9e43f0de 78 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 79 STAC_92HD73XX_REF,
ae709440 80 STAC_92HD73XX_INTEL,
661cd8fb
TI		 81 STAC_DELL_M6_AMIC,
82 STAC_DELL_M6_DMIC,
83 STAC_DELL_M6_BOTH,
6b3ab21e 84 STAC_DELL_EQ,
842ae638 85 STAC_ALIENWARE_M17X,
e1f0d669
MR		 86 STAC_92HD73XX_MODELS
87};
88
d0513fc6
MR		 89enum {
90 STAC_92HD83XXX_REF,
32ed3f46 91 STAC_92HD83XXX_PWR_REF,
8bb0ac55 92 STAC_DELL_S14,
f7f9bdfa 93 STAC_DELL_VOSTRO_3500,
0c27c180 94 STAC_92HD83XXX_HP_cNB11_INTQUAD,
48315590 95 STAC_HP_DV7_4000,
5556e147 96 STAC_HP_ZEPHYR,
a3e19973 97 STAC_92HD83XXX_HP_LED,
ff8a1e27 98 STAC_92HD83XXX_HP_INV_LED,
62cbde18 99 STAC_92HD83XXX_HP_MIC_LED,
8d032a8f 100 STAC_92HD83XXX_HEADSET_JACK,
372f8c75 101 STAC_92HD83XXX_HP,
49920427 102 STAC_HP_ENVY_BASS,
d0513fc6
MR		 103 STAC_92HD83XXX_MODELS
104};
105
e035b841
MR		 106enum {
107 STAC_92HD71BXX_REF,
a7662640
MR		 108 STAC_DELL_M4_1,
109 STAC_DELL_M4_2,
3a7abfd2 110 STAC_DELL_M4_3,
6a14f585 111 STAC_HP_M4,
2a6ce6e5 112 STAC_HP_DV4,
1b0652eb 113 STAC_HP_DV5,
ae6241fb 114 STAC_HP_HDX,
0f6fcb73
TI		 115 STAC_92HD71BXX_HP,
116 STAC_92HD71BXX_NO_DMIC,
117 STAC_92HD71BXX_NO_SMUX,
e035b841
MR		 118 STAC_92HD71BXX_MODELS
119};
120
8e21c34c
TD		 121enum {
122 STAC_925x_REF,
9cb36c2a
MCC		 123 STAC_M1,
124 STAC_M1_2,
125 STAC_M2,
8e21c34c 126 STAC_M2_2,
9cb36c2a
MCC		 127 STAC_M3,
128 STAC_M5,
129 STAC_M6,
8e21c34c
TD		 130 STAC_925x_MODELS
131};
132
f5fcc13c
TI		 133enum {
134 STAC_D945_REF,
135 STAC_D945GTP3,
136 STAC_D945GTP5,
5d5d3bc3
IZ		 137 STAC_INTEL_MAC_V1,
138 STAC_INTEL_MAC_V2,
139 STAC_INTEL_MAC_V3,
140 STAC_INTEL_MAC_V4,
141 STAC_INTEL_MAC_V5,
0a427846 142 STAC_INTEL_MAC_AUTO,
8c650087 143 STAC_ECS_202,
dfe495d0
TI		 144 STAC_922X_DELL_D81,
145 STAC_922X_DELL_D82,
146 STAC_922X_DELL_M81,
147 STAC_922X_DELL_M82,
0a427846 148 STAC_922X_INTEL_MAC_GPIO,
f5fcc13c
TI		 149 STAC_922X_MODELS
150};
151
152enum {
e28d8322 153 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 154 STAC_D965_REF,
155 STAC_D965_3ST,
156 STAC_D965_5ST,
679d92ed 157 STAC_D965_5ST_NO_FP,
29ac8363 158 STAC_D965_VERBS,
4ff076e5 159 STAC_DELL_3ST,
8e9068b1 160 STAC_DELL_BIOS,
29ac8363
TI		 161 STAC_DELL_BIOS_SPDIF,
162 STAC_927X_DELL_DMIC,
54930531 163 STAC_927X_VOLKNOB,
f5fcc13c
TI		 164 STAC_927X_MODELS
165};
403d1944 166
307282c8 167enum {
307282c8
TI		 168 STAC_9872_VAIO,
169 STAC_9872_MODELS
170};
171
2f2f4251 172struct sigmatel_spec {
36c9db7a 173 struct hda_gen_spec gen;
c7d4b2fa 174
c0cea0d0 175 unsigned int eapd_switch: 1;
1b0e372d 176 unsigned int linear_tone_beep:1;
8d032a8f 177 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
29ac8363 178 unsigned int volknob_init:1; /* special volume-knob initialization */
36c9db7a 179 unsigned int powerdown_adcs:1;
42875479 180 unsigned int have_spdif_mux:1;
c7d4b2fa 181
4fe5195c 182 /* gpio lines */
0fc9dec4 183 unsigned int eapd_mask;
4fe5195c
MR		 184 unsigned int gpio_mask;
185 unsigned int gpio_dir;
186 unsigned int gpio_data;
187 unsigned int gpio_mute;
86d190e7 188 unsigned int gpio_led;
c357aab0 189 unsigned int gpio_led_polarity;
f1a73746 190 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
45eebda7 191 unsigned int vref_led;
372f8c75 192 int default_polarity;
4fe5195c 193
62cbde18
TI		 194 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
195 bool mic_mute_led_on; /* current mic mute state */
196
8daaaa97
MR		 197 /* stream */
198 unsigned int stream_delay;
199
4fe5195c 200 /* analog loopback */
2b63536f 201 const struct snd_kcontrol_new *aloopback_ctl;
36c9db7a 202 unsigned int aloopback;
e1f0d669
MR		 203 unsigned char aloopback_mask;
204 unsigned char aloopback_shift;
8259980e 205
a64135a2 206 /* power management */
c882246d 207 unsigned int power_map_bits;
a64135a2 208 unsigned int num_pwrs;
2b63536f 209 const hda_nid_t *pwr_nids;
36c9db7a
TI		 210 unsigned int active_adcs;
211
212 /* beep widgets */
1cd2224c
MR		 213 hda_nid_t anabeep_nid;
214 hda_nid_t digbeep_nid;
42875479
TI		 215
216 /* SPDIF-out mux */
217 const char * const *spdif_labels;
218 struct hda_input_mux spdif_mux;
219 unsigned int cur_smux[2];
2f2f4251
M		 220};
221
c882246d
TI		 222#define AC_VERB_IDT_SET_POWER_MAP 0x7ec
223#define AC_VERB_IDT_GET_POWER_MAP 0xfec
224
2b63536f 225static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
a64135a2
MR		 226 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
227 0x0f, 0x10, 0x11
228};
229
afef2cfa
CC		 230static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
231 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
232 0x0f, 0x10
d0513fc6
MR		 233};
234
2b63536f 235static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
a64135a2
MR		 236 0x0a, 0x0d, 0x0f
237};
238
f3302a59 239
36c9db7a
TI		 240/*
241 * PCM hooks
242 */
243static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
244 struct hda_codec *codec,
245 struct snd_pcm_substream *substream,
246 int action)
8b65727b 247{
8b65727b 248 struct sigmatel_spec *spec = codec->spec;
36c9db7a
TI		 249 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
250 msleep(spec->stream_delay);
8b65727b
MP		 251}
252
36c9db7a
TI		 253static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
254 struct hda_codec *codec,
255 struct snd_pcm_substream *substream,
256 int action)
8b65727b 257{
8b65727b 258 struct sigmatel_spec *spec = codec->spec;
36c9db7a 259 int i, idx = 0;
8b65727b 260
36c9db7a
TI		 261 if (!spec->powerdown_adcs)
262 return;
8b65727b 263
36c9db7a
TI		 264 for (i = 0; i < spec->gen.num_all_adcs; i++) {
265 if (spec->gen.all_adcs[i] == hinfo->nid) {
266 idx = i;
267 break;
268 }
269 }
8b65727b 270
36c9db7a
TI		 271 switch (action) {
272 case HDA_GEN_PCM_ACT_OPEN:
273 msleep(40);
274 snd_hda_codec_write(codec, hinfo->nid, 0,
275 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
276 spec->active_adcs |= (1 << idx);
277 break;
278 case HDA_GEN_PCM_ACT_CLOSE:
279 snd_hda_codec_write(codec, hinfo->nid, 0,
280 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
281 spec->active_adcs &= ~(1 << idx);
282 break;
283 }
8b65727b
MP		 284}
285
36c9db7a
TI		 286/*
287 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
288 * funky external mute control using GPIO pins.
289 */
d9737751 290
36c9db7a
TI		 291static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
292 unsigned int dir_mask, unsigned int data)
d9737751 293{
36c9db7a 294 unsigned int gpiostate, gpiomask, gpiodir;
d9737751 295
36c9db7a
TI		 296 snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
297
298 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
299 AC_VERB_GET_GPIO_DATA, 0);
300 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
301
302 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
303 AC_VERB_GET_GPIO_MASK, 0);
304 gpiomask |= mask;
305
306 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
307 AC_VERB_GET_GPIO_DIRECTION, 0);
308 gpiodir |= dir_mask;
309
310 /* Configure GPIOx as CMOS */
311 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
312
313 snd_hda_codec_write(codec, codec->afg, 0,
314 AC_VERB_SET_GPIO_MASK, gpiomask);
315 snd_hda_codec_read(codec, codec->afg, 0,
316 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
317
318 msleep(1);
319
320 snd_hda_codec_read(codec, codec->afg, 0,
321 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
d9737751
MR		 322}
323
36c9db7a 324/* hook for controlling mic-mute LED GPIO */
a90229e0
TI		 325static void stac_capture_led_hook(struct hda_codec *codec,
326 struct snd_ctl_elem_value *ucontrol)
d9737751 327{
d9737751 328 struct sigmatel_spec *spec = codec->spec;
a90229e0 329 bool mute;
00ef50c2 330
a90229e0
TI		 331 if (!ucontrol)
332 return;
333
334 mute = !(ucontrol->value.integer.value[0] ||
335 ucontrol->value.integer.value[1]);
36c9db7a
TI		 336 if (spec->mic_mute_led_on != mute) {
337 spec->mic_mute_led_on = mute;
338 if (mute)
339 spec->gpio_data |= spec->mic_mute_led_gpio;
00ef50c2 340 else
36c9db7a
TI		 341 spec->gpio_data &= ~spec->mic_mute_led_gpio;
342 stac_gpio_set(codec, spec->gpio_mask,
343 spec->gpio_dir, spec->gpio_data);
00ef50c2 344 }
d9737751
MR		 345}
346
45eebda7
VK		 347static int stac_vrefout_set(struct hda_codec *codec,
348 hda_nid_t nid, unsigned int new_vref)
349{
350 int error, pinctl;
351
352 snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
353 pinctl = snd_hda_codec_read(codec, nid, 0,
354 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
355
356 if (pinctl < 0)
357 return pinctl;
358
359 pinctl &= 0xff;
360 pinctl &= ~AC_PINCTL_VREFEN;
361 pinctl |= (new_vref & AC_PINCTL_VREFEN);
362
cdd03ced 363 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
45eebda7
VK		 364 if (error < 0)
365 return error;
366
367 return 1;
368}
369
36c9db7a
TI		 370/* update mute-LED accoring to the master switch */
371static void stac_update_led_status(struct hda_codec *codec, int enabled)
2f2f4251 372{
2f2f4251 373 struct sigmatel_spec *spec = codec->spec;
36c9db7a 374 int muted = !enabled;
2f2f4251 375
36c9db7a
TI		 376 if (!spec->gpio_led)
377 return;
2f2f4251 378
36c9db7a
TI		 379 /* LED state is inverted on these systems */
380 if (spec->gpio_led_polarity)
381 muted = !muted;
2f2f4251 382
36c9db7a
TI		 383 if (!spec->vref_mute_led_nid) {
384 if (muted)
385 spec->gpio_data |= spec->gpio_led;
386 else
387 spec->gpio_data &= ~spec->gpio_led;
388 stac_gpio_set(codec, spec->gpio_mask,
389 spec->gpio_dir, spec->gpio_data);
5207e10e 390 } else {
36c9db7a
TI		 391 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
392 stac_vrefout_set(codec, spec->vref_mute_led_nid,
393 spec->vref_led);
5207e10e 394 }
2f2f4251
M		 395}
396
36c9db7a
TI		 397/* vmaster hook to update mute LED */
398static void stac_vmaster_hook(void *private_data, int val)
b22b4821 399{
36c9db7a 400 stac_update_led_status(private_data, val);
b22b4821
MR		 401}
402
36c9db7a
TI		 403/* automute hook to handle GPIO mute and EAPD updates */
404static void stac_update_outputs(struct hda_codec *codec)
b22b4821 405{
b22b4821
MR		 406 struct sigmatel_spec *spec = codec->spec;
407
36c9db7a
TI		 408 if (spec->gpio_mute)
409 spec->gen.master_mute =
410 !(snd_hda_codec_read(codec, codec->afg, 0,
411 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
b22b4821 412
36c9db7a 413 snd_hda_gen_update_outputs(codec);
b22b4821 414
36c9db7a
TI		 415 if (spec->eapd_mask && spec->eapd_switch) {
416 unsigned int val = spec->gpio_data;
417 if (spec->gen.speaker_muted)
418 val &= ~spec->eapd_mask;
419 else
420 val |= spec->eapd_mask;
421 if (spec->gpio_data != val)
422 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
423 val);
424 }
b22b4821
MR		 425}
426
36c9db7a
TI		 427static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
428 bool enable, bool do_write)
5f10c4a9 429{
5f10c4a9 430 struct sigmatel_spec *spec = codec->spec;
36c9db7a 431 unsigned int idx, val;
5f10c4a9 432
36c9db7a
TI		 433 for (idx = 0; idx < spec->num_pwrs; idx++) {
434 if (spec->pwr_nids[idx] == nid)
435 break;
436 }
437 if (idx >= spec->num_pwrs)
438 return;
439
440 idx = 1 << idx;
441
442 val = spec->power_map_bits;
443 if (enable)
444 val &= ~idx;
445 else
446 val |= idx;
447
448 /* power down unused output ports */
449 if (val != spec->power_map_bits) {
450 spec->power_map_bits = val;
451 if (do_write)
452 snd_hda_codec_write(codec, codec->afg, 0,
453 AC_VERB_IDT_SET_POWER_MAP, val);
454 }
455}
456
457/* update power bit per jack plug/unplug */
458static void jack_update_power(struct hda_codec *codec,
459 struct hda_jack_tbl *jack)
460{
461 struct sigmatel_spec *spec = codec->spec;
462 int i;
463
464 if (!spec->num_pwrs)
465 return;
466
467 if (jack && jack->nid) {
468 stac_toggle_power_map(codec, jack->nid,
469 snd_hda_jack_detect(codec, jack->nid),
470 true);
471 return;
472 }
473
474 /* update all jacks */
475 for (i = 0; i < spec->num_pwrs; i++) {
476 hda_nid_t nid = spec->pwr_nids[i];
477 jack = snd_hda_jack_tbl_get(codec, nid);
478 if (!jack || !jack->action)
479 continue;
480 if (jack->action == STAC_PWR_EVENT ||
481 jack->action <= HDA_GEN_LAST_EVENT)
482 stac_toggle_power_map(codec, nid,
483 snd_hda_jack_detect(codec, nid),
484 false);
485 }
486
487 snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP,
488 spec->power_map_bits);
489}
490
491static void stac_hp_automute(struct hda_codec *codec,
492 struct hda_jack_tbl *jack)
493{
494 snd_hda_gen_hp_automute(codec, jack);
495 jack_update_power(codec, jack);
496}
497
498static void stac_line_automute(struct hda_codec *codec,
499 struct hda_jack_tbl *jack)
500{
501 snd_hda_gen_line_automute(codec, jack);
502 jack_update_power(codec, jack);
503}
504
664389db
DH		 505static void stac_mic_autoswitch(struct hda_codec *codec,
506 struct hda_jack_tbl *jack)
507{
508 snd_hda_gen_mic_autoswitch(codec, jack);
509 jack_update_power(codec, jack);
510}
511
36c9db7a
TI		 512static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event)
513{
514 unsigned int data;
515
516 data = snd_hda_codec_read(codec, codec->afg, 0,
517 AC_VERB_GET_GPIO_DATA, 0);
518 /* toggle VREF state based on GPIOx status */
519 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
520 !!(data & (1 << event->private_data)));
521}
522
523/* initialize the power map and enable the power event to jacks that
524 * haven't been assigned to automute
525 */
526static void stac_init_power_map(struct hda_codec *codec)
527{
528 struct sigmatel_spec *spec = codec->spec;
529 int i;
530
531 for (i = 0; i < spec->num_pwrs; i++) {
532 hda_nid_t nid = spec->pwr_nids[i];
533 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
534 def_conf = get_defcfg_connect(def_conf);
535 if (snd_hda_jack_tbl_get(codec, nid))
536 continue;
537 if (def_conf == AC_JACK_PORT_COMPLEX &&
538 !(spec->vref_mute_led_nid == nid ||
539 is_jack_detectable(codec, nid))) {
540 snd_hda_jack_detect_enable_callback(codec, nid,
541 STAC_PWR_EVENT,
542 jack_update_power);
543 } else {
544 if (def_conf == AC_JACK_PORT_NONE)
545 stac_toggle_power_map(codec, nid, false, false);
546 else
547 stac_toggle_power_map(codec, nid, true, false);
548 }
549 }
550}
551
552/*
553 */
554
555static inline bool get_int_hint(struct hda_codec *codec, const char *key,
556 int *valp)
557{
558 return !snd_hda_get_int_hint(codec, key, valp);
559}
560
561/* override some hints from the hwdep entry */
562static void stac_store_hints(struct hda_codec *codec)
563{
564 struct sigmatel_spec *spec = codec->spec;
565 int val;
566
567 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
568 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
569 spec->gpio_mask;
570 }
571 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
572 spec->gpio_mask &= spec->gpio_mask;
573 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
574 spec->gpio_dir &= spec->gpio_mask;
575 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
576 spec->eapd_mask &= spec->gpio_mask;
577 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
578 spec->gpio_mute &= spec->gpio_mask;
579 val = snd_hda_get_bool_hint(codec, "eapd_switch");
580 if (val >= 0)
581 spec->eapd_switch = val;
582}
583
584/*
585 * loopback controls
586 */
587
588#define stac_aloopback_info snd_ctl_boolean_mono_info
589
590static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
591 struct snd_ctl_elem_value *ucontrol)
592{
593 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
594 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
595 struct sigmatel_spec *spec = codec->spec;
596
597 ucontrol->value.integer.value[0] = !!(spec->aloopback &
598 (spec->aloopback_mask << idx));
599 return 0;
5f10c4a9
ML		 600}
601
36c9db7a
TI		 602static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
603 struct snd_ctl_elem_value *ucontrol)
5f10c4a9
ML		 604{
605 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
606 struct sigmatel_spec *spec = codec->spec;
e1f0d669 607 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 608 unsigned int dac_mode;
e1f0d669 609 unsigned int val, idx_val;
5f10c4a9 610
e1f0d669
MR		 611 idx_val = spec->aloopback_mask << idx;
612 if (ucontrol->value.integer.value[0])
613 val = spec->aloopback | idx_val;
614 else
615 val = spec->aloopback & ~idx_val;
68ea7b2f 616 if (spec->aloopback == val)
5f10c4a9
ML		 617 return 0;
618
68ea7b2f 619 spec->aloopback = val;
5f10c4a9 620
e1f0d669
MR		 621 /* Only return the bits defined by the shift value of the
622 * first two bytes of the mask
623 */
5f10c4a9 624 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 625 kcontrol->private_value & 0xFFFF, 0x0);
626 dac_mode >>= spec->aloopback_shift;
5f10c4a9 627
e1f0d669 628 if (spec->aloopback & idx_val) {
5f10c4a9 629 snd_hda_power_up(codec);
e1f0d669 630 dac_mode |= idx_val;
5f10c4a9
ML		 631 } else {
632 snd_hda_power_down(codec);
e1f0d669 633 dac_mode &= ~idx_val;
5f10c4a9
ML		 634 }
635
636 snd_hda_codec_write_cache(codec, codec->afg, 0,
637 kcontrol->private_value >> 16, dac_mode);
638
639 return 1;
640}
641
e1f0d669 642#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 643 { \
644 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
645 .name = "Analog Loopback", \
e1f0d669 646 .count = cnt, \
36c9db7a
TI		 647 .info = stac_aloopback_info, \
648 .get = stac_aloopback_get, \
649 .put = stac_aloopback_put, \
5f10c4a9
ML		 650 .private_value = verb_read | (verb_write << 16), \
651 }
652
36c9db7a
TI		 653/*
654 * Mute LED handling on HP laptops
655 */
2fc99890 656
36c9db7a
TI		 657/* check whether it's a HP laptop with a docking port */
658static bool hp_bnb2011_with_dock(struct hda_codec *codec)
659{
660 if (codec->vendor_id != 0x111d7605 &&
661 codec->vendor_id != 0x111d76d1)
662 return false;
2f2f4251 663
36c9db7a
TI		 664 switch (codec->subsystem_id) {
665 case 0x103c1618:
666 case 0x103c1619:
667 case 0x103c161a:
668 case 0x103c161b:
669 case 0x103c161c:
670 case 0x103c161d:
671 case 0x103c161e:
672 case 0x103c161f:
d78d7a90 673
36c9db7a
TI		 674 case 0x103c162a:
675 case 0x103c162b:
e1f0d669 676
36c9db7a
TI		 677 case 0x103c1630:
678 case 0x103c1631:
d78d7a90 679
36c9db7a
TI		 680 case 0x103c1633:
681 case 0x103c1634:
682 case 0x103c1635:
d0513fc6 683
36c9db7a
TI		 684 case 0x103c3587:
685 case 0x103c3588:
686 case 0x103c3589:
687 case 0x103c358a:
541eee87 688
36c9db7a
TI		 689 case 0x103c3667:
690 case 0x103c3668:
691 case 0x103c3669:
2f2f4251 692
36c9db7a
TI		 693 return true;
694 }
695 return false;
696}
1697055e 697
36c9db7a
TI		 698static bool hp_blike_system(u32 subsystem_id)
699{
700 switch (subsystem_id) {
701 case 0x103c1520:
702 case 0x103c1521:
703 case 0x103c1523:
704 case 0x103c1524:
705 case 0x103c1525:
706 case 0x103c1722:
707 case 0x103c1723:
708 case 0x103c1724:
709 case 0x103c1725:
710 case 0x103c1726:
711 case 0x103c1727:
712 case 0x103c1728:
713 case 0x103c1729:
714 case 0x103c172a:
715 case 0x103c172b:
716 case 0x103c307e:
717 case 0x103c307f:
718 case 0x103c3080:
719 case 0x103c3081:
720 case 0x103c7007:
721 case 0x103c7008:
722 return true;
723 }
724 return false;
725}
d9737751 726
36c9db7a
TI		 727static void set_hp_led_gpio(struct hda_codec *codec)
728{
729 struct sigmatel_spec *spec = codec->spec;
730 unsigned int gpio;
2134ea4f 731
36c9db7a
TI		 732 if (spec->gpio_led)
733 return;
2faa3bf1 734
36c9db7a
TI		 735 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
736 gpio &= AC_GPIO_IO_COUNT;
737 if (gpio > 3)
738 spec->gpio_led = 0x08; /* GPIO 3 */
739 else
740 spec->gpio_led = 0x01; /* GPIO 0 */
2faa3bf1
TI		 741}
742
36c9db7a
TI		 743/*
744 * This method searches for the mute LED GPIO configuration
745 * provided as OEM string in SMBIOS. The format of that string
746 * is HP_Mute_LED_P_G or HP_Mute_LED_P
747 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
748 * that corresponds to the NOT muted state of the master volume
749 * and G is the index of the GPIO to use as the mute LED control (0..9)
750 * If _G portion is missing it is assigned based on the codec ID
751 *
752 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
753 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
754 *
755 *
756 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
757 * SMBIOS - at least the ones I have seen do not have them - which include
758 * my own system (HP Pavilion dv6-1110ax) and my cousin's
759 * HP Pavilion dv9500t CTO.
760 * Need more information on whether it is true across the entire series.
761 * -- kunal
762 */
763static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
2f2f4251
M		 764{
765 struct sigmatel_spec *spec = codec->spec;
36c9db7a 766 const struct dmi_device *dev = NULL;
2f2f4251 767
36c9db7a
TI		 768 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
769 get_int_hint(codec, "gpio_led_polarity",
770 &spec->gpio_led_polarity);
771 return 1;
6479c631 772 }
c7d4b2fa 773
36c9db7a
TI		 774 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
775 if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
776 &spec->gpio_led_polarity,
777 &spec->gpio_led) == 2) {
778 unsigned int max_gpio;
779 max_gpio = snd_hda_param_read(codec, codec->afg,
780 AC_PAR_GPIO_CAP);
781 max_gpio &= AC_GPIO_IO_COUNT;
782 if (spec->gpio_led < max_gpio)
783 spec->gpio_led = 1 << spec->gpio_led;
784 else
785 spec->vref_mute_led_nid = spec->gpio_led;
786 return 1;
787 }
788 if (sscanf(dev->name, "HP_Mute_LED_%d",
789 &spec->gpio_led_polarity) == 1) {
790 set_hp_led_gpio(codec);
791 return 1;
792 }
793 /* BIOS bug: unfilled OEM string */
794 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
795 set_hp_led_gpio(codec);
796 if (default_polarity >= 0)
797 spec->gpio_led_polarity = default_polarity;
798 else
799 spec->gpio_led_polarity = 1;
800 return 1;
00ef50c2 801 }
d9737751 802 }
c7d4b2fa 803
36c9db7a
TI		 804 /*
805 * Fallback case - if we don't find the DMI strings,
806 * we statically set the GPIO - if not a B-series system
807 * and default polarity is provided
808 */
809 if (!hp_blike_system(codec->subsystem_id) &&
810 (default_polarity == 0 || default_polarity == 1)) {
811 set_hp_led_gpio(codec);
812 spec->gpio_led_polarity = default_polarity;
813 return 1;
dabbed6f 814 }
36c9db7a
TI		 815 return 0;
816}
2134ea4f 817
303985f8
DH		 818/* check whether a built-in speaker is included in parsed pins */
819static bool has_builtin_speaker(struct hda_codec *codec)
820{
821 struct sigmatel_spec *spec = codec->spec;
822 hda_nid_t *nid_pin;
823 int nids, i;
824
825 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
826 nid_pin = spec->gen.autocfg.line_out_pins;
827 nids = spec->gen.autocfg.line_outs;
828 } else {
829 nid_pin = spec->gen.autocfg.speaker_pins;
830 nids = spec->gen.autocfg.speaker_outs;
831 }
832
833 for (i = 0; i < nids; i++) {
834 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
835 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
836 return true;
837 }
838 return false;
839}
840
36c9db7a
TI		 841/*
842 * PC beep controls
843 */
2faa3bf1 844
36c9db7a
TI		 845/* create PC beep volume controls */
846static int stac_auto_create_beep_ctls(struct hda_codec *codec,
847 hda_nid_t nid)
848{
849 struct sigmatel_spec *spec = codec->spec;
850 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
851 struct snd_kcontrol_new *knew;
852 static struct snd_kcontrol_new abeep_mute_ctl =
853 HDA_CODEC_MUTE(NULL, 0, 0, 0);
854 static struct snd_kcontrol_new dbeep_mute_ctl =
855 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
856 static struct snd_kcontrol_new beep_vol_ctl =
857 HDA_CODEC_VOLUME(NULL, 0, 0, 0);
2faa3bf1 858
36c9db7a
TI		 859 /* check for mute support for the the amp */
860 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
861 const struct snd_kcontrol_new *temp;
862 if (spec->anabeep_nid == nid)
863 temp = &abeep_mute_ctl;
864 else
865 temp = &dbeep_mute_ctl;
866 knew = snd_hda_gen_add_kctl(&spec->gen,
867 "Beep Playback Switch", temp);
868 if (!knew)
869 return -ENOMEM;
870 knew->private_value =
871 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
2134ea4f
TI		 872 }
873
36c9db7a
TI		 874 /* check to see if there is volume support for the amp */
875 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
876 knew = snd_hda_gen_add_kctl(&spec->gen,
877 "Beep Playback Volume",
878 &beep_vol_ctl);
879 if (!knew)
880 return -ENOMEM;
881 knew->private_value =
882 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
d78d7a90 883 }
36c9db7a
TI		 884 return 0;
885}
d78d7a90 886
36c9db7a
TI		 887#ifdef CONFIG_SND_HDA_INPUT_BEEP
888#define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
e4973e1e 889
36c9db7a
TI		 890static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
891 struct snd_ctl_elem_value *ucontrol)
892{
893 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
894 ucontrol->value.integer.value[0] = codec->beep->enabled;
895 return 0;
896}
e4973e1e 897
36c9db7a
TI		 898static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
899 struct snd_ctl_elem_value *ucontrol)
900{
901 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
902 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
2f2f4251
M		 903}
904
36c9db7a
TI		 905static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
906 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
907 .name = "Beep Playback Switch",
908 .info = stac_dig_beep_switch_info,
909 .get = stac_dig_beep_switch_get,
910 .put = stac_dig_beep_switch_put,
2f2f4251
M		 911};
912
36c9db7a
TI		 913static int stac_beep_switch_ctl(struct hda_codec *codec)
914{
915 struct sigmatel_spec *spec = codec->spec;
916
917 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
918 return -ENOMEM;
919 return 0;
920}
921#endif
922
42875479
TI		 923/*
924 * SPDIF-out mux controls
925 */
926
927static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
928 struct snd_ctl_elem_info *uinfo)
929{
930 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
931 struct sigmatel_spec *spec = codec->spec;
932 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
933}
934
935static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
936 struct snd_ctl_elem_value *ucontrol)
937{
938 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
939 struct sigmatel_spec *spec = codec->spec;
940 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
941
942 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
943 return 0;
944}
945
946static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
947 struct snd_ctl_elem_value *ucontrol)
948{
949 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
950 struct sigmatel_spec *spec = codec->spec;
951 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
952
953 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
954 spec->gen.autocfg.dig_out_pins[smux_idx],
955 &spec->cur_smux[smux_idx]);
956}
957
958static struct snd_kcontrol_new stac_smux_mixer = {
959 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
960 .name = "IEC958 Playback Source",
961 /* count set later */
962 .info = stac_smux_enum_info,
963 .get = stac_smux_enum_get,
964 .put = stac_smux_enum_put,
965};
966
967static const char * const stac_spdif_labels[] = {
968 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
969};
970
971static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
972{
973 struct sigmatel_spec *spec = codec->spec;
974 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
975 const char * const *labels = spec->spdif_labels;
976 struct snd_kcontrol_new *kctl;
977 int i, num_cons;
978
979 if (cfg->dig_outs < 1)
980 return 0;
981
982 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
983 if (num_cons <= 1)
984 return 0;
985
986 if (!labels)
987 labels = stac_spdif_labels;
988 for (i = 0; i < num_cons; i++) {
989 if (snd_BUG_ON(!labels[i]))
990 return -EINVAL;
991 snd_hda_add_imux_item(&spec->spdif_mux, labels[i], i, NULL);
992 }
993
994 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
995 if (!kctl)
996 return -ENOMEM;
997 kctl->count = cfg->dig_outs;
998
999 return 0;
1000}
1001
36c9db7a
TI		 1002/*
1003 */
1004
1005static const struct hda_verb stac9200_core_init[] = {
1006 /* set dac0mux for dac converter */
1007 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
d39a3ae8 1008 {}
58eec423 1009};
d39a3ae8 1010
36c9db7a
TI		 1011static const struct hda_verb stac9200_eapd_init[] = {
1012 /* set dac0mux for dac converter */
1013 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1014 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
d39a3ae8 1015 {}
58eec423
MCC		 1016};
1017
36c9db7a
TI		 1018static const struct hda_verb dell_eq_core_init[] = {
1019 /* set master volume to max value without distortion
1020 * and direct control */
1021 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d39a3ae8 1022 {}
dfe495d0
TI		 1023};
1024
36c9db7a
TI		 1025static const struct hda_verb stac92hd73xx_core_init[] = {
1026 /* set master volume and direct control */
1027 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d39a3ae8 1028 {}
dfe495d0
TI		 1029};
1030
36c9db7a
TI		 1031static const struct hda_verb stac92hd83xxx_core_init[] = {
1032 /* power state controls amps */
1033 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
1034 {}
1035};
1036
1037static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1038 { 0x22, 0x785, 0x43 },
1039 { 0x22, 0x782, 0xe0 },
1040 { 0x22, 0x795, 0x00 },
1041 {}
1042};
1043
1044static const struct hda_verb stac92hd71bxx_core_init[] = {
1045 /* set master volume and direct control */
1046 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1047 {}
1048};
1049
1050static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
1051 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
1052 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1053 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1054 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1055 {}
1056};
1057
1058static const struct hda_verb stac925x_core_init[] = {
1059 /* set dac0mux for dac converter */
1060 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1061 /* mute the master volume */
1062 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1063 {}
1064};
1065
1066static const struct hda_verb stac922x_core_init[] = {
1067 /* set master volume and direct control */
1068 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1069 {}
1070};
1071
1072static const struct hda_verb d965_core_init[] = {
1073 /* unmute node 0x1b */
1074 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1075 /* select node 0x03 as DAC */
1076 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1077 {}
1078};
1079
1080static const struct hda_verb dell_3st_core_init[] = {
1081 /* don't set delta bit */
1082 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1083 /* unmute node 0x1b */
1084 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1085 /* select node 0x03 as DAC */
1086 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1087 {}
1088};
1089
1090static const struct hda_verb stac927x_core_init[] = {
1091 /* set master volume and direct control */
1092 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1093 /* enable analog pc beep path */
1094 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1095 {}
1096};
1097
1098static const struct hda_verb stac927x_volknob_core_init[] = {
1099 /* don't set delta bit */
1100 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1101 /* enable analog pc beep path */
1102 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1103 {}
1104};
1105
1106static const struct hda_verb stac9205_core_init[] = {
1107 /* set master volume and direct control */
1108 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1109 /* enable analog pc beep path */
1110 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1111 {}
1112};
1113
1114static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1115 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1116
1117static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1118 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1119
1120static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1121 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1122
1123static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1124 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1125
1126static const struct snd_kcontrol_new stac9205_loopback =
1127 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1128
1129static const struct snd_kcontrol_new stac927x_loopback =
1130 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1131
1132static const struct hda_pintbl ref9200_pin_configs[] = {
1133 { 0x08, 0x01c47010 },
1134 { 0x09, 0x01447010 },
1135 { 0x0d, 0x0221401f },
1136 { 0x0e, 0x01114010 },
1137 { 0x0f, 0x02a19020 },
1138 { 0x10, 0x01a19021 },
1139 { 0x11, 0x90100140 },
1140 { 0x12, 0x01813122 },
1141 {}
1142};
1143
1144static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1145 { 0x08, 0x400000fe },
1146 { 0x09, 0x404500f4 },
1147 { 0x0d, 0x400100f0 },
1148 { 0x0e, 0x90110010 },
1149 { 0x0f, 0x400100f1 },
1150 { 0x10, 0x02a1902e },
1151 { 0x11, 0x500000f2 },
1152 { 0x12, 0x500000f3 },
1153 {}
1154};
1155
1156static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1157 { 0x08, 0x400000fe },
1158 { 0x09, 0x404500f4 },
1159 { 0x0d, 0x400100f0 },
1160 { 0x0e, 0x90110010 },
1161 { 0x0f, 0x400100f1 },
1162 { 0x10, 0x02a1902e },
1163 { 0x11, 0x500000f2 },
1164 { 0x12, 0x500000f3 },
1165 {}
1166};
1167
1168/*
1169 STAC 9200 pin configs for
1170 102801A8
1171 102801DE
1172 102801E8
1173*/
1174static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1175 { 0x08, 0x400001f0 },
1176 { 0x09, 0x400001f1 },
1177 { 0x0d, 0x02214030 },
1178 { 0x0e, 0x01014010 },
1179 { 0x0f, 0x02a19020 },
1180 { 0x10, 0x01a19021 },
1181 { 0x11, 0x90100140 },
1182 { 0x12, 0x01813122 },
1183 {}
1184};
1185
1186/*
1187 STAC 9200 pin configs for
1188 102801C0
1189 102801C1
1190*/
1191static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1192 { 0x08, 0x400001f0 },
1193 { 0x09, 0x400001f1 },
1194 { 0x0d, 0x0221401f },
1195 { 0x0e, 0x01014010 },
1196 { 0x0f, 0x01813020 },
1197 { 0x10, 0x02a19021 },
1198 { 0x11, 0x90100140 },
1199 { 0x12, 0x400001f2 },
1200 {}
1201};
1202
1203/*
dfe495d0
TI		 1204 STAC 9200 pin configs for
1205 102801C4 (Dell Dimension E310)
1206 102801C5
1207 102801C7
1208 102801D9
1209 102801DA
1210 102801E3
1211*/
d39a3ae8
TI		 1212static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1213 { 0x08, 0x400001f0 },
1214 { 0x09, 0x400001f1 },
1215 { 0x0d, 0x0221401f },
1216 { 0x0e, 0x01014010 },
1217 { 0x0f, 0x01813020 },
1218 { 0x10, 0x01a19021 },
1219 { 0x11, 0x90100140 },
1220 { 0x12, 0x400001f2 },
1221 {}
dfe495d0
TI		 1222};
1223
1224
1225/*
1226 STAC 9200-32 pin configs for
1227 102801B5 (Dell Inspiron 630m)
1228 102801D8 (Dell Inspiron 640m)
1229*/
d39a3ae8
TI		 1230static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1231 { 0x08, 0x40c003fa },
1232 { 0x09, 0x03441340 },
1233 { 0x0d, 0x0321121f },
1234 { 0x0e, 0x90170310 },
1235 { 0x0f, 0x408003fb },
1236 { 0x10, 0x03a11020 },
1237 { 0x11, 0x401003fc },
1238 { 0x12, 0x403003fd },
1239 {}
dfe495d0
TI		 1240};
1241
1242/*
1243 STAC 9200-32 pin configs for
1244 102801C2 (Dell Latitude D620)
1245 102801C8
1246 102801CC (Dell Latitude D820)
1247 102801D4
1248 102801D6
1249*/
d39a3ae8
TI		 1250static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1251 { 0x08, 0x40c003fa },
1252 { 0x09, 0x0144131f },
1253 { 0x0d, 0x0321121f },
1254 { 0x0e, 0x90170310 },
1255 { 0x0f, 0x90a70321 },
1256 { 0x10, 0x03a11020 },
1257 { 0x11, 0x401003fb },
1258 { 0x12, 0x40f000fc },
1259 {}
dfe495d0
TI		 1260};
1261
1262/*
1263 STAC 9200-32 pin configs for
1264 102801CE (Dell XPS M1710)
1265 102801CF (Dell Precision M90)
1266*/
d39a3ae8
TI		 1267static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1268 { 0x08, 0x40c003fa },
1269 { 0x09, 0x01441340 },
1270 { 0x0d, 0x0421421f },
1271 { 0x0e, 0x90170310 },
1272 { 0x0f, 0x408003fb },
1273 { 0x10, 0x04a1102e },
1274 { 0x11, 0x90170311 },
1275 { 0x12, 0x403003fc },
1276 {}
dfe495d0
TI		 1277};
1278
1279/*
1280 STAC 9200-32 pin configs for
1281 102801C9
1282 102801CA
1283 102801CB (Dell Latitude 120L)
1284 102801D3
1285*/
d39a3ae8
TI		 1286static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1287 { 0x08, 0x40c003fa },
1288 { 0x09, 0x404003fb },
1289 { 0x0d, 0x0321121f },
1290 { 0x0e, 0x90170310 },
1291 { 0x0f, 0x408003fc },
1292 { 0x10, 0x03a11020 },
1293 { 0x11, 0x401003fd },
1294 { 0x12, 0x403003fe },
1295 {}
dfe495d0
TI		 1296};
1297
1298/*
1299 STAC 9200-32 pin configs for
1300 102801BD (Dell Inspiron E1505n)
1301 102801EE
1302 102801EF
1303*/
d39a3ae8
TI		 1304static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1305 { 0x08, 0x40c003fa },
1306 { 0x09, 0x01441340 },
1307 { 0x0d, 0x0421121f },
1308 { 0x0e, 0x90170310 },
1309 { 0x0f, 0x408003fb },
1310 { 0x10, 0x04a11020 },
1311 { 0x11, 0x401003fc },
1312 { 0x12, 0x403003fd },
1313 {}
dfe495d0
TI		 1314};
1315
1316/*
1317 STAC 9200-32 pin configs for
1318 102801F5 (Dell Inspiron 1501)
1319 102801F6
1320*/
d39a3ae8
TI		 1321static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1322 { 0x08, 0x40c003fa },
1323 { 0x09, 0x404003fb },
1324 { 0x0d, 0x0421121f },
1325 { 0x0e, 0x90170310 },
1326 { 0x0f, 0x408003fc },
1327 { 0x10, 0x04a11020 },
1328 { 0x11, 0x401003fd },
1329 { 0x12, 0x403003fe },
1330 {}
dfe495d0
TI		 1331};
1332
1333/*
1334 STAC 9200-32
1335 102801CD (Dell Inspiron E1705/9400)
1336*/
d39a3ae8
TI		 1337static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1338 { 0x08, 0x40c003fa },
1339 { 0x09, 0x01441340 },
1340 { 0x0d, 0x0421121f },
1341 { 0x0e, 0x90170310 },
1342 { 0x0f, 0x90170310 },
1343 { 0x10, 0x04a11020 },
1344 { 0x11, 0x90170310 },
1345 { 0x12, 0x40f003fc },
1346 {}
dfe495d0
TI		 1347};
1348
d39a3ae8
TI		 1349static const struct hda_pintbl oqo9200_pin_configs[] = {
1350 { 0x08, 0x40c000f0 },
1351 { 0x09, 0x404000f1 },
1352 { 0x0d, 0x0221121f },
1353 { 0x0e, 0x02211210 },
1354 { 0x0f, 0x90170111 },
1355 { 0x10, 0x90a70120 },
1356 { 0x11, 0x400000f2 },
1357 { 0x12, 0x400000f3 },
1358 {}
bf277785
TD		 1359};
1360
dfe495d0 1361
d39a3ae8
TI		 1362static void stac9200_fixup_panasonic(struct hda_codec *codec,
1363 const struct hda_fixup *fix, int action)
1364{
1365 struct sigmatel_spec *spec = codec->spec;
1366
36c9db7a 1367 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
d39a3ae8
TI		 1368 spec->gpio_mask = spec->gpio_dir = 0x09;
1369 spec->gpio_data = 0x00;
d39a3ae8
TI		 1370 /* CF-74 has no headphone detection, and the driver should *NOT*
1371 * do detection and HP/speaker toggle because the hardware does it.
1372 */
36c9db7a 1373 spec->gen.suppress_auto_mute = 1;
d39a3ae8
TI		 1374 }
1375}
1376
1377
1378static const struct hda_fixup stac9200_fixups[] = {
1379 [STAC_REF] = {
1380 .type = HDA_FIXUP_PINS,
1381 .v.pins = ref9200_pin_configs,
1382 },
1383 [STAC_9200_OQO] = {
1384 .type = HDA_FIXUP_PINS,
1385 .v.pins = oqo9200_pin_configs,
1386 .chained = true,
1387 .chain_id = STAC_9200_EAPD_INIT,
1388 },
1389 [STAC_9200_DELL_D21] = {
1390 .type = HDA_FIXUP_PINS,
1391 .v.pins = dell9200_d21_pin_configs,
1392 },
1393 [STAC_9200_DELL_D22] = {
1394 .type = HDA_FIXUP_PINS,
1395 .v.pins = dell9200_d22_pin_configs,
1396 },
1397 [STAC_9200_DELL_D23] = {
1398 .type = HDA_FIXUP_PINS,
1399 .v.pins = dell9200_d23_pin_configs,
1400 },
1401 [STAC_9200_DELL_M21] = {
1402 .type = HDA_FIXUP_PINS,
1403 .v.pins = dell9200_m21_pin_configs,
1404 },
1405 [STAC_9200_DELL_M22] = {
1406 .type = HDA_FIXUP_PINS,
1407 .v.pins = dell9200_m22_pin_configs,
1408 },
1409 [STAC_9200_DELL_M23] = {
1410 .type = HDA_FIXUP_PINS,
1411 .v.pins = dell9200_m23_pin_configs,
1412 },
1413 [STAC_9200_DELL_M24] = {
1414 .type = HDA_FIXUP_PINS,
1415 .v.pins = dell9200_m24_pin_configs,
1416 },
1417 [STAC_9200_DELL_M25] = {
1418 .type = HDA_FIXUP_PINS,
1419 .v.pins = dell9200_m25_pin_configs,
1420 },
1421 [STAC_9200_DELL_M26] = {
1422 .type = HDA_FIXUP_PINS,
1423 .v.pins = dell9200_m26_pin_configs,
1424 },
1425 [STAC_9200_DELL_M27] = {
1426 .type = HDA_FIXUP_PINS,
1427 .v.pins = dell9200_m27_pin_configs,
1428 },
1429 [STAC_9200_M4] = {
1430 .type = HDA_FIXUP_PINS,
1431 .v.pins = gateway9200_m4_pin_configs,
1432 .chained = true,
1433 .chain_id = STAC_9200_EAPD_INIT,
1434 },
1435 [STAC_9200_M4_2] = {
1436 .type = HDA_FIXUP_PINS,
1437 .v.pins = gateway9200_m4_2_pin_configs,
1438 .chained = true,
1439 .chain_id = STAC_9200_EAPD_INIT,
1440 },
1441 [STAC_9200_PANASONIC] = {
1442 .type = HDA_FIXUP_FUNC,
1443 .v.func = stac9200_fixup_panasonic,
1444 },
1445 [STAC_9200_EAPD_INIT] = {
1446 .type = HDA_FIXUP_VERBS,
1447 .v.verbs = (const struct hda_verb[]) {
1448 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1449 {}
1450 },
1451 },
403d1944
MP		 1452};
1453
d39a3ae8
TI		 1454static const struct hda_model_fixup stac9200_models[] = {
1455 { .id = STAC_REF, .name = "ref" },
1456 { .id = STAC_9200_OQO, .name = "oqo" },
1457 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1458 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1459 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1460 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1461 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1462 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1463 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1464 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1465 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1466 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1467 { .id = STAC_9200_M4, .name = "gateway-m4" },
1468 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1469 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1470 {}
1471};
1472
1473static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
f5fcc13c
TI		 1474 /* SigmaTel reference board */
1475 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1476 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1477 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1478 "DFI LanParty", STAC_REF),
e7377071 1479 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1481 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1483 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1485 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1487 "unknown Dell", STAC_9200_DELL_D22),
1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1489 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1491 "Dell Latitude D620", STAC_9200_DELL_M22),
1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1493 "unknown Dell", STAC_9200_DELL_D23),
1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1495 "unknown Dell", STAC_9200_DELL_D23),
1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1497 "unknown Dell", STAC_9200_DELL_M22),
1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1499 "unknown Dell", STAC_9200_DELL_M24),
1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1501 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1503 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1505 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1507 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1509 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1511 "Dell Precision M90", STAC_9200_DELL_M23),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1513 "unknown Dell", STAC_9200_DELL_M22),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1515 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1517 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1519 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1521 "unknown Dell", STAC_9200_DELL_D23),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1523 "unknown Dell", STAC_9200_DELL_D23),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1525 "unknown Dell", STAC_9200_DELL_D21),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1527 "unknown Dell", STAC_9200_DELL_D23),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1529 "unknown Dell", STAC_9200_DELL_D21),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1531 "unknown Dell", STAC_9200_DELL_M25),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1533 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1535 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1537 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1538 /* Panasonic */
117f257d 1539 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1540 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1541 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1542 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1543 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1544 /* OQO Mobile */
1545 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1546 {} /* terminator */
1547};
1548
d2077d40
TI		 1549static const struct hda_pintbl ref925x_pin_configs[] = {
1550 { 0x07, 0x40c003f0 },
1551 { 0x08, 0x424503f2 },
1552 { 0x0a, 0x01813022 },
1553 { 0x0b, 0x02a19021 },
1554 { 0x0c, 0x90a70320 },
1555 { 0x0d, 0x02214210 },
1556 { 0x10, 0x01019020 },
1557 { 0x11, 0x9033032e },
1558 {}
8e21c34c
TD		 1559};
1560
d2077d40
TI		 1561static const struct hda_pintbl stac925xM1_pin_configs[] = {
1562 { 0x07, 0x40c003f4 },
1563 { 0x08, 0x424503f2 },
1564 { 0x0a, 0x400000f3 },
1565 { 0x0b, 0x02a19020 },
1566 { 0x0c, 0x40a000f0 },
1567 { 0x0d, 0x90100210 },
1568 { 0x10, 0x400003f1 },
1569 { 0x11, 0x9033032e },
1570 {}
8e21c34c
TD		 1571};
1572
d2077d40
TI		 1573static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1574 { 0x07, 0x40c003f4 },
1575 { 0x08, 0x424503f2 },
1576 { 0x0a, 0x400000f3 },
1577 { 0x0b, 0x02a19020 },
1578 { 0x0c, 0x40a000f0 },
1579 { 0x0d, 0x90100210 },
1580 { 0x10, 0x400003f1 },
1581 { 0x11, 0x9033032e },
1582 {}
9cb36c2a 1583};
58eec423 1584
d2077d40
TI		 1585static const struct hda_pintbl stac925xM2_pin_configs[] = {
1586 { 0x07, 0x40c003f4 },
1587 { 0x08, 0x424503f2 },
1588 { 0x0a, 0x400000f3 },
1589 { 0x0b, 0x02a19020 },
1590 { 0x0c, 0x40a000f0 },
1591 { 0x0d, 0x90100210 },
1592 { 0x10, 0x400003f1 },
1593 { 0x11, 0x9033032e },
1594 {}
2c11f955
TD		 1595};
1596
d2077d40
TI		 1597static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1598 { 0x07, 0x40c003f4 },
1599 { 0x08, 0x424503f2 },
1600 { 0x0a, 0x400000f3 },
1601 { 0x0b, 0x02a19020 },
1602 { 0x0c, 0x40a000f0 },
1603 { 0x0d, 0x90100210 },
1604 { 0x10, 0x400003f1 },
1605 { 0x11, 0x9033032e },
1606 {}
58eec423
MCC		 1607};
1608
d2077d40
TI		 1609static const struct hda_pintbl stac925xM3_pin_configs[] = {
1610 { 0x07, 0x40c003f4 },
1611 { 0x08, 0x424503f2 },
1612 { 0x0a, 0x400000f3 },
1613 { 0x0b, 0x02a19020 },
1614 { 0x0c, 0x40a000f0 },
1615 { 0x0d, 0x90100210 },
1616 { 0x10, 0x400003f1 },
1617 { 0x11, 0x503303f3 },
1618 {}
9cb36c2a 1619};
58eec423 1620
d2077d40
TI		 1621static const struct hda_pintbl stac925xM5_pin_configs[] = {
1622 { 0x07, 0x40c003f4 },
1623 { 0x08, 0x424503f2 },
1624 { 0x0a, 0x400000f3 },
1625 { 0x0b, 0x02a19020 },
1626 { 0x0c, 0x40a000f0 },
1627 { 0x0d, 0x90100210 },
1628 { 0x10, 0x400003f1 },
1629 { 0x11, 0x9033032e },
1630 {}
9cb36c2a
MCC		 1631};
1632
d2077d40
TI		 1633static const struct hda_pintbl stac925xM6_pin_configs[] = {
1634 { 0x07, 0x40c003f4 },
1635 { 0x08, 0x424503f2 },
1636 { 0x0a, 0x400000f3 },
1637 { 0x0b, 0x02a19020 },
1638 { 0x0c, 0x40a000f0 },
1639 { 0x0d, 0x90100210 },
1640 { 0x10, 0x400003f1 },
1641 { 0x11, 0x90330320 },
1642 {}
8e21c34c
TD		 1643};
1644
d2077d40
TI		 1645static const struct hda_fixup stac925x_fixups[] = {
1646 [STAC_REF] = {
1647 .type = HDA_FIXUP_PINS,
1648 .v.pins = ref925x_pin_configs,
1649 },
1650 [STAC_M1] = {
1651 .type = HDA_FIXUP_PINS,
1652 .v.pins = stac925xM1_pin_configs,
1653 },
1654 [STAC_M1_2] = {
1655 .type = HDA_FIXUP_PINS,
1656 .v.pins = stac925xM1_2_pin_configs,
1657 },
1658 [STAC_M2] = {
1659 .type = HDA_FIXUP_PINS,
1660 .v.pins = stac925xM2_pin_configs,
1661 },
1662 [STAC_M2_2] = {
1663 .type = HDA_FIXUP_PINS,
1664 .v.pins = stac925xM2_2_pin_configs,
1665 },
1666 [STAC_M3] = {
1667 .type = HDA_FIXUP_PINS,
1668 .v.pins = stac925xM3_pin_configs,
1669 },
1670 [STAC_M5] = {
1671 .type = HDA_FIXUP_PINS,
1672 .v.pins = stac925xM5_pin_configs,
1673 },
1674 [STAC_M6] = {
1675 .type = HDA_FIXUP_PINS,
1676 .v.pins = stac925xM6_pin_configs,
1677 },
8e21c34c
TD		 1678};
1679
d2077d40
TI		 1680static const struct hda_model_fixup stac925x_models[] = {
1681 { .id = STAC_REF, .name = "ref" },
1682 { .id = STAC_M1, .name = "m1" },
1683 { .id = STAC_M1_2, .name = "m1-2" },
1684 { .id = STAC_M2, .name = "m2" },
1685 { .id = STAC_M2_2, .name = "m2-2" },
1686 { .id = STAC_M3, .name = "m3" },
1687 { .id = STAC_M5, .name = "m5" },
1688 { .id = STAC_M6, .name = "m6" },
1689 {}
8e21c34c
TD		 1690};
1691
d2077d40
TI		 1692static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1693 /* SigmaTel reference board */
1694 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1695 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1696 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1697
1698 /* Default table for unknown ID */
1699 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1700
1701 /* gateway machines are checked via codec ssid */
58eec423
MCC		 1702 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1703 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1704 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1705 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1706 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1707 /* Not sure about the brand name for those */
1708 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1709 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1710 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1711 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1712 {} /* terminator */
8e21c34c
TD		 1713};
1714
55e30141
TI		 1715static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1716 { 0x0a, 0x02214030 },
1717 { 0x0b, 0x02a19040 },
1718 { 0x0c, 0x01a19020 },
1719 { 0x0d, 0x02214030 },
1720 { 0x0e, 0x0181302e },
1721 { 0x0f, 0x01014010 },
1722 { 0x10, 0x01014020 },
1723 { 0x11, 0x01014030 },
1724 { 0x12, 0x02319040 },
1725 { 0x13, 0x90a000f0 },
1726 { 0x14, 0x90a000f0 },
1727 { 0x22, 0x01452050 },
1728 { 0x23, 0x01452050 },
1729 {}
a7662640
MR		 1730};
1731
55e30141
TI		 1732static const struct hda_pintbl dell_m6_pin_configs[] = {
1733 { 0x0a, 0x0321101f },
1734 { 0x0b, 0x4f00000f },
1735 { 0x0c, 0x4f0000f0 },
1736 { 0x0d, 0x90170110 },
1737 { 0x0e, 0x03a11020 },
1738 { 0x0f, 0x0321101f },
1739 { 0x10, 0x4f0000f0 },
1740 { 0x11, 0x4f0000f0 },
1741 { 0x12, 0x4f0000f0 },
1742 { 0x13, 0x90a60160 },
1743 { 0x14, 0x4f0000f0 },
1744 { 0x22, 0x4f0000f0 },
1745 { 0x23, 0x4f0000f0 },
1746 {}
e1f0d669
MR		 1747};
1748
55e30141
TI		 1749static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1750 { 0x0a, 0x0321101f },
1751 { 0x0b, 0x0321101f },
1752 { 0x0c, 0x03a11020 },
1753 { 0x0d, 0x03014020 },
1754 { 0x0e, 0x90170110 },
1755 { 0x0f, 0x4f0000f0 },
1756 { 0x10, 0x4f0000f0 },
1757 { 0x11, 0x4f0000f0 },
1758 { 0x12, 0x4f0000f0 },
1759 { 0x13, 0x90a60160 },
1760 { 0x14, 0x4f0000f0 },
1761 { 0x22, 0x4f0000f0 },
1762 { 0x23, 0x904601b0 },
1763 {}
842ae638
TI		 1764};
1765
55e30141
TI		 1766static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1767 { 0x0a, 0x02214230 },
1768 { 0x0b, 0x02A19240 },
1769 { 0x0c, 0x01013214 },
1770 { 0x0d, 0x01014210 },
1771 { 0x0e, 0x01A19250 },
1772 { 0x0f, 0x01011212 },
1773 { 0x10, 0x01016211 },
1774 {}
52dc4386
AF		 1775};
1776
55e30141
TI		 1777static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1778 const struct hda_fixup *fix, int action)
1779{
1780 struct sigmatel_spec *spec = codec->spec;
1781
1782 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1783 return;
1784
1785 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1786 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1787}
1788
1789static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1790{
1791 struct sigmatel_spec *spec = codec->spec;
1792
1793 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
55e30141
TI		 1794 spec->eapd_switch = 0;
1795}
1796
1797static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1798 const struct hda_fixup *fix, int action)
1799{
1800 struct sigmatel_spec *spec = codec->spec;
1801
1802 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1803 return;
1804
1805 stac92hd73xx_fixup_dell(codec);
1806 snd_hda_add_verbs(codec, dell_eq_core_init);
1807 spec->volknob_init = 1;
1808}
1809
1810/* Analog Mics */
1811static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1812 const struct hda_fixup *fix, int action)
1813{
55e30141
TI		 1814 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1815 return;
1816
1817 stac92hd73xx_fixup_dell(codec);
1818 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
55e30141
TI		 1819}
1820
1821/* Digital Mics */
1822static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1823 const struct hda_fixup *fix, int action)
1824{
55e30141
TI		 1825 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1826 return;
1827
1828 stac92hd73xx_fixup_dell(codec);
1829 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
55e30141
TI		 1830}
1831
1832/* Both */
1833static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1834 const struct hda_fixup *fix, int action)
1835{
55e30141
TI		 1836 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1837 return;
1838
1839 stac92hd73xx_fixup_dell(codec);
1840 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1841 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
55e30141
TI		 1842}
1843
1844static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1845 const struct hda_fixup *fix, int action)
1846{
1847 struct sigmatel_spec *spec = codec->spec;
1848
1849 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1850 return;
1851
1852 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
55e30141
TI		 1853 spec->eapd_switch = 0;
1854}
1855
1856static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1857 const struct hda_fixup *fix, int action)
1858{
36c9db7a
TI		 1859 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1860 codec->no_jack_detect = 1;
55e30141
TI		 1861}
1862
1863static const struct hda_fixup stac92hd73xx_fixups[] = {
1864 [STAC_92HD73XX_REF] = {
1865 .type = HDA_FIXUP_FUNC,
1866 .v.func = stac92hd73xx_fixup_ref,
1867 },
1868 [STAC_DELL_M6_AMIC] = {
1869 .type = HDA_FIXUP_FUNC,
1870 .v.func = stac92hd73xx_fixup_dell_m6_amic,
1871 },
1872 [STAC_DELL_M6_DMIC] = {
1873 .type = HDA_FIXUP_FUNC,
1874 .v.func = stac92hd73xx_fixup_dell_m6_dmic,
1875 },
1876 [STAC_DELL_M6_BOTH] = {
1877 .type = HDA_FIXUP_FUNC,
1878 .v.func = stac92hd73xx_fixup_dell_m6_both,
1879 },
1880 [STAC_DELL_EQ] = {
1881 .type = HDA_FIXUP_FUNC,
1882 .v.func = stac92hd73xx_fixup_dell_eq,
1883 },
1884 [STAC_ALIENWARE_M17X] = {
1885 .type = HDA_FIXUP_FUNC,
1886 .v.func = stac92hd73xx_fixup_alienware_m17x,
1887 },
1888 [STAC_92HD73XX_INTEL] = {
1889 .type = HDA_FIXUP_PINS,
1890 .v.pins = intel_dg45id_pin_configs,
1891 },
1892 [STAC_92HD73XX_NO_JD] = {
1893 .type = HDA_FIXUP_FUNC,
1894 .v.func = stac92hd73xx_fixup_no_jd,
1895 }
e1f0d669
MR		 1896};
1897
55e30141
TI		 1898static const struct hda_model_fixup stac92hd73xx_models[] = {
1899 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1900 { .id = STAC_92HD73XX_REF, .name = "ref" },
1901 { .id = STAC_92HD73XX_INTEL, .name = "intel" },
1902 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1903 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1904 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1905 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1906 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1907 {}
e1f0d669
MR		 1908};
1909
55e30141 1910static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
e1f0d669
MR		 1911 /* SigmaTel reference board */
1912 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1913 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1914 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1915 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF		 1916 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1917 "Intel DG45ID", STAC_92HD73XX_INTEL),
1918 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1919 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1920 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1921 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1922 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1923 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1924 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1925 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1926 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1927 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1928 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1929 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1930 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1931 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1932 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1933 "unknown Dell", STAC_DELL_M6_DMIC),
1934 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1935 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1936 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1937 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1938 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1939 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1940 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1941 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB		 1942 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1943 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf 1944 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
ffe535ed 1945 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
5c1bccf6 1946 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
e033ebfb 1947 "Dell Studio 1558", STAC_DELL_M6_DMIC),
55e30141 1948 /* codec SSID matching */
842ae638
TI		 1949 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1950 "Alienware M17x", STAC_ALIENWARE_M17X),
0defe09c
DC		 1951 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1952 "Alienware M17x", STAC_ALIENWARE_M17X),
dbd1b547 1953 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
b9ecc4ee 1954 "Alienware M17x R3", STAC_DELL_EQ),
842ae638
TI		 1955 {} /* terminator */
1956};
1957
372f8c75
TI		 1958static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
1959 { 0x0a, 0x02214030 },
1960 { 0x0b, 0x02211010 },
1961 { 0x0c, 0x02a19020 },
1962 { 0x0d, 0x02170130 },
1963 { 0x0e, 0x01014050 },
1964 { 0x0f, 0x01819040 },
1965 { 0x10, 0x01014020 },
1966 { 0x11, 0x90a3014e },
1967 { 0x1f, 0x01451160 },
1968 { 0x20, 0x98560170 },
1969 {}
d0513fc6
MR		 1970};
1971
372f8c75
TI		 1972static const struct hda_pintbl dell_s14_pin_configs[] = {
1973 { 0x0a, 0x0221403f },
1974 { 0x0b, 0x0221101f },
1975 { 0x0c, 0x02a19020 },
1976 { 0x0d, 0x90170110 },
1977 { 0x0e, 0x40f000f0 },
1978 { 0x0f, 0x40f000f0 },
1979 { 0x10, 0x40f000f0 },
1980 { 0x11, 0x90a60160 },
1981 { 0x1f, 0x40f000f0 },
1982 { 0x20, 0x40f000f0 },
1983 {}
8bb0ac55
MR		 1984};
1985
372f8c75
TI		 1986static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
1987 { 0x0a, 0x02a11020 },
1988 { 0x0b, 0x0221101f },
1989 { 0x0c, 0x400000f0 },
1990 { 0x0d, 0x90170110 },
1991 { 0x0e, 0x400000f1 },
1992 { 0x0f, 0x400000f2 },
1993 { 0x10, 0x400000f3 },
1994 { 0x11, 0x90a60160 },
1995 { 0x1f, 0x400000f4 },
1996 { 0x20, 0x400000f5 },
1997 {}
f7f9bdfa
JW		 1998};
1999
372f8c75
TI		 2000static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2001 { 0x0a, 0x03a12050 },
2002 { 0x0b, 0x0321201f },
2003 { 0x0c, 0x40f000f0 },
2004 { 0x0d, 0x90170110 },
2005 { 0x0e, 0x40f000f0 },
2006 { 0x0f, 0x40f000f0 },
2007 { 0x10, 0x90170110 },
2008 { 0x11, 0xd5a30140 },
2009 { 0x1f, 0x40f000f0 },
2010 { 0x20, 0x40f000f0 },
2011 {}
48315590
SE		 2012};
2013
372f8c75
TI		 2014static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2015 { 0x0a, 0x01813050 },
2016 { 0x0b, 0x0421201f },
2017 { 0x0c, 0x04a1205e },
2018 { 0x0d, 0x96130310 },
2019 { 0x0e, 0x96130310 },
2020 { 0x0f, 0x0101401f },
2021 { 0x10, 0x1111611f },
2022 { 0x11, 0xd5a30130 },
2023 {}
5556e147
VK		 2024};
2025
372f8c75
TI		 2026static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2027 { 0x0a, 0x40f000f0 },
2028 { 0x0b, 0x0221101f },
2029 { 0x0c, 0x02a11020 },
2030 { 0x0d, 0x92170110 },
2031 { 0x0e, 0x40f000f0 },
2032 { 0x0f, 0x92170110 },
2033 { 0x10, 0x40f000f0 },
2034 { 0x11, 0xd5a30130 },
2035 { 0x1f, 0x40f000f0 },
2036 { 0x20, 0x40f000f0 },
2037 {}
0c27c180
VK		 2038};
2039
372f8c75
TI		 2040static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2041 const struct hda_fixup *fix, int action)
2042{
2043 struct sigmatel_spec *spec = codec->spec;
2044
2045 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2046 return;
2047
2048 if (hp_bnb2011_with_dock(codec)) {
2049 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2050 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2051 }
2052
2053 if (find_mute_led_cfg(codec, spec->default_polarity))
2054 snd_printd("mute LED gpio %d polarity %d\n",
2055 spec->gpio_led,
2056 spec->gpio_led_polarity);
2057}
2058
2059static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2060 const struct hda_fixup *fix, int action)
2061{
2062 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2063 return;
2064
2065 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2066 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2067}
2068
2069static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2070 const struct hda_fixup *fix, int action)
2071{
2072 struct sigmatel_spec *spec = codec->spec;
2073
2074 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2075 spec->default_polarity = 0;
2076}
2077
2078static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2079 const struct hda_fixup *fix, int action)
2080{
2081 struct sigmatel_spec *spec = codec->spec;
2082
2083 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2084 spec->default_polarity = 1;
2085}
2086
2087static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2088 const struct hda_fixup *fix, int action)
2089{
2090 struct sigmatel_spec *spec = codec->spec;
2091
2092 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2093 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
2094}
2095
2096static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2097 const struct hda_fixup *fix, int action)
2098{
2099 struct sigmatel_spec *spec = codec->spec;
2100
2101 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2102 spec->headset_jack = 1;
2103}
2104
2105static const struct hda_fixup stac92hd83xxx_fixups[] = {
2106 [STAC_92HD83XXX_REF] = {
2107 .type = HDA_FIXUP_PINS,
2108 .v.pins = ref92hd83xxx_pin_configs,
2109 },
2110 [STAC_92HD83XXX_PWR_REF] = {
2111 .type = HDA_FIXUP_PINS,
2112 .v.pins = ref92hd83xxx_pin_configs,
2113 },
2114 [STAC_DELL_S14] = {
2115 .type = HDA_FIXUP_PINS,
2116 .v.pins = dell_s14_pin_configs,
2117 },
2118 [STAC_DELL_VOSTRO_3500] = {
2119 .type = HDA_FIXUP_PINS,
2120 .v.pins = dell_vostro_3500_pin_configs,
2121 },
2122 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2123 .type = HDA_FIXUP_PINS,
2124 .v.pins = hp_cNB11_intquad_pin_configs,
2125 .chained = true,
2126 .chain_id = STAC_92HD83XXX_HP,
2127 },
2128 [STAC_92HD83XXX_HP] = {
2129 .type = HDA_FIXUP_FUNC,
2130 .v.func = stac92hd83xxx_fixup_hp,
2131 },
2132 [STAC_HP_DV7_4000] = {
2133 .type = HDA_FIXUP_PINS,
2134 .v.pins = hp_dv7_4000_pin_configs,
2135 .chained = true,
2136 .chain_id = STAC_92HD83XXX_HP,
2137 },
2138 [STAC_HP_ZEPHYR] = {
2139 .type = HDA_FIXUP_FUNC,
2140 .v.func = stac92hd83xxx_fixup_hp_zephyr,
2141 .chained = true,
2142 .chain_id = STAC_92HD83XXX_HP,
2143 },
2144 [STAC_92HD83XXX_HP_LED] = {
2145 .type = HDA_FIXUP_FUNC,
2146 .v.func = stac92hd83xxx_fixup_hp_led,
2147 .chained = true,
2148 .chain_id = STAC_92HD83XXX_HP,
2149 },
2150 [STAC_92HD83XXX_HP_INV_LED] = {
2151 .type = HDA_FIXUP_FUNC,
2152 .v.func = stac92hd83xxx_fixup_hp_inv_led,
2153 .chained = true,
2154 .chain_id = STAC_92HD83XXX_HP,
2155 },
2156 [STAC_92HD83XXX_HP_MIC_LED] = {
2157 .type = HDA_FIXUP_FUNC,
2158 .v.func = stac92hd83xxx_fixup_hp_mic_led,
2159 .chained = true,
2160 .chain_id = STAC_92HD83XXX_HP,
2161 },
2162 [STAC_92HD83XXX_HEADSET_JACK] = {
2163 .type = HDA_FIXUP_FUNC,
2164 .v.func = stac92hd83xxx_fixup_headset_jack,
2165 },
49920427
TI		 2166 [STAC_HP_ENVY_BASS] = {
2167 .type = HDA_FIXUP_PINS,
2168 .v.pins = (const struct hda_pintbl[]) {
2169 { 0x0f, 0x90170111 },
2170 {}
2171 },
2172 },
d0513fc6
MR		 2173};
2174
372f8c75
TI		 2175static const struct hda_model_fixup stac92hd83xxx_models[] = {
2176 { .id = STAC_92HD83XXX_REF, .name = "ref" },
2177 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2178 { .id = STAC_DELL_S14, .name = "dell-s14" },
2179 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2180 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2181 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2182 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2183 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2184 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2185 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2186 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
49920427 2187 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
372f8c75 2188 {}
d0513fc6
MR		 2189};
2190
372f8c75 2191static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
d0513fc6
MR		 2192 /* SigmaTel reference board */
2193 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 2194 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 2195 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2196 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 2197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2198 "unknown Dell", STAC_DELL_S14),
8d032a8f
DH		 2199 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2200 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2202 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2203 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2204 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2205 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2206 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2207 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2208 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2209 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2210 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2211 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2212 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2213 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2214 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2215 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2216 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
f7f9bdfa
JW		 2217 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2218 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
0c27c180
VK		 2219 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2220 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2221 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2222 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2223 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2224 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2225 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
8ae5865e 2226 "HP Pavilion dv7", STAC_HP_DV7_4000),
0c27c180
VK		 2227 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2228 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2229 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2230 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
49920427
TI		 2231 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2232 "HP Envy Spectre", STAC_HP_ENVY_BASS),
62cbde18
TI		 2233 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
2234 "HP Folio", STAC_92HD83XXX_HP_MIC_LED),
f9afed1f
TI		 2235 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2236 "HP", STAC_92HD83XXX_HP_MIC_LED),
0c27c180
VK		 2237 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2238 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2239 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2240 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2241 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2242 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2243 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2244 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2245 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2246 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2247 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2248 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2249 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2250 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2251 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2252 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2253 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2254 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2255 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2256 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2257 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2258 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2259 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2260 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2261 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2262 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2263 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2264 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
5556e147
VK		 2265 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2266 "HP", STAC_HP_ZEPHYR),
a3e19973
TI		 2267 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2268 "HP Mini", STAC_92HD83XXX_HP_LED),
5afc13af
GMDV		 2269 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2270 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
8c698fe2
TI		 2271 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2272 "HP Mini", STAC_92HD83XXX_HP_LED),
372f8c75 2273 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
574f3c4f 2274 {} /* terminator */
d0513fc6
MR		 2275};
2276
36c9db7a
TI		 2277/* HP dv7 bass switch - GPIO5 */
2278#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
2279static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2280 struct snd_ctl_elem_value *ucontrol)
2281{
2282 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2283 struct sigmatel_spec *spec = codec->spec;
2284 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2285 return 0;
2286}
2287
2288static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2289 struct snd_ctl_elem_value *ucontrol)
2290{
2291 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2292 struct sigmatel_spec *spec = codec->spec;
2293 unsigned int gpio_data;
2294
2295 gpio_data = (spec->gpio_data & ~0x20) |
2296 (ucontrol->value.integer.value[0] ? 0x20 : 0);
2297 if (gpio_data == spec->gpio_data)
2298 return 0;
2299 spec->gpio_data = gpio_data;
2300 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2301 return 1;
2302}
2303
2304static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2305 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2306 .info = stac_hp_bass_gpio_info,
2307 .get = stac_hp_bass_gpio_get,
2308 .put = stac_hp_bass_gpio_put,
2309};
2310
2311static int stac_add_hp_bass_switch(struct hda_codec *codec)
2312{
2313 struct sigmatel_spec *spec = codec->spec;
2314
2315 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2316 &stac_hp_bass_sw_ctrl))
2317 return -ENOMEM;
2318
2319 spec->gpio_mask |= 0x20;
2320 spec->gpio_dir |= 0x20;
2321 spec->gpio_data |= 0x20;
2322 return 0;
2323}
2324
0f6fcb73
TI		 2325static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2326 { 0x0a, 0x02214030 },
2327 { 0x0b, 0x02a19040 },
2328 { 0x0c, 0x01a19020 },
2329 { 0x0d, 0x01014010 },
2330 { 0x0e, 0x0181302e },
2331 { 0x0f, 0x01014010 },
2332 { 0x14, 0x01019020 },
2333 { 0x18, 0x90a000f0 },
2334 { 0x19, 0x90a000f0 },
2335 { 0x1e, 0x01452050 },
2336 { 0x1f, 0x01452050 },
2337 {}
e035b841
MR		 2338};
2339
0f6fcb73
TI		 2340static const struct hda_pintbl dell_m4_1_pin_configs[] = {
2341 { 0x0a, 0x0421101f },
2342 { 0x0b, 0x04a11221 },
2343 { 0x0c, 0x40f000f0 },
2344 { 0x0d, 0x90170110 },
2345 { 0x0e, 0x23a1902e },
2346 { 0x0f, 0x23014250 },
2347 { 0x14, 0x40f000f0 },
2348 { 0x18, 0x90a000f0 },
2349 { 0x19, 0x40f000f0 },
2350 { 0x1e, 0x4f0000f0 },
2351 { 0x1f, 0x4f0000f0 },
2352 {}
a7662640
MR		 2353};
2354
0f6fcb73
TI		 2355static const struct hda_pintbl dell_m4_2_pin_configs[] = {
2356 { 0x0a, 0x0421101f },
2357 { 0x0b, 0x04a11221 },
2358 { 0x0c, 0x90a70330 },
2359 { 0x0d, 0x90170110 },
2360 { 0x0e, 0x23a1902e },
2361 { 0x0f, 0x23014250 },
2362 { 0x14, 0x40f000f0 },
2363 { 0x18, 0x40f000f0 },
2364 { 0x19, 0x40f000f0 },
2365 { 0x1e, 0x044413b0 },
2366 { 0x1f, 0x044413b0 },
2367 {}
a7662640
MR		 2368};
2369
0f6fcb73
TI		 2370static const struct hda_pintbl dell_m4_3_pin_configs[] = {
2371 { 0x0a, 0x0421101f },
2372 { 0x0b, 0x04a11221 },
2373 { 0x0c, 0x90a70330 },
2374 { 0x0d, 0x90170110 },
2375 { 0x0e, 0x40f000f0 },
2376 { 0x0f, 0x40f000f0 },
2377 { 0x14, 0x40f000f0 },
2378 { 0x18, 0x90a000f0 },
2379 { 0x19, 0x40f000f0 },
2380 { 0x1e, 0x044413b0 },
2381 { 0x1f, 0x044413b0 },
2382 {}
3a7abfd2
MR		 2383};
2384
0f6fcb73
TI		 2385static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
2386 const struct hda_fixup *fix, int action)
2387{
2388 struct sigmatel_spec *spec = codec->spec;
2389
2390 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2391 return;
2392
2393 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
2394 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
2395}
2396
0f6fcb73
TI		 2397static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
2398 const struct hda_fixup *fix, int action)
2399{
2400 struct sigmatel_spec *spec = codec->spec;
36c9db7a 2401 struct hda_jack_tbl *jack;
0f6fcb73
TI		 2402
2403 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2404 return;
2405
2406 /* Enable VREF power saving on GPIO1 detect */
0f6fcb73
TI		 2407 snd_hda_codec_write_cache(codec, codec->afg, 0,
2408 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
36c9db7a
TI		 2409 snd_hda_jack_detect_enable_callback(codec, codec->afg,
2410 STAC_VREF_EVENT,
2411 stac_vref_event);
2412 jack = snd_hda_jack_tbl_get(codec, codec->afg);
2413 if (jack)
2414 jack->private_data = 0x02;
2415
0f6fcb73
TI		 2416 spec->gpio_mask |= 0x02;
2417
2418 /* enable internal microphone */
2419 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
0f6fcb73
TI		 2420}
2421
2422static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
2423 const struct hda_fixup *fix, int action)
2424{
2425 struct sigmatel_spec *spec = codec->spec;
2426
2427 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2428 return;
2429 spec->gpio_led = 0x01;
2430}
2431
2432static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
2433 const struct hda_fixup *fix, int action)
2434{
0f6fcb73
TI		 2435 unsigned int cap;
2436
2437 switch (action) {
2438 case HDA_FIXUP_ACT_PRE_PROBE:
2439 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
f6655d52
TI		 2440 break;
2441
2442 case HDA_FIXUP_ACT_PROBE:
0f6fcb73
TI		 2443 /* enable bass on HP dv7 */
2444 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
2445 cap &= AC_GPIO_IO_COUNT;
2446 if (cap >= 6)
2447 stac_add_hp_bass_switch(codec);
2448 break;
2449 }
2450}
2451
2452static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
2453 const struct hda_fixup *fix, int action)
2454{
2455 struct sigmatel_spec *spec = codec->spec;
2456
2457 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2458 return;
2459 spec->gpio_led = 0x08;
0f6fcb73
TI		 2460}
2461
2462
2463static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
2464 const struct hda_fixup *fix, int action)
2465{
2466 struct sigmatel_spec *spec = codec->spec;
2467
2468 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2469 return;
2470
2471 if (hp_blike_system(codec->subsystem_id)) {
2472 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
2473 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
2474 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
2475 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
2476 /* It was changed in the BIOS to just satisfy MS DTM.
2477 * Lets turn it back into slaved HP
2478 */
2479 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
2480 | (AC_JACK_HP_OUT <<
2481 AC_DEFCFG_DEVICE_SHIFT);
2482 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
2483 | AC_DEFCFG_SEQUENCE)))
2484 | 0x1f;
2485 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
2486 }
2487 }
2488
36c9db7a 2489 if (find_mute_led_cfg(codec, 1))
0f6fcb73
TI		 2490 snd_printd("mute LED gpio %d polarity %d\n",
2491 spec->gpio_led,
2492 spec->gpio_led_polarity);
2493
2494}
2495
2496static const struct hda_fixup stac92hd71bxx_fixups[] = {
2497 [STAC_92HD71BXX_REF] = {
2498 .type = HDA_FIXUP_FUNC,
2499 .v.func = stac92hd71bxx_fixup_ref,
2500 },
2501 [STAC_DELL_M4_1] = {
2502 .type = HDA_FIXUP_PINS,
2503 .v.pins = dell_m4_1_pin_configs,
0f6fcb73
TI		 2504 },
2505 [STAC_DELL_M4_2] = {
2506 .type = HDA_FIXUP_PINS,
2507 .v.pins = dell_m4_2_pin_configs,
0f6fcb73
TI		 2508 },
2509 [STAC_DELL_M4_3] = {
2510 .type = HDA_FIXUP_PINS,
2511 .v.pins = dell_m4_3_pin_configs,
0f6fcb73
TI		 2512 },
2513 [STAC_HP_M4] = {
2514 .type = HDA_FIXUP_FUNC,
2515 .v.func = stac92hd71bxx_fixup_hp_m4,
2516 .chained = true,
2517 .chain_id = STAC_92HD71BXX_HP,
2518 },
2519 [STAC_HP_DV4] = {
2520 .type = HDA_FIXUP_FUNC,
2521 .v.func = stac92hd71bxx_fixup_hp_dv4,
2522 .chained = true,
2523 .chain_id = STAC_HP_DV5,
2524 },
2525 [STAC_HP_DV5] = {
2526 .type = HDA_FIXUP_FUNC,
2527 .v.func = stac92hd71bxx_fixup_hp_dv5,
2528 .chained = true,
2529 .chain_id = STAC_92HD71BXX_HP,
2530 },
2531 [STAC_HP_HDX] = {
2532 .type = HDA_FIXUP_FUNC,
2533 .v.func = stac92hd71bxx_fixup_hp_hdx,
2534 .chained = true,
2535 .chain_id = STAC_92HD71BXX_HP,
2536 },
36c9db7a 2537 [STAC_92HD71BXX_HP] = {
0f6fcb73 2538 .type = HDA_FIXUP_FUNC,
36c9db7a 2539 .v.func = stac92hd71bxx_fixup_hp,
0f6fcb73 2540 },
e035b841
MR		 2541};
2542
0f6fcb73
TI		 2543static const struct hda_model_fixup stac92hd71bxx_models[] = {
2544 { .id = STAC_92HD71BXX_REF, .name = "ref" },
2545 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
2546 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
2547 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
2548 { .id = STAC_HP_M4, .name = "hp-m4" },
2549 { .id = STAC_HP_DV4, .name = "hp-dv4" },
2550 { .id = STAC_HP_DV5, .name = "hp-dv5" },
2551 { .id = STAC_HP_HDX, .name = "hp-hdx" },
36c9db7a 2552 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
0f6fcb73 2553 {}
e035b841
MR		 2554};
2555
0f6fcb73 2556static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
e035b841
MR		 2557 /* SigmaTel reference board */
2558 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2559 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 2560 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2561 "DFI LanParty", STAC_92HD71BXX_REF),
5bdaaada
VK		 2562 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
2563 "HP", STAC_HP_DV5),
58d8395b
TI		 2564 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
2565 "HP", STAC_HP_DV5),
2ae466f8 2566 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 2567 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI		 2568 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
2569 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 2570 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
2571 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 2572 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 2573 "HP mini 1000", STAC_HP_M4),
ae6241fb 2574 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 2575 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 2576 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
2577 "HP dv6", STAC_HP_DV5),
e3d2530a
KG		 2578 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
2579 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY		 2580 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
2581 "HP DV6", STAC_HP_DV5),
1972d025
TI		 2582 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
2583 "HP", STAC_HP_DV5),
0f6fcb73 2584 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
a7662640
MR		 2585 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
2586 "unknown Dell", STAC_DELL_M4_1),
2587 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
2588 "unknown Dell", STAC_DELL_M4_1),
2589 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
2590 "unknown Dell", STAC_DELL_M4_1),
2591 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
2592 "unknown Dell", STAC_DELL_M4_1),
2593 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
2594 "unknown Dell", STAC_DELL_M4_1),
2595 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
2596 "unknown Dell", STAC_DELL_M4_1),
2597 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
2598 "unknown Dell", STAC_DELL_M4_1),
2599 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
2600 "unknown Dell", STAC_DELL_M4_2),
2601 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
2602 "unknown Dell", STAC_DELL_M4_2),
2603 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
2604 "unknown Dell", STAC_DELL_M4_2),
2605 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
2606 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 2607 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
2608 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 2609 {} /* terminator */
2610};
2611
0a427846
TI		 2612static const struct hda_pintbl ref922x_pin_configs[] = {
2613 { 0x0a, 0x01014010 },
2614 { 0x0b, 0x01016011 },
2615 { 0x0c, 0x01012012 },
2616 { 0x0d, 0x0221401f },
2617 { 0x0e, 0x01813122 },
2618 { 0x0f, 0x01011014 },
2619 { 0x10, 0x01441030 },
2620 { 0x11, 0x01c41030 },
2621 { 0x15, 0x40000100 },
2622 { 0x1b, 0x40000100 },
2623 {}
2f2f4251
M		 2624};
2625
dfe495d0
TI		 2626/*
2627 STAC 922X pin configs for
2628 102801A7
2629 102801AB
2630 102801A9
2631 102801D1
2632 102801D2
2633*/
0a427846
TI		 2634static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
2635 { 0x0a, 0x02214030 },
2636 { 0x0b, 0x01a19021 },
2637 { 0x0c, 0x01111012 },
2638 { 0x0d, 0x01114010 },
2639 { 0x0e, 0x02a19020 },
2640 { 0x0f, 0x01117011 },
2641 { 0x10, 0x400001f0 },
2642 { 0x11, 0x400001f1 },
2643 { 0x15, 0x01813122 },
2644 { 0x1b, 0x400001f2 },
2645 {}
dfe495d0
TI		 2646};
2647
2648/*
2649 STAC 922X pin configs for
2650 102801AC
2651 102801D0
2652*/
0a427846
TI		 2653static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
2654 { 0x0a, 0x02214030 },
2655 { 0x0b, 0x01a19021 },
2656 { 0x0c, 0x01111012 },
2657 { 0x0d, 0x01114010 },
2658 { 0x0e, 0x02a19020 },
2659 { 0x0f, 0x01117011 },
2660 { 0x10, 0x01451140 },
2661 { 0x11, 0x400001f0 },
2662 { 0x15, 0x01813122 },
2663 { 0x1b, 0x400001f1 },
2664 {}
dfe495d0
TI		 2665};
2666
2667/*
2668 STAC 922X pin configs for
2669 102801BF
2670*/
0a427846
TI		 2671static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
2672 { 0x0a, 0x0321101f },
2673 { 0x0b, 0x01112024 },
2674 { 0x0c, 0x01111222 },
2675 { 0x0d, 0x91174220 },
2676 { 0x0e, 0x03a11050 },
2677 { 0x0f, 0x01116221 },
2678 { 0x10, 0x90a70330 },
2679 { 0x11, 0x01452340 },
2680 { 0x15, 0x40C003f1 },
2681 { 0x1b, 0x405003f0 },
2682 {}
dfe495d0
TI		 2683};
2684
2685/*
2686 STAC 9221 A1 pin configs for
2687 102801D7 (Dell XPS M1210)
2688*/
0a427846
TI		 2689static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
2690 { 0x0a, 0x02211211 },
2691 { 0x0b, 0x408103ff },
2692 { 0x0c, 0x02a1123e },
2693 { 0x0d, 0x90100310 },
2694 { 0x0e, 0x408003f1 },
2695 { 0x0f, 0x0221121f },
2696 { 0x10, 0x03451340 },
2697 { 0x11, 0x40c003f2 },
2698 { 0x15, 0x508003f3 },
2699 { 0x1b, 0x405003f4 },
2700 {}
dfe495d0
TI		 2701};
2702
0a427846
TI		 2703static const struct hda_pintbl d945gtp3_pin_configs[] = {
2704 { 0x0a, 0x0221401f },
2705 { 0x0b, 0x01a19022 },
2706 { 0x0c, 0x01813021 },
2707 { 0x0d, 0x01014010 },
2708 { 0x0e, 0x40000100 },
2709 { 0x0f, 0x40000100 },
2710 { 0x10, 0x40000100 },
2711 { 0x11, 0x40000100 },
2712 { 0x15, 0x02a19120 },
2713 { 0x1b, 0x40000100 },
2714 {}
2715};
2716
2717static const struct hda_pintbl d945gtp5_pin_configs[] = {
2718 { 0x0a, 0x0221401f },
2719 { 0x0b, 0x01011012 },
2720 { 0x0c, 0x01813024 },
2721 { 0x0d, 0x01014010 },
2722 { 0x0e, 0x01a19021 },
2723 { 0x0f, 0x01016011 },
2724 { 0x10, 0x01452130 },
2725 { 0x11, 0x40000100 },
2726 { 0x15, 0x02a19320 },
2727 { 0x1b, 0x40000100 },
2728 {}
403d1944
MP		 2729};
2730
0a427846
TI		 2731static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
2732 { 0x0a, 0x0121e21f },
2733 { 0x0b, 0x400000ff },
2734 { 0x0c, 0x9017e110 },
2735 { 0x0d, 0x400000fd },
2736 { 0x0e, 0x400000fe },
2737 { 0x0f, 0x0181e020 },
2738 { 0x10, 0x1145e030 },
2739 { 0x11, 0x11c5e240 },
2740 { 0x15, 0x400000fc },
2741 { 0x1b, 0x400000fb },
2742 {}
403d1944
MP		 2743};
2744
0a427846
TI		 2745static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
2746 { 0x0a, 0x0121e21f },
2747 { 0x0b, 0x90a7012e },
2748 { 0x0c, 0x9017e110 },
2749 { 0x0d, 0x400000fd },
2750 { 0x0e, 0x400000fe },
2751 { 0x0f, 0x0181e020 },
2752 { 0x10, 0x1145e230 },
2753 { 0x11, 0x500000fa },
2754 { 0x15, 0x400000fc },
2755 { 0x1b, 0x400000fb },
2756 {}
5d5d3bc3
IZ		 2757};
2758
0a427846
TI		 2759static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
2760 { 0x0a, 0x0121e21f },
2761 { 0x0b, 0x90a7012e },
2762 { 0x0c, 0x9017e110 },
2763 { 0x0d, 0x400000fd },
2764 { 0x0e, 0x400000fe },
2765 { 0x0f, 0x0181e020 },
2766 { 0x10, 0x1145e230 },
2767 { 0x11, 0x11c5e240 },
2768 { 0x15, 0x400000fc },
2769 { 0x1b, 0x400000fb },
2770 {}
6f0778d8
NB		 2771};
2772
0a427846
TI		 2773static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
2774 { 0x0a, 0x0321e21f },
2775 { 0x0b, 0x03a1e02e },
2776 { 0x0c, 0x9017e110 },
2777 { 0x0d, 0x9017e11f },
2778 { 0x0e, 0x400000fe },
2779 { 0x0f, 0x0381e020 },
2780 { 0x10, 0x1345e230 },
2781 { 0x11, 0x13c5e240 },
2782 { 0x15, 0x400000fc },
2783 { 0x1b, 0x400000fb },
2784 {}
3fc24d85
TI		 2785};
2786
0a427846
TI		 2787static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
2788 { 0x0a, 0x0321e21f },
2789 { 0x0b, 0x03a1e02e },
2790 { 0x0c, 0x9017e110 },
2791 { 0x0d, 0x9017e11f },
2792 { 0x0e, 0x400000fe },
2793 { 0x0f, 0x0381e020 },
2794 { 0x10, 0x1345e230 },
2795 { 0x11, 0x13c5e240 },
2796 { 0x15, 0x400000fc },
2797 { 0x1b, 0x400000fb },
2798 {}
f16928fb
SF		 2799};
2800
0a427846
TI		 2801static const struct hda_pintbl ecs202_pin_configs[] = {
2802 { 0x0a, 0x0221401f },
2803 { 0x0b, 0x02a19020 },
2804 { 0x0c, 0x01a19020 },
2805 { 0x0d, 0x01114010 },
2806 { 0x0e, 0x408000f0 },
2807 { 0x0f, 0x01813022 },
2808 { 0x10, 0x074510a0 },
2809 { 0x11, 0x40c400f1 },
2810 { 0x15, 0x9037012e },
2811 { 0x1b, 0x40e000f2 },
2812 {}
0dae0f83
TI		 2813};
2814
0a427846
TI		 2815/* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
2816static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
2817 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
2818 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
2819 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
2820 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
2821 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
2822 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
2823 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
2824 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
2825 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
2826 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
2827 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
2828 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
2829 {}
8c650087 2830};
76c08828 2831
0a427846
TI		 2832static const struct hda_fixup stac922x_fixups[];
2833
2834/* remap the fixup from codec SSID and apply it */
2835static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
2836 const struct hda_fixup *fix,
2837 int action)
2838{
2839 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2840 return;
2841 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
2842 stac922x_fixups);
2843 if (codec->fixup_id != STAC_INTEL_MAC_AUTO)
2844 snd_hda_apply_fixup(codec, action);
2845}
2846
2847static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
2848 const struct hda_fixup *fix,
2849 int action)
2850{
2851 struct sigmatel_spec *spec = codec->spec;
2852
2853 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2854 spec->gpio_mask = spec->gpio_dir = 0x03;
2855 spec->gpio_data = 0x03;
2856 }
2857}
2858
2859static const struct hda_fixup stac922x_fixups[] = {
2860 [STAC_D945_REF] = {
2861 .type = HDA_FIXUP_PINS,
2862 .v.pins = ref922x_pin_configs,
2863 },
2864 [STAC_D945GTP3] = {
2865 .type = HDA_FIXUP_PINS,
2866 .v.pins = d945gtp3_pin_configs,
2867 },
2868 [STAC_D945GTP5] = {
2869 .type = HDA_FIXUP_PINS,
2870 .v.pins = d945gtp5_pin_configs,
2871 },
2872 [STAC_INTEL_MAC_AUTO] = {
2873 .type = HDA_FIXUP_FUNC,
2874 .v.func = stac922x_fixup_intel_mac_auto,
2875 },
2876 [STAC_INTEL_MAC_V1] = {
2877 .type = HDA_FIXUP_PINS,
2878 .v.pins = intel_mac_v1_pin_configs,
2879 .chained = true,
2880 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2881 },
2882 [STAC_INTEL_MAC_V2] = {
2883 .type = HDA_FIXUP_PINS,
2884 .v.pins = intel_mac_v2_pin_configs,
2885 .chained = true,
2886 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2887 },
2888 [STAC_INTEL_MAC_V3] = {
2889 .type = HDA_FIXUP_PINS,
2890 .v.pins = intel_mac_v3_pin_configs,
2891 .chained = true,
2892 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2893 },
2894 [STAC_INTEL_MAC_V4] = {
2895 .type = HDA_FIXUP_PINS,
2896 .v.pins = intel_mac_v4_pin_configs,
2897 .chained = true,
2898 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2899 },
2900 [STAC_INTEL_MAC_V5] = {
2901 .type = HDA_FIXUP_PINS,
2902 .v.pins = intel_mac_v5_pin_configs,
2903 .chained = true,
2904 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2905 },
2906 [STAC_922X_INTEL_MAC_GPIO] = {
2907 .type = HDA_FIXUP_FUNC,
2908 .v.func = stac922x_fixup_intel_mac_gpio,
2909 },
2910 [STAC_ECS_202] = {
2911 .type = HDA_FIXUP_PINS,
2912 .v.pins = ecs202_pin_configs,
2913 },
2914 [STAC_922X_DELL_D81] = {
2915 .type = HDA_FIXUP_PINS,
2916 .v.pins = dell_922x_d81_pin_configs,
2917 },
2918 [STAC_922X_DELL_D82] = {
2919 .type = HDA_FIXUP_PINS,
2920 .v.pins = dell_922x_d82_pin_configs,
2921 },
2922 [STAC_922X_DELL_M81] = {
2923 .type = HDA_FIXUP_PINS,
2924 .v.pins = dell_922x_m81_pin_configs,
2925 },
2926 [STAC_922X_DELL_M82] = {
2927 .type = HDA_FIXUP_PINS,
2928 .v.pins = dell_922x_m82_pin_configs,
2929 },
2930};
2931
2932static const struct hda_model_fixup stac922x_models[] = {
2933 { .id = STAC_D945_REF, .name = "ref" },
2934 { .id = STAC_D945GTP5, .name = "5stack" },
2935 { .id = STAC_D945GTP3, .name = "3stack" },
2936 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
2937 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
2938 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
2939 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
2940 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
2941 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
2942 { .id = STAC_ECS_202, .name = "ecs202" },
2943 { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
2944 { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
2945 { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
2946 { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
dfe495d0 2947 /* for backward compatibility */
0a427846
TI		 2948 { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
2949 { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
2950 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
2951 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
2952 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
2953 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
2954 {}
2955};
2956
2957static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
f5fcc13c
TI		 2958 /* SigmaTel reference board */
2959 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2960 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 2961 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2962 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 2963 /* Intel 945G based systems */
2964 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
2965 "Intel D945G", STAC_D945GTP3),
2966 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
2967 "Intel D945G", STAC_D945GTP3),
2968 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2969 "Intel D945G", STAC_D945GTP3),
2970 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2971 "Intel D945G", STAC_D945GTP3),
2972 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2973 "Intel D945G", STAC_D945GTP3),
2974 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2975 "Intel D945G", STAC_D945GTP3),
2976 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2977 "Intel D945G", STAC_D945GTP3),
2978 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2979 "Intel D945G", STAC_D945GTP3),
2980 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2981 "Intel D945G", STAC_D945GTP3),
2982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2983 "Intel D945G", STAC_D945GTP3),
2984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2985 "Intel D945G", STAC_D945GTP3),
2986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2987 "Intel D945G", STAC_D945GTP3),
2988 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2989 "Intel D945G", STAC_D945GTP3),
2990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2991 "Intel D945G", STAC_D945GTP3),
2992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2993 "Intel D945G", STAC_D945GTP3),
2994 /* Intel D945G 5-stack systems */
2995 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2996 "Intel D945G", STAC_D945GTP5),
2997 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2998 "Intel D945G", STAC_D945GTP5),
2999 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
3000 "Intel D945G", STAC_D945GTP5),
3001 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3002 "Intel D945G", STAC_D945GTP5),
3003 /* Intel 945P based systems */
3004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3005 "Intel D945P", STAC_D945GTP3),
3006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3007 "Intel D945P", STAC_D945GTP3),
3008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3009 "Intel D945P", STAC_D945GTP3),
3010 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3011 "Intel D945P", STAC_D945GTP3),
3012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3013 "Intel D945P", STAC_D945GTP3),
3014 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3015 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 3016 /* other intel */
3017 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3018 "Intel D945", STAC_D945_REF),
f5fcc13c 3019 /* other systems */
0a427846 3020
536319af 3021 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
0a427846
TI		 3022 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3023
dfe495d0
TI		 3024 /* Dell systems */
3025 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3026 "unknown Dell", STAC_922X_DELL_D81),
3027 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3028 "unknown Dell", STAC_922X_DELL_D81),
3029 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3030 "unknown Dell", STAC_922X_DELL_D81),
3031 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3032 "unknown Dell", STAC_922X_DELL_D82),
3033 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3034 "unknown Dell", STAC_922X_DELL_M81),
3035 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3036 "unknown Dell", STAC_922X_DELL_D82),
3037 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3038 "unknown Dell", STAC_922X_DELL_D81),
3039 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3040 "unknown Dell", STAC_922X_DELL_D81),
3041 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3042 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 3043 /* ECS/PC Chips boards */
dea0a509 3044 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 3045 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 3046 {} /* terminator */
3047};
3048
29ac8363
TI		 3049static const struct hda_pintbl ref927x_pin_configs[] = {
3050 { 0x0a, 0x02214020 },
3051 { 0x0b, 0x02a19080 },
3052 { 0x0c, 0x0181304e },
3053 { 0x0d, 0x01014010 },
3054 { 0x0e, 0x01a19040 },
3055 { 0x0f, 0x01011012 },
3056 { 0x10, 0x01016011 },
3057 { 0x11, 0x0101201f },
3058 { 0x12, 0x183301f0 },
3059 { 0x13, 0x18a001f0 },
3060 { 0x14, 0x18a001f0 },
3061 { 0x21, 0x01442070 },
3062 { 0x22, 0x01c42190 },
3063 { 0x23, 0x40000100 },
3064 {}
3cc08dc6
MP		 3065};
3066
29ac8363
TI		 3067static const struct hda_pintbl d965_3st_pin_configs[] = {
3068 { 0x0a, 0x0221401f },
3069 { 0x0b, 0x02a19120 },
3070 { 0x0c, 0x40000100 },
3071 { 0x0d, 0x01014011 },
3072 { 0x0e, 0x01a19021 },
3073 { 0x0f, 0x01813024 },
3074 { 0x10, 0x40000100 },
3075 { 0x11, 0x40000100 },
3076 { 0x12, 0x40000100 },
3077 { 0x13, 0x40000100 },
3078 { 0x14, 0x40000100 },
3079 { 0x21, 0x40000100 },
3080 { 0x22, 0x40000100 },
3081 { 0x23, 0x40000100 },
3082 {}
81d3dbde
TD		 3083};
3084
29ac8363
TI		 3085static const struct hda_pintbl d965_5st_pin_configs[] = {
3086 { 0x0a, 0x02214020 },
3087 { 0x0b, 0x02a19080 },
3088 { 0x0c, 0x0181304e },
3089 { 0x0d, 0x01014010 },
3090 { 0x0e, 0x01a19040 },
3091 { 0x0f, 0x01011012 },
3092 { 0x10, 0x01016011 },
3093 { 0x11, 0x40000100 },
3094 { 0x12, 0x40000100 },
3095 { 0x13, 0x40000100 },
3096 { 0x14, 0x40000100 },
3097 { 0x21, 0x01442070 },
3098 { 0x22, 0x40000100 },
3099 { 0x23, 0x40000100 },
3100 {}
93ed1503
TD		 3101};
3102
29ac8363
TI		 3103static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3104 { 0x0a, 0x40000100 },
3105 { 0x0b, 0x40000100 },
3106 { 0x0c, 0x0181304e },
3107 { 0x0d, 0x01014010 },
3108 { 0x0e, 0x01a19040 },
3109 { 0x0f, 0x01011012 },
3110 { 0x10, 0x01016011 },
3111 { 0x11, 0x40000100 },
3112 { 0x12, 0x40000100 },
3113 { 0x13, 0x40000100 },
3114 { 0x14, 0x40000100 },
3115 { 0x21, 0x01442070 },
3116 { 0x22, 0x40000100 },
3117 { 0x23, 0x40000100 },
3118 {}
679d92ed
TI		 3119};
3120
29ac8363
TI		 3121static const struct hda_pintbl dell_3st_pin_configs[] = {
3122 { 0x0a, 0x02211230 },
3123 { 0x0b, 0x02a11220 },
3124 { 0x0c, 0x01a19040 },
3125 { 0x0d, 0x01114210 },
3126 { 0x0e, 0x01111212 },
3127 { 0x0f, 0x01116211 },
3128 { 0x10, 0x01813050 },
3129 { 0x11, 0x01112214 },
3130 { 0x12, 0x403003fa },
3131 { 0x13, 0x90a60040 },
3132 { 0x14, 0x90a60040 },
3133 { 0x21, 0x404003fb },
3134 { 0x22, 0x40c003fc },
3135 { 0x23, 0x40000100 },
3136 {}
4ff076e5
TD		 3137};
3138
29ac8363
TI		 3139static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3140 const struct hda_fixup *fix, int action)
3141{
29ac8363 3142 /* no jack detecion for ref-no-jd model */
36c9db7a
TI		 3143 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3144 codec->no_jack_detect = 1;
29ac8363
TI		 3145}
3146
3147static void stac927x_fixup_ref(struct hda_codec *codec,
3148 const struct hda_fixup *fix, int action)
3149{
3150 struct sigmatel_spec *spec = codec->spec;
3151
3152 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3153 snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3154 spec->eapd_mask = spec->gpio_mask = 0;
3155 spec->gpio_dir = spec->gpio_data = 0;
3156 }
3157}
3158
3159static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3160 const struct hda_fixup *fix, int action)
3161{
3162 struct sigmatel_spec *spec = codec->spec;
3163
3164 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3165 return;
3166
3167 if (codec->subsystem_id != 0x1028022f) {
3168 /* GPIO2 High = Enable EAPD */
3169 spec->eapd_mask = spec->gpio_mask = 0x04;
3170 spec->gpio_dir = spec->gpio_data = 0x04;
3171 }
29ac8363
TI		 3172
3173 snd_hda_add_verbs(codec, dell_3st_core_init);
3174 spec->volknob_init = 1;
29ac8363
TI		 3175}
3176
3177static void stac927x_fixup_volknob(struct hda_codec *codec,
3178 const struct hda_fixup *fix, int action)
3179{
3180 struct sigmatel_spec *spec = codec->spec;
3181
3182 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3183 snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3184 spec->volknob_init = 1;
3185 }
3186}
3187
3188static const struct hda_fixup stac927x_fixups[] = {
3189 [STAC_D965_REF_NO_JD] = {
3190 .type = HDA_FIXUP_FUNC,
3191 .v.func = stac927x_fixup_ref_no_jd,
3192 .chained = true,
3193 .chain_id = STAC_D965_REF,
3194 },
3195 [STAC_D965_REF] = {
3196 .type = HDA_FIXUP_FUNC,
3197 .v.func = stac927x_fixup_ref,
3198 },
3199 [STAC_D965_3ST] = {
3200 .type = HDA_FIXUP_PINS,
3201 .v.pins = d965_3st_pin_configs,
3202 .chained = true,
3203 .chain_id = STAC_D965_VERBS,
3204 },
3205 [STAC_D965_5ST] = {
3206 .type = HDA_FIXUP_PINS,
3207 .v.pins = d965_5st_pin_configs,
3208 .chained = true,
3209 .chain_id = STAC_D965_VERBS,
3210 },
3211 [STAC_D965_VERBS] = {
3212 .type = HDA_FIXUP_VERBS,
3213 .v.verbs = d965_core_init,
3214 },
3215 [STAC_D965_5ST_NO_FP] = {
3216 .type = HDA_FIXUP_PINS,
3217 .v.pins = d965_5st_no_fp_pin_configs,
3218 },
3219 [STAC_DELL_3ST] = {
3220 .type = HDA_FIXUP_PINS,
3221 .v.pins = dell_3st_pin_configs,
3222 .chained = true,
3223 .chain_id = STAC_927X_DELL_DMIC,
3224 },
3225 [STAC_DELL_BIOS] = {
3226 .type = HDA_FIXUP_PINS,
3227 .v.pins = (const struct hda_pintbl[]) {
3228 /* configure the analog microphone on some laptops */
3229 { 0x0c, 0x90a79130 },
3230 /* correct the front output jack as a hp out */
3231 { 0x0f, 0x0227011f },
3232 /* correct the front input jack as a mic */
3233 { 0x0e, 0x02a79130 },
3234 {}
3235 },
3236 .chained = true,
3237 .chain_id = STAC_927X_DELL_DMIC,
3238 },
3239 [STAC_DELL_BIOS_SPDIF] = {
3240 .type = HDA_FIXUP_PINS,
3241 .v.pins = (const struct hda_pintbl[]) {
3242 /* correct the device field to SPDIF out */
3243 { 0x21, 0x01442070 },
3244 {}
3245 },
3246 .chained = true,
3247 .chain_id = STAC_DELL_BIOS,
3248 },
3249 [STAC_927X_DELL_DMIC] = {
3250 .type = HDA_FIXUP_FUNC,
3251 .v.func = stac927x_fixup_dell_dmic,
3252 },
3253 [STAC_927X_VOLKNOB] = {
3254 .type = HDA_FIXUP_FUNC,
3255 .v.func = stac927x_fixup_volknob,
3256 },
3cc08dc6
MP		 3257};
3258
29ac8363
TI		 3259static const struct hda_model_fixup stac927x_models[] = {
3260 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3261 { .id = STAC_D965_REF, .name = "ref" },
3262 { .id = STAC_D965_3ST, .name = "3stack" },
3263 { .id = STAC_D965_5ST, .name = "5stack" },
3264 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3265 { .id = STAC_DELL_3ST, .name = "dell-3stack" },
3266 { .id = STAC_DELL_BIOS, .name = "dell-bios" },
3267 { .id = STAC_927X_VOLKNOB, .name = "volknob" },
3268 {}
f5fcc13c
TI		 3269};
3270
29ac8363 3271static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
f5fcc13c
TI		 3272 /* SigmaTel reference board */
3273 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3274 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 3275 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3276 "DFI LanParty", STAC_D965_REF),
81d3dbde 3277 /* Intel 946 based systems */
f5fcc13c
TI		 3278 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3279 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 3280 /* 965 based 3 stack systems */
dea0a509
TI		 3281 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3282 "Intel D965", STAC_D965_3ST),
3283 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3284 "Intel D965", STAC_D965_3ST),
4ff076e5 3285 /* Dell 3 stack systems */
dfe495d0 3286 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 3287 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
3288 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 3289 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 3290 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 3291 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 3292 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
29ac8363 3293 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
84d3dc20 3294 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 3295 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
3296 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
3297 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
29ac8363 3298 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
93ed1503 3299 /* 965 based 5 stack systems */
dea0a509
TI		 3300 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
3301 "Intel D965", STAC_D965_5ST),
3302 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
3303 "Intel D965", STAC_D965_5ST),
54930531
TI		 3304 /* volume-knob fixes */
3305 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP		 3306 {} /* terminator */
3307};
3308
fe6322ca
TI		 3309static const struct hda_pintbl ref9205_pin_configs[] = {
3310 { 0x0a, 0x40000100 },
3311 { 0x0b, 0x40000100 },
3312 { 0x0c, 0x01016011 },
3313 { 0x0d, 0x01014010 },
3314 { 0x0e, 0x01813122 },
3315 { 0x0f, 0x01a19021 },
3316 { 0x14, 0x01019020 },
3317 { 0x16, 0x40000100 },
3318 { 0x17, 0x90a000f0 },
3319 { 0x18, 0x90a000f0 },
3320 { 0x21, 0x01441030 },
3321 { 0x22, 0x01c41030 },
3322 {}
f3302a59
MP		 3323};
3324
dfe495d0
TI		 3325/*
3326 STAC 9205 pin configs for
3327 102801F1
3328 102801F2
3329 102801FC
3330 102801FD
3331 10280204
3332 1028021F
3fa2ef74 3333 10280228 (Dell Vostro 1500)
95e70e87 3334 10280229 (Dell Vostro 1700)
dfe495d0 3335*/
fe6322ca
TI		 3336static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
3337 { 0x0a, 0x0321101F },
3338 { 0x0b, 0x03A11020 },
3339 { 0x0c, 0x400003FA },
3340 { 0x0d, 0x90170310 },
3341 { 0x0e, 0x400003FB },
3342 { 0x0f, 0x400003FC },
3343 { 0x14, 0x400003FD },
3344 { 0x16, 0x40F000F9 },
3345 { 0x17, 0x90A60330 },
3346 { 0x18, 0x400003FF },
3347 { 0x21, 0x0144131F },
3348 { 0x22, 0x40C003FE },
3349 {}
dfe495d0
TI		 3350};
3351
3352/*
3353 STAC 9205 pin configs for
3354 102801F9
3355 102801FA
3356 102801FE
3357 102801FF (Dell Precision M4300)
3358 10280206
3359 10280200
3360 10280201
3361*/
fe6322ca
TI		 3362static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
3363 { 0x0a, 0x0321101f },
3364 { 0x0b, 0x03a11020 },
3365 { 0x0c, 0x90a70330 },
3366 { 0x0d, 0x90170310 },
3367 { 0x0e, 0x400000fe },
3368 { 0x0f, 0x400000ff },
3369 { 0x14, 0x400000fd },
3370 { 0x16, 0x40f000f9 },
3371 { 0x17, 0x400000fa },
3372 { 0x18, 0x400000fc },
3373 { 0x21, 0x0144131f },
3374 { 0x22, 0x40c003f8 },
3375 /* Enable SPDIF in/out */
3376 { 0x1f, 0x01441030 },
3377 { 0x20, 0x1c410030 },
3378 {}
ae0a8ed8
TD		 3379};
3380
fe6322ca
TI		 3381static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
3382 { 0x0a, 0x0421101f },
3383 { 0x0b, 0x04a11020 },
3384 { 0x0c, 0x400003fa },
3385 { 0x0d, 0x90170310 },
3386 { 0x0e, 0x400003fb },
3387 { 0x0f, 0x400003fc },
3388 { 0x14, 0x400003fd },
3389 { 0x16, 0x400003f9 },
3390 { 0x17, 0x90a60330 },
3391 { 0x18, 0x400003ff },
3392 { 0x21, 0x01441340 },
3393 { 0x22, 0x40c003fe },
3394 {}
ae0a8ed8
TD		 3395};
3396
fe6322ca
TI		 3397static void stac9205_fixup_ref(struct hda_codec *codec,
3398 const struct hda_fixup *fix, int action)
3399{
3400 struct sigmatel_spec *spec = codec->spec;
3401
3402 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3403 snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
3404 /* SPDIF-In enabled */
3405 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
3406 }
3407}
3408
fe6322ca
TI		 3409static void stac9205_fixup_dell_m43(struct hda_codec *codec,
3410 const struct hda_fixup *fix, int action)
3411{
3412 struct sigmatel_spec *spec = codec->spec;
36c9db7a 3413 struct hda_jack_tbl *jack;
fe6322ca
TI		 3414
3415 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3416 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
3417
3418 /* Enable unsol response for GPIO4/Dock HP connection */
fe6322ca
TI		 3419 snd_hda_codec_write_cache(codec, codec->afg, 0,
3420 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
36c9db7a
TI		 3421 snd_hda_jack_detect_enable_callback(codec, codec->afg,
3422 STAC_VREF_EVENT,
3423 stac_vref_event);
3424 jack = snd_hda_jack_tbl_get(codec, codec->afg);
3425 if (jack)
3426 jack->private_data = 0x01;
fe6322ca
TI		 3427
3428 spec->gpio_dir = 0x0b;
3429 spec->eapd_mask = 0x01;
3430 spec->gpio_mask = 0x1b;
3431 spec->gpio_mute = 0x10;
3432 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
3433 * GPIO3 Low = DRM
3434 */
3435 spec->gpio_data = 0x01;
3436 }
3437}
3438
3439static void stac9205_fixup_eapd(struct hda_codec *codec,
3440 const struct hda_fixup *fix, int action)
3441{
3442 struct sigmatel_spec *spec = codec->spec;
3443
3444 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3445 spec->eapd_switch = 0;
3446}
3447
3448static const struct hda_fixup stac9205_fixups[] = {
3449 [STAC_9205_REF] = {
3450 .type = HDA_FIXUP_FUNC,
3451 .v.func = stac9205_fixup_ref,
3452 },
3453 [STAC_9205_DELL_M42] = {
3454 .type = HDA_FIXUP_PINS,
3455 .v.pins = dell_9205_m42_pin_configs,
3456 },
3457 [STAC_9205_DELL_M43] = {
3458 .type = HDA_FIXUP_FUNC,
3459 .v.func = stac9205_fixup_dell_m43,
3460 },
3461 [STAC_9205_DELL_M44] = {
3462 .type = HDA_FIXUP_PINS,
3463 .v.pins = dell_9205_m44_pin_configs,
3464 },
3465 [STAC_9205_EAPD] = {
3466 .type = HDA_FIXUP_FUNC,
3467 .v.func = stac9205_fixup_eapd,
3468 },
3469 {}
f3302a59
MP		 3470};
3471
fe6322ca
TI		 3472static const struct hda_model_fixup stac9205_models[] = {
3473 { .id = STAC_9205_REF, .name = "ref" },
3474 { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
3475 { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
3476 { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
3477 { .id = STAC_9205_EAPD, .name = "eapd" },
3478 {}
f5fcc13c
TI		 3479};
3480
fe6322ca 3481static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
f5fcc13c
TI		 3482 /* SigmaTel reference board */
3483 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3484 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 3485 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
3486 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 3487 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3488 "DFI LanParty", STAC_9205_REF),
d9a4268e 3489 /* Dell */
dfe495d0
TI		 3490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
3491 "unknown Dell", STAC_9205_DELL_M42),
3492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
3493 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 3494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 3495 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 3496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
3497 "Dell Precision", STAC_9205_DELL_M43),
3498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
3499 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 3500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
3501 "unknown Dell", STAC_9205_DELL_M42),
3502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
3503 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 3504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
3505 "Dell Precision", STAC_9205_DELL_M43),
3506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 3507 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 3508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
3509 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 3510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
3511 "Dell Precision", STAC_9205_DELL_M43),
3512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
3513 "Dell Precision", STAC_9205_DELL_M43),
36c9db7a
TI		 3514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
3515 "Dell Precision", STAC_9205_DELL_M43),
3516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
3517 "Dell Inspiron", STAC_9205_DELL_M44),
3518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
3519 "Dell Vostro 1500", STAC_9205_DELL_M42),
3520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
3521 "Dell Vostro 1700", STAC_9205_DELL_M42),
3522 /* Gateway */
3523 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
3524 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
3525 {} /* terminator */
3526};
a64135a2 3527
36c9db7a 3528static int stac_parse_auto_config(struct hda_codec *codec)
ab5a6ebe
VK		 3529{
3530 struct sigmatel_spec *spec = codec->spec;
36c9db7a 3531 int err;
ab5a6ebe 3532
36c9db7a
TI		 3533 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
3534 if (err < 0)
3535 return err;
ab5a6ebe 3536
36c9db7a
TI		 3537 /* add hooks */
3538 spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
3539 spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
ab5a6ebe 3540
36c9db7a
TI		 3541 spec->gen.automute_hook = stac_update_outputs;
3542 spec->gen.hp_automute_hook = stac_hp_automute;
3543 spec->gen.line_automute_hook = stac_line_automute;
664389db 3544 spec->gen.mic_autoswitch_hook = stac_mic_autoswitch;
3d21d3f7 3545
36c9db7a
TI		 3546 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
3547 if (err < 0)
3548 return err;
3d21d3f7 3549
36c9db7a
TI		 3550 /* minimum value is actually mute */
3551 spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
c6e4c666 3552
36c9db7a
TI		 3553 /* setup analog beep controls */
3554 if (spec->anabeep_nid > 0) {
3555 err = stac_auto_create_beep_ctls(codec,
3556 spec->anabeep_nid);
3557 if (err < 0)
3558 return err;
3d21d3f7
TI		 3559 }
3560
36c9db7a
TI		 3561 /* setup digital beep controls and input device */
3562#ifdef CONFIG_SND_HDA_INPUT_BEEP
3563 if (spec->digbeep_nid > 0) {
3564 hda_nid_t nid = spec->digbeep_nid;
3565 unsigned int caps;
3566
3567 err = stac_auto_create_beep_ctls(codec, nid);
3568 if (err < 0)
3569 return err;
3570 err = snd_hda_attach_beep_device(codec, nid);
3571 if (err < 0)
3572 return err;
3573 if (codec->beep) {
3574 /* IDT/STAC codecs have linear beep tone parameter */
3575 codec->beep->linear_tone = spec->linear_tone_beep;
3576 /* if no beep switch is available, make its own one */
3577 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3578 if (!(caps & AC_AMPCAP_MUTE)) {
3579 err = stac_beep_switch_ctl(codec);
3580 if (err < 0)
3581 return err;
fd60cc89
MR		 3582 }
3583 }
314634bc 3584 }
36c9db7a 3585#endif
314634bc 3586
36c9db7a
TI		 3587 if (spec->gpio_led)
3588 spec->gen.vmaster_mute.hook = stac_vmaster_hook;
3589
3590 if (spec->aloopback_ctl &&
3591 snd_hda_get_bool_hint(codec, "loopback") == 1) {
3592 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
3593 return -ENOMEM;
3594 }
3595
42875479
TI		 3596 if (spec->have_spdif_mux) {
3597 err = stac_create_spdif_mux_ctls(codec);
3598 if (err < 0)
3599 return err;
3600 }
3601
36c9db7a
TI		 3602 stac_init_power_map(codec);
3603
3604 return 0;
1835a0f9
TI		 3605}
3606
36c9db7a
TI		 3607
3608static int stac_init(struct hda_codec *codec)
d38cce70
KG		 3609{
3610 struct sigmatel_spec *spec = codec->spec;
07f80449 3611 unsigned int gpio;
36c9db7a 3612 int i;
07f80449 3613
36c9db7a
TI		 3614 /* override some hints */
3615 stac_store_hints(codec);
26ebe0a2 3616
36c9db7a
TI		 3617 /* set up GPIO */
3618 gpio = spec->gpio_data;
3619 /* turn on EAPD statically when spec->eapd_switch isn't set.
3620 * otherwise, unsol event will turn it on/off dynamically
3621 */
3622 if (!spec->eapd_switch)
3623 gpio |= spec->eapd_mask;
3624 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
d38cce70 3625
36c9db7a 3626 snd_hda_gen_init(codec);
c357aab0 3627
36c9db7a
TI		 3628 /* sync the power-map */
3629 if (spec->num_pwrs)
3630 snd_hda_codec_write(codec, codec->afg, 0,
3631 AC_VERB_IDT_SET_POWER_MAP,
3632 spec->power_map_bits);
0f6fcb73 3633
36c9db7a
TI		 3634 /* power down inactive ADCs */
3635 if (spec->powerdown_adcs) {
3636 for (i = 0; i < spec->gen.num_all_adcs; i++) {
3637 if (spec->active_adcs & (1 << i))
3638 continue;
3639 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
3640 AC_VERB_SET_POWER_STATE,
3641 AC_PWRST_D3);
89bb3e74
TI		 3642 }
3643 }
3644
c357aab0
VK		 3645 return 0;
3646}
3647
36c9db7a 3648static void stac_shutup(struct hda_codec *codec)
78987bdc 3649{
36c9db7a
TI		 3650 struct sigmatel_spec *spec = codec->spec;
3651
3652 snd_hda_shutup_pins(codec);
3653
3654 if (spec->eapd_mask)
3655 stac_gpio_set(codec, spec->gpio_mask,
3656 spec->gpio_dir, spec->gpio_data &
3657 ~spec->eapd_mask);
3658}
3659
3660static void stac_free(struct hda_codec *codec)
3661{
3662 struct sigmatel_spec *spec = codec->spec;
3663
3664 if (!spec)
3665 return;
3666
3667 snd_hda_gen_spec_free(&spec->gen);
3668 kfree(spec);
3669 snd_hda_detach_beep_device(codec);
78987bdc
RD		 3670}
3671
2d34e1b3
TI		 3672#ifdef CONFIG_PROC_FS
3673static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
3674 struct hda_codec *codec, hda_nid_t nid)
3675{
3676 if (nid == codec->afg)
3677 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
c882246d
TI		 3678 snd_hda_codec_read(codec, nid, 0,
3679 AC_VERB_IDT_GET_POWER_MAP, 0));
2d34e1b3
TI		 3680}
3681
3682static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
3683 struct hda_codec *codec,
3684 unsigned int verb)
3685{
3686 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
3687 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
3688}
3689
3690/* stac92hd71bxx, stac92hd73xx */
3691static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
3692 struct hda_codec *codec, hda_nid_t nid)
3693{
3694 stac92hd_proc_hook(buffer, codec, nid);
3695 if (nid == codec->afg)
3696 analog_loop_proc_hook(buffer, codec, 0xfa0);
3697}
3698
3699static void stac9205_proc_hook(struct snd_info_buffer *buffer,
3700 struct hda_codec *codec, hda_nid_t nid)
3701{
3702 if (nid == codec->afg)
3703 analog_loop_proc_hook(buffer, codec, 0xfe0);
3704}
3705
3706static void stac927x_proc_hook(struct snd_info_buffer *buffer,
3707 struct hda_codec *codec, hda_nid_t nid)
3708{
3709 if (nid == codec->afg)
3710 analog_loop_proc_hook(buffer, codec, 0xfeb);
3711}
3712#else
3713#define stac92hd_proc_hook NULL
3714#define stac92hd7x_proc_hook NULL
3715#define stac9205_proc_hook NULL
3716#define stac927x_proc_hook NULL
3717#endif
3718
2a43952a 3719#ifdef CONFIG_PM
36c9db7a 3720static int stac_resume(struct hda_codec *codec)
ff6fdc37 3721{
36c9db7a 3722 codec->patch_ops.init(codec);
82beb8fd
TI		 3723 snd_hda_codec_resume_amp(codec);
3724 snd_hda_codec_resume_cache(codec);
ff6fdc37
M		 3725 return 0;
3726}
c6798d2b 3727
36c9db7a
TI		 3728static int stac_suspend(struct hda_codec *codec)
3729{
3730 stac_shutup(codec);
3731 return 0;
3732}
3733
3734static void stac_set_power_state(struct hda_codec *codec, hda_nid_t fg,
3735 unsigned int power_state)
3736{
3737 unsigned int afg_power_state = power_state;
3738 struct sigmatel_spec *spec = codec->spec;
3739
3740 if (power_state == AC_PWRST_D3) {
3741 if (spec->vref_mute_led_nid) {
3742 /* with vref-out pin used for mute led control
3743 * codec AFG is prevented from D3 state
3744 */
3745 afg_power_state = AC_PWRST_D1;
3746 }
3747 /* this delay seems necessary to avoid click noise at power-down */
3748 msleep(100);
c21bd025 3749 }
36c9db7a
TI		 3750 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
3751 afg_power_state);
9419ab6b 3752 snd_hda_codec_set_power_to_all(codec, fg, power_state);
b4e81876 3753}
36c9db7a
TI		 3754#else
3755#define stac_suspend NULL
3756#define stac_resume NULL
3757#define stac_set_power_state NULL
3758#endif /* CONFIG_PM */
7df1ce1a 3759
36c9db7a
TI		 3760static const struct hda_codec_ops stac_patch_ops = {
3761 .build_controls = snd_hda_gen_build_controls,
3762 .build_pcms = snd_hda_gen_build_pcms,
3763 .init = stac_init,
3764 .free = stac_free,
29adc4b9 3765 .unsol_event = snd_hda_jack_unsol_event,
2a43952a 3766#ifdef CONFIG_PM
36c9db7a
TI		 3767 .suspend = stac_suspend,
3768 .resume = stac_resume,
ff6fdc37 3769#endif
36c9db7a 3770 .reboot_notify = stac_shutup,
2f2f4251
M		 3771};
3772
36c9db7a 3773static int alloc_stac_spec(struct hda_codec *codec)
361dab3e
TI		 3774{
3775 struct sigmatel_spec *spec;
3776
3777 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3778 if (!spec)
3779 return -ENOMEM;
36c9db7a 3780 snd_hda_gen_spec_init(&spec->gen);
361dab3e
TI		 3781 codec->spec = spec;
3782 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
361dab3e
TI		 3783 return 0;
3784}
3785
2f2f4251
M		 3786static int patch_stac9200(struct hda_codec *codec)
3787{
3788 struct sigmatel_spec *spec;
c7d4b2fa 3789 int err;
2f2f4251 3790
36c9db7a 3791 err = alloc_stac_spec(codec);
361dab3e
TI		 3792 if (err < 0)
3793 return err;
2f2f4251 3794
361dab3e 3795 spec = codec->spec;
1b0e372d 3796 spec->linear_tone_beep = 1;
36c9db7a 3797 spec->gen.own_eapd_ctl = 1;
d39a3ae8 3798
36c9db7a 3799 codec->patch_ops = stac_patch_ops;
ba615b86 3800 codec->power_filter = snd_hda_codec_eapd_power_filter;
2f2f4251 3801
d39a3ae8 3802 snd_hda_add_verbs(codec, stac9200_eapd_init);
c7d4b2fa 3803
36c9db7a
TI		 3804 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
3805 stac9200_fixups);
d39a3ae8 3806 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
117f257d 3807
36c9db7a 3808 err = stac_parse_auto_config(codec);
c7d4b2fa 3809 if (err < 0) {
36c9db7a 3810 stac_free(codec);
c7d4b2fa
M		 3811 return err;
3812 }
2f2f4251 3813
d39a3ae8
TI		 3814 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3815
2f2f4251
M		 3816 return 0;
3817}
3818
8e21c34c
TD		 3819static int patch_stac925x(struct hda_codec *codec)
3820{
3821 struct sigmatel_spec *spec;
3822 int err;
3823
36c9db7a 3824 err = alloc_stac_spec(codec);
361dab3e
TI		 3825 if (err < 0)
3826 return err;
8e21c34c 3827
361dab3e 3828 spec = codec->spec;
1b0e372d 3829 spec->linear_tone_beep = 1;
36c9db7a 3830 spec->gen.own_eapd_ctl = 1;
9cb36c2a 3831
36c9db7a 3832 codec->patch_ops = stac_patch_ops;
8e21c34c 3833
d2077d40 3834 snd_hda_add_verbs(codec, stac925x_core_init);
8e21c34c 3835
36c9db7a
TI		 3836 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
3837 stac925x_fixups);
d2077d40
TI		 3838 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3839
36c9db7a 3840 err = stac_parse_auto_config(codec);
8e21c34c 3841 if (err < 0) {
36c9db7a 3842 stac_free(codec);
8e21c34c
TD		 3843 return err;
3844 }
3845
d2077d40
TI		 3846 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3847
8e21c34c
TD		 3848 return 0;
3849}
3850
e1f0d669
MR		 3851static int patch_stac92hd73xx(struct hda_codec *codec)
3852{
3853 struct sigmatel_spec *spec;
361dab3e 3854 int err;
c21ca4a8 3855 int num_dacs;
e1f0d669 3856
36c9db7a 3857 err = alloc_stac_spec(codec);
361dab3e
TI		 3858 if (err < 0)
3859 return err;
e1f0d669 3860
361dab3e 3861 spec = codec->spec;
1b0e372d 3862 spec->linear_tone_beep = 0;
2748746f 3863 spec->gen.mixer_nid = 0x1d;
42875479 3864 spec->have_spdif_mux = 1;
e1f0d669 3865
36c9db7a 3866 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
c21ca4a8 3867 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 3868 printk(KERN_WARNING "hda_codec: Could not determine "
3869 "number of channels defaulting to DAC count\n");
36c9db7a 3870 num_dacs = 5;
e1f0d669 3871 }
55e30141 3872
c21ca4a8 3873 switch (num_dacs) {
e1f0d669 3874 case 0x3: /* 6 Channel */
36c9db7a 3875 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
e1f0d669
MR		 3876 break;
3877 case 0x4: /* 8 Channel */
36c9db7a 3878 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
e1f0d669
MR		 3879 break;
3880 case 0x5: /* 10 Channel */
36c9db7a 3881 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
d78d7a90 3882 break;
c21ca4a8 3883 }
e1f0d669 3884
e1f0d669
MR		 3885 spec->aloopback_mask = 0x01;
3886 spec->aloopback_shift = 8;
3887
1cd2224c 3888 spec->digbeep_nid = 0x1c;
6479c631 3889
55e30141
TI		 3890 /* GPIO0 High = Enable EAPD */
3891 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
3892 spec->gpio_data = 0x01;
6b3ab21e 3893
55e30141 3894 spec->eapd_switch = 1;
a7662640 3895
a64135a2
MR		 3896 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3897 spec->pwr_nids = stac92hd73xx_pwr_nids;
3898
36c9db7a 3899 spec->gen.own_eapd_ctl = 1;
f4f678d2 3900 spec->gen.power_down_unused = 1;
36c9db7a
TI		 3901
3902 codec->patch_ops = stac_patch_ops;
3903
3904 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
3905 stac92hd73xx_fixups);
55e30141
TI		 3906 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3907
3908 if (!spec->volknob_init)
3909 snd_hda_add_verbs(codec, stac92hd73xx_core_init);
3910
36c9db7a 3911 err = stac_parse_auto_config(codec);
e1f0d669 3912 if (err < 0) {
36c9db7a 3913 stac_free(codec);
e1f0d669
MR		 3914 return err;
3915 }
3916
303985f8
DH		 3917 /* Don't GPIO-mute speakers if there are no internal speakers, because
3918 * the GPIO might be necessary for Headphone
3919 */
3920 if (spec->eapd_switch && !has_builtin_speaker(codec))
3921 spec->eapd_switch = 0;
3922
2d34e1b3
TI		 3923 codec->proc_widget_hook = stac92hd7x_proc_hook;
3924
55e30141
TI		 3925 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3926
e1f0d669
MR		 3927 return 0;
3928}
3929
372f8c75
TI		 3930static void stac_setup_gpio(struct hda_codec *codec)
3931{
3932 struct sigmatel_spec *spec = codec->spec;
3933
3934 if (spec->gpio_led) {
3935 if (!spec->vref_mute_led_nid) {
3936 spec->gpio_mask |= spec->gpio_led;
3937 spec->gpio_dir |= spec->gpio_led;
3938 spec->gpio_data |= spec->gpio_led;
3939 } else {
3940 codec->patch_ops.set_power_state =
36c9db7a 3941 stac_set_power_state;
372f8c75
TI		 3942 }
3943 }
3944
3945 if (spec->mic_mute_led_gpio) {
3946 spec->gpio_mask |= spec->mic_mute_led_gpio;
3947 spec->gpio_dir |= spec->mic_mute_led_gpio;
3948 spec->mic_mute_led_on = true;
3949 spec->gpio_data |= spec->mic_mute_led_gpio;
36c9db7a 3950
a90229e0 3951 spec->gen.cap_sync_hook = stac_capture_led_hook;
372f8c75
TI		 3952 }
3953}
3954
d0513fc6
MR		 3955static int patch_stac92hd83xxx(struct hda_codec *codec)
3956{
3957 struct sigmatel_spec *spec;
3958 int err;
3959
36c9db7a 3960 err = alloc_stac_spec(codec);
361dab3e
TI		 3961 if (err < 0)
3962 return err;
d0513fc6 3963
c36b5b05 3964 codec->epss = 0; /* longer delay needed for D3 */
699d8995 3965
361dab3e 3966 spec = codec->spec;
1db7ccdb 3967 spec->linear_tone_beep = 0;
36c9db7a 3968 spec->gen.own_eapd_ctl = 1;
f4f678d2 3969 spec->gen.power_down_unused = 1;
2748746f 3970 spec->gen.mixer_nid = 0x1b;
36c9db7a 3971
d0513fc6 3972 spec->digbeep_nid = 0x21;
d0513fc6 3973 spec->pwr_nids = stac92hd83xxx_pwr_nids;
d0513fc6 3974 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
36c9db7a 3975 spec->default_polarity = -1; /* no default cfg */
d0513fc6 3976
36c9db7a 3977 codec->patch_ops = stac_patch_ops;
b4e81876 3978
372f8c75 3979 snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
e108c7b7 3980
36c9db7a
TI		 3981 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
3982 stac92hd83xxx_fixups);
372f8c75 3983 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
b4e81876 3984
372f8c75 3985 stac_setup_gpio(codec);
62cbde18 3986
36c9db7a 3987 err = stac_parse_auto_config(codec);
d0513fc6 3988 if (err < 0) {
36c9db7a 3989 stac_free(codec);
d0513fc6
MR		 3990 return err;
3991 }
3992
2d34e1b3
TI		 3993 codec->proc_widget_hook = stac92hd_proc_hook;
3994
372f8c75
TI		 3995 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3996
d0513fc6
MR		 3997 return 0;
3998}
3999
4e637c6e
VK		 4000static const hda_nid_t stac92hd95_pwr_nids[] = {
4001 0x0a, 0x0b, 0x0c, 0x0d
4002};
4003
4004static int patch_stac92hd95(struct hda_codec *codec)
4005{
4006 struct sigmatel_spec *spec;
4007 int err;
4008
4009 err = alloc_stac_spec(codec);
4010 if (err < 0)
4011 return err;
4012
4013 codec->epss = 0; /* longer delay needed for D3 */
4014
4015 spec = codec->spec;
4016 spec->linear_tone_beep = 0;
4017 spec->gen.own_eapd_ctl = 1;
4018 spec->gen.power_down_unused = 1;
4019
4020 spec->digbeep_nid = 0x19;
4021 spec->pwr_nids = stac92hd95_pwr_nids;
4022 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
4023 spec->default_polarity = -1; /* no default cfg */
4024
4025 codec->patch_ops = stac_patch_ops;
4026
4027 err = stac_parse_auto_config(codec);
4028 if (err < 0) {
4029 stac_free(codec);
4030 return err;
4031 }
4032
4033 codec->proc_widget_hook = stac92hd_proc_hook;
4034
4035 return 0;
4036}
4037
e035b841
MR		 4038static int patch_stac92hd71bxx(struct hda_codec *codec)
4039{
4040 struct sigmatel_spec *spec;
2b63536f 4041 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
361dab3e 4042 int err;
e035b841 4043
36c9db7a 4044 err = alloc_stac_spec(codec);
361dab3e
TI		 4045 if (err < 0)
4046 return err;
e035b841 4047
361dab3e 4048 spec = codec->spec;
1b0e372d 4049 spec->linear_tone_beep = 0;
36c9db7a 4050 spec->gen.own_eapd_ctl = 1;
f4f678d2 4051 spec->gen.power_down_unused = 1;
2748746f 4052 spec->gen.mixer_nid = 0x17;
42875479 4053 spec->have_spdif_mux = 1;
e035b841 4054
36c9db7a 4055 codec->patch_ops = stac_patch_ops;
0f6fcb73
TI		 4056
4057 /* GPIO0 = EAPD */
4058 spec->gpio_mask = 0x01;
4059 spec->gpio_dir = 0x01;
4060 spec->gpio_data = 0x01;
41c3b648 4061
541eee87
MR		 4062 switch (codec->vendor_id) {
4063 case 0x111d76b6: /* 4 Port without Analog Mixer */
4064 case 0x111d76b7:
23c7b521 4065 unmute_init++;
541eee87 4066 break;
aafc4412 4067 case 0x111d7608: /* 5 Port with Analog Mixer */
8daaaa97 4068 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4069 (codec->revision_id & 0xf) == 1)
8daaaa97 4070 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4071
aafc4412 4072 /* disable VSW */
ca8d33fc 4073 unmute_init++;
330ee995
TI		 4074 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4075 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
aafc4412
MR		 4076 break;
4077 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4078 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4079 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4080
5207e10e 4081 break;
541eee87
MR		 4082 }
4083
5e68fb3c 4084 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
0f6fcb73 4085 snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
5e68fb3c 4086
ca8d33fc
MR		 4087 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
4088 snd_hda_sequence_write_cache(codec, unmute_init);
4089
36c9db7a 4090 spec->aloopback_ctl = &stac92hd71bxx_loopback;
4b33c767 4091 spec->aloopback_mask = 0x50;
541eee87
MR		 4092 spec->aloopback_shift = 0;
4093
8daaaa97 4094 spec->powerdown_adcs = 1;
1cd2224c 4095 spec->digbeep_nid = 0x26;
36c9db7a 4096 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
aafc4412 4097 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841 4098
36c9db7a
TI		 4099 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4100 stac92hd71bxx_fixups);
0f6fcb73 4101 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
5bdaaada 4102
372f8c75 4103 stac_setup_gpio(codec);
6a14f585 4104
36c9db7a 4105 err = stac_parse_auto_config(codec);
e035b841 4106 if (err < 0) {
36c9db7a 4107 stac_free(codec);
e035b841
MR		 4108 return err;
4109 }
4110
2d34e1b3
TI		 4111 codec->proc_widget_hook = stac92hd7x_proc_hook;
4112
0f6fcb73
TI		 4113 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4114
e035b841 4115 return 0;
86d190e7 4116}
e035b841 4117
2f2f4251
M		 4118static int patch_stac922x(struct hda_codec *codec)
4119{
4120 struct sigmatel_spec *spec;
c7d4b2fa 4121 int err;
2f2f4251 4122
36c9db7a 4123 err = alloc_stac_spec(codec);
361dab3e
TI		 4124 if (err < 0)
4125 return err;
2f2f4251 4126
361dab3e 4127 spec = codec->spec;
1b0e372d 4128 spec->linear_tone_beep = 1;
36c9db7a 4129 spec->gen.own_eapd_ctl = 1;
5d5d3bc3 4130
36c9db7a 4131 codec->patch_ops = stac_patch_ops;
c7d4b2fa 4132
0a427846
TI		 4133 snd_hda_add_verbs(codec, stac922x_core_init);
4134
807a4636
TI		 4135 /* Fix Mux capture level; max to 2 */
4136 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4137 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4138 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4139 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4140 (0 << AC_AMPCAP_MUTE_SHIFT));
4141
36c9db7a
TI		 4142 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4143 stac922x_fixups);
4144 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4145
4146 err = stac_parse_auto_config(codec);
4147 if (err < 0) {
4148 stac_free(codec);
4149 return err;
4150 }
4151
0a427846
TI		 4152 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4153
3cc08dc6
MP		 4154 return 0;
4155}
4156
42875479
TI		 4157static const char * const stac927x_spdif_labels[] = {
4158 "Digital Playback", "ADAT", "Analog Mux 1",
4159 "Analog Mux 2", "Analog Mux 3", NULL
4160};
4161
3cc08dc6
MP		 4162static int patch_stac927x(struct hda_codec *codec)
4163{
4164 struct sigmatel_spec *spec;
4165 int err;
4166
36c9db7a 4167 err = alloc_stac_spec(codec);
361dab3e
TI		 4168 if (err < 0)
4169 return err;
3cc08dc6 4170
361dab3e 4171 spec = codec->spec;
1b0e372d 4172 spec->linear_tone_beep = 1;
36c9db7a 4173 spec->gen.own_eapd_ctl = 1;
42875479
TI		 4174 spec->have_spdif_mux = 1;
4175 spec->spdif_labels = stac927x_spdif_labels;
3cc08dc6 4176
1cd2224c 4177 spec->digbeep_nid = 0x23;
8e9068b1 4178
29ac8363
TI		 4179 /* GPIO0 High = Enable EAPD */
4180 spec->eapd_mask = spec->gpio_mask = 0x01;
4181 spec->gpio_dir = spec->gpio_data = 0x01;
af6ee302 4182
36c9db7a 4183 spec->aloopback_ctl = &stac927x_loopback;
e1f0d669
MR		 4184 spec->aloopback_mask = 0x40;
4185 spec->aloopback_shift = 0;
c0cea0d0 4186 spec->eapd_switch = 1;
8e9068b1 4187
36c9db7a
TI		 4188 codec->patch_ops = stac_patch_ops;
4189
4190 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4191 stac927x_fixups);
f6655d52
TI		 4192 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4193
29ac8363
TI		 4194 if (!spec->volknob_init)
4195 snd_hda_add_verbs(codec, stac927x_core_init);
4196
36c9db7a 4197 err = stac_parse_auto_config(codec);
c7d4b2fa 4198 if (err < 0) {
36c9db7a 4199 stac_free(codec);
c7d4b2fa
M		 4200 return err;
4201 }
2f2f4251 4202
2d34e1b3
TI		 4203 codec->proc_widget_hook = stac927x_proc_hook;
4204
52987656
TI		 4205 /*
4206 * !!FIXME!!
4207 * The STAC927x seem to require fairly long delays for certain
4208 * command sequences. With too short delays (even if the answer
4209 * is set to RIRB properly), it results in the silence output
4210 * on some hardwares like Dell.
4211 *
4212 * The below flag enables the longer delay (see get_response
4213 * in hda_intel.c).
4214 */
4215 codec->bus->needs_damn_long_delay = 1;
4216
29ac8363 4217 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
e28d8322 4218
2f2f4251
M		 4219 return 0;
4220}
4221
f3302a59
MP		 4222static int patch_stac9205(struct hda_codec *codec)
4223{
4224 struct sigmatel_spec *spec;
8259980e 4225 int err;
f3302a59 4226
36c9db7a 4227 err = alloc_stac_spec(codec);
361dab3e
TI		 4228 if (err < 0)
4229 return err;
f3302a59 4230
361dab3e 4231 spec = codec->spec;
1b0e372d 4232 spec->linear_tone_beep = 1;
36c9db7a 4233 spec->gen.own_eapd_ctl = 1;
42875479 4234 spec->have_spdif_mux = 1;
f3302a59 4235
1cd2224c 4236 spec->digbeep_nid = 0x23;
f3302a59 4237
fe6322ca 4238 snd_hda_add_verbs(codec, stac9205_core_init);
36c9db7a 4239 spec->aloopback_ctl = &stac9205_loopback;
6479c631 4240
e1f0d669
MR		 4241 spec->aloopback_mask = 0x40;
4242 spec->aloopback_shift = 0;
87d48363 4243
fe6322ca
TI		 4244 /* GPIO0 High = EAPD */
4245 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4246 spec->gpio_data = 0x01;
87d48363 4247
fe6322ca
TI		 4248 /* Turn on/off EAPD per HP plugging */
4249 spec->eapd_switch = 1;
4fe5195c 4250
36c9db7a
TI		 4251 codec->patch_ops = stac_patch_ops;
4252
4253 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4254 stac9205_fixups);
fe6322ca 4255 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
33382403 4256
36c9db7a 4257 err = stac_parse_auto_config(codec);
f3302a59 4258 if (err < 0) {
36c9db7a 4259 stac_free(codec);
f3302a59
MP		 4260 return err;
4261 }
4262
2d34e1b3
TI		 4263 codec->proc_widget_hook = stac9205_proc_hook;
4264
fe6322ca
TI		 4265 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4266
f3302a59
MP		 4267 return 0;
4268}
4269
db064e50 4270/*
6d859065 4271 * STAC9872 hack
db064e50
TI		 4272 */
4273
2b63536f 4274static const struct hda_verb stac9872_core_init[] = {
1624cb9a 4275 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4276 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4277 {}
4278};
4279
fc268c10
TI		 4280static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4281 { 0x0a, 0x03211020 },
4282 { 0x0b, 0x411111f0 },
4283 { 0x0c, 0x411111f0 },
4284 { 0x0d, 0x03a15030 },
4285 { 0x0e, 0x411111f0 },
4286 { 0x0f, 0x90170110 },
4287 { 0x11, 0x411111f0 },
4288 { 0x13, 0x411111f0 },
4289 { 0x14, 0x90a7013e },
4290 {}
307282c8
TI		 4291};
4292
fc268c10
TI		 4293static const struct hda_model_fixup stac9872_models[] = {
4294 { .id = STAC_9872_VAIO, .name = "vaio" },
4295 {}
307282c8
TI		 4296};
4297
fc268c10
TI		 4298static const struct hda_fixup stac9872_fixups[] = {
4299 [STAC_9872_VAIO] = {
4300 .type = HDA_FIXUP_PINS,
4301 .v.pins = stac9872_vaio_pin_configs,
4302 },
307282c8
TI		 4303};
4304
fc268c10 4305static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
b04add95
TI		 4306 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
4307 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 4308 {} /* terminator */
4309};
4310
6d859065 4311static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4312{
4313 struct sigmatel_spec *spec;
1e137f92 4314 int err;
db064e50 4315
36c9db7a 4316 err = alloc_stac_spec(codec);
361dab3e
TI		 4317 if (err < 0)
4318 return err;
4319
4320 spec = codec->spec;
1b0e372d 4321 spec->linear_tone_beep = 1;
36c9db7a 4322 spec->gen.own_eapd_ctl = 1;
caa10b6e 4323
36c9db7a 4324 codec->patch_ops = stac_patch_ops;
db064e50 4325
fc268c10
TI		 4326 snd_hda_add_verbs(codec, stac9872_core_init);
4327
36c9db7a
TI		 4328 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
4329 stac9872_fixups);
fc268c10 4330 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
1e137f92 4331
36c9db7a 4332 err = stac_parse_auto_config(codec);
1e137f92 4333 if (err < 0) {
36c9db7a 4334 stac_free(codec);
1e137f92
TI		 4335 return -EINVAL;
4336 }
fc268c10
TI		 4337
4338 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4339
db064e50
TI		 4340 return 0;
4341}
4342
4343
2f2f4251
M		 4344/*
4345 * patch entries
4346 */
2b63536f 4347static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 4348 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4349 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4350 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4351 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4352 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4353 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4354 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4355 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4356 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4357 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4358 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4359 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4360 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4361 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4362 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4363 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4364 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4365 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4366 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4367 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4368 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4369 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4370 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4371 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4372 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4373 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4374 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4375 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4376 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 4377 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
4378 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 4379 /* The following does not take into account .id=0x83847661 when subsys =
4380 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4381 * currently not fully supported.
4382 */
4383 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4384 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4385 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 4386 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP		 4387 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4388 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4389 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4390 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4391 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4392 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4393 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4394 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 4395 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6 4396 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
a9694faa 4397 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
d0513fc6 4398 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 4399 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
8a345a04
CC		 4400 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
4401 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
36706005
CC		 4402 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
4403 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
4404 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
4405 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
aafc4412 4406 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 4407 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4408 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4409 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
4e637c6e 4410 { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 },
541eee87
MR		 4411 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4412 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4413 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4414 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4415 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4416 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4417 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4418 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4d8ec5f3
CC		 4419 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
4420 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
4421 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
4422 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
4423 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
4424 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
4425 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
4426 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
4427 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
4428 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
4429 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
4430 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
4431 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
4432 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
4433 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
46724c2e 4434 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 4435 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4dfb8a45
VK		 4436 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
4437 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 4438 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
ad5d8755
CC		 4439 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
4440 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
4441 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
4442 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
4443 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
4444 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
4445 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
4446 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
4447 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
4448 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
4449 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
4450 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
2f2f4251
M		 4451 {} /* terminator */
4452};
1289e9e8
TI		 4453
4454MODULE_ALIAS("snd-hda-codec-id:8384*");
4455MODULE_ALIAS("snd-hda-codec-id:111d*");
4456
4457MODULE_LICENSE("GPL");
4458MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
4459
4460static struct hda_codec_preset_list sigmatel_list = {
4461 .preset = snd_hda_preset_sigmatel,
4462 .owner = THIS_MODULE,
4463};
4464
4465static int __init patch_sigmatel_init(void)
4466{
4467 return snd_hda_add_codec_preset(&sigmatel_list);
4468}
4469
4470static void __exit patch_sigmatel_exit(void)
4471{
4472 snd_hda_delete_codec_preset(&sigmatel_list);
4473}
4474
4475module_init(patch_sigmatel_init)
4476module_exit(patch_sigmatel_exit)
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