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ALSA: hda - Use standard fixup table for STAC9200
[mirror_ubuntu-bionic-kernel.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
da155d5b 32#include <linux/module.h>
2f2f4251 33#include <sound/core.h>
c7d4b2fa 34#include <sound/asoundef.h>
45a6ac16 35#include <sound/jack.h>
a74ccea5 36#include <sound/tlv.h>
2f2f4251
M		 37#include "hda_codec.h"
38#include "hda_local.h"
128bc4ba 39#include "hda_auto_parser.h"
1cd2224c 40#include "hda_beep.h"
1835a0f9 41#include "hda_jack.h"
2f2f4251 42
c6e4c666
TI		 43enum {
44 STAC_VREF_EVENT = 1,
45 STAC_INSERT_EVENT,
46 STAC_PWR_EVENT,
47 STAC_HP_EVENT,
fefd67f3 48 STAC_LO_EVENT,
3d21d3f7 49 STAC_MIC_EVENT,
c6e4c666 50};
4e55096e 51
f5fcc13c
TI		 52enum {
53 STAC_REF,
bf277785 54 STAC_9200_OQO,
dfe495d0
TI		 55 STAC_9200_DELL_D21,
56 STAC_9200_DELL_D22,
57 STAC_9200_DELL_D23,
58 STAC_9200_DELL_M21,
59 STAC_9200_DELL_M22,
60 STAC_9200_DELL_M23,
61 STAC_9200_DELL_M24,
62 STAC_9200_DELL_M25,
63 STAC_9200_DELL_M26,
64 STAC_9200_DELL_M27,
58eec423
MCC		 65 STAC_9200_M4,
66 STAC_9200_M4_2,
117f257d 67 STAC_9200_PANASONIC,
d39a3ae8 68 STAC_9200_EAPD_INIT,
f5fcc13c
TI		 69 STAC_9200_MODELS
70};
71
72enum {
1607b8ea 73 STAC_9205_AUTO,
f5fcc13c 74 STAC_9205_REF,
dfe495d0 75 STAC_9205_DELL_M42,
ae0a8ed8
TD		 76 STAC_9205_DELL_M43,
77 STAC_9205_DELL_M44,
d9a4268e 78 STAC_9205_EAPD,
f5fcc13c
TI		 79 STAC_9205_MODELS
80};
81
e1f0d669 82enum {
1607b8ea 83 STAC_92HD73XX_AUTO,
9e43f0de 84 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 85 STAC_92HD73XX_REF,
ae709440 86 STAC_92HD73XX_INTEL,
661cd8fb
TI		 87 STAC_DELL_M6_AMIC,
88 STAC_DELL_M6_DMIC,
89 STAC_DELL_M6_BOTH,
6b3ab21e 90 STAC_DELL_EQ,
842ae638 91 STAC_ALIENWARE_M17X,
e1f0d669
MR		 92 STAC_92HD73XX_MODELS
93};
94
d0513fc6 95enum {
1607b8ea 96 STAC_92HD83XXX_AUTO,
d0513fc6 97 STAC_92HD83XXX_REF,
32ed3f46 98 STAC_92HD83XXX_PWR_REF,
8bb0ac55 99 STAC_DELL_S14,
f7f9bdfa 100 STAC_DELL_VOSTRO_3500,
0c27c180 101 STAC_92HD83XXX_HP_cNB11_INTQUAD,
48315590 102 STAC_HP_DV7_4000,
5556e147 103 STAC_HP_ZEPHYR,
a3e19973 104 STAC_92HD83XXX_HP_LED,
ff8a1e27 105 STAC_92HD83XXX_HP_INV_LED,
62cbde18 106 STAC_92HD83XXX_HP_MIC_LED,
8d032a8f 107 STAC_92HD83XXX_HEADSET_JACK,
d0513fc6
MR		 108 STAC_92HD83XXX_MODELS
109};
110
e035b841 111enum {
1607b8ea 112 STAC_92HD71BXX_AUTO,
e035b841 113 STAC_92HD71BXX_REF,
a7662640
MR		 114 STAC_DELL_M4_1,
115 STAC_DELL_M4_2,
3a7abfd2 116 STAC_DELL_M4_3,
6a14f585 117 STAC_HP_M4,
2a6ce6e5 118 STAC_HP_DV4,
1b0652eb 119 STAC_HP_DV5,
ae6241fb 120 STAC_HP_HDX,
514bf54c 121 STAC_HP_DV4_1222NR,
e035b841
MR		 122 STAC_92HD71BXX_MODELS
123};
124
8e21c34c 125enum {
1607b8ea 126 STAC_925x_AUTO,
8e21c34c 127 STAC_925x_REF,
9cb36c2a
MCC		 128 STAC_M1,
129 STAC_M1_2,
130 STAC_M2,
8e21c34c 131 STAC_M2_2,
9cb36c2a
MCC		 132 STAC_M3,
133 STAC_M5,
134 STAC_M6,
8e21c34c
TD		 135 STAC_925x_MODELS
136};
137
f5fcc13c 138enum {
1607b8ea 139 STAC_922X_AUTO,
f5fcc13c
TI		 140 STAC_D945_REF,
141 STAC_D945GTP3,
142 STAC_D945GTP5,
5d5d3bc3
IZ		 143 STAC_INTEL_MAC_V1,
144 STAC_INTEL_MAC_V2,
145 STAC_INTEL_MAC_V3,
146 STAC_INTEL_MAC_V4,
147 STAC_INTEL_MAC_V5,
536319af
NB		 148 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
149 * is given, one of the above models will be
150 * chosen according to the subsystem id. */
dfe495d0 151 /* for backward compatibility */
f5fcc13c 152 STAC_MACMINI,
3fc24d85 153 STAC_MACBOOK,
6f0778d8
NB		 154 STAC_MACBOOK_PRO_V1,
155 STAC_MACBOOK_PRO_V2,
f16928fb 156 STAC_IMAC_INTEL,
0dae0f83 157 STAC_IMAC_INTEL_20,
8c650087 158 STAC_ECS_202,
dfe495d0
TI		 159 STAC_922X_DELL_D81,
160 STAC_922X_DELL_D82,
161 STAC_922X_DELL_M81,
162 STAC_922X_DELL_M82,
f5fcc13c
TI		 163 STAC_922X_MODELS
164};
165
166enum {
1607b8ea 167 STAC_927X_AUTO,
e28d8322 168 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 169 STAC_D965_REF,
170 STAC_D965_3ST,
171 STAC_D965_5ST,
679d92ed 172 STAC_D965_5ST_NO_FP,
4ff076e5 173 STAC_DELL_3ST,
8e9068b1 174 STAC_DELL_BIOS,
54930531 175 STAC_927X_VOLKNOB,
f5fcc13c
TI		 176 STAC_927X_MODELS
177};
403d1944 178
307282c8
TI		 179enum {
180 STAC_9872_AUTO,
181 STAC_9872_VAIO,
182 STAC_9872_MODELS
183};
184
3d21d3f7
TI		 185struct sigmatel_mic_route {
186 hda_nid_t pin;
02d33322
TI		 187 signed char mux_idx;
188 signed char dmux_idx;
3d21d3f7
TI		 189};
190
699d8995
VK		 191#define MAX_PINS_NUM 16
192#define MAX_ADCS_NUM 4
193#define MAX_DMICS_NUM 4
194
2f2f4251 195struct sigmatel_spec {
c8b6bf9b 196 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 197 unsigned int num_mixers;
198
403d1944 199 int board_config;
c0cea0d0 200 unsigned int eapd_switch: 1;
c7d4b2fa 201 unsigned int surr_switch: 1;
3cc08dc6 202 unsigned int alt_switch: 1;
82bc955f 203 unsigned int hp_detect: 1;
00ef50c2 204 unsigned int spdif_mute: 1;
7c7767eb 205 unsigned int check_volume_offset:1;
3d21d3f7 206 unsigned int auto_mic:1;
1b0e372d 207 unsigned int linear_tone_beep:1;
8d032a8f 208 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
c7d4b2fa 209
4fe5195c 210 /* gpio lines */
0fc9dec4 211 unsigned int eapd_mask;
4fe5195c
MR		 212 unsigned int gpio_mask;
213 unsigned int gpio_dir;
214 unsigned int gpio_data;
215 unsigned int gpio_mute;
86d190e7 216 unsigned int gpio_led;
c357aab0 217 unsigned int gpio_led_polarity;
f1a73746 218 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
45eebda7 219 unsigned int vref_led;
4fe5195c 220
62cbde18
TI		 221 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
222 bool mic_mute_led_on; /* current mic mute state */
223
8daaaa97
MR		 224 /* stream */
225 unsigned int stream_delay;
226
4fe5195c 227 /* analog loopback */
2b63536f 228 const struct snd_kcontrol_new *aloopback_ctl;
e1f0d669
MR		 229 unsigned char aloopback_mask;
230 unsigned char aloopback_shift;
8259980e 231
a64135a2 232 /* power management */
c882246d 233 unsigned int power_map_bits;
a64135a2 234 unsigned int num_pwrs;
2b63536f
TI		 235 const hda_nid_t *pwr_nids;
236 const hda_nid_t *dac_list;
a64135a2 237
2f2f4251 238 /* playback */
b22b4821
MR		 239 struct hda_input_mux *mono_mux;
240 unsigned int cur_mmux;
2f2f4251 241 struct hda_multi_out multiout;
3cc08dc6 242 hda_nid_t dac_nids[5];
c21ca4a8
TI		 243 hda_nid_t hp_dacs[5];
244 hda_nid_t speaker_dacs[5];
2f2f4251 245
7c7767eb
TI		 246 int volume_offset;
247
2f2f4251 248 /* capture */
2b63536f 249 const hda_nid_t *adc_nids;
2f2f4251 250 unsigned int num_adcs;
2b63536f 251 const hda_nid_t *mux_nids;
dabbed6f 252 unsigned int num_muxes;
2b63536f 253 const hda_nid_t *dmic_nids;
8b65727b 254 unsigned int num_dmics;
2b63536f 255 const hda_nid_t *dmux_nids;
1697055e 256 unsigned int num_dmuxes;
2b63536f 257 const hda_nid_t *smux_nids;
d9737751 258 unsigned int num_smuxes;
5207e10e 259 unsigned int num_analog_muxes;
6479c631 260
2b63536f
TI		 261 const unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
262 const unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
6479c631
TI		 263 unsigned int num_caps; /* number of capture volume/switch elements */
264
3d21d3f7
TI		 265 struct sigmatel_mic_route ext_mic;
266 struct sigmatel_mic_route int_mic;
9907790a 267 struct sigmatel_mic_route dock_mic;
3d21d3f7 268
ea734963 269 const char * const *spdif_labels;
d9737751 270
dabbed6f 271 hda_nid_t dig_in_nid;
b22b4821 272 hda_nid_t mono_nid;
1cd2224c
MR		 273 hda_nid_t anabeep_nid;
274 hda_nid_t digbeep_nid;
2f2f4251 275
2f2f4251 276 /* pin widgets */
2b63536f 277 const hda_nid_t *pin_nids;
2f2f4251 278 unsigned int num_pins;
2f2f4251
M		 279
280 /* codec specific stuff */
2b63536f
TI		 281 const struct hda_verb *init;
282 const struct snd_kcontrol_new *mixer;
2f2f4251
M		 283
284 /* capture source */
8b65727b 285 struct hda_input_mux *dinput_mux;
e1f0d669 286 unsigned int cur_dmux[2];
c7d4b2fa 287 struct hda_input_mux *input_mux;
3cc08dc6 288 unsigned int cur_mux[3];
d9737751
MR		 289 struct hda_input_mux *sinput_mux;
290 unsigned int cur_smux[2];
2a9c7816
MR		 291 unsigned int cur_amux;
292 hda_nid_t *amp_nids;
8daaaa97 293 unsigned int powerdown_adcs;
2f2f4251 294
403d1944
MP		 295 /* i/o switches */
296 unsigned int io_switch[2];
0fb87bb4 297 unsigned int clfe_swap;
c21ca4a8
TI		 298 hda_nid_t line_switch; /* shared line-in for input and output */
299 hda_nid_t mic_switch; /* shared mic-in for input and output */
300 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 301 unsigned int aloopback;
2f2f4251 302
c7d4b2fa
M		 303 struct hda_pcm pcm_rec[2]; /* PCM information */
304
305 /* dynamic controls and input_mux */
306 struct auto_pin_cfg autocfg;
603c4019 307 struct snd_array kctls;
8b65727b 308 struct hda_input_mux private_dimux;
c7d4b2fa 309 struct hda_input_mux private_imux;
d9737751 310 struct hda_input_mux private_smux;
b22b4821 311 struct hda_input_mux private_mono_mux;
699d8995
VK		 312
313 /* auto spec */
314 unsigned auto_pin_cnt;
315 hda_nid_t auto_pin_nids[MAX_PINS_NUM];
316 unsigned auto_adc_cnt;
317 hda_nid_t auto_adc_nids[MAX_ADCS_NUM];
318 hda_nid_t auto_mux_nids[MAX_ADCS_NUM];
319 hda_nid_t auto_dmux_nids[MAX_ADCS_NUM];
320 unsigned long auto_capvols[MAX_ADCS_NUM];
321 unsigned auto_dmic_cnt;
322 hda_nid_t auto_dmic_nids[MAX_DMICS_NUM];
2faa3bf1 323
d2f344b5 324 struct hda_vmaster_mute_hook vmaster_mute;
2f2f4251
M		 325};
326
c882246d
TI		 327#define AC_VERB_IDT_SET_POWER_MAP 0x7ec
328#define AC_VERB_IDT_GET_POWER_MAP 0xfec
329
2b63536f 330static const hda_nid_t stac9200_adc_nids[1] = {
2f2f4251
M		 331 0x03,
332};
333
2b63536f 334static const hda_nid_t stac9200_mux_nids[1] = {
2f2f4251
M		 335 0x0c,
336};
337
2b63536f 338static const hda_nid_t stac9200_dac_nids[1] = {
2f2f4251
M		 339 0x02,
340};
341
2b63536f 342static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
a64135a2
MR		 343 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
344 0x0f, 0x10, 0x11
345};
346
2b63536f 347static const hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
0ffa9807
MR		 348 0x26, 0,
349};
350
2b63536f 351static const hda_nid_t stac92hd73xx_adc_nids[2] = {
e1f0d669
MR		 352 0x1a, 0x1b
353};
354
355#define STAC92HD73XX_NUM_DMICS 2
2b63536f 356static const hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
e1f0d669
MR		 357 0x13, 0x14, 0
358};
359
360#define STAC92HD73_DAC_COUNT 5
e1f0d669 361
2b63536f 362static const hda_nid_t stac92hd73xx_mux_nids[2] = {
e2aec171 363 0x20, 0x21,
e1f0d669
MR		 364};
365
2b63536f 366static const hda_nid_t stac92hd73xx_dmux_nids[2] = {
e1f0d669
MR		 367 0x20, 0x21,
368};
369
2b63536f 370static const hda_nid_t stac92hd73xx_smux_nids[2] = {
d9737751
MR		 371 0x22, 0x23,
372};
373
6479c631 374#define STAC92HD73XX_NUM_CAPS 2
2b63536f 375static const unsigned long stac92hd73xx_capvols[] = {
6479c631
TI		 376 HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
377 HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
378};
379#define stac92hd73xx_capsws stac92hd73xx_capvols
380
d0513fc6 381#define STAC92HD83_DAC_COUNT 3
d0513fc6 382
afef2cfa
CC		 383static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
384 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
385 0x0f, 0x10
d0513fc6
MR		 386};
387
2b63536f 388static const hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
0ffa9807
MR		 389 0x1e, 0,
390};
391
2b63536f 392static const hda_nid_t stac92hd83xxx_dmic_nids[] = {
699d8995 393 0x11, 0x20,
ab5a6ebe
VK		 394};
395
2b63536f 396static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
a64135a2
MR		 397 0x0a, 0x0d, 0x0f
398};
399
2b63536f 400static const hda_nid_t stac92hd71bxx_adc_nids[2] = {
e035b841
MR		 401 0x12, 0x13,
402};
403
2b63536f 404static const hda_nid_t stac92hd71bxx_mux_nids[2] = {
e035b841
MR		 405 0x1a, 0x1b
406};
407
2b63536f 408static const hda_nid_t stac92hd71bxx_dmux_nids[2] = {
4b33c767 409 0x1c, 0x1d,
e1f0d669
MR		 410};
411
2b63536f 412static const hda_nid_t stac92hd71bxx_smux_nids[2] = {
d9737751
MR		 413 0x24, 0x25,
414};
415
e035b841 416#define STAC92HD71BXX_NUM_DMICS 2
2b63536f 417static const hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
e035b841
MR		 418 0x18, 0x19, 0
419};
420
2b63536f
TI		 421static const hda_nid_t stac92hd71bxx_dmic_5port_nids[STAC92HD71BXX_NUM_DMICS] = {
422 0x18, 0
423};
424
425static const hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
0ffa9807
MR		 426 0x22, 0
427};
428
6479c631 429#define STAC92HD71BXX_NUM_CAPS 2
2b63536f 430static const unsigned long stac92hd71bxx_capvols[] = {
6479c631
TI		 431 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
432 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
433};
434#define stac92hd71bxx_capsws stac92hd71bxx_capvols
435
2b63536f 436static const hda_nid_t stac925x_adc_nids[1] = {
8e21c34c
TD		 437 0x03,
438};
439
2b63536f 440static const hda_nid_t stac925x_mux_nids[1] = {
8e21c34c
TD		 441 0x0f,
442};
443
2b63536f 444static const hda_nid_t stac925x_dac_nids[1] = {
8e21c34c
TD		 445 0x02,
446};
447
f6e9852a 448#define STAC925X_NUM_DMICS 1
2b63536f 449static const hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
f6e9852a 450 0x15, 0
2c11f955
TD		 451};
452
2b63536f 453static const hda_nid_t stac925x_dmux_nids[1] = {
1697055e
TI		 454 0x14,
455};
456
2b63536f 457static const unsigned long stac925x_capvols[] = {
6479c631
TI		 458 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
459};
2b63536f 460static const unsigned long stac925x_capsws[] = {
6479c631
TI		 461 HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
462};
463
2b63536f 464static const hda_nid_t stac922x_adc_nids[2] = {
2f2f4251
M		 465 0x06, 0x07,
466};
467
2b63536f 468static const hda_nid_t stac922x_mux_nids[2] = {
2f2f4251
M		 469 0x12, 0x13,
470};
471
6479c631 472#define STAC922X_NUM_CAPS 2
2b63536f 473static const unsigned long stac922x_capvols[] = {
6479c631
TI		 474 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
475 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
476};
477#define stac922x_capsws stac922x_capvols
478
2b63536f 479static const hda_nid_t stac927x_slave_dig_outs[2] = {
45c1d85b
MR		 480 0x1f, 0,
481};
482
2b63536f 483static const hda_nid_t stac927x_adc_nids[3] = {
3cc08dc6
MP		 484 0x07, 0x08, 0x09
485};
486
2b63536f 487static const hda_nid_t stac927x_mux_nids[3] = {
3cc08dc6
MP		 488 0x15, 0x16, 0x17
489};
490
2b63536f 491static const hda_nid_t stac927x_smux_nids[1] = {
d9737751
MR		 492 0x21,
493};
494
2b63536f 495static const hda_nid_t stac927x_dac_nids[6] = {
b76c850f
MR		 496 0x02, 0x03, 0x04, 0x05, 0x06, 0
497};
498
2b63536f 499static const hda_nid_t stac927x_dmux_nids[1] = {
e1f0d669
MR		 500 0x1b,
501};
502
7f16859a 503#define STAC927X_NUM_DMICS 2
2b63536f 504static const hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
7f16859a
MR		 505 0x13, 0x14, 0
506};
507
6479c631 508#define STAC927X_NUM_CAPS 3
2b63536f 509static const unsigned long stac927x_capvols[] = {
6479c631
TI		 510 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
511 HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
512 HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
513};
2b63536f 514static const unsigned long stac927x_capsws[] = {
6479c631
TI		 515 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
516 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
517 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
518};
519
ea734963 520static const char * const stac927x_spdif_labels[5] = {
65973632
MR		 521 "Digital Playback", "ADAT", "Analog Mux 1",
522 "Analog Mux 2", "Analog Mux 3"
523};
524
2b63536f 525static const hda_nid_t stac9205_adc_nids[2] = {
f3302a59
MP		 526 0x12, 0x13
527};
528
2b63536f 529static const hda_nid_t stac9205_mux_nids[2] = {
f3302a59
MP		 530 0x19, 0x1a
531};
532
2b63536f 533static const hda_nid_t stac9205_dmux_nids[1] = {
1697055e 534 0x1d,
e1f0d669
MR		 535};
536
2b63536f 537static const hda_nid_t stac9205_smux_nids[1] = {
d9737751
MR		 538 0x21,
539};
540
f6e9852a 541#define STAC9205_NUM_DMICS 2
2b63536f 542static const hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
f6e9852a 543 0x17, 0x18, 0
8b65727b
MP		 544};
545
6479c631 546#define STAC9205_NUM_CAPS 2
2b63536f 547static const unsigned long stac9205_capvols[] = {
6479c631
TI		 548 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
549 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
550};
2b63536f 551static const unsigned long stac9205_capsws[] = {
6479c631
TI		 552 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
553 HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
554};
555
2b63536f 556static const hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 557 0x08, 0x09, 0x0d, 0x0e,
558 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 559};
560
2b63536f 561static const hda_nid_t stac925x_pin_nids[8] = {
8e21c34c
TD		 562 0x07, 0x08, 0x0a, 0x0b,
563 0x0c, 0x0d, 0x10, 0x11,
564};
565
2b63536f 566static const hda_nid_t stac922x_pin_nids[10] = {
2f2f4251
M		 567 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
568 0x0f, 0x10, 0x11, 0x15, 0x1b,
569};
570
2b63536f 571static const hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 572 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
573 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 574 0x14, 0x22, 0x23
e1f0d669
MR		 575};
576
616f89e7 577#define STAC92HD71BXX_NUM_PINS 13
2b63536f 578static const hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
616f89e7
HRK		 579 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
580 0x00, 0x14, 0x18, 0x19, 0x1e,
581 0x1f, 0x20, 0x27
582};
2b63536f 583static const hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR		 584 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
585 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 586 0x1f, 0x20, 0x27
e035b841
MR		 587};
588
2b63536f 589static const hda_nid_t stac927x_pin_nids[14] = {
3cc08dc6
MP		 590 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
591 0x0f, 0x10, 0x11, 0x12, 0x13,
592 0x14, 0x21, 0x22, 0x23,
593};
594
2b63536f 595static const hda_nid_t stac9205_pin_nids[12] = {
f3302a59
MP		 596 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
597 0x0f, 0x14, 0x16, 0x17, 0x18,
598 0x21, 0x22,
f3302a59
MP		 599};
600
8b65727b
MP		 601static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
602 struct snd_ctl_elem_info *uinfo)
603{
604 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
605 struct sigmatel_spec *spec = codec->spec;
606 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
607}
608
609static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
610 struct snd_ctl_elem_value *ucontrol)
611{
612 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
613 struct sigmatel_spec *spec = codec->spec;
e1f0d669 614 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 615
e1f0d669 616 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 617 return 0;
618}
619
620static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
621 struct snd_ctl_elem_value *ucontrol)
622{
623 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
624 struct sigmatel_spec *spec = codec->spec;
e1f0d669 625 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 626
627 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 628 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 629}
630
d9737751
MR		 631static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
632 struct snd_ctl_elem_info *uinfo)
633{
634 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
635 struct sigmatel_spec *spec = codec->spec;
636 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
637}
638
639static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
640 struct snd_ctl_elem_value *ucontrol)
641{
642 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
643 struct sigmatel_spec *spec = codec->spec;
644 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
645
646 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
647 return 0;
648}
649
650static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
651 struct snd_ctl_elem_value *ucontrol)
652{
653 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
654 struct sigmatel_spec *spec = codec->spec;
00ef50c2 655 struct hda_input_mux *smux = &spec->private_smux;
d9737751 656 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 657 int err, val;
658 hda_nid_t nid;
d9737751 659
00ef50c2 660 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 661 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 662 if (err < 0)
663 return err;
664
665 if (spec->spdif_mute) {
666 if (smux_idx == 0)
667 nid = spec->multiout.dig_out_nid;
668 else
669 nid = codec->slave_dig_outs[smux_idx - 1];
670 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 671 val = HDA_AMP_MUTE;
00ef50c2 672 else
c9b46f91 673 val = 0;
00ef50c2 674 /* un/mute SPDIF out */
c9b46f91
TI		 675 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
676 HDA_AMP_MUTE, val);
00ef50c2
MR		 677 }
678 return 0;
d9737751
MR		 679}
680
45eebda7
VK		 681static int stac_vrefout_set(struct hda_codec *codec,
682 hda_nid_t nid, unsigned int new_vref)
683{
684 int error, pinctl;
685
686 snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
687 pinctl = snd_hda_codec_read(codec, nid, 0,
688 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
689
690 if (pinctl < 0)
691 return pinctl;
692
693 pinctl &= 0xff;
694 pinctl &= ~AC_PINCTL_VREFEN;
695 pinctl |= (new_vref & AC_PINCTL_VREFEN);
696
cdd03ced 697 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
45eebda7
VK		 698 if (error < 0)
699 return error;
700
701 return 1;
702}
703
2fc99890
NL		 704static unsigned int stac92xx_vref_set(struct hda_codec *codec,
705 hda_nid_t nid, unsigned int new_vref)
706{
b8621516 707 int error;
2fc99890
NL		 708 unsigned int pincfg;
709 pincfg = snd_hda_codec_read(codec, nid, 0,
710 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
711
712 pincfg &= 0xff;
713 pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
714 pincfg |= new_vref;
715
716 if (new_vref == AC_PINCTL_VREF_HIZ)
717 pincfg |= AC_PINCTL_OUT_EN;
718 else
719 pincfg |= AC_PINCTL_IN_EN;
720
cdd03ced 721 error = snd_hda_set_pin_ctl_cache(codec, nid, pincfg);
2fc99890
NL		 722 if (error < 0)
723 return error;
724 else
725 return 1;
726}
727
728static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
729{
730 unsigned int vref;
731 vref = snd_hda_codec_read(codec, nid, 0,
732 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
733 vref &= AC_PINCTL_VREFEN;
734 return vref;
735}
736
c8b6bf9b 737static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 738{
739 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
740 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 741 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 742}
743
c8b6bf9b 744static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 745{
746 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
747 struct sigmatel_spec *spec = codec->spec;
748 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
749
750 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
751 return 0;
752}
753
c8b6bf9b 754static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 755{
756 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
757 struct sigmatel_spec *spec = codec->spec;
758 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5207e10e 759 const struct hda_input_mux *imux = spec->input_mux;
094a4245 760 unsigned int idx, prev_idx, didx;
5207e10e
TI		 761
762 idx = ucontrol->value.enumerated.item[0];
763 if (idx >= imux->num_items)
764 idx = imux->num_items - 1;
765 prev_idx = spec->cur_mux[adc_idx];
766 if (prev_idx == idx)
767 return 0;
768 if (idx < spec->num_analog_muxes) {
769 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
770 AC_VERB_SET_CONNECT_SEL,
771 imux->items[idx].index);
094a4245
VK		 772 if (prev_idx >= spec->num_analog_muxes &&
773 spec->mux_nids[adc_idx] != spec->dmux_nids[adc_idx]) {
5207e10e
TI		 774 imux = spec->dinput_mux;
775 /* 0 = analog */
776 snd_hda_codec_write_cache(codec,
777 spec->dmux_nids[adc_idx], 0,
778 AC_VERB_SET_CONNECT_SEL,
779 imux->items[0].index);
780 }
781 } else {
782 imux = spec->dinput_mux;
094a4245
VK		 783 /* first dimux item is hardcoded to select analog imux,
784 * so lets skip it
785 */
786 didx = idx - spec->num_analog_muxes + 1;
5207e10e
TI		 787 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
788 AC_VERB_SET_CONNECT_SEL,
094a4245 789 imux->items[didx].index);
5207e10e
TI		 790 }
791 spec->cur_mux[adc_idx] = idx;
792 return 1;
2f2f4251
M		 793}
794
b22b4821
MR		 795static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
796 struct snd_ctl_elem_info *uinfo)
797{
798 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
799 struct sigmatel_spec *spec = codec->spec;
800 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
801}
802
803static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
804 struct snd_ctl_elem_value *ucontrol)
805{
806 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
807 struct sigmatel_spec *spec = codec->spec;
808
809 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
810 return 0;
811}
812
813static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
814 struct snd_ctl_elem_value *ucontrol)
815{
816 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
817 struct sigmatel_spec *spec = codec->spec;
818
819 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
820 spec->mono_nid, &spec->cur_mmux);
821}
822
5f10c4a9
ML		 823#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
824
825static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
826 struct snd_ctl_elem_value *ucontrol)
827{
828 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 829 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 830 struct sigmatel_spec *spec = codec->spec;
831
e1f0d669
MR		 832 ucontrol->value.integer.value[0] = !!(spec->aloopback &
833 (spec->aloopback_mask << idx));
5f10c4a9
ML		 834 return 0;
835}
836
837static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
838 struct snd_ctl_elem_value *ucontrol)
839{
840 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
841 struct sigmatel_spec *spec = codec->spec;
e1f0d669 842 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 843 unsigned int dac_mode;
e1f0d669 844 unsigned int val, idx_val;
5f10c4a9 845
e1f0d669
MR		 846 idx_val = spec->aloopback_mask << idx;
847 if (ucontrol->value.integer.value[0])
848 val = spec->aloopback | idx_val;
849 else
850 val = spec->aloopback & ~idx_val;
68ea7b2f 851 if (spec->aloopback == val)
5f10c4a9
ML		 852 return 0;
853
68ea7b2f 854 spec->aloopback = val;
5f10c4a9 855
e1f0d669
MR		 856 /* Only return the bits defined by the shift value of the
857 * first two bytes of the mask
858 */
5f10c4a9 859 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 860 kcontrol->private_value & 0xFFFF, 0x0);
861 dac_mode >>= spec->aloopback_shift;
5f10c4a9 862
e1f0d669 863 if (spec->aloopback & idx_val) {
5f10c4a9 864 snd_hda_power_up(codec);
e1f0d669 865 dac_mode |= idx_val;
5f10c4a9
ML		 866 } else {
867 snd_hda_power_down(codec);
e1f0d669 868 dac_mode &= ~idx_val;
5f10c4a9
ML		 869 }
870
871 snd_hda_codec_write_cache(codec, codec->afg, 0,
872 kcontrol->private_value >> 16, dac_mode);
873
874 return 1;
875}
876
2b63536f 877static const struct hda_verb stac9200_core_init[] = {
2f2f4251 878 /* set dac0mux for dac converter */
c7d4b2fa 879 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 880 {}
881};
882
2b63536f 883static const struct hda_verb stac9200_eapd_init[] = {
1194b5b7
TI		 884 /* set dac0mux for dac converter */
885 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
886 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
887 {}
888};
889
2b63536f 890static const struct hda_verb dell_eq_core_init[] = {
d654a660
MR		 891 /* set master volume to max value without distortion
892 * and direct control */
893 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
e1f0d669
MR		 894 {}
895};
896
2b63536f 897static const struct hda_verb stac92hd73xx_core_init[] = {
e1f0d669
MR		 898 /* set master volume and direct control */
899 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 900 {}
901};
902
2b63536f 903static const struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 904 /* power state controls amps */
905 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 906 {}
d0513fc6
MR		 907};
908
5556e147
VK		 909static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
910 { 0x22, 0x785, 0x43 },
911 { 0x22, 0x782, 0xe0 },
912 { 0x22, 0x795, 0x00 },
913 {}
914};
915
2b63536f 916static const struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 917 /* set master volume and direct control */
918 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 919 {}
541eee87
MR		 920};
921
2b63536f 922static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
ca8d33fc
MR		 923 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
924 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 925 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
926 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 927 {}
928};
929
2b63536f 930static const struct hda_verb stac925x_core_init[] = {
8e21c34c
TD		 931 /* set dac0mux for dac converter */
932 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 933 /* mute the master volume */
934 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 935 {}
936};
937
2b63536f 938static const struct hda_verb stac922x_core_init[] = {
2f2f4251 939 /* set master volume and direct control */
c7d4b2fa 940 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 941 {}
942};
943
2b63536f 944static const struct hda_verb d965_core_init[] = {
19039bd0 945 /* set master volume and direct control */
93ed1503 946 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 947 /* unmute node 0x1b */
948 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
949 /* select node 0x03 as DAC */
950 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
951 {}
952};
953
2b63536f 954static const struct hda_verb dell_3st_core_init[] = {
ccca7cdc
TI		 955 /* don't set delta bit */
956 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
957 /* unmute node 0x1b */
958 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
959 /* select node 0x03 as DAC */
960 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
961 {}
962};
963
2b63536f 964static const struct hda_verb stac927x_core_init[] = {
3cc08dc6
MP		 965 /* set master volume and direct control */
966 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 967 /* enable analog pc beep path */
968 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 969 {}
970};
971
2b63536f 972static const struct hda_verb stac927x_volknob_core_init[] = {
54930531
TI		 973 /* don't set delta bit */
974 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
975 /* enable analog pc beep path */
976 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
977 {}
978};
979
2b63536f 980static const struct hda_verb stac9205_core_init[] = {
f3302a59
MP		 981 /* set master volume and direct control */
982 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 983 /* enable analog pc beep path */
984 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 985 {}
986};
987
b22b4821
MR		 988#define STAC_MONO_MUX \
989 { \
990 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
991 .name = "Mono Mux", \
992 .count = 1, \
993 .info = stac92xx_mono_mux_enum_info, \
994 .get = stac92xx_mono_mux_enum_get, \
995 .put = stac92xx_mono_mux_enum_put, \
996 }
997
e1f0d669 998#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 999 { \
1000 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1001 .name = "Analog Loopback", \
e1f0d669 1002 .count = cnt, \
5f10c4a9
ML		 1003 .info = stac92xx_aloopback_info, \
1004 .get = stac92xx_aloopback_get, \
1005 .put = stac92xx_aloopback_put, \
1006 .private_value = verb_read | (verb_write << 16), \
1007 }
1008
2fc99890
NL		 1009#define DC_BIAS(xname, idx, nid) \
1010 { \
1011 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1012 .name = xname, \
1013 .index = idx, \
1014 .info = stac92xx_dc_bias_info, \
1015 .get = stac92xx_dc_bias_get, \
1016 .put = stac92xx_dc_bias_put, \
1017 .private_value = nid, \
1018 }
1019
2b63536f 1020static const struct snd_kcontrol_new stac9200_mixer[] = {
2faa3bf1
TI		 1021 HDA_CODEC_VOLUME_MIN_MUTE("PCM Playback Volume", 0xb, 0, HDA_OUTPUT),
1022 HDA_CODEC_MUTE("PCM Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M		 1023 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1024 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 1025 { } /* end */
1026};
1027
2b63536f 1028static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
d78d7a90
TI		 1029 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1030 {}
1031};
1032
2b63536f 1033static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 1034 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI		 1035 {}
1036};
e1f0d669 1037
2b63536f 1038static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
d78d7a90
TI		 1039 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1040 {}
1041};
1042
d0513fc6 1043
2b63536f 1044static const struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
d78d7a90
TI		 1045 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
1046};
541eee87 1047
2b63536f 1048static const struct snd_kcontrol_new stac925x_mixer[] = {
2faa3bf1
TI		 1049 HDA_CODEC_VOLUME_MIN_MUTE("PCM Playback Volume", 0xe, 0, HDA_OUTPUT),
1050 HDA_CODEC_MUTE("PCM Playback Switch", 0x0e, 0, HDA_OUTPUT),
2f2f4251
M		 1051 { } /* end */
1052};
1053
2b63536f 1054static const struct snd_kcontrol_new stac9205_loopback[] = {
d78d7a90
TI		 1055 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
1056 {}
1057};
1058
2b63536f 1059static const struct snd_kcontrol_new stac927x_loopback[] = {
d78d7a90
TI		 1060 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
1061 {}
1062};
1063
1697055e
TI		 1064static struct snd_kcontrol_new stac_dmux_mixer = {
1065 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1066 .name = "Digital Input Source",
1067 /* count set later */
1068 .info = stac92xx_dmux_enum_info,
1069 .get = stac92xx_dmux_enum_get,
1070 .put = stac92xx_dmux_enum_put,
1071};
1072
d9737751
MR		 1073static struct snd_kcontrol_new stac_smux_mixer = {
1074 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1075 .name = "IEC958 Playback Source",
d9737751
MR		 1076 /* count set later */
1077 .info = stac92xx_smux_enum_info,
1078 .get = stac92xx_smux_enum_get,
1079 .put = stac92xx_smux_enum_put,
1080};
1081
9322ca54
TI		 1082static const char * const slave_pfxs[] = {
1083 "Front", "Surround", "Center", "LFE", "Side",
f37bc7a8 1084 "Headphone", "Speaker", "Bass Speaker", "IEC958", "PCM",
2134ea4f
TI		 1085 NULL
1086};
1087
2faa3bf1
TI		 1088static void stac92xx_update_led_status(struct hda_codec *codec, int enabled);
1089
1090static void stac92xx_vmaster_hook(void *private_data, int val)
1091{
1092 stac92xx_update_led_status(private_data, val);
1093}
1094
603c4019
TI		 1095static void stac92xx_free_kctls(struct hda_codec *codec);
1096
2f2f4251
M		 1097static int stac92xx_build_controls(struct hda_codec *codec)
1098{
1099 struct sigmatel_spec *spec = codec->spec;
2faa3bf1 1100 unsigned int vmaster_tlv[4];
2f2f4251 1101 int err;
c7d4b2fa 1102 int i;
2f2f4251 1103
6479c631
TI		 1104 if (spec->mixer) {
1105 err = snd_hda_add_new_ctls(codec, spec->mixer);
1106 if (err < 0)
1107 return err;
1108 }
c7d4b2fa
M		 1109
1110 for (i = 0; i < spec->num_mixers; i++) {
1111 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1112 if (err < 0)
1113 return err;
1114 }
5207e10e
TI		 1115 if (!spec->auto_mic && spec->num_dmuxes > 0 &&
1116 snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
1697055e 1117 stac_dmux_mixer.count = spec->num_dmuxes;
3911a4c1 1118 err = snd_hda_ctl_add(codec, 0,
1697055e
TI		 1119 snd_ctl_new1(&stac_dmux_mixer, codec));
1120 if (err < 0)
1121 return err;
1122 }
d9737751 1123 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1124 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1125 struct hda_input_mux *smux = &spec->private_smux;
1126 /* check for mute support on SPDIF out */
1127 if (wcaps & AC_WCAP_OUT_AMP) {
10a20af7 1128 snd_hda_add_imux_item(smux, "Off", 0, NULL);
00ef50c2
MR		 1129 spec->spdif_mute = 1;
1130 }
d9737751 1131 stac_smux_mixer.count = spec->num_smuxes;
3911a4c1 1132 err = snd_hda_ctl_add(codec, 0,
d9737751
MR		 1133 snd_ctl_new1(&stac_smux_mixer, codec));
1134 if (err < 0)
1135 return err;
1136 }
c7d4b2fa 1137
dabbed6f 1138 if (spec->multiout.dig_out_nid) {
dcda5806
TI		 1139 err = snd_hda_create_dig_out_ctls(codec,
1140 spec->multiout.dig_out_nid,
1141 spec->multiout.dig_out_nid,
1142 spec->autocfg.dig_out_type[0]);
dabbed6f
M		 1143 if (err < 0)
1144 return err;
9a08160b
TI		 1145 err = snd_hda_create_spdif_share_sw(codec,
1146 &spec->multiout);
1147 if (err < 0)
1148 return err;
1149 spec->multiout.share_spdif = 1;
dabbed6f 1150 }
da74ae3e 1151 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1152 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1153 if (err < 0)
1154 return err;
1155 }
2134ea4f
TI		 1156
1157 /* if we have no master control, let's create it */
2faa3bf1
TI		 1158 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1159 HDA_OUTPUT, vmaster_tlv);
1160 /* correct volume offset */
1161 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
1162 /* minimum value is actually mute */
1163 vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
1164 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1165 vmaster_tlv, slave_pfxs,
1166 "Playback Volume");
1167 if (err < 0)
1168 return err;
1169
1170 err = __snd_hda_add_vmaster(codec, "Master Playback Switch",
1171 NULL, slave_pfxs,
1172 "Playback Switch", true,
d2f344b5 1173 &spec->vmaster_mute.sw_kctl);
2faa3bf1
TI		 1174 if (err < 0)
1175 return err;
1176
1177 if (spec->gpio_led) {
d2f344b5 1178 spec->vmaster_mute.hook = stac92xx_vmaster_hook;
f29735cb 1179 err = snd_hda_add_vmaster_hook(codec, &spec->vmaster_mute, true);
d2f344b5
TI		 1180 if (err < 0)
1181 return err;
2134ea4f
TI		 1182 }
1183
d78d7a90
TI		 1184 if (spec->aloopback_ctl &&
1185 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1186 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1187 if (err < 0)
1188 return err;
1189 }
1190
603c4019 1191 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e 1192
01a61e12
TI		 1193 err = snd_hda_jack_add_kctls(codec, &spec->autocfg);
1194 if (err < 0)
1195 return err;
e4973e1e 1196
dabbed6f 1197 return 0;
2f2f4251
M		 1198}
1199
d39a3ae8
TI		 1200static const struct hda_pintbl ref9200_pin_configs[] = {
1201 { 0x08, 0x01c47010 },
1202 { 0x09, 0x01447010 },
1203 { 0x0d, 0x0221401f },
1204 { 0x0e, 0x01114010 },
1205 { 0x0f, 0x02a19020 },
1206 { 0x10, 0x01a19021 },
1207 { 0x11, 0x90100140 },
1208 { 0x12, 0x01813122 },
1209 {}
2f2f4251
M		 1210};
1211
d39a3ae8
TI		 1212static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1213 { 0x08, 0x400000fe },
1214 { 0x09, 0x404500f4 },
1215 { 0x0d, 0x400100f0 },
1216 { 0x0e, 0x90110010 },
1217 { 0x0f, 0x400100f1 },
1218 { 0x10, 0x02a1902e },
1219 { 0x11, 0x500000f2 },
1220 { 0x12, 0x500000f3 },
1221 {}
58eec423 1222};
d39a3ae8
TI		 1223
1224static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1225 { 0x08, 0x400000fe },
1226 { 0x09, 0x404500f4 },
1227 { 0x0d, 0x400100f0 },
1228 { 0x0e, 0x90110010 },
1229 { 0x0f, 0x400100f1 },
1230 { 0x10, 0x02a1902e },
1231 { 0x11, 0x500000f2 },
1232 { 0x12, 0x500000f3 },
1233 {}
58eec423
MCC		 1234};
1235
1236/*
dfe495d0
TI		 1237 STAC 9200 pin configs for
1238 102801A8
1239 102801DE
1240 102801E8
1241*/
d39a3ae8
TI		 1242static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1243 { 0x08, 0x400001f0 },
1244 { 0x09, 0x400001f1 },
1245 { 0x0d, 0x02214030 },
1246 { 0x0e, 0x01014010 },
1247 { 0x0f, 0x02a19020 },
1248 { 0x10, 0x01a19021 },
1249 { 0x11, 0x90100140 },
1250 { 0x12, 0x01813122 },
1251 {}
dfe495d0
TI		 1252};
1253
1254/*
1255 STAC 9200 pin configs for
1256 102801C0
1257 102801C1
1258*/
d39a3ae8
TI		 1259static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1260 { 0x08, 0x400001f0 },
1261 { 0x09, 0x400001f1 },
1262 { 0x0d, 0x0221401f },
1263 { 0x0e, 0x01014010 },
1264 { 0x0f, 0x01813020 },
1265 { 0x10, 0x02a19021 },
1266 { 0x11, 0x90100140 },
1267 { 0x12, 0x400001f2 },
1268 {}
dfe495d0
TI		 1269};
1270
1271/*
1272 STAC 9200 pin configs for
1273 102801C4 (Dell Dimension E310)
1274 102801C5
1275 102801C7
1276 102801D9
1277 102801DA
1278 102801E3
1279*/
d39a3ae8
TI		 1280static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1281 { 0x08, 0x400001f0 },
1282 { 0x09, 0x400001f1 },
1283 { 0x0d, 0x0221401f },
1284 { 0x0e, 0x01014010 },
1285 { 0x0f, 0x01813020 },
1286 { 0x10, 0x01a19021 },
1287 { 0x11, 0x90100140 },
1288 { 0x12, 0x400001f2 },
1289 {}
dfe495d0
TI		 1290};
1291
1292
1293/*
1294 STAC 9200-32 pin configs for
1295 102801B5 (Dell Inspiron 630m)
1296 102801D8 (Dell Inspiron 640m)
1297*/
d39a3ae8
TI		 1298static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1299 { 0x08, 0x40c003fa },
1300 { 0x09, 0x03441340 },
1301 { 0x0d, 0x0321121f },
1302 { 0x0e, 0x90170310 },
1303 { 0x0f, 0x408003fb },
1304 { 0x10, 0x03a11020 },
1305 { 0x11, 0x401003fc },
1306 { 0x12, 0x403003fd },
1307 {}
dfe495d0
TI		 1308};
1309
1310/*
1311 STAC 9200-32 pin configs for
1312 102801C2 (Dell Latitude D620)
1313 102801C8
1314 102801CC (Dell Latitude D820)
1315 102801D4
1316 102801D6
1317*/
d39a3ae8
TI		 1318static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1319 { 0x08, 0x40c003fa },
1320 { 0x09, 0x0144131f },
1321 { 0x0d, 0x0321121f },
1322 { 0x0e, 0x90170310 },
1323 { 0x0f, 0x90a70321 },
1324 { 0x10, 0x03a11020 },
1325 { 0x11, 0x401003fb },
1326 { 0x12, 0x40f000fc },
1327 {}
dfe495d0
TI		 1328};
1329
1330/*
1331 STAC 9200-32 pin configs for
1332 102801CE (Dell XPS M1710)
1333 102801CF (Dell Precision M90)
1334*/
d39a3ae8
TI		 1335static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1336 { 0x08, 0x40c003fa },
1337 { 0x09, 0x01441340 },
1338 { 0x0d, 0x0421421f },
1339 { 0x0e, 0x90170310 },
1340 { 0x0f, 0x408003fb },
1341 { 0x10, 0x04a1102e },
1342 { 0x11, 0x90170311 },
1343 { 0x12, 0x403003fc },
1344 {}
dfe495d0
TI		 1345};
1346
1347/*
1348 STAC 9200-32 pin configs for
1349 102801C9
1350 102801CA
1351 102801CB (Dell Latitude 120L)
1352 102801D3
1353*/
d39a3ae8
TI		 1354static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1355 { 0x08, 0x40c003fa },
1356 { 0x09, 0x404003fb },
1357 { 0x0d, 0x0321121f },
1358 { 0x0e, 0x90170310 },
1359 { 0x0f, 0x408003fc },
1360 { 0x10, 0x03a11020 },
1361 { 0x11, 0x401003fd },
1362 { 0x12, 0x403003fe },
1363 {}
dfe495d0
TI		 1364};
1365
1366/*
1367 STAC 9200-32 pin configs for
1368 102801BD (Dell Inspiron E1505n)
1369 102801EE
1370 102801EF
1371*/
d39a3ae8
TI		 1372static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1373 { 0x08, 0x40c003fa },
1374 { 0x09, 0x01441340 },
1375 { 0x0d, 0x0421121f },
1376 { 0x0e, 0x90170310 },
1377 { 0x0f, 0x408003fb },
1378 { 0x10, 0x04a11020 },
1379 { 0x11, 0x401003fc },
1380 { 0x12, 0x403003fd },
1381 {}
dfe495d0
TI		 1382};
1383
1384/*
1385 STAC 9200-32 pin configs for
1386 102801F5 (Dell Inspiron 1501)
1387 102801F6
1388*/
d39a3ae8
TI		 1389static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1390 { 0x08, 0x40c003fa },
1391 { 0x09, 0x404003fb },
1392 { 0x0d, 0x0421121f },
1393 { 0x0e, 0x90170310 },
1394 { 0x0f, 0x408003fc },
1395 { 0x10, 0x04a11020 },
1396 { 0x11, 0x401003fd },
1397 { 0x12, 0x403003fe },
1398 {}
dfe495d0
TI		 1399};
1400
1401/*
1402 STAC 9200-32
1403 102801CD (Dell Inspiron E1705/9400)
1404*/
d39a3ae8
TI		 1405static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1406 { 0x08, 0x40c003fa },
1407 { 0x09, 0x01441340 },
1408 { 0x0d, 0x0421121f },
1409 { 0x0e, 0x90170310 },
1410 { 0x0f, 0x90170310 },
1411 { 0x10, 0x04a11020 },
1412 { 0x11, 0x90170310 },
1413 { 0x12, 0x40f003fc },
1414 {}
dfe495d0
TI		 1415};
1416
d39a3ae8
TI		 1417static const struct hda_pintbl oqo9200_pin_configs[] = {
1418 { 0x08, 0x40c000f0 },
1419 { 0x09, 0x404000f1 },
1420 { 0x0d, 0x0221121f },
1421 { 0x0e, 0x02211210 },
1422 { 0x0f, 0x90170111 },
1423 { 0x10, 0x90a70120 },
1424 { 0x11, 0x400000f2 },
1425 { 0x12, 0x400000f3 },
1426 {}
bf277785
TD		 1427};
1428
dfe495d0 1429
d39a3ae8
TI		 1430static void stac9200_fixup_panasonic(struct hda_codec *codec,
1431 const struct hda_fixup *fix, int action)
1432{
1433 struct sigmatel_spec *spec = codec->spec;
1434
1435 switch (action) {
1436 case HDA_FIXUP_ACT_PRE_PROBE:
1437 spec->gpio_mask = spec->gpio_dir = 0x09;
1438 spec->gpio_data = 0x00;
1439 break;
1440 case HDA_FIXUP_ACT_PROBE:
1441 /* CF-74 has no headphone detection, and the driver should *NOT*
1442 * do detection and HP/speaker toggle because the hardware does it.
1443 */
1444 spec->hp_detect = 0;
1445 break;
1446 }
1447}
1448
1449
1450static const struct hda_fixup stac9200_fixups[] = {
1451 [STAC_REF] = {
1452 .type = HDA_FIXUP_PINS,
1453 .v.pins = ref9200_pin_configs,
1454 },
1455 [STAC_9200_OQO] = {
1456 .type = HDA_FIXUP_PINS,
1457 .v.pins = oqo9200_pin_configs,
1458 .chained = true,
1459 .chain_id = STAC_9200_EAPD_INIT,
1460 },
1461 [STAC_9200_DELL_D21] = {
1462 .type = HDA_FIXUP_PINS,
1463 .v.pins = dell9200_d21_pin_configs,
1464 },
1465 [STAC_9200_DELL_D22] = {
1466 .type = HDA_FIXUP_PINS,
1467 .v.pins = dell9200_d22_pin_configs,
1468 },
1469 [STAC_9200_DELL_D23] = {
1470 .type = HDA_FIXUP_PINS,
1471 .v.pins = dell9200_d23_pin_configs,
1472 },
1473 [STAC_9200_DELL_M21] = {
1474 .type = HDA_FIXUP_PINS,
1475 .v.pins = dell9200_m21_pin_configs,
1476 },
1477 [STAC_9200_DELL_M22] = {
1478 .type = HDA_FIXUP_PINS,
1479 .v.pins = dell9200_m22_pin_configs,
1480 },
1481 [STAC_9200_DELL_M23] = {
1482 .type = HDA_FIXUP_PINS,
1483 .v.pins = dell9200_m23_pin_configs,
1484 },
1485 [STAC_9200_DELL_M24] = {
1486 .type = HDA_FIXUP_PINS,
1487 .v.pins = dell9200_m24_pin_configs,
1488 },
1489 [STAC_9200_DELL_M25] = {
1490 .type = HDA_FIXUP_PINS,
1491 .v.pins = dell9200_m25_pin_configs,
1492 },
1493 [STAC_9200_DELL_M26] = {
1494 .type = HDA_FIXUP_PINS,
1495 .v.pins = dell9200_m26_pin_configs,
1496 },
1497 [STAC_9200_DELL_M27] = {
1498 .type = HDA_FIXUP_PINS,
1499 .v.pins = dell9200_m27_pin_configs,
1500 },
1501 [STAC_9200_M4] = {
1502 .type = HDA_FIXUP_PINS,
1503 .v.pins = gateway9200_m4_pin_configs,
1504 .chained = true,
1505 .chain_id = STAC_9200_EAPD_INIT,
1506 },
1507 [STAC_9200_M4_2] = {
1508 .type = HDA_FIXUP_PINS,
1509 .v.pins = gateway9200_m4_2_pin_configs,
1510 .chained = true,
1511 .chain_id = STAC_9200_EAPD_INIT,
1512 },
1513 [STAC_9200_PANASONIC] = {
1514 .type = HDA_FIXUP_FUNC,
1515 .v.func = stac9200_fixup_panasonic,
1516 },
1517 [STAC_9200_EAPD_INIT] = {
1518 .type = HDA_FIXUP_VERBS,
1519 .v.verbs = (const struct hda_verb[]) {
1520 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1521 {}
1522 },
1523 },
403d1944
MP		 1524};
1525
d39a3ae8
TI		 1526static const struct hda_model_fixup stac9200_models[] = {
1527 { .id = STAC_REF, .name = "ref" },
1528 { .id = STAC_9200_OQO, .name = "oqo" },
1529 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1530 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1531 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1532 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1533 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1534 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1535 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1536 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1537 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1538 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1539 { .id = STAC_9200_M4, .name = "gateway-m4" },
1540 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1541 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1542 {}
1543};
1544
1545static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
f5fcc13c
TI		 1546 /* SigmaTel reference board */
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1548 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1550 "DFI LanParty", STAC_REF),
e7377071 1551 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1552 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1553 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1554 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1555 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1557 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1558 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1559 "unknown Dell", STAC_9200_DELL_D22),
1560 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1561 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1562 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1563 "Dell Latitude D620", STAC_9200_DELL_M22),
1564 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1565 "unknown Dell", STAC_9200_DELL_D23),
1566 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1567 "unknown Dell", STAC_9200_DELL_D23),
1568 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1569 "unknown Dell", STAC_9200_DELL_M22),
1570 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1571 "unknown Dell", STAC_9200_DELL_M24),
1572 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1573 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1574 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1575 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1576 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1577 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1578 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1579 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1580 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1581 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1582 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1583 "Dell Precision M90", STAC_9200_DELL_M23),
1584 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1585 "unknown Dell", STAC_9200_DELL_M22),
1586 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1587 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1588 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1589 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1590 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1591 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1592 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1593 "unknown Dell", STAC_9200_DELL_D23),
1594 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1595 "unknown Dell", STAC_9200_DELL_D23),
1596 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1597 "unknown Dell", STAC_9200_DELL_D21),
1598 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1599 "unknown Dell", STAC_9200_DELL_D23),
1600 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1601 "unknown Dell", STAC_9200_DELL_D21),
1602 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1603 "unknown Dell", STAC_9200_DELL_M25),
1604 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1605 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1606 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1607 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1608 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1609 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1610 /* Panasonic */
117f257d 1611 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1612 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1613 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1614 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1615 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1616 /* OQO Mobile */
1617 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1618 {} /* terminator */
1619};
1620
2b63536f 1621static const unsigned int ref925x_pin_configs[8] = {
8e21c34c 1622 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1623 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1624};
1625
2b63536f 1626static const unsigned int stac925xM1_pin_configs[8] = {
9cb36c2a
MCC		 1627 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1628 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1629};
1630
2b63536f 1631static const unsigned int stac925xM1_2_pin_configs[8] = {
9cb36c2a
MCC		 1632 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1633 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1634};
58eec423 1635
2b63536f 1636static const unsigned int stac925xM2_pin_configs[8] = {
9cb36c2a
MCC		 1637 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1638 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1639};
1640
2b63536f 1641static const unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1642 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1643 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1644};
1645
2b63536f 1646static const unsigned int stac925xM3_pin_configs[8] = {
9cb36c2a
MCC		 1647 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1648 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1649};
58eec423 1650
2b63536f 1651static const unsigned int stac925xM5_pin_configs[8] = {
9cb36c2a
MCC		 1652 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1653 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1654};
1655
2b63536f 1656static const unsigned int stac925xM6_pin_configs[8] = {
9cb36c2a
MCC		 1657 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1658 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1659};
1660
2b63536f 1661static const unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
8e21c34c 1662 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1663 [STAC_M1] = stac925xM1_pin_configs,
1664 [STAC_M1_2] = stac925xM1_2_pin_configs,
1665 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1666 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1667 [STAC_M3] = stac925xM3_pin_configs,
1668 [STAC_M5] = stac925xM5_pin_configs,
1669 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1670};
1671
ea734963 1672static const char * const stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1673 [STAC_925x_AUTO] = "auto",
8e21c34c 1674 [STAC_REF] = "ref",
9cb36c2a
MCC		 1675 [STAC_M1] = "m1",
1676 [STAC_M1_2] = "m1-2",
1677 [STAC_M2] = "m2",
8e21c34c 1678 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1679 [STAC_M3] = "m3",
1680 [STAC_M5] = "m5",
1681 [STAC_M6] = "m6",
8e21c34c
TD		 1682};
1683
2b63536f 1684static const struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1685 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1686 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1687 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1688 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1689 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1690 /* Not sure about the brand name for those */
1691 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1692 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1693 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1694 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1695 {} /* terminator */
8e21c34c
TD		 1696};
1697
2b63536f 1698static const struct snd_pci_quirk stac925x_cfg_tbl[] = {
8e21c34c
TD		 1699 /* SigmaTel reference board */
1700 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1701 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1702 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1703
1704 /* Default table for unknown ID */
1705 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1706
8e21c34c
TD		 1707 {} /* terminator */
1708};
1709
2b63536f 1710static const unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1711 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1712 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1713 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1714 0x01452050,
1715};
1716
2b63536f 1717static const unsigned int dell_m6_pin_configs[13] = {
a7662640 1718 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1719 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1720 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1721 0x4f0000f0,
e1f0d669
MR		 1722};
1723
2b63536f 1724static const unsigned int alienware_m17x_pin_configs[13] = {
842ae638
TI		 1725 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020,
1726 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0,
1727 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1728 0x904601b0,
1729};
1730
2b63536f 1731static const unsigned int intel_dg45id_pin_configs[13] = {
52dc4386 1732 0x02214230, 0x02A19240, 0x01013214, 0x01014210,
4d26f446 1733 0x01A19250, 0x01011212, 0x01016211
52dc4386
AF		 1734};
1735
2b63536f 1736static const unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1737 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1738 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1739 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1740 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1741 [STAC_DELL_EQ] = dell_m6_pin_configs,
842ae638 1742 [STAC_ALIENWARE_M17X] = alienware_m17x_pin_configs,
52dc4386 1743 [STAC_92HD73XX_INTEL] = intel_dg45id_pin_configs,
e1f0d669
MR		 1744};
1745
ea734963 1746static const char * const stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1747 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1748 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1749 [STAC_92HD73XX_REF] = "ref",
ae709440 1750 [STAC_92HD73XX_INTEL] = "intel",
661cd8fb
TI		 1751 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1752 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1753 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1754 [STAC_DELL_EQ] = "dell-eq",
842ae638 1755 [STAC_ALIENWARE_M17X] = "alienware",
e1f0d669
MR		 1756};
1757
2b63536f 1758static const struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
e1f0d669
MR		 1759 /* SigmaTel reference board */
1760 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1761 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1762 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1763 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF		 1764 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1765 "Intel DG45ID", STAC_92HD73XX_INTEL),
1766 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1767 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1769 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1771 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1773 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1775 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1777 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1778 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1779 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1780 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1781 "unknown Dell", STAC_DELL_M6_DMIC),
1782 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1783 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1784 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1785 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1786 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1787 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1788 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1789 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB		 1790 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1791 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf 1792 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
ffe535ed 1793 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
5c1bccf6 1794 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
e033ebfb 1795 "Dell Studio 1558", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1796 {} /* terminator */
1797};
1798
2b63536f 1799static const struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
842ae638
TI		 1800 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1801 "Alienware M17x", STAC_ALIENWARE_M17X),
0defe09c
DC		 1802 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1803 "Alienware M17x", STAC_ALIENWARE_M17X),
dbd1b547 1804 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
b9ecc4ee 1805 "Alienware M17x R3", STAC_DELL_EQ),
842ae638
TI		 1806 {} /* terminator */
1807};
1808
2b63536f 1809static const unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR		 1810 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1811 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR		 1812 0x01451160, 0x98560170,
1813};
1814
2b63536f 1815static const unsigned int dell_s14_pin_configs[10] = {
69b5655a
TI		 1816 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110,
1817 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160,
8bb0ac55
MR		 1818 0x40f000f0, 0x40f000f0,
1819};
1820
f7f9bdfa
JW		 1821static const unsigned int dell_vostro_3500_pin_configs[10] = {
1822 0x02a11020, 0x0221101f, 0x400000f0, 0x90170110,
1823 0x400000f1, 0x400000f2, 0x400000f3, 0x90a60160,
1824 0x400000f4, 0x400000f5,
1825};
1826
2b63536f 1827static const unsigned int hp_dv7_4000_pin_configs[10] = {
48315590
SE		 1828 0x03a12050, 0x0321201f, 0x40f000f0, 0x90170110,
1829 0x40f000f0, 0x40f000f0, 0x90170110, 0xd5a30140,
1830 0x40f000f0, 0x40f000f0,
1831};
1832
5556e147
VK		 1833static const unsigned int hp_zephyr_pin_configs[10] = {
1834 0x01813050, 0x0421201f, 0x04a1205e, 0x96130310,
1835 0x96130310, 0x0101401f, 0x1111611f, 0xd5a30130,
1836 0, 0,
1837};
1838
0c27c180
VK		 1839static const unsigned int hp_cNB11_intquad_pin_configs[10] = {
1840 0x40f000f0, 0x0221101f, 0x02a11020, 0x92170110,
1841 0x40f000f0, 0x92170110, 0x40f000f0, 0xd5a30130,
1842 0x40f000f0, 0x40f000f0,
1843};
1844
2b63536f 1845static const unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
d0513fc6 1846 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1847 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1848 [STAC_DELL_S14] = dell_s14_pin_configs,
f7f9bdfa 1849 [STAC_DELL_VOSTRO_3500] = dell_vostro_3500_pin_configs,
0c27c180 1850 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = hp_cNB11_intquad_pin_configs,
48315590 1851 [STAC_HP_DV7_4000] = hp_dv7_4000_pin_configs,
5556e147 1852 [STAC_HP_ZEPHYR] = hp_zephyr_pin_configs,
d0513fc6
MR		 1853};
1854
ea734963 1855static const char * const stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1856 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1857 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1858 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1859 [STAC_DELL_S14] = "dell-s14",
f7f9bdfa 1860 [STAC_DELL_VOSTRO_3500] = "dell-vostro-3500",
0c27c180 1861 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = "hp_cNB11_intquad",
48315590 1862 [STAC_HP_DV7_4000] = "hp-dv7-4000",
5556e147 1863 [STAC_HP_ZEPHYR] = "hp-zephyr",
a3e19973 1864 [STAC_92HD83XXX_HP_LED] = "hp-led",
ff8a1e27 1865 [STAC_92HD83XXX_HP_INV_LED] = "hp-inv-led",
62cbde18 1866 [STAC_92HD83XXX_HP_MIC_LED] = "hp-mic-led",
8d032a8f 1867 [STAC_92HD83XXX_HEADSET_JACK] = "headset-jack",
d0513fc6
MR		 1868};
1869
2b63536f 1870static const struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
d0513fc6
MR		 1871 /* SigmaTel reference board */
1872 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1873 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 1874 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1875 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 1876 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1877 "unknown Dell", STAC_DELL_S14),
8d032a8f
DH		 1878 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
1879 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
1880 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
1881 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
1882 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
1883 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
1884 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
1885 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
1886 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
1887 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
1888 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
1889 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
1890 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
1891 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
1892 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
1893 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
1894 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
1895 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
f7f9bdfa
JW		 1896 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
1897 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
0c27c180
VK		 1898 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
1899 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1900 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
1901 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1902 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
1903 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1904 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
8ae5865e 1905 "HP Pavilion dv7", STAC_HP_DV7_4000),
0c27c180
VK		 1906 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
1907 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1908 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
1909 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
62cbde18
TI		 1910 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
1911 "HP Folio", STAC_92HD83XXX_HP_MIC_LED),
0c27c180
VK		 1912 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
1913 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1914 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
1915 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1916 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
1917 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1918 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
1919 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1920 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
1921 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1922 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
1923 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1924 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
1925 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1926 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
1927 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1928 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
1929 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1930 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
1931 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1932 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
1933 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1934 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
1935 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1936 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
1937 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1938 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
1939 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
5556e147
VK		 1940 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
1941 "HP", STAC_HP_ZEPHYR),
a3e19973
TI		 1942 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
1943 "HP Mini", STAC_92HD83XXX_HP_LED),
5afc13af
GMDV		 1944 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
1945 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
5556e147
VK		 1946 {} /* terminator */
1947};
1948
1949static const struct snd_pci_quirk stac92hd83xxx_codec_id_cfg_tbl[] = {
1950 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
1951 "HP", STAC_HP_ZEPHYR),
574f3c4f 1952 {} /* terminator */
d0513fc6
MR		 1953};
1954
2b63536f 1955static const unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1956 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1957 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK		 1958 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1959 0x00000000
e035b841
MR		 1960};
1961
2b63536f 1962static const unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1963 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1964 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1965 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1966 0x00000000
a7662640
MR		 1967};
1968
2b63536f 1969static const unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR		 1970 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1971 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK		 1972 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1973 0x00000000
a7662640
MR		 1974};
1975
2b63536f 1976static const unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR		 1977 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1978 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1979 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1980 0x00000000
3a7abfd2
MR		 1981};
1982
2b63536f 1983static const unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
e035b841 1984 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1985 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1986 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1987 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1988 [STAC_HP_M4] = NULL,
2a6ce6e5 1989 [STAC_HP_DV4] = NULL,
1b0652eb 1990 [STAC_HP_DV5] = NULL,
ae6241fb 1991 [STAC_HP_HDX] = NULL,
514bf54c 1992 [STAC_HP_DV4_1222NR] = NULL,
e035b841
MR		 1993};
1994
ea734963 1995static const char * const stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1996 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1997 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1998 [STAC_DELL_M4_1] = "dell-m4-1",
1999 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 2000 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 2001 [STAC_HP_M4] = "hp-m4",
2a6ce6e5 2002 [STAC_HP_DV4] = "hp-dv4",
1b0652eb 2003 [STAC_HP_DV5] = "hp-dv5",
ae6241fb 2004 [STAC_HP_HDX] = "hp-hdx",
514bf54c 2005 [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
e035b841
MR		 2006};
2007
2b63536f 2008static const struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
e035b841
MR		 2009 /* SigmaTel reference board */
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2011 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 2012 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2013 "DFI LanParty", STAC_92HD71BXX_REF),
514bf54c
JG		 2014 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
2015 "HP dv4-1222nr", STAC_HP_DV4_1222NR),
5bdaaada
VK		 2016 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
2017 "HP", STAC_HP_DV5),
58d8395b
TI		 2018 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
2019 "HP", STAC_HP_DV5),
2ae466f8 2020 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 2021 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI		 2022 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
2023 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 2024 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
2025 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 2026 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 2027 "HP mini 1000", STAC_HP_M4),
ae6241fb 2028 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 2029 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 2030 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
2031 "HP dv6", STAC_HP_DV5),
e3d2530a
KG		 2032 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
2033 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY		 2034 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
2035 "HP DV6", STAC_HP_DV5),
1972d025
TI		 2036 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
2037 "HP", STAC_HP_DV5),
a7662640
MR		 2038 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
2039 "unknown Dell", STAC_DELL_M4_1),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
2041 "unknown Dell", STAC_DELL_M4_1),
2042 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
2043 "unknown Dell", STAC_DELL_M4_1),
2044 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
2045 "unknown Dell", STAC_DELL_M4_1),
2046 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
2047 "unknown Dell", STAC_DELL_M4_1),
2048 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
2049 "unknown Dell", STAC_DELL_M4_1),
2050 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
2051 "unknown Dell", STAC_DELL_M4_1),
2052 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
2053 "unknown Dell", STAC_DELL_M4_2),
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
2055 "unknown Dell", STAC_DELL_M4_2),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
2057 "unknown Dell", STAC_DELL_M4_2),
2058 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
2059 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 2060 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
2061 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 2062 {} /* terminator */
2063};
2064
2b63536f 2065static const unsigned int ref922x_pin_configs[10] = {
403d1944
MP		 2066 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
2067 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 2068 0x40000100, 0x40000100,
2069};
2070
dfe495d0
TI		 2071/*
2072 STAC 922X pin configs for
2073 102801A7
2074 102801AB
2075 102801A9
2076 102801D1
2077 102801D2
2078*/
2b63536f 2079static const unsigned int dell_922x_d81_pin_configs[10] = {
dfe495d0
TI		 2080 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
2081 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
2082 0x01813122, 0x400001f2,
2083};
2084
2085/*
2086 STAC 922X pin configs for
2087 102801AC
2088 102801D0
2089*/
2b63536f 2090static const unsigned int dell_922x_d82_pin_configs[10] = {
dfe495d0
TI		 2091 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
2092 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
2093 0x01813122, 0x400001f1,
2094};
2095
2096/*
2097 STAC 922X pin configs for
2098 102801BF
2099*/
2b63536f 2100static const unsigned int dell_922x_m81_pin_configs[10] = {
dfe495d0
TI		 2101 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
2102 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
2103 0x40C003f1, 0x405003f0,
2104};
2105
2106/*
2107 STAC 9221 A1 pin configs for
2108 102801D7 (Dell XPS M1210)
2109*/
2b63536f 2110static const unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 2111 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
2112 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 2113 0x508003f3, 0x405003f4,
2114};
2115
2b63536f 2116static const unsigned int d945gtp3_pin_configs[10] = {
869264c4 2117 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 2118 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2119 0x02a19120, 0x40000100,
2120};
2121
2b63536f 2122static const unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 2123 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
2124 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 2125 0x02a19320, 0x40000100,
2126};
2127
2b63536f 2128static const unsigned int intel_mac_v1_pin_configs[10] = {
5d5d3bc3
IZ		 2129 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
2130 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
2131 0x400000fc, 0x400000fb,
2132};
2133
2b63536f 2134static const unsigned int intel_mac_v2_pin_configs[10] = {
5d5d3bc3
IZ		 2135 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
2136 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
2137 0x400000fc, 0x400000fb,
6f0778d8
NB		 2138};
2139
2b63536f 2140static const unsigned int intel_mac_v3_pin_configs[10] = {
5d5d3bc3
IZ		 2141 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
2142 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 2143 0x400000fc, 0x400000fb,
2144};
2145
2b63536f 2146static const unsigned int intel_mac_v4_pin_configs[10] = {
5d5d3bc3
IZ		 2147 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
2148 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 2149 0x400000fc, 0x400000fb,
2150};
2151
2b63536f 2152static const unsigned int intel_mac_v5_pin_configs[10] = {
5d5d3bc3
IZ		 2153 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
2154 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
2155 0x400000fc, 0x400000fb,
0dae0f83
TI		 2156};
2157
2b63536f 2158static const unsigned int ecs202_pin_configs[10] = {
8c650087
MCC		 2159 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
2160 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
2161 0x9037012e, 0x40e000f2,
2162};
76c08828 2163
2b63536f 2164static const unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 2165 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 2166 [STAC_D945GTP3] = d945gtp3_pin_configs,
2167 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 2168 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
2169 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
2170 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
2171 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
2172 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 2173 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 2174 /* for backward compatibility */
5d5d3bc3
IZ		 2175 [STAC_MACMINI] = intel_mac_v3_pin_configs,
2176 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
2177 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
2178 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
2179 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
2180 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 2181 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 2182 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
2183 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
2184 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
2185 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 2186};
2187
ea734963 2188static const char * const stac922x_models[STAC_922X_MODELS] = {
1607b8ea 2189 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI		 2190 [STAC_D945_REF] = "ref",
2191 [STAC_D945GTP5] = "5stack",
2192 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 2193 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
2194 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
2195 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
2196 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
2197 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 2198 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 2199 /* for backward compatibility */
f5fcc13c 2200 [STAC_MACMINI] = "macmini",
3fc24d85 2201 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 2202 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
2203 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 2204 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 2205 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 2206 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 2207 [STAC_922X_DELL_D81] = "dell-d81",
2208 [STAC_922X_DELL_D82] = "dell-d82",
2209 [STAC_922X_DELL_M81] = "dell-m81",
2210 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 2211};
2212
2b63536f 2213static const struct snd_pci_quirk stac922x_cfg_tbl[] = {
f5fcc13c
TI		 2214 /* SigmaTel reference board */
2215 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2216 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 2217 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2218 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 2219 /* Intel 945G based systems */
2220 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
2221 "Intel D945G", STAC_D945GTP3),
2222 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
2223 "Intel D945G", STAC_D945GTP3),
2224 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2225 "Intel D945G", STAC_D945GTP3),
2226 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2227 "Intel D945G", STAC_D945GTP3),
2228 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2229 "Intel D945G", STAC_D945GTP3),
2230 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2231 "Intel D945G", STAC_D945GTP3),
2232 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2233 "Intel D945G", STAC_D945GTP3),
2234 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2235 "Intel D945G", STAC_D945GTP3),
2236 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2237 "Intel D945G", STAC_D945GTP3),
2238 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2239 "Intel D945G", STAC_D945GTP3),
2240 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2241 "Intel D945G", STAC_D945GTP3),
2242 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2243 "Intel D945G", STAC_D945GTP3),
2244 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2245 "Intel D945G", STAC_D945GTP3),
2246 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2247 "Intel D945G", STAC_D945GTP3),
2248 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2249 "Intel D945G", STAC_D945GTP3),
2250 /* Intel D945G 5-stack systems */
2251 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2252 "Intel D945G", STAC_D945GTP5),
2253 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2254 "Intel D945G", STAC_D945GTP5),
2255 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2256 "Intel D945G", STAC_D945GTP5),
2257 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2258 "Intel D945G", STAC_D945GTP5),
2259 /* Intel 945P based systems */
2260 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2261 "Intel D945P", STAC_D945GTP3),
2262 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2263 "Intel D945P", STAC_D945GTP3),
2264 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2265 "Intel D945P", STAC_D945GTP3),
2266 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2267 "Intel D945P", STAC_D945GTP3),
2268 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2269 "Intel D945P", STAC_D945GTP3),
2270 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2271 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 2272 /* other intel */
2273 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2274 "Intel D945", STAC_D945_REF),
f5fcc13c 2275 /* other systems */
536319af 2276 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2277 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2278 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2279 /* Dell systems */
2280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2281 "unknown Dell", STAC_922X_DELL_D81),
2282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2283 "unknown Dell", STAC_922X_DELL_D81),
2284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2285 "unknown Dell", STAC_922X_DELL_D81),
2286 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2287 "unknown Dell", STAC_922X_DELL_D82),
2288 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2289 "unknown Dell", STAC_922X_DELL_M81),
2290 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2291 "unknown Dell", STAC_922X_DELL_D82),
2292 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2293 "unknown Dell", STAC_922X_DELL_D81),
2294 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2295 "unknown Dell", STAC_922X_DELL_D81),
2296 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2297 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 2298 /* ECS/PC Chips boards */
dea0a509 2299 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 2300 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2301 {} /* terminator */
2302};
2303
2b63536f 2304static const unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2305 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2306 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2307 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2308 0x01c42190, 0x40000100,
3cc08dc6
MP		 2309};
2310
2b63536f 2311static const unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2312 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2313 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2314 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2315 0x40000100, 0x40000100
2316};
2317
2b63536f 2318static const unsigned int d965_5st_pin_configs[14] = {
93ed1503
TD		 2319 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2320 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2321 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2322 0x40000100, 0x40000100
2323};
2324
2b63536f 2325static const unsigned int d965_5st_no_fp_pin_configs[14] = {
679d92ed
TI		 2326 0x40000100, 0x40000100, 0x0181304e, 0x01014010,
2327 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2328 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2329 0x40000100, 0x40000100
2330};
2331
2b63536f 2332static const unsigned int dell_3st_pin_configs[14] = {
4ff076e5
TD		 2333 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2334 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2335 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2336 0x40c003fc, 0x40000100
2337};
2338
2b63536f 2339static const unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2340 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2341 [STAC_D965_REF] = ref927x_pin_configs,
2342 [STAC_D965_3ST] = d965_3st_pin_configs,
2343 [STAC_D965_5ST] = d965_5st_pin_configs,
679d92ed 2344 [STAC_D965_5ST_NO_FP] = d965_5st_no_fp_pin_configs,
8e9068b1
MR		 2345 [STAC_DELL_3ST] = dell_3st_pin_configs,
2346 [STAC_DELL_BIOS] = NULL,
54930531 2347 [STAC_927X_VOLKNOB] = NULL,
3cc08dc6
MP		 2348};
2349
ea734963 2350static const char * const stac927x_models[STAC_927X_MODELS] = {
1607b8ea 2351 [STAC_927X_AUTO] = "auto",
e28d8322 2352 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2353 [STAC_D965_REF] = "ref",
2354 [STAC_D965_3ST] = "3stack",
2355 [STAC_D965_5ST] = "5stack",
679d92ed 2356 [STAC_D965_5ST_NO_FP] = "5stack-no-fp",
8e9068b1
MR		 2357 [STAC_DELL_3ST] = "dell-3stack",
2358 [STAC_DELL_BIOS] = "dell-bios",
54930531 2359 [STAC_927X_VOLKNOB] = "volknob",
f5fcc13c
TI		 2360};
2361
2b63536f 2362static const struct snd_pci_quirk stac927x_cfg_tbl[] = {
f5fcc13c
TI		 2363 /* SigmaTel reference board */
2364 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2365 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 2366 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2367 "DFI LanParty", STAC_D965_REF),
81d3dbde 2368 /* Intel 946 based systems */
f5fcc13c
TI		 2369 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2370 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2371 /* 965 based 3 stack systems */
dea0a509
TI		 2372 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2373 "Intel D965", STAC_D965_3ST),
2374 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2375 "Intel D965", STAC_D965_3ST),
4ff076e5 2376 /* Dell 3 stack systems */
dfe495d0 2377 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2378 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2379 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2380 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 2381 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 2382 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 2383 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2384 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
84d3dc20 2385 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 2386 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2387 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2388 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2389 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2390 /* 965 based 5 stack systems */
dea0a509
TI		 2391 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2392 "Intel D965", STAC_D965_5ST),
2393 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2394 "Intel D965", STAC_D965_5ST),
54930531
TI		 2395 /* volume-knob fixes */
2396 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP		 2397 {} /* terminator */
2398};
2399
2b63536f 2400static const unsigned int ref9205_pin_configs[12] = {
f3302a59 2401 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2402 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2403 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2404};
2405
dfe495d0
TI		 2406/*
2407 STAC 9205 pin configs for
2408 102801F1
2409 102801F2
2410 102801FC
2411 102801FD
2412 10280204
2413 1028021F
3fa2ef74 2414 10280228 (Dell Vostro 1500)
95e70e87 2415 10280229 (Dell Vostro 1700)
dfe495d0 2416*/
2b63536f 2417static const unsigned int dell_9205_m42_pin_configs[12] = {
dfe495d0
TI		 2418 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2419 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2420 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2421};
2422
2423/*
2424 STAC 9205 pin configs for
2425 102801F9
2426 102801FA
2427 102801FE
2428 102801FF (Dell Precision M4300)
2429 10280206
2430 10280200
2431 10280201
2432*/
2b63536f 2433static const unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2434 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2435 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2436 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2437};
2438
2b63536f 2439static const unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2440 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2441 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2442 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2443};
2444
2b63536f 2445static const unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2446 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2447 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2448 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2449 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2450 [STAC_9205_EAPD] = NULL,
f3302a59
MP		 2451};
2452
ea734963 2453static const char * const stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2454 [STAC_9205_AUTO] = "auto",
f5fcc13c 2455 [STAC_9205_REF] = "ref",
dfe495d0 2456 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2457 [STAC_9205_DELL_M43] = "dell-m43",
2458 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2459 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI		 2460};
2461
2b63536f 2462static const struct snd_pci_quirk stac9205_cfg_tbl[] = {
f5fcc13c
TI		 2463 /* SigmaTel reference board */
2464 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2465 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 2466 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
2467 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 2468 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2469 "DFI LanParty", STAC_9205_REF),
d9a4268e 2470 /* Dell */
dfe495d0
TI		 2471 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2472 "unknown Dell", STAC_9205_DELL_M42),
2473 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2474 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2475 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2476 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2477 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2478 "Dell Precision", STAC_9205_DELL_M43),
2479 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2480 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2481 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2482 "unknown Dell", STAC_9205_DELL_M42),
2483 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2484 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2485 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2486 "Dell Precision", STAC_9205_DELL_M43),
2487 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2488 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2489 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2490 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2491 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2492 "Dell Precision", STAC_9205_DELL_M43),
2493 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2494 "Dell Precision", STAC_9205_DELL_M43),
2495 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2496 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2497 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2498 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2499 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2500 "Dell Vostro 1500", STAC_9205_DELL_M42),
95e70e87
AA		 2501 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
2502 "Dell Vostro 1700", STAC_9205_DELL_M42),
d9a4268e 2503 /* Gateway */
42b95f0c 2504 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
d9a4268e 2505 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP		 2506 {} /* terminator */
2507};
2508
330ee995 2509static void stac92xx_set_config_regs(struct hda_codec *codec,
2b63536f 2510 const unsigned int *pincfgs)
11b44bbd
RF		 2511{
2512 int i;
2513 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2514
330ee995
TI		 2515 if (!pincfgs)
2516 return;
11b44bbd 2517
87d48363 2518 for (i = 0; i < spec->num_pins; i++)
330ee995
TI		 2519 if (spec->pin_nids[i] && pincfgs[i])
2520 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2521 pincfgs[i]);
af9f341a
TI		 2522}
2523
dabbed6f 2524/*
c7d4b2fa 2525 * Analog playback callbacks
dabbed6f 2526 */
c7d4b2fa
M		 2527static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2528 struct hda_codec *codec,
c8b6bf9b 2529 struct snd_pcm_substream *substream)
2f2f4251 2530{
dabbed6f 2531 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2532 if (spec->stream_delay)
2533 msleep(spec->stream_delay);
9a08160b
TI		 2534 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2535 hinfo);
2f2f4251
M		 2536}
2537
2f2f4251
M		 2538static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2539 struct hda_codec *codec,
2540 unsigned int stream_tag,
2541 unsigned int format,
c8b6bf9b 2542 struct snd_pcm_substream *substream)
2f2f4251
M		 2543{
2544 struct sigmatel_spec *spec = codec->spec;
403d1944 2545 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2546}
2547
2548static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2549 struct hda_codec *codec,
c8b6bf9b 2550 struct snd_pcm_substream *substream)
2f2f4251
M		 2551{
2552 struct sigmatel_spec *spec = codec->spec;
2553 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2554}
2555
dabbed6f
M		 2556/*
2557 * Digital playback callbacks
2558 */
2559static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2560 struct hda_codec *codec,
c8b6bf9b 2561 struct snd_pcm_substream *substream)
dabbed6f
M		 2562{
2563 struct sigmatel_spec *spec = codec->spec;
2564 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2565}
2566
2567static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2568 struct hda_codec *codec,
c8b6bf9b 2569 struct snd_pcm_substream *substream)
dabbed6f
M		 2570{
2571 struct sigmatel_spec *spec = codec->spec;
2572 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2573}
2574
6b97eb45
TI		 2575static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2576 struct hda_codec *codec,
2577 unsigned int stream_tag,
2578 unsigned int format,
2579 struct snd_pcm_substream *substream)
2580{
2581 struct sigmatel_spec *spec = codec->spec;
2582 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2583 stream_tag, format, substream);
2584}
2585
9411e21c
TI		 2586static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2587 struct hda_codec *codec,
2588 struct snd_pcm_substream *substream)
2589{
2590 struct sigmatel_spec *spec = codec->spec;
2591 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2592}
2593
dabbed6f 2594
2f2f4251
M		 2595/*
2596 * Analog capture callbacks
2597 */
2598static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2599 struct hda_codec *codec,
2600 unsigned int stream_tag,
2601 unsigned int format,
c8b6bf9b 2602 struct snd_pcm_substream *substream)
2f2f4251
M		 2603{
2604 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2605 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2606
8daaaa97
MR		 2607 if (spec->powerdown_adcs) {
2608 msleep(40);
8c2f767b 2609 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2610 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2611 }
2612 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2613 return 0;
2614}
2615
2616static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2617 struct hda_codec *codec,
c8b6bf9b 2618 struct snd_pcm_substream *substream)
2f2f4251
M		 2619{
2620 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2621 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2622
8daaaa97
MR		 2623 snd_hda_codec_cleanup_stream(codec, nid);
2624 if (spec->powerdown_adcs)
8c2f767b 2625 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2626 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2627 return 0;
2628}
2629
2b63536f 2630static const struct hda_pcm_stream stac92xx_pcm_digital_playback = {
dabbed6f
M		 2631 .substreams = 1,
2632 .channels_min = 2,
2633 .channels_max = 2,
2634 /* NID is set in stac92xx_build_pcms */
2635 .ops = {
2636 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2637 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI		 2638 .prepare = stac92xx_dig_playback_pcm_prepare,
2639 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M		 2640 },
2641};
2642
2b63536f 2643static const struct hda_pcm_stream stac92xx_pcm_digital_capture = {
dabbed6f
M		 2644 .substreams = 1,
2645 .channels_min = 2,
2646 .channels_max = 2,
2647 /* NID is set in stac92xx_build_pcms */
2648};
2649
2b63536f 2650static const struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2f2f4251
M		 2651 .substreams = 1,
2652 .channels_min = 2,
c7d4b2fa 2653 .channels_max = 8,
2f2f4251
M		 2654 .nid = 0x02, /* NID to query formats and rates */
2655 .ops = {
2656 .open = stac92xx_playback_pcm_open,
2657 .prepare = stac92xx_playback_pcm_prepare,
2658 .cleanup = stac92xx_playback_pcm_cleanup
2659 },
2660};
2661
2b63536f 2662static const struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
3cc08dc6
MP		 2663 .substreams = 1,
2664 .channels_min = 2,
2665 .channels_max = 2,
2666 .nid = 0x06, /* NID to query formats and rates */
2667 .ops = {
2668 .open = stac92xx_playback_pcm_open,
2669 .prepare = stac92xx_playback_pcm_prepare,
2670 .cleanup = stac92xx_playback_pcm_cleanup
2671 },
2672};
2673
2b63536f 2674static const struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2675 .channels_min = 2,
2676 .channels_max = 2,
9e05b7a3 2677 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2678 .ops = {
2679 .prepare = stac92xx_capture_pcm_prepare,
2680 .cleanup = stac92xx_capture_pcm_cleanup
2681 },
2682};
2683
2684static int stac92xx_build_pcms(struct hda_codec *codec)
2685{
2686 struct sigmatel_spec *spec = codec->spec;
2687 struct hda_pcm *info = spec->pcm_rec;
2688
2689 codec->num_pcms = 1;
2690 codec->pcm_info = info;
2691
c7d4b2fa 2692 info->name = "STAC92xx Analog";
2f2f4251 2693 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI		 2694 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2695 spec->multiout.dac_nids[0];
ee81abb6
TI		 2696 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2697 spec->autocfg.line_outs == 2)
2698 info->stream[SNDRV_PCM_STREAM_PLAYBACK].chmap =
2699 snd_pcm_2_1_chmaps;
2700
2f2f4251 2701 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2702 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2703 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2704
2705 if (spec->alt_switch) {
2706 codec->num_pcms++;
2707 info++;
2708 info->name = "STAC92xx Analog Alt";
2709 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2710 }
2f2f4251 2711
dabbed6f
M		 2712 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2713 codec->num_pcms++;
2714 info++;
2715 info->name = "STAC92xx Digital";
0852d7a6 2716 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M		 2717 if (spec->multiout.dig_out_nid) {
2718 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2719 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2720 }
2721 if (spec->dig_in_nid) {
2722 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2723 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2724 }
2725 }
2726
2f2f4251
M		 2727 return 0;
2728}
2729
403d1944
MP		 2730static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2731
2732{
cdd03ced 2733 snd_hda_set_pin_ctl_cache(codec, nid, pin_type);
403d1944
MP		 2734}
2735
7c2ba97b
MR		 2736#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2737
2738static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2739 struct snd_ctl_elem_value *ucontrol)
2740{
2741 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2742 struct sigmatel_spec *spec = codec->spec;
2743
d7a89436 2744 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2745 return 0;
2746}
2747
62558ce1 2748static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid);
c6e4c666 2749
7c2ba97b
MR		 2750static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2751 struct snd_ctl_elem_value *ucontrol)
2752{
2753 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2754 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2755 int nid = kcontrol->private_value;
2756
2757 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b 2758
25985edc 2759 /* check to be sure that the ports are up to date with
7c2ba97b
MR		 2760 * switch changes
2761 */
62558ce1 2762 stac_issue_unsol_event(codec, nid);
7c2ba97b
MR		 2763
2764 return 1;
2765}
2766
7c922de7
NL		 2767static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol,
2768 struct snd_ctl_elem_info *uinfo)
2769{
2770 int i;
2b63536f 2771 static const char * const texts[] = {
7c922de7
NL		 2772 "Mic In", "Line In", "Line Out"
2773 };
2774
2775 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2776 struct sigmatel_spec *spec = codec->spec;
2777 hda_nid_t nid = kcontrol->private_value;
2778
2779 if (nid == spec->mic_switch || nid == spec->line_switch)
2780 i = 3;
2781 else
2782 i = 2;
2783
2784 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2785 uinfo->value.enumerated.items = i;
2786 uinfo->count = 1;
2787 if (uinfo->value.enumerated.item >= i)
2788 uinfo->value.enumerated.item = i-1;
2789 strcpy(uinfo->value.enumerated.name,
2790 texts[uinfo->value.enumerated.item]);
2791
2792 return 0;
2793}
2794
2795static int stac92xx_dc_bias_get(struct snd_kcontrol *kcontrol,
2796 struct snd_ctl_elem_value *ucontrol)
2797{
2798 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2799 hda_nid_t nid = kcontrol->private_value;
2800 unsigned int vref = stac92xx_vref_get(codec, nid);
2801
4740860b 2802 if (vref == snd_hda_get_default_vref(codec, nid))
7c922de7
NL		 2803 ucontrol->value.enumerated.item[0] = 0;
2804 else if (vref == AC_PINCTL_VREF_GRD)
2805 ucontrol->value.enumerated.item[0] = 1;
2806 else if (vref == AC_PINCTL_VREF_HIZ)
2807 ucontrol->value.enumerated.item[0] = 2;
2808
2809 return 0;
2810}
2811
2812static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol,
2813 struct snd_ctl_elem_value *ucontrol)
2814{
2815 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2816 unsigned int new_vref = 0;
b8621516 2817 int error;
7c922de7
NL		 2818 hda_nid_t nid = kcontrol->private_value;
2819
2820 if (ucontrol->value.enumerated.item[0] == 0)
4740860b 2821 new_vref = snd_hda_get_default_vref(codec, nid);
7c922de7
NL		 2822 else if (ucontrol->value.enumerated.item[0] == 1)
2823 new_vref = AC_PINCTL_VREF_GRD;
2824 else if (ucontrol->value.enumerated.item[0] == 2)
2825 new_vref = AC_PINCTL_VREF_HIZ;
2826 else
2827 return 0;
2828
2829 if (new_vref != stac92xx_vref_get(codec, nid)) {
2830 error = stac92xx_vref_set(codec, nid, new_vref);
2831 return error;
2832 }
2833
2834 return 0;
2835}
2836
2837static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol,
2838 struct snd_ctl_elem_info *uinfo)
2839{
2b63536f 2840 char *texts[2];
7c922de7
NL		 2841 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2842 struct sigmatel_spec *spec = codec->spec;
2843
2844 if (kcontrol->private_value == spec->line_switch)
2845 texts[0] = "Line In";
2846 else
2847 texts[0] = "Mic In";
2848 texts[1] = "Line Out";
2849 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2850 uinfo->value.enumerated.items = 2;
2851 uinfo->count = 1;
2852
2853 if (uinfo->value.enumerated.item >= 2)
2854 uinfo->value.enumerated.item = 1;
2855 strcpy(uinfo->value.enumerated.name,
2856 texts[uinfo->value.enumerated.item]);
2857
2858 return 0;
2859}
403d1944
MP		 2860
2861static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2862{
2863 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2864 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2865 hda_nid_t nid = kcontrol->private_value;
2866 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
403d1944 2867
7c922de7 2868 ucontrol->value.enumerated.item[0] = spec->io_switch[io_idx];
403d1944
MP		 2869 return 0;
2870}
2871
2872static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2873{
2874 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2875 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2876 hda_nid_t nid = kcontrol->private_value;
2877 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
2878 unsigned short val = !!ucontrol->value.enumerated.item[0];
403d1944
MP		 2879
2880 spec->io_switch[io_idx] = val;
2881
2882 if (val)
2883 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2884 else {
2885 unsigned int pinctl = AC_PINCTL_IN_EN;
2886 if (io_idx) /* set VREF for mic */
4740860b 2887 pinctl |= snd_hda_get_default_vref(codec, nid);
c960a03b
TI		 2888 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2889 }
40c1d308
JZ		 2890
2891 /* check the auto-mute again: we need to mute/unmute the speaker
2892 * appropriately according to the pin direction
2893 */
2894 if (spec->hp_detect)
62558ce1 2895 stac_issue_unsol_event(codec, nid);
40c1d308 2896
403d1944
MP		 2897 return 1;
2898}
2899
0fb87bb4
ML		 2900#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2901
2902static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2903 struct snd_ctl_elem_value *ucontrol)
2904{
2905 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2906 struct sigmatel_spec *spec = codec->spec;
2907
2908 ucontrol->value.integer.value[0] = spec->clfe_swap;
2909 return 0;
2910}
2911
2912static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2913 struct snd_ctl_elem_value *ucontrol)
2914{
2915 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2916 struct sigmatel_spec *spec = codec->spec;
2917 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2918 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2919
68ea7b2f 2920 if (spec->clfe_swap == val)
0fb87bb4
ML		 2921 return 0;
2922
68ea7b2f 2923 spec->clfe_swap = val;
0fb87bb4
ML		 2924
2925 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2926 spec->clfe_swap ? 0x4 : 0x0);
2927
2928 return 1;
2929}
2930
7c2ba97b
MR		 2931#define STAC_CODEC_HP_SWITCH(xname) \
2932 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2933 .name = xname, \
2934 .index = 0, \
2935 .info = stac92xx_hp_switch_info, \
2936 .get = stac92xx_hp_switch_get, \
2937 .put = stac92xx_hp_switch_put, \
2938 }
2939
403d1944
MP		 2940#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2941 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2942 .name = xname, \
2943 .index = 0, \
2944 .info = stac92xx_io_switch_info, \
2945 .get = stac92xx_io_switch_get, \
2946 .put = stac92xx_io_switch_put, \
2947 .private_value = xpval, \
2948 }
2949
0fb87bb4
ML		 2950#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2951 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2952 .name = xname, \
2953 .index = 0, \
2954 .info = stac92xx_clfe_switch_info, \
2955 .get = stac92xx_clfe_switch_get, \
2956 .put = stac92xx_clfe_switch_put, \
2957 .private_value = xpval, \
2958 }
403d1944 2959
c7d4b2fa
M		 2960enum {
2961 STAC_CTL_WIDGET_VOL,
2962 STAC_CTL_WIDGET_MUTE,
123c07ae 2963 STAC_CTL_WIDGET_MUTE_BEEP,
09a99959 2964 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2965 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2966 STAC_CTL_WIDGET_IO_SWITCH,
2fc99890
NL		 2967 STAC_CTL_WIDGET_CLFE_SWITCH,
2968 STAC_CTL_WIDGET_DC_BIAS
c7d4b2fa
M		 2969};
2970
2b63536f 2971static const struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2972 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2973 HDA_CODEC_MUTE(NULL, 0, 0, 0),
123c07ae 2974 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0),
09a99959 2975 STAC_MONO_MUX,
7c2ba97b 2976 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2977 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2978 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2fc99890 2979 DC_BIAS(NULL, 0, 0),
c7d4b2fa
M		 2980};
2981
2982/* add dynamic controls */
e3c75964
TI		 2983static struct snd_kcontrol_new *
2984stac_control_new(struct sigmatel_spec *spec,
2b63536f 2985 const struct snd_kcontrol_new *ktemp,
4d02d1b6 2986 const char *name,
5e26dfd0 2987 unsigned int subdev)
c7d4b2fa 2988{
c8b6bf9b 2989 struct snd_kcontrol_new *knew;
c7d4b2fa 2990
603c4019
TI		 2991 knew = snd_array_new(&spec->kctls);
2992 if (!knew)
e3c75964 2993 return NULL;
4d4e9bb3 2994 *knew = *ktemp;
82fe0c58 2995 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI		 2996 if (!knew->name) {
2997 /* roolback */
2998 memset(knew, 0, sizeof(*knew));
2999 spec->kctls.alloced--;
3000 return NULL;
3001 }
5e26dfd0 3002 knew->subdevice = subdev;
e3c75964
TI		 3003 return knew;
3004}
3005
62cbde18
TI		 3006static struct snd_kcontrol_new *
3007add_control_temp(struct sigmatel_spec *spec,
3008 const struct snd_kcontrol_new *ktemp,
3009 int idx, const char *name,
3010 unsigned long val)
e3c75964 3011{
4d02d1b6 3012 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name,
5e26dfd0 3013 HDA_SUBDEV_AMP_FLAG);
e3c75964 3014 if (!knew)
62cbde18 3015 return NULL;
e3c75964 3016 knew->index = idx;
c7d4b2fa 3017 knew->private_value = val;
62cbde18
TI		 3018 return knew;
3019}
3020
3021static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
3022 const struct snd_kcontrol_new *ktemp,
3023 int idx, const char *name,
3024 unsigned long val)
3025{
3026 return add_control_temp(spec, ktemp, idx, name, val) ? 0 : -ENOMEM;
c7d4b2fa
M		 3027}
3028
4d4e9bb3
TI		 3029static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
3030 int type, int idx, const char *name,
3031 unsigned long val)
3032{
3033 return stac92xx_add_control_temp(spec,
3034 &stac92xx_control_templates[type],
3035 idx, name, val);
3036}
3037
4682eee0
MR		 3038
3039/* add dynamic controls */
4d4e9bb3
TI		 3040static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
3041 const char *name, unsigned long val)
4682eee0
MR		 3042{
3043 return stac92xx_add_control_idx(spec, type, 0, name, val);
3044}
3045
2b63536f 3046static const struct snd_kcontrol_new stac_input_src_temp = {
e3c75964
TI		 3047 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3048 .name = "Input Source",
3049 .info = stac92xx_mux_enum_info,
3050 .get = stac92xx_mux_enum_get,
3051 .put = stac92xx_mux_enum_put,
3052};
3053
7c922de7
NL		 3054static inline int stac92xx_add_jack_mode_control(struct hda_codec *codec,
3055 hda_nid_t nid, int idx)
3056{
3057 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
3058 int control = 0;
3059 struct sigmatel_spec *spec = codec->spec;
3060 char name[22];
3061
99ae28be 3062 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
8d032a8f
DH		 3063 if (spec->headset_jack && snd_hda_get_input_pin_attr(def_conf)
3064 != INPUT_PIN_ATTR_DOCK)
3065 return 0;
4740860b 3066 if (snd_hda_get_default_vref(codec, nid) == AC_PINCTL_VREF_GRD
7c922de7
NL		 3067 && nid == spec->line_switch)
3068 control = STAC_CTL_WIDGET_IO_SWITCH;
3069 else if (snd_hda_query_pin_caps(codec, nid)
3070 & (AC_PINCAP_VREF_GRD << AC_PINCAP_VREF_SHIFT))
3071 control = STAC_CTL_WIDGET_DC_BIAS;
3072 else if (nid == spec->mic_switch)
3073 control = STAC_CTL_WIDGET_IO_SWITCH;
3074 }
3075
3076 if (control) {
201e06ff
TI		 3077 snd_hda_get_pin_label(codec, nid, &spec->autocfg,
3078 name, sizeof(name), NULL);
7c922de7
NL		 3079 return stac92xx_add_control(codec->spec, control,
3080 strcat(name, " Jack Mode"), nid);
3081 }
3082
3083 return 0;
3084}
3085
e3c75964
TI		 3086static int stac92xx_add_input_source(struct sigmatel_spec *spec)
3087{
3088 struct snd_kcontrol_new *knew;
3089 struct hda_input_mux *imux = &spec->private_imux;
3090
3d21d3f7
TI		 3091 if (spec->auto_mic)
3092 return 0; /* no need for input source */
e3c75964
TI		 3093 if (!spec->num_adcs || imux->num_items <= 1)
3094 return 0; /* no need for input source control */
3095 knew = stac_control_new(spec, &stac_input_src_temp,
4d02d1b6 3096 stac_input_src_temp.name, 0);
e3c75964
TI		 3097 if (!knew)
3098 return -ENOMEM;
3099 knew->count = spec->num_adcs;
3100 return 0;
3101}
3102
c21ca4a8
TI		 3103/* check whether the line-input can be used as line-out */
3104static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 3105{
3106 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 3107 struct auto_pin_cfg *cfg = &spec->autocfg;
3108 hda_nid_t nid;
3109 unsigned int pincap;
eea7dc93 3110 int i;
8e9068b1 3111
c21ca4a8
TI		 3112 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
3113 return 0;
eea7dc93 3114 for (i = 0; i < cfg->num_inputs; i++) {
86e2959a 3115 if (cfg->inputs[i].type == AUTO_PIN_LINE_IN) {
eea7dc93
TI		 3116 nid = cfg->inputs[i].pin;
3117 pincap = snd_hda_query_pin_caps(codec, nid);
3118 if (pincap & AC_PINCAP_OUT)
3119 return nid;
3120 }
3121 }
c21ca4a8
TI		 3122 return 0;
3123}
403d1944 3124
eea7dc93
TI		 3125static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid);
3126
c21ca4a8 3127/* check whether the mic-input can be used as line-out */
eea7dc93 3128static hda_nid_t check_mic_out_switch(struct hda_codec *codec, hda_nid_t *dac)
c21ca4a8
TI		 3129{
3130 struct sigmatel_spec *spec = codec->spec;
3131 struct auto_pin_cfg *cfg = &spec->autocfg;
3132 unsigned int def_conf, pincap;
86e2959a 3133 int i;
c21ca4a8 3134
eea7dc93 3135 *dac = 0;
c21ca4a8
TI		 3136 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
3137 return 0;
eea7dc93
TI		 3138 for (i = 0; i < cfg->num_inputs; i++) {
3139 hda_nid_t nid = cfg->inputs[i].pin;
86e2959a 3140 if (cfg->inputs[i].type != AUTO_PIN_MIC)
eea7dc93 3141 continue;
330ee995 3142 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI		 3143 /* some laptops have an internal analog microphone
3144 * which can't be used as a output */
99ae28be 3145 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
1327a32b 3146 pincap = snd_hda_query_pin_caps(codec, nid);
eea7dc93
TI		 3147 if (pincap & AC_PINCAP_OUT) {
3148 *dac = get_unassigned_dac(codec, nid);
3149 if (*dac)
3150 return nid;
3151 }
403d1944 3152 }
403d1944 3153 }
403d1944
MP		 3154 return 0;
3155}
3156
7b043899
SL		 3157static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
3158{
3159 int i;
3160
3161 for (i = 0; i < spec->multiout.num_dacs; i++) {
3162 if (spec->multiout.dac_nids[i] == nid)
3163 return 1;
3164 }
3165
3166 return 0;
3167}
3168
c21ca4a8
TI		 3169static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
3170{
3171 int i;
3172 if (is_in_dac_nids(spec, nid))
3173 return 1;
3174 for (i = 0; i < spec->autocfg.hp_outs; i++)
3175 if (spec->hp_dacs[i] == nid)
3176 return 1;
3177 for (i = 0; i < spec->autocfg.speaker_outs; i++)
3178 if (spec->speaker_dacs[i] == nid)
3179 return 1;
3180 return 0;
3181}
3182
3183static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
3184{
3185 struct sigmatel_spec *spec = codec->spec;
48718eab 3186 struct auto_pin_cfg *cfg = &spec->autocfg;
c21ca4a8 3187 int j, conn_len;
48718eab 3188 hda_nid_t conn[HDA_MAX_CONNECTIONS], fallback_dac;
c21ca4a8
TI		 3189 unsigned int wcaps, wtype;
3190
3191 conn_len = snd_hda_get_connections(codec, nid, conn,
3192 HDA_MAX_CONNECTIONS);
36706005
CC		 3193 /* 92HD88: trace back up the link of nids to find the DAC */
3194 while (conn_len == 1 && (get_wcaps_type(get_wcaps(codec, conn[0]))
3195 != AC_WID_AUD_OUT)) {
3196 nid = conn[0];
3197 conn_len = snd_hda_get_connections(codec, nid, conn,
3198 HDA_MAX_CONNECTIONS);
3199 }
c21ca4a8 3200 for (j = 0; j < conn_len; j++) {
14bafe32 3201 wcaps = get_wcaps(codec, conn[j]);
a22d543a 3202 wtype = get_wcaps_type(wcaps);
c21ca4a8
TI		 3203 /* we check only analog outputs */
3204 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
3205 continue;
3206 /* if this route has a free DAC, assign it */
3207 if (!check_all_dac_nids(spec, conn[j])) {
3208 if (conn_len > 1) {
3209 /* select this DAC in the pin's input mux */
3210 snd_hda_codec_write_cache(codec, nid, 0,
3211 AC_VERB_SET_CONNECT_SEL, j);
3212 }
3213 return conn[j];
3214 }
3215 }
48718eab
DH		 3216
3217 /* if all DACs are already assigned, connect to the primary DAC,
3218 unless we're assigning a secondary headphone */
3219 fallback_dac = spec->multiout.dac_nids[0];
3220 if (spec->multiout.hp_nid) {
3221 for (j = 0; j < cfg->hp_outs; j++)
3222 if (cfg->hp_pins[j] == nid) {
3223 fallback_dac = spec->multiout.hp_nid;
3224 break;
3225 }
3226 }
3227
ee58a7ca
TI		 3228 if (conn_len > 1) {
3229 for (j = 0; j < conn_len; j++) {
48718eab 3230 if (conn[j] == fallback_dac) {
ee58a7ca
TI		 3231 snd_hda_codec_write_cache(codec, nid, 0,
3232 AC_VERB_SET_CONNECT_SEL, j);
3233 break;
3234 }
3235 }
3236 }
c21ca4a8
TI		 3237 return 0;
3238}
3239
3240static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
3241static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
3242
3cc08dc6 3243/*
7b043899
SL		 3244 * Fill in the dac_nids table from the parsed pin configuration
3245 * This function only works when every pin in line_out_pins[]
3246 * contains atleast one DAC in its connection list. Some 92xx
3247 * codecs are not connected directly to a DAC, such as the 9200
3248 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 3249 */
c21ca4a8 3250static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 3251{
3252 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 3253 struct auto_pin_cfg *cfg = &spec->autocfg;
3254 int i;
3255 hda_nid_t nid, dac;
7b043899 3256
c7d4b2fa
M		 3257 for (i = 0; i < cfg->line_outs; i++) {
3258 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 3259 dac = get_unassigned_dac(codec, nid);
3260 if (!dac) {
df802952
TI		 3261 if (spec->multiout.num_dacs > 0) {
3262 /* we have already working output pins,
3263 * so let's drop the broken ones again
3264 */
3265 cfg->line_outs = spec->multiout.num_dacs;
3266 break;
3267 }
7b043899
SL		 3268 /* error out, no available DAC found */
3269 snd_printk(KERN_ERR
3270 "%s: No available DAC for pin 0x%x\n",
3271 __func__, nid);
3272 return -ENODEV;
3273 }
c21ca4a8
TI		 3274 add_spec_dacs(spec, dac);
3275 }
7b043899 3276
139e071b
TI		 3277 for (i = 0; i < cfg->hp_outs; i++) {
3278 nid = cfg->hp_pins[i];
3279 dac = get_unassigned_dac(codec, nid);
3280 if (dac) {
3281 if (!spec->multiout.hp_nid)
3282 spec->multiout.hp_nid = dac;
3283 else
3284 add_spec_extra_dacs(spec, dac);
3285 }
3286 spec->hp_dacs[i] = dac;
3287 }
3288
3289 for (i = 0; i < cfg->speaker_outs; i++) {
3290 nid = cfg->speaker_pins[i];
3291 dac = get_unassigned_dac(codec, nid);
3292 if (dac)
3293 add_spec_extra_dacs(spec, dac);
3294 spec->speaker_dacs[i] = dac;
3295 }
3296
c21ca4a8
TI		 3297 /* add line-in as output */
3298 nid = check_line_out_switch(codec);
3299 if (nid) {
3300 dac = get_unassigned_dac(codec, nid);
3301 if (dac) {
3302 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
3303 nid, cfg->line_outs);
3304 cfg->line_out_pins[cfg->line_outs] = nid;
3305 cfg->line_outs++;
3306 spec->line_switch = nid;
3307 add_spec_dacs(spec, dac);
3308 }
3309 }
3310 /* add mic as output */
eea7dc93
TI		 3311 nid = check_mic_out_switch(codec, &dac);
3312 if (nid && dac) {
3313 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
3314 nid, cfg->line_outs);
3315 cfg->line_out_pins[cfg->line_outs] = nid;
3316 cfg->line_outs++;
3317 spec->mic_switch = nid;
3318 add_spec_dacs(spec, dac);
c21ca4a8 3319 }
c7d4b2fa 3320
c21ca4a8 3321 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 3322 spec->multiout.num_dacs,
3323 spec->multiout.dac_nids[0],
3324 spec->multiout.dac_nids[1],
3325 spec->multiout.dac_nids[2],
3326 spec->multiout.dac_nids[3],
3327 spec->multiout.dac_nids[4]);
c21ca4a8 3328
c7d4b2fa
M		 3329 return 0;
3330}
3331
eb06ed8f 3332/* create volume control/switch for the given prefx type */
668b9652
TI		 3333static int create_controls_idx(struct hda_codec *codec, const char *pfx,
3334 int idx, hda_nid_t nid, int chs)
eb06ed8f 3335{
7c7767eb 3336 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI		 3337 char name[32];
3338 int err;
3339
7c7767eb
TI		 3340 if (!spec->check_volume_offset) {
3341 unsigned int caps, step, nums, db_scale;
3342 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3343 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3344 AC_AMPCAP_STEP_SIZE_SHIFT;
3345 step = (step + 1) * 25; /* in .01dB unit */
3346 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3347 AC_AMPCAP_NUM_STEPS_SHIFT;
3348 db_scale = nums * step;
3349 /* if dB scale is over -64dB, and finer enough,
3350 * let's reduce it to half
3351 */
3352 if (db_scale > 6400 && nums >= 0x1f)
3353 spec->volume_offset = nums / 2;
3354 spec->check_volume_offset = 1;
3355 }
3356
eb06ed8f 3357 sprintf(name, "%s Playback Volume", pfx);
668b9652 3358 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI		 3359 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3360 spec->volume_offset));
eb06ed8f
TI		 3361 if (err < 0)
3362 return err;
3363 sprintf(name, "%s Playback Switch", pfx);
668b9652 3364 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI		 3365 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3366 if (err < 0)
3367 return err;
3368 return 0;
3369}
3370
668b9652
TI		 3371#define create_controls(codec, pfx, nid, chs) \
3372 create_controls_idx(codec, pfx, 0, nid, chs)
3373
ae0afd81
MR		 3374static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3375{
c21ca4a8 3376 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3377 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3378 return 1;
3379 } else {
dda14410
TI		 3380 snd_BUG_ON(spec->multiout.dac_nids != spec->dac_nids);
3381 spec->dac_nids[spec->multiout.num_dacs] = nid;
ae0afd81
MR		 3382 spec->multiout.num_dacs++;
3383 }
3384 return 0;
3385}
3386
c21ca4a8 3387static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3388{
c21ca4a8
TI		 3389 int i;
3390 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3391 if (!spec->multiout.extra_out_nid[i]) {
3392 spec->multiout.extra_out_nid[i] = nid;
3393 return 0;
3394 }
3395 }
3396 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3397 return 1;
ae0afd81
MR		 3398}
3399
dc04d1b4
TI		 3400/* Create output controls
3401 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3402 */
3403static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3404 const hda_nid_t *pins,
3405 const hda_nid_t *dac_nids,
3406 int type)
c7d4b2fa 3407{
76624534 3408 struct sigmatel_spec *spec = codec->spec;
ea734963 3409 static const char * const chname[4] = {
19039bd0
TI		 3410 "Front", "Surround", NULL /*CLFE*/, "Side"
3411 };
dc04d1b4 3412 hda_nid_t nid;
91589232
TI		 3413 int i, err;
3414 unsigned int wid_caps;
0fb87bb4 3415
dc04d1b4 3416 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
ffd0e56c 3417 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
e35d9d6a 3418 if (is_jack_detectable(codec, pins[i]))
ffd0e56c
TI		 3419 spec->hp_detect = 1;
3420 }
dc04d1b4
TI		 3421 nid = dac_nids[i];
3422 if (!nid)
3423 continue;
3424 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3425 /* Center/LFE */
7c7767eb 3426 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3427 if (err < 0)
c7d4b2fa 3428 return err;
7c7767eb 3429 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3430 if (err < 0)
c7d4b2fa 3431 return err;
0fb87bb4
ML		 3432
3433 wid_caps = get_wcaps(codec, nid);
3434
3435 if (wid_caps & AC_WCAP_LR_SWAP) {
3436 err = stac92xx_add_control(spec,
3437 STAC_CTL_WIDGET_CLFE_SWITCH,
3438 "Swap Center/LFE Playback Switch", nid);
3439
3440 if (err < 0)
3441 return err;
3442 }
3443
c7d4b2fa 3444 } else {
dc04d1b4 3445 const char *name;
668b9652 3446 int idx;
dc04d1b4
TI		 3447 switch (type) {
3448 case AUTO_PIN_HP_OUT:
668b9652
TI		 3449 name = "Headphone";
3450 idx = i;
dc04d1b4
TI		 3451 break;
3452 case AUTO_PIN_SPEAKER_OUT:
f37bc7a8
TI		 3453 if (num_outs <= 2) {
3454 name = i ? "Bass Speaker" : "Speaker";
3455 idx = 0;
298efee7
DH		 3456 break;
3457 }
3458 /* Fall through in case of multi speaker outs */
dc04d1b4
TI		 3459 default:
3460 name = chname[i];
668b9652 3461 idx = 0;
dc04d1b4 3462 break;
76624534 3463 }
668b9652 3464 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3465 if (err < 0)
c7d4b2fa
M		 3466 return err;
3467 }
3468 }
dc04d1b4
TI		 3469 return 0;
3470}
3471
62cbde18
TI		 3472static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
3473 unsigned int dir_mask, unsigned int data);
3474
3475/* hook for controlling mic-mute LED GPIO */
3476static int stac92xx_capture_sw_put_led(struct snd_kcontrol *kcontrol,
3477 struct snd_ctl_elem_value *ucontrol)
3478{
3479 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3480 struct sigmatel_spec *spec = codec->spec;
3481 int err;
3482 bool mute;
3483
3484 err = snd_hda_mixer_amp_switch_put(kcontrol, ucontrol);
3485 if (err <= 0)
3486 return err;
3487 mute = !(ucontrol->value.integer.value[0] &&
3488 ucontrol->value.integer.value[1]);
3489 if (spec->mic_mute_led_on != mute) {
3490 spec->mic_mute_led_on = mute;
3491 if (mute)
3492 spec->gpio_data |= spec->mic_mute_led_gpio;
3493 else
3494 spec->gpio_data &= ~spec->mic_mute_led_gpio;
3495 stac_gpio_set(codec, spec->gpio_mask,
3496 spec->gpio_dir, spec->gpio_data);
3497 }
3498 return err;
3499}
3500
6479c631
TI		 3501static int stac92xx_add_capvol_ctls(struct hda_codec *codec, unsigned long vol,
3502 unsigned long sw, int idx)
3503{
62cbde18
TI		 3504 struct sigmatel_spec *spec = codec->spec;
3505 struct snd_kcontrol_new *knew;
6479c631 3506 int err;
62cbde18 3507
6479c631 3508 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx,
bf677bd8 3509 "Capture Volume", vol);
6479c631
TI		 3510 if (err < 0)
3511 return err;
62cbde18
TI		 3512
3513 knew = add_control_temp(spec,
3514 &stac92xx_control_templates[STAC_CTL_WIDGET_MUTE],
3515 idx, "Capture Switch", sw);
3516 if (!knew)
3517 return -ENOMEM;
3518 /* add a LED hook for some HP laptops */
3519 if (spec->mic_mute_led_gpio)
3520 knew->put = stac92xx_capture_sw_put_led;
3521
6479c631
TI		 3522 return 0;
3523}
3524
dc04d1b4
TI		 3525/* add playback controls from the parsed DAC table */
3526static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3527 const struct auto_pin_cfg *cfg)
3528{
3529 struct sigmatel_spec *spec = codec->spec;
7c922de7 3530 hda_nid_t nid;
dc04d1b4 3531 int err;
7c922de7 3532 int idx;
dc04d1b4
TI		 3533
3534 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3535 spec->multiout.dac_nids,
3536 cfg->line_out_type);
3537 if (err < 0)
3538 return err;
c7d4b2fa 3539
a9cb5c90 3540 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3541 err = stac92xx_add_control(spec,
3542 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3543 "Headphone as Line Out Switch",
3544 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3545 if (err < 0)
3546 return err;
3547 }
3548
eea7dc93 3549 for (idx = 0; idx < cfg->num_inputs; idx++) {
86e2959a 3550 if (cfg->inputs[idx].type > AUTO_PIN_LINE_IN)
eea7dc93
TI		 3551 break;
3552 nid = cfg->inputs[idx].pin;
3553 err = stac92xx_add_jack_mode_control(codec, nid, idx);
3554 if (err < 0)
3555 return err;
b5895dc8 3556 }
403d1944 3557
c7d4b2fa
M		 3558 return 0;
3559}
3560
eb06ed8f
TI		 3561/* add playback controls for Speaker and HP outputs */
3562static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3563 struct auto_pin_cfg *cfg)
3564{
3565 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI		 3566 int err;
3567
3568 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3569 spec->hp_dacs, AUTO_PIN_HP_OUT);
3570 if (err < 0)
3571 return err;
3572
3573 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3574 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3575 if (err < 0)
3576 return err;
eb06ed8f 3577
c7d4b2fa
M		 3578 return 0;
3579}
3580
b22b4821 3581/* labels for mono mux outputs */
ea734963 3582static const char * const stac92xx_mono_labels[4] = {
d0513fc6 3583 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3584};
3585
3586/* create mono mux for mono out on capable codecs */
3587static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3588{
3589 struct sigmatel_spec *spec = codec->spec;
3590 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3591 int i, num_cons;
3592 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3593
3594 num_cons = snd_hda_get_connections(codec,
3595 spec->mono_nid,
3596 con_lst,
3597 HDA_MAX_NUM_INPUTS);
16a433d8 3598 if (num_cons <= 0 || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
b22b4821
MR		 3599 return -EINVAL;
3600
10a20af7
TI		 3601 for (i = 0; i < num_cons; i++)
3602 snd_hda_add_imux_item(mono_mux, stac92xx_mono_labels[i], i,
3603 NULL);
09a99959
MR		 3604
3605 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3606 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3607}
3608
1cd2224c
MR		 3609/* create PC beep volume controls */
3610static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3611 hda_nid_t nid)
3612{
3613 struct sigmatel_spec *spec = codec->spec;
3614 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
123c07ae
JK		 3615 int err, type = STAC_CTL_WIDGET_MUTE_BEEP;
3616
3617 if (spec->anabeep_nid == nid)
3618 type = STAC_CTL_WIDGET_MUTE;
1cd2224c
MR		 3619
3620 /* check for mute support for the the amp */
3621 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
123c07ae 3622 err = stac92xx_add_control(spec, type,
d355c82a 3623 "Beep Playback Switch",
1cd2224c
MR		 3624 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3625 if (err < 0)
3626 return err;
3627 }
3628
3629 /* check to see if there is volume support for the amp */
3630 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3631 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
d355c82a 3632 "Beep Playback Volume",
1cd2224c
MR		 3633 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3634 if (err < 0)
3635 return err;
3636 }
3637 return 0;
3638}
3639
4d4e9bb3
TI		 3640#ifdef CONFIG_SND_HDA_INPUT_BEEP
3641#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3642
3643static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3644 struct snd_ctl_elem_value *ucontrol)
3645{
3646 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3647 ucontrol->value.integer.value[0] = codec->beep->enabled;
3648 return 0;
3649}
3650
3651static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3652 struct snd_ctl_elem_value *ucontrol)
3653{
3654 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
123c07ae 3655 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
4d4e9bb3
TI		 3656}
3657
2b63536f 3658static const struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
4d4e9bb3
TI		 3659 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3660 .info = stac92xx_dig_beep_switch_info,
3661 .get = stac92xx_dig_beep_switch_get,
3662 .put = stac92xx_dig_beep_switch_put,
3663};
3664
3665static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3666{
3667 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
d355c82a 3668 0, "Beep Playback Switch", 0);
4d4e9bb3
TI		 3669}
3670#endif
3671
4682eee0
MR		 3672static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3673{
3674 struct sigmatel_spec *spec = codec->spec;
667067d8 3675 int i, j, err = 0;
4682eee0
MR		 3676
3677 for (i = 0; i < spec->num_muxes; i++) {
667067d8
TI		 3678 hda_nid_t nid;
3679 unsigned int wcaps;
3680 unsigned long val;
3681
4682eee0
MR		 3682 nid = spec->mux_nids[i];
3683 wcaps = get_wcaps(codec, nid);
667067d8
TI		 3684 if (!(wcaps & AC_WCAP_OUT_AMP))
3685 continue;
4682eee0 3686
667067d8
TI		 3687 /* check whether already the same control was created as
3688 * normal Capture Volume.
3689 */
3690 val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
3691 for (j = 0; j < spec->num_caps; j++) {
3692 if (spec->capvols[j] == val)
3693 break;
4682eee0 3694 }
667067d8
TI		 3695 if (j < spec->num_caps)
3696 continue;
3697
3698 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, i,
3699 "Mux Capture Volume", val);
3700 if (err < 0)
3701 return err;
4682eee0
MR		 3702 }
3703 return 0;
3704};
3705
ea734963 3706static const char * const stac92xx_spdif_labels[3] = {
65973632 3707 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3708};
3709
3710static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3711{
3712 struct sigmatel_spec *spec = codec->spec;
3713 struct hda_input_mux *spdif_mux = &spec->private_smux;
ea734963 3714 const char * const *labels = spec->spdif_labels;
d9737751 3715 int i, num_cons;
65973632 3716 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3717
3718 num_cons = snd_hda_get_connections(codec,
3719 spec->smux_nids[0],
3720 con_lst,
3721 HDA_MAX_NUM_INPUTS);
16a433d8 3722 if (num_cons <= 0)
d9737751
MR		 3723 return -EINVAL;
3724
65973632
MR		 3725 if (!labels)
3726 labels = stac92xx_spdif_labels;
3727
10a20af7
TI		 3728 for (i = 0; i < num_cons; i++)
3729 snd_hda_add_imux_item(spdif_mux, labels[i], i, NULL);
d9737751
MR		 3730
3731 return 0;
3732}
3733
8b65727b 3734/* labels for dmic mux inputs */
ea734963 3735static const char * const stac92xx_dmic_labels[5] = {
8b65727b
MP		 3736 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3737 "Digital Mic 3", "Digital Mic 4"
3738};
3739
699d8995
VK		 3740static hda_nid_t get_connected_node(struct hda_codec *codec, hda_nid_t mux,
3741 int idx)
3742{
3743 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3744 int nums;
3745 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3746 if (idx >= 0 && idx < nums)
3747 return conn[idx];
3748 return 0;
3749}
3750
8d087c76
TI		 3751/* look for NID recursively */
3752#define get_connection_index(codec, mux, nid) \
3753 snd_hda_get_conn_index(codec, mux, nid, 1)
3d21d3f7 3754
667067d8 3755/* create a volume assigned to the given pin (only if supported) */
96f845de 3756/* return 1 if the volume control is created */
667067d8 3757static int create_elem_capture_vol(struct hda_codec *codec, hda_nid_t nid,
eea7dc93 3758 const char *label, int idx, int direction)
667067d8
TI		 3759{
3760 unsigned int caps, nums;
3761 char name[32];
96f845de 3762 int err;
667067d8 3763
96f845de
TI		 3764 if (direction == HDA_OUTPUT)
3765 caps = AC_WCAP_OUT_AMP;
3766 else
3767 caps = AC_WCAP_IN_AMP;
3768 if (!(get_wcaps(codec, nid) & caps))
667067d8 3769 return 0;
96f845de 3770 caps = query_amp_caps(codec, nid, direction);
667067d8
TI		 3771 nums = (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT;
3772 if (!nums)
3773 return 0;
3774 snprintf(name, sizeof(name), "%s Capture Volume", label);
eea7dc93
TI		 3775 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx, name,
3776 HDA_COMPOSE_AMP_VAL(nid, 3, 0, direction));
96f845de
TI		 3777 if (err < 0)
3778 return err;
3779 return 1;
667067d8
TI		 3780}
3781
8b65727b
MP		 3782/* create playback/capture controls for input pins on dmic capable codecs */
3783static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3784 const struct auto_pin_cfg *cfg)
3785{
3786 struct sigmatel_spec *spec = codec->spec;
5207e10e 3787 struct hda_input_mux *imux = &spec->private_imux;
8b65727b 3788 struct hda_input_mux *dimux = &spec->private_dimux;
263d0328 3789 int err, i;
5207e10e 3790 unsigned int def_conf;
8b65727b 3791
10a20af7 3792 snd_hda_add_imux_item(dimux, stac92xx_dmic_labels[0], 0, NULL);
5207e10e 3793
8b65727b 3794 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3795 hda_nid_t nid;
10a20af7 3796 int index, type_idx;
201e06ff 3797 char label[32];
8b65727b 3798
667067d8
TI		 3799 nid = spec->dmic_nids[i];
3800 if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
3801 continue;
3802 def_conf = snd_hda_codec_get_pincfg(codec, nid);
8b65727b
MP		 3803 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3804 continue;
3805
3d21d3f7
TI		 3806 index = get_connection_index(codec, spec->dmux_nids[0], nid);
3807 if (index < 0)
3808 continue;
3809
201e06ff
TI		 3810 snd_hda_get_pin_label(codec, nid, &spec->autocfg,
3811 label, sizeof(label), NULL);
10a20af7 3812 snd_hda_add_imux_item(dimux, label, index, &type_idx);
2d7ec12b
TI		 3813 if (snd_hda_get_bool_hint(codec, "separate_dmux") != 1)
3814 snd_hda_add_imux_item(imux, label, index, &type_idx);
5207e10e 3815
10a20af7
TI		 3816 err = create_elem_capture_vol(codec, nid, label, type_idx,
3817 HDA_INPUT);
667067d8
TI		 3818 if (err < 0)
3819 return err;
96f845de
TI		 3820 if (!err) {
3821 err = create_elem_capture_vol(codec, nid, label,
10a20af7 3822 type_idx, HDA_OUTPUT);
96f845de
TI		 3823 if (err < 0)
3824 return err;
699d8995
VK		 3825 if (!err) {
3826 nid = get_connected_node(codec,
3827 spec->dmux_nids[0], index);
3828 if (nid)
3829 err = create_elem_capture_vol(codec,
3830 nid, label,
3831 type_idx, HDA_INPUT);
3832 if (err < 0)
3833 return err;
3834 }
96f845de 3835 }
8b65727b
MP		 3836 }
3837
3838 return 0;
3839}
3840
3d21d3f7 3841static int check_mic_pin(struct hda_codec *codec, hda_nid_t nid,
9907790a 3842 hda_nid_t *fixed, hda_nid_t *ext, hda_nid_t *dock)
3d21d3f7
TI		 3843{
3844 unsigned int cfg;
1f83ac5a 3845 unsigned int type;
3d21d3f7
TI		 3846
3847 if (!nid)
3848 return 0;
3849 cfg = snd_hda_codec_get_pincfg(codec, nid);
1f83ac5a 3850 type = get_defcfg_device(cfg);
99ae28be
TI		 3851 switch (snd_hda_get_input_pin_attr(cfg)) {
3852 case INPUT_PIN_ATTR_INT:
3d21d3f7
TI		 3853 if (*fixed)
3854 return 1; /* already occupied */
1f83ac5a
TI		 3855 if (type != AC_JACK_MIC_IN)
3856 return 1; /* invalid type */
3d21d3f7
TI		 3857 *fixed = nid;
3858 break;
99ae28be
TI		 3859 case INPUT_PIN_ATTR_UNUSED:
3860 break;
3861 case INPUT_PIN_ATTR_DOCK:
3862 if (*dock)
3863 return 1; /* already occupied */
1f83ac5a
TI		 3864 if (type != AC_JACK_MIC_IN && type != AC_JACK_LINE_IN)
3865 return 1; /* invalid type */
99ae28be
TI		 3866 *dock = nid;
3867 break;
3868 default:
3d21d3f7
TI		 3869 if (*ext)
3870 return 1; /* already occupied */
1f83ac5a
TI		 3871 if (type != AC_JACK_MIC_IN)
3872 return 1; /* invalid type */
3d21d3f7
TI		 3873 *ext = nid;
3874 break;
3875 }
3876 return 0;
3877}
3878
3879static int set_mic_route(struct hda_codec *codec,
3880 struct sigmatel_mic_route *mic,
3881 hda_nid_t pin)
3882{
3883 struct sigmatel_spec *spec = codec->spec;
3884 struct auto_pin_cfg *cfg = &spec->autocfg;
3885 int i;
3886
3887 mic->pin = pin;
9907790a
CC		 3888 if (pin == 0)
3889 return 0;
eea7dc93
TI		 3890 for (i = 0; i < cfg->num_inputs; i++) {
3891 if (pin == cfg->inputs[i].pin)
3d21d3f7 3892 break;
eea7dc93 3893 }
86e2959a 3894 if (i < cfg->num_inputs && cfg->inputs[i].type == AUTO_PIN_MIC) {
3d21d3f7 3895 /* analog pin */
3d21d3f7
TI		 3896 i = get_connection_index(codec, spec->mux_nids[0], pin);
3897 if (i < 0)
3898 return -1;
3899 mic->mux_idx = i;
02d33322
TI		 3900 mic->dmux_idx = -1;
3901 if (spec->dmux_nids)
3902 mic->dmux_idx = get_connection_index(codec,
3903 spec->dmux_nids[0],
3904 spec->mux_nids[0]);
da2a2aaa 3905 } else if (spec->dmux_nids) {
3d21d3f7 3906 /* digital pin */
3d21d3f7
TI		 3907 i = get_connection_index(codec, spec->dmux_nids[0], pin);
3908 if (i < 0)
3909 return -1;
3910 mic->dmux_idx = i;
02d33322
TI		 3911 mic->mux_idx = -1;
3912 if (spec->mux_nids)
3913 mic->mux_idx = get_connection_index(codec,
3914 spec->mux_nids[0],
3915 spec->dmux_nids[0]);
3d21d3f7
TI		 3916 }
3917 return 0;
3918}
3919
3920/* return non-zero if the device is for automatic mic switch */
3921static int stac_check_auto_mic(struct hda_codec *codec)
3922{
3923 struct sigmatel_spec *spec = codec->spec;
3924 struct auto_pin_cfg *cfg = &spec->autocfg;
9907790a 3925 hda_nid_t fixed, ext, dock;
3d21d3f7
TI		 3926 int i;
3927
9907790a 3928 fixed = ext = dock = 0;
eea7dc93 3929 for (i = 0; i < cfg->num_inputs; i++)
9907790a
CC		 3930 if (check_mic_pin(codec, cfg->inputs[i].pin,
3931 &fixed, &ext, &dock))
3d21d3f7
TI		 3932 return 0;
3933 for (i = 0; i < spec->num_dmics; i++)
9907790a
CC		 3934 if (check_mic_pin(codec, spec->dmic_nids[i],
3935 &fixed, &ext, &dock))
3d21d3f7 3936 return 0;
80c67852 3937 if (!fixed || (!ext && !dock))
9907790a 3938 return 0; /* no input to switch */
e35d9d6a 3939 if (!is_jack_detectable(codec, ext))
3d21d3f7
TI		 3940 return 0; /* no unsol support */
3941 if (set_mic_route(codec, &spec->ext_mic, ext) ||
9907790a
CC		 3942 set_mic_route(codec, &spec->int_mic, fixed) ||
3943 set_mic_route(codec, &spec->dock_mic, dock))
3d21d3f7
TI		 3944 return 0; /* something is wrong */
3945 return 1;
3946}
3947
c7d4b2fa
M		 3948/* create playback/capture controls for input pins */
3949static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3950{
3951 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 3952 struct hda_input_mux *imux = &spec->private_imux;
667067d8 3953 int i, j;
263d0328 3954 const char *label;
c7d4b2fa 3955
eea7dc93
TI		 3956 for (i = 0; i < cfg->num_inputs; i++) {
3957 hda_nid_t nid = cfg->inputs[i].pin;
10a20af7 3958 int index, err, type_idx;
314634bc 3959
314634bc
TI		 3960 index = -1;
3961 for (j = 0; j < spec->num_muxes; j++) {
667067d8
TI		 3962 index = get_connection_index(codec, spec->mux_nids[j],
3963 nid);
3964 if (index >= 0)
3965 break;
c7d4b2fa 3966 }
667067d8
TI		 3967 if (index < 0)
3968 continue;
3969
10a20af7
TI		 3970 label = hda_get_autocfg_input_label(codec, cfg, i);
3971 snd_hda_add_imux_item(imux, label, index, &type_idx);
263d0328 3972
667067d8 3973 err = create_elem_capture_vol(codec, nid,
263d0328 3974 label, type_idx,
96f845de 3975 HDA_INPUT);
667067d8
TI		 3976 if (err < 0)
3977 return err;
c7d4b2fa 3978 }
5207e10e 3979 spec->num_analog_muxes = imux->num_items;
c7d4b2fa 3980
7b043899 3981 if (imux->num_items) {
62fe78e9
SR		 3982 /*
3983 * Set the current input for the muxes.
3984 * The STAC9221 has two input muxes with identical source
3985 * NID lists. Hopefully this won't get confused.
3986 */
3987 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3988 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3989 AC_VERB_SET_CONNECT_SEL,
3990 imux->items[0].index);
62fe78e9
SR		 3991 }
3992 }
3993
c7d4b2fa
M		 3994 return 0;
3995}
3996
c7d4b2fa
M		 3997static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3998{
3999 struct sigmatel_spec *spec = codec->spec;
4000 int i;
4001
4002 for (i = 0; i < spec->autocfg.line_outs; i++) {
4003 hda_nid_t nid = spec->autocfg.line_out_pins[i];
4004 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4005 }
4006}
4007
4008static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
4009{
4010 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 4011 int i;
c7d4b2fa 4012
eb06ed8f
TI		 4013 for (i = 0; i < spec->autocfg.hp_outs; i++) {
4014 hda_nid_t pin;
4015 pin = spec->autocfg.hp_pins[i];
4016 if (pin) /* connect to front */
4017 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
4018 }
4019 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
4020 hda_nid_t pin;
4021 pin = spec->autocfg.speaker_pins[i];
4022 if (pin) /* connect to front */
4023 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
4024 }
c7d4b2fa
M		 4025}
4026
8af3aeb4
TI		 4027static int is_dual_headphones(struct hda_codec *codec)
4028{
4029 struct sigmatel_spec *spec = codec->spec;
4030 int i, valid_hps;
4031
4032 if (spec->autocfg.line_out_type != AUTO_PIN_SPEAKER_OUT ||
4033 spec->autocfg.hp_outs <= 1)
4034 return 0;
4035 valid_hps = 0;
4036 for (i = 0; i < spec->autocfg.hp_outs; i++) {
4037 hda_nid_t nid = spec->autocfg.hp_pins[i];
4038 unsigned int cfg = snd_hda_codec_get_pincfg(codec, nid);
4039 if (get_defcfg_location(cfg) & AC_JACK_LOC_SEPARATE)
4040 continue;
4041 valid_hps++;
4042 }
4043 return (valid_hps > 1);
4044}
4045
4046
9009b0e4 4047static int stac92xx_parse_auto_config(struct hda_codec *codec)
c7d4b2fa
M		 4048{
4049 struct sigmatel_spec *spec = codec->spec;
9009b0e4 4050 hda_nid_t dig_out = 0, dig_in = 0;
dc04d1b4 4051 int hp_swap = 0;
6479c631 4052 int i, err;
c7d4b2fa 4053
8b65727b
MP		 4054 if ((err = snd_hda_parse_pin_def_config(codec,
4055 &spec->autocfg,
4056 spec->dmic_nids)) < 0)
c7d4b2fa 4057 return err;
82bc955f 4058 if (! spec->autocfg.line_outs)
869264c4 4059 return 0; /* can't find valid pin config */
19039bd0 4060
bcecd9bd
JZ		 4061 /* If we have no real line-out pin and multiple hp-outs, HPs should
4062 * be set up as multi-channel outputs.
4063 */
8af3aeb4 4064 if (is_dual_headphones(codec)) {
bcecd9bd
JZ		 4065 /* Copy hp_outs to line_outs, backup line_outs in
4066 * speaker_outs so that the following routines can handle
4067 * HP pins as primary outputs.
4068 */
c21ca4a8 4069 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 4070 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
4071 sizeof(spec->autocfg.line_out_pins));
4072 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
4073 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
4074 sizeof(spec->autocfg.hp_pins));
4075 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 4076 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
4077 spec->autocfg.hp_outs = 0;
dc04d1b4 4078 hp_swap = 1;
bcecd9bd 4079 }
09a99959 4080 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 4081 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
4082 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 4083 u32 caps = query_amp_caps(codec,
4084 spec->autocfg.mono_out_pin, dir);
4085 hda_nid_t conn_list[1];
4086
4087 /* get the mixer node and then the mono mux if it exists */
4088 if (snd_hda_get_connections(codec,
4089 spec->autocfg.mono_out_pin, conn_list, 1) &&
4090 snd_hda_get_connections(codec, conn_list[0],
16a433d8 4091 conn_list, 1) > 0) {
09a99959
MR		 4092
4093 int wcaps = get_wcaps(codec, conn_list[0]);
a22d543a 4094 int wid_type = get_wcaps_type(wcaps);
09a99959
MR		 4095 /* LR swap check, some stac925x have a mux that
4096 * changes the DACs output path instead of the
4097 * mono-mux path.
4098 */
4099 if (wid_type == AC_WID_AUD_SEL &&
4100 !(wcaps & AC_WCAP_LR_SWAP))
4101 spec->mono_nid = conn_list[0];
4102 }
d0513fc6
MR		 4103 if (dir) {
4104 hda_nid_t nid = spec->autocfg.mono_out_pin;
4105
4106 /* most mono outs have a least a mute/unmute switch */
4107 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
4108 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
4109 "Mono Playback Switch",
4110 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 4111 if (err < 0)
4112 return err;
d0513fc6
MR		 4113 /* check for volume support for the amp */
4114 if ((caps & AC_AMPCAP_NUM_STEPS)
4115 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
4116 err = stac92xx_add_control(spec,
4117 STAC_CTL_WIDGET_VOL,
4118 "Mono Playback Volume",
4119 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
4120 if (err < 0)
4121 return err;
4122 }
09a99959
MR		 4123 }
4124
4125 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
4126 AC_PINCTL_OUT_EN);
4127 }
bcecd9bd 4128
c21ca4a8
TI		 4129 if (!spec->multiout.num_dacs) {
4130 err = stac92xx_auto_fill_dac_nids(codec);
4131 if (err < 0)
19039bd0 4132 return err;
c9280d68
TI		 4133 err = stac92xx_auto_create_multi_out_ctls(codec,
4134 &spec->autocfg);
4135 if (err < 0)
4136 return err;
c21ca4a8 4137 }
c7d4b2fa 4138
1cd2224c
MR		 4139 /* setup analog beep controls */
4140 if (spec->anabeep_nid > 0) {
4141 err = stac92xx_auto_create_beep_ctls(codec,
4142 spec->anabeep_nid);
4143 if (err < 0)
4144 return err;
4145 }
4146
4147 /* setup digital beep controls and input device */
4148#ifdef CONFIG_SND_HDA_INPUT_BEEP
4149 if (spec->digbeep_nid > 0) {
4150 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 4151 unsigned int caps;
1cd2224c
MR		 4152
4153 err = stac92xx_auto_create_beep_ctls(codec, nid);
4154 if (err < 0)
4155 return err;
4156 err = snd_hda_attach_beep_device(codec, nid);
4157 if (err < 0)
4158 return err;
d8d881dd
TI		 4159 if (codec->beep) {
4160 /* IDT/STAC codecs have linear beep tone parameter */
1b0e372d 4161 codec->beep->linear_tone = spec->linear_tone_beep;
d8d881dd
TI		 4162 /* if no beep switch is available, make its own one */
4163 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
4164 if (!(caps & AC_AMPCAP_MUTE)) {
4165 err = stac92xx_beep_switch_ctl(codec);
4166 if (err < 0)
4167 return err;
4168 }
4d4e9bb3 4169 }
1cd2224c
MR		 4170 }
4171#endif
4172
0fb87bb4 4173 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML		 4174 if (err < 0)
4175 return err;
4176
dc04d1b4
TI		 4177 /* All output parsing done, now restore the swapped hp pins */
4178 if (hp_swap) {
4179 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
4180 sizeof(spec->autocfg.hp_pins));
4181 spec->autocfg.hp_outs = spec->autocfg.line_outs;
4182 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
4183 spec->autocfg.line_outs = 0;
4184 }
0fb87bb4 4185
3d21d3f7
TI		 4186 if (stac_check_auto_mic(codec)) {
4187 spec->auto_mic = 1;
4188 /* only one capture for auto-mic */
4189 spec->num_adcs = 1;
4190 spec->num_caps = 1;
4191 spec->num_muxes = 1;
4192 }
4193
6479c631
TI		 4194 for (i = 0; i < spec->num_caps; i++) {
4195 err = stac92xx_add_capvol_ctls(codec, spec->capvols[i],
4196 spec->capsws[i], i);
4197 if (err < 0)
4198 return err;
4199 }
4200
dc04d1b4 4201 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 4202 if (err < 0)
c7d4b2fa
M		 4203 return err;
4204
b22b4821
MR		 4205 if (spec->mono_nid > 0) {
4206 err = stac92xx_auto_create_mono_output_ctls(codec);
4207 if (err < 0)
4208 return err;
4209 }
2a9c7816 4210 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 4211 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
4212 &spec->autocfg)) < 0)
4213 return err;
4682eee0
MR		 4214 if (spec->num_muxes > 0) {
4215 err = stac92xx_auto_create_mux_input_ctls(codec);
4216 if (err < 0)
4217 return err;
4218 }
d9737751
MR		 4219 if (spec->num_smuxes > 0) {
4220 err = stac92xx_auto_create_spdif_mux_ctls(codec);
4221 if (err < 0)
4222 return err;
4223 }
8b65727b 4224
e3c75964
TI		 4225 err = stac92xx_add_input_source(spec);
4226 if (err < 0)
4227 return err;
4228
c7d4b2fa 4229 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 4230 if (spec->multiout.max_channels > 2)
c7d4b2fa 4231 spec->surr_switch = 1;
c7d4b2fa 4232
9009b0e4
CC		 4233 /* find digital out and in converters */
4234 for (i = codec->start_nid; i < codec->start_nid + codec->num_nodes; i++) {
4235 unsigned int wid_caps = get_wcaps(codec, i);
4236 if (wid_caps & AC_WCAP_DIGITAL) {
4237 switch (get_wcaps_type(wid_caps)) {
4238 case AC_WID_AUD_OUT:
4239 if (!dig_out)
4240 dig_out = i;
4241 break;
4242 case AC_WID_AUD_IN:
4243 if (!dig_in)
4244 dig_in = i;
4245 break;
4246 }
4247 }
4248 }
0852d7a6 4249 if (spec->autocfg.dig_outs)
3cc08dc6 4250 spec->multiout.dig_out_nid = dig_out;
d0513fc6 4251 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 4252 spec->dig_in_nid = dig_in;
c7d4b2fa 4253
603c4019
TI		 4254 if (spec->kctls.list)
4255 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 4256
4257 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 4258 if (!spec->dinput_mux)
4259 spec->dinput_mux = &spec->private_dimux;
d9737751 4260 spec->sinput_mux = &spec->private_smux;
b22b4821 4261 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 4262 return 1;
4263}
4264
82bc955f
TI		 4265/* add playback controls for HP output */
4266static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
4267 struct auto_pin_cfg *cfg)
4268{
4269 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 4270 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 4271
4272 if (! pin)
4273 return 0;
4274
e35d9d6a 4275 if (is_jack_detectable(codec, pin))
82bc955f 4276 spec->hp_detect = 1;
82bc955f
TI		 4277
4278 return 0;
4279}
4280
160ea0dc
RF		 4281/* add playback controls for LFE output */
4282static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
4283 struct auto_pin_cfg *cfg)
4284{
4285 struct sigmatel_spec *spec = codec->spec;
4286 int err;
4287 hda_nid_t lfe_pin = 0x0;
4288 int i;
4289
4290 /*
4291 * search speaker outs and line outs for a mono speaker pin
4292 * with an amp. If one is found, add LFE controls
4293 * for it.
4294 */
4295 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
4296 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 4297 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 4298 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4299 if (wcaps == AC_WCAP_OUT_AMP)
4300 /* found a mono speaker with an amp, must be lfe */
4301 lfe_pin = pin;
4302 }
4303
4304 /* if speaker_outs is 0, then speakers may be in line_outs */
4305 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
4306 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
4307 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 4308 unsigned int defcfg;
330ee995 4309 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 4310 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 4311 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 4312 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4313 if (wcaps == AC_WCAP_OUT_AMP)
4314 /* found a mono speaker with an amp,
4315 must be lfe */
4316 lfe_pin = pin;
4317 }
4318 }
4319 }
4320
4321 if (lfe_pin) {
7c7767eb 4322 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF		 4323 if (err < 0)
4324 return err;
4325 }
4326
4327 return 0;
4328}
4329
c7d4b2fa
M		 4330static int stac9200_parse_auto_config(struct hda_codec *codec)
4331{
4332 struct sigmatel_spec *spec = codec->spec;
4333 int err;
4334
df694daa 4335 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 4336 return err;
4337
4338 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
4339 return err;
4340
82bc955f
TI		 4341 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
4342 return err;
4343
160ea0dc
RF		 4344 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
4345 return err;
4346
355a0ec4
TI		 4347 if (spec->num_muxes > 0) {
4348 err = stac92xx_auto_create_mux_input_ctls(codec);
4349 if (err < 0)
4350 return err;
4351 }
4352
e3c75964
TI		 4353 err = stac92xx_add_input_source(spec);
4354 if (err < 0)
4355 return err;
4356
0852d7a6 4357 if (spec->autocfg.dig_outs)
c7d4b2fa 4358 spec->multiout.dig_out_nid = 0x05;
82bc955f 4359 if (spec->autocfg.dig_in_pin)
c7d4b2fa 4360 spec->dig_in_nid = 0x04;
c7d4b2fa 4361
603c4019
TI		 4362 if (spec->kctls.list)
4363 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 4364
4365 spec->input_mux = &spec->private_imux;
8b65727b 4366 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 4367
4368 return 1;
4369}
4370
62fe78e9
SR		 4371/*
4372 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
4373 * funky external mute control using GPIO pins.
4374 */
4375
76e1ddfb 4376static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 4377 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 4378{
4379 unsigned int gpiostate, gpiomask, gpiodir;
4380
45eebda7
VK		 4381 snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
4382
62fe78e9
SR		 4383 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
4384 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 4385 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 4386
4387 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
4388 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 4389 gpiomask |= mask;
62fe78e9
SR		 4390
4391 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
4392 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 4393 gpiodir |= dir_mask;
62fe78e9 4394
76e1ddfb 4395 /* Configure GPIOx as CMOS */
62fe78e9
SR		 4396 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
4397
4398 snd_hda_codec_write(codec, codec->afg, 0,
4399 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 4400 snd_hda_codec_read(codec, codec->afg, 0,
4401 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 4402
4403 msleep(1);
4404
76e1ddfb
TI		 4405 snd_hda_codec_read(codec, codec->afg, 0,
4406 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 4407}
4408
3a93897e 4409static int stac_add_event(struct hda_codec *codec, hda_nid_t nid,
c6e4c666 4410 unsigned char type, int data)
74aeaabc 4411{
3a93897e 4412 struct hda_jack_tbl *event;
74aeaabc 4413
3a93897e 4414 event = snd_hda_jack_tbl_new(codec, nid);
74aeaabc
MR		 4415 if (!event)
4416 return -ENOMEM;
3a93897e
TI		 4417 event->action = type;
4418 event->private_data = data;
c6e4c666 4419
3a93897e 4420 return 0;
c6e4c666
TI		 4421}
4422
29adc4b9
DH		 4423static void handle_unsol_event(struct hda_codec *codec,
4424 struct hda_jack_tbl *event);
4425
62558ce1
TI		 4426/* check if given nid is a valid pin and no other events are assigned
4427 * to it. If OK, assign the event, set the unsol flag, and returns 1.
4428 * Otherwise, returns zero.
4429 */
4430static int enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
4431 unsigned int type)
c6e4c666 4432{
3a93897e 4433 struct hda_jack_tbl *event;
c6e4c666 4434
e35d9d6a 4435 if (!is_jack_detectable(codec, nid))
62558ce1 4436 return 0;
3a93897e
TI		 4437 event = snd_hda_jack_tbl_new(codec, nid);
4438 if (!event)
4439 return -ENOMEM;
4440 if (event->action && event->action != type)
4441 return 0;
4442 event->action = type;
29adc4b9 4443 event->callback = handle_unsol_event;
3a93897e 4444 snd_hda_jack_detect_enable(codec, nid, 0);
62558ce1 4445 return 1;
314634bc
TI		 4446}
4447
b4ead019 4448static int is_nid_out_jack_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
a64135a2
MR		 4449{
4450 int i;
4451 for (i = 0; i < cfg->hp_outs; i++)
4452 if (cfg->hp_pins[i] == nid)
4453 return 1; /* nid is a HP-Out */
b4ead019
TI		 4454 for (i = 0; i < cfg->line_outs; i++)
4455 if (cfg->line_out_pins[i] == nid)
4456 return 1; /* nid is a line-Out */
a64135a2
MR		 4457 return 0; /* nid is not a HP-Out */
4458};
4459
b76c850f
MR		 4460static void stac92xx_power_down(struct hda_codec *codec)
4461{
4462 struct sigmatel_spec *spec = codec->spec;
4463
4464 /* power down inactive DACs */
2b63536f 4465 const hda_nid_t *dac;
b76c850f 4466 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4467 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4468 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 4469 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4470}
4471
f73d3585
TI		 4472static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4473 int enable);
4474
bc759721
TI		 4475static inline bool get_int_hint(struct hda_codec *codec, const char *key,
4476 int *valp)
014c41fc 4477{
bc759721 4478 return !snd_hda_get_int_hint(codec, key, valp);
014c41fc
TI		 4479}
4480
6565e4fa
TI		 4481/* override some hints from the hwdep entry */
4482static void stac_store_hints(struct hda_codec *codec)
4483{
4484 struct sigmatel_spec *spec = codec->spec;
6565e4fa
TI		 4485 int val;
4486
4487 val = snd_hda_get_bool_hint(codec, "hp_detect");
4488 if (val >= 0)
4489 spec->hp_detect = val;
014c41fc 4490 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
6565e4fa
TI		 4491 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
4492 spec->gpio_mask;
4493 }
014c41fc
TI		 4494 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
4495 spec->gpio_mask &= spec->gpio_mask;
4496 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
4497 spec->gpio_dir &= spec->gpio_mask;
4498 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
4499 spec->eapd_mask &= spec->gpio_mask;
4500 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
4501 spec->gpio_mute &= spec->gpio_mask;
6565e4fa
TI		 4502 val = snd_hda_get_bool_hint(codec, "eapd_switch");
4503 if (val >= 0)
4504 spec->eapd_switch = val;
4505}
4506
f2cbba76
TI		 4507static void stac_issue_unsol_events(struct hda_codec *codec, int num_pins,
4508 const hda_nid_t *pins)
4509{
4510 while (num_pins--)
4511 stac_issue_unsol_event(codec, *pins++);
4512}
4513
4514/* fake event to set up pins */
4515static void stac_fake_hp_events(struct hda_codec *codec)
4516{
4517 struct sigmatel_spec *spec = codec->spec;
4518
4519 if (spec->autocfg.hp_outs)
4520 stac_issue_unsol_events(codec, spec->autocfg.hp_outs,
4521 spec->autocfg.hp_pins);
4522 if (spec->autocfg.line_outs &&
4523 spec->autocfg.line_out_pins[0] != spec->autocfg.hp_pins[0])
4524 stac_issue_unsol_events(codec, spec->autocfg.line_outs,
4525 spec->autocfg.line_out_pins);
4526}
4527
c7d4b2fa
M		 4528static int stac92xx_init(struct hda_codec *codec)
4529{
4530 struct sigmatel_spec *spec = codec->spec;
82bc955f 4531 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4532 unsigned int gpio;
e4973e1e 4533 int i;
c7d4b2fa 4534
5e68fb3c
DH		 4535 if (spec->init)
4536 snd_hda_sequence_write(codec, spec->init);
c7d4b2fa 4537
d39a3ae8
TI		 4538 snd_hda_apply_verbs(codec);
4539
8daaaa97
MR		 4540 /* power down adcs initially */
4541 if (spec->powerdown_adcs)
4542 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4543 snd_hda_codec_write(codec,
8daaaa97
MR		 4544 spec->adc_nids[i], 0,
4545 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4546
6565e4fa
TI		 4547 /* override some hints */
4548 stac_store_hints(codec);
4549
f73d3585
TI		 4550 /* set up GPIO */
4551 gpio = spec->gpio_data;
4552 /* turn on EAPD statically when spec->eapd_switch isn't set.
4553 * otherwise, unsol event will turn it on/off dynamically
4554 */
4555 if (!spec->eapd_switch)
4556 gpio |= spec->eapd_mask;
4557 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4558
82bc955f
TI		 4559 /* set up pins */
4560 if (spec->hp_detect) {
505cb341 4561 /* Enable unsolicited responses on the HP widget */
74aeaabc 4562 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4563 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4564 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4565 }
1c4bdf9b
TI		 4566 if (cfg->line_out_type == AUTO_PIN_LINE_OUT &&
4567 cfg->speaker_outs > 0) {
fefd67f3 4568 /* enable pin-detect for line-outs as well */
15cfa2b3
TI		 4569 for (i = 0; i < cfg->line_outs; i++) {
4570 hda_nid_t nid = cfg->line_out_pins[i];
fefd67f3
TI		 4571 enable_pin_detect(codec, nid, STAC_LO_EVENT);
4572 }
4573 }
4574
0a07acaf
TI		 4575 /* force to enable the first line-out; the others are set up
4576 * in unsol_event
4577 */
4578 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4579 AC_PINCTL_OUT_EN);
82bc955f 4580 /* fake event to set up pins */
f2cbba76 4581 stac_fake_hp_events(codec);
82bc955f
TI		 4582 } else {
4583 stac92xx_auto_init_multi_out(codec);
4584 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 4585 for (i = 0; i < cfg->hp_outs; i++)
4586 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f 4587 }
3d21d3f7 4588 if (spec->auto_mic) {
15b4f296 4589 /* initialize connection to analog input */
da2a2aaa
TI		 4590 if (spec->dmux_nids)
4591 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
15b4f296 4592 AC_VERB_SET_CONNECT_SEL, 0);
3d21d3f7
TI		 4593 if (enable_pin_detect(codec, spec->ext_mic.pin, STAC_MIC_EVENT))
4594 stac_issue_unsol_event(codec, spec->ext_mic.pin);
9907790a
CC		 4595 if (enable_pin_detect(codec, spec->dock_mic.pin,
4596 STAC_MIC_EVENT))
4597 stac_issue_unsol_event(codec, spec->dock_mic.pin);
3d21d3f7 4598 }
eea7dc93
TI		 4599 for (i = 0; i < cfg->num_inputs; i++) {
4600 hda_nid_t nid = cfg->inputs[i].pin;
4601 int type = cfg->inputs[i].type;
4602 unsigned int pinctl, conf;
86e2959a 4603 if (type == AUTO_PIN_MIC) {
eea7dc93 4604 /* for mic pins, force to initialize */
4740860b 4605 pinctl = snd_hda_get_default_vref(codec, nid);
eea7dc93
TI		 4606 pinctl |= AC_PINCTL_IN_EN;
4607 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4608 } else {
4609 pinctl = snd_hda_codec_read(codec, nid, 0,
4610 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4611 /* if PINCTL already set then skip */
4612 /* Also, if both INPUT and OUTPUT are set,
4613 * it must be a BIOS bug; need to override, too
4614 */
4615 if (!(pinctl & AC_PINCTL_IN_EN) ||
4616 (pinctl & AC_PINCTL_OUT_EN)) {
4617 pinctl &= ~AC_PINCTL_OUT_EN;
12dde4c6
TI		 4618 pinctl |= AC_PINCTL_IN_EN;
4619 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3 4620 }
c960a03b 4621 }
eea7dc93
TI		 4622 conf = snd_hda_codec_get_pincfg(codec, nid);
4623 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4624 if (enable_pin_detect(codec, nid, STAC_INSERT_EVENT))
4625 stac_issue_unsol_event(codec, nid);
4626 }
82bc955f 4627 }
a64135a2
MR		 4628 for (i = 0; i < spec->num_dmics; i++)
4629 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4630 AC_PINCTL_IN_EN);
0852d7a6
TI		 4631 if (cfg->dig_out_pins[0])
4632 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI		 4633 AC_PINCTL_OUT_EN);
4634 if (cfg->dig_in_pin)
4635 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4636 AC_PINCTL_IN_EN);
a64135a2 4637 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585 4638 hda_nid_t nid = spec->pwr_nids[i];
6e1c39c6 4639 unsigned int pinctl, def_conf;
f73d3585 4640
bfc89dec
TI		 4641 def_conf = snd_hda_codec_get_pincfg(codec, nid);
4642 def_conf = get_defcfg_connect(def_conf);
4643 if (def_conf == AC_JACK_PORT_NONE) {
4644 /* power off unused ports */
4645 stac_toggle_power_map(codec, nid, 0);
4646 continue;
4647 }
6e1c39c6
TI		 4648 if (def_conf == AC_JACK_PORT_FIXED) {
4649 /* no need for jack detection for fixed pins */
4650 stac_toggle_power_map(codec, nid, 1);
4651 continue;
4652 }
eb632128 4653 /* power on when no jack detection is available */
542c9a0a
TI		 4654 /* or when the VREF is used for controlling LED */
4655 if (!spec->hp_detect ||
bfc89dec
TI		 4656 spec->vref_mute_led_nid == nid ||
4657 !is_jack_detectable(codec, nid)) {
eb632128
TI		 4658 stac_toggle_power_map(codec, nid, 1);
4659 continue;
4660 }
4661
b4ead019 4662 if (is_nid_out_jack_pin(cfg, nid))
f73d3585
TI		 4663 continue; /* already has an unsol event */
4664
4665 pinctl = snd_hda_codec_read(codec, nid, 0,
4666 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4667 /* outputs are only ports capable of power management
4668 * any attempts on powering down a input port cause the
4669 * referenced VREF to act quirky.
4670 */
eb632128
TI		 4671 if (pinctl & AC_PINCTL_IN_EN) {
4672 stac_toggle_power_map(codec, nid, 1);
a64135a2 4673 continue;
eb632128 4674 }
afef2cfa 4675 if (enable_pin_detect(codec, nid, STAC_PWR_EVENT)) {
62558ce1 4676 stac_issue_unsol_event(codec, nid);
afef2cfa
CC		 4677 continue;
4678 }
4679 /* none of the above, turn the port OFF */
4680 stac_toggle_power_map(codec, nid, 0);
a64135a2 4681 }
c21bd025 4682
c21bd025 4683 /* sync mute LED */
1f43f6c1
TI		 4684 if (spec->gpio_led) {
4685 if (spec->vmaster_mute.hook)
4686 snd_hda_sync_vmaster_hook(&spec->vmaster_mute);
4687 else /* the very first init call doesn't have vmaster yet */
4688 stac92xx_update_led_status(codec, false);
4689 }
c882246d
TI		 4690
4691 /* sync the power-map */
4692 if (spec->num_pwrs)
4693 snd_hda_codec_write(codec, codec->afg, 0,
4694 AC_VERB_IDT_SET_POWER_MAP,
4695 spec->power_map_bits);
b76c850f
MR		 4696 if (spec->dac_list)
4697 stac92xx_power_down(codec);
c7d4b2fa
M		 4698 return 0;
4699}
4700
603c4019
TI		 4701static void stac92xx_free_kctls(struct hda_codec *codec)
4702{
4703 struct sigmatel_spec *spec = codec->spec;
4704
4705 if (spec->kctls.list) {
4706 struct snd_kcontrol_new *kctl = spec->kctls.list;
4707 int i;
4708 for (i = 0; i < spec->kctls.used; i++)
4709 kfree(kctl[i].name);
4710 }
4711 snd_array_free(&spec->kctls);
4712}
4713
45eebda7
VK		 4714static void stac92xx_shutup_pins(struct hda_codec *codec)
4715{
4716 unsigned int i, def_conf;
4717
4718 if (codec->bus->shutdown)
4719 return;
4720 for (i = 0; i < codec->init_pins.used; i++) {
4721 struct hda_pincfg *pin = snd_array_elem(&codec->init_pins, i);
4722 def_conf = snd_hda_codec_get_pincfg(codec, pin->nid);
4723 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE)
cdd03ced 4724 snd_hda_set_pin_ctl(codec, pin->nid, 0);
45eebda7
VK		 4725 }
4726}
4727
167eae5a
TI		 4728static void stac92xx_shutup(struct hda_codec *codec)
4729{
4730 struct sigmatel_spec *spec = codec->spec;
167eae5a 4731
45eebda7 4732 stac92xx_shutup_pins(codec);
167eae5a
TI		 4733
4734 if (spec->eapd_mask)
4735 stac_gpio_set(codec, spec->gpio_mask,
4736 spec->gpio_dir, spec->gpio_data &
4737 ~spec->eapd_mask);
4738}
4739
2f2f4251
M		 4740static void stac92xx_free(struct hda_codec *codec)
4741{
c7d4b2fa 4742 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4743
4744 if (! spec)
4745 return;
4746
c7d4b2fa 4747 kfree(spec);
1cd2224c 4748 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4749}
4750
4e55096e
M		 4751static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4752 unsigned int flag)
4753{
8ce84198
TI		 4754 unsigned int old_ctl, pin_ctl;
4755
4756 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4757 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4758
f9acba43
TI		 4759 if (pin_ctl & AC_PINCTL_IN_EN) {
4760 /*
4761 * we need to check the current set-up direction of
4762 * shared input pins since they can be switched via
4763 * "xxx as Output" mixer switch
4764 */
4765 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4766 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4767 return;
4768 }
4769
8ce84198 4770 old_ctl = pin_ctl;
7b043899
SL		 4771 /* if setting pin direction bits, clear the current
4772 direction bits first */
4773 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4774 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4775
8ce84198
TI		 4776 pin_ctl |= flag;
4777 if (old_ctl != pin_ctl)
cdd03ced 4778 snd_hda_set_pin_ctl_cache(codec, nid, pin_ctl);
4e55096e
M		 4779}
4780
4781static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4782 unsigned int flag)
4783{
4784 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4785 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198 4786 if (pin_ctl & flag)
cdd03ced 4787 snd_hda_set_pin_ctl_cache(codec, nid, pin_ctl & ~flag);
4e55096e
M		 4788}
4789
d56757ab 4790static inline int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4791{
4792 if (!nid)
4793 return 0;
a252c81a 4794 return snd_hda_jack_detect(codec, nid);
314634bc
TI		 4795}
4796
fefd67f3
TI		 4797static void stac92xx_line_out_detect(struct hda_codec *codec,
4798 int presence)
4799{
4800 struct sigmatel_spec *spec = codec->spec;
4801 struct auto_pin_cfg *cfg = &spec->autocfg;
4802 int i;
4803
042b92c1
DH		 4804 if (cfg->speaker_outs == 0)
4805 return;
4806
fefd67f3
TI		 4807 for (i = 0; i < cfg->line_outs; i++) {
4808 if (presence)
4809 break;
4810 presence = get_pin_presence(codec, cfg->line_out_pins[i]);
4811 if (presence) {
4812 unsigned int pinctl;
4813 pinctl = snd_hda_codec_read(codec,
4814 cfg->line_out_pins[i], 0,
4815 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4816 if (pinctl & AC_PINCTL_IN_EN)
4817 presence = 0; /* mic- or line-input */
4818 }
4819 }
4820
4821 if (presence) {
4822 /* disable speakers */
4823 for (i = 0; i < cfg->speaker_outs; i++)
4824 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4825 AC_PINCTL_OUT_EN);
4826 if (spec->eapd_mask && spec->eapd_switch)
4827 stac_gpio_set(codec, spec->gpio_mask,
4828 spec->gpio_dir, spec->gpio_data &
4829 ~spec->eapd_mask);
4830 } else {
4831 /* enable speakers */
4832 for (i = 0; i < cfg->speaker_outs; i++)
4833 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4834 AC_PINCTL_OUT_EN);
4835 if (spec->eapd_mask && spec->eapd_switch)
4836 stac_gpio_set(codec, spec->gpio_mask,
4837 spec->gpio_dir, spec->gpio_data |
4838 spec->eapd_mask);
4839 }
4840}
4841
d7a89436
TI		 4842/* return non-zero if the hp-pin of the given array index isn't
4843 * a jack-detection target
4844 */
4845static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4846{
4847 struct auto_pin_cfg *cfg = &spec->autocfg;
4848
4849 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4850 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4851 return 1;
c21ca4a8 4852 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4853 return 1;
4854 /* ignore if the pin is set as line-out */
4855 if (cfg->hp_pins[i] == spec->hp_switch)
4856 return 1;
4857 return 0;
4858}
4859
c6e4c666 4860static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4861{
4862 struct sigmatel_spec *spec = codec->spec;
4863 struct auto_pin_cfg *cfg = &spec->autocfg;
4864 int i, presence;
4865
eb06ed8f 4866 presence = 0;
4fe5195c
MR		 4867 if (spec->gpio_mute)
4868 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4869 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4870
eb06ed8f 4871 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4872 if (presence)
4873 break;
d7a89436
TI		 4874 if (no_hp_sensing(spec, i))
4875 continue;
e6e3ea25
TI		 4876 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4877 if (presence) {
4878 unsigned int pinctl;
4879 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4880 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4881 if (pinctl & AC_PINCTL_IN_EN)
4882 presence = 0; /* mic- or line-input */
4883 }
eb06ed8f 4884 }
4e55096e
M		 4885
4886 if (presence) {
d7a89436 4887 /* disable lineouts */
7c2ba97b 4888 if (spec->hp_switch)
d7a89436
TI		 4889 stac92xx_reset_pinctl(codec, spec->hp_switch,
4890 AC_PINCTL_OUT_EN);
4e55096e
M		 4891 for (i = 0; i < cfg->line_outs; i++)
4892 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4893 AC_PINCTL_OUT_EN);
4e55096e 4894 } else {
d7a89436 4895 /* enable lineouts */
7c2ba97b 4896 if (spec->hp_switch)
d7a89436
TI		 4897 stac92xx_set_pinctl(codec, spec->hp_switch,
4898 AC_PINCTL_OUT_EN);
4e55096e
M		 4899 for (i = 0; i < cfg->line_outs; i++)
4900 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4901 AC_PINCTL_OUT_EN);
4e55096e 4902 }
fefd67f3 4903 stac92xx_line_out_detect(codec, presence);
d7a89436
TI		 4904 /* toggle hp outs */
4905 for (i = 0; i < cfg->hp_outs; i++) {
4906 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4907 if (no_hp_sensing(spec, i))
4908 continue;
7bff172a 4909 if (1 /*presence*/)
d7a89436 4910 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4911#if 0 /* FIXME */
4912/* Resetting the pinctl like below may lead to (a sort of) regressions
4913 * on some devices since they use the HP pin actually for line/speaker
4914 * outs although the default pin config shows a different pin (that is
4915 * wrong and useless).
4916 *
4917 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4918 * But, disabling the code below just works around it, and I'm too tired of
4919 * bug reports with such devices...
4920 */
d7a89436
TI		 4921 else
4922 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4923#endif /* FIXME */
d7a89436 4924 }
4e55096e
M		 4925}
4926
f73d3585
TI		 4927static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4928 int enable)
a64135a2
MR		 4929{
4930 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4931 unsigned int idx, val;
4932
4933 for (idx = 0; idx < spec->num_pwrs; idx++) {
4934 if (spec->pwr_nids[idx] == nid)
4935 break;
4936 }
4937 if (idx >= spec->num_pwrs)
4938 return;
d0513fc6 4939
afef2cfa 4940 idx = 1 << idx;
a64135a2 4941
c882246d 4942 val = spec->power_map_bits;
f73d3585 4943 if (enable)
a64135a2
MR		 4944 val &= ~idx;
4945 else
4946 val |= idx;
4947
4948 /* power down unused output ports */
c882246d
TI		 4949 if (val != spec->power_map_bits) {
4950 spec->power_map_bits = val;
4951 snd_hda_codec_write(codec, codec->afg, 0,
4952 AC_VERB_IDT_SET_POWER_MAP, val);
4953 }
74aeaabc
MR		 4954}
4955
f73d3585
TI		 4956static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4957{
e6e3ea25 4958 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4959}
a64135a2 4960
ab5a6ebe
VK		 4961/* get the pin connection (fixed, none, etc) */
4962static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
4963{
4964 struct sigmatel_spec *spec = codec->spec;
4965 unsigned int cfg;
4966
4967 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
4968 return get_defcfg_connect(cfg);
4969}
4970
4971static int stac92xx_connected_ports(struct hda_codec *codec,
2b63536f 4972 const hda_nid_t *nids, int num_nids)
ab5a6ebe
VK		 4973{
4974 struct sigmatel_spec *spec = codec->spec;
4975 int idx, num;
4976 unsigned int def_conf;
4977
4978 for (num = 0; num < num_nids; num++) {
4979 for (idx = 0; idx < spec->num_pins; idx++)
4980 if (spec->pin_nids[idx] == nids[num])
4981 break;
4982 if (idx >= spec->num_pins)
4983 break;
4984 def_conf = stac_get_defcfg_connect(codec, idx);
4985 if (def_conf == AC_JACK_PORT_NONE)
4986 break;
4987 }
4988 return num;
4989}
4990
3d21d3f7
TI		 4991static void stac92xx_mic_detect(struct hda_codec *codec)
4992{
4993 struct sigmatel_spec *spec = codec->spec;
4994 struct sigmatel_mic_route *mic;
4995
4996 if (get_pin_presence(codec, spec->ext_mic.pin))
4997 mic = &spec->ext_mic;
9907790a
CC		 4998 else if (get_pin_presence(codec, spec->dock_mic.pin))
4999 mic = &spec->dock_mic;
3d21d3f7
TI		 5000 else
5001 mic = &spec->int_mic;
02d33322 5002 if (mic->dmux_idx >= 0)
3d21d3f7
TI		 5003 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
5004 AC_VERB_SET_CONNECT_SEL,
5005 mic->dmux_idx);
02d33322 5006 if (mic->mux_idx >= 0)
3d21d3f7
TI		 5007 snd_hda_codec_write_cache(codec, spec->mux_nids[0], 0,
5008 AC_VERB_SET_CONNECT_SEL,
5009 mic->mux_idx);
5010}
5011
1835a0f9 5012static void handle_unsol_event(struct hda_codec *codec,
3a93897e 5013 struct hda_jack_tbl *event)
314634bc 5014{
a64135a2 5015 struct sigmatel_spec *spec = codec->spec;
1835a0f9 5016 int data;
c6e4c666 5017
3a93897e 5018 switch (event->action) {
314634bc 5019 case STAC_HP_EVENT:
fefd67f3 5020 case STAC_LO_EVENT:
16ffe32c 5021 stac92xx_hp_detect(codec);
fefd67f3 5022 break;
3d21d3f7
TI		 5023 case STAC_MIC_EVENT:
5024 stac92xx_mic_detect(codec);
5025 break;
5026 }
5027
3a93897e 5028 switch (event->action) {
3d21d3f7 5029 case STAC_HP_EVENT:
fefd67f3 5030 case STAC_LO_EVENT:
3d21d3f7 5031 case STAC_MIC_EVENT:
74aeaabc 5032 case STAC_INSERT_EVENT:
a64135a2 5033 case STAC_PWR_EVENT:
c6e4c666
TI		 5034 if (spec->num_pwrs > 0)
5035 stac92xx_pin_sense(codec, event->nid);
fd60cc89
MR		 5036
5037 switch (codec->subsystem_id) {
5038 case 0x103c308f:
5039 if (event->nid == 0xb) {
5040 int pin = AC_PINCTL_IN_EN;
5041
5042 if (get_pin_presence(codec, 0xa)
5043 && get_pin_presence(codec, 0xb))
5044 pin |= AC_PINCTL_VREF_80;
5045 if (!get_pin_presence(codec, 0xb))
5046 pin |= AC_PINCTL_VREF_80;
5047
5048 /* toggle VREF state based on mic + hp pin
5049 * status
5050 */
5051 stac92xx_auto_set_pinctl(codec, 0x0a, pin);
5052 }
5053 }
72474be6 5054 break;
c6e4c666
TI		 5055 case STAC_VREF_EVENT:
5056 data = snd_hda_codec_read(codec, codec->afg, 0,
5057 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 5058 /* toggle VREF state based on GPIOx status */
5059 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
3a93897e 5060 !!(data & (1 << event->private_data)));
72474be6 5061 break;
314634bc
TI		 5062 }
5063}
5064
1835a0f9
TI		 5065static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid)
5066{
3a93897e 5067 struct hda_jack_tbl *event = snd_hda_jack_tbl_get(codec, nid);
1835a0f9
TI		 5068 if (!event)
5069 return;
5070 handle_unsol_event(codec, event);
5071}
5072
d38cce70
KG		 5073static int hp_blike_system(u32 subsystem_id);
5074
5075static void set_hp_led_gpio(struct hda_codec *codec)
5076{
5077 struct sigmatel_spec *spec = codec->spec;
07f80449
TI		 5078 unsigned int gpio;
5079
26ebe0a2
TI		 5080 if (spec->gpio_led)
5081 return;
5082
07f80449
TI		 5083 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
5084 gpio &= AC_GPIO_IO_COUNT;
5085 if (gpio > 3)
5086 spec->gpio_led = 0x08; /* GPIO 3 */
5087 else
5088 spec->gpio_led = 0x01; /* GPIO 0 */
d38cce70
KG		 5089}
5090
c357aab0
VK		 5091/*
5092 * This method searches for the mute LED GPIO configuration
5093 * provided as OEM string in SMBIOS. The format of that string
5094 * is HP_Mute_LED_P_G or HP_Mute_LED_P
5095 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
5096 * that corresponds to the NOT muted state of the master volume
5097 * and G is the index of the GPIO to use as the mute LED control (0..9)
5098 * If _G portion is missing it is assigned based on the codec ID
5099 *
5100 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
5101 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
d38cce70
KG		 5102 *
5103 *
5104 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
5105 * SMBIOS - at least the ones I have seen do not have them - which include
5106 * my own system (HP Pavilion dv6-1110ax) and my cousin's
5107 * HP Pavilion dv9500t CTO.
5108 * Need more information on whether it is true across the entire series.
5109 * -- kunal
c357aab0 5110 */
6a557c94 5111static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
c357aab0
VK		 5112{
5113 struct sigmatel_spec *spec = codec->spec;
5114 const struct dmi_device *dev = NULL;
5115
7560931f
TI		 5116 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
5117 get_int_hint(codec, "gpio_led_polarity",
5118 &spec->gpio_led_polarity);
5119 return 1;
5120 }
c357aab0
VK		 5121 if ((codec->subsystem_id >> 16) == PCI_VENDOR_ID_HP) {
5122 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING,
5123 NULL, dev))) {
45eebda7 5124 if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
d38cce70
KG		 5125 &spec->gpio_led_polarity,
5126 &spec->gpio_led) == 2) {
f1a73746
TI		 5127 unsigned int max_gpio;
5128 max_gpio = snd_hda_param_read(codec, codec->afg,
5129 AC_PAR_GPIO_CAP);
5130 max_gpio &= AC_GPIO_IO_COUNT;
5131 if (spec->gpio_led < max_gpio)
45eebda7 5132 spec->gpio_led = 1 << spec->gpio_led;
f1a73746
TI		 5133 else
5134 spec->vref_mute_led_nid = spec->gpio_led;
c357aab0
VK		 5135 return 1;
5136 }
5137 if (sscanf(dev->name, "HP_Mute_LED_%d",
d38cce70
KG		 5138 &spec->gpio_led_polarity) == 1) {
5139 set_hp_led_gpio(codec);
5140 return 1;
c357aab0 5141 }
e2ef36c6
GMDV		 5142 /* BIOS bug: unfilled OEM string */
5143 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
5144 set_hp_led_gpio(codec);
a6a600d1
GMDV		 5145 switch (codec->subsystem_id) {
5146 case 0x103c148a:
5147 spec->gpio_led_polarity = 0;
5148 break;
5149 default:
5150 spec->gpio_led_polarity = 1;
5151 break;
5152 }
e2ef36c6
GMDV		 5153 return 1;
5154 }
c357aab0 5155 }
d38cce70
KG		 5156
5157 /*
5158 * Fallback case - if we don't find the DMI strings,
6a557c94
VK		 5159 * we statically set the GPIO - if not a B-series system
5160 * and default polarity is provided
d38cce70 5161 */
6a557c94
VK		 5162 if (!hp_blike_system(codec->subsystem_id) &&
5163 (default_polarity == 0 || default_polarity == 1)) {
d38cce70 5164 set_hp_led_gpio(codec);
dce17d4f 5165 spec->gpio_led_polarity = default_polarity;
d38cce70
KG		 5166 return 1;
5167 }
c357aab0
VK		 5168 }
5169 return 0;
5170}
5171
5172static int hp_blike_system(u32 subsystem_id)
78987bdc
RD		 5173{
5174 switch (subsystem_id) {
c357aab0
VK		 5175 case 0x103c1520:
5176 case 0x103c1521:
5177 case 0x103c1523:
5178 case 0x103c1524:
5179 case 0x103c1525:
78987bdc
RD		 5180 case 0x103c1722:
5181 case 0x103c1723:
5182 case 0x103c1724:
5183 case 0x103c1725:
5184 case 0x103c1726:
5185 case 0x103c1727:
5186 case 0x103c1728:
5187 case 0x103c1729:
c357aab0
VK		 5188 case 0x103c172a:
5189 case 0x103c172b:
5190 case 0x103c307e:
5191 case 0x103c307f:
5192 case 0x103c3080:
5193 case 0x103c3081:
5194 case 0x103c7007:
5195 case 0x103c7008:
78987bdc
RD		 5196 return 1;
5197 }
5198 return 0;
5199}
5200
2d34e1b3
TI		 5201#ifdef CONFIG_PROC_FS
5202static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
5203 struct hda_codec *codec, hda_nid_t nid)
5204{
5205 if (nid == codec->afg)
5206 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
c882246d
TI		 5207 snd_hda_codec_read(codec, nid, 0,
5208 AC_VERB_IDT_GET_POWER_MAP, 0));
2d34e1b3
TI		 5209}
5210
5211static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
5212 struct hda_codec *codec,
5213 unsigned int verb)
5214{
5215 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
5216 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
5217}
5218
5219/* stac92hd71bxx, stac92hd73xx */
5220static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
5221 struct hda_codec *codec, hda_nid_t nid)
5222{
5223 stac92hd_proc_hook(buffer, codec, nid);
5224 if (nid == codec->afg)
5225 analog_loop_proc_hook(buffer, codec, 0xfa0);
5226}
5227
5228static void stac9205_proc_hook(struct snd_info_buffer *buffer,
5229 struct hda_codec *codec, hda_nid_t nid)
5230{
5231 if (nid == codec->afg)
5232 analog_loop_proc_hook(buffer, codec, 0xfe0);
5233}
5234
5235static void stac927x_proc_hook(struct snd_info_buffer *buffer,
5236 struct hda_codec *codec, hda_nid_t nid)
5237{
5238 if (nid == codec->afg)
5239 analog_loop_proc_hook(buffer, codec, 0xfeb);
5240}
5241#else
5242#define stac92hd_proc_hook NULL
5243#define stac92hd7x_proc_hook NULL
5244#define stac9205_proc_hook NULL
5245#define stac927x_proc_hook NULL
5246#endif
5247
2a43952a 5248#ifdef CONFIG_PM
ff6fdc37
M		 5249static int stac92xx_resume(struct hda_codec *codec)
5250{
2c885878 5251 stac92xx_init(codec);
82beb8fd
TI		 5252 snd_hda_codec_resume_amp(codec);
5253 snd_hda_codec_resume_cache(codec);
2c885878 5254 /* fake event to set up pins again to override cached values */
f2cbba76 5255 stac_fake_hp_events(codec);
ff6fdc37
M		 5256 return 0;
5257}
c6798d2b 5258
68cb2b55 5259static int stac92xx_suspend(struct hda_codec *codec)
45eebda7
VK		 5260{
5261 stac92xx_shutup(codec);
5262 return 0;
5263}
5264
45eebda7
VK		 5265static void stac92xx_set_power_state(struct hda_codec *codec, hda_nid_t fg,
5266 unsigned int power_state)
5267{
5268 unsigned int afg_power_state = power_state;
5269 struct sigmatel_spec *spec = codec->spec;
5270
5271 if (power_state == AC_PWRST_D3) {
f1a73746 5272 if (spec->vref_mute_led_nid) {
45eebda7
VK		 5273 /* with vref-out pin used for mute led control
5274 * codec AFG is prevented from D3 state
5275 */
5276 afg_power_state = AC_PWRST_D1;
5277 }
5278 /* this delay seems necessary to avoid click noise at power-down */
5279 msleep(100);
5280 }
5281 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
5282 afg_power_state);
5283 snd_hda_codec_set_power_to_all(codec, fg, power_state, true);
5284}
350eba43
TI		 5285#else
5286#define stac92xx_suspend NULL
5287#define stac92xx_resume NULL
350eba43 5288#define stac92xx_set_power_state NULL
2faa3bf1 5289#endif /* CONFIG_PM */
45eebda7 5290
2faa3bf1
TI		 5291/* update mute-LED accoring to the master switch */
5292static void stac92xx_update_led_status(struct hda_codec *codec, int enabled)
ae6241fb
CP		 5293{
5294 struct sigmatel_spec *spec = codec->spec;
2faa3bf1 5295 int muted = !enabled;
6fce61ae 5296
45eebda7 5297 if (!spec->gpio_led)
2faa3bf1
TI		 5298 return;
5299
5300 /* LED state is inverted on these systems */
5301 if (spec->gpio_led_polarity)
5302 muted = !muted;
45eebda7 5303
f1a73746 5304 if (!spec->vref_mute_led_nid) {
45eebda7 5305 if (muted)
3e843196 5306 spec->gpio_data |= spec->gpio_led;
45eebda7 5307 else
3e843196 5308 spec->gpio_data &= ~spec->gpio_led;
45eebda7
VK		 5309 stac_gpio_set(codec, spec->gpio_mask,
5310 spec->gpio_dir, spec->gpio_data);
5311 } else {
2faa3bf1 5312 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
f1a73746
TI		 5313 stac_vrefout_set(codec, spec->vref_mute_led_nid,
5314 spec->vref_led);
c21bd025 5315 }
b4e81876 5316}
7df1ce1a 5317
2b63536f 5318static const struct hda_codec_ops stac92xx_patch_ops = {
2f2f4251
M		 5319 .build_controls = stac92xx_build_controls,
5320 .build_pcms = stac92xx_build_pcms,
5321 .init = stac92xx_init,
5322 .free = stac92xx_free,
29adc4b9 5323 .unsol_event = snd_hda_jack_unsol_event,
2a43952a 5324#ifdef CONFIG_PM
c6798d2b 5325 .suspend = stac92xx_suspend,
ff6fdc37
M		 5326 .resume = stac92xx_resume,
5327#endif
fb8d1a34 5328 .reboot_notify = stac92xx_shutup,
2f2f4251
M		 5329};
5330
361dab3e
TI		 5331static int alloc_stac_spec(struct hda_codec *codec, int num_pins,
5332 const hda_nid_t *pin_nids)
5333{
5334 struct sigmatel_spec *spec;
5335
5336 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5337 if (!spec)
5338 return -ENOMEM;
5339 codec->spec = spec;
5340 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
5341 spec->num_pins = num_pins;
5342 spec->pin_nids = pin_nids;
5343 snd_array_init(&spec->kctls, sizeof(struct snd_kcontrol_new), 32);
5344 return 0;
5345}
5346
2f2f4251
M		 5347static int patch_stac9200(struct hda_codec *codec)
5348{
5349 struct sigmatel_spec *spec;
c7d4b2fa 5350 int err;
2f2f4251 5351
361dab3e
TI		 5352 err = alloc_stac_spec(codec, ARRAY_SIZE(stac9200_pin_nids),
5353 stac9200_pin_nids);
5354 if (err < 0)
5355 return err;
2f2f4251 5356
361dab3e 5357 spec = codec->spec;
1b0e372d 5358 spec->linear_tone_beep = 1;
d39a3ae8
TI		 5359
5360 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
5361 stac9200_fixups);
2f2f4251
M		 5362
5363 spec->multiout.max_channels = 2;
5364 spec->multiout.num_dacs = 1;
5365 spec->multiout.dac_nids = stac9200_dac_nids;
5366 spec->adc_nids = stac9200_adc_nids;
5367 spec->mux_nids = stac9200_mux_nids;
dabbed6f 5368 spec->num_muxes = 1;
8b65727b 5369 spec->num_dmics = 0;
9e05b7a3 5370 spec->num_adcs = 1;
a64135a2 5371 spec->num_pwrs = 0;
d39a3ae8 5372 snd_hda_add_verbs(codec, stac9200_eapd_init);
c7d4b2fa 5373
2f2f4251 5374 spec->mixer = stac9200_mixer;
c7d4b2fa 5375
d39a3ae8 5376 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
117f257d 5377
c7d4b2fa
M		 5378 err = stac9200_parse_auto_config(codec);
5379 if (err < 0) {
5380 stac92xx_free(codec);
5381 return err;
5382 }
2f2f4251
M		 5383
5384 codec->patch_ops = stac92xx_patch_ops;
5385
d39a3ae8
TI		 5386 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
5387
2f2f4251
M		 5388 return 0;
5389}
5390
8e21c34c
TD		 5391static int patch_stac925x(struct hda_codec *codec)
5392{
5393 struct sigmatel_spec *spec;
5394 int err;
5395
361dab3e
TI		 5396 err = alloc_stac_spec(codec, ARRAY_SIZE(stac925x_pin_nids),
5397 stac925x_pin_nids);
5398 if (err < 0)
5399 return err;
8e21c34c 5400
361dab3e 5401 spec = codec->spec;
1b0e372d 5402 spec->linear_tone_beep = 1;
9cb36c2a
MCC		 5403
5404 /* Check first for codec ID */
5405 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
5406 STAC_925x_MODELS,
5407 stac925x_models,
5408 stac925x_codec_id_cfg_tbl);
5409
5410 /* Now checks for PCI ID, if codec ID is not found */
5411 if (spec->board_config < 0)
5412 spec->board_config = snd_hda_check_board_config(codec,
5413 STAC_925x_MODELS,
8e21c34c
TD		 5414 stac925x_models,
5415 stac925x_cfg_tbl);
9e507abd 5416 again:
330ee995 5417 if (spec->board_config < 0)
9a11f1aa
TI		 5418 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5419 codec->chip_name);
330ee995
TI		 5420 else
5421 stac92xx_set_config_regs(codec,
af9f341a 5422 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD		 5423
5424 spec->multiout.max_channels = 2;
5425 spec->multiout.num_dacs = 1;
5426 spec->multiout.dac_nids = stac925x_dac_nids;
5427 spec->adc_nids = stac925x_adc_nids;
5428 spec->mux_nids = stac925x_mux_nids;
5429 spec->num_muxes = 1;
9e05b7a3 5430 spec->num_adcs = 1;
a64135a2 5431 spec->num_pwrs = 0;
2c11f955
TD		 5432 switch (codec->vendor_id) {
5433 case 0x83847632: /* STAC9202 */
5434 case 0x83847633: /* STAC9202D */
5435 case 0x83847636: /* STAC9251 */
5436 case 0x83847637: /* STAC9251D */
f6e9852a 5437 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 5438 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 5439 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
5440 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 5441 break;
5442 default:
5443 spec->num_dmics = 0;
5444 break;
5445 }
8e21c34c
TD		 5446
5447 spec->init = stac925x_core_init;
5448 spec->mixer = stac925x_mixer;
6479c631
TI		 5449 spec->num_caps = 1;
5450 spec->capvols = stac925x_capvols;
5451 spec->capsws = stac925x_capsws;
8e21c34c 5452
9009b0e4 5453 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 5454 if (!err) {
5455 if (spec->board_config < 0) {
5456 printk(KERN_WARNING "hda_codec: No auto-config is "
5457 "available, default to model=ref\n");
5458 spec->board_config = STAC_925x_REF;
5459 goto again;
5460 }
5461 err = -EINVAL;
5462 }
8e21c34c
TD		 5463 if (err < 0) {
5464 stac92xx_free(codec);
5465 return err;
5466 }
5467
5468 codec->patch_ops = stac92xx_patch_ops;
5469
5470 return 0;
5471}
5472
e1f0d669
MR		 5473static int patch_stac92hd73xx(struct hda_codec *codec)
5474{
5475 struct sigmatel_spec *spec;
5476 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
361dab3e 5477 int err;
c21ca4a8 5478 int num_dacs;
e1f0d669 5479
361dab3e
TI		 5480 err = alloc_stac_spec(codec, ARRAY_SIZE(stac92hd73xx_pin_nids),
5481 stac92hd73xx_pin_nids);
5482 if (err < 0)
5483 return err;
e1f0d669 5484
361dab3e 5485 spec = codec->spec;
1b0e372d 5486 spec->linear_tone_beep = 0;
e99d32b3 5487 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 5488 spec->board_config = snd_hda_check_board_config(codec,
5489 STAC_92HD73XX_MODELS,
5490 stac92hd73xx_models,
5491 stac92hd73xx_cfg_tbl);
842ae638
TI		 5492 /* check codec subsystem id if not found */
5493 if (spec->board_config < 0)
5494 spec->board_config =
5495 snd_hda_check_board_codec_sid_config(codec,
5496 STAC_92HD73XX_MODELS, stac92hd73xx_models,
5497 stac92hd73xx_codec_id_cfg_tbl);
e1f0d669 5498again:
330ee995 5499 if (spec->board_config < 0)
9a11f1aa
TI		 5500 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5501 codec->chip_name);
330ee995
TI		 5502 else
5503 stac92xx_set_config_regs(codec,
af9f341a 5504 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 5505
c21ca4a8 5506 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 5507 conn, STAC92HD73_DAC_COUNT + 2) - 1;
5508
c21ca4a8 5509 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 5510 printk(KERN_WARNING "hda_codec: Could not determine "
5511 "number of channels defaulting to DAC count\n");
c21ca4a8 5512 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 5513 }
e2aec171 5514 spec->init = stac92hd73xx_core_init;
c21ca4a8 5515 switch (num_dacs) {
e1f0d669 5516 case 0x3: /* 6 Channel */
d78d7a90 5517 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR		 5518 break;
5519 case 0x4: /* 8 Channel */
d78d7a90 5520 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR		 5521 break;
5522 case 0x5: /* 10 Channel */
d78d7a90
TI		 5523 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
5524 break;
c21ca4a8
TI		 5525 }
5526 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 5527
e1f0d669
MR		 5528 spec->aloopback_mask = 0x01;
5529 spec->aloopback_shift = 8;
5530
1cd2224c 5531 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 5532 spec->mux_nids = stac92hd73xx_mux_nids;
5533 spec->adc_nids = stac92hd73xx_adc_nids;
5534 spec->dmic_nids = stac92hd73xx_dmic_nids;
5535 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 5536 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR		 5537
5538 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
5539 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 5540 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816 5541
6479c631
TI		 5542 spec->num_caps = STAC92HD73XX_NUM_CAPS;
5543 spec->capvols = stac92hd73xx_capvols;
5544 spec->capsws = stac92hd73xx_capsws;
5545
a7662640 5546 switch (spec->board_config) {
6b3ab21e 5547 case STAC_DELL_EQ:
d654a660 5548 spec->init = dell_eq_core_init;
6b3ab21e 5549 /* fallthru */
661cd8fb
TI		 5550 case STAC_DELL_M6_AMIC:
5551 case STAC_DELL_M6_DMIC:
5552 case STAC_DELL_M6_BOTH:
2a9c7816 5553 spec->num_smuxes = 0;
c0cea0d0 5554 spec->eapd_switch = 0;
6b3ab21e 5555
661cd8fb
TI		 5556 switch (spec->board_config) {
5557 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 5558 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640
MR		 5559 spec->num_dmics = 0;
5560 break;
661cd8fb 5561 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 5562 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5563 spec->num_dmics = 1;
5564 break;
661cd8fb 5565 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI		 5566 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
5567 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5568 spec->num_dmics = 1;
5569 break;
5570 }
5571 break;
842ae638
TI		 5572 case STAC_ALIENWARE_M17X:
5573 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
5574 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
5575 spec->eapd_switch = 0;
5576 break;
a7662640
MR		 5577 default:
5578 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 5579 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 5580 spec->eapd_switch = 1;
5207e10e 5581 break;
a7662640 5582 }
af6ee302 5583 if (spec->board_config != STAC_92HD73XX_REF) {
b2c4f4d7
MR		 5584 /* GPIO0 High = Enable EAPD */
5585 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
5586 spec->gpio_data = 0x01;
5587 }
a7662640 5588
a64135a2
MR		 5589 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
5590 spec->pwr_nids = stac92hd73xx_pwr_nids;
5591
9009b0e4 5592 err = stac92xx_parse_auto_config(codec);
e1f0d669
MR		 5593
5594 if (!err) {
5595 if (spec->board_config < 0) {
5596 printk(KERN_WARNING "hda_codec: No auto-config is "
5597 "available, default to model=ref\n");
5598 spec->board_config = STAC_92HD73XX_REF;
5599 goto again;
5600 }
5601 err = -EINVAL;
5602 }
5603
5604 if (err < 0) {
5605 stac92xx_free(codec);
5606 return err;
5607 }
5608
9e43f0de
TI		 5609 if (spec->board_config == STAC_92HD73XX_NO_JD)
5610 spec->hp_detect = 0;
5611
e1f0d669
MR		 5612 codec->patch_ops = stac92xx_patch_ops;
5613
2d34e1b3
TI		 5614 codec->proc_widget_hook = stac92hd7x_proc_hook;
5615
e1f0d669
MR		 5616 return 0;
5617}
5618
cbbf50b2 5619static int hp_bnb2011_with_dock(struct hda_codec *codec)
335e3b86
VK		 5620{
5621 if (codec->vendor_id != 0x111d7605 &&
5622 codec->vendor_id != 0x111d76d1)
5623 return 0;
5624
5625 switch (codec->subsystem_id) {
5626 case 0x103c1618:
5627 case 0x103c1619:
5628 case 0x103c161a:
5629 case 0x103c161b:
5630 case 0x103c161c:
5631 case 0x103c161d:
5632 case 0x103c161e:
5633 case 0x103c161f:
335e3b86
VK		 5634
5635 case 0x103c162a:
5636 case 0x103c162b:
5637
5638 case 0x103c1630:
5639 case 0x103c1631:
5640
5641 case 0x103c1633:
cbbf50b2 5642 case 0x103c1634:
335e3b86
VK		 5643 case 0x103c1635:
5644
335e3b86
VK		 5645 case 0x103c3587:
5646 case 0x103c3588:
5647 case 0x103c3589:
5648 case 0x103c358a:
5649
5650 case 0x103c3667:
5651 case 0x103c3668:
cbbf50b2
VK		 5652 case 0x103c3669:
5653
5654 return 1;
335e3b86
VK		 5655 }
5656 return 0;
5657}
5658
699d8995
VK		 5659static void stac92hd8x_add_pin(struct hda_codec *codec, hda_nid_t nid)
5660{
5661 struct sigmatel_spec *spec = codec->spec;
5662 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
5663 int i;
5664
5665 spec->auto_pin_nids[spec->auto_pin_cnt] = nid;
5666 spec->auto_pin_cnt++;
5667
5668 if (get_defcfg_device(def_conf) == AC_JACK_MIC_IN &&
5669 get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE) {
5670 for (i = 0; i < ARRAY_SIZE(stac92hd83xxx_dmic_nids); i++) {
5671 if (nid == stac92hd83xxx_dmic_nids[i]) {
5672 spec->auto_dmic_nids[spec->auto_dmic_cnt] = nid;
5673 spec->auto_dmic_cnt++;
5674 }
5675 }
5676 }
5677}
5678
5679static void stac92hd8x_add_adc(struct hda_codec *codec, hda_nid_t nid)
5680{
5681 struct sigmatel_spec *spec = codec->spec;
5682
5683 spec->auto_adc_nids[spec->auto_adc_cnt] = nid;
5684 spec->auto_adc_cnt++;
5685}
5686
5687static void stac92hd8x_add_mux(struct hda_codec *codec, hda_nid_t nid)
5688{
5689 int i, j;
5690 struct sigmatel_spec *spec = codec->spec;
5691
5692 for (i = 0; i < spec->auto_adc_cnt; i++) {
5693 if (get_connection_index(codec,
5694 spec->auto_adc_nids[i], nid) >= 0) {
5695 /* mux and volume for adc_nids[i] */
5696 if (!spec->auto_mux_nids[i]) {
5697 spec->auto_mux_nids[i] = nid;
5698 /* 92hd codecs capture volume is in mux */
5699 spec->auto_capvols[i] = HDA_COMPOSE_AMP_VAL(nid,
5700 3, 0, HDA_OUTPUT);
5701 }
5702 for (j = 0; j < spec->auto_dmic_cnt; j++) {
5703 if (get_connection_index(codec, nid,
5704 spec->auto_dmic_nids[j]) >= 0) {
5705 /* dmux for adc_nids[i] */
5706 if (!spec->auto_dmux_nids[i])
5707 spec->auto_dmux_nids[i] = nid;
5708 break;
5709 }
5710 }
5711 break;
5712 }
5713 }
5714}
5715
5716static void stac92hd8x_fill_auto_spec(struct hda_codec *codec)
5717{
5718 hda_nid_t nid, end_nid;
5719 unsigned int wid_caps, wid_type;
5720 struct sigmatel_spec *spec = codec->spec;
5721
5722 end_nid = codec->start_nid + codec->num_nodes;
5723
5724 for (nid = codec->start_nid; nid < end_nid; nid++) {
5725 wid_caps = get_wcaps(codec, nid);
5726 wid_type = get_wcaps_type(wid_caps);
5727
5728 if (wid_type == AC_WID_PIN)
5729 stac92hd8x_add_pin(codec, nid);
5730
5731 if (wid_type == AC_WID_AUD_IN && !(wid_caps & AC_WCAP_DIGITAL))
5732 stac92hd8x_add_adc(codec, nid);
5733 }
5734
5735 for (nid = codec->start_nid; nid < end_nid; nid++) {
5736 wid_caps = get_wcaps(codec, nid);
5737 wid_type = get_wcaps_type(wid_caps);
5738
5739 if (wid_type == AC_WID_AUD_SEL)
5740 stac92hd8x_add_mux(codec, nid);
5741 }
5742
5743 spec->pin_nids = spec->auto_pin_nids;
5744 spec->num_pins = spec->auto_pin_cnt;
5745 spec->adc_nids = spec->auto_adc_nids;
5746 spec->num_adcs = spec->auto_adc_cnt;
5747 spec->capvols = spec->auto_capvols;
5748 spec->capsws = spec->auto_capvols;
5749 spec->num_caps = spec->auto_adc_cnt;
5750 spec->mux_nids = spec->auto_mux_nids;
5751 spec->num_muxes = spec->auto_adc_cnt;
5752 spec->dmux_nids = spec->auto_dmux_nids;
5753 spec->num_dmuxes = spec->auto_adc_cnt;
5754 spec->dmic_nids = spec->auto_dmic_nids;
5755 spec->num_dmics = spec->auto_dmic_cnt;
5756}
5757
d0513fc6
MR		 5758static int patch_stac92hd83xxx(struct hda_codec *codec)
5759{
5760 struct sigmatel_spec *spec;
a3e19973 5761 int default_polarity = -1; /* no default cfg */
d0513fc6
MR		 5762 int err;
5763
361dab3e
TI		 5764 err = alloc_stac_spec(codec, 0, NULL); /* pins filled later */
5765 if (err < 0)
5766 return err;
d0513fc6 5767
cbbf50b2
VK		 5768 if (hp_bnb2011_with_dock(codec)) {
5769 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
5770 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
5771 }
5772
c36b5b05 5773 codec->epss = 0; /* longer delay needed for D3 */
699d8995
VK		 5774 stac92hd8x_fill_auto_spec(codec);
5775
361dab3e 5776 spec = codec->spec;
1db7ccdb 5777 spec->linear_tone_beep = 0;
0ffa9807 5778 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6 5779 spec->digbeep_nid = 0x21;
d0513fc6 5780 spec->pwr_nids = stac92hd83xxx_pwr_nids;
d0513fc6 5781 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 5782 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 5783 spec->init = stac92hd83xxx_core_init;
6479c631 5784
d0513fc6
MR		 5785 spec->board_config = snd_hda_check_board_config(codec,
5786 STAC_92HD83XXX_MODELS,
5787 stac92hd83xxx_models,
5788 stac92hd83xxx_cfg_tbl);
5556e147
VK		 5789 /* check codec subsystem id if not found */
5790 if (spec->board_config < 0)
5791 spec->board_config =
5792 snd_hda_check_board_codec_sid_config(codec,
5793 STAC_92HD83XXX_MODELS, stac92hd83xxx_models,
5794 stac92hd83xxx_codec_id_cfg_tbl);
d0513fc6 5795again:
330ee995 5796 if (spec->board_config < 0)
9a11f1aa
TI		 5797 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5798 codec->chip_name);
330ee995
TI		 5799 else
5800 stac92xx_set_config_regs(codec,
af9f341a 5801 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 5802
b4e81876
TI		 5803 codec->patch_ops = stac92xx_patch_ops;
5804
5556e147
VK		 5805 switch (spec->board_config) {
5806 case STAC_HP_ZEPHYR:
5807 spec->init = stac92hd83xxx_hp_zephyr_init;
5808 break;
a3e19973 5809 case STAC_92HD83XXX_HP_LED:
ff8a1e27
TI		 5810 default_polarity = 0;
5811 break;
5812 case STAC_92HD83XXX_HP_INV_LED:
a3e19973
TI		 5813 default_polarity = 1;
5814 break;
62cbde18
TI		 5815 case STAC_92HD83XXX_HP_MIC_LED:
5816 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
5817 break;
8d032a8f
DH		 5818 case STAC_92HD83XXX_HEADSET_JACK:
5819 spec->headset_jack = 1;
5820 break;
5556e147
VK		 5821 }
5822
a3e19973 5823 if (find_mute_led_cfg(codec, default_polarity))
e108c7b7
VK		 5824 snd_printd("mute LED gpio %d polarity %d\n",
5825 spec->gpio_led,
5826 spec->gpio_led_polarity);
5827
b4e81876 5828 if (spec->gpio_led) {
f1a73746 5829 if (!spec->vref_mute_led_nid) {
45eebda7
VK		 5830 spec->gpio_mask |= spec->gpio_led;
5831 spec->gpio_dir |= spec->gpio_led;
5832 spec->gpio_data |= spec->gpio_led;
5833 } else {
5834 codec->patch_ops.set_power_state =
5835 stac92xx_set_power_state;
45eebda7 5836 }
b4e81876 5837 }
b4e81876 5838
62cbde18
TI		 5839 if (spec->mic_mute_led_gpio) {
5840 spec->gpio_mask |= spec->mic_mute_led_gpio;
5841 spec->gpio_dir |= spec->mic_mute_led_gpio;
5842 spec->mic_mute_led_on = true;
5843 spec->gpio_data |= spec->mic_mute_led_gpio;
5844 }
5845
9009b0e4 5846 err = stac92xx_parse_auto_config(codec);
d0513fc6
MR		 5847 if (!err) {
5848 if (spec->board_config < 0) {
5849 printk(KERN_WARNING "hda_codec: No auto-config is "
5850 "available, default to model=ref\n");
5851 spec->board_config = STAC_92HD83XXX_REF;
5852 goto again;
5853 }
5854 err = -EINVAL;
5855 }
5856
5857 if (err < 0) {
5858 stac92xx_free(codec);
5859 return err;
5860 }
5861
2d34e1b3
TI		 5862 codec->proc_widget_hook = stac92hd_proc_hook;
5863
d0513fc6
MR		 5864 return 0;
5865}
5866
6df703ae
HRK		 5867static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
5868 hda_nid_t dig0pin)
5869{
5870 struct sigmatel_spec *spec = codec->spec;
5871 int idx;
5872
5873 for (idx = 0; idx < spec->num_pins; idx++)
5874 if (spec->pin_nids[idx] == dig0pin)
5875 break;
5876 if ((idx + 2) >= spec->num_pins)
5877 return 0;
5878
5879 /* dig1pin case */
330ee995 5880 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5881 return 2;
5882
5883 /* dig0pin + dig2pin case */
330ee995 5884 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 5885 return 2;
330ee995 5886 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5887 return 1;
5888 else
5889 return 0;
5890}
5891
75d1aeb9
TI		 5892/* HP dv7 bass switch - GPIO5 */
5893#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
5894static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
5895 struct snd_ctl_elem_value *ucontrol)
5896{
5897 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5898 struct sigmatel_spec *spec = codec->spec;
5899 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
5900 return 0;
5901}
5902
5903static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
5904 struct snd_ctl_elem_value *ucontrol)
5905{
5906 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5907 struct sigmatel_spec *spec = codec->spec;
5908 unsigned int gpio_data;
5909
5910 gpio_data = (spec->gpio_data & ~0x20) |
5911 (ucontrol->value.integer.value[0] ? 0x20 : 0);
5912 if (gpio_data == spec->gpio_data)
5913 return 0;
5914 spec->gpio_data = gpio_data;
5915 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
5916 return 1;
5917}
5918
2b63536f 5919static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
75d1aeb9
TI		 5920 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5921 .info = stac_hp_bass_gpio_info,
5922 .get = stac_hp_bass_gpio_get,
5923 .put = stac_hp_bass_gpio_put,
5924};
5925
5926static int stac_add_hp_bass_switch(struct hda_codec *codec)
5927{
5928 struct sigmatel_spec *spec = codec->spec;
5929
5930 if (!stac_control_new(spec, &stac_hp_bass_sw_ctrl,
5931 "Bass Speaker Playback Switch", 0))
5932 return -ENOMEM;
5933
5934 spec->gpio_mask |= 0x20;
5935 spec->gpio_dir |= 0x20;
5936 spec->gpio_data |= 0x20;
5937 return 0;
5938}
5939
e035b841
MR		 5940static int patch_stac92hd71bxx(struct hda_codec *codec)
5941{
5942 struct sigmatel_spec *spec;
2b63536f 5943 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
5bdaaada 5944 unsigned int pin_cfg;
361dab3e 5945 int err;
e035b841 5946
361dab3e
TI		 5947 err = alloc_stac_spec(codec, STAC92HD71BXX_NUM_PINS,
5948 stac92hd71bxx_pin_nids_4port);
5949 if (err < 0)
5950 return err;
e035b841 5951
361dab3e 5952 spec = codec->spec;
1b0e372d 5953 spec->linear_tone_beep = 0;
8daaaa97 5954 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK		 5955 switch (codec->vendor_id) {
5956 case 0x111d76b6:
5957 case 0x111d76b7:
616f89e7
HRK		 5958 break;
5959 case 0x111d7603:
5960 case 0x111d7608:
5961 /* On 92HD75Bx 0x27 isn't a pin nid */
5962 spec->num_pins--;
5963 /* fallthrough */
5964 default:
5965 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5966 }
aafc4412 5967 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 5968 spec->board_config = snd_hda_check_board_config(codec,
5969 STAC_92HD71BXX_MODELS,
5970 stac92hd71bxx_models,
5971 stac92hd71bxx_cfg_tbl);
5972again:
330ee995 5973 if (spec->board_config < 0)
9a11f1aa
TI		 5974 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5975 codec->chip_name);
330ee995
TI		 5976 else
5977 stac92xx_set_config_regs(codec,
af9f341a 5978 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5979
fc64b26c 5980 if (spec->board_config != STAC_92HD71BXX_REF) {
41c3b648
TI		 5981 /* GPIO0 = EAPD */
5982 spec->gpio_mask = 0x01;
5983 spec->gpio_dir = 0x01;
5984 spec->gpio_data = 0x01;
5985 }
5986
6df703ae
HRK		 5987 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5988 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5989
6479c631
TI		 5990 spec->num_caps = STAC92HD71BXX_NUM_CAPS;
5991 spec->capvols = stac92hd71bxx_capvols;
5992 spec->capsws = stac92hd71bxx_capsws;
5993
541eee87
MR		 5994 switch (codec->vendor_id) {
5995 case 0x111d76b6: /* 4 Port without Analog Mixer */
5996 case 0x111d76b7:
23c7b521
HRK		 5997 unmute_init++;
5998 /* fallthru */
541eee87
MR		 5999 case 0x111d76b4: /* 6 Port without Analog Mixer */
6000 case 0x111d76b5:
0ffa9807 6001 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 6002 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 6003 stac92hd71bxx_dmic_nids,
6004 STAC92HD71BXX_NUM_DMICS);
541eee87 6005 break;
aafc4412 6006 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 6007 switch (spec->board_config) {
6008 case STAC_HP_M4:
72474be6 6009 /* Enable VREF power saving on GPIO1 detect */
3a93897e 6010 err = stac_add_event(codec, codec->afg,
c6e4c666
TI		 6011 STAC_VREF_EVENT, 0x02);
6012 if (err < 0)
6013 return err;
c5d08bb5 6014 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6 6015 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
3a93897e 6016 snd_hda_jack_detect_enable(codec, codec->afg, 0);
72474be6
MR		 6017 spec->gpio_mask |= 0x02;
6018 break;
6019 }
8daaaa97 6020 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 6021 (codec->revision_id & 0xf) == 1)
8daaaa97 6022 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 6023
aafc4412 6024 /* disable VSW */
ca8d33fc 6025 unmute_init++;
330ee995
TI		 6026 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
6027 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
2b63536f 6028 spec->dmic_nids = stac92hd71bxx_dmic_5port_nids;
ab5a6ebe 6029 spec->num_dmics = stac92xx_connected_ports(codec,
2b63536f 6030 stac92hd71bxx_dmic_5port_nids,
6df703ae 6031 STAC92HD71BXX_NUM_DMICS - 1);
aafc4412
MR		 6032 break;
6033 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 6034 if ((codec->revision_id & 0xf) == 1)
8daaaa97 6035 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 6036
aafc4412 6037 /* fallthru */
541eee87 6038 default:
0ffa9807 6039 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 6040 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 6041 stac92hd71bxx_dmic_nids,
6042 STAC92HD71BXX_NUM_DMICS);
5207e10e 6043 break;
541eee87
MR		 6044 }
6045
5e68fb3c
DH		 6046 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
6047 spec->init = stac92hd71bxx_core_init;
6048
ca8d33fc
MR		 6049 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
6050 snd_hda_sequence_write_cache(codec, unmute_init);
6051
d78d7a90 6052 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 6053 spec->aloopback_mask = 0x50;
541eee87
MR		 6054 spec->aloopback_shift = 0;
6055
8daaaa97 6056 spec->powerdown_adcs = 1;
1cd2224c 6057 spec->digbeep_nid = 0x26;
e035b841
MR		 6058 spec->mux_nids = stac92hd71bxx_mux_nids;
6059 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 6060 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 6061 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 6062
6063 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
6064 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
5207e10e 6065 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
6df703ae 6066 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 6067
d38cce70
KG		 6068 snd_printdd("Found board config: %d\n", spec->board_config);
6069
6a14f585
MR		 6070 switch (spec->board_config) {
6071 case STAC_HP_M4:
6a14f585 6072 /* enable internal microphone */
330ee995 6073 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR		 6074 stac92xx_auto_set_pinctl(codec, 0x0e,
6075 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 6076 /* fallthru */
6077 case STAC_DELL_M4_2:
6078 spec->num_dmics = 0;
6079 spec->num_smuxes = 0;
6080 spec->num_dmuxes = 0;
6081 break;
6082 case STAC_DELL_M4_1:
6083 case STAC_DELL_M4_3:
6084 spec->num_dmics = 1;
6085 spec->num_smuxes = 0;
ea18aa46 6086 spec->num_dmuxes = 1;
6a14f585 6087 break;
514bf54c
JG		 6088 case STAC_HP_DV4_1222NR:
6089 spec->num_dmics = 1;
6090 /* I don't know if it needs 1 or 2 smuxes - will wait for
6091 * bug reports to fix if needed
6092 */
6093 spec->num_smuxes = 1;
6094 spec->num_dmuxes = 1;
514bf54c 6095 /* fallthrough */
2a6ce6e5
TI		 6096 case STAC_HP_DV4:
6097 spec->gpio_led = 0x01;
6098 /* fallthrough */
e2ea57a8 6099 case STAC_HP_DV5:
330ee995 6100 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8 6101 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
6e34c033
TI		 6102 /* HP dv6 gives the headphone pin as a line-out. Thus we
6103 * need to set hp_detect flag here to force to enable HP
6104 * detection.
6105 */
6106 spec->hp_detect = 1;
e2ea57a8 6107 break;
ae6241fb
CP		 6108 case STAC_HP_HDX:
6109 spec->num_dmics = 1;
6110 spec->num_dmuxes = 1;
6111 spec->num_smuxes = 1;
26ebe0a2 6112 spec->gpio_led = 0x08;
86d190e7
TI		 6113 break;
6114 }
443e26d0 6115
c357aab0 6116 if (hp_blike_system(codec->subsystem_id)) {
5bdaaada
VK		 6117 pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
6118 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
6119 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
6120 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
6121 /* It was changed in the BIOS to just satisfy MS DTM.
6122 * Lets turn it back into slaved HP
6123 */
6124 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
6125 | (AC_JACK_HP_OUT <<
6126 AC_DEFCFG_DEVICE_SHIFT);
6127 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
6128 | AC_DEFCFG_SEQUENCE)))
6129 | 0x1f;
6130 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
6131 }
6132 }
6133
6a557c94 6134 if (find_mute_led_cfg(codec, 1))
c357aab0
VK		 6135 snd_printd("mute LED gpio %d polarity %d\n",
6136 spec->gpio_led,
6137 spec->gpio_led_polarity);
5bdaaada 6138
86d190e7 6139 if (spec->gpio_led) {
f1a73746 6140 if (!spec->vref_mute_led_nid) {
45eebda7
VK		 6141 spec->gpio_mask |= spec->gpio_led;
6142 spec->gpio_dir |= spec->gpio_led;
6143 spec->gpio_data |= spec->gpio_led;
6144 } else {
6145 codec->patch_ops.set_power_state =
6146 stac92xx_set_power_state;
45eebda7 6147 }
86d190e7 6148 }
6a14f585 6149
c21ca4a8 6150 spec->multiout.dac_nids = spec->dac_nids;
e035b841 6151
9009b0e4 6152 err = stac92xx_parse_auto_config(codec);
e035b841
MR		 6153 if (!err) {
6154 if (spec->board_config < 0) {
6155 printk(KERN_WARNING "hda_codec: No auto-config is "
6156 "available, default to model=ref\n");
6157 spec->board_config = STAC_92HD71BXX_REF;
6158 goto again;
6159 }
6160 err = -EINVAL;
6161 }
6162
6163 if (err < 0) {
6164 stac92xx_free(codec);
6165 return err;
6166 }
6167
75d1aeb9 6168 /* enable bass on HP dv7 */
2a6ce6e5
TI		 6169 if (spec->board_config == STAC_HP_DV4 ||
6170 spec->board_config == STAC_HP_DV5) {
75d1aeb9
TI		 6171 unsigned int cap;
6172 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
6173 cap &= AC_GPIO_IO_COUNT;
6174 if (cap >= 6)
6175 stac_add_hp_bass_switch(codec);
6176 }
6177
2d34e1b3
TI		 6178 codec->proc_widget_hook = stac92hd7x_proc_hook;
6179
e035b841 6180 return 0;
86d190e7 6181}
e035b841 6182
2f2f4251
M		 6183static int patch_stac922x(struct hda_codec *codec)
6184{
6185 struct sigmatel_spec *spec;
c7d4b2fa 6186 int err;
2f2f4251 6187
361dab3e
TI		 6188 err = alloc_stac_spec(codec, ARRAY_SIZE(stac922x_pin_nids),
6189 stac922x_pin_nids);
6190 if (err < 0)
6191 return err;
2f2f4251 6192
361dab3e 6193 spec = codec->spec;
1b0e372d 6194 spec->linear_tone_beep = 1;
f5fcc13c
TI		 6195 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
6196 stac922x_models,
6197 stac922x_cfg_tbl);
536319af 6198 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 6199 spec->gpio_mask = spec->gpio_dir = 0x03;
6200 spec->gpio_data = 0x03;
3fc24d85
TI		 6201 /* Intel Macs have all same PCI SSID, so we need to check
6202 * codec SSID to distinguish the exact models
6203 */
6f0778d8 6204 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 6205 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 6206
6207 case 0x106b0800:
6208 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 6209 break;
5d5d3bc3
IZ		 6210 case 0x106b0600:
6211 case 0x106b0700:
6212 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 6213 break;
5d5d3bc3
IZ		 6214 case 0x106b0e00:
6215 case 0x106b0f00:
6216 case 0x106b1600:
6217 case 0x106b1700:
6218 case 0x106b0200:
6219 case 0x106b1e00:
6220 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 6221 break;
5d5d3bc3
IZ		 6222 case 0x106b1a00:
6223 case 0x00000100:
6224 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 6225 break;
5d5d3bc3
IZ		 6226 case 0x106b0a00:
6227 case 0x106b2200:
6228 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 6229 break;
536319af
NB		 6230 default:
6231 spec->board_config = STAC_INTEL_MAC_V3;
6232 break;
3fc24d85
TI		 6233 }
6234 }
6235
9e507abd 6236 again:
330ee995 6237 if (spec->board_config < 0)
9a11f1aa
TI		 6238 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6239 codec->chip_name);
330ee995
TI		 6240 else
6241 stac92xx_set_config_regs(codec,
af9f341a 6242 stac922x_brd_tbl[spec->board_config]);
2f2f4251 6243
c7d4b2fa
M		 6244 spec->adc_nids = stac922x_adc_nids;
6245 spec->mux_nids = stac922x_mux_nids;
2549413e 6246 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 6247 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 6248 spec->num_dmics = 0;
a64135a2 6249 spec->num_pwrs = 0;
c7d4b2fa
M		 6250
6251 spec->init = stac922x_core_init;
6479c631
TI		 6252
6253 spec->num_caps = STAC922X_NUM_CAPS;
6254 spec->capvols = stac922x_capvols;
6255 spec->capsws = stac922x_capsws;
c7d4b2fa
M		 6256
6257 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 6258
9009b0e4 6259 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 6260 if (!err) {
6261 if (spec->board_config < 0) {
6262 printk(KERN_WARNING "hda_codec: No auto-config is "
6263 "available, default to model=ref\n");
6264 spec->board_config = STAC_D945_REF;
6265 goto again;
6266 }
6267 err = -EINVAL;
6268 }
3cc08dc6
MP		 6269 if (err < 0) {
6270 stac92xx_free(codec);
6271 return err;
6272 }
6273
6274 codec->patch_ops = stac92xx_patch_ops;
6275
807a4636
TI		 6276 /* Fix Mux capture level; max to 2 */
6277 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
6278 (0 << AC_AMPCAP_OFFSET_SHIFT) |
6279 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
6280 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
6281 (0 << AC_AMPCAP_MUTE_SHIFT));
6282
3cc08dc6
MP		 6283 return 0;
6284}
6285
6286static int patch_stac927x(struct hda_codec *codec)
6287{
6288 struct sigmatel_spec *spec;
6289 int err;
6290
361dab3e
TI		 6291 err = alloc_stac_spec(codec, ARRAY_SIZE(stac927x_pin_nids),
6292 stac927x_pin_nids);
6293 if (err < 0)
6294 return err;
3cc08dc6 6295
361dab3e 6296 spec = codec->spec;
1b0e372d 6297 spec->linear_tone_beep = 1;
45c1d85b 6298 codec->slave_dig_outs = stac927x_slave_dig_outs;
f5fcc13c
TI		 6299 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
6300 stac927x_models,
6301 stac927x_cfg_tbl);
9e507abd 6302 again:
330ee995 6303 if (spec->board_config < 0)
9a11f1aa
TI		 6304 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6305 codec->chip_name);
330ee995
TI		 6306 else
6307 stac92xx_set_config_regs(codec,
af9f341a 6308 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 6309
1cd2224c 6310 spec->digbeep_nid = 0x23;
8e9068b1
MR		 6311 spec->adc_nids = stac927x_adc_nids;
6312 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
6313 spec->mux_nids = stac927x_mux_nids;
6314 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 6315 spec->smux_nids = stac927x_smux_nids;
6316 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 6317 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 6318 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 6319 spec->multiout.dac_nids = spec->dac_nids;
6320
af6ee302
TI		 6321 if (spec->board_config != STAC_D965_REF) {
6322 /* GPIO0 High = Enable EAPD */
6323 spec->eapd_mask = spec->gpio_mask = 0x01;
6324 spec->gpio_dir = spec->gpio_data = 0x01;
6325 }
6326
81d3dbde 6327 switch (spec->board_config) {
93ed1503 6328 case STAC_D965_3ST:
93ed1503 6329 case STAC_D965_5ST:
8e9068b1 6330 /* GPIO0 High = Enable EAPD */
8e9068b1 6331 spec->num_dmics = 0;
93ed1503 6332 spec->init = d965_core_init;
81d3dbde 6333 break;
8e9068b1 6334 case STAC_DELL_BIOS:
780c8be4
MR		 6335 switch (codec->subsystem_id) {
6336 case 0x10280209:
6337 case 0x1028022e:
6338 /* correct the device field to SPDIF out */
330ee995 6339 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4 6340 break;
86d190e7 6341 }
03d7ca17 6342 /* configure the analog microphone on some laptops */
330ee995 6343 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 6344 /* correct the front output jack as a hp out */
330ee995 6345 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 6346 /* correct the front input jack as a mic */
330ee995 6347 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 6348 /* fallthru */
8e9068b1 6349 case STAC_DELL_3ST:
af6ee302
TI		 6350 if (codec->subsystem_id != 0x1028022f) {
6351 /* GPIO2 High = Enable EAPD */
6352 spec->eapd_mask = spec->gpio_mask = 0x04;
6353 spec->gpio_dir = spec->gpio_data = 0x04;
6354 }
7f16859a
MR		 6355 spec->dmic_nids = stac927x_dmic_nids;
6356 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 6357
ccca7cdc 6358 spec->init = dell_3st_core_init;
8e9068b1 6359 spec->dmux_nids = stac927x_dmux_nids;
1697055e 6360 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a 6361 break;
54930531
TI		 6362 case STAC_927X_VOLKNOB:
6363 spec->num_dmics = 0;
6364 spec->init = stac927x_volknob_core_init;
6365 break;
7f16859a 6366 default:
8e9068b1 6367 spec->num_dmics = 0;
8e9068b1 6368 spec->init = stac927x_core_init;
af6ee302 6369 break;
7f16859a
MR		 6370 }
6371
6479c631
TI		 6372 spec->num_caps = STAC927X_NUM_CAPS;
6373 spec->capvols = stac927x_capvols;
6374 spec->capsws = stac927x_capsws;
6375
a64135a2 6376 spec->num_pwrs = 0;
d78d7a90 6377 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR		 6378 spec->aloopback_mask = 0x40;
6379 spec->aloopback_shift = 0;
c0cea0d0 6380 spec->eapd_switch = 1;
8e9068b1 6381
9009b0e4 6382 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 6383 if (!err) {
6384 if (spec->board_config < 0) {
6385 printk(KERN_WARNING "hda_codec: No auto-config is "
6386 "available, default to model=ref\n");
6387 spec->board_config = STAC_D965_REF;
6388 goto again;
6389 }
6390 err = -EINVAL;
6391 }
c7d4b2fa
M		 6392 if (err < 0) {
6393 stac92xx_free(codec);
6394 return err;
6395 }
2f2f4251
M		 6396
6397 codec->patch_ops = stac92xx_patch_ops;
6398
2d34e1b3
TI		 6399 codec->proc_widget_hook = stac927x_proc_hook;
6400
52987656
TI		 6401 /*
6402 * !!FIXME!!
6403 * The STAC927x seem to require fairly long delays for certain
6404 * command sequences. With too short delays (even if the answer
6405 * is set to RIRB properly), it results in the silence output
6406 * on some hardwares like Dell.
6407 *
6408 * The below flag enables the longer delay (see get_response
6409 * in hda_intel.c).
6410 */
6411 codec->bus->needs_damn_long_delay = 1;
6412
e28d8322
TI		 6413 /* no jack detecion for ref-no-jd model */
6414 if (spec->board_config == STAC_D965_REF_NO_JD)
6415 spec->hp_detect = 0;
6416
2f2f4251
M		 6417 return 0;
6418}
6419
f3302a59
MP		 6420static int patch_stac9205(struct hda_codec *codec)
6421{
6422 struct sigmatel_spec *spec;
8259980e 6423 int err;
f3302a59 6424
361dab3e
TI		 6425 err = alloc_stac_spec(codec, ARRAY_SIZE(stac9205_pin_nids),
6426 stac9205_pin_nids);
6427 if (err < 0)
6428 return err;
f3302a59 6429
361dab3e 6430 spec = codec->spec;
1b0e372d 6431 spec->linear_tone_beep = 1;
f5fcc13c
TI		 6432 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
6433 stac9205_models,
6434 stac9205_cfg_tbl);
9e507abd 6435 again:
330ee995 6436 if (spec->board_config < 0)
9a11f1aa
TI		 6437 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6438 codec->chip_name);
330ee995
TI		 6439 else
6440 stac92xx_set_config_regs(codec,
af9f341a 6441 stac9205_brd_tbl[spec->board_config]);
f3302a59 6442
1cd2224c 6443 spec->digbeep_nid = 0x23;
f3302a59 6444 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 6445 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 6446 spec->mux_nids = stac9205_mux_nids;
2549413e 6447 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 6448 spec->smux_nids = stac9205_smux_nids;
6449 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 6450 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 6451 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 6452 spec->dmux_nids = stac9205_dmux_nids;
1697055e 6453 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 6454 spec->num_pwrs = 0;
f3302a59
MP		 6455
6456 spec->init = stac9205_core_init;
d78d7a90 6457 spec->aloopback_ctl = stac9205_loopback;
f3302a59 6458
6479c631
TI		 6459 spec->num_caps = STAC9205_NUM_CAPS;
6460 spec->capvols = stac9205_capvols;
6461 spec->capsws = stac9205_capsws;
6462
e1f0d669
MR		 6463 spec->aloopback_mask = 0x40;
6464 spec->aloopback_shift = 0;
d9a4268e
TI		 6465 /* Turn on/off EAPD per HP plugging */
6466 if (spec->board_config != STAC_9205_EAPD)
6467 spec->eapd_switch = 1;
f3302a59 6468 spec->multiout.dac_nids = spec->dac_nids;
87d48363 6469
ae0a8ed8 6470 switch (spec->board_config){
ae0a8ed8 6471 case STAC_9205_DELL_M43:
87d48363 6472 /* Enable SPDIF in/out */
330ee995
TI		 6473 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
6474 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 6475
4fe5195c 6476 /* Enable unsol response for GPIO4/Dock HP connection */
3a93897e 6477 err = stac_add_event(codec, codec->afg, STAC_VREF_EVENT, 0x01);
c6e4c666
TI		 6478 if (err < 0)
6479 return err;
c5d08bb5 6480 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c 6481 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3a93897e 6482 snd_hda_jack_detect_enable(codec, codec->afg, 0);
4fe5195c
MR		 6483
6484 spec->gpio_dir = 0x0b;
0fc9dec4 6485 spec->eapd_mask = 0x01;
4fe5195c
MR		 6486 spec->gpio_mask = 0x1b;
6487 spec->gpio_mute = 0x10;
e2e7d624 6488 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 6489 * GPIO3 Low = DRM
87d48363 6490 */
4fe5195c 6491 spec->gpio_data = 0x01;
ae0a8ed8 6492 break;
b2c4f4d7
MR		 6493 case STAC_9205_REF:
6494 /* SPDIF-In enabled */
6495 break;
ae0a8ed8
TD		 6496 default:
6497 /* GPIO0 High = EAPD */
0fc9dec4 6498 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 6499 spec->gpio_data = 0x01;
ae0a8ed8
TD		 6500 break;
6501 }
33382403 6502
9009b0e4 6503 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 6504 if (!err) {
6505 if (spec->board_config < 0) {
6506 printk(KERN_WARNING "hda_codec: No auto-config is "
6507 "available, default to model=ref\n");
6508 spec->board_config = STAC_9205_REF;
6509 goto again;
6510 }
6511 err = -EINVAL;
6512 }
f3302a59
MP		 6513 if (err < 0) {
6514 stac92xx_free(codec);
6515 return err;
6516 }
6517
6518 codec->patch_ops = stac92xx_patch_ops;
6519
2d34e1b3
TI		 6520 codec->proc_widget_hook = stac9205_proc_hook;
6521
f3302a59
MP		 6522 return 0;
6523}
6524
db064e50 6525/*
6d859065 6526 * STAC9872 hack
db064e50
TI		 6527 */
6528
2b63536f 6529static const struct hda_verb stac9872_core_init[] = {
1624cb9a 6530 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 6531 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
6532 {}
6533};
6534
2b63536f 6535static const hda_nid_t stac9872_pin_nids[] = {
caa10b6e
TI		 6536 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
6537 0x11, 0x13, 0x14,
6538};
6539
2b63536f 6540static const hda_nid_t stac9872_adc_nids[] = {
caa10b6e
TI		 6541 0x8 /*,0x6*/
6542};
6543
2b63536f 6544static const hda_nid_t stac9872_mux_nids[] = {
caa10b6e
TI		 6545 0x15
6546};
6547
2b63536f 6548static const unsigned long stac9872_capvols[] = {
6479c631
TI		 6549 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT),
6550};
6551#define stac9872_capsws stac9872_capvols
6552
2b63536f 6553static const unsigned int stac9872_vaio_pin_configs[9] = {
307282c8
TI		 6554 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
6555 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
6556 0x90a7013e
6557};
6558
ea734963 6559static const char * const stac9872_models[STAC_9872_MODELS] = {
307282c8
TI		 6560 [STAC_9872_AUTO] = "auto",
6561 [STAC_9872_VAIO] = "vaio",
6562};
6563
2b63536f 6564static const unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
307282c8
TI		 6565 [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
6566};
6567
2b63536f 6568static const struct snd_pci_quirk stac9872_cfg_tbl[] = {
b04add95
TI		 6569 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
6570 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 6571 {} /* terminator */
6572};
6573
6d859065 6574static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 6575{
6576 struct sigmatel_spec *spec;
1e137f92 6577 int err;
db064e50 6578
361dab3e
TI		 6579 err = alloc_stac_spec(codec, ARRAY_SIZE(stac9872_pin_nids),
6580 stac9872_pin_nids);
6581 if (err < 0)
6582 return err;
6583
6584 spec = codec->spec;
1b0e372d 6585 spec->linear_tone_beep = 1;
caa10b6e
TI		 6586
6587 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
6588 stac9872_models,
6589 stac9872_cfg_tbl);
307282c8 6590 if (spec->board_config < 0)
9a11f1aa
TI		 6591 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6592 codec->chip_name);
307282c8
TI		 6593 else
6594 stac92xx_set_config_regs(codec,
6595 stac9872_brd_tbl[spec->board_config]);
db064e50 6596
1e137f92
TI		 6597 spec->multiout.dac_nids = spec->dac_nids;
6598 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
6599 spec->adc_nids = stac9872_adc_nids;
6600 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
6601 spec->mux_nids = stac9872_mux_nids;
1e137f92 6602 spec->init = stac9872_core_init;
6479c631
TI		 6603 spec->num_caps = 1;
6604 spec->capvols = stac9872_capvols;
6605 spec->capsws = stac9872_capsws;
1e137f92 6606
9009b0e4 6607 err = stac92xx_parse_auto_config(codec);
1e137f92
TI		 6608 if (err < 0) {
6609 stac92xx_free(codec);
6610 return -EINVAL;
6611 }
6612 spec->input_mux = &spec->private_imux;
6613 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI		 6614 return 0;
6615}
6616
6617
2f2f4251
M		 6618/*
6619 * patch entries
6620 */
2b63536f 6621static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 6622 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
6623 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
6624 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
6625 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
6626 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
6627 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
6628 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 6629 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
6630 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
6631 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
6632 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
6633 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
6634 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 6635 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
6636 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
6637 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
6638 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
6639 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
6640 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
6641 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
6642 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
6643 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
6644 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 6645 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
6646 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
6647 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
6648 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
6649 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
6650 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 6651 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
6652 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 6653 /* The following does not take into account .id=0x83847661 when subsys =
6654 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
6655 * currently not fully supported.
6656 */
6657 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
6658 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
6659 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 6660 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP		 6661 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
6662 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
6663 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
6664 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
6665 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
6666 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
6667 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
6668 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 6669 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6 6670 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
a9694faa 6671 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
d0513fc6 6672 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 6673 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
8a345a04
CC		 6674 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
6675 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
36706005
CC		 6676 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
6677 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
6678 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
6679 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
aafc4412 6680 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 6681 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
6682 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 6683 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 6684 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6685 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6686 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6687 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6688 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6689 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6690 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
6691 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4d8ec5f3
CC		 6692 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
6693 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
6694 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
6695 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
6696 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
6697 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
6698 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
6699 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
6700 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
6701 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
6702 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
6703 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
6704 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
6705 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
6706 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
46724c2e 6707 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 6708 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4dfb8a45
VK		 6709 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
6710 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 6711 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
ad5d8755
CC		 6712 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
6713 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
6714 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
6715 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
6716 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
6717 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
6718 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
6719 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
6720 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
6721 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
6722 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
6723 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
2f2f4251
M		 6724 {} /* terminator */
6725};
1289e9e8
TI		 6726
6727MODULE_ALIAS("snd-hda-codec-id:8384*");
6728MODULE_ALIAS("snd-hda-codec-id:111d*");
6729
6730MODULE_LICENSE("GPL");
6731MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
6732
6733static struct hda_codec_preset_list sigmatel_list = {
6734 .preset = snd_hda_preset_sigmatel,
6735 .owner = THIS_MODULE,
6736};
6737
6738static int __init patch_sigmatel_init(void)
6739{
6740 return snd_hda_add_codec_preset(&sigmatel_list);
6741}
6742
6743static void __exit patch_sigmatel_exit(void)
6744{
6745 snd_hda_delete_codec_preset(&sigmatel_list);
6746}
6747
6748module_init(patch_sigmatel_init)
6749module_exit(patch_sigmatel_exit)
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