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[ALSA] Add SUPERH depends to sound/soc/sh/Kconfig
[mirror_ubuntu-zesty-kernel.git] / sound / pci / hda / patch_sigmatel.c
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2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
35
4e55096e 36#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 37#define STAC_PWR_EVENT 0x20
38#define STAC_HP_EVENT 0x30
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
dfe495d0
TI		 42 STAC_9200_DELL_D21,
43 STAC_9200_DELL_D22,
44 STAC_9200_DELL_D23,
45 STAC_9200_DELL_M21,
46 STAC_9200_DELL_M22,
47 STAC_9200_DELL_M23,
48 STAC_9200_DELL_M24,
49 STAC_9200_DELL_M25,
50 STAC_9200_DELL_M26,
51 STAC_9200_DELL_M27,
1194b5b7 52 STAC_9200_GATEWAY,
f5fcc13c
TI		 53 STAC_9200_MODELS
54};
55
56enum {
57 STAC_9205_REF,
dfe495d0 58 STAC_9205_DELL_M42,
ae0a8ed8
TD		 59 STAC_9205_DELL_M43,
60 STAC_9205_DELL_M44,
f5fcc13c
TI		 61 STAC_9205_MODELS
62};
63
e1f0d669
MR		 64enum {
65 STAC_92HD73XX_REF,
66 STAC_92HD73XX_MODELS
67};
68
e035b841
MR		 69enum {
70 STAC_92HD71BXX_REF,
71 STAC_92HD71BXX_MODELS
72};
73
8e21c34c
TD		 74enum {
75 STAC_925x_REF,
76 STAC_M2_2,
77 STAC_MA6,
2c11f955 78 STAC_PA6,
8e21c34c
TD		 79 STAC_925x_MODELS
80};
81
f5fcc13c
TI		 82enum {
83 STAC_D945_REF,
84 STAC_D945GTP3,
85 STAC_D945GTP5,
5d5d3bc3
IZ		 86 STAC_INTEL_MAC_V1,
87 STAC_INTEL_MAC_V2,
88 STAC_INTEL_MAC_V3,
89 STAC_INTEL_MAC_V4,
90 STAC_INTEL_MAC_V5,
dfe495d0 91 /* for backward compatibility */
f5fcc13c 92 STAC_MACMINI,
3fc24d85 93 STAC_MACBOOK,
6f0778d8
NB		 94 STAC_MACBOOK_PRO_V1,
95 STAC_MACBOOK_PRO_V2,
f16928fb 96 STAC_IMAC_INTEL,
0dae0f83 97 STAC_IMAC_INTEL_20,
dfe495d0
TI		 98 STAC_922X_DELL_D81,
99 STAC_922X_DELL_D82,
100 STAC_922X_DELL_M81,
101 STAC_922X_DELL_M82,
f5fcc13c
TI		 102 STAC_922X_MODELS
103};
104
105enum {
106 STAC_D965_REF,
107 STAC_D965_3ST,
108 STAC_D965_5ST,
4ff076e5 109 STAC_DELL_3ST,
8e9068b1 110 STAC_DELL_BIOS,
f5fcc13c
TI		 111 STAC_927X_MODELS
112};
403d1944 113
2f2f4251 114struct sigmatel_spec {
c8b6bf9b 115 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 116 unsigned int num_mixers;
117
403d1944 118 int board_config;
c7d4b2fa 119 unsigned int surr_switch: 1;
403d1944
MP		 120 unsigned int line_switch: 1;
121 unsigned int mic_switch: 1;
3cc08dc6 122 unsigned int alt_switch: 1;
82bc955f 123 unsigned int hp_detect: 1;
c7d4b2fa 124
4fe5195c
MR		 125 /* gpio lines */
126 unsigned int gpio_mask;
127 unsigned int gpio_dir;
128 unsigned int gpio_data;
129 unsigned int gpio_mute;
130
131 /* analog loopback */
e1f0d669
MR		 132 unsigned char aloopback_mask;
133 unsigned char aloopback_shift;
8259980e 134
a64135a2
MR		 135 /* power management */
136 unsigned int num_pwrs;
137 hda_nid_t *pwr_nids;
138
2f2f4251 139 /* playback */
b22b4821
MR		 140 struct hda_input_mux *mono_mux;
141 unsigned int cur_mmux;
2f2f4251 142 struct hda_multi_out multiout;
3cc08dc6 143 hda_nid_t dac_nids[5];
2f2f4251
M		 144
145 /* capture */
146 hda_nid_t *adc_nids;
2f2f4251 147 unsigned int num_adcs;
dabbed6f
M		 148 hda_nid_t *mux_nids;
149 unsigned int num_muxes;
8b65727b
MP		 150 hda_nid_t *dmic_nids;
151 unsigned int num_dmics;
e1f0d669 152 hda_nid_t *dmux_nids;
1697055e 153 unsigned int num_dmuxes;
dabbed6f 154 hda_nid_t dig_in_nid;
b22b4821 155 hda_nid_t mono_nid;
2f2f4251 156
2f2f4251
M		 157 /* pin widgets */
158 hda_nid_t *pin_nids;
159 unsigned int num_pins;
2f2f4251 160 unsigned int *pin_configs;
11b44bbd 161 unsigned int *bios_pin_configs;
2f2f4251
M		 162
163 /* codec specific stuff */
164 struct hda_verb *init;
c8b6bf9b 165 struct snd_kcontrol_new *mixer;
2f2f4251
M		 166
167 /* capture source */
8b65727b 168 struct hda_input_mux *dinput_mux;
e1f0d669 169 unsigned int cur_dmux[2];
c7d4b2fa 170 struct hda_input_mux *input_mux;
3cc08dc6 171 unsigned int cur_mux[3];
2f2f4251 172
403d1944
MP		 173 /* i/o switches */
174 unsigned int io_switch[2];
0fb87bb4 175 unsigned int clfe_swap;
5f10c4a9 176 unsigned int aloopback;
2f2f4251 177
c7d4b2fa
M		 178 struct hda_pcm pcm_rec[2]; /* PCM information */
179
180 /* dynamic controls and input_mux */
181 struct auto_pin_cfg autocfg;
182 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 183 struct snd_kcontrol_new *kctl_alloc;
8b65727b 184 struct hda_input_mux private_dimux;
c7d4b2fa 185 struct hda_input_mux private_imux;
b22b4821 186 struct hda_input_mux private_mono_mux;
2134ea4f
TI		 187
188 /* virtual master */
189 unsigned int vmaster_tlv[4];
2f2f4251
M		 190};
191
192static hda_nid_t stac9200_adc_nids[1] = {
193 0x03,
194};
195
196static hda_nid_t stac9200_mux_nids[1] = {
197 0x0c,
198};
199
200static hda_nid_t stac9200_dac_nids[1] = {
201 0x02,
202};
203
a64135a2
MR		 204static hda_nid_t stac92hd73xx_pwr_nids[8] = {
205 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
206 0x0f, 0x10, 0x11
207};
208
e1f0d669
MR		 209static hda_nid_t stac92hd73xx_adc_nids[2] = {
210 0x1a, 0x1b
211};
212
213#define STAC92HD73XX_NUM_DMICS 2
214static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
215 0x13, 0x14, 0
216};
217
218#define STAC92HD73_DAC_COUNT 5
219static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
220 0x15, 0x16, 0x17, 0x18, 0x19,
221};
222
223static hda_nid_t stac92hd73xx_mux_nids[4] = {
224 0x28, 0x29, 0x2a, 0x2b,
225};
226
227static hda_nid_t stac92hd73xx_dmux_nids[2] = {
228 0x20, 0x21,
229};
230
a64135a2
MR		 231static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
232 0x0a, 0x0d, 0x0f
233};
234
e035b841
MR		 235static hda_nid_t stac92hd71bxx_adc_nids[2] = {
236 0x12, 0x13,
237};
238
239static hda_nid_t stac92hd71bxx_mux_nids[2] = {
240 0x1a, 0x1b
241};
242
e1f0d669
MR		 243static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
244 0x1c,
245};
246
e035b841
MR		 247static hda_nid_t stac92hd71bxx_dac_nids[2] = {
248 0x10, /*0x11, */
249};
250
251#define STAC92HD71BXX_NUM_DMICS 2
252static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
253 0x18, 0x19, 0
254};
255
8e21c34c
TD		 256static hda_nid_t stac925x_adc_nids[1] = {
257 0x03,
258};
259
260static hda_nid_t stac925x_mux_nids[1] = {
261 0x0f,
262};
263
264static hda_nid_t stac925x_dac_nids[1] = {
265 0x02,
266};
267
f6e9852a
TI		 268#define STAC925X_NUM_DMICS 1
269static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
270 0x15, 0
2c11f955
TD		 271};
272
1697055e
TI		 273static hda_nid_t stac925x_dmux_nids[1] = {
274 0x14,
275};
276
2f2f4251
M		 277static hda_nid_t stac922x_adc_nids[2] = {
278 0x06, 0x07,
279};
280
281static hda_nid_t stac922x_mux_nids[2] = {
282 0x12, 0x13,
283};
284
3cc08dc6
MP		 285static hda_nid_t stac927x_adc_nids[3] = {
286 0x07, 0x08, 0x09
287};
288
289static hda_nid_t stac927x_mux_nids[3] = {
290 0x15, 0x16, 0x17
291};
292
e1f0d669
MR		 293static hda_nid_t stac927x_dmux_nids[1] = {
294 0x1b,
295};
296
7f16859a
MR		 297#define STAC927X_NUM_DMICS 2
298static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
299 0x13, 0x14, 0
300};
301
f3302a59
MP		 302static hda_nid_t stac9205_adc_nids[2] = {
303 0x12, 0x13
304};
305
306static hda_nid_t stac9205_mux_nids[2] = {
307 0x19, 0x1a
308};
309
e1f0d669 310static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 311 0x1d,
e1f0d669
MR		 312};
313
f6e9852a
TI		 314#define STAC9205_NUM_DMICS 2
315static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
316 0x17, 0x18, 0
8b65727b
MP		 317};
318
c7d4b2fa 319static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 320 0x08, 0x09, 0x0d, 0x0e,
321 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 322};
323
8e21c34c
TD		 324static hda_nid_t stac925x_pin_nids[8] = {
325 0x07, 0x08, 0x0a, 0x0b,
326 0x0c, 0x0d, 0x10, 0x11,
327};
328
2f2f4251
M		 329static hda_nid_t stac922x_pin_nids[10] = {
330 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
331 0x0f, 0x10, 0x11, 0x15, 0x1b,
332};
333
e1f0d669
MR		 334static hda_nid_t stac92hd73xx_pin_nids[12] = {
335 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
336 0x0f, 0x10, 0x11, 0x12, 0x13,
337 0x14, 0x22
338};
339
e035b841
MR		 340static hda_nid_t stac92hd71bxx_pin_nids[10] = {
341 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
342 0x0f, 0x14, 0x18, 0x19, 0x1e,
343};
344
3cc08dc6
MP		 345static hda_nid_t stac927x_pin_nids[14] = {
346 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
347 0x0f, 0x10, 0x11, 0x12, 0x13,
348 0x14, 0x21, 0x22, 0x23,
349};
350
f3302a59
MP		 351static hda_nid_t stac9205_pin_nids[12] = {
352 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
353 0x0f, 0x14, 0x16, 0x17, 0x18,
354 0x21, 0x22,
f3302a59
MP		 355};
356
8b65727b
MP		 357static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
358 struct snd_ctl_elem_info *uinfo)
359{
360 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
361 struct sigmatel_spec *spec = codec->spec;
362 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
363}
364
365static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
366 struct snd_ctl_elem_value *ucontrol)
367{
368 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
369 struct sigmatel_spec *spec = codec->spec;
e1f0d669 370 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 371
e1f0d669 372 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 373 return 0;
374}
375
376static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
377 struct snd_ctl_elem_value *ucontrol)
378{
379 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
380 struct sigmatel_spec *spec = codec->spec;
e1f0d669 381 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 382
383 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 384 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 385}
386
c8b6bf9b 387static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 388{
389 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
390 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 391 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 392}
393
c8b6bf9b 394static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 395{
396 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
397 struct sigmatel_spec *spec = codec->spec;
398 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
399
400 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
401 return 0;
402}
403
c8b6bf9b 404static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 405{
406 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
407 struct sigmatel_spec *spec = codec->spec;
408 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
409
c7d4b2fa 410 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 411 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
412}
413
b22b4821
MR		 414static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
415 struct snd_ctl_elem_info *uinfo)
416{
417 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
418 struct sigmatel_spec *spec = codec->spec;
419 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
420}
421
422static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
423 struct snd_ctl_elem_value *ucontrol)
424{
425 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
426 struct sigmatel_spec *spec = codec->spec;
427
428 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
429 return 0;
430}
431
432static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
433 struct snd_ctl_elem_value *ucontrol)
434{
435 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
436 struct sigmatel_spec *spec = codec->spec;
437
438 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
439 spec->mono_nid, &spec->cur_mmux);
440}
441
5f10c4a9
ML		 442#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
443
444static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
445 struct snd_ctl_elem_value *ucontrol)
446{
447 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 448 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 449 struct sigmatel_spec *spec = codec->spec;
450
e1f0d669
MR		 451 ucontrol->value.integer.value[0] = !!(spec->aloopback &
452 (spec->aloopback_mask << idx));
5f10c4a9
ML		 453 return 0;
454}
455
456static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
457 struct snd_ctl_elem_value *ucontrol)
458{
459 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
460 struct sigmatel_spec *spec = codec->spec;
e1f0d669 461 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 462 unsigned int dac_mode;
e1f0d669 463 unsigned int val, idx_val;
5f10c4a9 464
e1f0d669
MR		 465 idx_val = spec->aloopback_mask << idx;
466 if (ucontrol->value.integer.value[0])
467 val = spec->aloopback | idx_val;
468 else
469 val = spec->aloopback & ~idx_val;
68ea7b2f 470 if (spec->aloopback == val)
5f10c4a9
ML		 471 return 0;
472
68ea7b2f 473 spec->aloopback = val;
5f10c4a9 474
e1f0d669
MR		 475 /* Only return the bits defined by the shift value of the
476 * first two bytes of the mask
477 */
5f10c4a9 478 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 479 kcontrol->private_value & 0xFFFF, 0x0);
480 dac_mode >>= spec->aloopback_shift;
5f10c4a9 481
e1f0d669 482 if (spec->aloopback & idx_val) {
5f10c4a9 483 snd_hda_power_up(codec);
e1f0d669 484 dac_mode |= idx_val;
5f10c4a9
ML		 485 } else {
486 snd_hda_power_down(codec);
e1f0d669 487 dac_mode &= ~idx_val;
5f10c4a9
ML		 488 }
489
490 snd_hda_codec_write_cache(codec, codec->afg, 0,
491 kcontrol->private_value >> 16, dac_mode);
492
493 return 1;
494}
495
c7d4b2fa 496static struct hda_verb stac9200_core_init[] = {
2f2f4251 497 /* set dac0mux for dac converter */
c7d4b2fa 498 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 499 {}
500};
501
1194b5b7
TI		 502static struct hda_verb stac9200_eapd_init[] = {
503 /* set dac0mux for dac converter */
504 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
505 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
506 {}
507};
508
e1f0d669
MR		 509static struct hda_verb stac92hd73xx_6ch_core_init[] = {
510 /* set master volume and direct control */
511 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
512 /* setup audio connections */
513 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
514 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
515 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
516 /* setup adcs to point to mixer */
517 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
518 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 519 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
520 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
521 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
522 /* setup import muxs */
523 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
524 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
525 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
526 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
527 {}
528};
529
530static struct hda_verb stac92hd73xx_8ch_core_init[] = {
531 /* set master volume and direct control */
532 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
533 /* setup audio connections */
534 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
535 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
536 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
537 /* connect hp ports to dac3 */
538 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
539 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
540 /* setup adcs to point to mixer */
541 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
542 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 543 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
544 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
545 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
546 /* setup import muxs */
547 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
548 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
549 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
550 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
551 {}
552};
553
554static struct hda_verb stac92hd73xx_10ch_core_init[] = {
555 /* set master volume and direct control */
556 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
557 /* setup audio connections */
558 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
559 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
560 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
561 /* dac3 is connected to import3 mux */
562 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
563 /* connect hp ports to dac4 */
564 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
565 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
566 /* setup adcs to point to mixer */
567 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
568 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 569 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
570 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
571 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
572 /* setup import muxs */
573 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
574 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
575 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
576 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
577 {}
578};
579
e035b841 580static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 581 /* set master volume and direct control */
582 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
583 /* connect headphone jack to dac1 */
584 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
585 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
586 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
587 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
588 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
589 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 590};
591
592static struct hda_verb stac92hd71bxx_analog_core_init[] = {
e035b841
MR		 593 /* set master volume and direct control */
594 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
595 /* connect headphone jack to dac1 */
596 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
9b35947f
MR		 597 /* connect ports 0d and 0f to audio mixer */
598 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
599 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
a64135a2 600 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
9b35947f
MR		 601 /* unmute dac0 input in audio mixer */
602 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
e035b841
MR		 603 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
604 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
605 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
606 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 607 {}
608};
609
8e21c34c
TD		 610static struct hda_verb stac925x_core_init[] = {
611 /* set dac0mux for dac converter */
612 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
613 {}
614};
615
c7d4b2fa 616static struct hda_verb stac922x_core_init[] = {
2f2f4251 617 /* set master volume and direct control */
c7d4b2fa 618 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 619 {}
620};
621
93ed1503 622static struct hda_verb d965_core_init[] = {
19039bd0 623 /* set master volume and direct control */
93ed1503 624 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 625 /* unmute node 0x1b */
626 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
627 /* select node 0x03 as DAC */
628 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
629 {}
630};
631
3cc08dc6
MP		 632static struct hda_verb stac927x_core_init[] = {
633 /* set master volume and direct control */
634 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
635 {}
636};
637
f3302a59
MP		 638static struct hda_verb stac9205_core_init[] = {
639 /* set master volume and direct control */
640 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
641 {}
642};
643
b22b4821
MR		 644#define STAC_MONO_MUX \
645 { \
646 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
647 .name = "Mono Mux", \
648 .count = 1, \
649 .info = stac92xx_mono_mux_enum_info, \
650 .get = stac92xx_mono_mux_enum_get, \
651 .put = stac92xx_mono_mux_enum_put, \
652 }
653
9e05b7a3 654#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 655 { \
656 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
657 .name = "Input Source", \
9e05b7a3 658 .count = cnt, \
ca7c5a8b
ML		 659 .info = stac92xx_mux_enum_info, \
660 .get = stac92xx_mux_enum_get, \
661 .put = stac92xx_mux_enum_put, \
662 }
663
e1f0d669 664#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 665 { \
666 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
667 .name = "Analog Loopback", \
e1f0d669 668 .count = cnt, \
5f10c4a9
ML		 669 .info = stac92xx_aloopback_info, \
670 .get = stac92xx_aloopback_get, \
671 .put = stac92xx_aloopback_put, \
672 .private_value = verb_read | (verb_write << 16), \
673 }
674
c8b6bf9b 675static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 676 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
677 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 678 STAC_INPUT_SOURCE(1),
2f2f4251
M		 679 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
680 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 681 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 682 { } /* end */
683};
684
e1f0d669 685static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 686 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
687
e1f0d669
MR		 688 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
689 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
690
691 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
692 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
693
694 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
695 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
696
697 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
698 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
699
700 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
701 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
702
703 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
704 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
705
706 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
707 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
708 { } /* end */
709};
710
711static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 712 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
713
e1f0d669
MR		 714 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
715 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
716
717 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
718 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
719
720 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
721 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
722
723 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
724 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
725
726 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
727 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
728
729 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
730 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
731
732 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
733 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
734 { } /* end */
735};
736
737static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 738 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
739
e1f0d669
MR		 740 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
741 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
742
743 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
744 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
745
746 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
747 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
748
749 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
750 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
751
752 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
753 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
754
755 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
756 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
757
758 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
759 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
760 { } /* end */
761};
762
541eee87 763static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 764 STAC_INPUT_SOURCE(2),
e035b841 765
9b35947f
MR		 766 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
767 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
768 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
769
770 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
771 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
772 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 773
9b35947f
MR		 774 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
775 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 776 { } /* end */
777};
778
541eee87 779static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 780 STAC_INPUT_SOURCE(2),
781 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
782
541eee87
MR		 783 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
784 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
785 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
786
787 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
788 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
789 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
790 { } /* end */
791};
792
8e21c34c 793static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 794 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 795 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
796 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
797 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
798 { } /* end */
799};
800
9e05b7a3 801static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 802 STAC_INPUT_SOURCE(2),
e1f0d669 803 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 804
805 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
806 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
807 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
808
809 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
810 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
811 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
812
2f2f4251
M		 813 { } /* end */
814};
815
19039bd0 816/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 817static struct snd_kcontrol_new stac922x_mixer[] = {
818 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 819 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
820 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
821 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
822
823 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
824 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
825 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 826 { } /* end */
827};
828
9e05b7a3 829
d1d985f0 830static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 831 STAC_INPUT_SOURCE(3),
e1f0d669 832 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 833
9e05b7a3
ML		 834 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
835 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
836 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
837
838 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
839 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
840 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
841
842 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
843 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
844 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 845 { } /* end */
846};
847
1697055e
TI		 848static struct snd_kcontrol_new stac_dmux_mixer = {
849 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
850 .name = "Digital Input Source",
851 /* count set later */
852 .info = stac92xx_dmux_enum_info,
853 .get = stac92xx_dmux_enum_get,
854 .put = stac92xx_dmux_enum_put,
855};
856
2134ea4f
TI		 857static const char *slave_vols[] = {
858 "Front Playback Volume",
859 "Surround Playback Volume",
860 "Center Playback Volume",
861 "LFE Playback Volume",
862 "Side Playback Volume",
863 "Headphone Playback Volume",
864 "Headphone Playback Volume",
865 "Speaker Playback Volume",
866 "External Speaker Playback Volume",
867 "Speaker2 Playback Volume",
868 NULL
869};
870
871static const char *slave_sws[] = {
872 "Front Playback Switch",
873 "Surround Playback Switch",
874 "Center Playback Switch",
875 "LFE Playback Switch",
876 "Side Playback Switch",
877 "Headphone Playback Switch",
878 "Headphone Playback Switch",
879 "Speaker Playback Switch",
880 "External Speaker Playback Switch",
881 "Speaker2 Playback Switch",
edb54a55 882 "IEC958 Playback Switch",
2134ea4f
TI		 883 NULL
884};
885
2f2f4251
M		 886static int stac92xx_build_controls(struct hda_codec *codec)
887{
888 struct sigmatel_spec *spec = codec->spec;
889 int err;
c7d4b2fa 890 int i;
2f2f4251
M		 891
892 err = snd_hda_add_new_ctls(codec, spec->mixer);
893 if (err < 0)
894 return err;
c7d4b2fa
M		 895
896 for (i = 0; i < spec->num_mixers; i++) {
897 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
898 if (err < 0)
899 return err;
900 }
1697055e
TI		 901 if (spec->num_dmuxes > 0) {
902 stac_dmux_mixer.count = spec->num_dmuxes;
903 err = snd_ctl_add(codec->bus->card,
904 snd_ctl_new1(&stac_dmux_mixer, codec));
905 if (err < 0)
906 return err;
907 }
c7d4b2fa 908
dabbed6f
M		 909 if (spec->multiout.dig_out_nid) {
910 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
911 if (err < 0)
912 return err;
913 }
914 if (spec->dig_in_nid) {
915 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
916 if (err < 0)
917 return err;
918 }
2134ea4f
TI		 919
920 /* if we have no master control, let's create it */
921 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
922 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
923 HDA_OUTPUT, spec->vmaster_tlv);
924 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
925 spec->vmaster_tlv, slave_vols);
926 if (err < 0)
927 return err;
928 }
929 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
930 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
931 NULL, slave_sws);
932 if (err < 0)
933 return err;
934 }
935
dabbed6f 936 return 0;
2f2f4251
M		 937}
938
403d1944 939static unsigned int ref9200_pin_configs[8] = {
dabbed6f 940 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 941 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
942};
943
dfe495d0
TI		 944/*
945 STAC 9200 pin configs for
946 102801A8
947 102801DE
948 102801E8
949*/
950static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 951 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
952 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 953};
954
955/*
956 STAC 9200 pin configs for
957 102801C0
958 102801C1
959*/
960static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 961 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
962 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 963};
964
965/*
966 STAC 9200 pin configs for
967 102801C4 (Dell Dimension E310)
968 102801C5
969 102801C7
970 102801D9
971 102801DA
972 102801E3
973*/
974static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 975 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
976 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 977};
978
979
980/*
981 STAC 9200-32 pin configs for
982 102801B5 (Dell Inspiron 630m)
983 102801D8 (Dell Inspiron 640m)
984*/
985static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 986 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
987 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 988};
989
990/*
991 STAC 9200-32 pin configs for
992 102801C2 (Dell Latitude D620)
993 102801C8
994 102801CC (Dell Latitude D820)
995 102801D4
996 102801D6
997*/
998static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 999 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1000 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1001};
1002
1003/*
1004 STAC 9200-32 pin configs for
1005 102801CE (Dell XPS M1710)
1006 102801CF (Dell Precision M90)
1007*/
1008static unsigned int dell9200_m23_pin_configs[8] = {
1009 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1010 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1011};
1012
1013/*
1014 STAC 9200-32 pin configs for
1015 102801C9
1016 102801CA
1017 102801CB (Dell Latitude 120L)
1018 102801D3
1019*/
1020static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1021 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1022 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1023};
1024
1025/*
1026 STAC 9200-32 pin configs for
1027 102801BD (Dell Inspiron E1505n)
1028 102801EE
1029 102801EF
1030*/
1031static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1032 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1033 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1034};
1035
1036/*
1037 STAC 9200-32 pin configs for
1038 102801F5 (Dell Inspiron 1501)
1039 102801F6
1040*/
1041static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1042 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1043 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1044};
1045
1046/*
1047 STAC 9200-32
1048 102801CD (Dell Inspiron E1705/9400)
1049*/
1050static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1051 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1052 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1053};
1054
1055
f5fcc13c
TI		 1056static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1057 [STAC_REF] = ref9200_pin_configs,
dfe495d0
TI		 1058 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1059 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1060 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1061 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1062 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1063 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1064 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1065 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1066 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1067 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 1068};
1069
f5fcc13c
TI		 1070static const char *stac9200_models[STAC_9200_MODELS] = {
1071 [STAC_REF] = "ref",
dfe495d0
TI		 1072 [STAC_9200_DELL_D21] = "dell-d21",
1073 [STAC_9200_DELL_D22] = "dell-d22",
1074 [STAC_9200_DELL_D23] = "dell-d23",
1075 [STAC_9200_DELL_M21] = "dell-m21",
1076 [STAC_9200_DELL_M22] = "dell-m22",
1077 [STAC_9200_DELL_M23] = "dell-m23",
1078 [STAC_9200_DELL_M24] = "dell-m24",
1079 [STAC_9200_DELL_M25] = "dell-m25",
1080 [STAC_9200_DELL_M26] = "dell-m26",
1081 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1082 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 1083};
1084
1085static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1086 /* SigmaTel reference board */
1087 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1088 "DFI LanParty", STAC_REF),
e7377071 1089 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1090 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1091 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1092 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1093 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1094 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1095 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1096 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1097 "unknown Dell", STAC_9200_DELL_D22),
1098 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1099 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1100 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1101 "Dell Latitude D620", STAC_9200_DELL_M22),
1102 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1103 "unknown Dell", STAC_9200_DELL_D23),
1104 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1105 "unknown Dell", STAC_9200_DELL_D23),
1106 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1107 "unknown Dell", STAC_9200_DELL_M22),
1108 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1109 "unknown Dell", STAC_9200_DELL_M24),
1110 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1111 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1113 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1114 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1115 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1116 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1117 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1119 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1120 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1121 "Dell Precision M90", STAC_9200_DELL_M23),
1122 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1123 "unknown Dell", STAC_9200_DELL_M22),
1124 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1125 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1126 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1127 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1128 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1129 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1130 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1131 "unknown Dell", STAC_9200_DELL_D23),
1132 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1133 "unknown Dell", STAC_9200_DELL_D23),
1134 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1135 "unknown Dell", STAC_9200_DELL_D21),
1136 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1137 "unknown Dell", STAC_9200_DELL_D23),
1138 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1139 "unknown Dell", STAC_9200_DELL_D21),
1140 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1141 "unknown Dell", STAC_9200_DELL_M25),
1142 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1143 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1144 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1145 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1146 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1147 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 1148 /* Panasonic */
1149 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 1150 /* Gateway machines needs EAPD to be set on resume */
1151 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1152 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1153 STAC_9200_GATEWAY),
1154 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1155 STAC_9200_GATEWAY),
403d1944
MP		 1156 {} /* terminator */
1157};
1158
8e21c34c
TD		 1159static unsigned int ref925x_pin_configs[8] = {
1160 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1161 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1162};
1163
1164static unsigned int stac925x_MA6_pin_configs[8] = {
1165 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1166 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1167};
1168
2c11f955
TD		 1169static unsigned int stac925x_PA6_pin_configs[8] = {
1170 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1171 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1172};
1173
8e21c34c 1174static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1175 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1176 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1177};
1178
1179static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1180 [STAC_REF] = ref925x_pin_configs,
1181 [STAC_M2_2] = stac925xM2_2_pin_configs,
1182 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1183 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1184};
1185
1186static const char *stac925x_models[STAC_925x_MODELS] = {
1187 [STAC_REF] = "ref",
1188 [STAC_M2_2] = "m2-2",
1189 [STAC_MA6] = "m6",
2c11f955 1190 [STAC_PA6] = "pa6",
8e21c34c
TD		 1191};
1192
1193static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1194 /* SigmaTel reference board */
1195 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1196 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1197 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1198 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1199 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1200 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1201 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1202 {} /* terminator */
1203};
1204
e1f0d669
MR		 1205static unsigned int ref92hd73xx_pin_configs[12] = {
1206 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1207 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1208 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
1209};
1210
1211static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
1212 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1213};
1214
1215static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1216 [STAC_92HD73XX_REF] = "ref",
1217};
1218
1219static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1220 /* SigmaTel reference board */
1221 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1222 "DFI LanParty", STAC_92HD73XX_REF),
1223 {} /* terminator */
1224};
1225
e035b841
MR		 1226static unsigned int ref92hd71bxx_pin_configs[10] = {
1227 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1228 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1229 0x90a000f0, 0x01452050,
1230};
1231
1232static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1233 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
1234};
1235
1236static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1237 [STAC_92HD71BXX_REF] = "ref",
1238};
1239
1240static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1241 /* SigmaTel reference board */
1242 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1243 "DFI LanParty", STAC_92HD71BXX_REF),
1244 {} /* terminator */
1245};
1246
403d1944
MP		 1247static unsigned int ref922x_pin_configs[10] = {
1248 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1249 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1250 0x40000100, 0x40000100,
1251};
1252
dfe495d0
TI		 1253/*
1254 STAC 922X pin configs for
1255 102801A7
1256 102801AB
1257 102801A9
1258 102801D1
1259 102801D2
1260*/
1261static unsigned int dell_922x_d81_pin_configs[10] = {
1262 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1263 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1264 0x01813122, 0x400001f2,
1265};
1266
1267/*
1268 STAC 922X pin configs for
1269 102801AC
1270 102801D0
1271*/
1272static unsigned int dell_922x_d82_pin_configs[10] = {
1273 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1274 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1275 0x01813122, 0x400001f1,
1276};
1277
1278/*
1279 STAC 922X pin configs for
1280 102801BF
1281*/
1282static unsigned int dell_922x_m81_pin_configs[10] = {
1283 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1284 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1285 0x40C003f1, 0x405003f0,
1286};
1287
1288/*
1289 STAC 9221 A1 pin configs for
1290 102801D7 (Dell XPS M1210)
1291*/
1292static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1293 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1294 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1295 0x508003f3, 0x405003f4,
1296};
1297
403d1944 1298static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1299 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1300 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1301 0x02a19120, 0x40000100,
1302};
1303
1304static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1305 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1306 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1307 0x02a19320, 0x40000100,
1308};
1309
5d5d3bc3
IZ		 1310static unsigned int intel_mac_v1_pin_configs[10] = {
1311 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1312 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1313 0x400000fc, 0x400000fb,
1314};
1315
1316static unsigned int intel_mac_v2_pin_configs[10] = {
1317 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1318 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1319 0x400000fc, 0x400000fb,
6f0778d8
NB		 1320};
1321
5d5d3bc3
IZ		 1322static unsigned int intel_mac_v3_pin_configs[10] = {
1323 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1324 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1325 0x400000fc, 0x400000fb,
1326};
1327
5d5d3bc3
IZ		 1328static unsigned int intel_mac_v4_pin_configs[10] = {
1329 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1330 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1331 0x400000fc, 0x400000fb,
1332};
1333
5d5d3bc3
IZ		 1334static unsigned int intel_mac_v5_pin_configs[10] = {
1335 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1336 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1337 0x400000fc, 0x400000fb,
0dae0f83
TI		 1338};
1339
76c08828 1340
19039bd0 1341static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1342 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1343 [STAC_D945GTP3] = d945gtp3_pin_configs,
1344 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1345 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1346 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1347 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1348 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1349 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1350 /* for backward compatibility */
5d5d3bc3
IZ		 1351 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1352 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1353 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1354 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1355 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1356 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1357 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1358 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1359 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1360 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1361};
1362
f5fcc13c
TI		 1363static const char *stac922x_models[STAC_922X_MODELS] = {
1364 [STAC_D945_REF] = "ref",
1365 [STAC_D945GTP5] = "5stack",
1366 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1367 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1368 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1369 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1370 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1371 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1372 /* for backward compatibility */
f5fcc13c 1373 [STAC_MACMINI] = "macmini",
3fc24d85 1374 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1375 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1376 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1377 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1378 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1379 [STAC_922X_DELL_D81] = "dell-d81",
1380 [STAC_922X_DELL_D82] = "dell-d82",
1381 [STAC_922X_DELL_M81] = "dell-m81",
1382 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1383};
1384
1385static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1386 /* SigmaTel reference board */
1387 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1388 "DFI LanParty", STAC_D945_REF),
1389 /* Intel 945G based systems */
1390 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1391 "Intel D945G", STAC_D945GTP3),
1392 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1393 "Intel D945G", STAC_D945GTP3),
1394 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1395 "Intel D945G", STAC_D945GTP3),
1396 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1397 "Intel D945G", STAC_D945GTP3),
1398 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1399 "Intel D945G", STAC_D945GTP3),
1400 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1401 "Intel D945G", STAC_D945GTP3),
1402 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1403 "Intel D945G", STAC_D945GTP3),
1404 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1405 "Intel D945G", STAC_D945GTP3),
1406 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1407 "Intel D945G", STAC_D945GTP3),
1408 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1409 "Intel D945G", STAC_D945GTP3),
1410 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1411 "Intel D945G", STAC_D945GTP3),
1412 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1413 "Intel D945G", STAC_D945GTP3),
1414 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1415 "Intel D945G", STAC_D945GTP3),
1416 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1417 "Intel D945G", STAC_D945GTP3),
1418 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1419 "Intel D945G", STAC_D945GTP3),
1420 /* Intel D945G 5-stack systems */
1421 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1422 "Intel D945G", STAC_D945GTP5),
1423 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1424 "Intel D945G", STAC_D945GTP5),
1425 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1426 "Intel D945G", STAC_D945GTP5),
1427 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1428 "Intel D945G", STAC_D945GTP5),
1429 /* Intel 945P based systems */
1430 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1431 "Intel D945P", STAC_D945GTP3),
1432 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1433 "Intel D945P", STAC_D945GTP3),
1434 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1435 "Intel D945P", STAC_D945GTP3),
1436 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1437 "Intel D945P", STAC_D945GTP3),
1438 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1439 "Intel D945P", STAC_D945GTP3),
1440 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1441 "Intel D945P", STAC_D945GTP5),
1442 /* other systems */
1443 /* Apple Mac Mini (early 2006) */
1444 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1445 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1446 /* Dell systems */
1447 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1448 "unknown Dell", STAC_922X_DELL_D81),
1449 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1450 "unknown Dell", STAC_922X_DELL_D81),
1451 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1452 "unknown Dell", STAC_922X_DELL_D81),
1453 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1454 "unknown Dell", STAC_922X_DELL_D82),
1455 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1456 "unknown Dell", STAC_922X_DELL_M81),
1457 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1458 "unknown Dell", STAC_922X_DELL_D82),
1459 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1460 "unknown Dell", STAC_922X_DELL_D81),
1461 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1462 "unknown Dell", STAC_922X_DELL_D81),
1463 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1464 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1465 {} /* terminator */
1466};
1467
3cc08dc6 1468static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1469 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1470 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1471 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1472 0x01c42190, 0x40000100,
3cc08dc6
MP		 1473};
1474
93ed1503 1475static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1476 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1477 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1478 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1479 0x40000100, 0x40000100
1480};
1481
93ed1503
TD		 1482static unsigned int d965_5st_pin_configs[14] = {
1483 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1484 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1485 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1486 0x40000100, 0x40000100
1487};
1488
4ff076e5
TD		 1489static unsigned int dell_3st_pin_configs[14] = {
1490 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1491 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1492 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1493 0x40c003fc, 0x40000100
1494};
1495
93ed1503 1496static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1497 [STAC_D965_REF] = ref927x_pin_configs,
1498 [STAC_D965_3ST] = d965_3st_pin_configs,
1499 [STAC_D965_5ST] = d965_5st_pin_configs,
1500 [STAC_DELL_3ST] = dell_3st_pin_configs,
1501 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1502};
1503
f5fcc13c 1504static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1505 [STAC_D965_REF] = "ref",
1506 [STAC_D965_3ST] = "3stack",
1507 [STAC_D965_5ST] = "5stack",
1508 [STAC_DELL_3ST] = "dell-3stack",
1509 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1510};
1511
1512static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1513 /* SigmaTel reference board */
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1515 "DFI LanParty", STAC_D965_REF),
81d3dbde 1516 /* Intel 946 based systems */
f5fcc13c
TI		 1517 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1519 /* 965 based 3 stack systems */
f5fcc13c
TI		 1520 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1536 /* Dell 3 stack systems */
8e9068b1 1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1541 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1
MR		 1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1550 /* 965 based 5 stack systems */
f5fcc13c
TI		 1551 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1552 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1554 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1558 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1560 {} /* terminator */
1561};
1562
f3302a59
MP		 1563static unsigned int ref9205_pin_configs[12] = {
1564 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1565 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1566 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1567};
1568
dfe495d0
TI		 1569/*
1570 STAC 9205 pin configs for
1571 102801F1
1572 102801F2
1573 102801FC
1574 102801FD
1575 10280204
1576 1028021F
3fa2ef74 1577 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1578*/
1579static unsigned int dell_9205_m42_pin_configs[12] = {
1580 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1581 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1582 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1583};
1584
1585/*
1586 STAC 9205 pin configs for
1587 102801F9
1588 102801FA
1589 102801FE
1590 102801FF (Dell Precision M4300)
1591 10280206
1592 10280200
1593 10280201
1594*/
1595static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1596 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1597 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1598 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1599};
1600
dfe495d0 1601static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1602 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1603 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1604 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1605};
1606
f5fcc13c 1607static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1608 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1609 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1610 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1611 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1612};
1613
f5fcc13c
TI		 1614static const char *stac9205_models[STAC_9205_MODELS] = {
1615 [STAC_9205_REF] = "ref",
dfe495d0 1616 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1617 [STAC_9205_DELL_M43] = "dell-m43",
1618 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1619};
1620
1621static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1622 /* SigmaTel reference board */
1623 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1624 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1625 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1626 "unknown Dell", STAC_9205_DELL_M42),
1627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1628 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1629 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1630 "Dell Precision", STAC_9205_DELL_M43),
1631 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1632 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1633 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1634 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1635 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1636 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1637 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1638 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1639 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1640 "unknown Dell", STAC_9205_DELL_M42),
1641 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1642 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1643 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1644 "Dell Precision", STAC_9205_DELL_M43),
1645 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1646 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1647 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1648 "Dell Precision", STAC_9205_DELL_M43),
1649 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1650 "Dell Inspiron", STAC_9205_DELL_M44),
1651 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1652 "Dell Inspiron", STAC_9205_DELL_M44),
1653 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1654 "Dell Inspiron", STAC_9205_DELL_M44),
1655 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1656 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1657 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1658 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1659 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1660 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1661 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1662 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1663 {} /* terminator */
1664};
1665
11b44bbd
RF		 1666static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1667{
1668 int i;
1669 struct sigmatel_spec *spec = codec->spec;
1670
1671 if (! spec->bios_pin_configs) {
1672 spec->bios_pin_configs = kcalloc(spec->num_pins,
1673 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1674 if (! spec->bios_pin_configs)
1675 return -ENOMEM;
1676 }
1677
1678 for (i = 0; i < spec->num_pins; i++) {
1679 hda_nid_t nid = spec->pin_nids[i];
1680 unsigned int pin_cfg;
1681
1682 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1683 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1684 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1685 nid, pin_cfg);
1686 spec->bios_pin_configs[i] = pin_cfg;
1687 }
1688
1689 return 0;
1690}
1691
87d48363
MR		 1692static void stac92xx_set_config_reg(struct hda_codec *codec,
1693 hda_nid_t pin_nid, unsigned int pin_config)
1694{
1695 int i;
1696 snd_hda_codec_write(codec, pin_nid, 0,
1697 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1698 pin_config & 0x000000ff);
1699 snd_hda_codec_write(codec, pin_nid, 0,
1700 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1701 (pin_config & 0x0000ff00) >> 8);
1702 snd_hda_codec_write(codec, pin_nid, 0,
1703 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1704 (pin_config & 0x00ff0000) >> 16);
1705 snd_hda_codec_write(codec, pin_nid, 0,
1706 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1707 pin_config >> 24);
1708 i = snd_hda_codec_read(codec, pin_nid, 0,
1709 AC_VERB_GET_CONFIG_DEFAULT,
1710 0x00);
1711 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1712 pin_nid, i);
1713}
1714
2f2f4251
M		 1715static void stac92xx_set_config_regs(struct hda_codec *codec)
1716{
1717 int i;
1718 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1719
87d48363
MR		 1720 if (!spec->pin_configs)
1721 return;
11b44bbd 1722
87d48363
MR		 1723 for (i = 0; i < spec->num_pins; i++)
1724 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1725 spec->pin_configs[i]);
2f2f4251 1726}
2f2f4251 1727
dabbed6f 1728/*
c7d4b2fa 1729 * Analog playback callbacks
dabbed6f 1730 */
c7d4b2fa
M		 1731static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1732 struct hda_codec *codec,
c8b6bf9b 1733 struct snd_pcm_substream *substream)
2f2f4251 1734{
dabbed6f 1735 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1736 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1737}
1738
2f2f4251
M		 1739static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1740 struct hda_codec *codec,
1741 unsigned int stream_tag,
1742 unsigned int format,
c8b6bf9b 1743 struct snd_pcm_substream *substream)
2f2f4251
M		 1744{
1745 struct sigmatel_spec *spec = codec->spec;
403d1944 1746 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1747}
1748
1749static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1750 struct hda_codec *codec,
c8b6bf9b 1751 struct snd_pcm_substream *substream)
2f2f4251
M		 1752{
1753 struct sigmatel_spec *spec = codec->spec;
1754 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1755}
1756
dabbed6f
M		 1757/*
1758 * Digital playback callbacks
1759 */
1760static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1761 struct hda_codec *codec,
c8b6bf9b 1762 struct snd_pcm_substream *substream)
dabbed6f
M		 1763{
1764 struct sigmatel_spec *spec = codec->spec;
1765 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1766}
1767
1768static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1769 struct hda_codec *codec,
c8b6bf9b 1770 struct snd_pcm_substream *substream)
dabbed6f
M		 1771{
1772 struct sigmatel_spec *spec = codec->spec;
1773 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1774}
1775
6b97eb45
TI		 1776static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1777 struct hda_codec *codec,
1778 unsigned int stream_tag,
1779 unsigned int format,
1780 struct snd_pcm_substream *substream)
1781{
1782 struct sigmatel_spec *spec = codec->spec;
1783 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1784 stream_tag, format, substream);
1785}
1786
dabbed6f 1787
2f2f4251
M		 1788/*
1789 * Analog capture callbacks
1790 */
1791static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1792 struct hda_codec *codec,
1793 unsigned int stream_tag,
1794 unsigned int format,
c8b6bf9b 1795 struct snd_pcm_substream *substream)
2f2f4251
M		 1796{
1797 struct sigmatel_spec *spec = codec->spec;
1798
1799 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1800 stream_tag, 0, format);
1801 return 0;
1802}
1803
1804static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1805 struct hda_codec *codec,
c8b6bf9b 1806 struct snd_pcm_substream *substream)
2f2f4251
M		 1807{
1808 struct sigmatel_spec *spec = codec->spec;
1809
1810 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1811 return 0;
1812}
1813
dabbed6f
M		 1814static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1815 .substreams = 1,
1816 .channels_min = 2,
1817 .channels_max = 2,
1818 /* NID is set in stac92xx_build_pcms */
1819 .ops = {
1820 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1821 .close = stac92xx_dig_playback_pcm_close,
1822 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1823 },
1824};
1825
1826static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1827 .substreams = 1,
1828 .channels_min = 2,
1829 .channels_max = 2,
1830 /* NID is set in stac92xx_build_pcms */
1831};
1832
2f2f4251
M		 1833static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1834 .substreams = 1,
1835 .channels_min = 2,
c7d4b2fa 1836 .channels_max = 8,
2f2f4251
M		 1837 .nid = 0x02, /* NID to query formats and rates */
1838 .ops = {
1839 .open = stac92xx_playback_pcm_open,
1840 .prepare = stac92xx_playback_pcm_prepare,
1841 .cleanup = stac92xx_playback_pcm_cleanup
1842 },
1843};
1844
3cc08dc6
MP		 1845static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1846 .substreams = 1,
1847 .channels_min = 2,
1848 .channels_max = 2,
1849 .nid = 0x06, /* NID to query formats and rates */
1850 .ops = {
1851 .open = stac92xx_playback_pcm_open,
1852 .prepare = stac92xx_playback_pcm_prepare,
1853 .cleanup = stac92xx_playback_pcm_cleanup
1854 },
1855};
1856
2f2f4251 1857static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1858 .channels_min = 2,
1859 .channels_max = 2,
9e05b7a3 1860 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1861 .ops = {
1862 .prepare = stac92xx_capture_pcm_prepare,
1863 .cleanup = stac92xx_capture_pcm_cleanup
1864 },
1865};
1866
1867static int stac92xx_build_pcms(struct hda_codec *codec)
1868{
1869 struct sigmatel_spec *spec = codec->spec;
1870 struct hda_pcm *info = spec->pcm_rec;
1871
1872 codec->num_pcms = 1;
1873 codec->pcm_info = info;
1874
c7d4b2fa 1875 info->name = "STAC92xx Analog";
2f2f4251 1876 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1877 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1878 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1879 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1880
1881 if (spec->alt_switch) {
1882 codec->num_pcms++;
1883 info++;
1884 info->name = "STAC92xx Analog Alt";
1885 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1886 }
2f2f4251 1887
dabbed6f
M		 1888 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1889 codec->num_pcms++;
1890 info++;
1891 info->name = "STAC92xx Digital";
1892 if (spec->multiout.dig_out_nid) {
1893 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1894 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1895 }
1896 if (spec->dig_in_nid) {
1897 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1898 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1899 }
1900 }
1901
2f2f4251
M		 1902 return 0;
1903}
1904
c960a03b
TI		 1905static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1906{
1907 unsigned int pincap = snd_hda_param_read(codec, nid,
1908 AC_PAR_PIN_CAP);
1909 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1910 if (pincap & AC_PINCAP_VREF_100)
1911 return AC_PINCTL_VREF_100;
1912 if (pincap & AC_PINCAP_VREF_80)
1913 return AC_PINCTL_VREF_80;
1914 if (pincap & AC_PINCAP_VREF_50)
1915 return AC_PINCTL_VREF_50;
1916 if (pincap & AC_PINCAP_VREF_GRD)
1917 return AC_PINCTL_VREF_GRD;
1918 return 0;
1919}
1920
403d1944
MP		 1921static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1922
1923{
82beb8fd
TI		 1924 snd_hda_codec_write_cache(codec, nid, 0,
1925 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1926}
1927
a5ce8890 1928#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1929
1930static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1931{
1932 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1933 struct sigmatel_spec *spec = codec->spec;
1934 int io_idx = kcontrol-> private_value & 0xff;
1935
1936 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1937 return 0;
1938}
1939
1940static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1941{
1942 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1943 struct sigmatel_spec *spec = codec->spec;
1944 hda_nid_t nid = kcontrol->private_value >> 8;
1945 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 1946 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 1947
1948 spec->io_switch[io_idx] = val;
1949
1950 if (val)
1951 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1952 else {
1953 unsigned int pinctl = AC_PINCTL_IN_EN;
1954 if (io_idx) /* set VREF for mic */
1955 pinctl |= stac92xx_get_vref(codec, nid);
1956 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1957 }
40c1d308
JZ		 1958
1959 /* check the auto-mute again: we need to mute/unmute the speaker
1960 * appropriately according to the pin direction
1961 */
1962 if (spec->hp_detect)
1963 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
1964
403d1944
MP		 1965 return 1;
1966}
1967
0fb87bb4
ML		 1968#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
1969
1970static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
1971 struct snd_ctl_elem_value *ucontrol)
1972{
1973 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1974 struct sigmatel_spec *spec = codec->spec;
1975
1976 ucontrol->value.integer.value[0] = spec->clfe_swap;
1977 return 0;
1978}
1979
1980static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
1981 struct snd_ctl_elem_value *ucontrol)
1982{
1983 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1984 struct sigmatel_spec *spec = codec->spec;
1985 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 1986 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 1987
68ea7b2f 1988 if (spec->clfe_swap == val)
0fb87bb4
ML		 1989 return 0;
1990
68ea7b2f 1991 spec->clfe_swap = val;
0fb87bb4
ML		 1992
1993 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
1994 spec->clfe_swap ? 0x4 : 0x0);
1995
1996 return 1;
1997}
1998
403d1944
MP		 1999#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2000 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2001 .name = xname, \
2002 .index = 0, \
2003 .info = stac92xx_io_switch_info, \
2004 .get = stac92xx_io_switch_get, \
2005 .put = stac92xx_io_switch_put, \
2006 .private_value = xpval, \
2007 }
2008
0fb87bb4
ML		 2009#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2010 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2011 .name = xname, \
2012 .index = 0, \
2013 .info = stac92xx_clfe_switch_info, \
2014 .get = stac92xx_clfe_switch_get, \
2015 .put = stac92xx_clfe_switch_put, \
2016 .private_value = xpval, \
2017 }
403d1944 2018
c7d4b2fa
M		 2019enum {
2020 STAC_CTL_WIDGET_VOL,
2021 STAC_CTL_WIDGET_MUTE,
09a99959 2022 STAC_CTL_WIDGET_MONO_MUX,
403d1944 2023 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2024 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2025};
2026
c8b6bf9b 2027static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2028 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2029 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2030 STAC_MONO_MUX,
403d1944 2031 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2032 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2033};
2034
2035/* add dynamic controls */
2036static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2037{
c8b6bf9b 2038 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2039
2040 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2041 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2042
2043 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2044 if (! knew)
2045 return -ENOMEM;
2046 if (spec->kctl_alloc) {
2047 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2048 kfree(spec->kctl_alloc);
2049 }
2050 spec->kctl_alloc = knew;
2051 spec->num_kctl_alloc = num;
2052 }
2053
2054 knew = &spec->kctl_alloc[spec->num_kctl_used];
2055 *knew = stac92xx_control_templates[type];
82fe0c58 2056 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2057 if (! knew->name)
2058 return -ENOMEM;
2059 knew->private_value = val;
2060 spec->num_kctl_used++;
2061 return 0;
2062}
2063
403d1944
MP		 2064/* flag inputs as additional dynamic lineouts */
2065static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2066{
2067 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2068 unsigned int wcaps, wtype;
2069 int i, num_dacs = 0;
2070
2071 /* use the wcaps cache to count all DACs available for line-outs */
2072 for (i = 0; i < codec->num_nodes; i++) {
2073 wcaps = codec->wcaps[i];
2074 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2075
7b043899
SL		 2076 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2077 num_dacs++;
2078 }
403d1944 2079
7b043899
SL		 2080 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2081
403d1944
MP		 2082 switch (cfg->line_outs) {
2083 case 3:
2084 /* add line-in as side */
7b043899 2085 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2086 cfg->line_out_pins[cfg->line_outs] =
2087 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2088 spec->line_switch = 1;
2089 cfg->line_outs++;
2090 }
2091 break;
2092 case 2:
2093 /* add line-in as clfe and mic as side */
7b043899 2094 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2095 cfg->line_out_pins[cfg->line_outs] =
2096 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2097 spec->line_switch = 1;
2098 cfg->line_outs++;
2099 }
7b043899 2100 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2101 cfg->line_out_pins[cfg->line_outs] =
2102 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2103 spec->mic_switch = 1;
2104 cfg->line_outs++;
2105 }
2106 break;
2107 case 1:
2108 /* add line-in as surr and mic as clfe */
7b043899 2109 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2110 cfg->line_out_pins[cfg->line_outs] =
2111 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2112 spec->line_switch = 1;
2113 cfg->line_outs++;
2114 }
7b043899 2115 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2116 cfg->line_out_pins[cfg->line_outs] =
2117 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2118 spec->mic_switch = 1;
2119 cfg->line_outs++;
2120 }
2121 break;
2122 }
2123
2124 return 0;
2125}
2126
7b043899
SL		 2127
2128static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2129{
2130 int i;
2131
2132 for (i = 0; i < spec->multiout.num_dacs; i++) {
2133 if (spec->multiout.dac_nids[i] == nid)
2134 return 1;
2135 }
2136
2137 return 0;
2138}
2139
3cc08dc6 2140/*
7b043899
SL		 2141 * Fill in the dac_nids table from the parsed pin configuration
2142 * This function only works when every pin in line_out_pins[]
2143 * contains atleast one DAC in its connection list. Some 92xx
2144 * codecs are not connected directly to a DAC, such as the 9200
2145 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2146 */
19039bd0 2147static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2148 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2149{
2150 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2151 int i, j, conn_len = 0;
2152 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2153 unsigned int wcaps, wtype;
2154
c7d4b2fa
M		 2155 for (i = 0; i < cfg->line_outs; i++) {
2156 nid = cfg->line_out_pins[i];
7b043899
SL		 2157 conn_len = snd_hda_get_connections(codec, nid, conn,
2158 HDA_MAX_CONNECTIONS);
2159 for (j = 0; j < conn_len; j++) {
2160 wcaps = snd_hda_param_read(codec, conn[j],
2161 AC_PAR_AUDIO_WIDGET_CAP);
2162 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2163 if (wtype != AC_WID_AUD_OUT ||
2164 (wcaps & AC_WCAP_DIGITAL))
2165 continue;
2166 /* conn[j] is a DAC routed to this line-out */
2167 if (!is_in_dac_nids(spec, conn[j]))
2168 break;
2169 }
2170
2171 if (j == conn_len) {
df802952
TI		 2172 if (spec->multiout.num_dacs > 0) {
2173 /* we have already working output pins,
2174 * so let's drop the broken ones again
2175 */
2176 cfg->line_outs = spec->multiout.num_dacs;
2177 break;
2178 }
7b043899
SL		 2179 /* error out, no available DAC found */
2180 snd_printk(KERN_ERR
2181 "%s: No available DAC for pin 0x%x\n",
2182 __func__, nid);
2183 return -ENODEV;
2184 }
2185
2186 spec->multiout.dac_nids[i] = conn[j];
2187 spec->multiout.num_dacs++;
2188 if (conn_len > 1) {
2189 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2190 snd_hda_codec_write_cache(codec, nid, 0,
2191 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2192
7b043899
SL		 2193 }
2194 }
c7d4b2fa 2195
7b043899
SL		 2196 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2197 spec->multiout.num_dacs,
2198 spec->multiout.dac_nids[0],
2199 spec->multiout.dac_nids[1],
2200 spec->multiout.dac_nids[2],
2201 spec->multiout.dac_nids[3],
2202 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2203 return 0;
2204}
2205
eb06ed8f
TI		 2206/* create volume control/switch for the given prefx type */
2207static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2208{
2209 char name[32];
2210 int err;
2211
2212 sprintf(name, "%s Playback Volume", pfx);
2213 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2214 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2215 if (err < 0)
2216 return err;
2217 sprintf(name, "%s Playback Switch", pfx);
2218 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2219 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2220 if (err < 0)
2221 return err;
2222 return 0;
2223}
2224
c7d4b2fa 2225/* add playback controls from the parsed DAC table */
0fb87bb4 2226static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2227 const struct auto_pin_cfg *cfg)
c7d4b2fa 2228{
19039bd0
TI		 2229 static const char *chname[4] = {
2230 "Front", "Surround", NULL /*CLFE*/, "Side"
2231 };
c7d4b2fa
M		 2232 hda_nid_t nid;
2233 int i, err;
2234
0fb87bb4 2235 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2236 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2237
2238
c7d4b2fa 2239 for (i = 0; i < cfg->line_outs; i++) {
403d1944 2240 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2241 continue;
2242
2243 nid = spec->multiout.dac_nids[i];
2244
2245 if (i == 2) {
2246 /* Center/LFE */
eb06ed8f
TI		 2247 err = create_controls(spec, "Center", nid, 1);
2248 if (err < 0)
c7d4b2fa 2249 return err;
eb06ed8f
TI		 2250 err = create_controls(spec, "LFE", nid, 2);
2251 if (err < 0)
c7d4b2fa 2252 return err;
0fb87bb4
ML		 2253
2254 wid_caps = get_wcaps(codec, nid);
2255
2256 if (wid_caps & AC_WCAP_LR_SWAP) {
2257 err = stac92xx_add_control(spec,
2258 STAC_CTL_WIDGET_CLFE_SWITCH,
2259 "Swap Center/LFE Playback Switch", nid);
2260
2261 if (err < 0)
2262 return err;
2263 }
2264
c7d4b2fa 2265 } else {
eb06ed8f
TI		 2266 err = create_controls(spec, chname[i], nid, 3);
2267 if (err < 0)
c7d4b2fa
M		 2268 return err;
2269 }
2270 }
2271
b5895dc8
MR		 2272 if (spec->line_switch) {
2273 nid = cfg->input_pins[AUTO_PIN_LINE];
2274 pincap = snd_hda_param_read(codec, nid,
2275 AC_PAR_PIN_CAP);
2276 if (pincap & AC_PINCAP_OUT) {
2277 err = stac92xx_add_control(spec,
2278 STAC_CTL_WIDGET_IO_SWITCH,
2279 "Line In as Output Switch", nid << 8);
2280 if (err < 0)
2281 return err;
2282 }
2283 }
403d1944 2284
b5895dc8 2285 if (spec->mic_switch) {
cace16f1 2286 unsigned int def_conf;
b5895dc8 2287 nid = cfg->input_pins[AUTO_PIN_MIC];
cace16f1
MR		 2288 def_conf = snd_hda_codec_read(codec, nid, 0,
2289 AC_VERB_GET_CONFIG_DEFAULT, 0);
2290
2291 /* some laptops have an internal analog microphone
2292 * which can't be used as a output */
2293 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2294 pincap = snd_hda_param_read(codec, nid,
2295 AC_PAR_PIN_CAP);
2296 if (pincap & AC_PINCAP_OUT) {
2297 err = stac92xx_add_control(spec,
2298 STAC_CTL_WIDGET_IO_SWITCH,
2299 "Mic as Output Switch", (nid << 8) | 1);
2300 if (err < 0)
2301 return err;
2302 }
b5895dc8
MR		 2303 }
2304 }
403d1944 2305
c7d4b2fa
M		 2306 return 0;
2307}
2308
eb06ed8f 2309static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 2310{
7b043899
SL		 2311 if (is_in_dac_nids(spec, nid))
2312 return 1;
eb06ed8f
TI		 2313 if (spec->multiout.hp_nid == nid)
2314 return 1;
2315 return 0;
2316}
c7d4b2fa 2317
eb06ed8f
TI		 2318static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2319{
2320 if (!spec->multiout.hp_nid)
2321 spec->multiout.hp_nid = nid;
2322 else if (spec->multiout.num_dacs > 4) {
2323 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2324 return 1;
2325 } else {
2326 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2327 spec->multiout.num_dacs++;
2328 }
2329 return 0;
2330}
4e55096e 2331
eb06ed8f
TI		 2332/* add playback controls for Speaker and HP outputs */
2333static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2334 struct auto_pin_cfg *cfg)
2335{
2336 struct sigmatel_spec *spec = codec->spec;
2337 hda_nid_t nid;
2338 int i, old_num_dacs, err;
2339
2340 old_num_dacs = spec->multiout.num_dacs;
2341 for (i = 0; i < cfg->hp_outs; i++) {
2342 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2343 if (wid_caps & AC_WCAP_UNSOL_CAP)
2344 spec->hp_detect = 1;
2345 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2346 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2347 if (check_in_dac_nids(spec, nid))
2348 nid = 0;
2349 if (! nid)
c7d4b2fa 2350 continue;
eb06ed8f
TI		 2351 add_spec_dacs(spec, nid);
2352 }
2353 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2354 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2355 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2356 if (check_in_dac_nids(spec, nid))
2357 nid = 0;
eb06ed8f
TI		 2358 if (! nid)
2359 continue;
2360 add_spec_dacs(spec, nid);
c7d4b2fa 2361 }
1b290a51
MR		 2362 for (i = 0; i < cfg->line_outs; i++) {
2363 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2364 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2365 if (check_in_dac_nids(spec, nid))
2366 nid = 0;
2367 if (! nid)
2368 continue;
2369 add_spec_dacs(spec, nid);
2370 }
eb06ed8f
TI		 2371 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2372 static const char *pfxs[] = {
2373 "Speaker", "External Speaker", "Speaker2",
2374 };
2375 err = create_controls(spec, pfxs[i - old_num_dacs],
2376 spec->multiout.dac_nids[i], 3);
2377 if (err < 0)
2378 return err;
2379 }
2380 if (spec->multiout.hp_nid) {
2381 const char *pfx;
6020c008 2382 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 2383 pfx = "Master";
2384 else
2385 pfx = "Headphone";
2386 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
2387 if (err < 0)
2388 return err;
2389 }
c7d4b2fa
M		 2390
2391 return 0;
2392}
2393
b22b4821
MR		 2394/* labels for mono mux outputs */
2395static const char *stac92xx_mono_labels[3] = {
2396 "DAC0", "DAC1", "Mixer"
2397};
2398
2399/* create mono mux for mono out on capable codecs */
2400static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2401{
2402 struct sigmatel_spec *spec = codec->spec;
2403 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2404 int i, num_cons;
2405 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2406
2407 num_cons = snd_hda_get_connections(codec,
2408 spec->mono_nid,
2409 con_lst,
2410 HDA_MAX_NUM_INPUTS);
2411 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2412 return -EINVAL;
2413
2414 for (i = 0; i < num_cons; i++) {
2415 mono_mux->items[mono_mux->num_items].label =
2416 stac92xx_mono_labels[i];
2417 mono_mux->items[mono_mux->num_items].index = i;
2418 mono_mux->num_items++;
2419 }
09a99959
MR		 2420
2421 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2422 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2423}
2424
8b65727b 2425/* labels for dmic mux inputs */
ddc2cec4 2426static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2427 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2428 "Digital Mic 3", "Digital Mic 4"
2429};
2430
2431/* create playback/capture controls for input pins on dmic capable codecs */
2432static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2433 const struct auto_pin_cfg *cfg)
2434{
2435 struct sigmatel_spec *spec = codec->spec;
2436 struct hda_input_mux *dimux = &spec->private_dimux;
2437 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2438 int err, i, j;
2439 char name[32];
8b65727b
MP		 2440
2441 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2442 dimux->items[dimux->num_items].index = 0;
2443 dimux->num_items++;
2444
2445 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2446 hda_nid_t nid;
8b65727b
MP		 2447 int index;
2448 int num_cons;
0678accd 2449 unsigned int wcaps;
8b65727b
MP		 2450 unsigned int def_conf;
2451
2452 def_conf = snd_hda_codec_read(codec,
2453 spec->dmic_nids[i],
2454 0,
2455 AC_VERB_GET_CONFIG_DEFAULT,
2456 0);
2457 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2458 continue;
2459
0678accd 2460 nid = spec->dmic_nids[i];
8b65727b 2461 num_cons = snd_hda_get_connections(codec,
e1f0d669 2462 spec->dmux_nids[0],
8b65727b
MP		 2463 con_lst,
2464 HDA_MAX_NUM_INPUTS);
2465 for (j = 0; j < num_cons; j++)
0678accd 2466 if (con_lst[j] == nid) {
8b65727b
MP		 2467 index = j;
2468 goto found;
2469 }
2470 continue;
2471found:
0678accd
MR		 2472 wcaps = get_wcaps(codec, nid);
2473
2474 if (wcaps & AC_WCAP_OUT_AMP) {
2475 sprintf(name, "%s Capture Volume",
2476 stac92xx_dmic_labels[dimux->num_items]);
2477
2478 err = stac92xx_add_control(spec,
2479 STAC_CTL_WIDGET_VOL,
2480 name,
2481 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2482 if (err < 0)
2483 return err;
2484 }
2485
8b65727b
MP		 2486 dimux->items[dimux->num_items].label =
2487 stac92xx_dmic_labels[dimux->num_items];
2488 dimux->items[dimux->num_items].index = index;
2489 dimux->num_items++;
2490 }
2491
2492 return 0;
2493}
2494
c7d4b2fa
M		 2495/* create playback/capture controls for input pins */
2496static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2497{
2498 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2499 struct hda_input_mux *imux = &spec->private_imux;
2500 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2501 int i, j, k;
2502
2503 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2504 int index;
2505
2506 if (!cfg->input_pins[i])
2507 continue;
2508 index = -1;
2509 for (j = 0; j < spec->num_muxes; j++) {
2510 int num_cons;
2511 num_cons = snd_hda_get_connections(codec,
2512 spec->mux_nids[j],
2513 con_lst,
2514 HDA_MAX_NUM_INPUTS);
2515 for (k = 0; k < num_cons; k++)
2516 if (con_lst[k] == cfg->input_pins[i]) {
2517 index = k;
2518 goto found;
2519 }
c7d4b2fa 2520 }
314634bc
TI		 2521 continue;
2522 found:
2523 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2524 imux->items[imux->num_items].index = index;
2525 imux->num_items++;
c7d4b2fa
M		 2526 }
2527
7b043899 2528 if (imux->num_items) {
62fe78e9
SR		 2529 /*
2530 * Set the current input for the muxes.
2531 * The STAC9221 has two input muxes with identical source
2532 * NID lists. Hopefully this won't get confused.
2533 */
2534 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2535 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2536 AC_VERB_SET_CONNECT_SEL,
2537 imux->items[0].index);
62fe78e9
SR		 2538 }
2539 }
2540
c7d4b2fa
M		 2541 return 0;
2542}
2543
c7d4b2fa
M		 2544static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2545{
2546 struct sigmatel_spec *spec = codec->spec;
2547 int i;
2548
2549 for (i = 0; i < spec->autocfg.line_outs; i++) {
2550 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2551 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2552 }
2553}
2554
2555static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2556{
2557 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2558 int i;
c7d4b2fa 2559
eb06ed8f
TI		 2560 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2561 hda_nid_t pin;
2562 pin = spec->autocfg.hp_pins[i];
2563 if (pin) /* connect to front */
2564 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2565 }
2566 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2567 hda_nid_t pin;
2568 pin = spec->autocfg.speaker_pins[i];
2569 if (pin) /* connect to front */
2570 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2571 }
c7d4b2fa
M		 2572}
2573
3cc08dc6 2574static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2575{
2576 struct sigmatel_spec *spec = codec->spec;
2577 int err;
bcecd9bd 2578 int hp_speaker_swap = 0;
c7d4b2fa 2579
8b65727b
MP		 2580 if ((err = snd_hda_parse_pin_def_config(codec,
2581 &spec->autocfg,
2582 spec->dmic_nids)) < 0)
c7d4b2fa 2583 return err;
82bc955f 2584 if (! spec->autocfg.line_outs)
869264c4 2585 return 0; /* can't find valid pin config */
19039bd0 2586
bcecd9bd
JZ		 2587 /* If we have no real line-out pin and multiple hp-outs, HPs should
2588 * be set up as multi-channel outputs.
2589 */
2590 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2591 spec->autocfg.hp_outs > 1) {
2592 /* Copy hp_outs to line_outs, backup line_outs in
2593 * speaker_outs so that the following routines can handle
2594 * HP pins as primary outputs.
2595 */
2596 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2597 sizeof(spec->autocfg.line_out_pins));
2598 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2599 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2600 sizeof(spec->autocfg.hp_pins));
2601 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2602 hp_speaker_swap = 1;
2603 }
09a99959
MR		 2604 if (spec->autocfg.mono_out_pin) {
2605 int dir = (get_wcaps(codec, spec->autocfg.mono_out_pin)
2606 & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
2607 u32 caps = query_amp_caps(codec,
2608 spec->autocfg.mono_out_pin, dir);
2609 hda_nid_t conn_list[1];
2610
2611 /* get the mixer node and then the mono mux if it exists */
2612 if (snd_hda_get_connections(codec,
2613 spec->autocfg.mono_out_pin, conn_list, 1) &&
2614 snd_hda_get_connections(codec, conn_list[0],
2615 conn_list, 1)) {
2616
2617 int wcaps = get_wcaps(codec, conn_list[0]);
2618 int wid_type = (wcaps & AC_WCAP_TYPE)
2619 >> AC_WCAP_TYPE_SHIFT;
2620 /* LR swap check, some stac925x have a mux that
2621 * changes the DACs output path instead of the
2622 * mono-mux path.
2623 */
2624 if (wid_type == AC_WID_AUD_SEL &&
2625 !(wcaps & AC_WCAP_LR_SWAP))
2626 spec->mono_nid = conn_list[0];
2627 }
2628 /* all mono outs have a least a mute/unmute switch */
2629 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2630 "Mono Playback Switch",
2631 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2632 1, 0, dir));
2633 if (err < 0)
2634 return err;
2635 /* check to see if there is volume support for the amp */
2636 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2637 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2638 "Mono Playback Volume",
2639 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2640 1, 0, dir));
2641 if (err < 0)
2642 return err;
2643 }
2644
2645 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
2646 AC_PINCTL_OUT_EN);
2647 }
bcecd9bd 2648
403d1944
MP		 2649 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2650 return err;
19039bd0
TI		 2651 if (spec->multiout.num_dacs == 0)
2652 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2653 return err;
c7d4b2fa 2654
0fb87bb4
ML		 2655 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2656
2657 if (err < 0)
2658 return err;
2659
bcecd9bd
JZ		 2660 if (hp_speaker_swap == 1) {
2661 /* Restore the hp_outs and line_outs */
2662 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2663 sizeof(spec->autocfg.line_out_pins));
2664 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2665 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2666 sizeof(spec->autocfg.speaker_pins));
2667 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2668 memset(spec->autocfg.speaker_pins, 0,
2669 sizeof(spec->autocfg.speaker_pins));
2670 spec->autocfg.speaker_outs = 0;
2671 }
2672
0fb87bb4
ML		 2673 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2674
2675 if (err < 0)
2676 return err;
2677
2678 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2679
2680 if (err < 0)
c7d4b2fa
M		 2681 return err;
2682
b22b4821
MR		 2683 if (spec->mono_nid > 0) {
2684 err = stac92xx_auto_create_mono_output_ctls(codec);
2685 if (err < 0)
2686 return err;
2687 }
2688
8b65727b
MP		 2689 if (spec->num_dmics > 0)
2690 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2691 &spec->autocfg)) < 0)
2692 return err;
2693
c7d4b2fa 2694 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2695 if (spec->multiout.max_channels > 2)
c7d4b2fa 2696 spec->surr_switch = 1;
c7d4b2fa 2697
82bc955f 2698 if (spec->autocfg.dig_out_pin)
3cc08dc6 2699 spec->multiout.dig_out_nid = dig_out;
82bc955f 2700 if (spec->autocfg.dig_in_pin)
3cc08dc6 2701 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2702
2703 if (spec->kctl_alloc)
2704 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2705
2706 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2707 if (!spec->dinput_mux)
2708 spec->dinput_mux = &spec->private_dimux;
b22b4821 2709 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 2710
2711 return 1;
2712}
2713
82bc955f
TI		 2714/* add playback controls for HP output */
2715static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2716 struct auto_pin_cfg *cfg)
2717{
2718 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2719 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2720 unsigned int wid_caps;
2721
2722 if (! pin)
2723 return 0;
2724
2725 wid_caps = get_wcaps(codec, pin);
505cb341 2726 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2727 spec->hp_detect = 1;
82bc955f
TI		 2728
2729 return 0;
2730}
2731
160ea0dc
RF		 2732/* add playback controls for LFE output */
2733static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2734 struct auto_pin_cfg *cfg)
2735{
2736 struct sigmatel_spec *spec = codec->spec;
2737 int err;
2738 hda_nid_t lfe_pin = 0x0;
2739 int i;
2740
2741 /*
2742 * search speaker outs and line outs for a mono speaker pin
2743 * with an amp. If one is found, add LFE controls
2744 * for it.
2745 */
2746 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2747 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2748 unsigned long wcaps = get_wcaps(codec, pin);
2749 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2750 if (wcaps == AC_WCAP_OUT_AMP)
2751 /* found a mono speaker with an amp, must be lfe */
2752 lfe_pin = pin;
2753 }
2754
2755 /* if speaker_outs is 0, then speakers may be in line_outs */
2756 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2757 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2758 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2759 unsigned long cfg;
2760 cfg = snd_hda_codec_read(codec, pin, 0,
2761 AC_VERB_GET_CONFIG_DEFAULT,
2762 0x00);
2763 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2764 unsigned long wcaps = get_wcaps(codec, pin);
2765 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2766 if (wcaps == AC_WCAP_OUT_AMP)
2767 /* found a mono speaker with an amp,
2768 must be lfe */
2769 lfe_pin = pin;
2770 }
2771 }
2772 }
2773
2774 if (lfe_pin) {
eb06ed8f 2775 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2776 if (err < 0)
2777 return err;
2778 }
2779
2780 return 0;
2781}
2782
c7d4b2fa
M		 2783static int stac9200_parse_auto_config(struct hda_codec *codec)
2784{
2785 struct sigmatel_spec *spec = codec->spec;
2786 int err;
2787
df694daa 2788 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2789 return err;
2790
2791 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2792 return err;
2793
82bc955f
TI		 2794 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2795 return err;
2796
160ea0dc
RF		 2797 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2798 return err;
2799
82bc955f 2800 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2801 spec->multiout.dig_out_nid = 0x05;
82bc955f 2802 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2803 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2804
2805 if (spec->kctl_alloc)
2806 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2807
2808 spec->input_mux = &spec->private_imux;
8b65727b 2809 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2810
2811 return 1;
2812}
2813
62fe78e9
SR		 2814/*
2815 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2816 * funky external mute control using GPIO pins.
2817 */
2818
76e1ddfb 2819static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 2820 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 2821{
2822 unsigned int gpiostate, gpiomask, gpiodir;
2823
2824 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2825 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 2826 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 2827
2828 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2829 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 2830 gpiomask |= mask;
62fe78e9
SR		 2831
2832 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2833 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 2834 gpiodir |= dir_mask;
62fe78e9 2835
76e1ddfb 2836 /* Configure GPIOx as CMOS */
62fe78e9
SR		 2837 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2838
2839 snd_hda_codec_write(codec, codec->afg, 0,
2840 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 2841 snd_hda_codec_read(codec, codec->afg, 0,
2842 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 2843
2844 msleep(1);
2845
76e1ddfb
TI		 2846 snd_hda_codec_read(codec, codec->afg, 0,
2847 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 2848}
2849
314634bc
TI		 2850static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2851 unsigned int event)
2852{
2853 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2854 snd_hda_codec_write_cache(codec, nid, 0,
2855 AC_VERB_SET_UNSOLICITED_ENABLE,
2856 (AC_USRSP_EN | event));
314634bc
TI		 2857}
2858
a64135a2
MR		 2859static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
2860{
2861 int i;
2862 for (i = 0; i < cfg->hp_outs; i++)
2863 if (cfg->hp_pins[i] == nid)
2864 return 1; /* nid is a HP-Out */
2865
2866 return 0; /* nid is not a HP-Out */
2867};
2868
c7d4b2fa
M		 2869static int stac92xx_init(struct hda_codec *codec)
2870{
2871 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2872 struct auto_pin_cfg *cfg = &spec->autocfg;
2873 int i;
c7d4b2fa 2874
c7d4b2fa
M		 2875 snd_hda_sequence_write(codec, spec->init);
2876
82bc955f
TI		 2877 /* set up pins */
2878 if (spec->hp_detect) {
505cb341 2879 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2880 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2881 enable_pin_detect(codec, cfg->hp_pins[i],
2882 STAC_HP_EVENT);
0a07acaf
TI		 2883 /* force to enable the first line-out; the others are set up
2884 * in unsol_event
2885 */
2886 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2887 AC_PINCTL_OUT_EN);
eb995a8c 2888 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2889 /* fake event to set up pins */
2890 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2891 } else {
2892 stac92xx_auto_init_multi_out(codec);
2893 stac92xx_auto_init_hp_out(codec);
2894 }
2895 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2896 hda_nid_t nid = cfg->input_pins[i];
2897 if (nid) {
2898 unsigned int pinctl = AC_PINCTL_IN_EN;
2899 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2900 pinctl |= stac92xx_get_vref(codec, nid);
2901 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2902 }
82bc955f 2903 }
a64135a2
MR		 2904 for (i = 0; i < spec->num_dmics; i++)
2905 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2906 AC_PINCTL_IN_EN);
2907 for (i = 0; i < spec->num_pwrs; i++) {
2908 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
2909 ? STAC_HP_EVENT : STAC_PWR_EVENT;
2910 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
2911 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2912 /* outputs are only ports capable of power management
2913 * any attempts on powering down a input port cause the
2914 * referenced VREF to act quirky.
2915 */
2916 if (pinctl & AC_PINCTL_IN_EN)
2917 continue;
2918 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
2919 codec->patch_ops.unsol_event(codec, (event | i) << 26);
2920 }
8b65727b 2921
82bc955f
TI		 2922 if (cfg->dig_out_pin)
2923 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2924 AC_PINCTL_OUT_EN);
2925 if (cfg->dig_in_pin)
2926 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2927 AC_PINCTL_IN_EN);
2928
4fe5195c
MR		 2929 stac_gpio_set(codec, spec->gpio_mask,
2930 spec->gpio_dir, spec->gpio_data);
62fe78e9 2931
c7d4b2fa
M		 2932 return 0;
2933}
2934
2f2f4251
M		 2935static void stac92xx_free(struct hda_codec *codec)
2936{
c7d4b2fa
M		 2937 struct sigmatel_spec *spec = codec->spec;
2938 int i;
2939
2940 if (! spec)
2941 return;
2942
2943 if (spec->kctl_alloc) {
2944 for (i = 0; i < spec->num_kctl_used; i++)
2945 kfree(spec->kctl_alloc[i].name);
2946 kfree(spec->kctl_alloc);
2947 }
2948
11b44bbd
RF		 2949 if (spec->bios_pin_configs)
2950 kfree(spec->bios_pin_configs);
2951
c7d4b2fa 2952 kfree(spec);
2f2f4251
M		 2953}
2954
4e55096e
M		 2955static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2956 unsigned int flag)
2957{
2958 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2959 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2960
f9acba43
TI		 2961 if (pin_ctl & AC_PINCTL_IN_EN) {
2962 /*
2963 * we need to check the current set-up direction of
2964 * shared input pins since they can be switched via
2965 * "xxx as Output" mixer switch
2966 */
2967 struct sigmatel_spec *spec = codec->spec;
2968 struct auto_pin_cfg *cfg = &spec->autocfg;
2969 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2970 spec->line_switch) ||
2971 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2972 spec->mic_switch))
2973 return;
2974 }
2975
7b043899
SL		 2976 /* if setting pin direction bits, clear the current
2977 direction bits first */
2978 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2979 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2980
82beb8fd 2981 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2982 AC_VERB_SET_PIN_WIDGET_CONTROL,
2983 pin_ctl | flag);
2984}
2985
2986static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2987 unsigned int flag)
2988{
2989 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2990 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 2991 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2992 AC_VERB_SET_PIN_WIDGET_CONTROL,
2993 pin_ctl & ~flag);
2994}
2995
40c1d308 2996static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 2997{
2998 if (!nid)
2999 return 0;
3000 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3001 & (1 << 31)) {
3002 unsigned int pinctl;
3003 pinctl = snd_hda_codec_read(codec, nid, 0,
3004 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3005 if (pinctl & AC_PINCTL_IN_EN)
3006 return 0; /* mic- or line-input */
3007 else
3008 return 1; /* HP-output */
3009 }
314634bc
TI		 3010 return 0;
3011}
3012
3013static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3014{
3015 struct sigmatel_spec *spec = codec->spec;
3016 struct auto_pin_cfg *cfg = &spec->autocfg;
3017 int i, presence;
3018
eb06ed8f 3019 presence = 0;
4fe5195c
MR		 3020 if (spec->gpio_mute)
3021 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3022 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3023
eb06ed8f 3024 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3025 if (presence)
3026 break;
4fe5195c 3027 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3028 }
4e55096e
M		 3029
3030 if (presence) {
3031 /* disable lineouts, enable hp */
3032 for (i = 0; i < cfg->line_outs; i++)
3033 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3034 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3035 for (i = 0; i < cfg->speaker_outs; i++)
3036 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3037 AC_PINCTL_OUT_EN);
4e55096e
M		 3038 } else {
3039 /* enable lineouts, disable hp */
3040 for (i = 0; i < cfg->line_outs; i++)
3041 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3042 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3043 for (i = 0; i < cfg->speaker_outs; i++)
3044 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3045 AC_PINCTL_OUT_EN);
4e55096e
M		 3046 }
3047}
3048
a64135a2
MR		 3049static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3050{
3051 struct sigmatel_spec *spec = codec->spec;
3052 hda_nid_t nid = spec->pwr_nids[idx];
3053 int presence, val;
3054 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3055 & 0x000000ff;
3056 presence = get_hp_pin_presence(codec, nid);
3057 idx = 1 << idx;
3058
3059 if (presence)
3060 val &= ~idx;
3061 else
3062 val |= idx;
3063
3064 /* power down unused output ports */
3065 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3066};
3067
314634bc
TI		 3068static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3069{
a64135a2
MR		 3070 struct sigmatel_spec *spec = codec->spec;
3071 int idx = res >> 26 & 0x0f;
3072
3073 switch ((res >> 26) & 0x30) {
314634bc
TI		 3074 case STAC_HP_EVENT:
3075 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3076 /* fallthru */
3077 case STAC_PWR_EVENT:
3078 if (spec->num_pwrs > 0)
3079 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3080 }
3081}
3082
cb53c626 3083#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3084static int stac92xx_resume(struct hda_codec *codec)
3085{
dc81bed1
TI		 3086 struct sigmatel_spec *spec = codec->spec;
3087
11b44bbd 3088 stac92xx_set_config_regs(codec);
dc81bed1 3089 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3090 stac_gpio_set(codec, spec->gpio_mask,
3091 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3092 snd_hda_codec_resume_amp(codec);
3093 snd_hda_codec_resume_cache(codec);
dc81bed1
TI		 3094 /* invoke unsolicited event to reset the HP state */
3095 if (spec->hp_detect)
3096 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3097 return 0;
3098}
3099#endif
3100
2f2f4251
M		 3101static struct hda_codec_ops stac92xx_patch_ops = {
3102 .build_controls = stac92xx_build_controls,
3103 .build_pcms = stac92xx_build_pcms,
3104 .init = stac92xx_init,
3105 .free = stac92xx_free,
4e55096e 3106 .unsol_event = stac92xx_unsol_event,
cb53c626 3107#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3108 .resume = stac92xx_resume,
3109#endif
2f2f4251
M		 3110};
3111
3112static int patch_stac9200(struct hda_codec *codec)
3113{
3114 struct sigmatel_spec *spec;
c7d4b2fa 3115 int err;
2f2f4251 3116
e560d8d8 3117 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3118 if (spec == NULL)
3119 return -ENOMEM;
3120
3121 codec->spec = spec;
a4eed138 3122 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3123 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3124 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3125 stac9200_models,
3126 stac9200_cfg_tbl);
11b44bbd
RF		 3127 if (spec->board_config < 0) {
3128 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3129 err = stac92xx_save_bios_config_regs(codec);
3130 if (err < 0) {
3131 stac92xx_free(codec);
3132 return err;
3133 }
3134 spec->pin_configs = spec->bios_pin_configs;
3135 } else {
403d1944
MP		 3136 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3137 stac92xx_set_config_regs(codec);
3138 }
2f2f4251
M		 3139
3140 spec->multiout.max_channels = 2;
3141 spec->multiout.num_dacs = 1;
3142 spec->multiout.dac_nids = stac9200_dac_nids;
3143 spec->adc_nids = stac9200_adc_nids;
3144 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3145 spec->num_muxes = 1;
8b65727b 3146 spec->num_dmics = 0;
9e05b7a3 3147 spec->num_adcs = 1;
a64135a2 3148 spec->num_pwrs = 0;
c7d4b2fa 3149
1194b5b7
TI		 3150 if (spec->board_config == STAC_9200_GATEWAY)
3151 spec->init = stac9200_eapd_init;
3152 else
3153 spec->init = stac9200_core_init;
2f2f4251 3154 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 3155
3156 err = stac9200_parse_auto_config(codec);
3157 if (err < 0) {
3158 stac92xx_free(codec);
3159 return err;
3160 }
2f2f4251
M		 3161
3162 codec->patch_ops = stac92xx_patch_ops;
3163
3164 return 0;
3165}
3166
8e21c34c
TD		 3167static int patch_stac925x(struct hda_codec *codec)
3168{
3169 struct sigmatel_spec *spec;
3170 int err;
3171
3172 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3173 if (spec == NULL)
3174 return -ENOMEM;
3175
3176 codec->spec = spec;
a4eed138 3177 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3178 spec->pin_nids = stac925x_pin_nids;
3179 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3180 stac925x_models,
3181 stac925x_cfg_tbl);
9e507abd 3182 again:
8e21c34c 3183 if (spec->board_config < 0) {
2c11f955
TD		 3184 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3185 "using BIOS defaults\n");
8e21c34c
TD		 3186 err = stac92xx_save_bios_config_regs(codec);
3187 if (err < 0) {
3188 stac92xx_free(codec);
3189 return err;
3190 }
3191 spec->pin_configs = spec->bios_pin_configs;
3192 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3193 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3194 stac92xx_set_config_regs(codec);
3195 }
3196
3197 spec->multiout.max_channels = 2;
3198 spec->multiout.num_dacs = 1;
3199 spec->multiout.dac_nids = stac925x_dac_nids;
3200 spec->adc_nids = stac925x_adc_nids;
3201 spec->mux_nids = stac925x_mux_nids;
3202 spec->num_muxes = 1;
9e05b7a3 3203 spec->num_adcs = 1;
a64135a2 3204 spec->num_pwrs = 0;
2c11f955
TD		 3205 switch (codec->vendor_id) {
3206 case 0x83847632: /* STAC9202 */
3207 case 0x83847633: /* STAC9202D */
3208 case 0x83847636: /* STAC9251 */
3209 case 0x83847637: /* STAC9251D */
f6e9852a 3210 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3211 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3212 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3213 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3214 break;
3215 default:
3216 spec->num_dmics = 0;
3217 break;
3218 }
8e21c34c
TD		 3219
3220 spec->init = stac925x_core_init;
3221 spec->mixer = stac925x_mixer;
3222
3223 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3224 if (!err) {
3225 if (spec->board_config < 0) {
3226 printk(KERN_WARNING "hda_codec: No auto-config is "
3227 "available, default to model=ref\n");
3228 spec->board_config = STAC_925x_REF;
3229 goto again;
3230 }
3231 err = -EINVAL;
3232 }
8e21c34c
TD		 3233 if (err < 0) {
3234 stac92xx_free(codec);
3235 return err;
3236 }
3237
3238 codec->patch_ops = stac92xx_patch_ops;
3239
3240 return 0;
3241}
3242
e1f0d669
MR		 3243static struct hda_input_mux stac92hd73xx_dmux = {
3244 .num_items = 4,
3245 .items = {
3246 { "Analog Inputs", 0x0b },
3247 { "CD", 0x08 },
3248 { "Digital Mic 1", 0x09 },
3249 { "Digital Mic 2", 0x0a },
3250 }
3251};
3252
3253static int patch_stac92hd73xx(struct hda_codec *codec)
3254{
3255 struct sigmatel_spec *spec;
3256 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3257 int err = 0;
3258
3259 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3260 if (spec == NULL)
3261 return -ENOMEM;
3262
3263 codec->spec = spec;
3264 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3265 spec->pin_nids = stac92hd73xx_pin_nids;
3266 spec->board_config = snd_hda_check_board_config(codec,
3267 STAC_92HD73XX_MODELS,
3268 stac92hd73xx_models,
3269 stac92hd73xx_cfg_tbl);
3270again:
3271 if (spec->board_config < 0) {
3272 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3273 " STAC92HD73XX, using BIOS defaults\n");
3274 err = stac92xx_save_bios_config_regs(codec);
3275 if (err < 0) {
3276 stac92xx_free(codec);
3277 return err;
3278 }
3279 spec->pin_configs = spec->bios_pin_configs;
3280 } else {
3281 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3282 stac92xx_set_config_regs(codec);
3283 }
3284
3285 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3286 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3287
3288 if (spec->multiout.num_dacs < 0) {
3289 printk(KERN_WARNING "hda_codec: Could not determine "
3290 "number of channels defaulting to DAC count\n");
3291 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3292 }
3293
3294 switch (spec->multiout.num_dacs) {
3295 case 0x3: /* 6 Channel */
3296 spec->mixer = stac92hd73xx_6ch_mixer;
3297 spec->init = stac92hd73xx_6ch_core_init;
3298 break;
3299 case 0x4: /* 8 Channel */
3300 spec->multiout.hp_nid = 0x18;
3301 spec->mixer = stac92hd73xx_8ch_mixer;
3302 spec->init = stac92hd73xx_8ch_core_init;
3303 break;
3304 case 0x5: /* 10 Channel */
3305 spec->multiout.hp_nid = 0x19;
3306 spec->mixer = stac92hd73xx_10ch_mixer;
3307 spec->init = stac92hd73xx_10ch_core_init;
3308 };
3309
3310 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3311 spec->aloopback_mask = 0x01;
3312 spec->aloopback_shift = 8;
3313
3314 spec->mux_nids = stac92hd73xx_mux_nids;
3315 spec->adc_nids = stac92hd73xx_adc_nids;
3316 spec->dmic_nids = stac92hd73xx_dmic_nids;
3317 spec->dmux_nids = stac92hd73xx_dmux_nids;
3318
3319 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3320 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
3321 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
1697055e 3322 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3323 spec->dinput_mux = &stac92hd73xx_dmux;
3324 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3325 spec->gpio_mask = spec->gpio_dir = 0x1;
3326 spec->gpio_data = 0x01;
e1f0d669 3327
a64135a2
MR		 3328 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3329 spec->pwr_nids = stac92hd73xx_pwr_nids;
3330
e1f0d669
MR		 3331 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3332
3333 if (!err) {
3334 if (spec->board_config < 0) {
3335 printk(KERN_WARNING "hda_codec: No auto-config is "
3336 "available, default to model=ref\n");
3337 spec->board_config = STAC_92HD73XX_REF;
3338 goto again;
3339 }
3340 err = -EINVAL;
3341 }
3342
3343 if (err < 0) {
3344 stac92xx_free(codec);
3345 return err;
3346 }
3347
3348 codec->patch_ops = stac92xx_patch_ops;
3349
3350 return 0;
3351}
3352
e035b841
MR		 3353static int patch_stac92hd71bxx(struct hda_codec *codec)
3354{
3355 struct sigmatel_spec *spec;
3356 int err = 0;
3357
3358 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3359 if (spec == NULL)
3360 return -ENOMEM;
3361
3362 codec->spec = spec;
3363 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
3364 spec->pin_nids = stac92hd71bxx_pin_nids;
3365 spec->board_config = snd_hda_check_board_config(codec,
3366 STAC_92HD71BXX_MODELS,
3367 stac92hd71bxx_models,
3368 stac92hd71bxx_cfg_tbl);
3369again:
3370 if (spec->board_config < 0) {
3371 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3372 " STAC92HD71BXX, using BIOS defaults\n");
3373 err = stac92xx_save_bios_config_regs(codec);
3374 if (err < 0) {
3375 stac92xx_free(codec);
3376 return err;
3377 }
3378 spec->pin_configs = spec->bios_pin_configs;
3379 } else {
3380 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3381 stac92xx_set_config_regs(codec);
3382 }
3383
541eee87
MR		 3384 switch (codec->vendor_id) {
3385 case 0x111d76b6: /* 4 Port without Analog Mixer */
3386 case 0x111d76b7:
3387 case 0x111d76b4: /* 6 Port without Analog Mixer */
3388 case 0x111d76b5:
3389 spec->mixer = stac92hd71bxx_mixer;
3390 spec->init = stac92hd71bxx_core_init;
3391 break;
3392 default:
3393 spec->mixer = stac92hd71bxx_analog_mixer;
3394 spec->init = stac92hd71bxx_analog_core_init;
3395 }
3396
3397 spec->aloopback_mask = 0x20;
3398 spec->aloopback_shift = 0;
3399
4fe5195c
MR		 3400 /* GPIO0 High = EAPD */
3401 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0x1;
e035b841 3402
e035b841
MR		 3403 spec->mux_nids = stac92hd71bxx_mux_nids;
3404 spec->adc_nids = stac92hd71bxx_adc_nids;
3405 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3406 spec->dmux_nids = stac92hd71bxx_dmux_nids;
e035b841
MR		 3407
3408 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3409 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3410 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3411 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3412
a64135a2
MR		 3413 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3414 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3415
e035b841
MR		 3416 spec->multiout.num_dacs = 2;
3417 spec->multiout.hp_nid = 0x11;
3418 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3419
3420 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3421 if (!err) {
3422 if (spec->board_config < 0) {
3423 printk(KERN_WARNING "hda_codec: No auto-config is "
3424 "available, default to model=ref\n");
3425 spec->board_config = STAC_92HD71BXX_REF;
3426 goto again;
3427 }
3428 err = -EINVAL;
3429 }
3430
3431 if (err < 0) {
3432 stac92xx_free(codec);
3433 return err;
3434 }
3435
3436 codec->patch_ops = stac92xx_patch_ops;
3437
3438 return 0;
3439};
3440
2f2f4251
M		 3441static int patch_stac922x(struct hda_codec *codec)
3442{
3443 struct sigmatel_spec *spec;
c7d4b2fa 3444 int err;
2f2f4251 3445
e560d8d8 3446 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3447 if (spec == NULL)
3448 return -ENOMEM;
3449
3450 codec->spec = spec;
a4eed138 3451 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3452 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3453 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3454 stac922x_models,
3455 stac922x_cfg_tbl);
5d5d3bc3 3456 if (spec->board_config == STAC_INTEL_MAC_V3) {
4fe5195c
MR		 3457 spec->gpio_mask = spec->gpio_dir = 0x03;
3458 spec->gpio_data = 0x03;
3fc24d85
TI		 3459 /* Intel Macs have all same PCI SSID, so we need to check
3460 * codec SSID to distinguish the exact models
3461 */
6f0778d8 3462 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3463 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3464
3465 case 0x106b0800:
3466 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3467 break;
5d5d3bc3
IZ		 3468 case 0x106b0600:
3469 case 0x106b0700:
3470 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3471 break;
5d5d3bc3
IZ		 3472 case 0x106b0e00:
3473 case 0x106b0f00:
3474 case 0x106b1600:
3475 case 0x106b1700:
3476 case 0x106b0200:
3477 case 0x106b1e00:
3478 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3479 break;
5d5d3bc3
IZ		 3480 case 0x106b1a00:
3481 case 0x00000100:
3482 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3483 break;
5d5d3bc3
IZ		 3484 case 0x106b0a00:
3485 case 0x106b2200:
3486 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3487 break;
3fc24d85
TI		 3488 }
3489 }
3490
9e507abd 3491 again:
11b44bbd
RF		 3492 if (spec->board_config < 0) {
3493 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3494 "using BIOS defaults\n");
3495 err = stac92xx_save_bios_config_regs(codec);
3496 if (err < 0) {
3497 stac92xx_free(codec);
3498 return err;
3499 }
3500 spec->pin_configs = spec->bios_pin_configs;
3501 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3502 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3503 stac92xx_set_config_regs(codec);
3504 }
2f2f4251 3505
c7d4b2fa
M		 3506 spec->adc_nids = stac922x_adc_nids;
3507 spec->mux_nids = stac922x_mux_nids;
2549413e 3508 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3509 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3510 spec->num_dmics = 0;
a64135a2 3511 spec->num_pwrs = 0;
c7d4b2fa
M		 3512
3513 spec->init = stac922x_core_init;
2f2f4251 3514 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3515
3516 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3517
3cc08dc6 3518 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3519 if (!err) {
3520 if (spec->board_config < 0) {
3521 printk(KERN_WARNING "hda_codec: No auto-config is "
3522 "available, default to model=ref\n");
3523 spec->board_config = STAC_D945_REF;
3524 goto again;
3525 }
3526 err = -EINVAL;
3527 }
3cc08dc6
MP		 3528 if (err < 0) {
3529 stac92xx_free(codec);
3530 return err;
3531 }
3532
3533 codec->patch_ops = stac92xx_patch_ops;
3534
807a4636
TI		 3535 /* Fix Mux capture level; max to 2 */
3536 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3537 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3538 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3539 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3540 (0 << AC_AMPCAP_MUTE_SHIFT));
3541
3cc08dc6
MP		 3542 return 0;
3543}
3544
3545static int patch_stac927x(struct hda_codec *codec)
3546{
3547 struct sigmatel_spec *spec;
3548 int err;
3549
3550 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3551 if (spec == NULL)
3552 return -ENOMEM;
3553
3554 codec->spec = spec;
a4eed138 3555 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3556 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3557 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3558 stac927x_models,
3559 stac927x_cfg_tbl);
9e507abd 3560 again:
8e9068b1
MR		 3561 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3562 if (spec->board_config < 0)
3563 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3564 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3565 err = stac92xx_save_bios_config_regs(codec);
3566 if (err < 0) {
3567 stac92xx_free(codec);
3568 return err;
3569 }
3570 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3571 } else {
3cc08dc6
MP		 3572 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3573 stac92xx_set_config_regs(codec);
3574 }
3575
8e9068b1
MR		 3576 spec->adc_nids = stac927x_adc_nids;
3577 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3578 spec->mux_nids = stac927x_mux_nids;
3579 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
3580 spec->multiout.dac_nids = spec->dac_nids;
3581
81d3dbde 3582 switch (spec->board_config) {
93ed1503 3583 case STAC_D965_3ST:
93ed1503 3584 case STAC_D965_5ST:
8e9068b1 3585 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3586 spec->gpio_mask = spec->gpio_dir = 0x01;
3587 spec->gpio_data = 0x01;
8e9068b1
MR		 3588 spec->num_dmics = 0;
3589
93ed1503 3590 spec->init = d965_core_init;
9e05b7a3 3591 spec->mixer = stac927x_mixer;
81d3dbde 3592 break;
8e9068b1 3593 case STAC_DELL_BIOS:
2f32d909
MR		 3594 /* correct the front output jack as a hp out */
3595 stac92xx_set_config_reg(codec, 0x0f, 0x02270110);
c481fca3
MR		 3596 /* correct the front input jack as a mic */
3597 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3598 /* fallthru */
8e9068b1
MR		 3599 case STAC_DELL_3ST:
3600 /* GPIO2 High = Enable EAPD */
4fe5195c
MR		 3601 spec->gpio_mask = spec->gpio_dir = 0x04;
3602 spec->gpio_data = 0x04;
7f16859a
MR		 3603 spec->dmic_nids = stac927x_dmic_nids;
3604 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3605
8e9068b1
MR		 3606 spec->init = d965_core_init;
3607 spec->mixer = stac927x_mixer;
3608 spec->dmux_nids = stac927x_dmux_nids;
1697055e 3609 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 3610 break;
3611 default:
f1f208d0 3612 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3613 spec->gpio_mask = spec->gpio_dir = 0x1;
3614 spec->gpio_data = 0x01;
8e9068b1
MR		 3615 spec->num_dmics = 0;
3616
3617 spec->init = stac927x_core_init;
3618 spec->mixer = stac927x_mixer;
7f16859a
MR		 3619 }
3620
a64135a2 3621 spec->num_pwrs = 0;
e1f0d669
MR		 3622 spec->aloopback_mask = 0x40;
3623 spec->aloopback_shift = 0;
8e9068b1 3624
3cc08dc6 3625 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3626 if (!err) {
3627 if (spec->board_config < 0) {
3628 printk(KERN_WARNING "hda_codec: No auto-config is "
3629 "available, default to model=ref\n");
3630 spec->board_config = STAC_D965_REF;
3631 goto again;
3632 }
3633 err = -EINVAL;
3634 }
c7d4b2fa
M		 3635 if (err < 0) {
3636 stac92xx_free(codec);
3637 return err;
3638 }
2f2f4251
M		 3639
3640 codec->patch_ops = stac92xx_patch_ops;
3641
52987656
TI		 3642 /*
3643 * !!FIXME!!
3644 * The STAC927x seem to require fairly long delays for certain
3645 * command sequences. With too short delays (even if the answer
3646 * is set to RIRB properly), it results in the silence output
3647 * on some hardwares like Dell.
3648 *
3649 * The below flag enables the longer delay (see get_response
3650 * in hda_intel.c).
3651 */
3652 codec->bus->needs_damn_long_delay = 1;
3653
2f2f4251
M		 3654 return 0;
3655}
3656
f3302a59
MP		 3657static int patch_stac9205(struct hda_codec *codec)
3658{
3659 struct sigmatel_spec *spec;
8259980e 3660 int err;
f3302a59
MP		 3661
3662 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3663 if (spec == NULL)
3664 return -ENOMEM;
3665
3666 codec->spec = spec;
a4eed138 3667 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3668 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3669 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3670 stac9205_models,
3671 stac9205_cfg_tbl);
9e507abd 3672 again:
11b44bbd
RF		 3673 if (spec->board_config < 0) {
3674 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3675 err = stac92xx_save_bios_config_regs(codec);
3676 if (err < 0) {
3677 stac92xx_free(codec);
3678 return err;
3679 }
3680 spec->pin_configs = spec->bios_pin_configs;
3681 } else {
f3302a59
MP		 3682 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3683 stac92xx_set_config_regs(codec);
3684 }
3685
3686 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3687 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3688 spec->mux_nids = stac9205_mux_nids;
2549413e 3689 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3690 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3691 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3692 spec->dmux_nids = stac9205_dmux_nids;
1697055e 3693 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 3694 spec->num_pwrs = 0;
f3302a59
MP		 3695
3696 spec->init = stac9205_core_init;
3697 spec->mixer = stac9205_mixer;
3698
e1f0d669
MR		 3699 spec->aloopback_mask = 0x40;
3700 spec->aloopback_shift = 0;
f3302a59 3701 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3702
ae0a8ed8 3703 switch (spec->board_config){
ae0a8ed8 3704 case STAC_9205_DELL_M43:
87d48363
MR		 3705 /* Enable SPDIF in/out */
3706 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3707 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3708
4fe5195c
MR		 3709 /* Enable unsol response for GPIO4/Dock HP connection */
3710 snd_hda_codec_write(codec, codec->afg, 0,
3711 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3712 snd_hda_codec_write_cache(codec, codec->afg, 0,
3713 AC_VERB_SET_UNSOLICITED_ENABLE,
3714 (AC_USRSP_EN | STAC_HP_EVENT));
3715
3716 spec->gpio_dir = 0x0b;
3717 spec->gpio_mask = 0x1b;
3718 spec->gpio_mute = 0x10;
e2e7d624 3719 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 3720 * GPIO3 Low = DRM
87d48363 3721 */
4fe5195c 3722 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3723 break;
3724 default:
3725 /* GPIO0 High = EAPD */
4fe5195c
MR		 3726 spec->gpio_mask = spec->gpio_dir = 0x1;
3727 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3728 break;
3729 }
33382403 3730
f3302a59 3731 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 3732 if (!err) {
3733 if (spec->board_config < 0) {
3734 printk(KERN_WARNING "hda_codec: No auto-config is "
3735 "available, default to model=ref\n");
3736 spec->board_config = STAC_9205_REF;
3737 goto again;
3738 }
3739 err = -EINVAL;
3740 }
f3302a59
MP		 3741 if (err < 0) {
3742 stac92xx_free(codec);
3743 return err;
3744 }
3745
3746 codec->patch_ops = stac92xx_patch_ops;
3747
3748 return 0;
3749}
3750
db064e50 3751/*
6d859065 3752 * STAC9872 hack
db064e50
TI		 3753 */
3754
99ccc560 3755/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 3756static hda_nid_t vaio_dacs[] = { 0x2 };
3757#define VAIO_HP_DAC 0x5
3758static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
3759static hda_nid_t vaio_mux_nids[] = { 0x15 };
3760
3761static struct hda_input_mux vaio_mux = {
a3a2f429 3762 .num_items = 3,
db064e50 3763 .items = {
d773781c 3764 /* { "HP", 0x0 }, */
1624cb9a
TI		 3765 { "Mic Jack", 0x1 },
3766 { "Internal Mic", 0x2 },
db064e50
TI		 3767 { "PCM", 0x3 },
3768 }
3769};
3770
3771static struct hda_verb vaio_init[] = {
3772 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 3773 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 3774 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3775 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3776 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3777 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3778 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 3779 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3780 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3781 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3782 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3783 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3784 {}
3785};
3786
6d859065
GM		 3787static struct hda_verb vaio_ar_init[] = {
3788 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
3789 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3790 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3791 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3792/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
3793 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3794 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 3795 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3796 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3797/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
3798 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3799 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3800 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3801 {}
3802};
3803
db064e50 3804/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3805static struct hda_bind_ctls vaio_bind_master_vol = {
3806 .ops = &snd_hda_bind_vol,
3807 .values = {
3808 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3809 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3810 0
3811 },
3812};
db064e50
TI		 3813
3814/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3815static struct hda_bind_ctls vaio_bind_master_sw = {
3816 .ops = &snd_hda_bind_sw,
3817 .values = {
3818 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3819 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3820 0,
3821 },
3822};
db064e50
TI		 3823
3824static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 3825 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3826 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 3827 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3828 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3829 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3830 {
3831 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3832 .name = "Capture Source",
3833 .count = 1,
3834 .info = stac92xx_mux_enum_info,
3835 .get = stac92xx_mux_enum_get,
3836 .put = stac92xx_mux_enum_put,
3837 },
3838 {}
3839};
3840
6d859065 3841static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 3842 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3843 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 3844 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3845 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3846 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3847 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
3848 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
3849 {
3850 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3851 .name = "Capture Source",
3852 .count = 1,
3853 .info = stac92xx_mux_enum_info,
3854 .get = stac92xx_mux_enum_get,
3855 .put = stac92xx_mux_enum_put,
3856 },
3857 {}
3858};
3859
3860static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 3861 .build_controls = stac92xx_build_controls,
3862 .build_pcms = stac92xx_build_pcms,
3863 .init = stac92xx_init,
3864 .free = stac92xx_free,
cb53c626 3865#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 3866 .resume = stac92xx_resume,
3867#endif
3868};
3869
72e7b0dd
TI		 3870static int stac9872_vaio_init(struct hda_codec *codec)
3871{
3872 int err;
3873
3874 err = stac92xx_init(codec);
3875 if (err < 0)
3876 return err;
3877 if (codec->patch_ops.unsol_event)
3878 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3879 return 0;
3880}
3881
3882static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
3883{
40c1d308 3884 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 3885 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3886 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3887 } else {
3888 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3889 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3890 }
3891}
3892
3893static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
3894{
3895 switch (res >> 26) {
3896 case STAC_HP_EVENT:
3897 stac9872_vaio_hp_detect(codec, res);
3898 break;
3899 }
3900}
3901
3902static struct hda_codec_ops stac9872_vaio_patch_ops = {
3903 .build_controls = stac92xx_build_controls,
3904 .build_pcms = stac92xx_build_pcms,
3905 .init = stac9872_vaio_init,
3906 .free = stac92xx_free,
3907 .unsol_event = stac9872_vaio_unsol_event,
3908#ifdef CONFIG_PM
3909 .resume = stac92xx_resume,
3910#endif
3911};
3912
6d859065
GM		 3913enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
3914 CXD9872RD_VAIO,
3915 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
3916 STAC9872AK_VAIO,
3917 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
3918 STAC9872K_VAIO,
3919 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 3920 CXD9872AKD_VAIO,
3921 STAC_9872_MODELS,
3922};
3923
3924static const char *stac9872_models[STAC_9872_MODELS] = {
3925 [CXD9872RD_VAIO] = "vaio",
3926 [CXD9872AKD_VAIO] = "vaio-ar",
3927};
3928
3929static struct snd_pci_quirk stac9872_cfg_tbl[] = {
3930 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
3931 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
3932 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 3933 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 3934 {}
3935};
3936
6d859065 3937static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 3938{
3939 struct sigmatel_spec *spec;
3940 int board_config;
3941
f5fcc13c
TI		 3942 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
3943 stac9872_models,
3944 stac9872_cfg_tbl);
db064e50
TI		 3945 if (board_config < 0)
3946 /* unknown config, let generic-parser do its job... */
3947 return snd_hda_parse_generic_codec(codec);
3948
3949 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3950 if (spec == NULL)
3951 return -ENOMEM;
3952
3953 codec->spec = spec;
3954 switch (board_config) {
6d859065
GM		 3955 case CXD9872RD_VAIO:
3956 case STAC9872AK_VAIO:
3957 case STAC9872K_VAIO:
db064e50
TI		 3958 spec->mixer = vaio_mixer;
3959 spec->init = vaio_init;
3960 spec->multiout.max_channels = 2;
3961 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3962 spec->multiout.dac_nids = vaio_dacs;
3963 spec->multiout.hp_nid = VAIO_HP_DAC;
3964 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3965 spec->adc_nids = vaio_adcs;
a64135a2 3966 spec->num_pwrs = 0;
db064e50
TI		 3967 spec->input_mux = &vaio_mux;
3968 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3969 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 3970 break;
6d859065
GM		 3971
3972 case CXD9872AKD_VAIO:
3973 spec->mixer = vaio_ar_mixer;
3974 spec->init = vaio_ar_init;
3975 spec->multiout.max_channels = 2;
3976 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3977 spec->multiout.dac_nids = vaio_dacs;
3978 spec->multiout.hp_nid = VAIO_HP_DAC;
3979 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 3980 spec->num_pwrs = 0;
6d859065
GM		 3981 spec->adc_nids = vaio_adcs;
3982 spec->input_mux = &vaio_mux;
3983 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3984 codec->patch_ops = stac9872_patch_ops;
6d859065 3985 break;
db064e50
TI		 3986 }
3987
db064e50
TI		 3988 return 0;
3989}
3990
3991
2f2f4251
M		 3992/*
3993 * patch entries
3994 */
3995struct hda_codec_preset snd_hda_preset_sigmatel[] = {
3996 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
3997 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
3998 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
3999 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4000 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4001 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4002 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4003 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4004 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4005 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4006 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4007 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4008 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4009 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4010 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4011 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4012 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4013 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4014 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4015 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4016 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4017 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4018 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4019 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4020 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4021 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4022 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4023 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4024 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 4025 /* The following does not take into account .id=0x83847661 when subsys =
4026 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4027 * currently not fully supported.
4028 */
4029 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4030 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4031 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 4032 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4033 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4034 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4035 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4036 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4037 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4038 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4039 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
541eee87
MR		 4040 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4041 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4042 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 4043 { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
4044 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4045 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4046 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4047 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4048 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4049 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4050 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4051 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 4052 {} /* terminator */
4053};
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