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ALSA: hda - Fix sound on NEC Versa S9100
[mirror_ubuntu-zesty-kernel.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
4e55096e 38#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 39#define STAC_PWR_EVENT 0x20
40#define STAC_HP_EVENT 0x30
4e55096e 41
f5fcc13c
TI		 42enum {
43 STAC_REF,
bf277785 44 STAC_9200_OQO,
dfe495d0
TI		 45 STAC_9200_DELL_D21,
46 STAC_9200_DELL_D22,
47 STAC_9200_DELL_D23,
48 STAC_9200_DELL_M21,
49 STAC_9200_DELL_M22,
50 STAC_9200_DELL_M23,
51 STAC_9200_DELL_M24,
52 STAC_9200_DELL_M25,
53 STAC_9200_DELL_M26,
54 STAC_9200_DELL_M27,
1194b5b7 55 STAC_9200_GATEWAY,
117f257d 56 STAC_9200_PANASONIC,
f5fcc13c
TI		 57 STAC_9200_MODELS
58};
59
60enum {
61 STAC_9205_REF,
dfe495d0 62 STAC_9205_DELL_M42,
ae0a8ed8
TD		 63 STAC_9205_DELL_M43,
64 STAC_9205_DELL_M44,
f5fcc13c
TI		 65 STAC_9205_MODELS
66};
67
e1f0d669
MR		 68enum {
69 STAC_92HD73XX_REF,
a7662640 70 STAC_DELL_M6,
e1f0d669
MR		 71 STAC_92HD73XX_MODELS
72};
73
d0513fc6
MR		 74enum {
75 STAC_92HD83XXX_REF,
76 STAC_92HD83XXX_MODELS
77};
78
e035b841
MR		 79enum {
80 STAC_92HD71BXX_REF,
a7662640
MR		 81 STAC_DELL_M4_1,
82 STAC_DELL_M4_2,
e035b841
MR		 83 STAC_92HD71BXX_MODELS
84};
85
8e21c34c
TD		 86enum {
87 STAC_925x_REF,
88 STAC_M2_2,
89 STAC_MA6,
2c11f955 90 STAC_PA6,
8e21c34c
TD		 91 STAC_925x_MODELS
92};
93
f5fcc13c
TI		 94enum {
95 STAC_D945_REF,
96 STAC_D945GTP3,
97 STAC_D945GTP5,
5d5d3bc3
IZ		 98 STAC_INTEL_MAC_V1,
99 STAC_INTEL_MAC_V2,
100 STAC_INTEL_MAC_V3,
101 STAC_INTEL_MAC_V4,
102 STAC_INTEL_MAC_V5,
536319af
NB		 103 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
104 * is given, one of the above models will be
105 * chosen according to the subsystem id. */
dfe495d0 106 /* for backward compatibility */
f5fcc13c 107 STAC_MACMINI,
3fc24d85 108 STAC_MACBOOK,
6f0778d8
NB		 109 STAC_MACBOOK_PRO_V1,
110 STAC_MACBOOK_PRO_V2,
f16928fb 111 STAC_IMAC_INTEL,
0dae0f83 112 STAC_IMAC_INTEL_20,
dfe495d0
TI		 113 STAC_922X_DELL_D81,
114 STAC_922X_DELL_D82,
115 STAC_922X_DELL_M81,
116 STAC_922X_DELL_M82,
f5fcc13c
TI		 117 STAC_922X_MODELS
118};
119
120enum {
121 STAC_D965_REF,
122 STAC_D965_3ST,
123 STAC_D965_5ST,
4ff076e5 124 STAC_DELL_3ST,
8e9068b1 125 STAC_DELL_BIOS,
f5fcc13c
TI		 126 STAC_927X_MODELS
127};
403d1944 128
2f2f4251 129struct sigmatel_spec {
c8b6bf9b 130 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 131 unsigned int num_mixers;
132
403d1944 133 int board_config;
c7d4b2fa 134 unsigned int surr_switch: 1;
403d1944
MP		 135 unsigned int line_switch: 1;
136 unsigned int mic_switch: 1;
3cc08dc6 137 unsigned int alt_switch: 1;
82bc955f 138 unsigned int hp_detect: 1;
c7d4b2fa 139
4fe5195c 140 /* gpio lines */
0fc9dec4 141 unsigned int eapd_mask;
4fe5195c
MR		 142 unsigned int gpio_mask;
143 unsigned int gpio_dir;
144 unsigned int gpio_data;
145 unsigned int gpio_mute;
146
147 /* analog loopback */
e1f0d669
MR		 148 unsigned char aloopback_mask;
149 unsigned char aloopback_shift;
8259980e 150
a64135a2
MR		 151 /* power management */
152 unsigned int num_pwrs;
d0513fc6 153 unsigned int *pwr_mapping;
a64135a2 154 hda_nid_t *pwr_nids;
b76c850f 155 hda_nid_t *dac_list;
a64135a2 156
2f2f4251 157 /* playback */
b22b4821
MR		 158 struct hda_input_mux *mono_mux;
159 unsigned int cur_mmux;
2f2f4251 160 struct hda_multi_out multiout;
3cc08dc6 161 hda_nid_t dac_nids[5];
2f2f4251
M		 162
163 /* capture */
164 hda_nid_t *adc_nids;
2f2f4251 165 unsigned int num_adcs;
dabbed6f
M		 166 hda_nid_t *mux_nids;
167 unsigned int num_muxes;
8b65727b
MP		 168 hda_nid_t *dmic_nids;
169 unsigned int num_dmics;
e1f0d669 170 hda_nid_t *dmux_nids;
1697055e 171 unsigned int num_dmuxes;
dabbed6f 172 hda_nid_t dig_in_nid;
b22b4821 173 hda_nid_t mono_nid;
1cd2224c
MR		 174 hda_nid_t anabeep_nid;
175 hda_nid_t digbeep_nid;
2f2f4251 176
2f2f4251
M		 177 /* pin widgets */
178 hda_nid_t *pin_nids;
179 unsigned int num_pins;
2f2f4251 180 unsigned int *pin_configs;
11b44bbd 181 unsigned int *bios_pin_configs;
2f2f4251
M		 182
183 /* codec specific stuff */
184 struct hda_verb *init;
c8b6bf9b 185 struct snd_kcontrol_new *mixer;
2f2f4251
M		 186
187 /* capture source */
8b65727b 188 struct hda_input_mux *dinput_mux;
e1f0d669 189 unsigned int cur_dmux[2];
c7d4b2fa 190 struct hda_input_mux *input_mux;
3cc08dc6 191 unsigned int cur_mux[3];
2f2f4251 192
403d1944
MP		 193 /* i/o switches */
194 unsigned int io_switch[2];
0fb87bb4 195 unsigned int clfe_swap;
7c2ba97b 196 unsigned int hp_switch;
5f10c4a9 197 unsigned int aloopback;
2f2f4251 198
c7d4b2fa
M		 199 struct hda_pcm pcm_rec[2]; /* PCM information */
200
201 /* dynamic controls and input_mux */
202 struct auto_pin_cfg autocfg;
203 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 204 struct snd_kcontrol_new *kctl_alloc;
8b65727b 205 struct hda_input_mux private_dimux;
c7d4b2fa 206 struct hda_input_mux private_imux;
b22b4821 207 struct hda_input_mux private_mono_mux;
2f2f4251
M		 208};
209
210static hda_nid_t stac9200_adc_nids[1] = {
211 0x03,
212};
213
214static hda_nid_t stac9200_mux_nids[1] = {
215 0x0c,
216};
217
218static hda_nid_t stac9200_dac_nids[1] = {
219 0x02,
220};
221
a64135a2
MR		 222static hda_nid_t stac92hd73xx_pwr_nids[8] = {
223 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
224 0x0f, 0x10, 0x11
225};
226
e1f0d669
MR		 227static hda_nid_t stac92hd73xx_adc_nids[2] = {
228 0x1a, 0x1b
229};
230
231#define STAC92HD73XX_NUM_DMICS 2
232static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
233 0x13, 0x14, 0
234};
235
236#define STAC92HD73_DAC_COUNT 5
237static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
238 0x15, 0x16, 0x17, 0x18, 0x19,
239};
240
241static hda_nid_t stac92hd73xx_mux_nids[4] = {
242 0x28, 0x29, 0x2a, 0x2b,
243};
244
245static hda_nid_t stac92hd73xx_dmux_nids[2] = {
246 0x20, 0x21,
247};
248
d0513fc6
MR		 249#define STAC92HD83XXX_NUM_DMICS 2
250static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
251 0x11, 0x12, 0
252};
253
254#define STAC92HD81_DAC_COUNT 2
255#define STAC92HD83_DAC_COUNT 3
256static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
257 0x13, 0x14, 0x22,
258};
259
260static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
261 0x17, 0x18,
262};
263
264static hda_nid_t stac92hd83xxx_adc_nids[2] = {
265 0x15, 0x16,
266};
267
268static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
269 0xa, 0xb, 0xd, 0xe,
270};
271
272static unsigned int stac92hd83xxx_pwr_mapping[4] = {
273 0x03, 0x0c, 0x10, 0x40,
274};
275
a64135a2
MR		 276static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
277 0x0a, 0x0d, 0x0f
278};
279
e035b841
MR		 280static hda_nid_t stac92hd71bxx_adc_nids[2] = {
281 0x12, 0x13,
282};
283
284static hda_nid_t stac92hd71bxx_mux_nids[2] = {
285 0x1a, 0x1b
286};
287
e1f0d669
MR		 288static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
289 0x1c,
290};
291
aea7bb0a 292static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 293 0x10, /*0x11, */
294};
295
296#define STAC92HD71BXX_NUM_DMICS 2
297static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
298 0x18, 0x19, 0
299};
300
8e21c34c
TD		 301static hda_nid_t stac925x_adc_nids[1] = {
302 0x03,
303};
304
305static hda_nid_t stac925x_mux_nids[1] = {
306 0x0f,
307};
308
309static hda_nid_t stac925x_dac_nids[1] = {
310 0x02,
311};
312
f6e9852a
TI		 313#define STAC925X_NUM_DMICS 1
314static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
315 0x15, 0
2c11f955
TD		 316};
317
1697055e
TI		 318static hda_nid_t stac925x_dmux_nids[1] = {
319 0x14,
320};
321
2f2f4251
M		 322static hda_nid_t stac922x_adc_nids[2] = {
323 0x06, 0x07,
324};
325
326static hda_nid_t stac922x_mux_nids[2] = {
327 0x12, 0x13,
328};
329
3cc08dc6
MP		 330static hda_nid_t stac927x_adc_nids[3] = {
331 0x07, 0x08, 0x09
332};
333
334static hda_nid_t stac927x_mux_nids[3] = {
335 0x15, 0x16, 0x17
336};
337
b76c850f
MR		 338static hda_nid_t stac927x_dac_nids[6] = {
339 0x02, 0x03, 0x04, 0x05, 0x06, 0
340};
341
e1f0d669
MR		 342static hda_nid_t stac927x_dmux_nids[1] = {
343 0x1b,
344};
345
7f16859a
MR		 346#define STAC927X_NUM_DMICS 2
347static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
348 0x13, 0x14, 0
349};
350
f3302a59
MP		 351static hda_nid_t stac9205_adc_nids[2] = {
352 0x12, 0x13
353};
354
355static hda_nid_t stac9205_mux_nids[2] = {
356 0x19, 0x1a
357};
358
e1f0d669 359static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 360 0x1d,
e1f0d669
MR		 361};
362
f6e9852a
TI		 363#define STAC9205_NUM_DMICS 2
364static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
365 0x17, 0x18, 0
8b65727b
MP		 366};
367
c7d4b2fa 368static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 369 0x08, 0x09, 0x0d, 0x0e,
370 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 371};
372
8e21c34c
TD		 373static hda_nid_t stac925x_pin_nids[8] = {
374 0x07, 0x08, 0x0a, 0x0b,
375 0x0c, 0x0d, 0x10, 0x11,
376};
377
2f2f4251
M		 378static hda_nid_t stac922x_pin_nids[10] = {
379 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
380 0x0f, 0x10, 0x11, 0x15, 0x1b,
381};
382
a7662640 383static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 384 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
385 0x0f, 0x10, 0x11, 0x12, 0x13,
a7662640 386 0x14, 0x1e, 0x22
e1f0d669
MR		 387};
388
d0513fc6
MR		 389static hda_nid_t stac92hd83xxx_pin_nids[14] = {
390 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
391 0x0f, 0x10, 0x11, 0x12, 0x13,
392 0x1d, 0x1e, 0x1f, 0x20
393};
e035b841
MR		 394static hda_nid_t stac92hd71bxx_pin_nids[10] = {
395 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
396 0x0f, 0x14, 0x18, 0x19, 0x1e,
397};
398
3cc08dc6
MP		 399static hda_nid_t stac927x_pin_nids[14] = {
400 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
401 0x0f, 0x10, 0x11, 0x12, 0x13,
402 0x14, 0x21, 0x22, 0x23,
403};
404
f3302a59
MP		 405static hda_nid_t stac9205_pin_nids[12] = {
406 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
407 0x0f, 0x14, 0x16, 0x17, 0x18,
408 0x21, 0x22,
f3302a59
MP		 409};
410
8b65727b
MP		 411static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
412 struct snd_ctl_elem_info *uinfo)
413{
414 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
415 struct sigmatel_spec *spec = codec->spec;
416 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
417}
418
419static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
420 struct snd_ctl_elem_value *ucontrol)
421{
422 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
423 struct sigmatel_spec *spec = codec->spec;
e1f0d669 424 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 425
e1f0d669 426 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 427 return 0;
428}
429
430static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
431 struct snd_ctl_elem_value *ucontrol)
432{
433 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
434 struct sigmatel_spec *spec = codec->spec;
e1f0d669 435 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 436
437 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 438 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 439}
440
c8b6bf9b 441static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 442{
443 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
444 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 445 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 446}
447
c8b6bf9b 448static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 449{
450 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
451 struct sigmatel_spec *spec = codec->spec;
452 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
453
454 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
455 return 0;
456}
457
c8b6bf9b 458static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 459{
460 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
461 struct sigmatel_spec *spec = codec->spec;
462 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
463
c7d4b2fa 464 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 465 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
466}
467
b22b4821
MR		 468static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
469 struct snd_ctl_elem_info *uinfo)
470{
471 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
472 struct sigmatel_spec *spec = codec->spec;
473 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
474}
475
476static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
477 struct snd_ctl_elem_value *ucontrol)
478{
479 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
480 struct sigmatel_spec *spec = codec->spec;
481
482 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
483 return 0;
484}
485
486static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
487 struct snd_ctl_elem_value *ucontrol)
488{
489 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
490 struct sigmatel_spec *spec = codec->spec;
491
492 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
493 spec->mono_nid, &spec->cur_mmux);
494}
495
5f10c4a9
ML		 496#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
497
498static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
499 struct snd_ctl_elem_value *ucontrol)
500{
501 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 502 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 503 struct sigmatel_spec *spec = codec->spec;
504
e1f0d669
MR		 505 ucontrol->value.integer.value[0] = !!(spec->aloopback &
506 (spec->aloopback_mask << idx));
5f10c4a9
ML		 507 return 0;
508}
509
510static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
511 struct snd_ctl_elem_value *ucontrol)
512{
513 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
514 struct sigmatel_spec *spec = codec->spec;
e1f0d669 515 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 516 unsigned int dac_mode;
e1f0d669 517 unsigned int val, idx_val;
5f10c4a9 518
e1f0d669
MR		 519 idx_val = spec->aloopback_mask << idx;
520 if (ucontrol->value.integer.value[0])
521 val = spec->aloopback | idx_val;
522 else
523 val = spec->aloopback & ~idx_val;
68ea7b2f 524 if (spec->aloopback == val)
5f10c4a9
ML		 525 return 0;
526
68ea7b2f 527 spec->aloopback = val;
5f10c4a9 528
e1f0d669
MR		 529 /* Only return the bits defined by the shift value of the
530 * first two bytes of the mask
531 */
5f10c4a9 532 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 533 kcontrol->private_value & 0xFFFF, 0x0);
534 dac_mode >>= spec->aloopback_shift;
5f10c4a9 535
e1f0d669 536 if (spec->aloopback & idx_val) {
5f10c4a9 537 snd_hda_power_up(codec);
e1f0d669 538 dac_mode |= idx_val;
5f10c4a9
ML		 539 } else {
540 snd_hda_power_down(codec);
e1f0d669 541 dac_mode &= ~idx_val;
5f10c4a9
ML		 542 }
543
544 snd_hda_codec_write_cache(codec, codec->afg, 0,
545 kcontrol->private_value >> 16, dac_mode);
546
547 return 1;
548}
549
c7d4b2fa 550static struct hda_verb stac9200_core_init[] = {
2f2f4251 551 /* set dac0mux for dac converter */
c7d4b2fa 552 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 553 {}
554};
555
1194b5b7
TI		 556static struct hda_verb stac9200_eapd_init[] = {
557 /* set dac0mux for dac converter */
558 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
559 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
560 {}
561};
562
e1f0d669
MR		 563static struct hda_verb stac92hd73xx_6ch_core_init[] = {
564 /* set master volume and direct control */
565 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
566 /* setup audio connections */
567 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
568 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
569 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
570 /* setup adcs to point to mixer */
571 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
572 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 573 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
574 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
575 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
576 /* setup import muxs */
577 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
578 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
579 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
580 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
581 {}
582};
583
d654a660
MR		 584static struct hda_verb dell_eq_core_init[] = {
585 /* set master volume to max value without distortion
586 * and direct control */
587 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
588 /* setup audio connections */
589 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
590 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
591 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
592 /* setup adcs to point to mixer */
593 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
594 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
595 /* setup import muxs */
596 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
597 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
598 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
599 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
600 {}
601};
602
52fe0f9d 603static struct hda_verb dell_m6_core_init[] = {
20f5f95d
MR		 604 /* set master volume to max value without distortion
605 * and direct control */
606 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
52fe0f9d 607 /* setup audio connections */
7747ecce
MR		 608 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
609 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 610 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
611 /* setup adcs to point to mixer */
612 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
613 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
614 /* setup import muxs */
615 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
616 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
617 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
618 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
619 {}
620};
621
e1f0d669
MR		 622static struct hda_verb stac92hd73xx_8ch_core_init[] = {
623 /* set master volume and direct control */
624 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
625 /* setup audio connections */
626 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
627 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
628 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
629 /* connect hp ports to dac3 */
630 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
631 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
632 /* setup adcs to point to mixer */
633 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
634 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 635 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
636 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
637 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
638 /* setup import muxs */
639 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
640 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
641 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
642 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
643 {}
644};
645
646static struct hda_verb stac92hd73xx_10ch_core_init[] = {
647 /* set master volume and direct control */
648 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
649 /* setup audio connections */
650 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
651 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
652 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
653 /* dac3 is connected to import3 mux */
654 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
655 /* connect hp ports to dac4 */
656 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
657 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
658 /* setup adcs to point to mixer */
659 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
660 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 661 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
662 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
663 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
664 /* setup import muxs */
665 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
666 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
667 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
668 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
669 {}
670};
671
d0513fc6
MR		 672static struct hda_verb stac92hd83xxx_core_init[] = {
673 /* start of config #1 */
674 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
675
676 /* start of config #2 */
677 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
678 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
679 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
680
681 /* power state controls amps */
682 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
683};
684
e035b841 685static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 686 /* set master volume and direct control */
687 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
688 /* connect headphone jack to dac1 */
689 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
690 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
691 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
692 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
693 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
694 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 695};
696
aafc4412 697#define HD_DISABLE_PORTF 3
541eee87 698static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 699 /* start of config #1 */
700
701 /* connect port 0f to audio mixer */
702 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
703 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
704 /* unmute right and left channels for node 0x0f */
705 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
706 /* start of config #2 */
707
e035b841
MR		 708 /* set master volume and direct control */
709 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
710 /* connect headphone jack to dac1 */
711 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 712 /* connect port 0d to audio mixer */
9b35947f 713 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
9b35947f
MR		 714 /* unmute dac0 input in audio mixer */
715 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
aafc4412 716 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 717 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
718 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 719 {}
720};
721
8e21c34c
TD		 722static struct hda_verb stac925x_core_init[] = {
723 /* set dac0mux for dac converter */
724 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
725 {}
726};
727
c7d4b2fa 728static struct hda_verb stac922x_core_init[] = {
2f2f4251 729 /* set master volume and direct control */
c7d4b2fa 730 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 731 {}
732};
733
93ed1503 734static struct hda_verb d965_core_init[] = {
19039bd0 735 /* set master volume and direct control */
93ed1503 736 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 737 /* unmute node 0x1b */
738 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
739 /* select node 0x03 as DAC */
740 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
741 {}
742};
743
3cc08dc6
MP		 744static struct hda_verb stac927x_core_init[] = {
745 /* set master volume and direct control */
746 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 747 /* enable analog pc beep path */
748 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 749 {}
750};
751
f3302a59
MP		 752static struct hda_verb stac9205_core_init[] = {
753 /* set master volume and direct control */
754 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 755 /* enable analog pc beep path */
756 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 757 {}
758};
759
b22b4821
MR		 760#define STAC_MONO_MUX \
761 { \
762 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
763 .name = "Mono Mux", \
764 .count = 1, \
765 .info = stac92xx_mono_mux_enum_info, \
766 .get = stac92xx_mono_mux_enum_get, \
767 .put = stac92xx_mono_mux_enum_put, \
768 }
769
9e05b7a3 770#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 771 { \
772 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
773 .name = "Input Source", \
9e05b7a3 774 .count = cnt, \
ca7c5a8b
ML		 775 .info = stac92xx_mux_enum_info, \
776 .get = stac92xx_mux_enum_get, \
777 .put = stac92xx_mux_enum_put, \
778 }
779
e1f0d669 780#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 781 { \
782 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
783 .name = "Analog Loopback", \
e1f0d669 784 .count = cnt, \
5f10c4a9
ML		 785 .info = stac92xx_aloopback_info, \
786 .get = stac92xx_aloopback_get, \
787 .put = stac92xx_aloopback_put, \
788 .private_value = verb_read | (verb_write << 16), \
789 }
790
c8b6bf9b 791static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 792 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
793 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 794 STAC_INPUT_SOURCE(1),
2f2f4251
M		 795 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
796 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 797 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 798 { } /* end */
799};
800
e1f0d669 801static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 802 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
803
e1f0d669
MR		 804 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
805 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
806
807 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
808 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
809
810 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
811 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
812
813 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
814 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
815
816 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
817 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
818
819 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
820 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
821
822 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
823 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
824 { } /* end */
825};
826
827static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 828 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
829
e1f0d669
MR		 830 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
831 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
832
833 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
834 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
835
836 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
837 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
838
839 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
840 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
841
842 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
843 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
844
845 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
846 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
847
848 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
849 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
850 { } /* end */
851};
852
853static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 854 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
855
e1f0d669
MR		 856 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
857 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
858
859 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
860 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
861
862 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
863 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
864
865 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
866 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
867
868 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
869 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
870
871 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
872 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
873
874 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
875 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
876 { } /* end */
877};
878
d0513fc6
MR		 879
880static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
881 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
882 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
883
884 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
885 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
886
887 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
888 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
889
890 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
891 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
892
893 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
894 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
895
896 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
897 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
898
899 /*
900 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
901 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
902 */
903 { } /* end */
904};
905
541eee87 906static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 907 STAC_INPUT_SOURCE(2),
e035b841 908
9b35947f
MR		 909 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
910 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
911 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
912
913 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
914 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
915 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 916
1cd2224c
MR		 917 /* analog pc-beep replaced with digital beep support */
918 /*
f7c5dda2
MR		 919 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
920 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 921 */
f7c5dda2 922
9b35947f
MR		 923 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
924 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 925 { } /* end */
926};
927
541eee87 928static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 929 STAC_INPUT_SOURCE(2),
930 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
931
541eee87
MR		 932 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
933 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
934 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
935
936 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
937 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
938 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
939 { } /* end */
940};
941
8e21c34c 942static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 943 STAC_INPUT_SOURCE(1),
8e21c34c 944 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 945 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 946 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
947 { } /* end */
948};
949
9e05b7a3 950static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 951 STAC_INPUT_SOURCE(2),
e1f0d669 952 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 953
954 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
955 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
956 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
957
958 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
959 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
960 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
961
2f2f4251
M		 962 { } /* end */
963};
964
19039bd0 965/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 966static struct snd_kcontrol_new stac922x_mixer[] = {
967 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 968 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
969 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
970 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
971
972 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
973 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
974 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 975 { } /* end */
976};
977
9e05b7a3 978
d1d985f0 979static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 980 STAC_INPUT_SOURCE(3),
e1f0d669 981 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 982
9e05b7a3
ML		 983 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
984 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
985 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
986
987 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
988 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
989 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
990
991 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
992 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
993 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 994 { } /* end */
995};
996
1697055e
TI		 997static struct snd_kcontrol_new stac_dmux_mixer = {
998 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
999 .name = "Digital Input Source",
1000 /* count set later */
1001 .info = stac92xx_dmux_enum_info,
1002 .get = stac92xx_dmux_enum_get,
1003 .put = stac92xx_dmux_enum_put,
1004};
1005
2134ea4f
TI		 1006static const char *slave_vols[] = {
1007 "Front Playback Volume",
1008 "Surround Playback Volume",
1009 "Center Playback Volume",
1010 "LFE Playback Volume",
1011 "Side Playback Volume",
1012 "Headphone Playback Volume",
1013 "Headphone Playback Volume",
1014 "Speaker Playback Volume",
1015 "External Speaker Playback Volume",
1016 "Speaker2 Playback Volume",
1017 NULL
1018};
1019
1020static const char *slave_sws[] = {
1021 "Front Playback Switch",
1022 "Surround Playback Switch",
1023 "Center Playback Switch",
1024 "LFE Playback Switch",
1025 "Side Playback Switch",
1026 "Headphone Playback Switch",
1027 "Headphone Playback Switch",
1028 "Speaker Playback Switch",
1029 "External Speaker Playback Switch",
1030 "Speaker2 Playback Switch",
edb54a55 1031 "IEC958 Playback Switch",
2134ea4f
TI		 1032 NULL
1033};
1034
2f2f4251
M		 1035static int stac92xx_build_controls(struct hda_codec *codec)
1036{
1037 struct sigmatel_spec *spec = codec->spec;
1038 int err;
c7d4b2fa 1039 int i;
2f2f4251
M		 1040
1041 err = snd_hda_add_new_ctls(codec, spec->mixer);
1042 if (err < 0)
1043 return err;
c7d4b2fa
M		 1044
1045 for (i = 0; i < spec->num_mixers; i++) {
1046 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1047 if (err < 0)
1048 return err;
1049 }
1697055e
TI		 1050 if (spec->num_dmuxes > 0) {
1051 stac_dmux_mixer.count = spec->num_dmuxes;
1052 err = snd_ctl_add(codec->bus->card,
1053 snd_ctl_new1(&stac_dmux_mixer, codec));
1054 if (err < 0)
1055 return err;
1056 }
c7d4b2fa 1057
dabbed6f
M		 1058 if (spec->multiout.dig_out_nid) {
1059 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1060 if (err < 0)
1061 return err;
9a08160b
TI		 1062 err = snd_hda_create_spdif_share_sw(codec,
1063 &spec->multiout);
1064 if (err < 0)
1065 return err;
1066 spec->multiout.share_spdif = 1;
dabbed6f
M		 1067 }
1068 if (spec->dig_in_nid) {
1069 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1070 if (err < 0)
1071 return err;
1072 }
2134ea4f
TI		 1073
1074 /* if we have no master control, let's create it */
1075 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1076 unsigned int vmaster_tlv[4];
2134ea4f 1077 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1078 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1079 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1080 vmaster_tlv, slave_vols);
2134ea4f
TI		 1081 if (err < 0)
1082 return err;
1083 }
1084 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1085 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1086 NULL, slave_sws);
1087 if (err < 0)
1088 return err;
1089 }
1090
dabbed6f 1091 return 0;
2f2f4251
M		 1092}
1093
403d1944 1094static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1095 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1096 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1097};
1098
dfe495d0
TI		 1099/*
1100 STAC 9200 pin configs for
1101 102801A8
1102 102801DE
1103 102801E8
1104*/
1105static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1106 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1107 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1108};
1109
1110/*
1111 STAC 9200 pin configs for
1112 102801C0
1113 102801C1
1114*/
1115static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1116 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1117 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1118};
1119
1120/*
1121 STAC 9200 pin configs for
1122 102801C4 (Dell Dimension E310)
1123 102801C5
1124 102801C7
1125 102801D9
1126 102801DA
1127 102801E3
1128*/
1129static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1130 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1131 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1132};
1133
1134
1135/*
1136 STAC 9200-32 pin configs for
1137 102801B5 (Dell Inspiron 630m)
1138 102801D8 (Dell Inspiron 640m)
1139*/
1140static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1141 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1142 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1143};
1144
1145/*
1146 STAC 9200-32 pin configs for
1147 102801C2 (Dell Latitude D620)
1148 102801C8
1149 102801CC (Dell Latitude D820)
1150 102801D4
1151 102801D6
1152*/
1153static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1154 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1155 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1156};
1157
1158/*
1159 STAC 9200-32 pin configs for
1160 102801CE (Dell XPS M1710)
1161 102801CF (Dell Precision M90)
1162*/
1163static unsigned int dell9200_m23_pin_configs[8] = {
1164 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1165 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1166};
1167
1168/*
1169 STAC 9200-32 pin configs for
1170 102801C9
1171 102801CA
1172 102801CB (Dell Latitude 120L)
1173 102801D3
1174*/
1175static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1176 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1177 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1178};
1179
1180/*
1181 STAC 9200-32 pin configs for
1182 102801BD (Dell Inspiron E1505n)
1183 102801EE
1184 102801EF
1185*/
1186static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1187 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1188 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1189};
1190
1191/*
1192 STAC 9200-32 pin configs for
1193 102801F5 (Dell Inspiron 1501)
1194 102801F6
1195*/
1196static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1197 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1198 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1199};
1200
1201/*
1202 STAC 9200-32
1203 102801CD (Dell Inspiron E1705/9400)
1204*/
1205static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1206 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1207 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1208};
1209
bf277785
TD		 1210static unsigned int oqo9200_pin_configs[8] = {
1211 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1212 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1213};
1214
dfe495d0 1215
f5fcc13c
TI		 1216static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1217 [STAC_REF] = ref9200_pin_configs,
bf277785 1218 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1219 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1220 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1221 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1222 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1223 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1224 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1225 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1226 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1227 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1228 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1229 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1230};
1231
f5fcc13c
TI		 1232static const char *stac9200_models[STAC_9200_MODELS] = {
1233 [STAC_REF] = "ref",
bf277785 1234 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1235 [STAC_9200_DELL_D21] = "dell-d21",
1236 [STAC_9200_DELL_D22] = "dell-d22",
1237 [STAC_9200_DELL_D23] = "dell-d23",
1238 [STAC_9200_DELL_M21] = "dell-m21",
1239 [STAC_9200_DELL_M22] = "dell-m22",
1240 [STAC_9200_DELL_M23] = "dell-m23",
1241 [STAC_9200_DELL_M24] = "dell-m24",
1242 [STAC_9200_DELL_M25] = "dell-m25",
1243 [STAC_9200_DELL_M26] = "dell-m26",
1244 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1245 [STAC_9200_GATEWAY] = "gateway",
117f257d 1246 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1247};
1248
1249static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1250 /* SigmaTel reference board */
1251 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1252 "DFI LanParty", STAC_REF),
e7377071 1253 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1254 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1255 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1256 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1257 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1258 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1259 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1260 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1261 "unknown Dell", STAC_9200_DELL_D22),
1262 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1263 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1264 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1265 "Dell Latitude D620", STAC_9200_DELL_M22),
1266 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1267 "unknown Dell", STAC_9200_DELL_D23),
1268 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1269 "unknown Dell", STAC_9200_DELL_D23),
1270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1271 "unknown Dell", STAC_9200_DELL_M22),
1272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1273 "unknown Dell", STAC_9200_DELL_M24),
1274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1275 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1277 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1279 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1281 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1283 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1285 "Dell Precision M90", STAC_9200_DELL_M23),
1286 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1287 "unknown Dell", STAC_9200_DELL_M22),
1288 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1289 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1290 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1291 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1292 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1293 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1294 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1295 "unknown Dell", STAC_9200_DELL_D23),
1296 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1297 "unknown Dell", STAC_9200_DELL_D23),
1298 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1299 "unknown Dell", STAC_9200_DELL_D21),
1300 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1301 "unknown Dell", STAC_9200_DELL_D23),
1302 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1303 "unknown Dell", STAC_9200_DELL_D21),
1304 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1305 "unknown Dell", STAC_9200_DELL_M25),
1306 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1307 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1308 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1309 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1310 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1311 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1312 /* Panasonic */
117f257d 1313 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1314 /* Gateway machines needs EAPD to be set on resume */
1315 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1316 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1317 STAC_9200_GATEWAY),
1318 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1319 STAC_9200_GATEWAY),
bf277785
TD		 1320 /* OQO Mobile */
1321 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1322 {} /* terminator */
1323};
1324
8e21c34c
TD		 1325static unsigned int ref925x_pin_configs[8] = {
1326 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1327 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1328};
1329
1330static unsigned int stac925x_MA6_pin_configs[8] = {
1331 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1332 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1333};
1334
2c11f955
TD		 1335static unsigned int stac925x_PA6_pin_configs[8] = {
1336 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1337 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1338};
1339
8e21c34c 1340static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1341 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1342 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1343};
1344
1345static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1346 [STAC_REF] = ref925x_pin_configs,
1347 [STAC_M2_2] = stac925xM2_2_pin_configs,
1348 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1349 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1350};
1351
1352static const char *stac925x_models[STAC_925x_MODELS] = {
1353 [STAC_REF] = "ref",
1354 [STAC_M2_2] = "m2-2",
1355 [STAC_MA6] = "m6",
2c11f955 1356 [STAC_PA6] = "pa6",
8e21c34c
TD		 1357};
1358
1359static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1360 /* SigmaTel reference board */
1361 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1362 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1363 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1364 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1365 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1366 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1367 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1368 {} /* terminator */
1369};
1370
a7662640 1371static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1372 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1373 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1374 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1375 0x01452050,
1376};
1377
1378static unsigned int dell_m6_pin_configs[13] = {
1379 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1380 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1381 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1382 0x4f0000f0,
e1f0d669
MR		 1383};
1384
1385static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1386 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1387 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1388};
1389
1390static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1391 [STAC_92HD73XX_REF] = "ref",
a7662640 1392 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1393};
1394
1395static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1396 /* SigmaTel reference board */
1397 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1398 "DFI LanParty", STAC_92HD73XX_REF),
1399 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1400 "unknown Dell", STAC_DELL_M6),
1401 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1402 "unknown Dell", STAC_DELL_M6),
1403 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1404 "unknown Dell", STAC_DELL_M6),
1405 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1406 "unknown Dell", STAC_DELL_M6),
1407 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1408 "unknown Dell", STAC_DELL_M6),
1409 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1410 "unknown Dell", STAC_DELL_M6),
1411 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1412 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1413 {} /* terminator */
1414};
1415
d0513fc6
MR		 1416static unsigned int ref92hd83xxx_pin_configs[14] = {
1417 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1418 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1419 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1420 0x01451160, 0x98560170,
1421};
1422
1423static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1424 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1425};
1426
1427static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1428 [STAC_92HD83XXX_REF] = "ref",
1429};
1430
1431static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1432 /* SigmaTel reference board */
1433 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1434 "DFI LanParty", STAC_92HD71BXX_REF),
1435};
1436
e035b841
MR		 1437static unsigned int ref92hd71bxx_pin_configs[10] = {
1438 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1439 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1440 0x90a000f0, 0x01452050,
1441};
1442
aafc4412 1443static unsigned int dell_m4_1_pin_configs[10] = {
a7662640 1444 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1445 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
a7662640
MR		 1446 0x40f000f0, 0x4f0000f0,
1447};
1448
aafc4412 1449static unsigned int dell_m4_2_pin_configs[10] = {
a7662640
MR		 1450 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1451 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
1452 0x40f000f0, 0x044413b0,
1453};
1454
e035b841
MR		 1455static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1456 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1457 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1458 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
e035b841
MR		 1459};
1460
1461static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1462 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1463 [STAC_DELL_M4_1] = "dell-m4-1",
1464 [STAC_DELL_M4_2] = "dell-m4-2",
e035b841
MR		 1465};
1466
1467static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1468 /* SigmaTel reference board */
1469 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1470 "DFI LanParty", STAC_92HD71BXX_REF),
a7662640
MR		 1471 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1472 "unknown Dell", STAC_DELL_M4_1),
1473 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1474 "unknown Dell", STAC_DELL_M4_1),
1475 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1476 "unknown Dell", STAC_DELL_M4_1),
1477 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1478 "unknown Dell", STAC_DELL_M4_1),
1479 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1480 "unknown Dell", STAC_DELL_M4_1),
1481 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1482 "unknown Dell", STAC_DELL_M4_1),
1483 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1484 "unknown Dell", STAC_DELL_M4_1),
1485 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1486 "unknown Dell", STAC_DELL_M4_2),
1487 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1488 "unknown Dell", STAC_DELL_M4_2),
1489 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1490 "unknown Dell", STAC_DELL_M4_2),
1491 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1492 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1493 {} /* terminator */
1494};
1495
403d1944
MP		 1496static unsigned int ref922x_pin_configs[10] = {
1497 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1498 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1499 0x40000100, 0x40000100,
1500};
1501
dfe495d0
TI		 1502/*
1503 STAC 922X pin configs for
1504 102801A7
1505 102801AB
1506 102801A9
1507 102801D1
1508 102801D2
1509*/
1510static unsigned int dell_922x_d81_pin_configs[10] = {
1511 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1512 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1513 0x01813122, 0x400001f2,
1514};
1515
1516/*
1517 STAC 922X pin configs for
1518 102801AC
1519 102801D0
1520*/
1521static unsigned int dell_922x_d82_pin_configs[10] = {
1522 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1523 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1524 0x01813122, 0x400001f1,
1525};
1526
1527/*
1528 STAC 922X pin configs for
1529 102801BF
1530*/
1531static unsigned int dell_922x_m81_pin_configs[10] = {
1532 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1533 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1534 0x40C003f1, 0x405003f0,
1535};
1536
1537/*
1538 STAC 9221 A1 pin configs for
1539 102801D7 (Dell XPS M1210)
1540*/
1541static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1542 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1543 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1544 0x508003f3, 0x405003f4,
1545};
1546
403d1944 1547static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1548 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1549 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1550 0x02a19120, 0x40000100,
1551};
1552
1553static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1554 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1555 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1556 0x02a19320, 0x40000100,
1557};
1558
5d5d3bc3
IZ		 1559static unsigned int intel_mac_v1_pin_configs[10] = {
1560 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1561 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1562 0x400000fc, 0x400000fb,
1563};
1564
1565static unsigned int intel_mac_v2_pin_configs[10] = {
1566 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1567 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1568 0x400000fc, 0x400000fb,
6f0778d8
NB		 1569};
1570
5d5d3bc3
IZ		 1571static unsigned int intel_mac_v3_pin_configs[10] = {
1572 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1573 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1574 0x400000fc, 0x400000fb,
1575};
1576
5d5d3bc3
IZ		 1577static unsigned int intel_mac_v4_pin_configs[10] = {
1578 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1579 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1580 0x400000fc, 0x400000fb,
1581};
1582
5d5d3bc3
IZ		 1583static unsigned int intel_mac_v5_pin_configs[10] = {
1584 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1585 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1586 0x400000fc, 0x400000fb,
0dae0f83
TI		 1587};
1588
76c08828 1589
19039bd0 1590static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1591 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1592 [STAC_D945GTP3] = d945gtp3_pin_configs,
1593 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1594 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1595 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1596 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1597 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1598 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1599 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1600 /* for backward compatibility */
5d5d3bc3
IZ		 1601 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1602 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1603 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1604 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1605 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1606 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1607 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1608 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1609 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1610 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1611};
1612
f5fcc13c
TI		 1613static const char *stac922x_models[STAC_922X_MODELS] = {
1614 [STAC_D945_REF] = "ref",
1615 [STAC_D945GTP5] = "5stack",
1616 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1617 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1618 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1619 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1620 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1621 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1622 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1623 /* for backward compatibility */
f5fcc13c 1624 [STAC_MACMINI] = "macmini",
3fc24d85 1625 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1626 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1627 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1628 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1629 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1630 [STAC_922X_DELL_D81] = "dell-d81",
1631 [STAC_922X_DELL_D82] = "dell-d82",
1632 [STAC_922X_DELL_M81] = "dell-m81",
1633 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1634};
1635
1636static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1637 /* SigmaTel reference board */
1638 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1639 "DFI LanParty", STAC_D945_REF),
1640 /* Intel 945G based systems */
1641 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1642 "Intel D945G", STAC_D945GTP3),
1643 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1644 "Intel D945G", STAC_D945GTP3),
1645 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1646 "Intel D945G", STAC_D945GTP3),
1647 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1648 "Intel D945G", STAC_D945GTP3),
1649 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1650 "Intel D945G", STAC_D945GTP3),
1651 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1652 "Intel D945G", STAC_D945GTP3),
1653 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1654 "Intel D945G", STAC_D945GTP3),
1655 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1656 "Intel D945G", STAC_D945GTP3),
1657 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1658 "Intel D945G", STAC_D945GTP3),
1659 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1660 "Intel D945G", STAC_D945GTP3),
1661 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1662 "Intel D945G", STAC_D945GTP3),
1663 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1664 "Intel D945G", STAC_D945GTP3),
1665 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1666 "Intel D945G", STAC_D945GTP3),
1667 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1668 "Intel D945G", STAC_D945GTP3),
1669 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1670 "Intel D945G", STAC_D945GTP3),
1671 /* Intel D945G 5-stack systems */
1672 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1673 "Intel D945G", STAC_D945GTP5),
1674 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1675 "Intel D945G", STAC_D945GTP5),
1676 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1677 "Intel D945G", STAC_D945GTP5),
1678 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1679 "Intel D945G", STAC_D945GTP5),
1680 /* Intel 945P based systems */
1681 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1682 "Intel D945P", STAC_D945GTP3),
1683 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1684 "Intel D945P", STAC_D945GTP3),
1685 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1686 "Intel D945P", STAC_D945GTP3),
1687 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1688 "Intel D945P", STAC_D945GTP3),
1689 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1690 "Intel D945P", STAC_D945GTP3),
1691 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1692 "Intel D945P", STAC_D945GTP5),
1693 /* other systems */
536319af 1694 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1695 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1696 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1697 /* Dell systems */
1698 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1699 "unknown Dell", STAC_922X_DELL_D81),
1700 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1701 "unknown Dell", STAC_922X_DELL_D81),
1702 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1703 "unknown Dell", STAC_922X_DELL_D81),
1704 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1705 "unknown Dell", STAC_922X_DELL_D82),
1706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1707 "unknown Dell", STAC_922X_DELL_M81),
1708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1709 "unknown Dell", STAC_922X_DELL_D82),
1710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1711 "unknown Dell", STAC_922X_DELL_D81),
1712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1713 "unknown Dell", STAC_922X_DELL_D81),
1714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1715 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1716 {} /* terminator */
1717};
1718
3cc08dc6 1719static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1720 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1721 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1722 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1723 0x01c42190, 0x40000100,
3cc08dc6
MP		 1724};
1725
93ed1503 1726static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1727 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1728 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1729 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1730 0x40000100, 0x40000100
1731};
1732
93ed1503
TD		 1733static unsigned int d965_5st_pin_configs[14] = {
1734 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1735 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1736 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1737 0x40000100, 0x40000100
1738};
1739
4ff076e5
TD		 1740static unsigned int dell_3st_pin_configs[14] = {
1741 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1742 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1743 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1744 0x40c003fc, 0x40000100
1745};
1746
93ed1503 1747static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1748 [STAC_D965_REF] = ref927x_pin_configs,
1749 [STAC_D965_3ST] = d965_3st_pin_configs,
1750 [STAC_D965_5ST] = d965_5st_pin_configs,
1751 [STAC_DELL_3ST] = dell_3st_pin_configs,
1752 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1753};
1754
f5fcc13c 1755static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1756 [STAC_D965_REF] = "ref",
1757 [STAC_D965_3ST] = "3stack",
1758 [STAC_D965_5ST] = "5stack",
1759 [STAC_DELL_3ST] = "dell-3stack",
1760 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1761};
1762
1763static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1764 /* SigmaTel reference board */
1765 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1766 "DFI LanParty", STAC_D965_REF),
81d3dbde 1767 /* Intel 946 based systems */
f5fcc13c
TI		 1768 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1769 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1770 /* 965 based 3 stack systems */
f5fcc13c
TI		 1771 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1772 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1773 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1774 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1775 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1776 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1777 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1778 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1779 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1780 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1781 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1782 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1783 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1784 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1785 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1786 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1787 /* Dell 3 stack systems */
8e9068b1 1788 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1789 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1790 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1791 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1792 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1793 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1794 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 1795 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 1796 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 1797 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1798 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1799 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1800 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1801 /* 965 based 5 stack systems */
f5fcc13c
TI		 1802 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1803 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1804 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1805 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1806 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1807 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1808 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1809 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1810 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1811 {} /* terminator */
1812};
1813
f3302a59
MP		 1814static unsigned int ref9205_pin_configs[12] = {
1815 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1816 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1817 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1818};
1819
dfe495d0
TI		 1820/*
1821 STAC 9205 pin configs for
1822 102801F1
1823 102801F2
1824 102801FC
1825 102801FD
1826 10280204
1827 1028021F
3fa2ef74 1828 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1829*/
1830static unsigned int dell_9205_m42_pin_configs[12] = {
1831 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1832 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1833 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1834};
1835
1836/*
1837 STAC 9205 pin configs for
1838 102801F9
1839 102801FA
1840 102801FE
1841 102801FF (Dell Precision M4300)
1842 10280206
1843 10280200
1844 10280201
1845*/
1846static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1847 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1848 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1849 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1850};
1851
dfe495d0 1852static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1853 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1854 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1855 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1856};
1857
f5fcc13c 1858static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1859 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1860 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1861 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1862 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1863};
1864
f5fcc13c
TI		 1865static const char *stac9205_models[STAC_9205_MODELS] = {
1866 [STAC_9205_REF] = "ref",
dfe495d0 1867 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1868 [STAC_9205_DELL_M43] = "dell-m43",
1869 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1870};
1871
1872static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1873 /* SigmaTel reference board */
1874 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1875 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1876 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1877 "unknown Dell", STAC_9205_DELL_M42),
1878 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1879 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1880 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 1881 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1882 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1883 "Dell Precision", STAC_9205_DELL_M43),
1884 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1885 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1886 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1887 "unknown Dell", STAC_9205_DELL_M42),
1888 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1889 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1890 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1891 "Dell Precision", STAC_9205_DELL_M43),
1892 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1893 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 1894 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1895 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 1896 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1897 "Dell Precision", STAC_9205_DELL_M43),
1898 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1899 "Dell Precision", STAC_9205_DELL_M43),
1900 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1901 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1902 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1903 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1904 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1905 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1906 {} /* terminator */
1907};
1908
11b44bbd
RF		 1909static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1910{
1911 int i;
1912 struct sigmatel_spec *spec = codec->spec;
1913
1914 if (! spec->bios_pin_configs) {
1915 spec->bios_pin_configs = kcalloc(spec->num_pins,
1916 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1917 if (! spec->bios_pin_configs)
1918 return -ENOMEM;
1919 }
1920
1921 for (i = 0; i < spec->num_pins; i++) {
1922 hda_nid_t nid = spec->pin_nids[i];
1923 unsigned int pin_cfg;
1924
1925 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1926 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1927 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1928 nid, pin_cfg);
1929 spec->bios_pin_configs[i] = pin_cfg;
1930 }
1931
1932 return 0;
1933}
1934
87d48363
MR		 1935static void stac92xx_set_config_reg(struct hda_codec *codec,
1936 hda_nid_t pin_nid, unsigned int pin_config)
1937{
1938 int i;
1939 snd_hda_codec_write(codec, pin_nid, 0,
1940 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1941 pin_config & 0x000000ff);
1942 snd_hda_codec_write(codec, pin_nid, 0,
1943 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1944 (pin_config & 0x0000ff00) >> 8);
1945 snd_hda_codec_write(codec, pin_nid, 0,
1946 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1947 (pin_config & 0x00ff0000) >> 16);
1948 snd_hda_codec_write(codec, pin_nid, 0,
1949 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1950 pin_config >> 24);
1951 i = snd_hda_codec_read(codec, pin_nid, 0,
1952 AC_VERB_GET_CONFIG_DEFAULT,
1953 0x00);
1954 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1955 pin_nid, i);
1956}
1957
2f2f4251
M		 1958static void stac92xx_set_config_regs(struct hda_codec *codec)
1959{
1960 int i;
1961 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1962
87d48363
MR		 1963 if (!spec->pin_configs)
1964 return;
11b44bbd 1965
87d48363
MR		 1966 for (i = 0; i < spec->num_pins; i++)
1967 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1968 spec->pin_configs[i]);
2f2f4251 1969}
2f2f4251 1970
dabbed6f 1971/*
c7d4b2fa 1972 * Analog playback callbacks
dabbed6f 1973 */
c7d4b2fa
M		 1974static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1975 struct hda_codec *codec,
c8b6bf9b 1976 struct snd_pcm_substream *substream)
2f2f4251 1977{
dabbed6f 1978 struct sigmatel_spec *spec = codec->spec;
9a08160b
TI		 1979 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
1980 hinfo);
2f2f4251
M		 1981}
1982
2f2f4251
M		 1983static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1984 struct hda_codec *codec,
1985 unsigned int stream_tag,
1986 unsigned int format,
c8b6bf9b 1987 struct snd_pcm_substream *substream)
2f2f4251
M		 1988{
1989 struct sigmatel_spec *spec = codec->spec;
403d1944 1990 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1991}
1992
1993static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1994 struct hda_codec *codec,
c8b6bf9b 1995 struct snd_pcm_substream *substream)
2f2f4251
M		 1996{
1997 struct sigmatel_spec *spec = codec->spec;
1998 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1999}
2000
dabbed6f
M		 2001/*
2002 * Digital playback callbacks
2003 */
2004static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2005 struct hda_codec *codec,
c8b6bf9b 2006 struct snd_pcm_substream *substream)
dabbed6f
M		 2007{
2008 struct sigmatel_spec *spec = codec->spec;
2009 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2010}
2011
2012static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2013 struct hda_codec *codec,
c8b6bf9b 2014 struct snd_pcm_substream *substream)
dabbed6f
M		 2015{
2016 struct sigmatel_spec *spec = codec->spec;
2017 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2018}
2019
6b97eb45
TI		 2020static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2021 struct hda_codec *codec,
2022 unsigned int stream_tag,
2023 unsigned int format,
2024 struct snd_pcm_substream *substream)
2025{
2026 struct sigmatel_spec *spec = codec->spec;
2027 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2028 stream_tag, format, substream);
2029}
2030
dabbed6f 2031
2f2f4251
M		 2032/*
2033 * Analog capture callbacks
2034 */
2035static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2036 struct hda_codec *codec,
2037 unsigned int stream_tag,
2038 unsigned int format,
c8b6bf9b 2039 struct snd_pcm_substream *substream)
2f2f4251
M		 2040{
2041 struct sigmatel_spec *spec = codec->spec;
2042
2043 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
2044 stream_tag, 0, format);
2045 return 0;
2046}
2047
2048static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2049 struct hda_codec *codec,
c8b6bf9b 2050 struct snd_pcm_substream *substream)
2f2f4251
M		 2051{
2052 struct sigmatel_spec *spec = codec->spec;
2053
888afa15 2054 snd_hda_codec_cleanup_stream(codec, spec->adc_nids[substream->number]);
2f2f4251
M		 2055 return 0;
2056}
2057
dabbed6f
M		 2058static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2059 .substreams = 1,
2060 .channels_min = 2,
2061 .channels_max = 2,
2062 /* NID is set in stac92xx_build_pcms */
2063 .ops = {
2064 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2065 .close = stac92xx_dig_playback_pcm_close,
2066 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2067 },
2068};
2069
2070static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2071 .substreams = 1,
2072 .channels_min = 2,
2073 .channels_max = 2,
2074 /* NID is set in stac92xx_build_pcms */
2075};
2076
2f2f4251
M		 2077static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2078 .substreams = 1,
2079 .channels_min = 2,
c7d4b2fa 2080 .channels_max = 8,
2f2f4251
M		 2081 .nid = 0x02, /* NID to query formats and rates */
2082 .ops = {
2083 .open = stac92xx_playback_pcm_open,
2084 .prepare = stac92xx_playback_pcm_prepare,
2085 .cleanup = stac92xx_playback_pcm_cleanup
2086 },
2087};
2088
3cc08dc6
MP		 2089static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2090 .substreams = 1,
2091 .channels_min = 2,
2092 .channels_max = 2,
2093 .nid = 0x06, /* NID to query formats and rates */
2094 .ops = {
2095 .open = stac92xx_playback_pcm_open,
2096 .prepare = stac92xx_playback_pcm_prepare,
2097 .cleanup = stac92xx_playback_pcm_cleanup
2098 },
2099};
2100
2f2f4251 2101static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2102 .channels_min = 2,
2103 .channels_max = 2,
9e05b7a3 2104 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2105 .ops = {
2106 .prepare = stac92xx_capture_pcm_prepare,
2107 .cleanup = stac92xx_capture_pcm_cleanup
2108 },
2109};
2110
2111static int stac92xx_build_pcms(struct hda_codec *codec)
2112{
2113 struct sigmatel_spec *spec = codec->spec;
2114 struct hda_pcm *info = spec->pcm_rec;
2115
2116 codec->num_pcms = 1;
2117 codec->pcm_info = info;
2118
c7d4b2fa 2119 info->name = "STAC92xx Analog";
2f2f4251 2120 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2121 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2122 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2123 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2124
2125 if (spec->alt_switch) {
2126 codec->num_pcms++;
2127 info++;
2128 info->name = "STAC92xx Analog Alt";
2129 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2130 }
2f2f4251 2131
dabbed6f
M		 2132 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2133 codec->num_pcms++;
2134 info++;
2135 info->name = "STAC92xx Digital";
7ba72ba1 2136 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2137 if (spec->multiout.dig_out_nid) {
2138 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2139 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2140 }
2141 if (spec->dig_in_nid) {
2142 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2143 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2144 }
2145 }
2146
2f2f4251
M		 2147 return 0;
2148}
2149
c960a03b
TI		 2150static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2151{
2152 unsigned int pincap = snd_hda_param_read(codec, nid,
2153 AC_PAR_PIN_CAP);
2154 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2155 if (pincap & AC_PINCAP_VREF_100)
2156 return AC_PINCTL_VREF_100;
2157 if (pincap & AC_PINCAP_VREF_80)
2158 return AC_PINCTL_VREF_80;
2159 if (pincap & AC_PINCAP_VREF_50)
2160 return AC_PINCTL_VREF_50;
2161 if (pincap & AC_PINCAP_VREF_GRD)
2162 return AC_PINCTL_VREF_GRD;
2163 return 0;
2164}
2165
403d1944
MP		 2166static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2167
2168{
82beb8fd
TI		 2169 snd_hda_codec_write_cache(codec, nid, 0,
2170 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2171}
2172
7c2ba97b
MR		 2173#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2174
2175static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2176 struct snd_ctl_elem_value *ucontrol)
2177{
2178 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2179 struct sigmatel_spec *spec = codec->spec;
2180
2181 ucontrol->value.integer.value[0] = spec->hp_switch;
2182 return 0;
2183}
2184
2185static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2186 struct snd_ctl_elem_value *ucontrol)
2187{
2188 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2189 struct sigmatel_spec *spec = codec->spec;
2190
2191 spec->hp_switch = ucontrol->value.integer.value[0];
2192
2193 /* check to be sure that the ports are upto date with
2194 * switch changes
2195 */
2196 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2197
2198 return 1;
2199}
2200
a5ce8890 2201#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2202
2203static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2204{
2205 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2206 struct sigmatel_spec *spec = codec->spec;
2207 int io_idx = kcontrol-> private_value & 0xff;
2208
2209 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2210 return 0;
2211}
2212
2213static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2214{
2215 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2216 struct sigmatel_spec *spec = codec->spec;
2217 hda_nid_t nid = kcontrol->private_value >> 8;
2218 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2219 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2220
2221 spec->io_switch[io_idx] = val;
2222
2223 if (val)
2224 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2225 else {
2226 unsigned int pinctl = AC_PINCTL_IN_EN;
2227 if (io_idx) /* set VREF for mic */
2228 pinctl |= stac92xx_get_vref(codec, nid);
2229 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2230 }
40c1d308
JZ		 2231
2232 /* check the auto-mute again: we need to mute/unmute the speaker
2233 * appropriately according to the pin direction
2234 */
2235 if (spec->hp_detect)
2236 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2237
403d1944
MP		 2238 return 1;
2239}
2240
0fb87bb4
ML		 2241#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2242
2243static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2244 struct snd_ctl_elem_value *ucontrol)
2245{
2246 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2247 struct sigmatel_spec *spec = codec->spec;
2248
2249 ucontrol->value.integer.value[0] = spec->clfe_swap;
2250 return 0;
2251}
2252
2253static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2254 struct snd_ctl_elem_value *ucontrol)
2255{
2256 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2257 struct sigmatel_spec *spec = codec->spec;
2258 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2259 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2260
68ea7b2f 2261 if (spec->clfe_swap == val)
0fb87bb4
ML		 2262 return 0;
2263
68ea7b2f 2264 spec->clfe_swap = val;
0fb87bb4
ML		 2265
2266 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2267 spec->clfe_swap ? 0x4 : 0x0);
2268
2269 return 1;
2270}
2271
7c2ba97b
MR		 2272#define STAC_CODEC_HP_SWITCH(xname) \
2273 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2274 .name = xname, \
2275 .index = 0, \
2276 .info = stac92xx_hp_switch_info, \
2277 .get = stac92xx_hp_switch_get, \
2278 .put = stac92xx_hp_switch_put, \
2279 }
2280
403d1944
MP		 2281#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2282 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2283 .name = xname, \
2284 .index = 0, \
2285 .info = stac92xx_io_switch_info, \
2286 .get = stac92xx_io_switch_get, \
2287 .put = stac92xx_io_switch_put, \
2288 .private_value = xpval, \
2289 }
2290
0fb87bb4
ML		 2291#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2292 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2293 .name = xname, \
2294 .index = 0, \
2295 .info = stac92xx_clfe_switch_info, \
2296 .get = stac92xx_clfe_switch_get, \
2297 .put = stac92xx_clfe_switch_put, \
2298 .private_value = xpval, \
2299 }
403d1944 2300
c7d4b2fa
M		 2301enum {
2302 STAC_CTL_WIDGET_VOL,
2303 STAC_CTL_WIDGET_MUTE,
09a99959 2304 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2305 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2306 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2307 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2308};
2309
c8b6bf9b 2310static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2311 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2312 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2313 STAC_MONO_MUX,
7c2ba97b 2314 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2315 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2316 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2317};
2318
2319/* add dynamic controls */
2320static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2321{
c8b6bf9b 2322 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2323
2324 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2325 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2326
2327 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2328 if (! knew)
2329 return -ENOMEM;
2330 if (spec->kctl_alloc) {
2331 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2332 kfree(spec->kctl_alloc);
2333 }
2334 spec->kctl_alloc = knew;
2335 spec->num_kctl_alloc = num;
2336 }
2337
2338 knew = &spec->kctl_alloc[spec->num_kctl_used];
2339 *knew = stac92xx_control_templates[type];
82fe0c58 2340 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2341 if (! knew->name)
2342 return -ENOMEM;
2343 knew->private_value = val;
2344 spec->num_kctl_used++;
2345 return 0;
2346}
2347
403d1944
MP		 2348/* flag inputs as additional dynamic lineouts */
2349static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2350{
2351 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2352 unsigned int wcaps, wtype;
2353 int i, num_dacs = 0;
2354
2355 /* use the wcaps cache to count all DACs available for line-outs */
2356 for (i = 0; i < codec->num_nodes; i++) {
2357 wcaps = codec->wcaps[i];
2358 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2359
7b043899
SL		 2360 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2361 num_dacs++;
2362 }
403d1944 2363
7b043899
SL		 2364 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2365
403d1944
MP		 2366 switch (cfg->line_outs) {
2367 case 3:
2368 /* add line-in as side */
7b043899 2369 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2370 cfg->line_out_pins[cfg->line_outs] =
2371 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2372 spec->line_switch = 1;
2373 cfg->line_outs++;
2374 }
2375 break;
2376 case 2:
2377 /* add line-in as clfe and mic as side */
7b043899 2378 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2379 cfg->line_out_pins[cfg->line_outs] =
2380 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2381 spec->line_switch = 1;
2382 cfg->line_outs++;
2383 }
7b043899 2384 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2385 cfg->line_out_pins[cfg->line_outs] =
2386 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2387 spec->mic_switch = 1;
2388 cfg->line_outs++;
2389 }
2390 break;
2391 case 1:
2392 /* add line-in as surr and mic as clfe */
7b043899 2393 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2394 cfg->line_out_pins[cfg->line_outs] =
2395 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2396 spec->line_switch = 1;
2397 cfg->line_outs++;
2398 }
7b043899 2399 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2400 cfg->line_out_pins[cfg->line_outs] =
2401 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2402 spec->mic_switch = 1;
2403 cfg->line_outs++;
2404 }
2405 break;
2406 }
2407
2408 return 0;
2409}
2410
7b043899
SL		 2411
2412static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2413{
2414 int i;
2415
2416 for (i = 0; i < spec->multiout.num_dacs; i++) {
2417 if (spec->multiout.dac_nids[i] == nid)
2418 return 1;
2419 }
2420
2421 return 0;
2422}
2423
3cc08dc6 2424/*
7b043899
SL		 2425 * Fill in the dac_nids table from the parsed pin configuration
2426 * This function only works when every pin in line_out_pins[]
2427 * contains atleast one DAC in its connection list. Some 92xx
2428 * codecs are not connected directly to a DAC, such as the 9200
2429 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2430 */
19039bd0 2431static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2432 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2433{
2434 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2435 int i, j, conn_len = 0;
2436 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2437 unsigned int wcaps, wtype;
2438
c7d4b2fa
M		 2439 for (i = 0; i < cfg->line_outs; i++) {
2440 nid = cfg->line_out_pins[i];
7b043899
SL		 2441 conn_len = snd_hda_get_connections(codec, nid, conn,
2442 HDA_MAX_CONNECTIONS);
2443 for (j = 0; j < conn_len; j++) {
2444 wcaps = snd_hda_param_read(codec, conn[j],
2445 AC_PAR_AUDIO_WIDGET_CAP);
2446 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2447 if (wtype != AC_WID_AUD_OUT ||
2448 (wcaps & AC_WCAP_DIGITAL))
2449 continue;
2450 /* conn[j] is a DAC routed to this line-out */
2451 if (!is_in_dac_nids(spec, conn[j]))
2452 break;
2453 }
2454
2455 if (j == conn_len) {
df802952
TI		 2456 if (spec->multiout.num_dacs > 0) {
2457 /* we have already working output pins,
2458 * so let's drop the broken ones again
2459 */
2460 cfg->line_outs = spec->multiout.num_dacs;
2461 break;
2462 }
7b043899
SL		 2463 /* error out, no available DAC found */
2464 snd_printk(KERN_ERR
2465 "%s: No available DAC for pin 0x%x\n",
2466 __func__, nid);
2467 return -ENODEV;
2468 }
2469
2470 spec->multiout.dac_nids[i] = conn[j];
2471 spec->multiout.num_dacs++;
2472 if (conn_len > 1) {
2473 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2474 snd_hda_codec_write_cache(codec, nid, 0,
2475 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2476
7b043899
SL		 2477 }
2478 }
c7d4b2fa 2479
7b043899
SL		 2480 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2481 spec->multiout.num_dacs,
2482 spec->multiout.dac_nids[0],
2483 spec->multiout.dac_nids[1],
2484 spec->multiout.dac_nids[2],
2485 spec->multiout.dac_nids[3],
2486 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2487 return 0;
2488}
2489
eb06ed8f
TI		 2490/* create volume control/switch for the given prefx type */
2491static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2492{
2493 char name[32];
2494 int err;
2495
2496 sprintf(name, "%s Playback Volume", pfx);
2497 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2498 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2499 if (err < 0)
2500 return err;
2501 sprintf(name, "%s Playback Switch", pfx);
2502 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2503 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2504 if (err < 0)
2505 return err;
2506 return 0;
2507}
2508
ae0afd81
MR		 2509static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2510{
2511 if (!spec->multiout.hp_nid)
2512 spec->multiout.hp_nid = nid;
2513 else if (spec->multiout.num_dacs > 4) {
2514 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2515 return 1;
2516 } else {
2517 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2518 spec->multiout.num_dacs++;
2519 }
2520 return 0;
2521}
2522
2523static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2524{
2525 if (is_in_dac_nids(spec, nid))
2526 return 1;
2527 if (spec->multiout.hp_nid == nid)
2528 return 1;
2529 return 0;
2530}
2531
c7d4b2fa 2532/* add playback controls from the parsed DAC table */
0fb87bb4 2533static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2534 const struct auto_pin_cfg *cfg)
c7d4b2fa 2535{
19039bd0
TI		 2536 static const char *chname[4] = {
2537 "Front", "Surround", NULL /*CLFE*/, "Side"
2538 };
c7d4b2fa
M		 2539 hda_nid_t nid;
2540 int i, err;
2541
0fb87bb4 2542 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2543 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2544
2545
40ac8c4f 2546 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2547 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2548 continue;
2549
2550 nid = spec->multiout.dac_nids[i];
2551
2552 if (i == 2) {
2553 /* Center/LFE */
eb06ed8f
TI		 2554 err = create_controls(spec, "Center", nid, 1);
2555 if (err < 0)
c7d4b2fa 2556 return err;
eb06ed8f
TI		 2557 err = create_controls(spec, "LFE", nid, 2);
2558 if (err < 0)
c7d4b2fa 2559 return err;
0fb87bb4
ML		 2560
2561 wid_caps = get_wcaps(codec, nid);
2562
2563 if (wid_caps & AC_WCAP_LR_SWAP) {
2564 err = stac92xx_add_control(spec,
2565 STAC_CTL_WIDGET_CLFE_SWITCH,
2566 "Swap Center/LFE Playback Switch", nid);
2567
2568 if (err < 0)
2569 return err;
2570 }
2571
c7d4b2fa 2572 } else {
eb06ed8f
TI		 2573 err = create_controls(spec, chname[i], nid, 3);
2574 if (err < 0)
c7d4b2fa
M		 2575 return err;
2576 }
2577 }
2578
7c2ba97b
MR		 2579 if (cfg->hp_outs > 1) {
2580 err = stac92xx_add_control(spec,
2581 STAC_CTL_WIDGET_HP_SWITCH,
2582 "Headphone as Line Out Switch", 0);
2583 if (err < 0)
2584 return err;
2585 }
2586
b5895dc8
MR		 2587 if (spec->line_switch) {
2588 nid = cfg->input_pins[AUTO_PIN_LINE];
2589 pincap = snd_hda_param_read(codec, nid,
2590 AC_PAR_PIN_CAP);
2591 if (pincap & AC_PINCAP_OUT) {
2592 err = stac92xx_add_control(spec,
2593 STAC_CTL_WIDGET_IO_SWITCH,
2594 "Line In as Output Switch", nid << 8);
2595 if (err < 0)
2596 return err;
2597 }
2598 }
403d1944 2599
b5895dc8 2600 if (spec->mic_switch) {
cace16f1 2601 unsigned int def_conf;
ae0afd81
MR		 2602 unsigned int mic_pin = AUTO_PIN_MIC;
2603again:
2604 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2605 def_conf = snd_hda_codec_read(codec, nid, 0,
2606 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2607 /* some laptops have an internal analog microphone
2608 * which can't be used as a output */
2609 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2610 pincap = snd_hda_param_read(codec, nid,
2611 AC_PAR_PIN_CAP);
2612 if (pincap & AC_PINCAP_OUT) {
2613 err = stac92xx_add_control(spec,
2614 STAC_CTL_WIDGET_IO_SWITCH,
2615 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2616 nid = snd_hda_codec_read(codec, nid, 0,
2617 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2618 if (!check_in_dac_nids(spec, nid))
2619 add_spec_dacs(spec, nid);
cace16f1
MR		 2620 if (err < 0)
2621 return err;
2622 }
ae0afd81
MR		 2623 } else if (mic_pin == AUTO_PIN_MIC) {
2624 mic_pin = AUTO_PIN_FRONT_MIC;
2625 goto again;
b5895dc8
MR		 2626 }
2627 }
403d1944 2628
c7d4b2fa
M		 2629 return 0;
2630}
2631
eb06ed8f
TI		 2632/* add playback controls for Speaker and HP outputs */
2633static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2634 struct auto_pin_cfg *cfg)
2635{
2636 struct sigmatel_spec *spec = codec->spec;
2637 hda_nid_t nid;
2638 int i, old_num_dacs, err;
2639
2640 old_num_dacs = spec->multiout.num_dacs;
2641 for (i = 0; i < cfg->hp_outs; i++) {
2642 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2643 if (wid_caps & AC_WCAP_UNSOL_CAP)
2644 spec->hp_detect = 1;
2645 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2646 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2647 if (check_in_dac_nids(spec, nid))
2648 nid = 0;
2649 if (! nid)
c7d4b2fa 2650 continue;
eb06ed8f
TI		 2651 add_spec_dacs(spec, nid);
2652 }
2653 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2654 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2655 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2656 if (check_in_dac_nids(spec, nid))
2657 nid = 0;
eb06ed8f
TI		 2658 if (! nid)
2659 continue;
2660 add_spec_dacs(spec, nid);
c7d4b2fa 2661 }
1b290a51
MR		 2662 for (i = 0; i < cfg->line_outs; i++) {
2663 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2664 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2665 if (check_in_dac_nids(spec, nid))
2666 nid = 0;
2667 if (! nid)
2668 continue;
2669 add_spec_dacs(spec, nid);
2670 }
eb06ed8f
TI		 2671 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2672 static const char *pfxs[] = {
2673 "Speaker", "External Speaker", "Speaker2",
2674 };
2675 err = create_controls(spec, pfxs[i - old_num_dacs],
2676 spec->multiout.dac_nids[i], 3);
2677 if (err < 0)
2678 return err;
2679 }
2680 if (spec->multiout.hp_nid) {
2626a263
TI		 2681 err = create_controls(spec, "Headphone",
2682 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2683 if (err < 0)
2684 return err;
2685 }
c7d4b2fa
M		 2686
2687 return 0;
2688}
2689
b22b4821 2690/* labels for mono mux outputs */
d0513fc6
MR		 2691static const char *stac92xx_mono_labels[4] = {
2692 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 2693};
2694
2695/* create mono mux for mono out on capable codecs */
2696static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2697{
2698 struct sigmatel_spec *spec = codec->spec;
2699 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2700 int i, num_cons;
2701 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2702
2703 num_cons = snd_hda_get_connections(codec,
2704 spec->mono_nid,
2705 con_lst,
2706 HDA_MAX_NUM_INPUTS);
2707 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2708 return -EINVAL;
2709
2710 for (i = 0; i < num_cons; i++) {
2711 mono_mux->items[mono_mux->num_items].label =
2712 stac92xx_mono_labels[i];
2713 mono_mux->items[mono_mux->num_items].index = i;
2714 mono_mux->num_items++;
2715 }
09a99959
MR		 2716
2717 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2718 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2719}
2720
1cd2224c
MR		 2721/* create PC beep volume controls */
2722static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
2723 hda_nid_t nid)
2724{
2725 struct sigmatel_spec *spec = codec->spec;
2726 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
2727 int err;
2728
2729 /* check for mute support for the the amp */
2730 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
2731 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2732 "PC Beep Playback Switch",
2733 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
2734 if (err < 0)
2735 return err;
2736 }
2737
2738 /* check to see if there is volume support for the amp */
2739 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2740 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2741 "PC Beep Playback Volume",
2742 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
2743 if (err < 0)
2744 return err;
2745 }
2746 return 0;
2747}
2748
8b65727b 2749/* labels for dmic mux inputs */
ddc2cec4 2750static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2751 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2752 "Digital Mic 3", "Digital Mic 4"
2753};
2754
2755/* create playback/capture controls for input pins on dmic capable codecs */
2756static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2757 const struct auto_pin_cfg *cfg)
2758{
2759 struct sigmatel_spec *spec = codec->spec;
2760 struct hda_input_mux *dimux = &spec->private_dimux;
2761 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2762 int err, i, j;
2763 char name[32];
8b65727b
MP		 2764
2765 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2766 dimux->items[dimux->num_items].index = 0;
2767 dimux->num_items++;
2768
2769 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2770 hda_nid_t nid;
8b65727b
MP		 2771 int index;
2772 int num_cons;
0678accd 2773 unsigned int wcaps;
8b65727b
MP		 2774 unsigned int def_conf;
2775
2776 def_conf = snd_hda_codec_read(codec,
2777 spec->dmic_nids[i],
2778 0,
2779 AC_VERB_GET_CONFIG_DEFAULT,
2780 0);
2781 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2782 continue;
2783
0678accd 2784 nid = spec->dmic_nids[i];
8b65727b 2785 num_cons = snd_hda_get_connections(codec,
e1f0d669 2786 spec->dmux_nids[0],
8b65727b
MP		 2787 con_lst,
2788 HDA_MAX_NUM_INPUTS);
2789 for (j = 0; j < num_cons; j++)
0678accd 2790 if (con_lst[j] == nid) {
8b65727b
MP		 2791 index = j;
2792 goto found;
2793 }
2794 continue;
2795found:
d0513fc6
MR		 2796 wcaps = get_wcaps(codec, nid) &
2797 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 2798
d0513fc6 2799 if (wcaps) {
0678accd
MR		 2800 sprintf(name, "%s Capture Volume",
2801 stac92xx_dmic_labels[dimux->num_items]);
2802
2803 err = stac92xx_add_control(spec,
2804 STAC_CTL_WIDGET_VOL,
2805 name,
d0513fc6
MR		 2806 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
2807 (wcaps & AC_WCAP_OUT_AMP) ?
2808 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 2809 if (err < 0)
2810 return err;
2811 }
2812
8b65727b
MP		 2813 dimux->items[dimux->num_items].label =
2814 stac92xx_dmic_labels[dimux->num_items];
2815 dimux->items[dimux->num_items].index = index;
2816 dimux->num_items++;
2817 }
2818
2819 return 0;
2820}
2821
c7d4b2fa
M		 2822/* create playback/capture controls for input pins */
2823static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2824{
2825 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2826 struct hda_input_mux *imux = &spec->private_imux;
2827 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2828 int i, j, k;
2829
2830 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2831 int index;
2832
2833 if (!cfg->input_pins[i])
2834 continue;
2835 index = -1;
2836 for (j = 0; j < spec->num_muxes; j++) {
2837 int num_cons;
2838 num_cons = snd_hda_get_connections(codec,
2839 spec->mux_nids[j],
2840 con_lst,
2841 HDA_MAX_NUM_INPUTS);
2842 for (k = 0; k < num_cons; k++)
2843 if (con_lst[k] == cfg->input_pins[i]) {
2844 index = k;
2845 goto found;
2846 }
c7d4b2fa 2847 }
314634bc
TI		 2848 continue;
2849 found:
2850 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2851 imux->items[imux->num_items].index = index;
2852 imux->num_items++;
c7d4b2fa
M		 2853 }
2854
7b043899 2855 if (imux->num_items) {
62fe78e9
SR		 2856 /*
2857 * Set the current input for the muxes.
2858 * The STAC9221 has two input muxes with identical source
2859 * NID lists. Hopefully this won't get confused.
2860 */
2861 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2862 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2863 AC_VERB_SET_CONNECT_SEL,
2864 imux->items[0].index);
62fe78e9
SR		 2865 }
2866 }
2867
c7d4b2fa
M		 2868 return 0;
2869}
2870
c7d4b2fa
M		 2871static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2872{
2873 struct sigmatel_spec *spec = codec->spec;
2874 int i;
2875
2876 for (i = 0; i < spec->autocfg.line_outs; i++) {
2877 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2878 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2879 }
2880}
2881
2882static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2883{
2884 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2885 int i;
c7d4b2fa 2886
eb06ed8f
TI		 2887 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2888 hda_nid_t pin;
2889 pin = spec->autocfg.hp_pins[i];
2890 if (pin) /* connect to front */
2891 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2892 }
2893 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2894 hda_nid_t pin;
2895 pin = spec->autocfg.speaker_pins[i];
2896 if (pin) /* connect to front */
2897 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2898 }
c7d4b2fa
M		 2899}
2900
3cc08dc6 2901static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2902{
2903 struct sigmatel_spec *spec = codec->spec;
2904 int err;
bcecd9bd 2905 int hp_speaker_swap = 0;
c7d4b2fa 2906
8b65727b
MP		 2907 if ((err = snd_hda_parse_pin_def_config(codec,
2908 &spec->autocfg,
2909 spec->dmic_nids)) < 0)
c7d4b2fa 2910 return err;
82bc955f 2911 if (! spec->autocfg.line_outs)
869264c4 2912 return 0; /* can't find valid pin config */
19039bd0 2913
bcecd9bd
JZ		 2914 /* If we have no real line-out pin and multiple hp-outs, HPs should
2915 * be set up as multi-channel outputs.
2916 */
2917 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2918 spec->autocfg.hp_outs > 1) {
2919 /* Copy hp_outs to line_outs, backup line_outs in
2920 * speaker_outs so that the following routines can handle
2921 * HP pins as primary outputs.
2922 */
2923 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2924 sizeof(spec->autocfg.line_out_pins));
2925 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2926 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2927 sizeof(spec->autocfg.hp_pins));
2928 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2929 hp_speaker_swap = 1;
2930 }
09a99959 2931 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 2932 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
2933 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 2934 u32 caps = query_amp_caps(codec,
2935 spec->autocfg.mono_out_pin, dir);
2936 hda_nid_t conn_list[1];
2937
2938 /* get the mixer node and then the mono mux if it exists */
2939 if (snd_hda_get_connections(codec,
2940 spec->autocfg.mono_out_pin, conn_list, 1) &&
2941 snd_hda_get_connections(codec, conn_list[0],
2942 conn_list, 1)) {
2943
2944 int wcaps = get_wcaps(codec, conn_list[0]);
2945 int wid_type = (wcaps & AC_WCAP_TYPE)
2946 >> AC_WCAP_TYPE_SHIFT;
2947 /* LR swap check, some stac925x have a mux that
2948 * changes the DACs output path instead of the
2949 * mono-mux path.
2950 */
2951 if (wid_type == AC_WID_AUD_SEL &&
2952 !(wcaps & AC_WCAP_LR_SWAP))
2953 spec->mono_nid = conn_list[0];
2954 }
d0513fc6
MR		 2955 if (dir) {
2956 hda_nid_t nid = spec->autocfg.mono_out_pin;
2957
2958 /* most mono outs have a least a mute/unmute switch */
2959 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
2960 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2961 "Mono Playback Switch",
2962 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 2963 if (err < 0)
2964 return err;
d0513fc6
MR		 2965 /* check for volume support for the amp */
2966 if ((caps & AC_AMPCAP_NUM_STEPS)
2967 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2968 err = stac92xx_add_control(spec,
2969 STAC_CTL_WIDGET_VOL,
2970 "Mono Playback Volume",
2971 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
2972 if (err < 0)
2973 return err;
2974 }
09a99959
MR		 2975 }
2976
2977 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
2978 AC_PINCTL_OUT_EN);
2979 }
bcecd9bd 2980
403d1944
MP		 2981 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2982 return err;
19039bd0
TI		 2983 if (spec->multiout.num_dacs == 0)
2984 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2985 return err;
c7d4b2fa 2986
0fb87bb4
ML		 2987 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2988
2989 if (err < 0)
2990 return err;
2991
1cd2224c
MR		 2992 /* setup analog beep controls */
2993 if (spec->anabeep_nid > 0) {
2994 err = stac92xx_auto_create_beep_ctls(codec,
2995 spec->anabeep_nid);
2996 if (err < 0)
2997 return err;
2998 }
2999
3000 /* setup digital beep controls and input device */
3001#ifdef CONFIG_SND_HDA_INPUT_BEEP
3002 if (spec->digbeep_nid > 0) {
3003 hda_nid_t nid = spec->digbeep_nid;
3004
3005 err = stac92xx_auto_create_beep_ctls(codec, nid);
3006 if (err < 0)
3007 return err;
3008 err = snd_hda_attach_beep_device(codec, nid);
3009 if (err < 0)
3010 return err;
3011 }
3012#endif
3013
bcecd9bd
JZ		 3014 if (hp_speaker_swap == 1) {
3015 /* Restore the hp_outs and line_outs */
3016 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3017 sizeof(spec->autocfg.line_out_pins));
3018 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3019 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3020 sizeof(spec->autocfg.speaker_pins));
3021 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3022 memset(spec->autocfg.speaker_pins, 0,
3023 sizeof(spec->autocfg.speaker_pins));
3024 spec->autocfg.speaker_outs = 0;
3025 }
3026
0fb87bb4
ML		 3027 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3028
3029 if (err < 0)
3030 return err;
3031
3032 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3033
3034 if (err < 0)
c7d4b2fa
M		 3035 return err;
3036
b22b4821
MR		 3037 if (spec->mono_nid > 0) {
3038 err = stac92xx_auto_create_mono_output_ctls(codec);
3039 if (err < 0)
3040 return err;
3041 }
3042
8b65727b
MP		 3043 if (spec->num_dmics > 0)
3044 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3045 &spec->autocfg)) < 0)
3046 return err;
3047
c7d4b2fa 3048 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3049 if (spec->multiout.max_channels > 2)
c7d4b2fa 3050 spec->surr_switch = 1;
c7d4b2fa 3051
82bc955f 3052 if (spec->autocfg.dig_out_pin)
3cc08dc6 3053 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3054 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3055 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 3056
3057 if (spec->kctl_alloc)
3058 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3059
3060 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 3061 if (!spec->dinput_mux)
3062 spec->dinput_mux = &spec->private_dimux;
b22b4821 3063 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 3064
3065 return 1;
3066}
3067
82bc955f
TI		 3068/* add playback controls for HP output */
3069static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3070 struct auto_pin_cfg *cfg)
3071{
3072 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3073 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3074 unsigned int wid_caps;
3075
3076 if (! pin)
3077 return 0;
3078
3079 wid_caps = get_wcaps(codec, pin);
505cb341 3080 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3081 spec->hp_detect = 1;
82bc955f
TI		 3082
3083 return 0;
3084}
3085
160ea0dc
RF		 3086/* add playback controls for LFE output */
3087static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3088 struct auto_pin_cfg *cfg)
3089{
3090 struct sigmatel_spec *spec = codec->spec;
3091 int err;
3092 hda_nid_t lfe_pin = 0x0;
3093 int i;
3094
3095 /*
3096 * search speaker outs and line outs for a mono speaker pin
3097 * with an amp. If one is found, add LFE controls
3098 * for it.
3099 */
3100 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3101 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3102 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3103 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3104 if (wcaps == AC_WCAP_OUT_AMP)
3105 /* found a mono speaker with an amp, must be lfe */
3106 lfe_pin = pin;
3107 }
3108
3109 /* if speaker_outs is 0, then speakers may be in line_outs */
3110 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3111 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3112 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3113 unsigned int defcfg;
8b551785 3114 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3115 AC_VERB_GET_CONFIG_DEFAULT,
3116 0x00);
8b551785 3117 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3118 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3119 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3120 if (wcaps == AC_WCAP_OUT_AMP)
3121 /* found a mono speaker with an amp,
3122 must be lfe */
3123 lfe_pin = pin;
3124 }
3125 }
3126 }
3127
3128 if (lfe_pin) {
eb06ed8f 3129 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3130 if (err < 0)
3131 return err;
3132 }
3133
3134 return 0;
3135}
3136
c7d4b2fa
M		 3137static int stac9200_parse_auto_config(struct hda_codec *codec)
3138{
3139 struct sigmatel_spec *spec = codec->spec;
3140 int err;
3141
df694daa 3142 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3143 return err;
3144
3145 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3146 return err;
3147
82bc955f
TI		 3148 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3149 return err;
3150
160ea0dc
RF		 3151 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3152 return err;
3153
82bc955f 3154 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3155 spec->multiout.dig_out_nid = 0x05;
82bc955f 3156 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3157 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 3158
3159 if (spec->kctl_alloc)
3160 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3161
3162 spec->input_mux = &spec->private_imux;
8b65727b 3163 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3164
3165 return 1;
3166}
3167
62fe78e9
SR		 3168/*
3169 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3170 * funky external mute control using GPIO pins.
3171 */
3172
76e1ddfb 3173static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3174 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3175{
3176 unsigned int gpiostate, gpiomask, gpiodir;
3177
3178 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3179 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3180 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3181
3182 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3183 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3184 gpiomask |= mask;
62fe78e9
SR		 3185
3186 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3187 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3188 gpiodir |= dir_mask;
62fe78e9 3189
76e1ddfb 3190 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3191 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3192
3193 snd_hda_codec_write(codec, codec->afg, 0,
3194 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3195 snd_hda_codec_read(codec, codec->afg, 0,
3196 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3197
3198 msleep(1);
3199
76e1ddfb
TI		 3200 snd_hda_codec_read(codec, codec->afg, 0,
3201 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3202}
3203
314634bc
TI		 3204static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3205 unsigned int event)
3206{
3207 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3208 snd_hda_codec_write_cache(codec, nid, 0,
3209 AC_VERB_SET_UNSOLICITED_ENABLE,
3210 (AC_USRSP_EN | event));
314634bc
TI		 3211}
3212
a64135a2
MR		 3213static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3214{
3215 int i;
3216 for (i = 0; i < cfg->hp_outs; i++)
3217 if (cfg->hp_pins[i] == nid)
3218 return 1; /* nid is a HP-Out */
3219
3220 return 0; /* nid is not a HP-Out */
3221};
3222
b76c850f
MR		 3223static void stac92xx_power_down(struct hda_codec *codec)
3224{
3225 struct sigmatel_spec *spec = codec->spec;
3226
3227 /* power down inactive DACs */
3228 hda_nid_t *dac;
3229 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3230 if (!is_in_dac_nids(spec, *dac) &&
3231 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3232 snd_hda_codec_write_cache(codec, *dac, 0,
3233 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3234}
3235
c7d4b2fa
M		 3236static int stac92xx_init(struct hda_codec *codec)
3237{
3238 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3239 struct auto_pin_cfg *cfg = &spec->autocfg;
3240 int i;
c7d4b2fa 3241
c7d4b2fa
M		 3242 snd_hda_sequence_write(codec, spec->init);
3243
82bc955f
TI		 3244 /* set up pins */
3245 if (spec->hp_detect) {
505cb341 3246 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3247 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3248 enable_pin_detect(codec, cfg->hp_pins[i],
3249 STAC_HP_EVENT);
0a07acaf
TI		 3250 /* force to enable the first line-out; the others are set up
3251 * in unsol_event
3252 */
3253 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3254 AC_PINCTL_OUT_EN);
eb995a8c 3255 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3256 /* fake event to set up pins */
3257 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3258 } else {
3259 stac92xx_auto_init_multi_out(codec);
3260 stac92xx_auto_init_hp_out(codec);
3261 }
3262 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3263 hda_nid_t nid = cfg->input_pins[i];
3264 if (nid) {
3265 unsigned int pinctl = AC_PINCTL_IN_EN;
3266 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3267 pinctl |= stac92xx_get_vref(codec, nid);
3268 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3269 }
82bc955f 3270 }
a64135a2
MR		 3271 for (i = 0; i < spec->num_dmics; i++)
3272 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3273 AC_PINCTL_IN_EN);
3274 for (i = 0; i < spec->num_pwrs; i++) {
3275 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3276 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3277 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3278 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3279 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3280 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3281 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3282 /* outputs are only ports capable of power management
3283 * any attempts on powering down a input port cause the
3284 * referenced VREF to act quirky.
3285 */
3286 if (pinctl & AC_PINCTL_IN_EN)
3287 continue;
aafc4412
MR		 3288 /* skip any ports that don't have jacks since presence
3289 * detection is useless */
3290 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3291 continue;
a64135a2
MR		 3292 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3293 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3294 }
b76c850f
MR		 3295 if (spec->dac_list)
3296 stac92xx_power_down(codec);
82bc955f
TI		 3297 if (cfg->dig_out_pin)
3298 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3299 AC_PINCTL_OUT_EN);
3300 if (cfg->dig_in_pin)
3301 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3302 AC_PINCTL_IN_EN);
3303
4fe5195c
MR		 3304 stac_gpio_set(codec, spec->gpio_mask,
3305 spec->gpio_dir, spec->gpio_data);
62fe78e9 3306
c7d4b2fa
M		 3307 return 0;
3308}
3309
2f2f4251
M		 3310static void stac92xx_free(struct hda_codec *codec)
3311{
c7d4b2fa
M		 3312 struct sigmatel_spec *spec = codec->spec;
3313 int i;
3314
3315 if (! spec)
3316 return;
3317
3318 if (spec->kctl_alloc) {
3319 for (i = 0; i < spec->num_kctl_used; i++)
3320 kfree(spec->kctl_alloc[i].name);
3321 kfree(spec->kctl_alloc);
3322 }
3323
11b44bbd
RF		 3324 if (spec->bios_pin_configs)
3325 kfree(spec->bios_pin_configs);
3326
c7d4b2fa 3327 kfree(spec);
1cd2224c 3328 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3329}
3330
4e55096e
M		 3331static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3332 unsigned int flag)
3333{
3334 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3335 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3336
f9acba43
TI		 3337 if (pin_ctl & AC_PINCTL_IN_EN) {
3338 /*
3339 * we need to check the current set-up direction of
3340 * shared input pins since they can be switched via
3341 * "xxx as Output" mixer switch
3342 */
3343 struct sigmatel_spec *spec = codec->spec;
3344 struct auto_pin_cfg *cfg = &spec->autocfg;
3345 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3346 spec->line_switch) ||
3347 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3348 spec->mic_switch))
3349 return;
3350 }
3351
7b043899
SL		 3352 /* if setting pin direction bits, clear the current
3353 direction bits first */
3354 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3355 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3356
82beb8fd 3357 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3358 AC_VERB_SET_PIN_WIDGET_CONTROL,
3359 pin_ctl | flag);
3360}
3361
3362static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3363 unsigned int flag)
3364{
3365 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3366 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3367 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3368 AC_VERB_SET_PIN_WIDGET_CONTROL,
3369 pin_ctl & ~flag);
3370}
3371
40c1d308 3372static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3373{
3374 if (!nid)
3375 return 0;
3376 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3377 & (1 << 31)) {
3378 unsigned int pinctl;
3379 pinctl = snd_hda_codec_read(codec, nid, 0,
3380 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3381 if (pinctl & AC_PINCTL_IN_EN)
3382 return 0; /* mic- or line-input */
3383 else
3384 return 1; /* HP-output */
3385 }
314634bc
TI		 3386 return 0;
3387}
3388
3389static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3390{
3391 struct sigmatel_spec *spec = codec->spec;
3392 struct auto_pin_cfg *cfg = &spec->autocfg;
7c2ba97b 3393 int nid = cfg->hp_pins[cfg->hp_outs - 1];
4e55096e
M		 3394 int i, presence;
3395
eb06ed8f 3396 presence = 0;
4fe5195c
MR		 3397 if (spec->gpio_mute)
3398 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3399 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3400
eb06ed8f 3401 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3402 if (presence)
3403 break;
7c2ba97b
MR		 3404 if (spec->hp_switch && cfg->hp_pins[i] == nid)
3405 break;
4fe5195c 3406 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3407 }
4e55096e
M		 3408
3409 if (presence) {
3410 /* disable lineouts, enable hp */
7c2ba97b
MR		 3411 if (spec->hp_switch)
3412 stac92xx_reset_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3413 for (i = 0; i < cfg->line_outs; i++)
3414 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3415 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3416 for (i = 0; i < cfg->speaker_outs; i++)
3417 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3418 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3419 if (spec->eapd_mask)
3420 stac_gpio_set(codec, spec->gpio_mask,
3421 spec->gpio_dir, spec->gpio_data &
3422 ~spec->eapd_mask);
4e55096e
M		 3423 } else {
3424 /* enable lineouts, disable hp */
7c2ba97b
MR		 3425 if (spec->hp_switch)
3426 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3427 for (i = 0; i < cfg->line_outs; i++)
3428 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3429 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3430 for (i = 0; i < cfg->speaker_outs; i++)
3431 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3432 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3433 if (spec->eapd_mask)
3434 stac_gpio_set(codec, spec->gpio_mask,
3435 spec->gpio_dir, spec->gpio_data |
3436 spec->eapd_mask);
4e55096e 3437 }
7c2ba97b
MR		 3438 if (!spec->hp_switch && cfg->hp_outs > 1 && presence)
3439 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3440}
3441
a64135a2
MR		 3442static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3443{
3444 struct sigmatel_spec *spec = codec->spec;
3445 hda_nid_t nid = spec->pwr_nids[idx];
3446 int presence, val;
3447 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3448 & 0x000000ff;
3449 presence = get_hp_pin_presence(codec, nid);
d0513fc6
MR		 3450
3451 /* several codecs have two power down bits */
3452 if (spec->pwr_mapping)
3453 idx = spec->pwr_mapping[idx];
3454 else
3455 idx = 1 << idx;
a64135a2
MR		 3456
3457 if (presence)
3458 val &= ~idx;
3459 else
3460 val |= idx;
3461
3462 /* power down unused output ports */
3463 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3464};
3465
314634bc
TI		 3466static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3467{
a64135a2
MR		 3468 struct sigmatel_spec *spec = codec->spec;
3469 int idx = res >> 26 & 0x0f;
3470
3471 switch ((res >> 26) & 0x30) {
314634bc
TI		 3472 case STAC_HP_EVENT:
3473 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3474 /* fallthru */
3475 case STAC_PWR_EVENT:
3476 if (spec->num_pwrs > 0)
3477 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3478 }
3479}
3480
cb53c626 3481#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3482static int stac92xx_resume(struct hda_codec *codec)
3483{
dc81bed1
TI		 3484 struct sigmatel_spec *spec = codec->spec;
3485
11b44bbd 3486 stac92xx_set_config_regs(codec);
dc81bed1 3487 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3488 stac_gpio_set(codec, spec->gpio_mask,
3489 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3490 snd_hda_codec_resume_amp(codec);
3491 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3492 /* power down inactive DACs */
3493 if (spec->dac_list)
3494 stac92xx_power_down(codec);
dc81bed1
TI		 3495 /* invoke unsolicited event to reset the HP state */
3496 if (spec->hp_detect)
3497 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3498 return 0;
3499}
3500#endif
3501
2f2f4251
M		 3502static struct hda_codec_ops stac92xx_patch_ops = {
3503 .build_controls = stac92xx_build_controls,
3504 .build_pcms = stac92xx_build_pcms,
3505 .init = stac92xx_init,
3506 .free = stac92xx_free,
4e55096e 3507 .unsol_event = stac92xx_unsol_event,
cb53c626 3508#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3509 .resume = stac92xx_resume,
3510#endif
2f2f4251
M		 3511};
3512
3513static int patch_stac9200(struct hda_codec *codec)
3514{
3515 struct sigmatel_spec *spec;
c7d4b2fa 3516 int err;
2f2f4251 3517
e560d8d8 3518 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3519 if (spec == NULL)
3520 return -ENOMEM;
3521
3522 codec->spec = spec;
a4eed138 3523 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3524 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3525 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3526 stac9200_models,
3527 stac9200_cfg_tbl);
11b44bbd
RF		 3528 if (spec->board_config < 0) {
3529 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3530 err = stac92xx_save_bios_config_regs(codec);
3531 if (err < 0) {
3532 stac92xx_free(codec);
3533 return err;
3534 }
3535 spec->pin_configs = spec->bios_pin_configs;
3536 } else {
403d1944
MP		 3537 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3538 stac92xx_set_config_regs(codec);
3539 }
2f2f4251
M		 3540
3541 spec->multiout.max_channels = 2;
3542 spec->multiout.num_dacs = 1;
3543 spec->multiout.dac_nids = stac9200_dac_nids;
3544 spec->adc_nids = stac9200_adc_nids;
3545 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3546 spec->num_muxes = 1;
8b65727b 3547 spec->num_dmics = 0;
9e05b7a3 3548 spec->num_adcs = 1;
a64135a2 3549 spec->num_pwrs = 0;
c7d4b2fa 3550
bf277785
TD		 3551 if (spec->board_config == STAC_9200_GATEWAY ||
3552 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3553 spec->init = stac9200_eapd_init;
3554 else
3555 spec->init = stac9200_core_init;
2f2f4251 3556 spec->mixer = stac9200_mixer;
c7d4b2fa 3557
117f257d
TI		 3558 if (spec->board_config == STAC_9200_PANASONIC) {
3559 spec->gpio_mask = spec->gpio_dir = 0x09;
3560 spec->gpio_data = 0x00;
3561 }
3562
c7d4b2fa
M		 3563 err = stac9200_parse_auto_config(codec);
3564 if (err < 0) {
3565 stac92xx_free(codec);
3566 return err;
3567 }
2f2f4251
M		 3568
3569 codec->patch_ops = stac92xx_patch_ops;
3570
3571 return 0;
3572}
3573
8e21c34c
TD		 3574static int patch_stac925x(struct hda_codec *codec)
3575{
3576 struct sigmatel_spec *spec;
3577 int err;
3578
3579 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3580 if (spec == NULL)
3581 return -ENOMEM;
3582
3583 codec->spec = spec;
a4eed138 3584 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3585 spec->pin_nids = stac925x_pin_nids;
3586 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3587 stac925x_models,
3588 stac925x_cfg_tbl);
9e507abd 3589 again:
8e21c34c 3590 if (spec->board_config < 0) {
2c11f955
TD		 3591 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3592 "using BIOS defaults\n");
8e21c34c
TD		 3593 err = stac92xx_save_bios_config_regs(codec);
3594 if (err < 0) {
3595 stac92xx_free(codec);
3596 return err;
3597 }
3598 spec->pin_configs = spec->bios_pin_configs;
3599 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3600 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3601 stac92xx_set_config_regs(codec);
3602 }
3603
3604 spec->multiout.max_channels = 2;
3605 spec->multiout.num_dacs = 1;
3606 spec->multiout.dac_nids = stac925x_dac_nids;
3607 spec->adc_nids = stac925x_adc_nids;
3608 spec->mux_nids = stac925x_mux_nids;
3609 spec->num_muxes = 1;
9e05b7a3 3610 spec->num_adcs = 1;
a64135a2 3611 spec->num_pwrs = 0;
2c11f955
TD		 3612 switch (codec->vendor_id) {
3613 case 0x83847632: /* STAC9202 */
3614 case 0x83847633: /* STAC9202D */
3615 case 0x83847636: /* STAC9251 */
3616 case 0x83847637: /* STAC9251D */
f6e9852a 3617 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3618 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3619 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3620 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3621 break;
3622 default:
3623 spec->num_dmics = 0;
3624 break;
3625 }
8e21c34c
TD		 3626
3627 spec->init = stac925x_core_init;
3628 spec->mixer = stac925x_mixer;
3629
3630 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3631 if (!err) {
3632 if (spec->board_config < 0) {
3633 printk(KERN_WARNING "hda_codec: No auto-config is "
3634 "available, default to model=ref\n");
3635 spec->board_config = STAC_925x_REF;
3636 goto again;
3637 }
3638 err = -EINVAL;
3639 }
8e21c34c
TD		 3640 if (err < 0) {
3641 stac92xx_free(codec);
3642 return err;
3643 }
3644
3645 codec->patch_ops = stac92xx_patch_ops;
3646
3647 return 0;
3648}
3649
e1f0d669
MR		 3650static struct hda_input_mux stac92hd73xx_dmux = {
3651 .num_items = 4,
3652 .items = {
3653 { "Analog Inputs", 0x0b },
3654 { "CD", 0x08 },
3655 { "Digital Mic 1", 0x09 },
3656 { "Digital Mic 2", 0x0a },
3657 }
3658};
3659
3660static int patch_stac92hd73xx(struct hda_codec *codec)
3661{
3662 struct sigmatel_spec *spec;
3663 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3664 int err = 0;
3665
3666 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3667 if (spec == NULL)
3668 return -ENOMEM;
3669
3670 codec->spec = spec;
3671 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3672 spec->pin_nids = stac92hd73xx_pin_nids;
3673 spec->board_config = snd_hda_check_board_config(codec,
3674 STAC_92HD73XX_MODELS,
3675 stac92hd73xx_models,
3676 stac92hd73xx_cfg_tbl);
3677again:
3678 if (spec->board_config < 0) {
3679 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3680 " STAC92HD73XX, using BIOS defaults\n");
3681 err = stac92xx_save_bios_config_regs(codec);
3682 if (err < 0) {
3683 stac92xx_free(codec);
3684 return err;
3685 }
3686 spec->pin_configs = spec->bios_pin_configs;
3687 } else {
3688 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3689 stac92xx_set_config_regs(codec);
3690 }
3691
3692 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3693 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3694
3695 if (spec->multiout.num_dacs < 0) {
3696 printk(KERN_WARNING "hda_codec: Could not determine "
3697 "number of channels defaulting to DAC count\n");
3698 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3699 }
3700
3701 switch (spec->multiout.num_dacs) {
3702 case 0x3: /* 6 Channel */
7c2ba97b 3703 spec->multiout.hp_nid = 0x17;
e1f0d669
MR		 3704 spec->mixer = stac92hd73xx_6ch_mixer;
3705 spec->init = stac92hd73xx_6ch_core_init;
3706 break;
3707 case 0x4: /* 8 Channel */
3708 spec->multiout.hp_nid = 0x18;
3709 spec->mixer = stac92hd73xx_8ch_mixer;
3710 spec->init = stac92hd73xx_8ch_core_init;
3711 break;
3712 case 0x5: /* 10 Channel */
3713 spec->multiout.hp_nid = 0x19;
3714 spec->mixer = stac92hd73xx_10ch_mixer;
3715 spec->init = stac92hd73xx_10ch_core_init;
3716 };
3717
3718 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3719 spec->aloopback_mask = 0x01;
3720 spec->aloopback_shift = 8;
3721
1cd2224c 3722 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 3723 spec->mux_nids = stac92hd73xx_mux_nids;
3724 spec->adc_nids = stac92hd73xx_adc_nids;
3725 spec->dmic_nids = stac92hd73xx_dmic_nids;
3726 spec->dmux_nids = stac92hd73xx_dmux_nids;
3727
3728 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3729 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 3730 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3731 spec->dinput_mux = &stac92hd73xx_dmux;
3732 /* GPIO0 High = Enable EAPD */
0fc9dec4 3733 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 3734 spec->gpio_data = 0x01;
e1f0d669 3735
a7662640
MR		 3736 switch (spec->board_config) {
3737 case STAC_DELL_M6:
d654a660 3738 spec->init = dell_eq_core_init;
a7662640
MR		 3739 switch (codec->subsystem_id) {
3740 case 0x1028025e: /* Analog Mics */
3741 case 0x1028025f:
3742 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3743 spec->num_dmics = 0;
3744 break;
d654a660 3745 case 0x10280271: /* Digital Mics */
a7662640 3746 case 0x10280272:
d654a660
MR		 3747 spec->init = dell_m6_core_init;
3748 /* fall-through */
3749 case 0x10280254:
3750 case 0x10280255:
a7662640
MR		 3751 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3752 spec->num_dmics = 1;
3753 break;
3754 case 0x10280256: /* Both */
3755 case 0x10280057:
3756 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3757 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3758 spec->num_dmics = 1;
3759 break;
3760 }
3761 break;
3762 default:
3763 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
3764 }
3765
a64135a2
MR		 3766 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3767 spec->pwr_nids = stac92hd73xx_pwr_nids;
3768
e1f0d669
MR		 3769 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3770
3771 if (!err) {
3772 if (spec->board_config < 0) {
3773 printk(KERN_WARNING "hda_codec: No auto-config is "
3774 "available, default to model=ref\n");
3775 spec->board_config = STAC_92HD73XX_REF;
3776 goto again;
3777 }
3778 err = -EINVAL;
3779 }
3780
3781 if (err < 0) {
3782 stac92xx_free(codec);
3783 return err;
3784 }
3785
3786 codec->patch_ops = stac92xx_patch_ops;
3787
3788 return 0;
3789}
3790
d0513fc6
MR		 3791static struct hda_input_mux stac92hd83xxx_dmux = {
3792 .num_items = 3,
3793 .items = {
3794 { "Analog Inputs", 0x03 },
3795 { "Digital Mic 1", 0x04 },
3796 { "Digital Mic 2", 0x05 },
3797 }
3798};
3799
3800static int patch_stac92hd83xxx(struct hda_codec *codec)
3801{
3802 struct sigmatel_spec *spec;
3803 int err;
3804
3805 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3806 if (spec == NULL)
3807 return -ENOMEM;
3808
3809 codec->spec = spec;
3810 spec->mono_nid = 0x19;
3811 spec->digbeep_nid = 0x21;
3812 spec->dmic_nids = stac92hd83xxx_dmic_nids;
3813 spec->dmux_nids = stac92hd83xxx_dmux_nids;
3814 spec->adc_nids = stac92hd83xxx_adc_nids;
3815 spec->pwr_nids = stac92hd83xxx_pwr_nids;
3816 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
3817 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
3818 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
3819
3820 spec->init = stac92hd83xxx_core_init;
3821 switch (codec->vendor_id) {
3822 case 0x111d7605:
3823 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
3824 break;
3825 default:
3826 spec->num_pwrs--;
3827 spec->init++; /* switch to config #2 */
3828 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
3829 }
3830
3831 spec->mixer = stac92hd83xxx_mixer;
3832 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
3833 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
3834 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
3835 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
3836 spec->dinput_mux = &stac92hd83xxx_dmux;
3837 spec->pin_nids = stac92hd83xxx_pin_nids;
3838 spec->board_config = snd_hda_check_board_config(codec,
3839 STAC_92HD83XXX_MODELS,
3840 stac92hd83xxx_models,
3841 stac92hd83xxx_cfg_tbl);
3842again:
3843 if (spec->board_config < 0) {
3844 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3845 " STAC92HD83XXX, using BIOS defaults\n");
3846 err = stac92xx_save_bios_config_regs(codec);
3847 if (err < 0) {
3848 stac92xx_free(codec);
3849 return err;
3850 }
3851 spec->pin_configs = spec->bios_pin_configs;
3852 } else {
3853 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
3854 stac92xx_set_config_regs(codec);
3855 }
3856
3857 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
3858 if (!err) {
3859 if (spec->board_config < 0) {
3860 printk(KERN_WARNING "hda_codec: No auto-config is "
3861 "available, default to model=ref\n");
3862 spec->board_config = STAC_92HD83XXX_REF;
3863 goto again;
3864 }
3865 err = -EINVAL;
3866 }
3867
3868 if (err < 0) {
3869 stac92xx_free(codec);
3870 return err;
3871 }
3872
3873 codec->patch_ops = stac92xx_patch_ops;
3874
3875 return 0;
3876}
3877
3878
e035b841
MR		 3879static int patch_stac92hd71bxx(struct hda_codec *codec)
3880{
3881 struct sigmatel_spec *spec;
3882 int err = 0;
3883
3884 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3885 if (spec == NULL)
3886 return -ENOMEM;
3887
3888 codec->spec = spec;
3889 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 3890 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 3891 spec->pin_nids = stac92hd71bxx_pin_nids;
3892 spec->board_config = snd_hda_check_board_config(codec,
3893 STAC_92HD71BXX_MODELS,
3894 stac92hd71bxx_models,
3895 stac92hd71bxx_cfg_tbl);
3896again:
3897 if (spec->board_config < 0) {
3898 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3899 " STAC92HD71BXX, using BIOS defaults\n");
3900 err = stac92xx_save_bios_config_regs(codec);
3901 if (err < 0) {
3902 stac92xx_free(codec);
3903 return err;
3904 }
3905 spec->pin_configs = spec->bios_pin_configs;
3906 } else {
3907 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3908 stac92xx_set_config_regs(codec);
3909 }
3910
541eee87
MR		 3911 switch (codec->vendor_id) {
3912 case 0x111d76b6: /* 4 Port without Analog Mixer */
3913 case 0x111d76b7:
3914 case 0x111d76b4: /* 6 Port without Analog Mixer */
3915 case 0x111d76b5:
3916 spec->mixer = stac92hd71bxx_mixer;
3917 spec->init = stac92hd71bxx_core_init;
3918 break;
aafc4412
MR		 3919 case 0x111d7608: /* 5 Port with Analog Mixer */
3920 /* no output amps */
3921 spec->num_pwrs = 0;
3922 spec->mixer = stac92hd71bxx_analog_mixer;
3923
3924 /* disable VSW */
3925 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
3926 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
3927 break;
3928 case 0x111d7603: /* 6 Port with Analog Mixer */
3929 /* no output amps */
3930 spec->num_pwrs = 0;
3931 /* fallthru */
541eee87
MR		 3932 default:
3933 spec->mixer = stac92hd71bxx_analog_mixer;
3934 spec->init = stac92hd71bxx_analog_core_init;
3935 }
3936
3937 spec->aloopback_mask = 0x20;
3938 spec->aloopback_shift = 0;
3939
4fe5195c 3940 /* GPIO0 High = EAPD */
0fc9dec4
MR		 3941 spec->gpio_mask = 0x01;
3942 spec->gpio_dir = 0x01;
0fc9dec4 3943 spec->gpio_data = 0x01;
e035b841 3944
1cd2224c 3945 spec->digbeep_nid = 0x26;
e035b841
MR		 3946 spec->mux_nids = stac92hd71bxx_mux_nids;
3947 spec->adc_nids = stac92hd71bxx_adc_nids;
3948 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3949 spec->dmux_nids = stac92hd71bxx_dmux_nids;
aafc4412 3950 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 3951
3952 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3953 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3954 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3955 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3956
aea7bb0a 3957 spec->multiout.num_dacs = 1;
e035b841
MR		 3958 spec->multiout.hp_nid = 0x11;
3959 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3960
3961 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3962 if (!err) {
3963 if (spec->board_config < 0) {
3964 printk(KERN_WARNING "hda_codec: No auto-config is "
3965 "available, default to model=ref\n");
3966 spec->board_config = STAC_92HD71BXX_REF;
3967 goto again;
3968 }
3969 err = -EINVAL;
3970 }
3971
3972 if (err < 0) {
3973 stac92xx_free(codec);
3974 return err;
3975 }
3976
3977 codec->patch_ops = stac92xx_patch_ops;
3978
3979 return 0;
3980};
3981
2f2f4251
M		 3982static int patch_stac922x(struct hda_codec *codec)
3983{
3984 struct sigmatel_spec *spec;
c7d4b2fa 3985 int err;
2f2f4251 3986
e560d8d8 3987 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3988 if (spec == NULL)
3989 return -ENOMEM;
3990
3991 codec->spec = spec;
a4eed138 3992 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3993 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3994 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3995 stac922x_models,
3996 stac922x_cfg_tbl);
536319af 3997 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 3998 spec->gpio_mask = spec->gpio_dir = 0x03;
3999 spec->gpio_data = 0x03;
3fc24d85
TI		 4000 /* Intel Macs have all same PCI SSID, so we need to check
4001 * codec SSID to distinguish the exact models
4002 */
6f0778d8 4003 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4004 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4005
4006 case 0x106b0800:
4007 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4008 break;
5d5d3bc3
IZ		 4009 case 0x106b0600:
4010 case 0x106b0700:
4011 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4012 break;
5d5d3bc3
IZ		 4013 case 0x106b0e00:
4014 case 0x106b0f00:
4015 case 0x106b1600:
4016 case 0x106b1700:
4017 case 0x106b0200:
4018 case 0x106b1e00:
4019 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4020 break;
5d5d3bc3
IZ		 4021 case 0x106b1a00:
4022 case 0x00000100:
4023 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4024 break;
5d5d3bc3
IZ		 4025 case 0x106b0a00:
4026 case 0x106b2200:
4027 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4028 break;
536319af
NB		 4029 default:
4030 spec->board_config = STAC_INTEL_MAC_V3;
4031 break;
3fc24d85
TI		 4032 }
4033 }
4034
9e507abd 4035 again:
11b44bbd
RF		 4036 if (spec->board_config < 0) {
4037 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4038 "using BIOS defaults\n");
4039 err = stac92xx_save_bios_config_regs(codec);
4040 if (err < 0) {
4041 stac92xx_free(codec);
4042 return err;
4043 }
4044 spec->pin_configs = spec->bios_pin_configs;
4045 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4046 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4047 stac92xx_set_config_regs(codec);
4048 }
2f2f4251 4049
c7d4b2fa
M		 4050 spec->adc_nids = stac922x_adc_nids;
4051 spec->mux_nids = stac922x_mux_nids;
2549413e 4052 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4053 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4054 spec->num_dmics = 0;
a64135a2 4055 spec->num_pwrs = 0;
c7d4b2fa
M		 4056
4057 spec->init = stac922x_core_init;
2f2f4251 4058 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4059
4060 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4061
3cc08dc6 4062 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4063 if (!err) {
4064 if (spec->board_config < 0) {
4065 printk(KERN_WARNING "hda_codec: No auto-config is "
4066 "available, default to model=ref\n");
4067 spec->board_config = STAC_D945_REF;
4068 goto again;
4069 }
4070 err = -EINVAL;
4071 }
3cc08dc6
MP		 4072 if (err < 0) {
4073 stac92xx_free(codec);
4074 return err;
4075 }
4076
4077 codec->patch_ops = stac92xx_patch_ops;
4078
807a4636
TI		 4079 /* Fix Mux capture level; max to 2 */
4080 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4081 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4082 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4083 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4084 (0 << AC_AMPCAP_MUTE_SHIFT));
4085
3cc08dc6
MP		 4086 return 0;
4087}
4088
4089static int patch_stac927x(struct hda_codec *codec)
4090{
4091 struct sigmatel_spec *spec;
4092 int err;
4093
4094 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4095 if (spec == NULL)
4096 return -ENOMEM;
4097
4098 codec->spec = spec;
a4eed138 4099 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4100 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4101 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4102 stac927x_models,
4103 stac927x_cfg_tbl);
9e507abd 4104 again:
8e9068b1
MR		 4105 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4106 if (spec->board_config < 0)
4107 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4108 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4109 err = stac92xx_save_bios_config_regs(codec);
4110 if (err < 0) {
4111 stac92xx_free(codec);
4112 return err;
4113 }
4114 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4115 } else {
3cc08dc6
MP		 4116 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4117 stac92xx_set_config_regs(codec);
4118 }
4119
1cd2224c 4120 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4121 spec->adc_nids = stac927x_adc_nids;
4122 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4123 spec->mux_nids = stac927x_mux_nids;
4124 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
b76c850f 4125 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4126 spec->multiout.dac_nids = spec->dac_nids;
4127
81d3dbde 4128 switch (spec->board_config) {
93ed1503 4129 case STAC_D965_3ST:
93ed1503 4130 case STAC_D965_5ST:
8e9068b1 4131 /* GPIO0 High = Enable EAPD */
0fc9dec4 4132 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4133 spec->gpio_data = 0x01;
8e9068b1
MR		 4134 spec->num_dmics = 0;
4135
93ed1503 4136 spec->init = d965_core_init;
9e05b7a3 4137 spec->mixer = stac927x_mixer;
81d3dbde 4138 break;
8e9068b1 4139 case STAC_DELL_BIOS:
780c8be4
MR		 4140 switch (codec->subsystem_id) {
4141 case 0x10280209:
4142 case 0x1028022e:
4143 /* correct the device field to SPDIF out */
4144 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4145 break;
4146 };
03d7ca17
MR		 4147 /* configure the analog microphone on some laptops */
4148 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4149 /* correct the front output jack as a hp out */
7989fba9 4150 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4151 /* correct the front input jack as a mic */
4152 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4153 /* fallthru */
8e9068b1
MR		 4154 case STAC_DELL_3ST:
4155 /* GPIO2 High = Enable EAPD */
0fc9dec4 4156 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4157 spec->gpio_data = 0x04;
7f16859a
MR		 4158 spec->dmic_nids = stac927x_dmic_nids;
4159 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4160
8e9068b1
MR		 4161 spec->init = d965_core_init;
4162 spec->mixer = stac927x_mixer;
4163 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4164 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4165 break;
4166 default:
f1f208d0 4167 /* GPIO0 High = Enable EAPD */
0fc9dec4 4168 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4169 spec->gpio_data = 0x01;
8e9068b1
MR		 4170 spec->num_dmics = 0;
4171
4172 spec->init = stac927x_core_init;
4173 spec->mixer = stac927x_mixer;
7f16859a
MR		 4174 }
4175
a64135a2 4176 spec->num_pwrs = 0;
e1f0d669
MR		 4177 spec->aloopback_mask = 0x40;
4178 spec->aloopback_shift = 0;
8e9068b1 4179
3cc08dc6 4180 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4181 if (!err) {
4182 if (spec->board_config < 0) {
4183 printk(KERN_WARNING "hda_codec: No auto-config is "
4184 "available, default to model=ref\n");
4185 spec->board_config = STAC_D965_REF;
4186 goto again;
4187 }
4188 err = -EINVAL;
4189 }
c7d4b2fa
M		 4190 if (err < 0) {
4191 stac92xx_free(codec);
4192 return err;
4193 }
2f2f4251
M		 4194
4195 codec->patch_ops = stac92xx_patch_ops;
4196
52987656
TI		 4197 /*
4198 * !!FIXME!!
4199 * The STAC927x seem to require fairly long delays for certain
4200 * command sequences. With too short delays (even if the answer
4201 * is set to RIRB properly), it results in the silence output
4202 * on some hardwares like Dell.
4203 *
4204 * The below flag enables the longer delay (see get_response
4205 * in hda_intel.c).
4206 */
4207 codec->bus->needs_damn_long_delay = 1;
4208
2f2f4251
M		 4209 return 0;
4210}
4211
f3302a59
MP		 4212static int patch_stac9205(struct hda_codec *codec)
4213{
4214 struct sigmatel_spec *spec;
8259980e 4215 int err;
f3302a59
MP		 4216
4217 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4218 if (spec == NULL)
4219 return -ENOMEM;
4220
4221 codec->spec = spec;
a4eed138 4222 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4223 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4224 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4225 stac9205_models,
4226 stac9205_cfg_tbl);
9e507abd 4227 again:
11b44bbd
RF		 4228 if (spec->board_config < 0) {
4229 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4230 err = stac92xx_save_bios_config_regs(codec);
4231 if (err < 0) {
4232 stac92xx_free(codec);
4233 return err;
4234 }
4235 spec->pin_configs = spec->bios_pin_configs;
4236 } else {
f3302a59
MP		 4237 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4238 stac92xx_set_config_regs(codec);
4239 }
4240
1cd2224c 4241 spec->digbeep_nid = 0x23;
f3302a59 4242 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4243 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4244 spec->mux_nids = stac9205_mux_nids;
2549413e 4245 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 4246 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4247 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4248 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4249 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4250 spec->num_pwrs = 0;
f3302a59
MP		 4251
4252 spec->init = stac9205_core_init;
4253 spec->mixer = stac9205_mixer;
4254
e1f0d669
MR		 4255 spec->aloopback_mask = 0x40;
4256 spec->aloopback_shift = 0;
f3302a59 4257 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4258
ae0a8ed8 4259 switch (spec->board_config){
ae0a8ed8 4260 case STAC_9205_DELL_M43:
87d48363
MR		 4261 /* Enable SPDIF in/out */
4262 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4263 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4264
4fe5195c
MR		 4265 /* Enable unsol response for GPIO4/Dock HP connection */
4266 snd_hda_codec_write(codec, codec->afg, 0,
4267 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4268 snd_hda_codec_write_cache(codec, codec->afg, 0,
4269 AC_VERB_SET_UNSOLICITED_ENABLE,
4270 (AC_USRSP_EN | STAC_HP_EVENT));
4271
4272 spec->gpio_dir = 0x0b;
0fc9dec4 4273 spec->eapd_mask = 0x01;
4fe5195c
MR		 4274 spec->gpio_mask = 0x1b;
4275 spec->gpio_mute = 0x10;
e2e7d624 4276 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4277 * GPIO3 Low = DRM
87d48363 4278 */
4fe5195c 4279 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4280 break;
4281 default:
4282 /* GPIO0 High = EAPD */
0fc9dec4 4283 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4284 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4285 break;
4286 }
33382403 4287
f3302a59 4288 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 4289 if (!err) {
4290 if (spec->board_config < 0) {
4291 printk(KERN_WARNING "hda_codec: No auto-config is "
4292 "available, default to model=ref\n");
4293 spec->board_config = STAC_9205_REF;
4294 goto again;
4295 }
4296 err = -EINVAL;
4297 }
f3302a59
MP		 4298 if (err < 0) {
4299 stac92xx_free(codec);
4300 return err;
4301 }
4302
4303 codec->patch_ops = stac92xx_patch_ops;
4304
4305 return 0;
4306}
4307
db064e50 4308/*
6d859065 4309 * STAC9872 hack
db064e50
TI		 4310 */
4311
99ccc560 4312/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 4313static hda_nid_t vaio_dacs[] = { 0x2 };
4314#define VAIO_HP_DAC 0x5
4315static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
4316static hda_nid_t vaio_mux_nids[] = { 0x15 };
4317
4318static struct hda_input_mux vaio_mux = {
a3a2f429 4319 .num_items = 3,
db064e50 4320 .items = {
d773781c 4321 /* { "HP", 0x0 }, */
1624cb9a
TI		 4322 { "Mic Jack", 0x1 },
4323 { "Internal Mic", 0x2 },
db064e50
TI		 4324 { "PCM", 0x3 },
4325 }
4326};
4327
4328static struct hda_verb vaio_init[] = {
4329 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 4330 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 4331 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4332 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4333 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4334 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4335 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 4336 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4337 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4338 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4339 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4340 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4341 {}
4342};
4343
6d859065
GM		 4344static struct hda_verb vaio_ar_init[] = {
4345 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
4346 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4347 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4348 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4349/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
4350 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4351 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4352 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4353 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4354/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
4355 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4356 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4357 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4358 {}
4359};
4360
db064e50 4361/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4362static struct hda_bind_ctls vaio_bind_master_vol = {
4363 .ops = &snd_hda_bind_vol,
4364 .values = {
4365 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4366 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4367 0
4368 },
4369};
db064e50
TI		 4370
4371/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4372static struct hda_bind_ctls vaio_bind_master_sw = {
4373 .ops = &snd_hda_bind_sw,
4374 .values = {
4375 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4376 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4377 0,
4378 },
4379};
db064e50
TI		 4380
4381static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 4382 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4383 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 4384 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4385 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4386 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4387 {
4388 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4389 .name = "Capture Source",
4390 .count = 1,
4391 .info = stac92xx_mux_enum_info,
4392 .get = stac92xx_mux_enum_get,
4393 .put = stac92xx_mux_enum_put,
4394 },
4395 {}
4396};
4397
6d859065 4398static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 4399 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4400 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 4401 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4402 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4403 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4404 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
4405 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
4406 {
4407 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4408 .name = "Capture Source",
4409 .count = 1,
4410 .info = stac92xx_mux_enum_info,
4411 .get = stac92xx_mux_enum_get,
4412 .put = stac92xx_mux_enum_put,
4413 },
4414 {}
4415};
4416
4417static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4418 .build_controls = stac92xx_build_controls,
4419 .build_pcms = stac92xx_build_pcms,
4420 .init = stac92xx_init,
4421 .free = stac92xx_free,
cb53c626 4422#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4423 .resume = stac92xx_resume,
4424#endif
4425};
4426
72e7b0dd
TI		 4427static int stac9872_vaio_init(struct hda_codec *codec)
4428{
4429 int err;
4430
4431 err = stac92xx_init(codec);
4432 if (err < 0)
4433 return err;
4434 if (codec->patch_ops.unsol_event)
4435 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4436 return 0;
4437}
4438
4439static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4440{
40c1d308 4441 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4442 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4443 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4444 } else {
4445 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4446 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4447 }
4448}
4449
4450static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4451{
4452 switch (res >> 26) {
4453 case STAC_HP_EVENT:
4454 stac9872_vaio_hp_detect(codec, res);
4455 break;
4456 }
4457}
4458
4459static struct hda_codec_ops stac9872_vaio_patch_ops = {
4460 .build_controls = stac92xx_build_controls,
4461 .build_pcms = stac92xx_build_pcms,
4462 .init = stac9872_vaio_init,
4463 .free = stac92xx_free,
4464 .unsol_event = stac9872_vaio_unsol_event,
4465#ifdef CONFIG_PM
4466 .resume = stac92xx_resume,
4467#endif
4468};
4469
6d859065
GM		 4470enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4471 CXD9872RD_VAIO,
4472 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
4473 STAC9872AK_VAIO,
4474 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
4475 STAC9872K_VAIO,
4476 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 4477 CXD9872AKD_VAIO,
4478 STAC_9872_MODELS,
4479};
4480
4481static const char *stac9872_models[STAC_9872_MODELS] = {
4482 [CXD9872RD_VAIO] = "vaio",
4483 [CXD9872AKD_VAIO] = "vaio-ar",
4484};
4485
4486static struct snd_pci_quirk stac9872_cfg_tbl[] = {
4487 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
4488 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
4489 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 4490 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 4491 {}
4492};
4493
6d859065 4494static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4495{
4496 struct sigmatel_spec *spec;
4497 int board_config;
4498
f5fcc13c
TI		 4499 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
4500 stac9872_models,
4501 stac9872_cfg_tbl);
db064e50
TI		 4502 if (board_config < 0)
4503 /* unknown config, let generic-parser do its job... */
4504 return snd_hda_parse_generic_codec(codec);
4505
4506 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4507 if (spec == NULL)
4508 return -ENOMEM;
4509
4510 codec->spec = spec;
4511 switch (board_config) {
6d859065
GM		 4512 case CXD9872RD_VAIO:
4513 case STAC9872AK_VAIO:
4514 case STAC9872K_VAIO:
db064e50
TI		 4515 spec->mixer = vaio_mixer;
4516 spec->init = vaio_init;
4517 spec->multiout.max_channels = 2;
4518 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4519 spec->multiout.dac_nids = vaio_dacs;
4520 spec->multiout.hp_nid = VAIO_HP_DAC;
4521 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
4522 spec->adc_nids = vaio_adcs;
a64135a2 4523 spec->num_pwrs = 0;
db064e50
TI		 4524 spec->input_mux = &vaio_mux;
4525 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4526 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 4527 break;
6d859065
GM		 4528
4529 case CXD9872AKD_VAIO:
4530 spec->mixer = vaio_ar_mixer;
4531 spec->init = vaio_ar_init;
4532 spec->multiout.max_channels = 2;
4533 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4534 spec->multiout.dac_nids = vaio_dacs;
4535 spec->multiout.hp_nid = VAIO_HP_DAC;
4536 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 4537 spec->num_pwrs = 0;
6d859065
GM		 4538 spec->adc_nids = vaio_adcs;
4539 spec->input_mux = &vaio_mux;
4540 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4541 codec->patch_ops = stac9872_patch_ops;
6d859065 4542 break;
db064e50
TI		 4543 }
4544
db064e50
TI		 4545 return 0;
4546}
4547
4548
2f2f4251
M		 4549/*
4550 * patch entries
4551 */
4552struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4553 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4554 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4555 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4556 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4557 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4558 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4559 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4560 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4561 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4562 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4563 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4564 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4565 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4566 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4567 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4568 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4569 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4570 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4571 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4572 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4573 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4574 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4575 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4576 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4577 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4578 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4579 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4580 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4581 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 4582 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
4583 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 4584 /* The following does not take into account .id=0x83847661 when subsys =
4585 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4586 * currently not fully supported.
4587 */
4588 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4589 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4590 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 4591 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4592 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4593 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4594 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4595 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4596 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4597 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4598 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 4599 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 4600 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
4601 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 4602 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 4603 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4604 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4605 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 4606 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4607 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4608 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4609 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4610 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4611 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4612 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4613 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 4614 {} /* terminator */
4615};
ubuntu-zesty-kernel mirror