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ALSA: hda - consitify string arrays
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2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
2f2f4251 32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
45a6ac16 34#include <sound/jack.h>
a74ccea5 35#include <sound/tlv.h>
2f2f4251
M		 36#include "hda_codec.h"
37#include "hda_local.h"
1cd2224c 38#include "hda_beep.h"
2f2f4251 39
c6e4c666
TI		 40enum {
41 STAC_VREF_EVENT = 1,
42 STAC_INSERT_EVENT,
43 STAC_PWR_EVENT,
44 STAC_HP_EVENT,
fefd67f3 45 STAC_LO_EVENT,
3d21d3f7 46 STAC_MIC_EVENT,
c6e4c666 47};
4e55096e 48
f5fcc13c 49enum {
1607b8ea 50 STAC_AUTO,
f5fcc13c 51 STAC_REF,
bf277785 52 STAC_9200_OQO,
dfe495d0
TI		 53 STAC_9200_DELL_D21,
54 STAC_9200_DELL_D22,
55 STAC_9200_DELL_D23,
56 STAC_9200_DELL_M21,
57 STAC_9200_DELL_M22,
58 STAC_9200_DELL_M23,
59 STAC_9200_DELL_M24,
60 STAC_9200_DELL_M25,
61 STAC_9200_DELL_M26,
62 STAC_9200_DELL_M27,
58eec423
MCC		 63 STAC_9200_M4,
64 STAC_9200_M4_2,
117f257d 65 STAC_9200_PANASONIC,
f5fcc13c
TI		 66 STAC_9200_MODELS
67};
68
69enum {
1607b8ea 70 STAC_9205_AUTO,
f5fcc13c 71 STAC_9205_REF,
dfe495d0 72 STAC_9205_DELL_M42,
ae0a8ed8
TD		 73 STAC_9205_DELL_M43,
74 STAC_9205_DELL_M44,
d9a4268e 75 STAC_9205_EAPD,
f5fcc13c
TI		 76 STAC_9205_MODELS
77};
78
e1f0d669 79enum {
1607b8ea 80 STAC_92HD73XX_AUTO,
9e43f0de 81 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 82 STAC_92HD73XX_REF,
ae709440 83 STAC_92HD73XX_INTEL,
661cd8fb
TI		 84 STAC_DELL_M6_AMIC,
85 STAC_DELL_M6_DMIC,
86 STAC_DELL_M6_BOTH,
6b3ab21e 87 STAC_DELL_EQ,
842ae638 88 STAC_ALIENWARE_M17X,
e1f0d669
MR		 89 STAC_92HD73XX_MODELS
90};
91
d0513fc6 92enum {
1607b8ea 93 STAC_92HD83XXX_AUTO,
d0513fc6 94 STAC_92HD83XXX_REF,
32ed3f46 95 STAC_92HD83XXX_PWR_REF,
8bb0ac55 96 STAC_DELL_S14,
b4e81876 97 STAC_92HD83XXX_HP,
48315590 98 STAC_HP_DV7_4000,
d0513fc6
MR		 99 STAC_92HD83XXX_MODELS
100};
101
e035b841 102enum {
1607b8ea 103 STAC_92HD71BXX_AUTO,
e035b841 104 STAC_92HD71BXX_REF,
a7662640
MR		 105 STAC_DELL_M4_1,
106 STAC_DELL_M4_2,
3a7abfd2 107 STAC_DELL_M4_3,
6a14f585 108 STAC_HP_M4,
2a6ce6e5 109 STAC_HP_DV4,
1b0652eb 110 STAC_HP_DV5,
ae6241fb 111 STAC_HP_HDX,
514bf54c 112 STAC_HP_DV4_1222NR,
e035b841
MR		 113 STAC_92HD71BXX_MODELS
114};
115
8e21c34c 116enum {
1607b8ea 117 STAC_925x_AUTO,
8e21c34c 118 STAC_925x_REF,
9cb36c2a
MCC		 119 STAC_M1,
120 STAC_M1_2,
121 STAC_M2,
8e21c34c 122 STAC_M2_2,
9cb36c2a
MCC		 123 STAC_M3,
124 STAC_M5,
125 STAC_M6,
8e21c34c
TD		 126 STAC_925x_MODELS
127};
128
f5fcc13c 129enum {
1607b8ea 130 STAC_922X_AUTO,
f5fcc13c
TI		 131 STAC_D945_REF,
132 STAC_D945GTP3,
133 STAC_D945GTP5,
5d5d3bc3
IZ		 134 STAC_INTEL_MAC_V1,
135 STAC_INTEL_MAC_V2,
136 STAC_INTEL_MAC_V3,
137 STAC_INTEL_MAC_V4,
138 STAC_INTEL_MAC_V5,
536319af
NB		 139 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
140 * is given, one of the above models will be
141 * chosen according to the subsystem id. */
dfe495d0 142 /* for backward compatibility */
f5fcc13c 143 STAC_MACMINI,
3fc24d85 144 STAC_MACBOOK,
6f0778d8
NB		 145 STAC_MACBOOK_PRO_V1,
146 STAC_MACBOOK_PRO_V2,
f16928fb 147 STAC_IMAC_INTEL,
0dae0f83 148 STAC_IMAC_INTEL_20,
8c650087 149 STAC_ECS_202,
dfe495d0
TI		 150 STAC_922X_DELL_D81,
151 STAC_922X_DELL_D82,
152 STAC_922X_DELL_M81,
153 STAC_922X_DELL_M82,
f5fcc13c
TI		 154 STAC_922X_MODELS
155};
156
157enum {
1607b8ea 158 STAC_927X_AUTO,
e28d8322 159 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 160 STAC_D965_REF,
161 STAC_D965_3ST,
162 STAC_D965_5ST,
679d92ed 163 STAC_D965_5ST_NO_FP,
4ff076e5 164 STAC_DELL_3ST,
8e9068b1 165 STAC_DELL_BIOS,
54930531 166 STAC_927X_VOLKNOB,
f5fcc13c
TI		 167 STAC_927X_MODELS
168};
403d1944 169
307282c8
TI		 170enum {
171 STAC_9872_AUTO,
172 STAC_9872_VAIO,
173 STAC_9872_MODELS
174};
175
74aeaabc
MR		 176struct sigmatel_event {
177 hda_nid_t nid;
c6e4c666
TI		 178 unsigned char type;
179 unsigned char tag;
74aeaabc
MR		 180 int data;
181};
182
183struct sigmatel_jack {
184 hda_nid_t nid;
185 int type;
186 struct snd_jack *jack;
187};
188
3d21d3f7
TI		 189struct sigmatel_mic_route {
190 hda_nid_t pin;
02d33322
TI		 191 signed char mux_idx;
192 signed char dmux_idx;
3d21d3f7
TI		 193};
194
2f2f4251 195struct sigmatel_spec {
c8b6bf9b 196 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 197 unsigned int num_mixers;
198
403d1944 199 int board_config;
c0cea0d0 200 unsigned int eapd_switch: 1;
c7d4b2fa 201 unsigned int surr_switch: 1;
3cc08dc6 202 unsigned int alt_switch: 1;
82bc955f 203 unsigned int hp_detect: 1;
00ef50c2 204 unsigned int spdif_mute: 1;
7c7767eb 205 unsigned int check_volume_offset:1;
3d21d3f7 206 unsigned int auto_mic:1;
1b0e372d 207 unsigned int linear_tone_beep:1;
c7d4b2fa 208
4fe5195c 209 /* gpio lines */
0fc9dec4 210 unsigned int eapd_mask;
4fe5195c
MR		 211 unsigned int gpio_mask;
212 unsigned int gpio_dir;
213 unsigned int gpio_data;
214 unsigned int gpio_mute;
86d190e7 215 unsigned int gpio_led;
c357aab0 216 unsigned int gpio_led_polarity;
4fe5195c 217
8daaaa97
MR		 218 /* stream */
219 unsigned int stream_delay;
220
4fe5195c 221 /* analog loopback */
d78d7a90 222 struct snd_kcontrol_new *aloopback_ctl;
e1f0d669
MR		 223 unsigned char aloopback_mask;
224 unsigned char aloopback_shift;
8259980e 225
a64135a2
MR		 226 /* power management */
227 unsigned int num_pwrs;
d0513fc6 228 unsigned int *pwr_mapping;
a64135a2 229 hda_nid_t *pwr_nids;
b76c850f 230 hda_nid_t *dac_list;
a64135a2 231
74aeaabc
MR		 232 /* jack detection */
233 struct snd_array jacks;
234
235 /* events */
236 struct snd_array events;
237
2f2f4251 238 /* playback */
b22b4821
MR		 239 struct hda_input_mux *mono_mux;
240 unsigned int cur_mmux;
2f2f4251 241 struct hda_multi_out multiout;
3cc08dc6 242 hda_nid_t dac_nids[5];
c21ca4a8
TI		 243 hda_nid_t hp_dacs[5];
244 hda_nid_t speaker_dacs[5];
2f2f4251 245
7c7767eb
TI		 246 int volume_offset;
247
2f2f4251
M		 248 /* capture */
249 hda_nid_t *adc_nids;
2f2f4251 250 unsigned int num_adcs;
dabbed6f
M		 251 hda_nid_t *mux_nids;
252 unsigned int num_muxes;
8b65727b
MP		 253 hda_nid_t *dmic_nids;
254 unsigned int num_dmics;
e1f0d669 255 hda_nid_t *dmux_nids;
1697055e 256 unsigned int num_dmuxes;
d9737751
MR		 257 hda_nid_t *smux_nids;
258 unsigned int num_smuxes;
5207e10e 259 unsigned int num_analog_muxes;
6479c631
TI		 260
261 unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
262 unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
263 unsigned int num_caps; /* number of capture volume/switch elements */
264
3d21d3f7
TI		 265 struct sigmatel_mic_route ext_mic;
266 struct sigmatel_mic_route int_mic;
9907790a 267 struct sigmatel_mic_route dock_mic;
3d21d3f7 268
ea734963 269 const char * const *spdif_labels;
d9737751 270
dabbed6f 271 hda_nid_t dig_in_nid;
b22b4821 272 hda_nid_t mono_nid;
1cd2224c
MR		 273 hda_nid_t anabeep_nid;
274 hda_nid_t digbeep_nid;
2f2f4251 275
2f2f4251
M		 276 /* pin widgets */
277 hda_nid_t *pin_nids;
278 unsigned int num_pins;
2f2f4251
M		 279
280 /* codec specific stuff */
281 struct hda_verb *init;
c8b6bf9b 282 struct snd_kcontrol_new *mixer;
2f2f4251
M		 283
284 /* capture source */
8b65727b 285 struct hda_input_mux *dinput_mux;
e1f0d669 286 unsigned int cur_dmux[2];
c7d4b2fa 287 struct hda_input_mux *input_mux;
3cc08dc6 288 unsigned int cur_mux[3];
d9737751
MR		 289 struct hda_input_mux *sinput_mux;
290 unsigned int cur_smux[2];
2a9c7816
MR		 291 unsigned int cur_amux;
292 hda_nid_t *amp_nids;
8daaaa97 293 unsigned int powerdown_adcs;
2f2f4251 294
403d1944
MP		 295 /* i/o switches */
296 unsigned int io_switch[2];
0fb87bb4 297 unsigned int clfe_swap;
c21ca4a8
TI		 298 hda_nid_t line_switch; /* shared line-in for input and output */
299 hda_nid_t mic_switch; /* shared mic-in for input and output */
300 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 301 unsigned int aloopback;
2f2f4251 302
c7d4b2fa
M		 303 struct hda_pcm pcm_rec[2]; /* PCM information */
304
305 /* dynamic controls and input_mux */
306 struct auto_pin_cfg autocfg;
603c4019 307 struct snd_array kctls;
8b65727b 308 struct hda_input_mux private_dimux;
c7d4b2fa 309 struct hda_input_mux private_imux;
d9737751 310 struct hda_input_mux private_smux;
b22b4821 311 struct hda_input_mux private_mono_mux;
2f2f4251
M		 312};
313
314static hda_nid_t stac9200_adc_nids[1] = {
315 0x03,
316};
317
318static hda_nid_t stac9200_mux_nids[1] = {
319 0x0c,
320};
321
322static hda_nid_t stac9200_dac_nids[1] = {
323 0x02,
324};
325
a64135a2
MR		 326static hda_nid_t stac92hd73xx_pwr_nids[8] = {
327 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
328 0x0f, 0x10, 0x11
329};
330
0ffa9807
MR		 331static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
332 0x26, 0,
333};
334
e1f0d669
MR		 335static hda_nid_t stac92hd73xx_adc_nids[2] = {
336 0x1a, 0x1b
337};
338
339#define STAC92HD73XX_NUM_DMICS 2
340static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
341 0x13, 0x14, 0
342};
343
344#define STAC92HD73_DAC_COUNT 5
e1f0d669 345
e2aec171
TI		 346static hda_nid_t stac92hd73xx_mux_nids[2] = {
347 0x20, 0x21,
e1f0d669
MR		 348};
349
350static hda_nid_t stac92hd73xx_dmux_nids[2] = {
351 0x20, 0x21,
352};
353
d9737751
MR		 354static hda_nid_t stac92hd73xx_smux_nids[2] = {
355 0x22, 0x23,
356};
357
6479c631
TI		 358#define STAC92HD73XX_NUM_CAPS 2
359static unsigned long stac92hd73xx_capvols[] = {
360 HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
361 HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
362};
363#define stac92hd73xx_capsws stac92hd73xx_capvols
364
d0513fc6 365#define STAC92HD83_DAC_COUNT 3
d0513fc6 366
667067d8 367static hda_nid_t stac92hd83xxx_mux_nids[2] = {
d0513fc6
MR		 368 0x17, 0x18,
369};
370
371static hda_nid_t stac92hd83xxx_adc_nids[2] = {
372 0x15, 0x16,
373};
374
375static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
376 0xa, 0xb, 0xd, 0xe,
377};
378
0ffa9807
MR		 379static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
380 0x1e, 0,
381};
382
d0513fc6 383static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 384 0x03, 0x0c, 0x20, 0x40,
d0513fc6
MR		 385};
386
ab5a6ebe
VK		 387#define STAC92HD83XXX_NUM_DMICS 2
388static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
389 0x11, 0x20, 0
390};
391
bdfe6f45
DH		 392#define STAC92HD88XXX_NUM_DMICS STAC92HD83XXX_NUM_DMICS
393#define stac92hd88xxx_dmic_nids stac92hd83xxx_dmic_nids
394
89feca1a
DH		 395#define STAC92HD87B_NUM_DMICS 1
396static hda_nid_t stac92hd87b_dmic_nids[STAC92HD87B_NUM_DMICS + 1] = {
397 0x11, 0
398};
399
6479c631
TI		 400#define STAC92HD83XXX_NUM_CAPS 2
401static unsigned long stac92hd83xxx_capvols[] = {
402 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_OUTPUT),
403 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_OUTPUT),
404};
405#define stac92hd83xxx_capsws stac92hd83xxx_capvols
406
a64135a2
MR		 407static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
408 0x0a, 0x0d, 0x0f
409};
410
e035b841
MR		 411static hda_nid_t stac92hd71bxx_adc_nids[2] = {
412 0x12, 0x13,
413};
414
415static hda_nid_t stac92hd71bxx_mux_nids[2] = {
416 0x1a, 0x1b
417};
418
4b33c767
MR		 419static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
420 0x1c, 0x1d,
e1f0d669
MR		 421};
422
d9737751
MR		 423static hda_nid_t stac92hd71bxx_smux_nids[2] = {
424 0x24, 0x25,
425};
426
e035b841
MR		 427#define STAC92HD71BXX_NUM_DMICS 2
428static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
429 0x18, 0x19, 0
430};
431
0ffa9807
MR		 432static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
433 0x22, 0
434};
435
6479c631
TI		 436#define STAC92HD71BXX_NUM_CAPS 2
437static unsigned long stac92hd71bxx_capvols[] = {
438 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
439 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
440};
441#define stac92hd71bxx_capsws stac92hd71bxx_capvols
442
8e21c34c
TD		 443static hda_nid_t stac925x_adc_nids[1] = {
444 0x03,
445};
446
447static hda_nid_t stac925x_mux_nids[1] = {
448 0x0f,
449};
450
451static hda_nid_t stac925x_dac_nids[1] = {
452 0x02,
453};
454
f6e9852a
TI		 455#define STAC925X_NUM_DMICS 1
456static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
457 0x15, 0
2c11f955
TD		 458};
459
1697055e
TI		 460static hda_nid_t stac925x_dmux_nids[1] = {
461 0x14,
462};
463
6479c631
TI		 464static unsigned long stac925x_capvols[] = {
465 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
466};
467static unsigned long stac925x_capsws[] = {
468 HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
469};
470
2f2f4251
M		 471static hda_nid_t stac922x_adc_nids[2] = {
472 0x06, 0x07,
473};
474
475static hda_nid_t stac922x_mux_nids[2] = {
476 0x12, 0x13,
477};
478
6479c631
TI		 479#define STAC922X_NUM_CAPS 2
480static unsigned long stac922x_capvols[] = {
481 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
482 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
483};
484#define stac922x_capsws stac922x_capvols
485
45c1d85b
MR		 486static hda_nid_t stac927x_slave_dig_outs[2] = {
487 0x1f, 0,
488};
489
3cc08dc6
MP		 490static hda_nid_t stac927x_adc_nids[3] = {
491 0x07, 0x08, 0x09
492};
493
494static hda_nid_t stac927x_mux_nids[3] = {
495 0x15, 0x16, 0x17
496};
497
d9737751
MR		 498static hda_nid_t stac927x_smux_nids[1] = {
499 0x21,
500};
501
b76c850f
MR		 502static hda_nid_t stac927x_dac_nids[6] = {
503 0x02, 0x03, 0x04, 0x05, 0x06, 0
504};
505
e1f0d669
MR		 506static hda_nid_t stac927x_dmux_nids[1] = {
507 0x1b,
508};
509
7f16859a
MR		 510#define STAC927X_NUM_DMICS 2
511static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
512 0x13, 0x14, 0
513};
514
6479c631
TI		 515#define STAC927X_NUM_CAPS 3
516static unsigned long stac927x_capvols[] = {
517 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
518 HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
519 HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
520};
521static unsigned long stac927x_capsws[] = {
522 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
523 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
524 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
525};
526
ea734963 527static const char * const stac927x_spdif_labels[5] = {
65973632
MR		 528 "Digital Playback", "ADAT", "Analog Mux 1",
529 "Analog Mux 2", "Analog Mux 3"
530};
531
f3302a59
MP		 532static hda_nid_t stac9205_adc_nids[2] = {
533 0x12, 0x13
534};
535
536static hda_nid_t stac9205_mux_nids[2] = {
537 0x19, 0x1a
538};
539
e1f0d669 540static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 541 0x1d,
e1f0d669
MR		 542};
543
d9737751
MR		 544static hda_nid_t stac9205_smux_nids[1] = {
545 0x21,
546};
547
f6e9852a
TI		 548#define STAC9205_NUM_DMICS 2
549static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
550 0x17, 0x18, 0
8b65727b
MP		 551};
552
6479c631
TI		 553#define STAC9205_NUM_CAPS 2
554static unsigned long stac9205_capvols[] = {
555 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
556 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
557};
558static unsigned long stac9205_capsws[] = {
559 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
560 HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
561};
562
c7d4b2fa 563static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 564 0x08, 0x09, 0x0d, 0x0e,
565 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 566};
567
8e21c34c
TD		 568static hda_nid_t stac925x_pin_nids[8] = {
569 0x07, 0x08, 0x0a, 0x0b,
570 0x0c, 0x0d, 0x10, 0x11,
571};
572
2f2f4251
M		 573static hda_nid_t stac922x_pin_nids[10] = {
574 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
575 0x0f, 0x10, 0x11, 0x15, 0x1b,
576};
577
a7662640 578static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 579 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
580 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 581 0x14, 0x22, 0x23
e1f0d669
MR		 582};
583
8bb0ac55 584static hda_nid_t stac92hd83xxx_pin_nids[10] = {
d0513fc6 585 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
8bb0ac55 586 0x0f, 0x10, 0x11, 0x1f, 0x20,
d0513fc6 587};
616f89e7 588
36706005
CC		 589static hda_nid_t stac92hd88xxx_pin_nids[10] = {
590 0x0a, 0x0b, 0x0c, 0x0d,
591 0x0f, 0x11, 0x1f, 0x20,
592};
593
616f89e7
HRK		 594#define STAC92HD71BXX_NUM_PINS 13
595static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
596 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
597 0x00, 0x14, 0x18, 0x19, 0x1e,
598 0x1f, 0x20, 0x27
599};
600static hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR		 601 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
602 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 603 0x1f, 0x20, 0x27
e035b841
MR		 604};
605
3cc08dc6
MP		 606static hda_nid_t stac927x_pin_nids[14] = {
607 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
608 0x0f, 0x10, 0x11, 0x12, 0x13,
609 0x14, 0x21, 0x22, 0x23,
610};
611
f3302a59
MP		 612static hda_nid_t stac9205_pin_nids[12] = {
613 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
614 0x0f, 0x14, 0x16, 0x17, 0x18,
615 0x21, 0x22,
f3302a59
MP		 616};
617
8b65727b
MP		 618static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
619 struct snd_ctl_elem_info *uinfo)
620{
621 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
622 struct sigmatel_spec *spec = codec->spec;
623 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
624}
625
626static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
627 struct snd_ctl_elem_value *ucontrol)
628{
629 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
630 struct sigmatel_spec *spec = codec->spec;
e1f0d669 631 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 632
e1f0d669 633 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 634 return 0;
635}
636
637static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
638 struct snd_ctl_elem_value *ucontrol)
639{
640 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
641 struct sigmatel_spec *spec = codec->spec;
e1f0d669 642 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 643
644 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 645 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 646}
647
d9737751
MR		 648static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
649 struct snd_ctl_elem_info *uinfo)
650{
651 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
652 struct sigmatel_spec *spec = codec->spec;
653 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
654}
655
656static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
657 struct snd_ctl_elem_value *ucontrol)
658{
659 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
660 struct sigmatel_spec *spec = codec->spec;
661 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
662
663 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
664 return 0;
665}
666
667static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
668 struct snd_ctl_elem_value *ucontrol)
669{
670 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
671 struct sigmatel_spec *spec = codec->spec;
00ef50c2 672 struct hda_input_mux *smux = &spec->private_smux;
d9737751 673 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 674 int err, val;
675 hda_nid_t nid;
d9737751 676
00ef50c2 677 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 678 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 679 if (err < 0)
680 return err;
681
682 if (spec->spdif_mute) {
683 if (smux_idx == 0)
684 nid = spec->multiout.dig_out_nid;
685 else
686 nid = codec->slave_dig_outs[smux_idx - 1];
687 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 688 val = HDA_AMP_MUTE;
00ef50c2 689 else
c9b46f91 690 val = 0;
00ef50c2 691 /* un/mute SPDIF out */
c9b46f91
TI		 692 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
693 HDA_AMP_MUTE, val);
00ef50c2
MR		 694 }
695 return 0;
d9737751
MR		 696}
697
2fc99890
NL		 698static unsigned int stac92xx_vref_set(struct hda_codec *codec,
699 hda_nid_t nid, unsigned int new_vref)
700{
b8621516 701 int error;
2fc99890
NL		 702 unsigned int pincfg;
703 pincfg = snd_hda_codec_read(codec, nid, 0,
704 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
705
706 pincfg &= 0xff;
707 pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
708 pincfg |= new_vref;
709
710 if (new_vref == AC_PINCTL_VREF_HIZ)
711 pincfg |= AC_PINCTL_OUT_EN;
712 else
713 pincfg |= AC_PINCTL_IN_EN;
714
715 error = snd_hda_codec_write_cache(codec, nid, 0,
716 AC_VERB_SET_PIN_WIDGET_CONTROL, pincfg);
717 if (error < 0)
718 return error;
719 else
720 return 1;
721}
722
723static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
724{
725 unsigned int vref;
726 vref = snd_hda_codec_read(codec, nid, 0,
727 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
728 vref &= AC_PINCTL_VREFEN;
729 return vref;
730}
731
c8b6bf9b 732static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 733{
734 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
735 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 736 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 737}
738
c8b6bf9b 739static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 740{
741 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
742 struct sigmatel_spec *spec = codec->spec;
743 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
744
745 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
746 return 0;
747}
748
c8b6bf9b 749static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 750{
751 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
752 struct sigmatel_spec *spec = codec->spec;
753 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5207e10e
TI		 754 const struct hda_input_mux *imux = spec->input_mux;
755 unsigned int idx, prev_idx;
756
757 idx = ucontrol->value.enumerated.item[0];
758 if (idx >= imux->num_items)
759 idx = imux->num_items - 1;
760 prev_idx = spec->cur_mux[adc_idx];
761 if (prev_idx == idx)
762 return 0;
763 if (idx < spec->num_analog_muxes) {
764 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
765 AC_VERB_SET_CONNECT_SEL,
766 imux->items[idx].index);
767 if (prev_idx >= spec->num_analog_muxes) {
768 imux = spec->dinput_mux;
769 /* 0 = analog */
770 snd_hda_codec_write_cache(codec,
771 spec->dmux_nids[adc_idx], 0,
772 AC_VERB_SET_CONNECT_SEL,
773 imux->items[0].index);
774 }
775 } else {
776 imux = spec->dinput_mux;
777 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
778 AC_VERB_SET_CONNECT_SEL,
779 imux->items[idx - 1].index);
780 }
781 spec->cur_mux[adc_idx] = idx;
782 return 1;
2f2f4251
M		 783}
784
b22b4821
MR		 785static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
786 struct snd_ctl_elem_info *uinfo)
787{
788 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
789 struct sigmatel_spec *spec = codec->spec;
790 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
791}
792
793static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
794 struct snd_ctl_elem_value *ucontrol)
795{
796 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
797 struct sigmatel_spec *spec = codec->spec;
798
799 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
800 return 0;
801}
802
803static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
804 struct snd_ctl_elem_value *ucontrol)
805{
806 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
807 struct sigmatel_spec *spec = codec->spec;
808
809 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
810 spec->mono_nid, &spec->cur_mmux);
811}
812
5f10c4a9
ML		 813#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
814
815static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
816 struct snd_ctl_elem_value *ucontrol)
817{
818 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 819 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 820 struct sigmatel_spec *spec = codec->spec;
821
e1f0d669
MR		 822 ucontrol->value.integer.value[0] = !!(spec->aloopback &
823 (spec->aloopback_mask << idx));
5f10c4a9
ML		 824 return 0;
825}
826
827static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
828 struct snd_ctl_elem_value *ucontrol)
829{
830 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
831 struct sigmatel_spec *spec = codec->spec;
e1f0d669 832 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 833 unsigned int dac_mode;
e1f0d669 834 unsigned int val, idx_val;
5f10c4a9 835
e1f0d669
MR		 836 idx_val = spec->aloopback_mask << idx;
837 if (ucontrol->value.integer.value[0])
838 val = spec->aloopback | idx_val;
839 else
840 val = spec->aloopback & ~idx_val;
68ea7b2f 841 if (spec->aloopback == val)
5f10c4a9
ML		 842 return 0;
843
68ea7b2f 844 spec->aloopback = val;
5f10c4a9 845
e1f0d669
MR		 846 /* Only return the bits defined by the shift value of the
847 * first two bytes of the mask
848 */
5f10c4a9 849 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 850 kcontrol->private_value & 0xFFFF, 0x0);
851 dac_mode >>= spec->aloopback_shift;
5f10c4a9 852
e1f0d669 853 if (spec->aloopback & idx_val) {
5f10c4a9 854 snd_hda_power_up(codec);
e1f0d669 855 dac_mode |= idx_val;
5f10c4a9
ML		 856 } else {
857 snd_hda_power_down(codec);
e1f0d669 858 dac_mode &= ~idx_val;
5f10c4a9
ML		 859 }
860
861 snd_hda_codec_write_cache(codec, codec->afg, 0,
862 kcontrol->private_value >> 16, dac_mode);
863
864 return 1;
865}
866
c7d4b2fa 867static struct hda_verb stac9200_core_init[] = {
2f2f4251 868 /* set dac0mux for dac converter */
c7d4b2fa 869 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 870 {}
871};
872
1194b5b7
TI		 873static struct hda_verb stac9200_eapd_init[] = {
874 /* set dac0mux for dac converter */
875 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
876 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
877 {}
878};
879
d654a660
MR		 880static struct hda_verb dell_eq_core_init[] = {
881 /* set master volume to max value without distortion
882 * and direct control */
883 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
e1f0d669
MR		 884 {}
885};
886
e2aec171 887static struct hda_verb stac92hd73xx_core_init[] = {
e1f0d669
MR		 888 /* set master volume and direct control */
889 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 890 {}
891};
892
d0513fc6 893static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 894 /* power state controls amps */
895 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 896 {}
d0513fc6
MR		 897};
898
e035b841 899static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 900 /* set master volume and direct control */
901 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 902 {}
541eee87
MR		 903};
904
ca8d33fc
MR		 905static struct hda_verb stac92hd71bxx_unmute_core_init[] = {
906 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
907 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 908 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
909 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 910 {}
911};
912
8e21c34c
TD		 913static struct hda_verb stac925x_core_init[] = {
914 /* set dac0mux for dac converter */
915 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 916 /* mute the master volume */
917 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 918 {}
919};
920
c7d4b2fa 921static struct hda_verb stac922x_core_init[] = {
2f2f4251 922 /* set master volume and direct control */
c7d4b2fa 923 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 924 {}
925};
926
93ed1503 927static struct hda_verb d965_core_init[] = {
19039bd0 928 /* set master volume and direct control */
93ed1503 929 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 930 /* unmute node 0x1b */
931 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
932 /* select node 0x03 as DAC */
933 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
934 {}
935};
936
ccca7cdc
TI		 937static struct hda_verb dell_3st_core_init[] = {
938 /* don't set delta bit */
939 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
940 /* unmute node 0x1b */
941 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
942 /* select node 0x03 as DAC */
943 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
944 {}
945};
946
3cc08dc6
MP		 947static struct hda_verb stac927x_core_init[] = {
948 /* set master volume and direct control */
949 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 950 /* enable analog pc beep path */
951 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 952 {}
953};
954
54930531
TI		 955static struct hda_verb stac927x_volknob_core_init[] = {
956 /* don't set delta bit */
957 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
958 /* enable analog pc beep path */
959 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
960 {}
961};
962
f3302a59
MP		 963static struct hda_verb stac9205_core_init[] = {
964 /* set master volume and direct control */
965 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 966 /* enable analog pc beep path */
967 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 968 {}
969};
970
b22b4821
MR		 971#define STAC_MONO_MUX \
972 { \
973 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
974 .name = "Mono Mux", \
975 .count = 1, \
976 .info = stac92xx_mono_mux_enum_info, \
977 .get = stac92xx_mono_mux_enum_get, \
978 .put = stac92xx_mono_mux_enum_put, \
979 }
980
e1f0d669 981#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 982 { \
983 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
984 .name = "Analog Loopback", \
e1f0d669 985 .count = cnt, \
5f10c4a9
ML		 986 .info = stac92xx_aloopback_info, \
987 .get = stac92xx_aloopback_get, \
988 .put = stac92xx_aloopback_put, \
989 .private_value = verb_read | (verb_write << 16), \
990 }
991
2fc99890
NL		 992#define DC_BIAS(xname, idx, nid) \
993 { \
994 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
995 .name = xname, \
996 .index = idx, \
997 .info = stac92xx_dc_bias_info, \
998 .get = stac92xx_dc_bias_get, \
999 .put = stac92xx_dc_bias_put, \
1000 .private_value = nid, \
1001 }
1002
c8b6bf9b 1003static struct snd_kcontrol_new stac9200_mixer[] = {
de8c85f7 1004 HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
2f2f4251 1005 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M		 1006 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1007 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 1008 { } /* end */
1009};
1010
d78d7a90
TI		 1011static struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
1012 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1013 {}
1014};
1015
1016static struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 1017 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI		 1018 {}
1019};
e1f0d669 1020
d78d7a90
TI		 1021static struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
1022 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1023 {}
1024};
1025
d0513fc6 1026
d78d7a90
TI		 1027static struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
1028 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
1029};
541eee87 1030
8e21c34c 1031static struct snd_kcontrol_new stac925x_mixer[] = {
de8c85f7 1032 HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xe, 0, HDA_OUTPUT),
c9280d68 1033 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
2f2f4251
M		 1034 { } /* end */
1035};
1036
d78d7a90
TI		 1037static struct snd_kcontrol_new stac9205_loopback[] = {
1038 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
1039 {}
1040};
1041
d78d7a90
TI		 1042static struct snd_kcontrol_new stac927x_loopback[] = {
1043 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
1044 {}
1045};
1046
1697055e
TI		 1047static struct snd_kcontrol_new stac_dmux_mixer = {
1048 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1049 .name = "Digital Input Source",
1050 /* count set later */
1051 .info = stac92xx_dmux_enum_info,
1052 .get = stac92xx_dmux_enum_get,
1053 .put = stac92xx_dmux_enum_put,
1054};
1055
d9737751
MR		 1056static struct snd_kcontrol_new stac_smux_mixer = {
1057 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1058 .name = "IEC958 Playback Source",
d9737751
MR		 1059 /* count set later */
1060 .info = stac92xx_smux_enum_info,
1061 .get = stac92xx_smux_enum_get,
1062 .put = stac92xx_smux_enum_put,
1063};
1064
ea734963 1065static const char * const slave_vols[] = {
2134ea4f
TI		 1066 "Front Playback Volume",
1067 "Surround Playback Volume",
1068 "Center Playback Volume",
1069 "LFE Playback Volume",
1070 "Side Playback Volume",
1071 "Headphone Playback Volume",
2134ea4f 1072 "Speaker Playback Volume",
2134ea4f
TI		 1073 NULL
1074};
1075
ea734963 1076static const char * const slave_sws[] = {
2134ea4f
TI		 1077 "Front Playback Switch",
1078 "Surround Playback Switch",
1079 "Center Playback Switch",
1080 "LFE Playback Switch",
1081 "Side Playback Switch",
1082 "Headphone Playback Switch",
2134ea4f 1083 "Speaker Playback Switch",
edb54a55 1084 "IEC958 Playback Switch",
2134ea4f
TI		 1085 NULL
1086};
1087
603c4019 1088static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1089static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1090
2f2f4251
M		 1091static int stac92xx_build_controls(struct hda_codec *codec)
1092{
1093 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1094 struct auto_pin_cfg *cfg = &spec->autocfg;
1095 hda_nid_t nid;
2f2f4251 1096 int err;
c7d4b2fa 1097 int i;
2f2f4251 1098
6479c631
TI		 1099 if (spec->mixer) {
1100 err = snd_hda_add_new_ctls(codec, spec->mixer);
1101 if (err < 0)
1102 return err;
1103 }
c7d4b2fa
M		 1104
1105 for (i = 0; i < spec->num_mixers; i++) {
1106 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1107 if (err < 0)
1108 return err;
1109 }
5207e10e
TI		 1110 if (!spec->auto_mic && spec->num_dmuxes > 0 &&
1111 snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
1697055e 1112 stac_dmux_mixer.count = spec->num_dmuxes;
3911a4c1 1113 err = snd_hda_ctl_add(codec, 0,
1697055e
TI		 1114 snd_ctl_new1(&stac_dmux_mixer, codec));
1115 if (err < 0)
1116 return err;
1117 }
d9737751 1118 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1119 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1120 struct hda_input_mux *smux = &spec->private_smux;
1121 /* check for mute support on SPDIF out */
1122 if (wcaps & AC_WCAP_OUT_AMP) {
10a20af7 1123 snd_hda_add_imux_item(smux, "Off", 0, NULL);
00ef50c2
MR		 1124 spec->spdif_mute = 1;
1125 }
d9737751 1126 stac_smux_mixer.count = spec->num_smuxes;
3911a4c1 1127 err = snd_hda_ctl_add(codec, 0,
d9737751
MR		 1128 snd_ctl_new1(&stac_smux_mixer, codec));
1129 if (err < 0)
1130 return err;
1131 }
c7d4b2fa 1132
dabbed6f
M		 1133 if (spec->multiout.dig_out_nid) {
1134 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1135 if (err < 0)
1136 return err;
9a08160b
TI		 1137 err = snd_hda_create_spdif_share_sw(codec,
1138 &spec->multiout);
1139 if (err < 0)
1140 return err;
1141 spec->multiout.share_spdif = 1;
dabbed6f 1142 }
da74ae3e 1143 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1144 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1145 if (err < 0)
1146 return err;
1147 }
2134ea4f
TI		 1148
1149 /* if we have no master control, let's create it */
1150 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1151 unsigned int vmaster_tlv[4];
2134ea4f 1152 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1153 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI		 1154 /* correct volume offset */
1155 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
de8c85f7 1156 /* minimum value is actually mute */
a74ccea5 1157 vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
2134ea4f 1158 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1159 vmaster_tlv, slave_vols);
2134ea4f
TI		 1160 if (err < 0)
1161 return err;
1162 }
1163 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1164 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1165 NULL, slave_sws);
1166 if (err < 0)
1167 return err;
1168 }
1169
d78d7a90
TI		 1170 if (spec->aloopback_ctl &&
1171 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1172 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1173 if (err < 0)
1174 return err;
1175 }
1176
603c4019 1177 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1178
1179 /* create jack input elements */
1180 if (spec->hp_detect) {
1181 for (i = 0; i < cfg->hp_outs; i++) {
1182 int type = SND_JACK_HEADPHONE;
1183 nid = cfg->hp_pins[i];
1184 /* jack detection */
1185 if (cfg->hp_outs == i)
1186 type |= SND_JACK_LINEOUT;
1187 err = stac92xx_add_jack(codec, nid, type);
1188 if (err < 0)
1189 return err;
1190 }
1191 }
1192 for (i = 0; i < cfg->line_outs; i++) {
1193 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1194 SND_JACK_LINEOUT);
1195 if (err < 0)
1196 return err;
1197 }
eea7dc93
TI		 1198 for (i = 0; i < cfg->num_inputs; i++) {
1199 nid = cfg->inputs[i].pin;
1200 err = stac92xx_add_jack(codec, nid, SND_JACK_MICROPHONE);
1201 if (err < 0)
1202 return err;
e4973e1e
TI		 1203 }
1204
dabbed6f 1205 return 0;
2f2f4251
M		 1206}
1207
403d1944 1208static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1209 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1210 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1211};
1212
58eec423
MCC		 1213static unsigned int gateway9200_m4_pin_configs[8] = {
1214 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1215 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1216};
1217static unsigned int gateway9200_m4_2_pin_configs[8] = {
1218 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1219 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1220};
1221
1222/*
dfe495d0
TI		 1223 STAC 9200 pin configs for
1224 102801A8
1225 102801DE
1226 102801E8
1227*/
1228static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1229 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1230 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1231};
1232
1233/*
1234 STAC 9200 pin configs for
1235 102801C0
1236 102801C1
1237*/
1238static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1239 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1240 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1241};
1242
1243/*
1244 STAC 9200 pin configs for
1245 102801C4 (Dell Dimension E310)
1246 102801C5
1247 102801C7
1248 102801D9
1249 102801DA
1250 102801E3
1251*/
1252static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1253 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1254 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1255};
1256
1257
1258/*
1259 STAC 9200-32 pin configs for
1260 102801B5 (Dell Inspiron 630m)
1261 102801D8 (Dell Inspiron 640m)
1262*/
1263static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1264 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1265 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1266};
1267
1268/*
1269 STAC 9200-32 pin configs for
1270 102801C2 (Dell Latitude D620)
1271 102801C8
1272 102801CC (Dell Latitude D820)
1273 102801D4
1274 102801D6
1275*/
1276static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1277 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1278 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1279};
1280
1281/*
1282 STAC 9200-32 pin configs for
1283 102801CE (Dell XPS M1710)
1284 102801CF (Dell Precision M90)
1285*/
1286static unsigned int dell9200_m23_pin_configs[8] = {
1287 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1288 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1289};
1290
1291/*
1292 STAC 9200-32 pin configs for
1293 102801C9
1294 102801CA
1295 102801CB (Dell Latitude 120L)
1296 102801D3
1297*/
1298static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1299 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1300 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1301};
1302
1303/*
1304 STAC 9200-32 pin configs for
1305 102801BD (Dell Inspiron E1505n)
1306 102801EE
1307 102801EF
1308*/
1309static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1310 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1311 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1312};
1313
1314/*
1315 STAC 9200-32 pin configs for
1316 102801F5 (Dell Inspiron 1501)
1317 102801F6
1318*/
1319static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1320 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1321 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1322};
1323
1324/*
1325 STAC 9200-32
1326 102801CD (Dell Inspiron E1705/9400)
1327*/
1328static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1329 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1330 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1331};
1332
bf277785
TD		 1333static unsigned int oqo9200_pin_configs[8] = {
1334 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1335 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1336};
1337
dfe495d0 1338
f5fcc13c
TI		 1339static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1340 [STAC_REF] = ref9200_pin_configs,
bf277785 1341 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1342 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1343 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1344 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1345 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1346 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1347 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1348 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1349 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1350 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1351 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1352 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1353 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1354 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1355};
1356
ea734963 1357static const char * const stac9200_models[STAC_9200_MODELS] = {
1607b8ea 1358 [STAC_AUTO] = "auto",
f5fcc13c 1359 [STAC_REF] = "ref",
bf277785 1360 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1361 [STAC_9200_DELL_D21] = "dell-d21",
1362 [STAC_9200_DELL_D22] = "dell-d22",
1363 [STAC_9200_DELL_D23] = "dell-d23",
1364 [STAC_9200_DELL_M21] = "dell-m21",
1365 [STAC_9200_DELL_M22] = "dell-m22",
1366 [STAC_9200_DELL_M23] = "dell-m23",
1367 [STAC_9200_DELL_M24] = "dell-m24",
1368 [STAC_9200_DELL_M25] = "dell-m25",
1369 [STAC_9200_DELL_M26] = "dell-m26",
1370 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1371 [STAC_9200_M4] = "gateway-m4",
1372 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1373 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1374};
1375
1376static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1377 /* SigmaTel reference board */
1378 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1379 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1380 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1381 "DFI LanParty", STAC_REF),
e7377071 1382 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1383 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1384 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1385 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1386 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1387 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1388 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1389 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1390 "unknown Dell", STAC_9200_DELL_D22),
1391 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1392 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1393 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1394 "Dell Latitude D620", STAC_9200_DELL_M22),
1395 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1396 "unknown Dell", STAC_9200_DELL_D23),
1397 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1398 "unknown Dell", STAC_9200_DELL_D23),
1399 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1400 "unknown Dell", STAC_9200_DELL_M22),
1401 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1402 "unknown Dell", STAC_9200_DELL_M24),
1403 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1404 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1405 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1406 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1407 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1408 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1409 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1410 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1411 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1412 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1413 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1414 "Dell Precision M90", STAC_9200_DELL_M23),
1415 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1416 "unknown Dell", STAC_9200_DELL_M22),
1417 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1418 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1419 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1420 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1421 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1422 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1423 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1424 "unknown Dell", STAC_9200_DELL_D23),
1425 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1426 "unknown Dell", STAC_9200_DELL_D23),
1427 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1428 "unknown Dell", STAC_9200_DELL_D21),
1429 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1430 "unknown Dell", STAC_9200_DELL_D23),
1431 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1432 "unknown Dell", STAC_9200_DELL_D21),
1433 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1434 "unknown Dell", STAC_9200_DELL_M25),
1435 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1436 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1437 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1438 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1439 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1440 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1441 /* Panasonic */
117f257d 1442 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1443 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1444 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1445 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1446 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1447 /* OQO Mobile */
1448 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1449 {} /* terminator */
1450};
1451
8e21c34c
TD		 1452static unsigned int ref925x_pin_configs[8] = {
1453 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1454 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1455};
1456
9cb36c2a
MCC		 1457static unsigned int stac925xM1_pin_configs[8] = {
1458 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1459 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1460};
1461
9cb36c2a
MCC		 1462static unsigned int stac925xM1_2_pin_configs[8] = {
1463 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1464 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1465};
58eec423 1466
9cb36c2a
MCC		 1467static unsigned int stac925xM2_pin_configs[8] = {
1468 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1469 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1470};
1471
8e21c34c 1472static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1473 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1474 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1475};
1476
9cb36c2a
MCC		 1477static unsigned int stac925xM3_pin_configs[8] = {
1478 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1479 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1480};
58eec423 1481
9cb36c2a
MCC		 1482static unsigned int stac925xM5_pin_configs[8] = {
1483 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1484 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1485};
1486
9cb36c2a
MCC		 1487static unsigned int stac925xM6_pin_configs[8] = {
1488 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1489 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1490};
1491
1492static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1493 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1494 [STAC_M1] = stac925xM1_pin_configs,
1495 [STAC_M1_2] = stac925xM1_2_pin_configs,
1496 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1497 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1498 [STAC_M3] = stac925xM3_pin_configs,
1499 [STAC_M5] = stac925xM5_pin_configs,
1500 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1501};
1502
ea734963 1503static const char * const stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1504 [STAC_925x_AUTO] = "auto",
8e21c34c 1505 [STAC_REF] = "ref",
9cb36c2a
MCC		 1506 [STAC_M1] = "m1",
1507 [STAC_M1_2] = "m1-2",
1508 [STAC_M2] = "m2",
8e21c34c 1509 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1510 [STAC_M3] = "m3",
1511 [STAC_M5] = "m5",
1512 [STAC_M6] = "m6",
8e21c34c
TD		 1513};
1514
9cb36c2a 1515static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1516 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1517 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1518 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1519 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1520 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1521 /* Not sure about the brand name for those */
1522 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1523 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1524 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1525 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1526 {} /* terminator */
8e21c34c
TD		 1527};
1528
1529static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1530 /* SigmaTel reference board */
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1533 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1534
1535 /* Default table for unknown ID */
1536 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1537
8e21c34c
TD		 1538 {} /* terminator */
1539};
1540
a7662640 1541static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1542 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1543 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1544 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1545 0x01452050,
1546};
1547
1548static unsigned int dell_m6_pin_configs[13] = {
1549 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1550 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1551 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1552 0x4f0000f0,
e1f0d669
MR		 1553};
1554
842ae638
TI		 1555static unsigned int alienware_m17x_pin_configs[13] = {
1556 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020,
1557 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0,
1558 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1559 0x904601b0,
1560};
1561
4d26f446 1562static unsigned int intel_dg45id_pin_configs[13] = {
52dc4386 1563 0x02214230, 0x02A19240, 0x01013214, 0x01014210,
4d26f446 1564 0x01A19250, 0x01011212, 0x01016211
52dc4386
AF		 1565};
1566
e1f0d669 1567static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1568 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1569 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1570 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1571 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1572 [STAC_DELL_EQ] = dell_m6_pin_configs,
842ae638 1573 [STAC_ALIENWARE_M17X] = alienware_m17x_pin_configs,
52dc4386 1574 [STAC_92HD73XX_INTEL] = intel_dg45id_pin_configs,
e1f0d669
MR		 1575};
1576
ea734963 1577static const char * const stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1578 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1579 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1580 [STAC_92HD73XX_REF] = "ref",
ae709440 1581 [STAC_92HD73XX_INTEL] = "intel",
661cd8fb
TI		 1582 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1583 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1584 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1585 [STAC_DELL_EQ] = "dell-eq",
842ae638 1586 [STAC_ALIENWARE_M17X] = "alienware",
e1f0d669
MR		 1587};
1588
1589static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1590 /* SigmaTel reference board */
1591 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1592 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1593 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1594 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF		 1595 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1596 "Intel DG45ID", STAC_92HD73XX_INTEL),
1597 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1598 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1599 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1600 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1601 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1602 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1603 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1604 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1605 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1606 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1607 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1608 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1609 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1610 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1611 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1612 "unknown Dell", STAC_DELL_M6_DMIC),
1613 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1614 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1615 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1616 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1617 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1618 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1619 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1620 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB		 1621 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1622 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf
DC		 1623 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1624 "Dell Studio XPS 1645", STAC_DELL_M6_BOTH),
5c1bccf6
DC		 1625 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1626 "Dell Studio 1558", STAC_DELL_M6_BOTH),
e1f0d669
MR		 1627 {} /* terminator */
1628};
1629
842ae638
TI		 1630static struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
1631 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1632 "Alienware M17x", STAC_ALIENWARE_M17X),
0defe09c
DC		 1633 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1634 "Alienware M17x", STAC_ALIENWARE_M17X),
842ae638
TI		 1635 {} /* terminator */
1636};
1637
8bb0ac55 1638static unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR		 1639 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1640 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR		 1641 0x01451160, 0x98560170,
1642};
1643
8bb0ac55 1644static unsigned int dell_s14_pin_configs[10] = {
69b5655a
TI		 1645 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110,
1646 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160,
8bb0ac55
MR		 1647 0x40f000f0, 0x40f000f0,
1648};
1649
48315590
SE		 1650static unsigned int hp_dv7_4000_pin_configs[10] = {
1651 0x03a12050, 0x0321201f, 0x40f000f0, 0x90170110,
1652 0x40f000f0, 0x40f000f0, 0x90170110, 0xd5a30140,
1653 0x40f000f0, 0x40f000f0,
1654};
1655
d0513fc6
MR		 1656static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1657 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1658 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1659 [STAC_DELL_S14] = dell_s14_pin_configs,
48315590 1660 [STAC_HP_DV7_4000] = hp_dv7_4000_pin_configs,
d0513fc6
MR		 1661};
1662
ea734963 1663static const char * const stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1664 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1665 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1666 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1667 [STAC_DELL_S14] = "dell-s14",
b4e81876 1668 [STAC_92HD83XXX_HP] = "hp",
48315590 1669 [STAC_HP_DV7_4000] = "hp-dv7-4000",
d0513fc6
MR		 1670};
1671
1672static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1673 /* SigmaTel reference board */
1674 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1675 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 1676 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1677 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 1678 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1679 "unknown Dell", STAC_DELL_S14),
b4e81876
TI		 1680 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x3600,
1681 "HP", STAC_92HD83XXX_HP),
574f3c4f 1682 {} /* terminator */
d0513fc6
MR		 1683};
1684
616f89e7 1685static unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1686 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1687 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK		 1688 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1689 0x00000000
e035b841
MR		 1690};
1691
616f89e7 1692static unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1693 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1694 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1695 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1696 0x00000000
a7662640
MR		 1697};
1698
616f89e7 1699static unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR		 1700 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1701 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK		 1702 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1703 0x00000000
a7662640
MR		 1704};
1705
616f89e7 1706static unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR		 1707 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1708 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1709 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1710 0x00000000
3a7abfd2
MR		 1711};
1712
e035b841
MR		 1713static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1714 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1715 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1716 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1717 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1718 [STAC_HP_M4] = NULL,
2a6ce6e5 1719 [STAC_HP_DV4] = NULL,
1b0652eb 1720 [STAC_HP_DV5] = NULL,
ae6241fb 1721 [STAC_HP_HDX] = NULL,
514bf54c 1722 [STAC_HP_DV4_1222NR] = NULL,
e035b841
MR		 1723};
1724
ea734963 1725static const char * const stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1726 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1727 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1728 [STAC_DELL_M4_1] = "dell-m4-1",
1729 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1730 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1731 [STAC_HP_M4] = "hp-m4",
2a6ce6e5 1732 [STAC_HP_DV4] = "hp-dv4",
1b0652eb 1733 [STAC_HP_DV5] = "hp-dv5",
ae6241fb 1734 [STAC_HP_HDX] = "hp-hdx",
514bf54c 1735 [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
e035b841
MR		 1736};
1737
1738static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1739 /* SigmaTel reference board */
1740 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1741 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 1742 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1743 "DFI LanParty", STAC_92HD71BXX_REF),
514bf54c
JG		 1744 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
1745 "HP dv4-1222nr", STAC_HP_DV4_1222NR),
5bdaaada
VK		 1746 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
1747 "HP", STAC_HP_DV5),
58d8395b
TI		 1748 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
1749 "HP", STAC_HP_DV5),
2ae466f8 1750 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 1751 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI		 1752 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
1753 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 1754 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
1755 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 1756 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 1757 "HP mini 1000", STAC_HP_M4),
ae6241fb 1758 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 1759 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 1760 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
1761 "HP dv6", STAC_HP_DV5),
e3d2530a
KG		 1762 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
1763 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY		 1764 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
1765 "HP DV6", STAC_HP_DV5),
1972d025
TI		 1766 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
1767 "HP", STAC_HP_DV5),
a7662640
MR		 1768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1769 "unknown Dell", STAC_DELL_M4_1),
1770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1771 "unknown Dell", STAC_DELL_M4_1),
1772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1773 "unknown Dell", STAC_DELL_M4_1),
1774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1775 "unknown Dell", STAC_DELL_M4_1),
1776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1777 "unknown Dell", STAC_DELL_M4_1),
1778 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1779 "unknown Dell", STAC_DELL_M4_1),
1780 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1781 "unknown Dell", STAC_DELL_M4_1),
1782 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1783 "unknown Dell", STAC_DELL_M4_2),
1784 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1785 "unknown Dell", STAC_DELL_M4_2),
1786 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1787 "unknown Dell", STAC_DELL_M4_2),
1788 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1789 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1790 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1791 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1792 {} /* terminator */
1793};
1794
403d1944
MP		 1795static unsigned int ref922x_pin_configs[10] = {
1796 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1797 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1798 0x40000100, 0x40000100,
1799};
1800
dfe495d0
TI		 1801/*
1802 STAC 922X pin configs for
1803 102801A7
1804 102801AB
1805 102801A9
1806 102801D1
1807 102801D2
1808*/
1809static unsigned int dell_922x_d81_pin_configs[10] = {
1810 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1811 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1812 0x01813122, 0x400001f2,
1813};
1814
1815/*
1816 STAC 922X pin configs for
1817 102801AC
1818 102801D0
1819*/
1820static unsigned int dell_922x_d82_pin_configs[10] = {
1821 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1822 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1823 0x01813122, 0x400001f1,
1824};
1825
1826/*
1827 STAC 922X pin configs for
1828 102801BF
1829*/
1830static unsigned int dell_922x_m81_pin_configs[10] = {
1831 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1832 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1833 0x40C003f1, 0x405003f0,
1834};
1835
1836/*
1837 STAC 9221 A1 pin configs for
1838 102801D7 (Dell XPS M1210)
1839*/
1840static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1841 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1842 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1843 0x508003f3, 0x405003f4,
1844};
1845
403d1944 1846static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1847 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1848 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1849 0x02a19120, 0x40000100,
1850};
1851
1852static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1853 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1854 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1855 0x02a19320, 0x40000100,
1856};
1857
5d5d3bc3
IZ		 1858static unsigned int intel_mac_v1_pin_configs[10] = {
1859 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1860 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1861 0x400000fc, 0x400000fb,
1862};
1863
1864static unsigned int intel_mac_v2_pin_configs[10] = {
1865 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1866 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1867 0x400000fc, 0x400000fb,
6f0778d8
NB		 1868};
1869
5d5d3bc3
IZ		 1870static unsigned int intel_mac_v3_pin_configs[10] = {
1871 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1872 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1873 0x400000fc, 0x400000fb,
1874};
1875
5d5d3bc3
IZ		 1876static unsigned int intel_mac_v4_pin_configs[10] = {
1877 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1878 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1879 0x400000fc, 0x400000fb,
1880};
1881
5d5d3bc3
IZ		 1882static unsigned int intel_mac_v5_pin_configs[10] = {
1883 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1884 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1885 0x400000fc, 0x400000fb,
0dae0f83
TI		 1886};
1887
8c650087
MCC		 1888static unsigned int ecs202_pin_configs[10] = {
1889 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1890 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1891 0x9037012e, 0x40e000f2,
1892};
76c08828 1893
19039bd0 1894static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1895 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1896 [STAC_D945GTP3] = d945gtp3_pin_configs,
1897 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1898 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1899 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1900 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1901 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1902 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1903 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1904 /* for backward compatibility */
5d5d3bc3
IZ		 1905 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1906 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1907 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1908 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1909 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1910 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1911 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1912 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1913 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1914 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1915 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1916};
1917
ea734963 1918static const char * const stac922x_models[STAC_922X_MODELS] = {
1607b8ea 1919 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI		 1920 [STAC_D945_REF] = "ref",
1921 [STAC_D945GTP5] = "5stack",
1922 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1923 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1924 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1925 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1926 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1927 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1928 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1929 /* for backward compatibility */
f5fcc13c 1930 [STAC_MACMINI] = "macmini",
3fc24d85 1931 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1932 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1933 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1934 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1935 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1936 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1937 [STAC_922X_DELL_D81] = "dell-d81",
1938 [STAC_922X_DELL_D82] = "dell-d82",
1939 [STAC_922X_DELL_M81] = "dell-m81",
1940 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1941};
1942
1943static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1944 /* SigmaTel reference board */
1945 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1946 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 1947 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1948 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 1949 /* Intel 945G based systems */
1950 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1951 "Intel D945G", STAC_D945GTP3),
1952 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1953 "Intel D945G", STAC_D945GTP3),
1954 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1955 "Intel D945G", STAC_D945GTP3),
1956 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1957 "Intel D945G", STAC_D945GTP3),
1958 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1959 "Intel D945G", STAC_D945GTP3),
1960 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1961 "Intel D945G", STAC_D945GTP3),
1962 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1963 "Intel D945G", STAC_D945GTP3),
1964 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1965 "Intel D945G", STAC_D945GTP3),
1966 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1967 "Intel D945G", STAC_D945GTP3),
1968 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1969 "Intel D945G", STAC_D945GTP3),
1970 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1971 "Intel D945G", STAC_D945GTP3),
1972 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1973 "Intel D945G", STAC_D945GTP3),
1974 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1975 "Intel D945G", STAC_D945GTP3),
1976 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1977 "Intel D945G", STAC_D945GTP3),
1978 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1979 "Intel D945G", STAC_D945GTP3),
1980 /* Intel D945G 5-stack systems */
1981 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1982 "Intel D945G", STAC_D945GTP5),
1983 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1984 "Intel D945G", STAC_D945GTP5),
1985 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1986 "Intel D945G", STAC_D945GTP5),
1987 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1988 "Intel D945G", STAC_D945GTP5),
1989 /* Intel 945P based systems */
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1991 "Intel D945P", STAC_D945GTP3),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1993 "Intel D945P", STAC_D945GTP3),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1995 "Intel D945P", STAC_D945GTP3),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1997 "Intel D945P", STAC_D945GTP3),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1999 "Intel D945P", STAC_D945GTP3),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2001 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 2002 /* other intel */
2003 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2004 "Intel D945", STAC_D945_REF),
f5fcc13c 2005 /* other systems */
536319af 2006 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2007 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2008 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2009 /* Dell systems */
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2011 "unknown Dell", STAC_922X_DELL_D81),
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2013 "unknown Dell", STAC_922X_DELL_D81),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2015 "unknown Dell", STAC_922X_DELL_D81),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2017 "unknown Dell", STAC_922X_DELL_D82),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2019 "unknown Dell", STAC_922X_DELL_M81),
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2021 "unknown Dell", STAC_922X_DELL_D82),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2023 "unknown Dell", STAC_922X_DELL_D81),
2024 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2025 "unknown Dell", STAC_922X_DELL_D81),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2027 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 2028 /* ECS/PC Chips boards */
dea0a509 2029 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 2030 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2031 {} /* terminator */
2032};
2033
3cc08dc6 2034static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2035 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2036 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2037 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2038 0x01c42190, 0x40000100,
3cc08dc6
MP		 2039};
2040
93ed1503 2041static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2042 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2043 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2044 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2045 0x40000100, 0x40000100
2046};
2047
93ed1503
TD		 2048static unsigned int d965_5st_pin_configs[14] = {
2049 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2050 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2051 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2052 0x40000100, 0x40000100
2053};
2054
679d92ed
TI		 2055static unsigned int d965_5st_no_fp_pin_configs[14] = {
2056 0x40000100, 0x40000100, 0x0181304e, 0x01014010,
2057 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2058 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2059 0x40000100, 0x40000100
2060};
2061
4ff076e5
TD		 2062static unsigned int dell_3st_pin_configs[14] = {
2063 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2064 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2065 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2066 0x40c003fc, 0x40000100
2067};
2068
93ed1503 2069static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2070 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2071 [STAC_D965_REF] = ref927x_pin_configs,
2072 [STAC_D965_3ST] = d965_3st_pin_configs,
2073 [STAC_D965_5ST] = d965_5st_pin_configs,
679d92ed 2074 [STAC_D965_5ST_NO_FP] = d965_5st_no_fp_pin_configs,
8e9068b1
MR		 2075 [STAC_DELL_3ST] = dell_3st_pin_configs,
2076 [STAC_DELL_BIOS] = NULL,
54930531 2077 [STAC_927X_VOLKNOB] = NULL,
3cc08dc6
MP		 2078};
2079
ea734963 2080static const char * const stac927x_models[STAC_927X_MODELS] = {
1607b8ea 2081 [STAC_927X_AUTO] = "auto",
e28d8322 2082 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2083 [STAC_D965_REF] = "ref",
2084 [STAC_D965_3ST] = "3stack",
2085 [STAC_D965_5ST] = "5stack",
679d92ed 2086 [STAC_D965_5ST_NO_FP] = "5stack-no-fp",
8e9068b1
MR		 2087 [STAC_DELL_3ST] = "dell-3stack",
2088 [STAC_DELL_BIOS] = "dell-bios",
54930531 2089 [STAC_927X_VOLKNOB] = "volknob",
f5fcc13c
TI		 2090};
2091
2092static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2093 /* SigmaTel reference board */
2094 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2095 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 2096 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2097 "DFI LanParty", STAC_D965_REF),
81d3dbde 2098 /* Intel 946 based systems */
f5fcc13c
TI		 2099 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2100 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2101 /* 965 based 3 stack systems */
dea0a509
TI		 2102 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2103 "Intel D965", STAC_D965_3ST),
2104 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2105 "Intel D965", STAC_D965_3ST),
4ff076e5 2106 /* Dell 3 stack systems */
dfe495d0 2107 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2108 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2109 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2110 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 2111 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 2112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 2113 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2114 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
84d3dc20 2115 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 2116 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2117 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2119 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2120 /* 965 based 5 stack systems */
dea0a509
TI		 2121 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2122 "Intel D965", STAC_D965_5ST),
2123 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2124 "Intel D965", STAC_D965_5ST),
54930531
TI		 2125 /* volume-knob fixes */
2126 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP		 2127 {} /* terminator */
2128};
2129
f3302a59
MP		 2130static unsigned int ref9205_pin_configs[12] = {
2131 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2132 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2133 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2134};
2135
dfe495d0
TI		 2136/*
2137 STAC 9205 pin configs for
2138 102801F1
2139 102801F2
2140 102801FC
2141 102801FD
2142 10280204
2143 1028021F
3fa2ef74 2144 10280228 (Dell Vostro 1500)
95e70e87 2145 10280229 (Dell Vostro 1700)
dfe495d0
TI		 2146*/
2147static unsigned int dell_9205_m42_pin_configs[12] = {
2148 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2149 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2150 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2151};
2152
2153/*
2154 STAC 9205 pin configs for
2155 102801F9
2156 102801FA
2157 102801FE
2158 102801FF (Dell Precision M4300)
2159 10280206
2160 10280200
2161 10280201
2162*/
2163static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2164 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2165 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2166 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2167};
2168
dfe495d0 2169static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2170 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2171 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2172 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2173};
2174
f5fcc13c 2175static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2176 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2177 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2178 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2179 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2180 [STAC_9205_EAPD] = NULL,
f3302a59
MP		 2181};
2182
ea734963 2183static const char * const stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2184 [STAC_9205_AUTO] = "auto",
f5fcc13c 2185 [STAC_9205_REF] = "ref",
dfe495d0 2186 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2187 [STAC_9205_DELL_M43] = "dell-m43",
2188 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2189 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI		 2190};
2191
2192static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2193 /* SigmaTel reference board */
2194 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2195 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 2196 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
2197 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 2198 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2199 "DFI LanParty", STAC_9205_REF),
d9a4268e 2200 /* Dell */
dfe495d0
TI		 2201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2202 "unknown Dell", STAC_9205_DELL_M42),
2203 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2204 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2205 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2206 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2207 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2208 "Dell Precision", STAC_9205_DELL_M43),
2209 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2210 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2211 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2212 "unknown Dell", STAC_9205_DELL_M42),
2213 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2214 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2215 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2216 "Dell Precision", STAC_9205_DELL_M43),
2217 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2218 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2219 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2220 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2221 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2222 "Dell Precision", STAC_9205_DELL_M43),
2223 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2224 "Dell Precision", STAC_9205_DELL_M43),
2225 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2226 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2227 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2228 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2229 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2230 "Dell Vostro 1500", STAC_9205_DELL_M42),
95e70e87
AA		 2231 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
2232 "Dell Vostro 1700", STAC_9205_DELL_M42),
d9a4268e 2233 /* Gateway */
42b95f0c 2234 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
d9a4268e 2235 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP		 2236 {} /* terminator */
2237};
2238
330ee995
TI		 2239static void stac92xx_set_config_regs(struct hda_codec *codec,
2240 unsigned int *pincfgs)
11b44bbd
RF		 2241{
2242 int i;
2243 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2244
330ee995
TI		 2245 if (!pincfgs)
2246 return;
11b44bbd 2247
87d48363 2248 for (i = 0; i < spec->num_pins; i++)
330ee995
TI		 2249 if (spec->pin_nids[i] && pincfgs[i])
2250 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2251 pincfgs[i]);
af9f341a
TI		 2252}
2253
dabbed6f 2254/*
c7d4b2fa 2255 * Analog playback callbacks
dabbed6f 2256 */
c7d4b2fa
M		 2257static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2258 struct hda_codec *codec,
c8b6bf9b 2259 struct snd_pcm_substream *substream)
2f2f4251 2260{
dabbed6f 2261 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2262 if (spec->stream_delay)
2263 msleep(spec->stream_delay);
9a08160b
TI		 2264 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2265 hinfo);
2f2f4251
M		 2266}
2267
2f2f4251
M		 2268static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2269 struct hda_codec *codec,
2270 unsigned int stream_tag,
2271 unsigned int format,
c8b6bf9b 2272 struct snd_pcm_substream *substream)
2f2f4251
M		 2273{
2274 struct sigmatel_spec *spec = codec->spec;
403d1944 2275 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2276}
2277
2278static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2279 struct hda_codec *codec,
c8b6bf9b 2280 struct snd_pcm_substream *substream)
2f2f4251
M		 2281{
2282 struct sigmatel_spec *spec = codec->spec;
2283 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2284}
2285
dabbed6f
M		 2286/*
2287 * Digital playback callbacks
2288 */
2289static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2290 struct hda_codec *codec,
c8b6bf9b 2291 struct snd_pcm_substream *substream)
dabbed6f
M		 2292{
2293 struct sigmatel_spec *spec = codec->spec;
2294 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2295}
2296
2297static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2298 struct hda_codec *codec,
c8b6bf9b 2299 struct snd_pcm_substream *substream)
dabbed6f
M		 2300{
2301 struct sigmatel_spec *spec = codec->spec;
2302 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2303}
2304
6b97eb45
TI		 2305static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2306 struct hda_codec *codec,
2307 unsigned int stream_tag,
2308 unsigned int format,
2309 struct snd_pcm_substream *substream)
2310{
2311 struct sigmatel_spec *spec = codec->spec;
2312 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2313 stream_tag, format, substream);
2314}
2315
9411e21c
TI		 2316static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2317 struct hda_codec *codec,
2318 struct snd_pcm_substream *substream)
2319{
2320 struct sigmatel_spec *spec = codec->spec;
2321 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2322}
2323
dabbed6f 2324
2f2f4251
M		 2325/*
2326 * Analog capture callbacks
2327 */
2328static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2329 struct hda_codec *codec,
2330 unsigned int stream_tag,
2331 unsigned int format,
c8b6bf9b 2332 struct snd_pcm_substream *substream)
2f2f4251
M		 2333{
2334 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2335 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2336
8daaaa97
MR		 2337 if (spec->powerdown_adcs) {
2338 msleep(40);
8c2f767b 2339 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2340 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2341 }
2342 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2343 return 0;
2344}
2345
2346static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2347 struct hda_codec *codec,
c8b6bf9b 2348 struct snd_pcm_substream *substream)
2f2f4251
M		 2349{
2350 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2351 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2352
8daaaa97
MR		 2353 snd_hda_codec_cleanup_stream(codec, nid);
2354 if (spec->powerdown_adcs)
8c2f767b 2355 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2356 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2357 return 0;
2358}
2359
dabbed6f
M		 2360static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2361 .substreams = 1,
2362 .channels_min = 2,
2363 .channels_max = 2,
2364 /* NID is set in stac92xx_build_pcms */
2365 .ops = {
2366 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2367 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI		 2368 .prepare = stac92xx_dig_playback_pcm_prepare,
2369 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M		 2370 },
2371};
2372
2373static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2374 .substreams = 1,
2375 .channels_min = 2,
2376 .channels_max = 2,
2377 /* NID is set in stac92xx_build_pcms */
2378};
2379
2f2f4251
M		 2380static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2381 .substreams = 1,
2382 .channels_min = 2,
c7d4b2fa 2383 .channels_max = 8,
2f2f4251
M		 2384 .nid = 0x02, /* NID to query formats and rates */
2385 .ops = {
2386 .open = stac92xx_playback_pcm_open,
2387 .prepare = stac92xx_playback_pcm_prepare,
2388 .cleanup = stac92xx_playback_pcm_cleanup
2389 },
2390};
2391
3cc08dc6
MP		 2392static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2393 .substreams = 1,
2394 .channels_min = 2,
2395 .channels_max = 2,
2396 .nid = 0x06, /* NID to query formats and rates */
2397 .ops = {
2398 .open = stac92xx_playback_pcm_open,
2399 .prepare = stac92xx_playback_pcm_prepare,
2400 .cleanup = stac92xx_playback_pcm_cleanup
2401 },
2402};
2403
2f2f4251 2404static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2405 .channels_min = 2,
2406 .channels_max = 2,
9e05b7a3 2407 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2408 .ops = {
2409 .prepare = stac92xx_capture_pcm_prepare,
2410 .cleanup = stac92xx_capture_pcm_cleanup
2411 },
2412};
2413
2414static int stac92xx_build_pcms(struct hda_codec *codec)
2415{
2416 struct sigmatel_spec *spec = codec->spec;
2417 struct hda_pcm *info = spec->pcm_rec;
2418
2419 codec->num_pcms = 1;
2420 codec->pcm_info = info;
2421
c7d4b2fa 2422 info->name = "STAC92xx Analog";
2f2f4251 2423 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI		 2424 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2425 spec->multiout.dac_nids[0];
2f2f4251 2426 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2427 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2428 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2429
2430 if (spec->alt_switch) {
2431 codec->num_pcms++;
2432 info++;
2433 info->name = "STAC92xx Analog Alt";
2434 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2435 }
2f2f4251 2436
dabbed6f
M		 2437 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2438 codec->num_pcms++;
2439 info++;
2440 info->name = "STAC92xx Digital";
0852d7a6 2441 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M		 2442 if (spec->multiout.dig_out_nid) {
2443 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2444 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2445 }
2446 if (spec->dig_in_nid) {
2447 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2448 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2449 }
2450 }
2451
2f2f4251
M		 2452 return 0;
2453}
2454
7c922de7
NL		 2455static unsigned int stac92xx_get_default_vref(struct hda_codec *codec,
2456 hda_nid_t nid)
c960a03b 2457{
1327a32b 2458 unsigned int pincap = snd_hda_query_pin_caps(codec, nid);
c960a03b
TI		 2459 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2460 if (pincap & AC_PINCAP_VREF_100)
2461 return AC_PINCTL_VREF_100;
2462 if (pincap & AC_PINCAP_VREF_80)
2463 return AC_PINCTL_VREF_80;
2464 if (pincap & AC_PINCAP_VREF_50)
2465 return AC_PINCTL_VREF_50;
2466 if (pincap & AC_PINCAP_VREF_GRD)
2467 return AC_PINCTL_VREF_GRD;
2468 return 0;
2469}
2470
403d1944
MP		 2471static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2472
2473{
82beb8fd
TI		 2474 snd_hda_codec_write_cache(codec, nid, 0,
2475 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2476}
2477
7c2ba97b
MR		 2478#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2479
2480static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2481 struct snd_ctl_elem_value *ucontrol)
2482{
2483 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2484 struct sigmatel_spec *spec = codec->spec;
2485
d7a89436 2486 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2487 return 0;
2488}
2489
62558ce1 2490static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid);
c6e4c666 2491
7c2ba97b
MR		 2492static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2493 struct snd_ctl_elem_value *ucontrol)
2494{
2495 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2496 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2497 int nid = kcontrol->private_value;
2498
2499 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2500
2501 /* check to be sure that the ports are upto date with
2502 * switch changes
2503 */
62558ce1 2504 stac_issue_unsol_event(codec, nid);
7c2ba97b
MR		 2505
2506 return 1;
2507}
2508
7c922de7
NL		 2509static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol,
2510 struct snd_ctl_elem_info *uinfo)
2511{
2512 int i;
2513 static char *texts[] = {
2514 "Mic In", "Line In", "Line Out"
2515 };
2516
2517 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2518 struct sigmatel_spec *spec = codec->spec;
2519 hda_nid_t nid = kcontrol->private_value;
2520
2521 if (nid == spec->mic_switch || nid == spec->line_switch)
2522 i = 3;
2523 else
2524 i = 2;
2525
2526 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2527 uinfo->value.enumerated.items = i;
2528 uinfo->count = 1;
2529 if (uinfo->value.enumerated.item >= i)
2530 uinfo->value.enumerated.item = i-1;
2531 strcpy(uinfo->value.enumerated.name,
2532 texts[uinfo->value.enumerated.item]);
2533
2534 return 0;
2535}
2536
2537static int stac92xx_dc_bias_get(struct snd_kcontrol *kcontrol,
2538 struct snd_ctl_elem_value *ucontrol)
2539{
2540 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2541 hda_nid_t nid = kcontrol->private_value;
2542 unsigned int vref = stac92xx_vref_get(codec, nid);
2543
2544 if (vref == stac92xx_get_default_vref(codec, nid))
2545 ucontrol->value.enumerated.item[0] = 0;
2546 else if (vref == AC_PINCTL_VREF_GRD)
2547 ucontrol->value.enumerated.item[0] = 1;
2548 else if (vref == AC_PINCTL_VREF_HIZ)
2549 ucontrol->value.enumerated.item[0] = 2;
2550
2551 return 0;
2552}
2553
2554static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol,
2555 struct snd_ctl_elem_value *ucontrol)
2556{
2557 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2558 unsigned int new_vref = 0;
b8621516 2559 int error;
7c922de7
NL		 2560 hda_nid_t nid = kcontrol->private_value;
2561
2562 if (ucontrol->value.enumerated.item[0] == 0)
2563 new_vref = stac92xx_get_default_vref(codec, nid);
2564 else if (ucontrol->value.enumerated.item[0] == 1)
2565 new_vref = AC_PINCTL_VREF_GRD;
2566 else if (ucontrol->value.enumerated.item[0] == 2)
2567 new_vref = AC_PINCTL_VREF_HIZ;
2568 else
2569 return 0;
2570
2571 if (new_vref != stac92xx_vref_get(codec, nid)) {
2572 error = stac92xx_vref_set(codec, nid, new_vref);
2573 return error;
2574 }
2575
2576 return 0;
2577}
2578
2579static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol,
2580 struct snd_ctl_elem_info *uinfo)
2581{
2582 static char *texts[2];
2583 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2584 struct sigmatel_spec *spec = codec->spec;
2585
2586 if (kcontrol->private_value == spec->line_switch)
2587 texts[0] = "Line In";
2588 else
2589 texts[0] = "Mic In";
2590 texts[1] = "Line Out";
2591 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2592 uinfo->value.enumerated.items = 2;
2593 uinfo->count = 1;
2594
2595 if (uinfo->value.enumerated.item >= 2)
2596 uinfo->value.enumerated.item = 1;
2597 strcpy(uinfo->value.enumerated.name,
2598 texts[uinfo->value.enumerated.item]);
2599
2600 return 0;
2601}
403d1944
MP		 2602
2603static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2604{
2605 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2606 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2607 hda_nid_t nid = kcontrol->private_value;
2608 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
403d1944 2609
7c922de7 2610 ucontrol->value.enumerated.item[0] = spec->io_switch[io_idx];
403d1944
MP		 2611 return 0;
2612}
2613
2614static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2615{
2616 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2617 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2618 hda_nid_t nid = kcontrol->private_value;
2619 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
2620 unsigned short val = !!ucontrol->value.enumerated.item[0];
403d1944
MP		 2621
2622 spec->io_switch[io_idx] = val;
2623
2624 if (val)
2625 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2626 else {
2627 unsigned int pinctl = AC_PINCTL_IN_EN;
2628 if (io_idx) /* set VREF for mic */
7c922de7 2629 pinctl |= stac92xx_get_default_vref(codec, nid);
c960a03b
TI		 2630 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2631 }
40c1d308
JZ		 2632
2633 /* check the auto-mute again: we need to mute/unmute the speaker
2634 * appropriately according to the pin direction
2635 */
2636 if (spec->hp_detect)
62558ce1 2637 stac_issue_unsol_event(codec, nid);
40c1d308 2638
403d1944
MP		 2639 return 1;
2640}
2641
0fb87bb4
ML		 2642#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2643
2644static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2645 struct snd_ctl_elem_value *ucontrol)
2646{
2647 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2648 struct sigmatel_spec *spec = codec->spec;
2649
2650 ucontrol->value.integer.value[0] = spec->clfe_swap;
2651 return 0;
2652}
2653
2654static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2655 struct snd_ctl_elem_value *ucontrol)
2656{
2657 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2658 struct sigmatel_spec *spec = codec->spec;
2659 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2660 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2661
68ea7b2f 2662 if (spec->clfe_swap == val)
0fb87bb4
ML		 2663 return 0;
2664
68ea7b2f 2665 spec->clfe_swap = val;
0fb87bb4
ML		 2666
2667 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2668 spec->clfe_swap ? 0x4 : 0x0);
2669
2670 return 1;
2671}
2672
7c2ba97b
MR		 2673#define STAC_CODEC_HP_SWITCH(xname) \
2674 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2675 .name = xname, \
2676 .index = 0, \
2677 .info = stac92xx_hp_switch_info, \
2678 .get = stac92xx_hp_switch_get, \
2679 .put = stac92xx_hp_switch_put, \
2680 }
2681
403d1944
MP		 2682#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2683 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2684 .name = xname, \
2685 .index = 0, \
2686 .info = stac92xx_io_switch_info, \
2687 .get = stac92xx_io_switch_get, \
2688 .put = stac92xx_io_switch_put, \
2689 .private_value = xpval, \
2690 }
2691
0fb87bb4
ML		 2692#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2693 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2694 .name = xname, \
2695 .index = 0, \
2696 .info = stac92xx_clfe_switch_info, \
2697 .get = stac92xx_clfe_switch_get, \
2698 .put = stac92xx_clfe_switch_put, \
2699 .private_value = xpval, \
2700 }
403d1944 2701
c7d4b2fa
M		 2702enum {
2703 STAC_CTL_WIDGET_VOL,
2704 STAC_CTL_WIDGET_MUTE,
123c07ae 2705 STAC_CTL_WIDGET_MUTE_BEEP,
09a99959 2706 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2707 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2708 STAC_CTL_WIDGET_IO_SWITCH,
2fc99890
NL		 2709 STAC_CTL_WIDGET_CLFE_SWITCH,
2710 STAC_CTL_WIDGET_DC_BIAS
c7d4b2fa
M		 2711};
2712
c8b6bf9b 2713static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2714 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2715 HDA_CODEC_MUTE(NULL, 0, 0, 0),
123c07ae 2716 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0),
09a99959 2717 STAC_MONO_MUX,
7c2ba97b 2718 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2719 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2720 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2fc99890 2721 DC_BIAS(NULL, 0, 0),
c7d4b2fa
M		 2722};
2723
2724/* add dynamic controls */
e3c75964
TI		 2725static struct snd_kcontrol_new *
2726stac_control_new(struct sigmatel_spec *spec,
2727 struct snd_kcontrol_new *ktemp,
4d02d1b6 2728 const char *name,
5e26dfd0 2729 unsigned int subdev)
c7d4b2fa 2730{
c8b6bf9b 2731 struct snd_kcontrol_new *knew;
c7d4b2fa 2732
603c4019
TI		 2733 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2734 knew = snd_array_new(&spec->kctls);
2735 if (!knew)
e3c75964 2736 return NULL;
4d4e9bb3 2737 *knew = *ktemp;
82fe0c58 2738 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI		 2739 if (!knew->name) {
2740 /* roolback */
2741 memset(knew, 0, sizeof(*knew));
2742 spec->kctls.alloced--;
2743 return NULL;
2744 }
5e26dfd0 2745 knew->subdevice = subdev;
e3c75964
TI		 2746 return knew;
2747}
2748
2749static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2750 struct snd_kcontrol_new *ktemp,
2751 int idx, const char *name,
2752 unsigned long val)
2753{
4d02d1b6 2754 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name,
5e26dfd0 2755 HDA_SUBDEV_AMP_FLAG);
e3c75964 2756 if (!knew)
c7d4b2fa 2757 return -ENOMEM;
e3c75964 2758 knew->index = idx;
c7d4b2fa 2759 knew->private_value = val;
c7d4b2fa
M		 2760 return 0;
2761}
2762
4d4e9bb3
TI		 2763static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2764 int type, int idx, const char *name,
2765 unsigned long val)
2766{
2767 return stac92xx_add_control_temp(spec,
2768 &stac92xx_control_templates[type],
2769 idx, name, val);
2770}
2771
4682eee0
MR		 2772
2773/* add dynamic controls */
4d4e9bb3
TI		 2774static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2775 const char *name, unsigned long val)
4682eee0
MR		 2776{
2777 return stac92xx_add_control_idx(spec, type, 0, name, val);
2778}
2779
e3c75964
TI		 2780static struct snd_kcontrol_new stac_input_src_temp = {
2781 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2782 .name = "Input Source",
2783 .info = stac92xx_mux_enum_info,
2784 .get = stac92xx_mux_enum_get,
2785 .put = stac92xx_mux_enum_put,
2786};
2787
7c922de7
NL		 2788static inline int stac92xx_add_jack_mode_control(struct hda_codec *codec,
2789 hda_nid_t nid, int idx)
2790{
2791 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
2792 int control = 0;
2793 struct sigmatel_spec *spec = codec->spec;
2794 char name[22];
2795
99ae28be 2796 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
7c922de7
NL		 2797 if (stac92xx_get_default_vref(codec, nid) == AC_PINCTL_VREF_GRD
2798 && nid == spec->line_switch)
2799 control = STAC_CTL_WIDGET_IO_SWITCH;
2800 else if (snd_hda_query_pin_caps(codec, nid)
2801 & (AC_PINCAP_VREF_GRD << AC_PINCAP_VREF_SHIFT))
2802 control = STAC_CTL_WIDGET_DC_BIAS;
2803 else if (nid == spec->mic_switch)
2804 control = STAC_CTL_WIDGET_IO_SWITCH;
2805 }
2806
2807 if (control) {
10a20af7 2808 strcpy(name, hda_get_input_pin_label(codec, nid, 1));
7c922de7
NL		 2809 return stac92xx_add_control(codec->spec, control,
2810 strcat(name, " Jack Mode"), nid);
2811 }
2812
2813 return 0;
2814}
2815
e3c75964
TI		 2816static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2817{
2818 struct snd_kcontrol_new *knew;
2819 struct hda_input_mux *imux = &spec->private_imux;
2820
3d21d3f7
TI		 2821 if (spec->auto_mic)
2822 return 0; /* no need for input source */
e3c75964
TI		 2823 if (!spec->num_adcs || imux->num_items <= 1)
2824 return 0; /* no need for input source control */
2825 knew = stac_control_new(spec, &stac_input_src_temp,
4d02d1b6 2826 stac_input_src_temp.name, 0);
e3c75964
TI		 2827 if (!knew)
2828 return -ENOMEM;
2829 knew->count = spec->num_adcs;
2830 return 0;
2831}
2832
c21ca4a8
TI		 2833/* check whether the line-input can be used as line-out */
2834static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2835{
2836 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2837 struct auto_pin_cfg *cfg = &spec->autocfg;
2838 hda_nid_t nid;
2839 unsigned int pincap;
eea7dc93 2840 int i;
8e9068b1 2841
c21ca4a8
TI		 2842 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2843 return 0;
eea7dc93 2844 for (i = 0; i < cfg->num_inputs; i++) {
86e2959a 2845 if (cfg->inputs[i].type == AUTO_PIN_LINE_IN) {
eea7dc93
TI		 2846 nid = cfg->inputs[i].pin;
2847 pincap = snd_hda_query_pin_caps(codec, nid);
2848 if (pincap & AC_PINCAP_OUT)
2849 return nid;
2850 }
2851 }
c21ca4a8
TI		 2852 return 0;
2853}
403d1944 2854
eea7dc93
TI		 2855static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid);
2856
c21ca4a8 2857/* check whether the mic-input can be used as line-out */
eea7dc93 2858static hda_nid_t check_mic_out_switch(struct hda_codec *codec, hda_nid_t *dac)
c21ca4a8
TI		 2859{
2860 struct sigmatel_spec *spec = codec->spec;
2861 struct auto_pin_cfg *cfg = &spec->autocfg;
2862 unsigned int def_conf, pincap;
86e2959a 2863 int i;
c21ca4a8 2864
eea7dc93 2865 *dac = 0;
c21ca4a8
TI		 2866 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2867 return 0;
eea7dc93
TI		 2868 for (i = 0; i < cfg->num_inputs; i++) {
2869 hda_nid_t nid = cfg->inputs[i].pin;
86e2959a 2870 if (cfg->inputs[i].type != AUTO_PIN_MIC)
eea7dc93 2871 continue;
330ee995 2872 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI		 2873 /* some laptops have an internal analog microphone
2874 * which can't be used as a output */
99ae28be 2875 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
1327a32b 2876 pincap = snd_hda_query_pin_caps(codec, nid);
eea7dc93
TI		 2877 if (pincap & AC_PINCAP_OUT) {
2878 *dac = get_unassigned_dac(codec, nid);
2879 if (*dac)
2880 return nid;
2881 }
403d1944 2882 }
403d1944 2883 }
403d1944
MP		 2884 return 0;
2885}
2886
7b043899
SL		 2887static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2888{
2889 int i;
2890
2891 for (i = 0; i < spec->multiout.num_dacs; i++) {
2892 if (spec->multiout.dac_nids[i] == nid)
2893 return 1;
2894 }
2895
2896 return 0;
2897}
2898
c21ca4a8
TI		 2899static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2900{
2901 int i;
2902 if (is_in_dac_nids(spec, nid))
2903 return 1;
2904 for (i = 0; i < spec->autocfg.hp_outs; i++)
2905 if (spec->hp_dacs[i] == nid)
2906 return 1;
2907 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2908 if (spec->speaker_dacs[i] == nid)
2909 return 1;
2910 return 0;
2911}
2912
2913static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2914{
2915 struct sigmatel_spec *spec = codec->spec;
2916 int j, conn_len;
2917 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2918 unsigned int wcaps, wtype;
2919
2920 conn_len = snd_hda_get_connections(codec, nid, conn,
2921 HDA_MAX_CONNECTIONS);
36706005
CC		 2922 /* 92HD88: trace back up the link of nids to find the DAC */
2923 while (conn_len == 1 && (get_wcaps_type(get_wcaps(codec, conn[0]))
2924 != AC_WID_AUD_OUT)) {
2925 nid = conn[0];
2926 conn_len = snd_hda_get_connections(codec, nid, conn,
2927 HDA_MAX_CONNECTIONS);
2928 }
c21ca4a8 2929 for (j = 0; j < conn_len; j++) {
14bafe32 2930 wcaps = get_wcaps(codec, conn[j]);
a22d543a 2931 wtype = get_wcaps_type(wcaps);
c21ca4a8
TI		 2932 /* we check only analog outputs */
2933 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2934 continue;
2935 /* if this route has a free DAC, assign it */
2936 if (!check_all_dac_nids(spec, conn[j])) {
2937 if (conn_len > 1) {
2938 /* select this DAC in the pin's input mux */
2939 snd_hda_codec_write_cache(codec, nid, 0,
2940 AC_VERB_SET_CONNECT_SEL, j);
2941 }
2942 return conn[j];
2943 }
2944 }
ee58a7ca
TI		 2945 /* if all DACs are already assigned, connect to the primary DAC */
2946 if (conn_len > 1) {
2947 for (j = 0; j < conn_len; j++) {
2948 if (conn[j] == spec->multiout.dac_nids[0]) {
2949 snd_hda_codec_write_cache(codec, nid, 0,
2950 AC_VERB_SET_CONNECT_SEL, j);
2951 break;
2952 }
2953 }
2954 }
c21ca4a8
TI		 2955 return 0;
2956}
2957
2958static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2959static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2960
3cc08dc6 2961/*
7b043899
SL		 2962 * Fill in the dac_nids table from the parsed pin configuration
2963 * This function only works when every pin in line_out_pins[]
2964 * contains atleast one DAC in its connection list. Some 92xx
2965 * codecs are not connected directly to a DAC, such as the 9200
2966 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2967 */
c21ca4a8 2968static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 2969{
2970 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2971 struct auto_pin_cfg *cfg = &spec->autocfg;
2972 int i;
2973 hda_nid_t nid, dac;
7b043899 2974
c7d4b2fa
M		 2975 for (i = 0; i < cfg->line_outs; i++) {
2976 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 2977 dac = get_unassigned_dac(codec, nid);
2978 if (!dac) {
df802952
TI		 2979 if (spec->multiout.num_dacs > 0) {
2980 /* we have already working output pins,
2981 * so let's drop the broken ones again
2982 */
2983 cfg->line_outs = spec->multiout.num_dacs;
2984 break;
2985 }
7b043899
SL		 2986 /* error out, no available DAC found */
2987 snd_printk(KERN_ERR
2988 "%s: No available DAC for pin 0x%x\n",
2989 __func__, nid);
2990 return -ENODEV;
2991 }
c21ca4a8
TI		 2992 add_spec_dacs(spec, dac);
2993 }
7b043899 2994
139e071b
TI		 2995 for (i = 0; i < cfg->hp_outs; i++) {
2996 nid = cfg->hp_pins[i];
2997 dac = get_unassigned_dac(codec, nid);
2998 if (dac) {
2999 if (!spec->multiout.hp_nid)
3000 spec->multiout.hp_nid = dac;
3001 else
3002 add_spec_extra_dacs(spec, dac);
3003 }
3004 spec->hp_dacs[i] = dac;
3005 }
3006
3007 for (i = 0; i < cfg->speaker_outs; i++) {
3008 nid = cfg->speaker_pins[i];
3009 dac = get_unassigned_dac(codec, nid);
3010 if (dac)
3011 add_spec_extra_dacs(spec, dac);
3012 spec->speaker_dacs[i] = dac;
3013 }
3014
c21ca4a8
TI		 3015 /* add line-in as output */
3016 nid = check_line_out_switch(codec);
3017 if (nid) {
3018 dac = get_unassigned_dac(codec, nid);
3019 if (dac) {
3020 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
3021 nid, cfg->line_outs);
3022 cfg->line_out_pins[cfg->line_outs] = nid;
3023 cfg->line_outs++;
3024 spec->line_switch = nid;
3025 add_spec_dacs(spec, dac);
3026 }
3027 }
3028 /* add mic as output */
eea7dc93
TI		 3029 nid = check_mic_out_switch(codec, &dac);
3030 if (nid && dac) {
3031 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
3032 nid, cfg->line_outs);
3033 cfg->line_out_pins[cfg->line_outs] = nid;
3034 cfg->line_outs++;
3035 spec->mic_switch = nid;
3036 add_spec_dacs(spec, dac);
c21ca4a8 3037 }
c7d4b2fa 3038
c21ca4a8 3039 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 3040 spec->multiout.num_dacs,
3041 spec->multiout.dac_nids[0],
3042 spec->multiout.dac_nids[1],
3043 spec->multiout.dac_nids[2],
3044 spec->multiout.dac_nids[3],
3045 spec->multiout.dac_nids[4]);
c21ca4a8 3046
c7d4b2fa
M		 3047 return 0;
3048}
3049
eb06ed8f 3050/* create volume control/switch for the given prefx type */
668b9652
TI		 3051static int create_controls_idx(struct hda_codec *codec, const char *pfx,
3052 int idx, hda_nid_t nid, int chs)
eb06ed8f 3053{
7c7767eb 3054 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI		 3055 char name[32];
3056 int err;
3057
7c7767eb
TI		 3058 if (!spec->check_volume_offset) {
3059 unsigned int caps, step, nums, db_scale;
3060 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3061 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3062 AC_AMPCAP_STEP_SIZE_SHIFT;
3063 step = (step + 1) * 25; /* in .01dB unit */
3064 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3065 AC_AMPCAP_NUM_STEPS_SHIFT;
3066 db_scale = nums * step;
3067 /* if dB scale is over -64dB, and finer enough,
3068 * let's reduce it to half
3069 */
3070 if (db_scale > 6400 && nums >= 0x1f)
3071 spec->volume_offset = nums / 2;
3072 spec->check_volume_offset = 1;
3073 }
3074
eb06ed8f 3075 sprintf(name, "%s Playback Volume", pfx);
668b9652 3076 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI		 3077 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3078 spec->volume_offset));
eb06ed8f
TI		 3079 if (err < 0)
3080 return err;
3081 sprintf(name, "%s Playback Switch", pfx);
668b9652 3082 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI		 3083 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3084 if (err < 0)
3085 return err;
3086 return 0;
3087}
3088
668b9652
TI		 3089#define create_controls(codec, pfx, nid, chs) \
3090 create_controls_idx(codec, pfx, 0, nid, chs)
3091
ae0afd81
MR		 3092static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3093{
c21ca4a8 3094 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3095 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3096 return 1;
3097 } else {
3098 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3099 spec->multiout.num_dacs++;
3100 }
3101 return 0;
3102}
3103
c21ca4a8 3104static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3105{
c21ca4a8
TI		 3106 int i;
3107 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3108 if (!spec->multiout.extra_out_nid[i]) {
3109 spec->multiout.extra_out_nid[i] = nid;
3110 return 0;
3111 }
3112 }
3113 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3114 return 1;
ae0afd81
MR		 3115}
3116
dc04d1b4
TI		 3117/* Create output controls
3118 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3119 */
3120static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3121 const hda_nid_t *pins,
3122 const hda_nid_t *dac_nids,
3123 int type)
c7d4b2fa 3124{
76624534 3125 struct sigmatel_spec *spec = codec->spec;
ea734963 3126 static const char * const chname[4] = {
19039bd0
TI		 3127 "Front", "Surround", NULL /*CLFE*/, "Side"
3128 };
dc04d1b4 3129 hda_nid_t nid;
91589232
TI		 3130 int i, err;
3131 unsigned int wid_caps;
0fb87bb4 3132
dc04d1b4 3133 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
ffd0e56c
TI		 3134 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
3135 wid_caps = get_wcaps(codec, pins[i]);
3136 if (wid_caps & AC_WCAP_UNSOL_CAP)
3137 spec->hp_detect = 1;
3138 }
dc04d1b4
TI		 3139 nid = dac_nids[i];
3140 if (!nid)
3141 continue;
3142 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3143 /* Center/LFE */
7c7767eb 3144 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3145 if (err < 0)
c7d4b2fa 3146 return err;
7c7767eb 3147 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3148 if (err < 0)
c7d4b2fa 3149 return err;
0fb87bb4
ML		 3150
3151 wid_caps = get_wcaps(codec, nid);
3152
3153 if (wid_caps & AC_WCAP_LR_SWAP) {
3154 err = stac92xx_add_control(spec,
3155 STAC_CTL_WIDGET_CLFE_SWITCH,
3156 "Swap Center/LFE Playback Switch", nid);
3157
3158 if (err < 0)
3159 return err;
3160 }
3161
c7d4b2fa 3162 } else {
dc04d1b4 3163 const char *name;
668b9652 3164 int idx;
dc04d1b4
TI		 3165 switch (type) {
3166 case AUTO_PIN_HP_OUT:
668b9652
TI		 3167 name = "Headphone";
3168 idx = i;
dc04d1b4
TI		 3169 break;
3170 case AUTO_PIN_SPEAKER_OUT:
668b9652
TI		 3171 name = "Speaker";
3172 idx = i;
dc04d1b4
TI		 3173 break;
3174 default:
3175 name = chname[i];
668b9652 3176 idx = 0;
dc04d1b4 3177 break;
76624534 3178 }
668b9652 3179 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3180 if (err < 0)
c7d4b2fa
M		 3181 return err;
3182 }
3183 }
dc04d1b4
TI		 3184 return 0;
3185}
3186
6479c631
TI		 3187static int stac92xx_add_capvol_ctls(struct hda_codec *codec, unsigned long vol,
3188 unsigned long sw, int idx)
3189{
3190 int err;
3191 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx,
bf677bd8 3192 "Capture Volume", vol);
6479c631
TI		 3193 if (err < 0)
3194 return err;
3195 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_MUTE, idx,
bf677bd8 3196 "Capture Switch", sw);
6479c631
TI		 3197 if (err < 0)
3198 return err;
3199 return 0;
3200}
3201
dc04d1b4
TI		 3202/* add playback controls from the parsed DAC table */
3203static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3204 const struct auto_pin_cfg *cfg)
3205{
3206 struct sigmatel_spec *spec = codec->spec;
7c922de7 3207 hda_nid_t nid;
dc04d1b4 3208 int err;
7c922de7 3209 int idx;
dc04d1b4
TI		 3210
3211 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3212 spec->multiout.dac_nids,
3213 cfg->line_out_type);
3214 if (err < 0)
3215 return err;
c7d4b2fa 3216
a9cb5c90 3217 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3218 err = stac92xx_add_control(spec,
3219 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3220 "Headphone as Line Out Switch",
3221 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3222 if (err < 0)
3223 return err;
3224 }
3225
eea7dc93 3226 for (idx = 0; idx < cfg->num_inputs; idx++) {
86e2959a 3227 if (cfg->inputs[idx].type > AUTO_PIN_LINE_IN)
eea7dc93
TI		 3228 break;
3229 nid = cfg->inputs[idx].pin;
3230 err = stac92xx_add_jack_mode_control(codec, nid, idx);
3231 if (err < 0)
3232 return err;
b5895dc8 3233 }
403d1944 3234
c7d4b2fa
M		 3235 return 0;
3236}
3237
eb06ed8f
TI		 3238/* add playback controls for Speaker and HP outputs */
3239static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3240 struct auto_pin_cfg *cfg)
3241{
3242 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI		 3243 int err;
3244
3245 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3246 spec->hp_dacs, AUTO_PIN_HP_OUT);
3247 if (err < 0)
3248 return err;
3249
3250 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3251 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3252 if (err < 0)
3253 return err;
eb06ed8f 3254
c7d4b2fa
M		 3255 return 0;
3256}
3257
b22b4821 3258/* labels for mono mux outputs */
ea734963 3259static const char * const stac92xx_mono_labels[4] = {
d0513fc6 3260 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3261};
3262
3263/* create mono mux for mono out on capable codecs */
3264static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3265{
3266 struct sigmatel_spec *spec = codec->spec;
3267 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3268 int i, num_cons;
3269 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3270
3271 num_cons = snd_hda_get_connections(codec,
3272 spec->mono_nid,
3273 con_lst,
3274 HDA_MAX_NUM_INPUTS);
16a433d8 3275 if (num_cons <= 0 || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
b22b4821
MR		 3276 return -EINVAL;
3277
10a20af7
TI		 3278 for (i = 0; i < num_cons; i++)
3279 snd_hda_add_imux_item(mono_mux, stac92xx_mono_labels[i], i,
3280 NULL);
09a99959
MR		 3281
3282 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3283 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3284}
3285
1cd2224c
MR		 3286/* create PC beep volume controls */
3287static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3288 hda_nid_t nid)
3289{
3290 struct sigmatel_spec *spec = codec->spec;
3291 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
123c07ae
JK		 3292 int err, type = STAC_CTL_WIDGET_MUTE_BEEP;
3293
3294 if (spec->anabeep_nid == nid)
3295 type = STAC_CTL_WIDGET_MUTE;
1cd2224c
MR		 3296
3297 /* check for mute support for the the amp */
3298 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
123c07ae 3299 err = stac92xx_add_control(spec, type,
d355c82a 3300 "Beep Playback Switch",
1cd2224c
MR		 3301 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3302 if (err < 0)
3303 return err;
3304 }
3305
3306 /* check to see if there is volume support for the amp */
3307 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3308 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
d355c82a 3309 "Beep Playback Volume",
1cd2224c
MR		 3310 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3311 if (err < 0)
3312 return err;
3313 }
3314 return 0;
3315}
3316
4d4e9bb3
TI		 3317#ifdef CONFIG_SND_HDA_INPUT_BEEP
3318#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3319
3320static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3321 struct snd_ctl_elem_value *ucontrol)
3322{
3323 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3324 ucontrol->value.integer.value[0] = codec->beep->enabled;
3325 return 0;
3326}
3327
3328static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3329 struct snd_ctl_elem_value *ucontrol)
3330{
3331 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
123c07ae 3332 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
4d4e9bb3
TI		 3333}
3334
3335static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3336 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3337 .info = stac92xx_dig_beep_switch_info,
3338 .get = stac92xx_dig_beep_switch_get,
3339 .put = stac92xx_dig_beep_switch_put,
3340};
3341
3342static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3343{
3344 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
d355c82a 3345 0, "Beep Playback Switch", 0);
4d4e9bb3
TI		 3346}
3347#endif
3348
4682eee0
MR		 3349static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3350{
3351 struct sigmatel_spec *spec = codec->spec;
667067d8 3352 int i, j, err = 0;
4682eee0
MR		 3353
3354 for (i = 0; i < spec->num_muxes; i++) {
667067d8
TI		 3355 hda_nid_t nid;
3356 unsigned int wcaps;
3357 unsigned long val;
3358
4682eee0
MR		 3359 nid = spec->mux_nids[i];
3360 wcaps = get_wcaps(codec, nid);
667067d8
TI		 3361 if (!(wcaps & AC_WCAP_OUT_AMP))
3362 continue;
4682eee0 3363
667067d8
TI		 3364 /* check whether already the same control was created as
3365 * normal Capture Volume.
3366 */
3367 val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
3368 for (j = 0; j < spec->num_caps; j++) {
3369 if (spec->capvols[j] == val)
3370 break;
4682eee0 3371 }
667067d8
TI		 3372 if (j < spec->num_caps)
3373 continue;
3374
3375 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, i,
3376 "Mux Capture Volume", val);
3377 if (err < 0)
3378 return err;
4682eee0
MR		 3379 }
3380 return 0;
3381};
3382
ea734963 3383static const char * const stac92xx_spdif_labels[3] = {
65973632 3384 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3385};
3386
3387static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3388{
3389 struct sigmatel_spec *spec = codec->spec;
3390 struct hda_input_mux *spdif_mux = &spec->private_smux;
ea734963 3391 const char * const *labels = spec->spdif_labels;
d9737751 3392 int i, num_cons;
65973632 3393 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3394
3395 num_cons = snd_hda_get_connections(codec,
3396 spec->smux_nids[0],
3397 con_lst,
3398 HDA_MAX_NUM_INPUTS);
16a433d8 3399 if (num_cons <= 0)
d9737751
MR		 3400 return -EINVAL;
3401
65973632
MR		 3402 if (!labels)
3403 labels = stac92xx_spdif_labels;
3404
10a20af7
TI		 3405 for (i = 0; i < num_cons; i++)
3406 snd_hda_add_imux_item(spdif_mux, labels[i], i, NULL);
d9737751
MR		 3407
3408 return 0;
3409}
3410
8b65727b 3411/* labels for dmic mux inputs */
ea734963 3412static const char * const stac92xx_dmic_labels[5] = {
8b65727b
MP		 3413 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3414 "Digital Mic 3", "Digital Mic 4"
3415};
3416
3d21d3f7
TI		 3417static int get_connection_index(struct hda_codec *codec, hda_nid_t mux,
3418 hda_nid_t nid)
3419{
3420 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3421 int i, nums;
3422
3423 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3424 for (i = 0; i < nums; i++)
3425 if (conn[i] == nid)
3426 return i;
3427 return -1;
3428}
3429
667067d8 3430/* create a volume assigned to the given pin (only if supported) */
96f845de 3431/* return 1 if the volume control is created */
667067d8 3432static int create_elem_capture_vol(struct hda_codec *codec, hda_nid_t nid,
eea7dc93 3433 const char *label, int idx, int direction)
667067d8
TI		 3434{
3435 unsigned int caps, nums;
3436 char name[32];
96f845de 3437 int err;
667067d8 3438
96f845de
TI		 3439 if (direction == HDA_OUTPUT)
3440 caps = AC_WCAP_OUT_AMP;
3441 else
3442 caps = AC_WCAP_IN_AMP;
3443 if (!(get_wcaps(codec, nid) & caps))
667067d8 3444 return 0;
96f845de 3445 caps = query_amp_caps(codec, nid, direction);
667067d8
TI		 3446 nums = (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT;
3447 if (!nums)
3448 return 0;
3449 snprintf(name, sizeof(name), "%s Capture Volume", label);
eea7dc93
TI		 3450 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx, name,
3451 HDA_COMPOSE_AMP_VAL(nid, 3, 0, direction));
96f845de
TI		 3452 if (err < 0)
3453 return err;
3454 return 1;
667067d8
TI		 3455}
3456
8b65727b
MP		 3457/* create playback/capture controls for input pins on dmic capable codecs */
3458static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3459 const struct auto_pin_cfg *cfg)
3460{
3461 struct sigmatel_spec *spec = codec->spec;
5207e10e 3462 struct hda_input_mux *imux = &spec->private_imux;
8b65727b 3463 struct hda_input_mux *dimux = &spec->private_dimux;
263d0328 3464 int err, i;
5207e10e 3465 unsigned int def_conf;
8b65727b 3466
10a20af7 3467 snd_hda_add_imux_item(dimux, stac92xx_dmic_labels[0], 0, NULL);
5207e10e 3468
8b65727b 3469 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3470 hda_nid_t nid;
10a20af7 3471 int index, type_idx;
5207e10e 3472 const char *label;
8b65727b 3473
667067d8
TI		 3474 nid = spec->dmic_nids[i];
3475 if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
3476 continue;
3477 def_conf = snd_hda_codec_get_pincfg(codec, nid);
8b65727b
MP		 3478 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3479 continue;
3480
3d21d3f7
TI		 3481 index = get_connection_index(codec, spec->dmux_nids[0], nid);
3482 if (index < 0)
3483 continue;
3484
10a20af7
TI		 3485 label = hda_get_input_pin_label(codec, nid, 1);
3486 snd_hda_add_imux_item(dimux, label, index, &type_idx);
2d7ec12b
TI		 3487 if (snd_hda_get_bool_hint(codec, "separate_dmux") != 1)
3488 snd_hda_add_imux_item(imux, label, index, &type_idx);
5207e10e 3489
10a20af7
TI		 3490 err = create_elem_capture_vol(codec, nid, label, type_idx,
3491 HDA_INPUT);
667067d8
TI		 3492 if (err < 0)
3493 return err;
96f845de
TI		 3494 if (!err) {
3495 err = create_elem_capture_vol(codec, nid, label,
10a20af7 3496 type_idx, HDA_OUTPUT);
96f845de
TI		 3497 if (err < 0)
3498 return err;
3499 }
8b65727b
MP		 3500 }
3501
3502 return 0;
3503}
3504
3d21d3f7 3505static int check_mic_pin(struct hda_codec *codec, hda_nid_t nid,
9907790a 3506 hda_nid_t *fixed, hda_nid_t *ext, hda_nid_t *dock)
3d21d3f7
TI		 3507{
3508 unsigned int cfg;
3509
3510 if (!nid)
3511 return 0;
3512 cfg = snd_hda_codec_get_pincfg(codec, nid);
99ae28be
TI		 3513 switch (snd_hda_get_input_pin_attr(cfg)) {
3514 case INPUT_PIN_ATTR_INT:
3d21d3f7
TI		 3515 if (*fixed)
3516 return 1; /* already occupied */
3517 *fixed = nid;
3518 break;
99ae28be
TI		 3519 case INPUT_PIN_ATTR_UNUSED:
3520 break;
3521 case INPUT_PIN_ATTR_DOCK:
3522 if (*dock)
3523 return 1; /* already occupied */
3524 *dock = nid;
3525 break;
3526 default:
3d21d3f7
TI		 3527 if (*ext)
3528 return 1; /* already occupied */
3529 *ext = nid;
3530 break;
3531 }
3532 return 0;
3533}
3534
3535static int set_mic_route(struct hda_codec *codec,
3536 struct sigmatel_mic_route *mic,
3537 hda_nid_t pin)
3538{
3539 struct sigmatel_spec *spec = codec->spec;
3540 struct auto_pin_cfg *cfg = &spec->autocfg;
3541 int i;
3542
3543 mic->pin = pin;
9907790a
CC		 3544 if (pin == 0)
3545 return 0;
eea7dc93
TI		 3546 for (i = 0; i < cfg->num_inputs; i++) {
3547 if (pin == cfg->inputs[i].pin)
3d21d3f7 3548 break;
eea7dc93 3549 }
86e2959a 3550 if (i < cfg->num_inputs && cfg->inputs[i].type == AUTO_PIN_MIC) {
3d21d3f7 3551 /* analog pin */
3d21d3f7
TI		 3552 i = get_connection_index(codec, spec->mux_nids[0], pin);
3553 if (i < 0)
3554 return -1;
3555 mic->mux_idx = i;
02d33322
TI		 3556 mic->dmux_idx = -1;
3557 if (spec->dmux_nids)
3558 mic->dmux_idx = get_connection_index(codec,
3559 spec->dmux_nids[0],
3560 spec->mux_nids[0]);
da2a2aaa 3561 } else if (spec->dmux_nids) {
3d21d3f7 3562 /* digital pin */
3d21d3f7
TI		 3563 i = get_connection_index(codec, spec->dmux_nids[0], pin);
3564 if (i < 0)
3565 return -1;
3566 mic->dmux_idx = i;
02d33322
TI		 3567 mic->mux_idx = -1;
3568 if (spec->mux_nids)
3569 mic->mux_idx = get_connection_index(codec,
3570 spec->mux_nids[0],
3571 spec->dmux_nids[0]);
3d21d3f7
TI		 3572 }
3573 return 0;
3574}
3575
3576/* return non-zero if the device is for automatic mic switch */
3577static int stac_check_auto_mic(struct hda_codec *codec)
3578{
3579 struct sigmatel_spec *spec = codec->spec;
3580 struct auto_pin_cfg *cfg = &spec->autocfg;
9907790a 3581 hda_nid_t fixed, ext, dock;
3d21d3f7
TI		 3582 int i;
3583
eea7dc93 3584 for (i = 0; i < cfg->num_inputs; i++) {
86e2959a 3585 if (cfg->inputs[i].type >= AUTO_PIN_LINE_IN)
3d21d3f7
TI		 3586 return 0; /* must be exclusively mics */
3587 }
9907790a 3588 fixed = ext = dock = 0;
eea7dc93 3589 for (i = 0; i < cfg->num_inputs; i++)
9907790a
CC		 3590 if (check_mic_pin(codec, cfg->inputs[i].pin,
3591 &fixed, &ext, &dock))
3d21d3f7
TI		 3592 return 0;
3593 for (i = 0; i < spec->num_dmics; i++)
9907790a
CC		 3594 if (check_mic_pin(codec, spec->dmic_nids[i],
3595 &fixed, &ext, &dock))
3d21d3f7 3596 return 0;
80c67852 3597 if (!fixed || (!ext && !dock))
9907790a 3598 return 0; /* no input to switch */
3d21d3f7
TI		 3599 if (!(get_wcaps(codec, ext) & AC_WCAP_UNSOL_CAP))
3600 return 0; /* no unsol support */
3601 if (set_mic_route(codec, &spec->ext_mic, ext) ||
9907790a
CC		 3602 set_mic_route(codec, &spec->int_mic, fixed) ||
3603 set_mic_route(codec, &spec->dock_mic, dock))
3d21d3f7
TI		 3604 return 0; /* something is wrong */
3605 return 1;
3606}
3607
c7d4b2fa
M		 3608/* create playback/capture controls for input pins */
3609static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3610{
3611 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 3612 struct hda_input_mux *imux = &spec->private_imux;
667067d8 3613 int i, j;
263d0328 3614 const char *label;
c7d4b2fa 3615
eea7dc93
TI		 3616 for (i = 0; i < cfg->num_inputs; i++) {
3617 hda_nid_t nid = cfg->inputs[i].pin;
10a20af7 3618 int index, err, type_idx;
314634bc 3619
314634bc
TI		 3620 index = -1;
3621 for (j = 0; j < spec->num_muxes; j++) {
667067d8
TI		 3622 index = get_connection_index(codec, spec->mux_nids[j],
3623 nid);
3624 if (index >= 0)
3625 break;
c7d4b2fa 3626 }
667067d8
TI		 3627 if (index < 0)
3628 continue;
3629
10a20af7
TI		 3630 label = hda_get_autocfg_input_label(codec, cfg, i);
3631 snd_hda_add_imux_item(imux, label, index, &type_idx);
263d0328 3632
667067d8 3633 err = create_elem_capture_vol(codec, nid,
263d0328 3634 label, type_idx,
96f845de 3635 HDA_INPUT);
667067d8
TI		 3636 if (err < 0)
3637 return err;
c7d4b2fa 3638 }
5207e10e 3639 spec->num_analog_muxes = imux->num_items;
c7d4b2fa 3640
7b043899 3641 if (imux->num_items) {
62fe78e9
SR		 3642 /*
3643 * Set the current input for the muxes.
3644 * The STAC9221 has two input muxes with identical source
3645 * NID lists. Hopefully this won't get confused.
3646 */
3647 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3648 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3649 AC_VERB_SET_CONNECT_SEL,
3650 imux->items[0].index);
62fe78e9
SR		 3651 }
3652 }
3653
c7d4b2fa
M		 3654 return 0;
3655}
3656
c7d4b2fa
M		 3657static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3658{
3659 struct sigmatel_spec *spec = codec->spec;
3660 int i;
3661
3662 for (i = 0; i < spec->autocfg.line_outs; i++) {
3663 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3664 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3665 }
3666}
3667
3668static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3669{
3670 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3671 int i;
c7d4b2fa 3672
eb06ed8f
TI		 3673 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3674 hda_nid_t pin;
3675 pin = spec->autocfg.hp_pins[i];
3676 if (pin) /* connect to front */
3677 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3678 }
3679 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3680 hda_nid_t pin;
3681 pin = spec->autocfg.speaker_pins[i];
3682 if (pin) /* connect to front */
3683 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3684 }
c7d4b2fa
M		 3685}
3686
8af3aeb4
TI		 3687static int is_dual_headphones(struct hda_codec *codec)
3688{
3689 struct sigmatel_spec *spec = codec->spec;
3690 int i, valid_hps;
3691
3692 if (spec->autocfg.line_out_type != AUTO_PIN_SPEAKER_OUT ||
3693 spec->autocfg.hp_outs <= 1)
3694 return 0;
3695 valid_hps = 0;
3696 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3697 hda_nid_t nid = spec->autocfg.hp_pins[i];
3698 unsigned int cfg = snd_hda_codec_get_pincfg(codec, nid);
3699 if (get_defcfg_location(cfg) & AC_JACK_LOC_SEPARATE)
3700 continue;
3701 valid_hps++;
3702 }
3703 return (valid_hps > 1);
3704}
3705
3706
3cc08dc6 3707static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3708{
3709 struct sigmatel_spec *spec = codec->spec;
dc04d1b4 3710 int hp_swap = 0;
6479c631 3711 int i, err;
c7d4b2fa 3712
8b65727b
MP		 3713 if ((err = snd_hda_parse_pin_def_config(codec,
3714 &spec->autocfg,
3715 spec->dmic_nids)) < 0)
c7d4b2fa 3716 return err;
82bc955f 3717 if (! spec->autocfg.line_outs)
869264c4 3718 return 0; /* can't find valid pin config */
19039bd0 3719
bcecd9bd
JZ		 3720 /* If we have no real line-out pin and multiple hp-outs, HPs should
3721 * be set up as multi-channel outputs.
3722 */
8af3aeb4 3723 if (is_dual_headphones(codec)) {
bcecd9bd
JZ		 3724 /* Copy hp_outs to line_outs, backup line_outs in
3725 * speaker_outs so that the following routines can handle
3726 * HP pins as primary outputs.
3727 */
c21ca4a8 3728 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3729 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3730 sizeof(spec->autocfg.line_out_pins));
3731 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3732 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3733 sizeof(spec->autocfg.hp_pins));
3734 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3735 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3736 spec->autocfg.hp_outs = 0;
dc04d1b4 3737 hp_swap = 1;
bcecd9bd 3738 }
09a99959 3739 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3740 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3741 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3742 u32 caps = query_amp_caps(codec,
3743 spec->autocfg.mono_out_pin, dir);
3744 hda_nid_t conn_list[1];
3745
3746 /* get the mixer node and then the mono mux if it exists */
3747 if (snd_hda_get_connections(codec,
3748 spec->autocfg.mono_out_pin, conn_list, 1) &&
3749 snd_hda_get_connections(codec, conn_list[0],
16a433d8 3750 conn_list, 1) > 0) {
09a99959
MR		 3751
3752 int wcaps = get_wcaps(codec, conn_list[0]);
a22d543a 3753 int wid_type = get_wcaps_type(wcaps);
09a99959
MR		 3754 /* LR swap check, some stac925x have a mux that
3755 * changes the DACs output path instead of the
3756 * mono-mux path.
3757 */
3758 if (wid_type == AC_WID_AUD_SEL &&
3759 !(wcaps & AC_WCAP_LR_SWAP))
3760 spec->mono_nid = conn_list[0];
3761 }
d0513fc6
MR		 3762 if (dir) {
3763 hda_nid_t nid = spec->autocfg.mono_out_pin;
3764
3765 /* most mono outs have a least a mute/unmute switch */
3766 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3767 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3768 "Mono Playback Switch",
3769 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3770 if (err < 0)
3771 return err;
d0513fc6
MR		 3772 /* check for volume support for the amp */
3773 if ((caps & AC_AMPCAP_NUM_STEPS)
3774 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3775 err = stac92xx_add_control(spec,
3776 STAC_CTL_WIDGET_VOL,
3777 "Mono Playback Volume",
3778 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3779 if (err < 0)
3780 return err;
3781 }
09a99959
MR		 3782 }
3783
3784 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3785 AC_PINCTL_OUT_EN);
3786 }
bcecd9bd 3787
c21ca4a8
TI		 3788 if (!spec->multiout.num_dacs) {
3789 err = stac92xx_auto_fill_dac_nids(codec);
3790 if (err < 0)
19039bd0 3791 return err;
c9280d68
TI		 3792 err = stac92xx_auto_create_multi_out_ctls(codec,
3793 &spec->autocfg);
3794 if (err < 0)
3795 return err;
c21ca4a8 3796 }
c7d4b2fa 3797
1cd2224c
MR		 3798 /* setup analog beep controls */
3799 if (spec->anabeep_nid > 0) {
3800 err = stac92xx_auto_create_beep_ctls(codec,
3801 spec->anabeep_nid);
3802 if (err < 0)
3803 return err;
3804 }
3805
3806 /* setup digital beep controls and input device */
3807#ifdef CONFIG_SND_HDA_INPUT_BEEP
3808 if (spec->digbeep_nid > 0) {
3809 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3810 unsigned int caps;
1cd2224c
MR		 3811
3812 err = stac92xx_auto_create_beep_ctls(codec, nid);
3813 if (err < 0)
3814 return err;
3815 err = snd_hda_attach_beep_device(codec, nid);
3816 if (err < 0)
3817 return err;
d8d881dd
TI		 3818 if (codec->beep) {
3819 /* IDT/STAC codecs have linear beep tone parameter */
1b0e372d 3820 codec->beep->linear_tone = spec->linear_tone_beep;
d8d881dd
TI		 3821 /* if no beep switch is available, make its own one */
3822 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3823 if (!(caps & AC_AMPCAP_MUTE)) {
3824 err = stac92xx_beep_switch_ctl(codec);
3825 if (err < 0)
3826 return err;
3827 }
4d4e9bb3 3828 }
1cd2224c
MR		 3829 }
3830#endif
3831
0fb87bb4 3832 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML		 3833 if (err < 0)
3834 return err;
3835
dc04d1b4
TI		 3836 /* All output parsing done, now restore the swapped hp pins */
3837 if (hp_swap) {
3838 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3839 sizeof(spec->autocfg.hp_pins));
3840 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3841 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3842 spec->autocfg.line_outs = 0;
3843 }
0fb87bb4 3844
3d21d3f7
TI		 3845 if (stac_check_auto_mic(codec)) {
3846 spec->auto_mic = 1;
3847 /* only one capture for auto-mic */
3848 spec->num_adcs = 1;
3849 spec->num_caps = 1;
3850 spec->num_muxes = 1;
3851 }
3852
6479c631
TI		 3853 for (i = 0; i < spec->num_caps; i++) {
3854 err = stac92xx_add_capvol_ctls(codec, spec->capvols[i],
3855 spec->capsws[i], i);
3856 if (err < 0)
3857 return err;
3858 }
3859
dc04d1b4 3860 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 3861 if (err < 0)
c7d4b2fa
M		 3862 return err;
3863
b22b4821
MR		 3864 if (spec->mono_nid > 0) {
3865 err = stac92xx_auto_create_mono_output_ctls(codec);
3866 if (err < 0)
3867 return err;
3868 }
2a9c7816 3869 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3870 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3871 &spec->autocfg)) < 0)
3872 return err;
4682eee0
MR		 3873 if (spec->num_muxes > 0) {
3874 err = stac92xx_auto_create_mux_input_ctls(codec);
3875 if (err < 0)
3876 return err;
3877 }
d9737751
MR		 3878 if (spec->num_smuxes > 0) {
3879 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3880 if (err < 0)
3881 return err;
3882 }
8b65727b 3883
e3c75964
TI		 3884 err = stac92xx_add_input_source(spec);
3885 if (err < 0)
3886 return err;
3887
c7d4b2fa 3888 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3889 if (spec->multiout.max_channels > 2)
c7d4b2fa 3890 spec->surr_switch = 1;
c7d4b2fa 3891
0852d7a6 3892 if (spec->autocfg.dig_outs)
3cc08dc6 3893 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3894 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3895 spec->dig_in_nid = dig_in;
c7d4b2fa 3896
603c4019
TI		 3897 if (spec->kctls.list)
3898 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3899
3900 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3901 if (!spec->dinput_mux)
3902 spec->dinput_mux = &spec->private_dimux;
d9737751 3903 spec->sinput_mux = &spec->private_smux;
b22b4821 3904 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 3905 return 1;
3906}
3907
82bc955f
TI		 3908/* add playback controls for HP output */
3909static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3910 struct auto_pin_cfg *cfg)
3911{
3912 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3913 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3914 unsigned int wid_caps;
3915
3916 if (! pin)
3917 return 0;
3918
3919 wid_caps = get_wcaps(codec, pin);
505cb341 3920 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3921 spec->hp_detect = 1;
82bc955f
TI		 3922
3923 return 0;
3924}
3925
160ea0dc
RF		 3926/* add playback controls for LFE output */
3927static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3928 struct auto_pin_cfg *cfg)
3929{
3930 struct sigmatel_spec *spec = codec->spec;
3931 int err;
3932 hda_nid_t lfe_pin = 0x0;
3933 int i;
3934
3935 /*
3936 * search speaker outs and line outs for a mono speaker pin
3937 * with an amp. If one is found, add LFE controls
3938 * for it.
3939 */
3940 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3941 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3942 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3943 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3944 if (wcaps == AC_WCAP_OUT_AMP)
3945 /* found a mono speaker with an amp, must be lfe */
3946 lfe_pin = pin;
3947 }
3948
3949 /* if speaker_outs is 0, then speakers may be in line_outs */
3950 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3951 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3952 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3953 unsigned int defcfg;
330ee995 3954 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 3955 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3956 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3957 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3958 if (wcaps == AC_WCAP_OUT_AMP)
3959 /* found a mono speaker with an amp,
3960 must be lfe */
3961 lfe_pin = pin;
3962 }
3963 }
3964 }
3965
3966 if (lfe_pin) {
7c7767eb 3967 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3968 if (err < 0)
3969 return err;
3970 }
3971
3972 return 0;
3973}
3974
c7d4b2fa
M		 3975static int stac9200_parse_auto_config(struct hda_codec *codec)
3976{
3977 struct sigmatel_spec *spec = codec->spec;
3978 int err;
3979
df694daa 3980 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3981 return err;
3982
3983 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3984 return err;
3985
82bc955f
TI		 3986 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3987 return err;
3988
160ea0dc
RF		 3989 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3990 return err;
3991
355a0ec4
TI		 3992 if (spec->num_muxes > 0) {
3993 err = stac92xx_auto_create_mux_input_ctls(codec);
3994 if (err < 0)
3995 return err;
3996 }
3997
e3c75964
TI		 3998 err = stac92xx_add_input_source(spec);
3999 if (err < 0)
4000 return err;
4001
0852d7a6 4002 if (spec->autocfg.dig_outs)
c7d4b2fa 4003 spec->multiout.dig_out_nid = 0x05;
82bc955f 4004 if (spec->autocfg.dig_in_pin)
c7d4b2fa 4005 spec->dig_in_nid = 0x04;
c7d4b2fa 4006
603c4019
TI		 4007 if (spec->kctls.list)
4008 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 4009
4010 spec->input_mux = &spec->private_imux;
8b65727b 4011 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 4012
4013 return 1;
4014}
4015
62fe78e9
SR		 4016/*
4017 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
4018 * funky external mute control using GPIO pins.
4019 */
4020
76e1ddfb 4021static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 4022 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 4023{
4024 unsigned int gpiostate, gpiomask, gpiodir;
4025
4026 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
4027 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 4028 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 4029
4030 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
4031 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 4032 gpiomask |= mask;
62fe78e9
SR		 4033
4034 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
4035 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 4036 gpiodir |= dir_mask;
62fe78e9 4037
76e1ddfb 4038 /* Configure GPIOx as CMOS */
62fe78e9
SR		 4039 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
4040
4041 snd_hda_codec_write(codec, codec->afg, 0,
4042 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 4043 snd_hda_codec_read(codec, codec->afg, 0,
4044 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 4045
4046 msleep(1);
4047
76e1ddfb
TI		 4048 snd_hda_codec_read(codec, codec->afg, 0,
4049 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 4050}
4051
8c8145b8 4052#ifdef CONFIG_SND_HDA_INPUT_JACK
95c09099
TI		 4053static void stac92xx_free_jack_priv(struct snd_jack *jack)
4054{
4055 struct sigmatel_jack *jacks = jack->private_data;
4056 jacks->nid = 0;
4057 jacks->jack = NULL;
4058}
4059#endif
4060
74aeaabc
MR		 4061static int stac92xx_add_jack(struct hda_codec *codec,
4062 hda_nid_t nid, int type)
4063{
8c8145b8 4064#ifdef CONFIG_SND_HDA_INPUT_JACK
74aeaabc
MR		 4065 struct sigmatel_spec *spec = codec->spec;
4066 struct sigmatel_jack *jack;
330ee995 4067 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
74aeaabc
MR		 4068 int connectivity = get_defcfg_connect(def_conf);
4069 char name[32];
95c09099 4070 int err;
74aeaabc
MR		 4071
4072 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
4073 return 0;
4074
4075 snd_array_init(&spec->jacks, sizeof(*jack), 32);
4076 jack = snd_array_new(&spec->jacks);
4077 if (!jack)
4078 return -ENOMEM;
4079 jack->nid = nid;
4080 jack->type = type;
4081
86de7416 4082 snprintf(name, sizeof(name), "%s at %s %s Jack",
74aeaabc
MR		 4083 snd_hda_get_jack_type(def_conf),
4084 snd_hda_get_jack_connectivity(def_conf),
4085 snd_hda_get_jack_location(def_conf));
4086
95c09099
TI		 4087 err = snd_jack_new(codec->bus->card, name, type, &jack->jack);
4088 if (err < 0) {
4089 jack->nid = 0;
4090 return err;
4091 }
4092 jack->jack->private_data = jack;
4093 jack->jack->private_free = stac92xx_free_jack_priv;
e4973e1e 4094#endif
95c09099 4095 return 0;
74aeaabc
MR		 4096}
4097
c6e4c666
TI		 4098static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
4099 unsigned char type, int data)
74aeaabc
MR		 4100{
4101 struct sigmatel_event *event;
4102
4103 snd_array_init(&spec->events, sizeof(*event), 32);
4104 event = snd_array_new(&spec->events);
4105 if (!event)
4106 return -ENOMEM;
4107 event->nid = nid;
c6e4c666
TI		 4108 event->type = type;
4109 event->tag = spec->events.used;
74aeaabc
MR		 4110 event->data = data;
4111
c6e4c666 4112 return event->tag;
74aeaabc
MR		 4113}
4114
c6e4c666 4115static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
62558ce1 4116 hda_nid_t nid)
74aeaabc
MR		 4117{
4118 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4119 struct sigmatel_event *event = spec->events.list;
4120 int i;
4121
4122 for (i = 0; i < spec->events.used; i++, event++) {
62558ce1 4123 if (event->nid == nid)
c6e4c666 4124 return event;
74aeaabc 4125 }
c6e4c666 4126 return NULL;
74aeaabc
MR		 4127}
4128
c6e4c666
TI		 4129static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
4130 unsigned char tag)
314634bc 4131{
c6e4c666
TI		 4132 struct sigmatel_spec *spec = codec->spec;
4133 struct sigmatel_event *event = spec->events.list;
4134 int i;
4135
4136 for (i = 0; i < spec->events.used; i++, event++) {
4137 if (event->tag == tag)
4138 return event;
74aeaabc 4139 }
c6e4c666
TI		 4140 return NULL;
4141}
4142
62558ce1
TI		 4143/* check if given nid is a valid pin and no other events are assigned
4144 * to it. If OK, assign the event, set the unsol flag, and returns 1.
4145 * Otherwise, returns zero.
4146 */
4147static int enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
4148 unsigned int type)
c6e4c666
TI		 4149{
4150 struct sigmatel_event *event;
4151 int tag;
4152
4153 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
62558ce1
TI		 4154 return 0;
4155 event = stac_get_event(codec, nid);
4156 if (event) {
4157 if (event->type != type)
4158 return 0;
c6e4c666 4159 tag = event->tag;
62558ce1 4160 } else {
c6e4c666 4161 tag = stac_add_event(codec->spec, nid, type, 0);
62558ce1
TI		 4162 if (tag < 0)
4163 return 0;
4164 }
c6e4c666
TI		 4165 snd_hda_codec_write_cache(codec, nid, 0,
4166 AC_VERB_SET_UNSOLICITED_ENABLE,
4167 AC_USRSP_EN | tag);
62558ce1 4168 return 1;
314634bc
TI		 4169}
4170
a64135a2
MR		 4171static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
4172{
4173 int i;
4174 for (i = 0; i < cfg->hp_outs; i++)
4175 if (cfg->hp_pins[i] == nid)
4176 return 1; /* nid is a HP-Out */
4177
4178 return 0; /* nid is not a HP-Out */
4179};
4180
b76c850f
MR		 4181static void stac92xx_power_down(struct hda_codec *codec)
4182{
4183 struct sigmatel_spec *spec = codec->spec;
4184
4185 /* power down inactive DACs */
4186 hda_nid_t *dac;
4187 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4188 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4189 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 4190 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4191}
4192
f73d3585
TI		 4193static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4194 int enable);
4195
014c41fc
TI		 4196static inline int get_int_hint(struct hda_codec *codec, const char *key,
4197 int *valp)
4198{
4199 const char *p;
4200 p = snd_hda_get_hint(codec, key);
4201 if (p) {
4202 unsigned long val;
4203 if (!strict_strtoul(p, 0, &val)) {
4204 *valp = val;
4205 return 1;
4206 }
4207 }
4208 return 0;
4209}
4210
6565e4fa
TI		 4211/* override some hints from the hwdep entry */
4212static void stac_store_hints(struct hda_codec *codec)
4213{
4214 struct sigmatel_spec *spec = codec->spec;
6565e4fa
TI		 4215 int val;
4216
4217 val = snd_hda_get_bool_hint(codec, "hp_detect");
4218 if (val >= 0)
4219 spec->hp_detect = val;
014c41fc 4220 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
6565e4fa
TI		 4221 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
4222 spec->gpio_mask;
4223 }
014c41fc
TI		 4224 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
4225 spec->gpio_mask &= spec->gpio_mask;
4226 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
4227 spec->gpio_dir &= spec->gpio_mask;
4228 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
4229 spec->eapd_mask &= spec->gpio_mask;
4230 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
4231 spec->gpio_mute &= spec->gpio_mask;
6565e4fa
TI		 4232 val = snd_hda_get_bool_hint(codec, "eapd_switch");
4233 if (val >= 0)
4234 spec->eapd_switch = val;
014c41fc
TI		 4235 get_int_hint(codec, "gpio_led_polarity", &spec->gpio_led_polarity);
4236 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
043958e6
TI		 4237 spec->gpio_mask |= spec->gpio_led;
4238 spec->gpio_dir |= spec->gpio_led;
4239 if (spec->gpio_led_polarity)
4240 spec->gpio_data |= spec->gpio_led;
4241 }
6565e4fa
TI		 4242}
4243
c7d4b2fa
M		 4244static int stac92xx_init(struct hda_codec *codec)
4245{
4246 struct sigmatel_spec *spec = codec->spec;
82bc955f 4247 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4248 unsigned int gpio;
e4973e1e 4249 int i;
c7d4b2fa 4250
c7d4b2fa
M		 4251 snd_hda_sequence_write(codec, spec->init);
4252
8daaaa97
MR		 4253 /* power down adcs initially */
4254 if (spec->powerdown_adcs)
4255 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4256 snd_hda_codec_write(codec,
8daaaa97
MR		 4257 spec->adc_nids[i], 0,
4258 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4259
6565e4fa
TI		 4260 /* override some hints */
4261 stac_store_hints(codec);
4262
f73d3585
TI		 4263 /* set up GPIO */
4264 gpio = spec->gpio_data;
4265 /* turn on EAPD statically when spec->eapd_switch isn't set.
4266 * otherwise, unsol event will turn it on/off dynamically
4267 */
4268 if (!spec->eapd_switch)
4269 gpio |= spec->eapd_mask;
4270 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4271
82bc955f
TI		 4272 /* set up pins */
4273 if (spec->hp_detect) {
505cb341 4274 /* Enable unsolicited responses on the HP widget */
74aeaabc 4275 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4276 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4277 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4278 }
1c4bdf9b
TI		 4279 if (cfg->line_out_type == AUTO_PIN_LINE_OUT &&
4280 cfg->speaker_outs > 0) {
fefd67f3 4281 /* enable pin-detect for line-outs as well */
15cfa2b3
TI		 4282 for (i = 0; i < cfg->line_outs; i++) {
4283 hda_nid_t nid = cfg->line_out_pins[i];
fefd67f3
TI		 4284 enable_pin_detect(codec, nid, STAC_LO_EVENT);
4285 }
4286 }
4287
0a07acaf
TI		 4288 /* force to enable the first line-out; the others are set up
4289 * in unsol_event
4290 */
4291 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4292 AC_PINCTL_OUT_EN);
82bc955f 4293 /* fake event to set up pins */
5f380eb1
TI		 4294 if (cfg->hp_pins[0])
4295 stac_issue_unsol_event(codec, cfg->hp_pins[0]);
4296 else if (cfg->line_out_pins[0])
4297 stac_issue_unsol_event(codec, cfg->line_out_pins[0]);
82bc955f
TI		 4298 } else {
4299 stac92xx_auto_init_multi_out(codec);
4300 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 4301 for (i = 0; i < cfg->hp_outs; i++)
4302 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f 4303 }
3d21d3f7 4304 if (spec->auto_mic) {
15b4f296 4305 /* initialize connection to analog input */
da2a2aaa
TI		 4306 if (spec->dmux_nids)
4307 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
15b4f296 4308 AC_VERB_SET_CONNECT_SEL, 0);
3d21d3f7
TI		 4309 if (enable_pin_detect(codec, spec->ext_mic.pin, STAC_MIC_EVENT))
4310 stac_issue_unsol_event(codec, spec->ext_mic.pin);
9907790a
CC		 4311 if (enable_pin_detect(codec, spec->dock_mic.pin,
4312 STAC_MIC_EVENT))
4313 stac_issue_unsol_event(codec, spec->dock_mic.pin);
3d21d3f7 4314 }
eea7dc93
TI		 4315 for (i = 0; i < cfg->num_inputs; i++) {
4316 hda_nid_t nid = cfg->inputs[i].pin;
4317 int type = cfg->inputs[i].type;
4318 unsigned int pinctl, conf;
86e2959a 4319 if (type == AUTO_PIN_MIC) {
eea7dc93
TI		 4320 /* for mic pins, force to initialize */
4321 pinctl = stac92xx_get_default_vref(codec, nid);
4322 pinctl |= AC_PINCTL_IN_EN;
4323 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4324 } else {
4325 pinctl = snd_hda_codec_read(codec, nid, 0,
4326 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4327 /* if PINCTL already set then skip */
4328 /* Also, if both INPUT and OUTPUT are set,
4329 * it must be a BIOS bug; need to override, too
4330 */
4331 if (!(pinctl & AC_PINCTL_IN_EN) ||
4332 (pinctl & AC_PINCTL_OUT_EN)) {
4333 pinctl &= ~AC_PINCTL_OUT_EN;
12dde4c6
TI		 4334 pinctl |= AC_PINCTL_IN_EN;
4335 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3 4336 }
c960a03b 4337 }
eea7dc93
TI		 4338 conf = snd_hda_codec_get_pincfg(codec, nid);
4339 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4340 if (enable_pin_detect(codec, nid, STAC_INSERT_EVENT))
4341 stac_issue_unsol_event(codec, nid);
4342 }
82bc955f 4343 }
a64135a2
MR		 4344 for (i = 0; i < spec->num_dmics; i++)
4345 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4346 AC_PINCTL_IN_EN);
0852d7a6
TI		 4347 if (cfg->dig_out_pins[0])
4348 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI		 4349 AC_PINCTL_OUT_EN);
4350 if (cfg->dig_in_pin)
4351 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4352 AC_PINCTL_IN_EN);
a64135a2 4353 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4354 hda_nid_t nid = spec->pwr_nids[i];
4355 int pinctl, def_conf;
f73d3585 4356
eb632128
TI		 4357 /* power on when no jack detection is available */
4358 if (!spec->hp_detect) {
4359 stac_toggle_power_map(codec, nid, 1);
4360 continue;
4361 }
4362
4363 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI		 4364 continue; /* already has an unsol event */
4365
4366 pinctl = snd_hda_codec_read(codec, nid, 0,
4367 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4368 /* outputs are only ports capable of power management
4369 * any attempts on powering down a input port cause the
4370 * referenced VREF to act quirky.
4371 */
eb632128
TI		 4372 if (pinctl & AC_PINCTL_IN_EN) {
4373 stac_toggle_power_map(codec, nid, 1);
a64135a2 4374 continue;
eb632128 4375 }
330ee995 4376 def_conf = snd_hda_codec_get_pincfg(codec, nid);
f73d3585 4377 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4378 /* skip any ports that don't have jacks since presence
4379 * detection is useless */
f73d3585
TI		 4380 if (def_conf != AC_JACK_PORT_COMPLEX) {
4381 if (def_conf != AC_JACK_PORT_NONE)
4382 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4383 continue;
f73d3585 4384 }
62558ce1
TI		 4385 if (enable_pin_detect(codec, nid, STAC_PWR_EVENT))
4386 stac_issue_unsol_event(codec, nid);
a64135a2 4387 }
c21bd025 4388
c21bd025 4389 /* sync mute LED */
9e5341b9
TI		 4390 if (spec->gpio_led)
4391 hda_call_check_power_status(codec, 0x01);
b76c850f
MR		 4392 if (spec->dac_list)
4393 stac92xx_power_down(codec);
c7d4b2fa
M		 4394 return 0;
4395}
4396
74aeaabc
MR		 4397static void stac92xx_free_jacks(struct hda_codec *codec)
4398{
8c8145b8 4399#ifdef CONFIG_SND_HDA_INPUT_JACK
b94d3539 4400 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4401 struct sigmatel_spec *spec = codec->spec;
b94d3539 4402 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 4403 struct sigmatel_jack *jacks = spec->jacks.list;
4404 int i;
95c09099
TI		 4405 for (i = 0; i < spec->jacks.used; i++, jacks++) {
4406 if (jacks->jack)
4407 snd_device_free(codec->bus->card, jacks->jack);
4408 }
74aeaabc
MR		 4409 }
4410 snd_array_free(&spec->jacks);
e4973e1e 4411#endif
74aeaabc
MR		 4412}
4413
603c4019
TI		 4414static void stac92xx_free_kctls(struct hda_codec *codec)
4415{
4416 struct sigmatel_spec *spec = codec->spec;
4417
4418 if (spec->kctls.list) {
4419 struct snd_kcontrol_new *kctl = spec->kctls.list;
4420 int i;
4421 for (i = 0; i < spec->kctls.used; i++)
4422 kfree(kctl[i].name);
4423 }
4424 snd_array_free(&spec->kctls);
4425}
4426
167eae5a
TI		 4427static void stac92xx_shutup(struct hda_codec *codec)
4428{
4429 struct sigmatel_spec *spec = codec->spec;
167eae5a 4430
92ee6162 4431 snd_hda_shutup_pins(codec);
167eae5a
TI		 4432
4433 if (spec->eapd_mask)
4434 stac_gpio_set(codec, spec->gpio_mask,
4435 spec->gpio_dir, spec->gpio_data &
4436 ~spec->eapd_mask);
4437}
4438
2f2f4251
M		 4439static void stac92xx_free(struct hda_codec *codec)
4440{
c7d4b2fa 4441 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4442
4443 if (! spec)
4444 return;
4445
167eae5a 4446 stac92xx_shutup(codec);
74aeaabc
MR		 4447 stac92xx_free_jacks(codec);
4448 snd_array_free(&spec->events);
11b44bbd 4449
c7d4b2fa 4450 kfree(spec);
1cd2224c 4451 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4452}
4453
4e55096e
M		 4454static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4455 unsigned int flag)
4456{
8ce84198
TI		 4457 unsigned int old_ctl, pin_ctl;
4458
4459 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4460 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4461
f9acba43
TI		 4462 if (pin_ctl & AC_PINCTL_IN_EN) {
4463 /*
4464 * we need to check the current set-up direction of
4465 * shared input pins since they can be switched via
4466 * "xxx as Output" mixer switch
4467 */
4468 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4469 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4470 return;
4471 }
4472
8ce84198 4473 old_ctl = pin_ctl;
7b043899
SL		 4474 /* if setting pin direction bits, clear the current
4475 direction bits first */
4476 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4477 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4478
8ce84198
TI		 4479 pin_ctl |= flag;
4480 if (old_ctl != pin_ctl)
4481 snd_hda_codec_write_cache(codec, nid, 0,
4482 AC_VERB_SET_PIN_WIDGET_CONTROL,
4483 pin_ctl);
4e55096e
M		 4484}
4485
4486static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4487 unsigned int flag)
4488{
4489 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4490 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI		 4491 if (pin_ctl & flag)
4492 snd_hda_codec_write_cache(codec, nid, 0,
4493 AC_VERB_SET_PIN_WIDGET_CONTROL,
4494 pin_ctl & ~flag);
4e55096e
M		 4495}
4496
d56757ab 4497static inline int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4498{
4499 if (!nid)
4500 return 0;
a252c81a 4501 return snd_hda_jack_detect(codec, nid);
314634bc
TI		 4502}
4503
fefd67f3
TI		 4504static void stac92xx_line_out_detect(struct hda_codec *codec,
4505 int presence)
4506{
4507 struct sigmatel_spec *spec = codec->spec;
4508 struct auto_pin_cfg *cfg = &spec->autocfg;
4509 int i;
4510
4511 for (i = 0; i < cfg->line_outs; i++) {
4512 if (presence)
4513 break;
4514 presence = get_pin_presence(codec, cfg->line_out_pins[i]);
4515 if (presence) {
4516 unsigned int pinctl;
4517 pinctl = snd_hda_codec_read(codec,
4518 cfg->line_out_pins[i], 0,
4519 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4520 if (pinctl & AC_PINCTL_IN_EN)
4521 presence = 0; /* mic- or line-input */
4522 }
4523 }
4524
4525 if (presence) {
4526 /* disable speakers */
4527 for (i = 0; i < cfg->speaker_outs; i++)
4528 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4529 AC_PINCTL_OUT_EN);
4530 if (spec->eapd_mask && spec->eapd_switch)
4531 stac_gpio_set(codec, spec->gpio_mask,
4532 spec->gpio_dir, spec->gpio_data &
4533 ~spec->eapd_mask);
4534 } else {
4535 /* enable speakers */
4536 for (i = 0; i < cfg->speaker_outs; i++)
4537 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4538 AC_PINCTL_OUT_EN);
4539 if (spec->eapd_mask && spec->eapd_switch)
4540 stac_gpio_set(codec, spec->gpio_mask,
4541 spec->gpio_dir, spec->gpio_data |
4542 spec->eapd_mask);
4543 }
4544}
4545
d7a89436
TI		 4546/* return non-zero if the hp-pin of the given array index isn't
4547 * a jack-detection target
4548 */
4549static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4550{
4551 struct auto_pin_cfg *cfg = &spec->autocfg;
4552
4553 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4554 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4555 return 1;
c21ca4a8 4556 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4557 return 1;
4558 /* ignore if the pin is set as line-out */
4559 if (cfg->hp_pins[i] == spec->hp_switch)
4560 return 1;
4561 return 0;
4562}
4563
c6e4c666 4564static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4565{
4566 struct sigmatel_spec *spec = codec->spec;
4567 struct auto_pin_cfg *cfg = &spec->autocfg;
4568 int i, presence;
4569
eb06ed8f 4570 presence = 0;
4fe5195c
MR		 4571 if (spec->gpio_mute)
4572 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4573 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4574
eb06ed8f 4575 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4576 if (presence)
4577 break;
d7a89436
TI		 4578 if (no_hp_sensing(spec, i))
4579 continue;
e6e3ea25
TI		 4580 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4581 if (presence) {
4582 unsigned int pinctl;
4583 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4584 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4585 if (pinctl & AC_PINCTL_IN_EN)
4586 presence = 0; /* mic- or line-input */
4587 }
eb06ed8f 4588 }
4e55096e
M		 4589
4590 if (presence) {
d7a89436 4591 /* disable lineouts */
7c2ba97b 4592 if (spec->hp_switch)
d7a89436
TI		 4593 stac92xx_reset_pinctl(codec, spec->hp_switch,
4594 AC_PINCTL_OUT_EN);
4e55096e
M		 4595 for (i = 0; i < cfg->line_outs; i++)
4596 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4597 AC_PINCTL_OUT_EN);
4e55096e 4598 } else {
d7a89436 4599 /* enable lineouts */
7c2ba97b 4600 if (spec->hp_switch)
d7a89436
TI		 4601 stac92xx_set_pinctl(codec, spec->hp_switch,
4602 AC_PINCTL_OUT_EN);
4e55096e
M		 4603 for (i = 0; i < cfg->line_outs; i++)
4604 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4605 AC_PINCTL_OUT_EN);
4e55096e 4606 }
fefd67f3 4607 stac92xx_line_out_detect(codec, presence);
d7a89436
TI		 4608 /* toggle hp outs */
4609 for (i = 0; i < cfg->hp_outs; i++) {
4610 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4611 if (no_hp_sensing(spec, i))
4612 continue;
4613 if (presence)
4614 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4615#if 0 /* FIXME */
4616/* Resetting the pinctl like below may lead to (a sort of) regressions
4617 * on some devices since they use the HP pin actually for line/speaker
4618 * outs although the default pin config shows a different pin (that is
4619 * wrong and useless).
4620 *
4621 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4622 * But, disabling the code below just works around it, and I'm too tired of
4623 * bug reports with such devices...
4624 */
d7a89436
TI		 4625 else
4626 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4627#endif /* FIXME */
d7a89436 4628 }
4e55096e
M		 4629}
4630
f73d3585
TI		 4631static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4632 int enable)
a64135a2
MR		 4633{
4634 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4635 unsigned int idx, val;
4636
4637 for (idx = 0; idx < spec->num_pwrs; idx++) {
4638 if (spec->pwr_nids[idx] == nid)
4639 break;
4640 }
4641 if (idx >= spec->num_pwrs)
4642 return;
d0513fc6
MR		 4643
4644 /* several codecs have two power down bits */
4645 if (spec->pwr_mapping)
4646 idx = spec->pwr_mapping[idx];
4647 else
4648 idx = 1 << idx;
a64135a2 4649
f73d3585
TI		 4650 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4651 if (enable)
a64135a2
MR		 4652 val &= ~idx;
4653 else
4654 val |= idx;
4655
4656 /* power down unused output ports */
4657 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4658}
4659
f73d3585
TI		 4660static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4661{
e6e3ea25 4662 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4663}
a64135a2 4664
74aeaabc
MR		 4665static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4666{
4667 struct sigmatel_spec *spec = codec->spec;
4668 struct sigmatel_jack *jacks = spec->jacks.list;
4669
4670 if (jacks) {
4671 int i;
4672 for (i = 0; i < spec->jacks.used; i++) {
4673 if (jacks->nid == nid) {
4674 unsigned int pin_ctl =
4675 snd_hda_codec_read(codec, nid,
4676 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4677 0x00);
4678 int type = jacks->type;
4679 if (type == (SND_JACK_LINEOUT
4680 | SND_JACK_HEADPHONE))
4681 type = (pin_ctl & AC_PINCTL_HP_EN)
4682 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4683 snd_jack_report(jacks->jack,
e6e3ea25 4684 get_pin_presence(codec, nid)
74aeaabc
MR		 4685 ? type : 0);
4686 }
4687 jacks++;
4688 }
4689 }
4690}
a64135a2 4691
ab5a6ebe
VK		 4692/* get the pin connection (fixed, none, etc) */
4693static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
4694{
4695 struct sigmatel_spec *spec = codec->spec;
4696 unsigned int cfg;
4697
4698 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
4699 return get_defcfg_connect(cfg);
4700}
4701
4702static int stac92xx_connected_ports(struct hda_codec *codec,
4703 hda_nid_t *nids, int num_nids)
4704{
4705 struct sigmatel_spec *spec = codec->spec;
4706 int idx, num;
4707 unsigned int def_conf;
4708
4709 for (num = 0; num < num_nids; num++) {
4710 for (idx = 0; idx < spec->num_pins; idx++)
4711 if (spec->pin_nids[idx] == nids[num])
4712 break;
4713 if (idx >= spec->num_pins)
4714 break;
4715 def_conf = stac_get_defcfg_connect(codec, idx);
4716 if (def_conf == AC_JACK_PORT_NONE)
4717 break;
4718 }
4719 return num;
4720}
4721
3d21d3f7
TI		 4722static void stac92xx_mic_detect(struct hda_codec *codec)
4723{
4724 struct sigmatel_spec *spec = codec->spec;
4725 struct sigmatel_mic_route *mic;
4726
4727 if (get_pin_presence(codec, spec->ext_mic.pin))
4728 mic = &spec->ext_mic;
9907790a
CC		 4729 else if (get_pin_presence(codec, spec->dock_mic.pin))
4730 mic = &spec->dock_mic;
3d21d3f7
TI		 4731 else
4732 mic = &spec->int_mic;
02d33322 4733 if (mic->dmux_idx >= 0)
3d21d3f7
TI		 4734 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
4735 AC_VERB_SET_CONNECT_SEL,
4736 mic->dmux_idx);
02d33322 4737 if (mic->mux_idx >= 0)
3d21d3f7
TI		 4738 snd_hda_codec_write_cache(codec, spec->mux_nids[0], 0,
4739 AC_VERB_SET_CONNECT_SEL,
4740 mic->mux_idx);
4741}
4742
62558ce1 4743static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid)
c6e4c666 4744{
62558ce1 4745 struct sigmatel_event *event = stac_get_event(codec, nid);
c6e4c666
TI		 4746 if (!event)
4747 return;
4748 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4749}
4750
314634bc
TI		 4751static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4752{
a64135a2 4753 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4754 struct sigmatel_event *event;
4755 int tag, data;
a64135a2 4756
c6e4c666
TI		 4757 tag = (res >> 26) & 0x7f;
4758 event = stac_get_event_from_tag(codec, tag);
4759 if (!event)
4760 return;
4761
4762 switch (event->type) {
314634bc 4763 case STAC_HP_EVENT:
fefd67f3 4764 case STAC_LO_EVENT:
16ffe32c 4765 stac92xx_hp_detect(codec);
fefd67f3 4766 break;
3d21d3f7
TI		 4767 case STAC_MIC_EVENT:
4768 stac92xx_mic_detect(codec);
4769 break;
4770 }
4771
4772 switch (event->type) {
4773 case STAC_HP_EVENT:
fefd67f3 4774 case STAC_LO_EVENT:
3d21d3f7 4775 case STAC_MIC_EVENT:
74aeaabc 4776 case STAC_INSERT_EVENT:
a64135a2 4777 case STAC_PWR_EVENT:
c6e4c666
TI		 4778 if (spec->num_pwrs > 0)
4779 stac92xx_pin_sense(codec, event->nid);
4780 stac92xx_report_jack(codec, event->nid);
fd60cc89
MR		 4781
4782 switch (codec->subsystem_id) {
4783 case 0x103c308f:
4784 if (event->nid == 0xb) {
4785 int pin = AC_PINCTL_IN_EN;
4786
4787 if (get_pin_presence(codec, 0xa)
4788 && get_pin_presence(codec, 0xb))
4789 pin |= AC_PINCTL_VREF_80;
4790 if (!get_pin_presence(codec, 0xb))
4791 pin |= AC_PINCTL_VREF_80;
4792
4793 /* toggle VREF state based on mic + hp pin
4794 * status
4795 */
4796 stac92xx_auto_set_pinctl(codec, 0x0a, pin);
4797 }
4798 }
72474be6 4799 break;
c6e4c666
TI		 4800 case STAC_VREF_EVENT:
4801 data = snd_hda_codec_read(codec, codec->afg, 0,
4802 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4803 /* toggle VREF state based on GPIOx status */
4804 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4805 !!(data & (1 << event->data)));
72474be6 4806 break;
314634bc
TI		 4807 }
4808}
4809
d38cce70
KG		 4810static int hp_blike_system(u32 subsystem_id);
4811
4812static void set_hp_led_gpio(struct hda_codec *codec)
4813{
4814 struct sigmatel_spec *spec = codec->spec;
07f80449
TI		 4815 unsigned int gpio;
4816
26ebe0a2
TI		 4817 if (spec->gpio_led)
4818 return;
4819
07f80449
TI		 4820 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
4821 gpio &= AC_GPIO_IO_COUNT;
4822 if (gpio > 3)
4823 spec->gpio_led = 0x08; /* GPIO 3 */
4824 else
4825 spec->gpio_led = 0x01; /* GPIO 0 */
d38cce70
KG		 4826}
4827
c357aab0
VK		 4828/*
4829 * This method searches for the mute LED GPIO configuration
4830 * provided as OEM string in SMBIOS. The format of that string
4831 * is HP_Mute_LED_P_G or HP_Mute_LED_P
4832 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
4833 * that corresponds to the NOT muted state of the master volume
4834 * and G is the index of the GPIO to use as the mute LED control (0..9)
4835 * If _G portion is missing it is assigned based on the codec ID
4836 *
4837 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
4838 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
d38cce70
KG		 4839 *
4840 *
4841 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
4842 * SMBIOS - at least the ones I have seen do not have them - which include
4843 * my own system (HP Pavilion dv6-1110ax) and my cousin's
4844 * HP Pavilion dv9500t CTO.
4845 * Need more information on whether it is true across the entire series.
4846 * -- kunal
c357aab0 4847 */
dce17d4f 4848static int find_mute_led_gpio(struct hda_codec *codec, int default_polarity)
c357aab0
VK		 4849{
4850 struct sigmatel_spec *spec = codec->spec;
4851 const struct dmi_device *dev = NULL;
4852
4853 if ((codec->subsystem_id >> 16) == PCI_VENDOR_ID_HP) {
4854 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING,
4855 NULL, dev))) {
4856 if (sscanf(dev->name, "HP_Mute_LED_%d_%d",
d38cce70
KG		 4857 &spec->gpio_led_polarity,
4858 &spec->gpio_led) == 2) {
c357aab0
VK		 4859 spec->gpio_led = 1 << spec->gpio_led;
4860 return 1;
4861 }
4862 if (sscanf(dev->name, "HP_Mute_LED_%d",
d38cce70
KG		 4863 &spec->gpio_led_polarity) == 1) {
4864 set_hp_led_gpio(codec);
4865 return 1;
c357aab0
VK		 4866 }
4867 }
d38cce70
KG		 4868
4869 /*
4870 * Fallback case - if we don't find the DMI strings,
4871 * we statically set the GPIO - if not a B-series system.
4872 */
4873 if (!hp_blike_system(codec->subsystem_id)) {
4874 set_hp_led_gpio(codec);
dce17d4f 4875 spec->gpio_led_polarity = default_polarity;
d38cce70
KG		 4876 return 1;
4877 }
c357aab0
VK		 4878 }
4879 return 0;
4880}
4881
4882static int hp_blike_system(u32 subsystem_id)
78987bdc
RD		 4883{
4884 switch (subsystem_id) {
c357aab0
VK		 4885 case 0x103c1520:
4886 case 0x103c1521:
4887 case 0x103c1523:
4888 case 0x103c1524:
4889 case 0x103c1525:
78987bdc
RD		 4890 case 0x103c1722:
4891 case 0x103c1723:
4892 case 0x103c1724:
4893 case 0x103c1725:
4894 case 0x103c1726:
4895 case 0x103c1727:
4896 case 0x103c1728:
4897 case 0x103c1729:
c357aab0
VK		 4898 case 0x103c172a:
4899 case 0x103c172b:
4900 case 0x103c307e:
4901 case 0x103c307f:
4902 case 0x103c3080:
4903 case 0x103c3081:
4904 case 0x103c7007:
4905 case 0x103c7008:
78987bdc
RD		 4906 return 1;
4907 }
4908 return 0;
4909}
4910
2d34e1b3
TI		 4911#ifdef CONFIG_PROC_FS
4912static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4913 struct hda_codec *codec, hda_nid_t nid)
4914{
4915 if (nid == codec->afg)
4916 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4917 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4918}
4919
4920static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4921 struct hda_codec *codec,
4922 unsigned int verb)
4923{
4924 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4925 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4926}
4927
4928/* stac92hd71bxx, stac92hd73xx */
4929static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4930 struct hda_codec *codec, hda_nid_t nid)
4931{
4932 stac92hd_proc_hook(buffer, codec, nid);
4933 if (nid == codec->afg)
4934 analog_loop_proc_hook(buffer, codec, 0xfa0);
4935}
4936
4937static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4938 struct hda_codec *codec, hda_nid_t nid)
4939{
4940 if (nid == codec->afg)
4941 analog_loop_proc_hook(buffer, codec, 0xfe0);
4942}
4943
4944static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4945 struct hda_codec *codec, hda_nid_t nid)
4946{
4947 if (nid == codec->afg)
4948 analog_loop_proc_hook(buffer, codec, 0xfeb);
4949}
4950#else
4951#define stac92hd_proc_hook NULL
4952#define stac92hd7x_proc_hook NULL
4953#define stac9205_proc_hook NULL
4954#define stac927x_proc_hook NULL
4955#endif
4956
cb53c626 4957#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4958static int stac92xx_resume(struct hda_codec *codec)
4959{
dc81bed1
TI		 4960 struct sigmatel_spec *spec = codec->spec;
4961
2c885878 4962 stac92xx_init(codec);
82beb8fd
TI		 4963 snd_hda_codec_resume_amp(codec);
4964 snd_hda_codec_resume_cache(codec);
2c885878 4965 /* fake event to set up pins again to override cached values */
5f380eb1
TI		 4966 if (spec->hp_detect) {
4967 if (spec->autocfg.hp_pins[0])
4968 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0]);
4969 else if (spec->autocfg.line_out_pins[0])
4970 stac_issue_unsol_event(codec,
4971 spec->autocfg.line_out_pins[0]);
4972 }
c21bd025 4973 /* sync mute LED */
9e5341b9
TI		 4974 if (spec->gpio_led)
4975 hda_call_check_power_status(codec, 0x01);
ff6fdc37
M		 4976 return 0;
4977}
c6798d2b 4978
ae6241fb 4979/*
514bf54c 4980 * using power check for controlling mute led of HP notebooks
ae6241fb
CP		 4981 * check for mute state only on Speakers (nid = 0x10)
4982 *
4983 * For this feature CONFIG_SND_HDA_POWER_SAVE is needed, otherwise
4984 * the LED is NOT working properly !
514bf54c
JG		 4985 *
4986 * Changed name to reflect that it now works for any designated
4987 * model, not just HP HDX.
ae6241fb
CP		 4988 */
4989
4990#ifdef CONFIG_SND_HDA_POWER_SAVE
514bf54c 4991static int stac92xx_hp_check_power_status(struct hda_codec *codec,
6fce61ae 4992 hda_nid_t nid)
ae6241fb
CP		 4993{
4994 struct sigmatel_spec *spec = codec->spec;
c21bd025 4995 int i, muted = 1;
6fce61ae 4996
c21bd025
TI		 4997 for (i = 0; i < spec->multiout.num_dacs; i++) {
4998 nid = spec->multiout.dac_nids[i];
4999 if (!(snd_hda_codec_amp_read(codec, nid, 0, HDA_OUTPUT, 0) &
5000 HDA_AMP_MUTE)) {
5001 muted = 0; /* something heard */
5002 break;
5bdaaada 5003 }
ae6241fb 5004 }
c21bd025
TI		 5005 if (muted)
5006 spec->gpio_data &= ~spec->gpio_led; /* orange */
5007 else
5008 spec->gpio_data |= spec->gpio_led; /* white */
ae6241fb 5009
c21bd025
TI		 5010 if (!spec->gpio_led_polarity) {
5011 /* LED state is inverted on these systems */
5012 spec->gpio_data ^= spec->gpio_led;
5013 }
b4e81876 5014
b4e81876 5015 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
b4e81876
TI		 5016 return 0;
5017}
ae6241fb
CP		 5018#endif
5019
c6798d2b
MR		 5020static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
5021{
167eae5a 5022 stac92xx_shutup(codec);
c6798d2b
MR		 5023 return 0;
5024}
ff6fdc37
M		 5025#endif
5026
2f2f4251
M		 5027static struct hda_codec_ops stac92xx_patch_ops = {
5028 .build_controls = stac92xx_build_controls,
5029 .build_pcms = stac92xx_build_pcms,
5030 .init = stac92xx_init,
5031 .free = stac92xx_free,
4e55096e 5032 .unsol_event = stac92xx_unsol_event,
cb53c626 5033#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 5034 .suspend = stac92xx_suspend,
ff6fdc37
M		 5035 .resume = stac92xx_resume,
5036#endif
fb8d1a34 5037 .reboot_notify = stac92xx_shutup,
2f2f4251
M		 5038};
5039
5040static int patch_stac9200(struct hda_codec *codec)
5041{
5042 struct sigmatel_spec *spec;
c7d4b2fa 5043 int err;
2f2f4251 5044
e560d8d8 5045 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5046 if (spec == NULL)
5047 return -ENOMEM;
5048
a252c81a 5049 codec->no_trigger_sense = 1;
2f2f4251 5050 codec->spec = spec;
1b0e372d 5051 spec->linear_tone_beep = 1;
a4eed138 5052 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 5053 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 5054 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
5055 stac9200_models,
5056 stac9200_cfg_tbl);
330ee995 5057 if (spec->board_config < 0)
9a11f1aa
TI		 5058 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5059 codec->chip_name);
330ee995
TI		 5060 else
5061 stac92xx_set_config_regs(codec,
af9f341a 5062 stac9200_brd_tbl[spec->board_config]);
2f2f4251
M		 5063
5064 spec->multiout.max_channels = 2;
5065 spec->multiout.num_dacs = 1;
5066 spec->multiout.dac_nids = stac9200_dac_nids;
5067 spec->adc_nids = stac9200_adc_nids;
5068 spec->mux_nids = stac9200_mux_nids;
dabbed6f 5069 spec->num_muxes = 1;
8b65727b 5070 spec->num_dmics = 0;
9e05b7a3 5071 spec->num_adcs = 1;
a64135a2 5072 spec->num_pwrs = 0;
c7d4b2fa 5073
58eec423
MCC		 5074 if (spec->board_config == STAC_9200_M4 ||
5075 spec->board_config == STAC_9200_M4_2 ||
bf277785 5076 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 5077 spec->init = stac9200_eapd_init;
5078 else
5079 spec->init = stac9200_core_init;
2f2f4251 5080 spec->mixer = stac9200_mixer;
c7d4b2fa 5081
117f257d
TI		 5082 if (spec->board_config == STAC_9200_PANASONIC) {
5083 spec->gpio_mask = spec->gpio_dir = 0x09;
5084 spec->gpio_data = 0x00;
5085 }
5086
c7d4b2fa
M		 5087 err = stac9200_parse_auto_config(codec);
5088 if (err < 0) {
5089 stac92xx_free(codec);
5090 return err;
5091 }
2f2f4251 5092
2acc9dcb
TI		 5093 /* CF-74 has no headphone detection, and the driver should *NOT*
5094 * do detection and HP/speaker toggle because the hardware does it.
5095 */
5096 if (spec->board_config == STAC_9200_PANASONIC)
5097 spec->hp_detect = 0;
5098
2f2f4251
M		 5099 codec->patch_ops = stac92xx_patch_ops;
5100
5101 return 0;
5102}
5103
8e21c34c
TD		 5104static int patch_stac925x(struct hda_codec *codec)
5105{
5106 struct sigmatel_spec *spec;
5107 int err;
5108
5109 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5110 if (spec == NULL)
5111 return -ENOMEM;
5112
a252c81a 5113 codec->no_trigger_sense = 1;
8e21c34c 5114 codec->spec = spec;
1b0e372d 5115 spec->linear_tone_beep = 1;
a4eed138 5116 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 5117 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 5118
5119 /* Check first for codec ID */
5120 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
5121 STAC_925x_MODELS,
5122 stac925x_models,
5123 stac925x_codec_id_cfg_tbl);
5124
5125 /* Now checks for PCI ID, if codec ID is not found */
5126 if (spec->board_config < 0)
5127 spec->board_config = snd_hda_check_board_config(codec,
5128 STAC_925x_MODELS,
8e21c34c
TD		 5129 stac925x_models,
5130 stac925x_cfg_tbl);
9e507abd 5131 again:
330ee995 5132 if (spec->board_config < 0)
9a11f1aa
TI		 5133 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5134 codec->chip_name);
330ee995
TI		 5135 else
5136 stac92xx_set_config_regs(codec,
af9f341a 5137 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD		 5138
5139 spec->multiout.max_channels = 2;
5140 spec->multiout.num_dacs = 1;
5141 spec->multiout.dac_nids = stac925x_dac_nids;
5142 spec->adc_nids = stac925x_adc_nids;
5143 spec->mux_nids = stac925x_mux_nids;
5144 spec->num_muxes = 1;
9e05b7a3 5145 spec->num_adcs = 1;
a64135a2 5146 spec->num_pwrs = 0;
2c11f955
TD		 5147 switch (codec->vendor_id) {
5148 case 0x83847632: /* STAC9202 */
5149 case 0x83847633: /* STAC9202D */
5150 case 0x83847636: /* STAC9251 */
5151 case 0x83847637: /* STAC9251D */
f6e9852a 5152 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 5153 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 5154 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
5155 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 5156 break;
5157 default:
5158 spec->num_dmics = 0;
5159 break;
5160 }
8e21c34c
TD		 5161
5162 spec->init = stac925x_core_init;
5163 spec->mixer = stac925x_mixer;
6479c631
TI		 5164 spec->num_caps = 1;
5165 spec->capvols = stac925x_capvols;
5166 spec->capsws = stac925x_capsws;
8e21c34c
TD		 5167
5168 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 5169 if (!err) {
5170 if (spec->board_config < 0) {
5171 printk(KERN_WARNING "hda_codec: No auto-config is "
5172 "available, default to model=ref\n");
5173 spec->board_config = STAC_925x_REF;
5174 goto again;
5175 }
5176 err = -EINVAL;
5177 }
8e21c34c
TD		 5178 if (err < 0) {
5179 stac92xx_free(codec);
5180 return err;
5181 }
5182
5183 codec->patch_ops = stac92xx_patch_ops;
5184
5185 return 0;
5186}
5187
e1f0d669
MR		 5188static int patch_stac92hd73xx(struct hda_codec *codec)
5189{
5190 struct sigmatel_spec *spec;
5191 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
5192 int err = 0;
c21ca4a8 5193 int num_dacs;
e1f0d669
MR		 5194
5195 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5196 if (spec == NULL)
5197 return -ENOMEM;
5198
a252c81a 5199 codec->no_trigger_sense = 1;
e1f0d669 5200 codec->spec = spec;
1b0e372d 5201 spec->linear_tone_beep = 0;
e99d32b3 5202 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 5203 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
5204 spec->pin_nids = stac92hd73xx_pin_nids;
5205 spec->board_config = snd_hda_check_board_config(codec,
5206 STAC_92HD73XX_MODELS,
5207 stac92hd73xx_models,
5208 stac92hd73xx_cfg_tbl);
842ae638
TI		 5209 /* check codec subsystem id if not found */
5210 if (spec->board_config < 0)
5211 spec->board_config =
5212 snd_hda_check_board_codec_sid_config(codec,
5213 STAC_92HD73XX_MODELS, stac92hd73xx_models,
5214 stac92hd73xx_codec_id_cfg_tbl);
e1f0d669 5215again:
330ee995 5216 if (spec->board_config < 0)
9a11f1aa
TI		 5217 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5218 codec->chip_name);
330ee995
TI		 5219 else
5220 stac92xx_set_config_regs(codec,
af9f341a 5221 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 5222
c21ca4a8 5223 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 5224 conn, STAC92HD73_DAC_COUNT + 2) - 1;
5225
c21ca4a8 5226 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 5227 printk(KERN_WARNING "hda_codec: Could not determine "
5228 "number of channels defaulting to DAC count\n");
c21ca4a8 5229 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 5230 }
e2aec171 5231 spec->init = stac92hd73xx_core_init;
c21ca4a8 5232 switch (num_dacs) {
e1f0d669 5233 case 0x3: /* 6 Channel */
d78d7a90 5234 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR		 5235 break;
5236 case 0x4: /* 8 Channel */
d78d7a90 5237 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR		 5238 break;
5239 case 0x5: /* 10 Channel */
d78d7a90
TI		 5240 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
5241 break;
c21ca4a8
TI		 5242 }
5243 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 5244
e1f0d669
MR		 5245 spec->aloopback_mask = 0x01;
5246 spec->aloopback_shift = 8;
5247
1cd2224c 5248 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 5249 spec->mux_nids = stac92hd73xx_mux_nids;
5250 spec->adc_nids = stac92hd73xx_adc_nids;
5251 spec->dmic_nids = stac92hd73xx_dmic_nids;
5252 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 5253 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR		 5254
5255 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
5256 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 5257 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816 5258
6479c631
TI		 5259 spec->num_caps = STAC92HD73XX_NUM_CAPS;
5260 spec->capvols = stac92hd73xx_capvols;
5261 spec->capsws = stac92hd73xx_capsws;
5262
a7662640 5263 switch (spec->board_config) {
6b3ab21e 5264 case STAC_DELL_EQ:
d654a660 5265 spec->init = dell_eq_core_init;
6b3ab21e 5266 /* fallthru */
661cd8fb
TI		 5267 case STAC_DELL_M6_AMIC:
5268 case STAC_DELL_M6_DMIC:
5269 case STAC_DELL_M6_BOTH:
2a9c7816 5270 spec->num_smuxes = 0;
c0cea0d0 5271 spec->eapd_switch = 0;
6b3ab21e 5272
661cd8fb
TI		 5273 switch (spec->board_config) {
5274 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 5275 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640
MR		 5276 spec->num_dmics = 0;
5277 break;
661cd8fb 5278 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 5279 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5280 spec->num_dmics = 1;
5281 break;
661cd8fb 5282 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI		 5283 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
5284 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5285 spec->num_dmics = 1;
5286 break;
5287 }
5288 break;
842ae638
TI		 5289 case STAC_ALIENWARE_M17X:
5290 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
5291 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
5292 spec->eapd_switch = 0;
5293 break;
a7662640
MR		 5294 default:
5295 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 5296 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 5297 spec->eapd_switch = 1;
5207e10e 5298 break;
a7662640 5299 }
af6ee302 5300 if (spec->board_config != STAC_92HD73XX_REF) {
b2c4f4d7
MR		 5301 /* GPIO0 High = Enable EAPD */
5302 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
5303 spec->gpio_data = 0x01;
5304 }
a7662640 5305
a64135a2
MR		 5306 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
5307 spec->pwr_nids = stac92hd73xx_pwr_nids;
5308
d9737751 5309 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 5310
5311 if (!err) {
5312 if (spec->board_config < 0) {
5313 printk(KERN_WARNING "hda_codec: No auto-config is "
5314 "available, default to model=ref\n");
5315 spec->board_config = STAC_92HD73XX_REF;
5316 goto again;
5317 }
5318 err = -EINVAL;
5319 }
5320
5321 if (err < 0) {
5322 stac92xx_free(codec);
5323 return err;
5324 }
5325
9e43f0de
TI		 5326 if (spec->board_config == STAC_92HD73XX_NO_JD)
5327 spec->hp_detect = 0;
5328
e1f0d669
MR		 5329 codec->patch_ops = stac92xx_patch_ops;
5330
2d34e1b3
TI		 5331 codec->proc_widget_hook = stac92hd7x_proc_hook;
5332
e1f0d669
MR		 5333 return 0;
5334}
5335
335e3b86
VK		 5336static int stac92hd83xxx_set_system_btl_amp(struct hda_codec *codec)
5337{
5338 if (codec->vendor_id != 0x111d7605 &&
5339 codec->vendor_id != 0x111d76d1)
5340 return 0;
5341
5342 switch (codec->subsystem_id) {
5343 case 0x103c1618:
5344 case 0x103c1619:
5345 case 0x103c161a:
5346 case 0x103c161b:
5347 case 0x103c161c:
5348 case 0x103c161d:
5349 case 0x103c161e:
5350 case 0x103c161f:
5351 case 0x103c1620:
5352 case 0x103c1621:
5353 case 0x103c1622:
5354 case 0x103c1623:
5355
5356 case 0x103c162a:
5357 case 0x103c162b:
5358
5359 case 0x103c1630:
5360 case 0x103c1631:
5361
5362 case 0x103c1633:
5363
5364 case 0x103c1635:
5365
5366 case 0x103c164f:
5367
5368 case 0x103c1676:
5369 case 0x103c1677:
5370 case 0x103c1678:
5371 case 0x103c1679:
5372 case 0x103c167a:
5373 case 0x103c167b:
5374 case 0x103c167c:
5375 case 0x103c167d:
5376 case 0x103c167e:
5377 case 0x103c167f:
5378 case 0x103c1680:
5379 case 0x103c1681:
5380 case 0x103c1682:
5381 case 0x103c1683:
5382 case 0x103c1684:
5383 case 0x103c1685:
5384 case 0x103c1686:
5385 case 0x103c1687:
5386 case 0x103c1688:
5387 case 0x103c1689:
5388 case 0x103c168a:
5389 case 0x103c168b:
5390 case 0x103c168c:
5391 case 0x103c168d:
5392 case 0x103c168e:
5393 case 0x103c168f:
5394 case 0x103c1690:
5395 case 0x103c1691:
5396 case 0x103c1692:
5397
5398 case 0x103c3587:
5399 case 0x103c3588:
5400 case 0x103c3589:
5401 case 0x103c358a:
5402
5403 case 0x103c3667:
5404 case 0x103c3668:
5405 /* set BTL amp level to 13.43dB for louder speaker output */
5406 return snd_hda_codec_write_cache(codec, codec->afg, 0,
5407 0x7F4, 0x14);
5408 }
5409 return 0;
5410}
5411
d0513fc6
MR		 5412static int patch_stac92hd83xxx(struct hda_codec *codec)
5413{
5414 struct sigmatel_spec *spec;
65557f35 5415 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 5416 int err;
65557f35 5417 int num_dacs;
d0513fc6
MR		 5418
5419 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5420 if (spec == NULL)
5421 return -ENOMEM;
5422
1cc9e8f4
C		 5423 /* reset pin power-down; Windows may leave these bits after reboot */
5424 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7EC, 0);
5425 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7ED, 0);
a252c81a 5426 codec->no_trigger_sense = 1;
d0513fc6 5427 codec->spec = spec;
1db7ccdb 5428 spec->linear_tone_beep = 0;
0ffa9807 5429 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6 5430 spec->digbeep_nid = 0x21;
ab5a6ebe
VK		 5431 spec->dmic_nids = stac92hd83xxx_dmic_nids;
5432 spec->dmux_nids = stac92hd83xxx_mux_nids;
667067d8
TI		 5433 spec->mux_nids = stac92hd83xxx_mux_nids;
5434 spec->num_muxes = ARRAY_SIZE(stac92hd83xxx_mux_nids);
d0513fc6 5435 spec->adc_nids = stac92hd83xxx_adc_nids;
7570ef18 5436 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
d0513fc6
MR		 5437 spec->pwr_nids = stac92hd83xxx_pwr_nids;
5438 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
5439 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 5440 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6
MR		 5441
5442 spec->init = stac92hd83xxx_core_init;
d0513fc6 5443 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
d0513fc6 5444 spec->pin_nids = stac92hd83xxx_pin_nids;
6479c631
TI		 5445 spec->num_caps = STAC92HD83XXX_NUM_CAPS;
5446 spec->capvols = stac92hd83xxx_capvols;
5447 spec->capsws = stac92hd83xxx_capsws;
5448
d0513fc6
MR		 5449 spec->board_config = snd_hda_check_board_config(codec,
5450 STAC_92HD83XXX_MODELS,
5451 stac92hd83xxx_models,
5452 stac92hd83xxx_cfg_tbl);
5453again:
330ee995 5454 if (spec->board_config < 0)
9a11f1aa
TI		 5455 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5456 codec->chip_name);
330ee995
TI		 5457 else
5458 stac92xx_set_config_regs(codec,
af9f341a 5459 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 5460
32ed3f46 5461 switch (codec->vendor_id) {
89feca1a
DH		 5462 case 0x111d76d1:
5463 case 0x111d76d9:
5464 spec->dmic_nids = stac92hd87b_dmic_nids;
5465 spec->num_dmics = stac92xx_connected_ports(codec,
5466 stac92hd87b_dmic_nids,
5467 STAC92HD87B_NUM_DMICS);
bdfe6f45
DH		 5468 spec->num_pins = ARRAY_SIZE(stac92hd88xxx_pin_nids);
5469 spec->pin_nids = stac92hd88xxx_pin_nids;
5470 spec->mono_nid = 0;
5471 spec->num_pwrs = 0;
5472 break;
36706005
CC		 5473 case 0x111d7666:
5474 case 0x111d7667:
5475 case 0x111d7668:
5476 case 0x111d7669:
bdfe6f45
DH		 5477 spec->num_dmics = stac92xx_connected_ports(codec,
5478 stac92hd88xxx_dmic_nids,
5479 STAC92HD88XXX_NUM_DMICS);
36706005
CC		 5480 spec->num_pins = ARRAY_SIZE(stac92hd88xxx_pin_nids);
5481 spec->pin_nids = stac92hd88xxx_pin_nids;
5482 spec->mono_nid = 0;
36706005
CC		 5483 spec->num_pwrs = 0;
5484 break;
32ed3f46 5485 case 0x111d7604:
a9694faa 5486 case 0x111d76d4:
32ed3f46 5487 case 0x111d7605:
ff2e7337 5488 case 0x111d76d5:
ab5a6ebe 5489 case 0x111d76e7:
32ed3f46
MR		 5490 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
5491 break;
5492 spec->num_pwrs = 0;
ab5a6ebe
VK		 5493 spec->num_dmics = stac92xx_connected_ports(codec,
5494 stac92hd83xxx_dmic_nids,
5495 STAC92HD83XXX_NUM_DMICS);
32ed3f46
MR		 5496 break;
5497 }
5498
b4e81876
TI		 5499 codec->patch_ops = stac92xx_patch_ops;
5500
dce17d4f 5501 if (find_mute_led_gpio(codec, 0))
e108c7b7
VK		 5502 snd_printd("mute LED gpio %d polarity %d\n",
5503 spec->gpio_led,
5504 spec->gpio_led_polarity);
5505
b4e81876
TI		 5506#ifdef CONFIG_SND_HDA_POWER_SAVE
5507 if (spec->gpio_led) {
5508 spec->gpio_mask |= spec->gpio_led;
5509 spec->gpio_dir |= spec->gpio_led;
5510 spec->gpio_data |= spec->gpio_led;
5511 /* register check_power_status callback. */
5512 codec->patch_ops.check_power_status =
c21bd025 5513 stac92xx_hp_check_power_status;
b4e81876
TI		 5514 }
5515#endif
5516
d0513fc6
MR		 5517 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
5518 if (!err) {
5519 if (spec->board_config < 0) {
5520 printk(KERN_WARNING "hda_codec: No auto-config is "
5521 "available, default to model=ref\n");
5522 spec->board_config = STAC_92HD83XXX_REF;
5523 goto again;
5524 }
5525 err = -EINVAL;
5526 }
5527
5528 if (err < 0) {
5529 stac92xx_free(codec);
5530 return err;
5531 }
5532
04b5efe5
CC		 5533 /* docking output support */
5534 num_dacs = snd_hda_get_connections(codec, 0xF,
8bb0ac55 5535 conn, STAC92HD83_DAC_COUNT + 1) - 1;
04b5efe5
CC		 5536 /* skip non-DAC connections */
5537 while (num_dacs >= 0 &&
5538 (get_wcaps_type(get_wcaps(codec, conn[num_dacs]))
5539 != AC_WID_AUD_OUT))
5540 num_dacs--;
5541 /* set port E and F to select the last DAC */
5542 if (num_dacs >= 0) {
5543 snd_hda_codec_write_cache(codec, 0xE, 0,
5544 AC_VERB_SET_CONNECT_SEL, num_dacs);
5545 snd_hda_codec_write_cache(codec, 0xF, 0,
8bb0ac55 5546 AC_VERB_SET_CONNECT_SEL, num_dacs);
04b5efe5 5547 }
8bb0ac55 5548
335e3b86
VK		 5549 stac92hd83xxx_set_system_btl_amp(codec);
5550
2d34e1b3
TI		 5551 codec->proc_widget_hook = stac92hd_proc_hook;
5552
d0513fc6
MR		 5553 return 0;
5554}
5555
6df703ae
HRK		 5556static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
5557 hda_nid_t dig0pin)
5558{
5559 struct sigmatel_spec *spec = codec->spec;
5560 int idx;
5561
5562 for (idx = 0; idx < spec->num_pins; idx++)
5563 if (spec->pin_nids[idx] == dig0pin)
5564 break;
5565 if ((idx + 2) >= spec->num_pins)
5566 return 0;
5567
5568 /* dig1pin case */
330ee995 5569 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5570 return 2;
5571
5572 /* dig0pin + dig2pin case */
330ee995 5573 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 5574 return 2;
330ee995 5575 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5576 return 1;
5577 else
5578 return 0;
5579}
5580
75d1aeb9
TI		 5581/* HP dv7 bass switch - GPIO5 */
5582#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
5583static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
5584 struct snd_ctl_elem_value *ucontrol)
5585{
5586 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5587 struct sigmatel_spec *spec = codec->spec;
5588 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
5589 return 0;
5590}
5591
5592static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
5593 struct snd_ctl_elem_value *ucontrol)
5594{
5595 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5596 struct sigmatel_spec *spec = codec->spec;
5597 unsigned int gpio_data;
5598
5599 gpio_data = (spec->gpio_data & ~0x20) |
5600 (ucontrol->value.integer.value[0] ? 0x20 : 0);
5601 if (gpio_data == spec->gpio_data)
5602 return 0;
5603 spec->gpio_data = gpio_data;
5604 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
5605 return 1;
5606}
5607
5608static struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
5609 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5610 .info = stac_hp_bass_gpio_info,
5611 .get = stac_hp_bass_gpio_get,
5612 .put = stac_hp_bass_gpio_put,
5613};
5614
5615static int stac_add_hp_bass_switch(struct hda_codec *codec)
5616{
5617 struct sigmatel_spec *spec = codec->spec;
5618
5619 if (!stac_control_new(spec, &stac_hp_bass_sw_ctrl,
5620 "Bass Speaker Playback Switch", 0))
5621 return -ENOMEM;
5622
5623 spec->gpio_mask |= 0x20;
5624 spec->gpio_dir |= 0x20;
5625 spec->gpio_data |= 0x20;
5626 return 0;
5627}
5628
e035b841
MR		 5629static int patch_stac92hd71bxx(struct hda_codec *codec)
5630{
5631 struct sigmatel_spec *spec;
ca8d33fc 5632 struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
5bdaaada 5633 unsigned int pin_cfg;
e035b841
MR		 5634 int err = 0;
5635
5636 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5637 if (spec == NULL)
5638 return -ENOMEM;
5639
a252c81a 5640 codec->no_trigger_sense = 1;
e035b841 5641 codec->spec = spec;
1b0e372d 5642 spec->linear_tone_beep = 0;
8daaaa97 5643 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK		 5644 spec->num_pins = STAC92HD71BXX_NUM_PINS;
5645 switch (codec->vendor_id) {
5646 case 0x111d76b6:
5647 case 0x111d76b7:
5648 spec->pin_nids = stac92hd71bxx_pin_nids_4port;
5649 break;
5650 case 0x111d7603:
5651 case 0x111d7608:
5652 /* On 92HD75Bx 0x27 isn't a pin nid */
5653 spec->num_pins--;
5654 /* fallthrough */
5655 default:
5656 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5657 }
aafc4412 5658 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 5659 spec->board_config = snd_hda_check_board_config(codec,
5660 STAC_92HD71BXX_MODELS,
5661 stac92hd71bxx_models,
5662 stac92hd71bxx_cfg_tbl);
5663again:
330ee995 5664 if (spec->board_config < 0)
9a11f1aa
TI		 5665 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5666 codec->chip_name);
330ee995
TI		 5667 else
5668 stac92xx_set_config_regs(codec,
af9f341a 5669 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5670
fc64b26c 5671 if (spec->board_config != STAC_92HD71BXX_REF) {
41c3b648
TI		 5672 /* GPIO0 = EAPD */
5673 spec->gpio_mask = 0x01;
5674 spec->gpio_dir = 0x01;
5675 spec->gpio_data = 0x01;
5676 }
5677
6df703ae
HRK		 5678 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5679 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5680
6479c631
TI		 5681 spec->num_caps = STAC92HD71BXX_NUM_CAPS;
5682 spec->capvols = stac92hd71bxx_capvols;
5683 spec->capsws = stac92hd71bxx_capsws;
5684
541eee87
MR		 5685 switch (codec->vendor_id) {
5686 case 0x111d76b6: /* 4 Port without Analog Mixer */
5687 case 0x111d76b7:
23c7b521
HRK		 5688 unmute_init++;
5689 /* fallthru */
541eee87
MR		 5690 case 0x111d76b4: /* 6 Port without Analog Mixer */
5691 case 0x111d76b5:
541eee87 5692 spec->init = stac92hd71bxx_core_init;
0ffa9807 5693 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5694 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5695 stac92hd71bxx_dmic_nids,
5696 STAC92HD71BXX_NUM_DMICS);
541eee87 5697 break;
aafc4412 5698 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 5699 switch (spec->board_config) {
5700 case STAC_HP_M4:
72474be6 5701 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 5702 err = stac_add_event(spec, codec->afg,
5703 STAC_VREF_EVENT, 0x02);
5704 if (err < 0)
5705 return err;
c5d08bb5 5706 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 5707 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
5708 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 5709 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 5710 AC_USRSP_EN | err);
72474be6
MR		 5711 spec->gpio_mask |= 0x02;
5712 break;
5713 }
8daaaa97 5714 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5715 (codec->revision_id & 0xf) == 1)
8daaaa97 5716 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5717
aafc4412
MR		 5718 /* no output amps */
5719 spec->num_pwrs = 0;
aafc4412 5720 /* disable VSW */
26a27980 5721 spec->init = stac92hd71bxx_core_init;
ca8d33fc 5722 unmute_init++;
330ee995
TI		 5723 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
5724 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
6df703ae 5725 stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS - 1] = 0;
ab5a6ebe 5726 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5727 stac92hd71bxx_dmic_nids,
5728 STAC92HD71BXX_NUM_DMICS - 1);
aafc4412
MR		 5729 break;
5730 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5731 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5732 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5733
aafc4412
MR		 5734 /* no output amps */
5735 spec->num_pwrs = 0;
5736 /* fallthru */
541eee87 5737 default:
26a27980 5738 spec->init = stac92hd71bxx_core_init;
0ffa9807 5739 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5740 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5741 stac92hd71bxx_dmic_nids,
5742 STAC92HD71BXX_NUM_DMICS);
5207e10e 5743 break;
541eee87
MR		 5744 }
5745
ca8d33fc
MR		 5746 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5747 snd_hda_sequence_write_cache(codec, unmute_init);
5748
b20f3b83
TI		 5749 /* Some HP machines seem to have unstable codec communications
5750 * especially with ATI fglrx driver. For recovering from the
5751 * CORB/RIRB stall, allow the BUS reset and keep always sync
5752 */
5753 if (spec->board_config == STAC_HP_DV5) {
5754 codec->bus->sync_write = 1;
5755 codec->bus->allow_bus_reset = 1;
5756 }
5757
d78d7a90 5758 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 5759 spec->aloopback_mask = 0x50;
541eee87
MR		 5760 spec->aloopback_shift = 0;
5761
8daaaa97 5762 spec->powerdown_adcs = 1;
1cd2224c 5763 spec->digbeep_nid = 0x26;
e035b841
MR		 5764 spec->mux_nids = stac92hd71bxx_mux_nids;
5765 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5766 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5767 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 5768
5769 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5770 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
5207e10e 5771 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
6df703ae 5772 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5773
d38cce70
KG		 5774 snd_printdd("Found board config: %d\n", spec->board_config);
5775
6a14f585
MR		 5776 switch (spec->board_config) {
5777 case STAC_HP_M4:
6a14f585 5778 /* enable internal microphone */
330ee995 5779 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR		 5780 stac92xx_auto_set_pinctl(codec, 0x0e,
5781 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 5782 /* fallthru */
5783 case STAC_DELL_M4_2:
5784 spec->num_dmics = 0;
5785 spec->num_smuxes = 0;
5786 spec->num_dmuxes = 0;
5787 break;
5788 case STAC_DELL_M4_1:
5789 case STAC_DELL_M4_3:
5790 spec->num_dmics = 1;
5791 spec->num_smuxes = 0;
ea18aa46 5792 spec->num_dmuxes = 1;
6a14f585 5793 break;
514bf54c
JG		 5794 case STAC_HP_DV4_1222NR:
5795 spec->num_dmics = 1;
5796 /* I don't know if it needs 1 or 2 smuxes - will wait for
5797 * bug reports to fix if needed
5798 */
5799 spec->num_smuxes = 1;
5800 spec->num_dmuxes = 1;
514bf54c 5801 /* fallthrough */
2a6ce6e5
TI		 5802 case STAC_HP_DV4:
5803 spec->gpio_led = 0x01;
5804 /* fallthrough */
e2ea57a8 5805 case STAC_HP_DV5:
330ee995 5806 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8 5807 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
6e34c033
TI		 5808 /* HP dv6 gives the headphone pin as a line-out. Thus we
5809 * need to set hp_detect flag here to force to enable HP
5810 * detection.
5811 */
5812 spec->hp_detect = 1;
e2ea57a8 5813 break;
ae6241fb
CP		 5814 case STAC_HP_HDX:
5815 spec->num_dmics = 1;
5816 spec->num_dmuxes = 1;
5817 spec->num_smuxes = 1;
26ebe0a2 5818 spec->gpio_led = 0x08;
86d190e7
TI		 5819 break;
5820 }
443e26d0 5821
c357aab0 5822 if (hp_blike_system(codec->subsystem_id)) {
5bdaaada
VK		 5823 pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
5824 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
5825 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
5826 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
5827 /* It was changed in the BIOS to just satisfy MS DTM.
5828 * Lets turn it back into slaved HP
5829 */
5830 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
5831 | (AC_JACK_HP_OUT <<
5832 AC_DEFCFG_DEVICE_SHIFT);
5833 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
5834 | AC_DEFCFG_SEQUENCE)))
5835 | 0x1f;
5836 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
5837 }
5838 }
5839
dce17d4f 5840 if (find_mute_led_gpio(codec, 1))
c357aab0
VK		 5841 snd_printd("mute LED gpio %d polarity %d\n",
5842 spec->gpio_led,
5843 spec->gpio_led_polarity);
5bdaaada 5844
86d190e7
TI		 5845#ifdef CONFIG_SND_HDA_POWER_SAVE
5846 if (spec->gpio_led) {
5847 spec->gpio_mask |= spec->gpio_led;
5848 spec->gpio_dir |= spec->gpio_led;
5849 spec->gpio_data |= spec->gpio_led;
443e26d0 5850 /* register check_power_status callback. */
6fce61ae 5851 codec->patch_ops.check_power_status =
86d190e7
TI		 5852 stac92xx_hp_check_power_status;
5853 }
443e26d0 5854#endif
6a14f585 5855
c21ca4a8 5856 spec->multiout.dac_nids = spec->dac_nids;
e035b841 5857
29d4ab4d 5858 err = stac92xx_parse_auto_config(codec, 0x21, 0);
e035b841
MR		 5859 if (!err) {
5860 if (spec->board_config < 0) {
5861 printk(KERN_WARNING "hda_codec: No auto-config is "
5862 "available, default to model=ref\n");
5863 spec->board_config = STAC_92HD71BXX_REF;
5864 goto again;
5865 }
5866 err = -EINVAL;
5867 }
5868
5869 if (err < 0) {
5870 stac92xx_free(codec);
5871 return err;
5872 }
5873
75d1aeb9 5874 /* enable bass on HP dv7 */
2a6ce6e5
TI		 5875 if (spec->board_config == STAC_HP_DV4 ||
5876 spec->board_config == STAC_HP_DV5) {
75d1aeb9
TI		 5877 unsigned int cap;
5878 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
5879 cap &= AC_GPIO_IO_COUNT;
5880 if (cap >= 6)
5881 stac_add_hp_bass_switch(codec);
5882 }
5883
2d34e1b3
TI		 5884 codec->proc_widget_hook = stac92hd7x_proc_hook;
5885
e035b841 5886 return 0;
86d190e7 5887}
e035b841 5888
2f2f4251
M		 5889static int patch_stac922x(struct hda_codec *codec)
5890{
5891 struct sigmatel_spec *spec;
c7d4b2fa 5892 int err;
2f2f4251 5893
e560d8d8 5894 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5895 if (spec == NULL)
5896 return -ENOMEM;
5897
a252c81a 5898 codec->no_trigger_sense = 1;
2f2f4251 5899 codec->spec = spec;
1b0e372d 5900 spec->linear_tone_beep = 1;
a4eed138 5901 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5902 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 5903 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5904 stac922x_models,
5905 stac922x_cfg_tbl);
536319af 5906 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 5907 spec->gpio_mask = spec->gpio_dir = 0x03;
5908 spec->gpio_data = 0x03;
3fc24d85
TI		 5909 /* Intel Macs have all same PCI SSID, so we need to check
5910 * codec SSID to distinguish the exact models
5911 */
6f0778d8 5912 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5913 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 5914
5915 case 0x106b0800:
5916 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5917 break;
5d5d3bc3
IZ		 5918 case 0x106b0600:
5919 case 0x106b0700:
5920 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5921 break;
5d5d3bc3
IZ		 5922 case 0x106b0e00:
5923 case 0x106b0f00:
5924 case 0x106b1600:
5925 case 0x106b1700:
5926 case 0x106b0200:
5927 case 0x106b1e00:
5928 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5929 break;
5d5d3bc3
IZ		 5930 case 0x106b1a00:
5931 case 0x00000100:
5932 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5933 break;
5d5d3bc3
IZ		 5934 case 0x106b0a00:
5935 case 0x106b2200:
5936 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5937 break;
536319af
NB		 5938 default:
5939 spec->board_config = STAC_INTEL_MAC_V3;
5940 break;
3fc24d85
TI		 5941 }
5942 }
5943
9e507abd 5944 again:
330ee995 5945 if (spec->board_config < 0)
9a11f1aa
TI		 5946 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5947 codec->chip_name);
330ee995
TI		 5948 else
5949 stac92xx_set_config_regs(codec,
af9f341a 5950 stac922x_brd_tbl[spec->board_config]);
2f2f4251 5951
c7d4b2fa
M		 5952 spec->adc_nids = stac922x_adc_nids;
5953 spec->mux_nids = stac922x_mux_nids;
2549413e 5954 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5955 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5956 spec->num_dmics = 0;
a64135a2 5957 spec->num_pwrs = 0;
c7d4b2fa
M		 5958
5959 spec->init = stac922x_core_init;
6479c631
TI		 5960
5961 spec->num_caps = STAC922X_NUM_CAPS;
5962 spec->capvols = stac922x_capvols;
5963 spec->capsws = stac922x_capsws;
c7d4b2fa
M		 5964
5965 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5966
3cc08dc6 5967 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 5968 if (!err) {
5969 if (spec->board_config < 0) {
5970 printk(KERN_WARNING "hda_codec: No auto-config is "
5971 "available, default to model=ref\n");
5972 spec->board_config = STAC_D945_REF;
5973 goto again;
5974 }
5975 err = -EINVAL;
5976 }
3cc08dc6
MP		 5977 if (err < 0) {
5978 stac92xx_free(codec);
5979 return err;
5980 }
5981
5982 codec->patch_ops = stac92xx_patch_ops;
5983
807a4636
TI		 5984 /* Fix Mux capture level; max to 2 */
5985 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5986 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5987 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5988 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5989 (0 << AC_AMPCAP_MUTE_SHIFT));
5990
3cc08dc6
MP		 5991 return 0;
5992}
5993
5994static int patch_stac927x(struct hda_codec *codec)
5995{
5996 struct sigmatel_spec *spec;
5997 int err;
5998
5999 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6000 if (spec == NULL)
6001 return -ENOMEM;
6002
a252c81a 6003 codec->no_trigger_sense = 1;
3cc08dc6 6004 codec->spec = spec;
1b0e372d 6005 spec->linear_tone_beep = 1;
45c1d85b 6006 codec->slave_dig_outs = stac927x_slave_dig_outs;
a4eed138 6007 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 6008 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 6009 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
6010 stac927x_models,
6011 stac927x_cfg_tbl);
9e507abd 6012 again:
330ee995 6013 if (spec->board_config < 0)
9a11f1aa
TI		 6014 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6015 codec->chip_name);
330ee995
TI		 6016 else
6017 stac92xx_set_config_regs(codec,
af9f341a 6018 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 6019
1cd2224c 6020 spec->digbeep_nid = 0x23;
8e9068b1
MR		 6021 spec->adc_nids = stac927x_adc_nids;
6022 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
6023 spec->mux_nids = stac927x_mux_nids;
6024 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 6025 spec->smux_nids = stac927x_smux_nids;
6026 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 6027 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 6028 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 6029 spec->multiout.dac_nids = spec->dac_nids;
6030
af6ee302
TI		 6031 if (spec->board_config != STAC_D965_REF) {
6032 /* GPIO0 High = Enable EAPD */
6033 spec->eapd_mask = spec->gpio_mask = 0x01;
6034 spec->gpio_dir = spec->gpio_data = 0x01;
6035 }
6036
81d3dbde 6037 switch (spec->board_config) {
93ed1503 6038 case STAC_D965_3ST:
93ed1503 6039 case STAC_D965_5ST:
8e9068b1 6040 /* GPIO0 High = Enable EAPD */
8e9068b1 6041 spec->num_dmics = 0;
93ed1503 6042 spec->init = d965_core_init;
81d3dbde 6043 break;
8e9068b1 6044 case STAC_DELL_BIOS:
780c8be4
MR		 6045 switch (codec->subsystem_id) {
6046 case 0x10280209:
6047 case 0x1028022e:
6048 /* correct the device field to SPDIF out */
330ee995 6049 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4 6050 break;
86d190e7 6051 }
03d7ca17 6052 /* configure the analog microphone on some laptops */
330ee995 6053 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 6054 /* correct the front output jack as a hp out */
330ee995 6055 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 6056 /* correct the front input jack as a mic */
330ee995 6057 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 6058 /* fallthru */
8e9068b1 6059 case STAC_DELL_3ST:
af6ee302
TI		 6060 if (codec->subsystem_id != 0x1028022f) {
6061 /* GPIO2 High = Enable EAPD */
6062 spec->eapd_mask = spec->gpio_mask = 0x04;
6063 spec->gpio_dir = spec->gpio_data = 0x04;
6064 }
7f16859a
MR		 6065 spec->dmic_nids = stac927x_dmic_nids;
6066 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 6067
ccca7cdc 6068 spec->init = dell_3st_core_init;
8e9068b1 6069 spec->dmux_nids = stac927x_dmux_nids;
1697055e 6070 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a 6071 break;
54930531
TI		 6072 case STAC_927X_VOLKNOB:
6073 spec->num_dmics = 0;
6074 spec->init = stac927x_volknob_core_init;
6075 break;
7f16859a 6076 default:
8e9068b1 6077 spec->num_dmics = 0;
8e9068b1 6078 spec->init = stac927x_core_init;
af6ee302 6079 break;
7f16859a
MR		 6080 }
6081
6479c631
TI		 6082 spec->num_caps = STAC927X_NUM_CAPS;
6083 spec->capvols = stac927x_capvols;
6084 spec->capsws = stac927x_capsws;
6085
a64135a2 6086 spec->num_pwrs = 0;
d78d7a90 6087 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR		 6088 spec->aloopback_mask = 0x40;
6089 spec->aloopback_shift = 0;
c0cea0d0 6090 spec->eapd_switch = 1;
8e9068b1 6091
3cc08dc6 6092 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 6093 if (!err) {
6094 if (spec->board_config < 0) {
6095 printk(KERN_WARNING "hda_codec: No auto-config is "
6096 "available, default to model=ref\n");
6097 spec->board_config = STAC_D965_REF;
6098 goto again;
6099 }
6100 err = -EINVAL;
6101 }
c7d4b2fa
M		 6102 if (err < 0) {
6103 stac92xx_free(codec);
6104 return err;
6105 }
2f2f4251
M		 6106
6107 codec->patch_ops = stac92xx_patch_ops;
6108
2d34e1b3
TI		 6109 codec->proc_widget_hook = stac927x_proc_hook;
6110
52987656
TI		 6111 /*
6112 * !!FIXME!!
6113 * The STAC927x seem to require fairly long delays for certain
6114 * command sequences. With too short delays (even if the answer
6115 * is set to RIRB properly), it results in the silence output
6116 * on some hardwares like Dell.
6117 *
6118 * The below flag enables the longer delay (see get_response
6119 * in hda_intel.c).
6120 */
6121 codec->bus->needs_damn_long_delay = 1;
6122
e28d8322
TI		 6123 /* no jack detecion for ref-no-jd model */
6124 if (spec->board_config == STAC_D965_REF_NO_JD)
6125 spec->hp_detect = 0;
6126
2f2f4251
M		 6127 return 0;
6128}
6129
f3302a59
MP		 6130static int patch_stac9205(struct hda_codec *codec)
6131{
6132 struct sigmatel_spec *spec;
8259980e 6133 int err;
f3302a59
MP		 6134
6135 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6136 if (spec == NULL)
6137 return -ENOMEM;
6138
a252c81a 6139 codec->no_trigger_sense = 1;
f3302a59 6140 codec->spec = spec;
1b0e372d 6141 spec->linear_tone_beep = 1;
a4eed138 6142 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 6143 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 6144 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
6145 stac9205_models,
6146 stac9205_cfg_tbl);
9e507abd 6147 again:
330ee995 6148 if (spec->board_config < 0)
9a11f1aa
TI		 6149 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6150 codec->chip_name);
330ee995
TI		 6151 else
6152 stac92xx_set_config_regs(codec,
af9f341a 6153 stac9205_brd_tbl[spec->board_config]);
f3302a59 6154
1cd2224c 6155 spec->digbeep_nid = 0x23;
f3302a59 6156 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 6157 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 6158 spec->mux_nids = stac9205_mux_nids;
2549413e 6159 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 6160 spec->smux_nids = stac9205_smux_nids;
6161 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 6162 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 6163 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 6164 spec->dmux_nids = stac9205_dmux_nids;
1697055e 6165 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 6166 spec->num_pwrs = 0;
f3302a59
MP		 6167
6168 spec->init = stac9205_core_init;
d78d7a90 6169 spec->aloopback_ctl = stac9205_loopback;
f3302a59 6170
6479c631
TI		 6171 spec->num_caps = STAC9205_NUM_CAPS;
6172 spec->capvols = stac9205_capvols;
6173 spec->capsws = stac9205_capsws;
6174
e1f0d669
MR		 6175 spec->aloopback_mask = 0x40;
6176 spec->aloopback_shift = 0;
d9a4268e
TI		 6177 /* Turn on/off EAPD per HP plugging */
6178 if (spec->board_config != STAC_9205_EAPD)
6179 spec->eapd_switch = 1;
f3302a59 6180 spec->multiout.dac_nids = spec->dac_nids;
87d48363 6181
ae0a8ed8 6182 switch (spec->board_config){
ae0a8ed8 6183 case STAC_9205_DELL_M43:
87d48363 6184 /* Enable SPDIF in/out */
330ee995
TI		 6185 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
6186 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 6187
4fe5195c 6188 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 6189 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
6190 if (err < 0)
6191 return err;
c5d08bb5 6192 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 6193 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
6194 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 6195 AC_VERB_SET_UNSOLICITED_ENABLE,
6196 AC_USRSP_EN | err);
4fe5195c
MR		 6197
6198 spec->gpio_dir = 0x0b;
0fc9dec4 6199 spec->eapd_mask = 0x01;
4fe5195c
MR		 6200 spec->gpio_mask = 0x1b;
6201 spec->gpio_mute = 0x10;
e2e7d624 6202 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 6203 * GPIO3 Low = DRM
87d48363 6204 */
4fe5195c 6205 spec->gpio_data = 0x01;
ae0a8ed8 6206 break;
b2c4f4d7
MR		 6207 case STAC_9205_REF:
6208 /* SPDIF-In enabled */
6209 break;
ae0a8ed8
TD		 6210 default:
6211 /* GPIO0 High = EAPD */
0fc9dec4 6212 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 6213 spec->gpio_data = 0x01;
ae0a8ed8
TD		 6214 break;
6215 }
33382403 6216
f3302a59 6217 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 6218 if (!err) {
6219 if (spec->board_config < 0) {
6220 printk(KERN_WARNING "hda_codec: No auto-config is "
6221 "available, default to model=ref\n");
6222 spec->board_config = STAC_9205_REF;
6223 goto again;
6224 }
6225 err = -EINVAL;
6226 }
f3302a59
MP		 6227 if (err < 0) {
6228 stac92xx_free(codec);
6229 return err;
6230 }
6231
6232 codec->patch_ops = stac92xx_patch_ops;
6233
2d34e1b3
TI		 6234 codec->proc_widget_hook = stac9205_proc_hook;
6235
f3302a59
MP		 6236 return 0;
6237}
6238
db064e50 6239/*
6d859065 6240 * STAC9872 hack
db064e50
TI		 6241 */
6242
1e137f92 6243static struct hda_verb stac9872_core_init[] = {
1624cb9a 6244 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 6245 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
6246 {}
6247};
6248
caa10b6e
TI		 6249static hda_nid_t stac9872_pin_nids[] = {
6250 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
6251 0x11, 0x13, 0x14,
6252};
6253
6254static hda_nid_t stac9872_adc_nids[] = {
6255 0x8 /*,0x6*/
6256};
6257
6258static hda_nid_t stac9872_mux_nids[] = {
6259 0x15
6260};
6261
6479c631
TI		 6262static unsigned long stac9872_capvols[] = {
6263 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT),
6264};
6265#define stac9872_capsws stac9872_capvols
6266
307282c8
TI		 6267static unsigned int stac9872_vaio_pin_configs[9] = {
6268 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
6269 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
6270 0x90a7013e
6271};
6272
ea734963 6273static const char * const stac9872_models[STAC_9872_MODELS] = {
307282c8
TI		 6274 [STAC_9872_AUTO] = "auto",
6275 [STAC_9872_VAIO] = "vaio",
6276};
6277
6278static unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
6279 [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
6280};
6281
6282static struct snd_pci_quirk stac9872_cfg_tbl[] = {
b04add95
TI		 6283 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
6284 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 6285 {} /* terminator */
6286};
6287
6d859065 6288static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 6289{
6290 struct sigmatel_spec *spec;
1e137f92 6291 int err;
db064e50 6292
db064e50
TI		 6293 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6294 if (spec == NULL)
6295 return -ENOMEM;
a252c81a 6296 codec->no_trigger_sense = 1;
db064e50 6297 codec->spec = spec;
1b0e372d 6298 spec->linear_tone_beep = 1;
b04add95
TI		 6299 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
6300 spec->pin_nids = stac9872_pin_nids;
caa10b6e
TI		 6301
6302 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
6303 stac9872_models,
6304 stac9872_cfg_tbl);
307282c8 6305 if (spec->board_config < 0)
9a11f1aa
TI		 6306 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6307 codec->chip_name);
307282c8
TI		 6308 else
6309 stac92xx_set_config_regs(codec,
6310 stac9872_brd_tbl[spec->board_config]);
db064e50 6311
1e137f92
TI		 6312 spec->multiout.dac_nids = spec->dac_nids;
6313 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
6314 spec->adc_nids = stac9872_adc_nids;
6315 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
6316 spec->mux_nids = stac9872_mux_nids;
1e137f92 6317 spec->init = stac9872_core_init;
6479c631
TI		 6318 spec->num_caps = 1;
6319 spec->capvols = stac9872_capvols;
6320 spec->capsws = stac9872_capsws;
1e137f92
TI		 6321
6322 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
6323 if (err < 0) {
6324 stac92xx_free(codec);
6325 return -EINVAL;
6326 }
6327 spec->input_mux = &spec->private_imux;
6328 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI		 6329 return 0;
6330}
6331
6332
2f2f4251
M		 6333/*
6334 * patch entries
6335 */
1289e9e8 6336static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 6337 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
6338 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
6339 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
6340 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
6341 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
6342 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
6343 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 6344 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
6345 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
6346 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
6347 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
6348 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
6349 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 6350 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
6351 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
6352 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
6353 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
6354 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
6355 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
6356 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
6357 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
6358 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
6359 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 6360 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
6361 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
6362 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
6363 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
6364 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
6365 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 6366 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
6367 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 6368 /* The following does not take into account .id=0x83847661 when subsys =
6369 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
6370 * currently not fully supported.
6371 */
6372 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
6373 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
6374 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 6375 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP		 6376 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
6377 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
6378 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
6379 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
6380 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
6381 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
6382 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
6383 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 6384 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6 6385 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
a9694faa 6386 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
d0513fc6 6387 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 6388 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
8a345a04
CC		 6389 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
6390 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
36706005
CC		 6391 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
6392 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
6393 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
6394 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
aafc4412 6395 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 6396 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
6397 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 6398 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 6399 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6400 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6401 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6402 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6403 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6404 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6405 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
6406 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4d8ec5f3
CC		 6407 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
6408 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
6409 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
6410 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
6411 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
6412 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
6413 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
6414 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
6415 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
6416 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
6417 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
6418 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
6419 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
6420 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
6421 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
ab5a6ebe
VK		 6422 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
6423 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
2f2f4251
M		 6424 {} /* terminator */
6425};
1289e9e8
TI		 6426
6427MODULE_ALIAS("snd-hda-codec-id:8384*");
6428MODULE_ALIAS("snd-hda-codec-id:111d*");
6429
6430MODULE_LICENSE("GPL");
6431MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
6432
6433static struct hda_codec_preset_list sigmatel_list = {
6434 .preset = snd_hda_preset_sigmatel,
6435 .owner = THIS_MODULE,
6436};
6437
6438static int __init patch_sigmatel_init(void)
6439{
6440 return snd_hda_add_codec_preset(&sigmatel_list);
6441}
6442
6443static void __exit patch_sigmatel_exit(void)
6444{
6445 snd_hda_delete_codec_preset(&sigmatel_list);
6446}
6447
6448module_init(patch_sigmatel_init)
6449module_exit(patch_sigmatel_exit)
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