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[mirror_ubuntu-zesty-kernel.git] / sound / pci / hda / patch_sigmatel.c
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2f2f4251
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1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
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8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
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27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
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34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
TI
38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
f5fcc13c
TI
45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
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48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
58eec423
MCC
58 STAC_9200_M4,
59 STAC_9200_M4_2,
117f257d 60 STAC_9200_PANASONIC,
f5fcc13c
TI
61 STAC_9200_MODELS
62};
63
64enum {
65 STAC_9205_REF,
dfe495d0 66 STAC_9205_DELL_M42,
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67 STAC_9205_DELL_M43,
68 STAC_9205_DELL_M44,
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TI
69 STAC_9205_MODELS
70};
71
e1f0d669 72enum {
9e43f0de 73 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 74 STAC_92HD73XX_REF,
661cd8fb
TI
75 STAC_DELL_M6_AMIC,
76 STAC_DELL_M6_DMIC,
77 STAC_DELL_M6_BOTH,
6b3ab21e 78 STAC_DELL_EQ,
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79 STAC_92HD73XX_MODELS
80};
81
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82enum {
83 STAC_92HD83XXX_REF,
84 STAC_92HD83XXX_MODELS
85};
86
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87enum {
88 STAC_92HD71BXX_REF,
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89 STAC_DELL_M4_1,
90 STAC_DELL_M4_2,
3a7abfd2 91 STAC_DELL_M4_3,
6a14f585 92 STAC_HP_M4,
1b0652eb 93 STAC_HP_DV5,
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94 STAC_92HD71BXX_MODELS
95};
96
8e21c34c
TD
97enum {
98 STAC_925x_REF,
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99 STAC_M1,
100 STAC_M1_2,
101 STAC_M2,
8e21c34c 102 STAC_M2_2,
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MCC
103 STAC_M3,
104 STAC_M5,
105 STAC_M6,
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TD
106 STAC_925x_MODELS
107};
108
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TI
109enum {
110 STAC_D945_REF,
111 STAC_D945GTP3,
112 STAC_D945GTP5,
5d5d3bc3
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113 STAC_INTEL_MAC_V1,
114 STAC_INTEL_MAC_V2,
115 STAC_INTEL_MAC_V3,
116 STAC_INTEL_MAC_V4,
117 STAC_INTEL_MAC_V5,
536319af
NB
118 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
119 * is given, one of the above models will be
120 * chosen according to the subsystem id. */
dfe495d0 121 /* for backward compatibility */
f5fcc13c 122 STAC_MACMINI,
3fc24d85 123 STAC_MACBOOK,
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NB
124 STAC_MACBOOK_PRO_V1,
125 STAC_MACBOOK_PRO_V2,
f16928fb 126 STAC_IMAC_INTEL,
0dae0f83 127 STAC_IMAC_INTEL_20,
8c650087 128 STAC_ECS_202,
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129 STAC_922X_DELL_D81,
130 STAC_922X_DELL_D82,
131 STAC_922X_DELL_M81,
132 STAC_922X_DELL_M82,
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133 STAC_922X_MODELS
134};
135
136enum {
e28d8322 137 STAC_D965_REF_NO_JD, /* no jack-detection */
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138 STAC_D965_REF,
139 STAC_D965_3ST,
140 STAC_D965_5ST,
4ff076e5 141 STAC_DELL_3ST,
8e9068b1 142 STAC_DELL_BIOS,
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TI
143 STAC_927X_MODELS
144};
403d1944 145
74aeaabc
MR
146struct sigmatel_event {
147 hda_nid_t nid;
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TI
148 unsigned char type;
149 unsigned char tag;
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MR
150 int data;
151};
152
153struct sigmatel_jack {
154 hda_nid_t nid;
155 int type;
156 struct snd_jack *jack;
157};
158
2f2f4251 159struct sigmatel_spec {
c8b6bf9b 160 struct snd_kcontrol_new *mixers[4];
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161 unsigned int num_mixers;
162
403d1944 163 int board_config;
c0cea0d0 164 unsigned int eapd_switch: 1;
c7d4b2fa 165 unsigned int surr_switch: 1;
3cc08dc6 166 unsigned int alt_switch: 1;
82bc955f 167 unsigned int hp_detect: 1;
00ef50c2 168 unsigned int spdif_mute: 1;
7c7767eb 169 unsigned int check_volume_offset:1;
c7d4b2fa 170
4fe5195c 171 /* gpio lines */
0fc9dec4 172 unsigned int eapd_mask;
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MR
173 unsigned int gpio_mask;
174 unsigned int gpio_dir;
175 unsigned int gpio_data;
176 unsigned int gpio_mute;
177
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178 /* stream */
179 unsigned int stream_delay;
180
4fe5195c 181 /* analog loopback */
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182 unsigned char aloopback_mask;
183 unsigned char aloopback_shift;
8259980e 184
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185 /* power management */
186 unsigned int num_pwrs;
d0513fc6 187 unsigned int *pwr_mapping;
a64135a2 188 hda_nid_t *pwr_nids;
b76c850f 189 hda_nid_t *dac_list;
a64135a2 190
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MR
191 /* jack detection */
192 struct snd_array jacks;
193
194 /* events */
195 struct snd_array events;
196
2f2f4251 197 /* playback */
b22b4821 198 struct hda_input_mux *mono_mux;
89385035 199 struct hda_input_mux *amp_mux;
b22b4821 200 unsigned int cur_mmux;
2f2f4251 201 struct hda_multi_out multiout;
3cc08dc6 202 hda_nid_t dac_nids[5];
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TI
203 hda_nid_t hp_dacs[5];
204 hda_nid_t speaker_dacs[5];
2f2f4251 205
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TI
206 int volume_offset;
207
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208 /* capture */
209 hda_nid_t *adc_nids;
2f2f4251 210 unsigned int num_adcs;
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211 hda_nid_t *mux_nids;
212 unsigned int num_muxes;
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MP
213 hda_nid_t *dmic_nids;
214 unsigned int num_dmics;
e1f0d669 215 hda_nid_t *dmux_nids;
1697055e 216 unsigned int num_dmuxes;
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MR
217 hda_nid_t *smux_nids;
218 unsigned int num_smuxes;
65973632 219 const char **spdif_labels;
d9737751 220
dabbed6f 221 hda_nid_t dig_in_nid;
b22b4821 222 hda_nid_t mono_nid;
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MR
223 hda_nid_t anabeep_nid;
224 hda_nid_t digbeep_nid;
2f2f4251 225
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226 /* pin widgets */
227 hda_nid_t *pin_nids;
228 unsigned int num_pins;
2f2f4251 229 unsigned int *pin_configs;
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230
231 /* codec specific stuff */
232 struct hda_verb *init;
c8b6bf9b 233 struct snd_kcontrol_new *mixer;
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234
235 /* capture source */
8b65727b 236 struct hda_input_mux *dinput_mux;
e1f0d669 237 unsigned int cur_dmux[2];
c7d4b2fa 238 struct hda_input_mux *input_mux;
3cc08dc6 239 unsigned int cur_mux[3];
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MR
240 struct hda_input_mux *sinput_mux;
241 unsigned int cur_smux[2];
2a9c7816
MR
242 unsigned int cur_amux;
243 hda_nid_t *amp_nids;
244 unsigned int num_amps;
8daaaa97 245 unsigned int powerdown_adcs;
2f2f4251 246
403d1944
MP
247 /* i/o switches */
248 unsigned int io_switch[2];
0fb87bb4 249 unsigned int clfe_swap;
c21ca4a8
TI
250 hda_nid_t line_switch; /* shared line-in for input and output */
251 hda_nid_t mic_switch; /* shared mic-in for input and output */
252 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 253 unsigned int aloopback;
2f2f4251 254
c7d4b2fa
M
255 struct hda_pcm pcm_rec[2]; /* PCM information */
256
257 /* dynamic controls and input_mux */
258 struct auto_pin_cfg autocfg;
603c4019 259 struct snd_array kctls;
8b65727b 260 struct hda_input_mux private_dimux;
c7d4b2fa 261 struct hda_input_mux private_imux;
d9737751 262 struct hda_input_mux private_smux;
89385035 263 struct hda_input_mux private_amp_mux;
b22b4821 264 struct hda_input_mux private_mono_mux;
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M
265};
266
267static hda_nid_t stac9200_adc_nids[1] = {
268 0x03,
269};
270
271static hda_nid_t stac9200_mux_nids[1] = {
272 0x0c,
273};
274
275static hda_nid_t stac9200_dac_nids[1] = {
276 0x02,
277};
278
a64135a2
MR
279static hda_nid_t stac92hd73xx_pwr_nids[8] = {
280 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
281 0x0f, 0x10, 0x11
282};
283
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MR
284static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
285 0x26, 0,
286};
287
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MR
288static hda_nid_t stac92hd73xx_adc_nids[2] = {
289 0x1a, 0x1b
290};
291
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MR
292#define DELL_M6_AMP 2
293static hda_nid_t stac92hd73xx_amp_nids[3] = {
294 0x0b, 0x0c, 0x0e
89385035
MR
295};
296
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MR
297#define STAC92HD73XX_NUM_DMICS 2
298static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
299 0x13, 0x14, 0
300};
301
302#define STAC92HD73_DAC_COUNT 5
e1f0d669
MR
303
304static hda_nid_t stac92hd73xx_mux_nids[4] = {
305 0x28, 0x29, 0x2a, 0x2b,
306};
307
308static hda_nid_t stac92hd73xx_dmux_nids[2] = {
309 0x20, 0x21,
310};
311
d9737751
MR
312static hda_nid_t stac92hd73xx_smux_nids[2] = {
313 0x22, 0x23,
314};
315
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MR
316#define STAC92HD83XXX_NUM_DMICS 2
317static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
318 0x11, 0x12, 0
319};
320
d0513fc6 321#define STAC92HD83_DAC_COUNT 3
d0513fc6
MR
322
323static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
324 0x17, 0x18,
325};
326
327static hda_nid_t stac92hd83xxx_adc_nids[2] = {
328 0x15, 0x16,
329};
330
331static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
332 0xa, 0xb, 0xd, 0xe,
333};
334
0ffa9807
MR
335static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
336 0x1e, 0,
337};
338
d0513fc6 339static unsigned int stac92hd83xxx_pwr_mapping[4] = {
989738c4 340 0x03, 0x0c, 0x20, 0x80,
d0513fc6
MR
341};
342
9248f269 343static hda_nid_t stac92hd83xxx_amp_nids[1] = {
c15c5060
MR
344 0xc,
345};
346
a64135a2
MR
347static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
348 0x0a, 0x0d, 0x0f
349};
350
e035b841
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351static hda_nid_t stac92hd71bxx_adc_nids[2] = {
352 0x12, 0x13,
353};
354
355static hda_nid_t stac92hd71bxx_mux_nids[2] = {
356 0x1a, 0x1b
357};
358
4b33c767
MR
359static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
360 0x1c, 0x1d,
e1f0d669
MR
361};
362
d9737751
MR
363static hda_nid_t stac92hd71bxx_smux_nids[2] = {
364 0x24, 0x25,
365};
366
e035b841
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367#define STAC92HD71BXX_NUM_DMICS 2
368static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
369 0x18, 0x19, 0
370};
371
0ffa9807
MR
372static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
373 0x22, 0
374};
375
8e21c34c
TD
376static hda_nid_t stac925x_adc_nids[1] = {
377 0x03,
378};
379
380static hda_nid_t stac925x_mux_nids[1] = {
381 0x0f,
382};
383
384static hda_nid_t stac925x_dac_nids[1] = {
385 0x02,
386};
387
f6e9852a
TI
388#define STAC925X_NUM_DMICS 1
389static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
390 0x15, 0
2c11f955
TD
391};
392
1697055e
TI
393static hda_nid_t stac925x_dmux_nids[1] = {
394 0x14,
395};
396
2f2f4251
M
397static hda_nid_t stac922x_adc_nids[2] = {
398 0x06, 0x07,
399};
400
401static hda_nid_t stac922x_mux_nids[2] = {
402 0x12, 0x13,
403};
404
3cc08dc6
MP
405static hda_nid_t stac927x_adc_nids[3] = {
406 0x07, 0x08, 0x09
407};
408
409static hda_nid_t stac927x_mux_nids[3] = {
410 0x15, 0x16, 0x17
411};
412
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MR
413static hda_nid_t stac927x_smux_nids[1] = {
414 0x21,
415};
416
b76c850f
MR
417static hda_nid_t stac927x_dac_nids[6] = {
418 0x02, 0x03, 0x04, 0x05, 0x06, 0
419};
420
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MR
421static hda_nid_t stac927x_dmux_nids[1] = {
422 0x1b,
423};
424
7f16859a
MR
425#define STAC927X_NUM_DMICS 2
426static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
427 0x13, 0x14, 0
428};
429
65973632
MR
430static const char *stac927x_spdif_labels[5] = {
431 "Digital Playback", "ADAT", "Analog Mux 1",
432 "Analog Mux 2", "Analog Mux 3"
433};
434
f3302a59
MP
435static hda_nid_t stac9205_adc_nids[2] = {
436 0x12, 0x13
437};
438
439static hda_nid_t stac9205_mux_nids[2] = {
440 0x19, 0x1a
441};
442
e1f0d669 443static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 444 0x1d,
e1f0d669
MR
445};
446
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MR
447static hda_nid_t stac9205_smux_nids[1] = {
448 0x21,
449};
450
f6e9852a
TI
451#define STAC9205_NUM_DMICS 2
452static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
453 0x17, 0x18, 0
8b65727b
MP
454};
455
c7d4b2fa 456static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD
457 0x08, 0x09, 0x0d, 0x0e,
458 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M
459};
460
8e21c34c
TD
461static hda_nid_t stac925x_pin_nids[8] = {
462 0x07, 0x08, 0x0a, 0x0b,
463 0x0c, 0x0d, 0x10, 0x11,
464};
465
2f2f4251
M
466static hda_nid_t stac922x_pin_nids[10] = {
467 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
468 0x0f, 0x10, 0x11, 0x15, 0x1b,
469};
470
a7662640 471static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR
472 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
473 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 474 0x14, 0x22, 0x23
e1f0d669
MR
475};
476
d0513fc6
MR
477static hda_nid_t stac92hd83xxx_pin_nids[14] = {
478 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
479 0x0f, 0x10, 0x11, 0x12, 0x13,
480 0x1d, 0x1e, 0x1f, 0x20
481};
0ffa9807 482static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR
483 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
484 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 485 0x1f,
e035b841
MR
486};
487
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MP
488static hda_nid_t stac927x_pin_nids[14] = {
489 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
490 0x0f, 0x10, 0x11, 0x12, 0x13,
491 0x14, 0x21, 0x22, 0x23,
492};
493
f3302a59
MP
494static hda_nid_t stac9205_pin_nids[12] = {
495 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
496 0x0f, 0x14, 0x16, 0x17, 0x18,
497 0x21, 0x22,
f3302a59
MP
498};
499
89385035
MR
500#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
501
502static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
503 struct snd_ctl_elem_value *ucontrol)
504{
505 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
506 struct sigmatel_spec *spec = codec->spec;
507 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
508
509 kcontrol->private_value ^= get_amp_nid(kcontrol);
510 kcontrol->private_value |= nid;
511
512 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
513}
514
515static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
516 struct snd_ctl_elem_value *ucontrol)
517{
518 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
519 struct sigmatel_spec *spec = codec->spec;
520 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
521
522 kcontrol->private_value ^= get_amp_nid(kcontrol);
523 kcontrol->private_value |= nid;
524
525 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
526}
527
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MP
528static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
529 struct snd_ctl_elem_info *uinfo)
530{
531 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
532 struct sigmatel_spec *spec = codec->spec;
533 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
534}
535
536static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
537 struct snd_ctl_elem_value *ucontrol)
538{
539 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
540 struct sigmatel_spec *spec = codec->spec;
e1f0d669 541 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 542
e1f0d669 543 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP
544 return 0;
545}
546
547static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
548 struct snd_ctl_elem_value *ucontrol)
549{
550 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
551 struct sigmatel_spec *spec = codec->spec;
e1f0d669 552 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP
553
554 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 555 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP
556}
557
d9737751
MR
558static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
559 struct snd_ctl_elem_info *uinfo)
560{
561 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
562 struct sigmatel_spec *spec = codec->spec;
563 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
564}
565
566static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
567 struct snd_ctl_elem_value *ucontrol)
568{
569 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
570 struct sigmatel_spec *spec = codec->spec;
571 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
572
573 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
574 return 0;
575}
576
577static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
578 struct snd_ctl_elem_value *ucontrol)
579{
580 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
581 struct sigmatel_spec *spec = codec->spec;
00ef50c2 582 struct hda_input_mux *smux = &spec->private_smux;
d9737751 583 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR
584 int err, val;
585 hda_nid_t nid;
d9737751 586
00ef50c2 587 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 588 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR
589 if (err < 0)
590 return err;
591
592 if (spec->spdif_mute) {
593 if (smux_idx == 0)
594 nid = spec->multiout.dig_out_nid;
595 else
596 nid = codec->slave_dig_outs[smux_idx - 1];
597 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 598 val = HDA_AMP_MUTE;
00ef50c2 599 else
c9b46f91 600 val = 0;
00ef50c2 601 /* un/mute SPDIF out */
c9b46f91
TI
602 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
603 HDA_AMP_MUTE, val);
00ef50c2
MR
604 }
605 return 0;
d9737751
MR
606}
607
c8b6bf9b 608static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M
609{
610 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
611 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 612 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M
613}
614
c8b6bf9b 615static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
616{
617 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
618 struct sigmatel_spec *spec = codec->spec;
619 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
620
621 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
622 return 0;
623}
624
c8b6bf9b 625static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
626{
627 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
628 struct sigmatel_spec *spec = codec->spec;
629 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
630
c7d4b2fa 631 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M
632 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
633}
634
b22b4821
MR
635static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
636 struct snd_ctl_elem_info *uinfo)
637{
638 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
639 struct sigmatel_spec *spec = codec->spec;
640 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
641}
642
643static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
644 struct snd_ctl_elem_value *ucontrol)
645{
646 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
647 struct sigmatel_spec *spec = codec->spec;
648
649 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
650 return 0;
651}
652
653static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
654 struct snd_ctl_elem_value *ucontrol)
655{
656 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
657 struct sigmatel_spec *spec = codec->spec;
658
659 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
660 spec->mono_nid, &spec->cur_mmux);
661}
662
89385035
MR
663static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
664 struct snd_ctl_elem_info *uinfo)
665{
666 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
667 struct sigmatel_spec *spec = codec->spec;
668 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
669}
670
671static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
672 struct snd_ctl_elem_value *ucontrol)
673{
674 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
675 struct sigmatel_spec *spec = codec->spec;
676
677 ucontrol->value.enumerated.item[0] = spec->cur_amux;
678 return 0;
679}
680
681static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
682 struct snd_ctl_elem_value *ucontrol)
683{
684 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
685 struct sigmatel_spec *spec = codec->spec;
686 struct snd_kcontrol *ctl =
687 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
688 if (!ctl)
689 return -EINVAL;
690
691 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
692 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
693
694 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
695 0, &spec->cur_amux);
696}
697
5f10c4a9
ML
698#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
699
700static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
701 struct snd_ctl_elem_value *ucontrol)
702{
703 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 704 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML
705 struct sigmatel_spec *spec = codec->spec;
706
e1f0d669
MR
707 ucontrol->value.integer.value[0] = !!(spec->aloopback &
708 (spec->aloopback_mask << idx));
5f10c4a9
ML
709 return 0;
710}
711
712static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
713 struct snd_ctl_elem_value *ucontrol)
714{
715 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
716 struct sigmatel_spec *spec = codec->spec;
e1f0d669 717 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 718 unsigned int dac_mode;
e1f0d669 719 unsigned int val, idx_val;
5f10c4a9 720
e1f0d669
MR
721 idx_val = spec->aloopback_mask << idx;
722 if (ucontrol->value.integer.value[0])
723 val = spec->aloopback | idx_val;
724 else
725 val = spec->aloopback & ~idx_val;
68ea7b2f 726 if (spec->aloopback == val)
5f10c4a9
ML
727 return 0;
728
68ea7b2f 729 spec->aloopback = val;
5f10c4a9 730
e1f0d669
MR
731 /* Only return the bits defined by the shift value of the
732 * first two bytes of the mask
733 */
5f10c4a9 734 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR
735 kcontrol->private_value & 0xFFFF, 0x0);
736 dac_mode >>= spec->aloopback_shift;
5f10c4a9 737
e1f0d669 738 if (spec->aloopback & idx_val) {
5f10c4a9 739 snd_hda_power_up(codec);
e1f0d669 740 dac_mode |= idx_val;
5f10c4a9
ML
741 } else {
742 snd_hda_power_down(codec);
e1f0d669 743 dac_mode &= ~idx_val;
5f10c4a9
ML
744 }
745
746 snd_hda_codec_write_cache(codec, codec->afg, 0,
747 kcontrol->private_value >> 16, dac_mode);
748
749 return 1;
750}
751
c7d4b2fa 752static struct hda_verb stac9200_core_init[] = {
2f2f4251 753 /* set dac0mux for dac converter */
c7d4b2fa 754 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M
755 {}
756};
757
1194b5b7
TI
758static struct hda_verb stac9200_eapd_init[] = {
759 /* set dac0mux for dac converter */
760 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
761 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
762 {}
763};
764
e1f0d669
MR
765static struct hda_verb stac92hd73xx_6ch_core_init[] = {
766 /* set master volume and direct control */
767 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
768 /* setup adcs to point to mixer */
769 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
770 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
771 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
772 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
773 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
774 /* setup import muxs */
775 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
776 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
777 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
778 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
779 {}
780};
781
d654a660
MR
782static struct hda_verb dell_eq_core_init[] = {
783 /* set master volume to max value without distortion
784 * and direct control */
785 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR
786 /* setup adcs to point to mixer */
787 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
788 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
789 /* setup import muxs */
790 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
791 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
792 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
793 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
794 {}
795};
796
52fe0f9d 797static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 798 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR
799 /* setup adcs to point to mixer */
800 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
801 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
802 /* setup import muxs */
803 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
804 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
805 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
806 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
807 {}
808};
809
e1f0d669
MR
810static struct hda_verb stac92hd73xx_8ch_core_init[] = {
811 /* set master volume and direct control */
812 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
813 /* setup adcs to point to mixer */
814 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
815 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
816 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
817 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
818 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
819 /* setup import muxs */
820 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
821 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
822 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
823 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
824 {}
825};
826
827static struct hda_verb stac92hd73xx_10ch_core_init[] = {
828 /* set master volume and direct control */
829 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
830 /* dac3 is connected to import3 mux */
831 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR
832 /* setup adcs to point to mixer */
833 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
834 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
835 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
836 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
837 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
838 /* setup import muxs */
839 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
840 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
841 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
842 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
843 {}
844};
845
d0513fc6 846static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR
847 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
848 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
849 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
850
851 /* power state controls amps */
852 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 853 {}
d0513fc6
MR
854};
855
e035b841 856static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR
857 /* set master volume and direct control */
858 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
541eee87
MR
859 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
860 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
861 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
862 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
574f3c4f 863 {}
541eee87
MR
864};
865
4b33c767 866#define HD_DISABLE_PORTF 2
541eee87 867static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR
868 /* start of config #1 */
869
870 /* connect port 0f to audio mixer */
871 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR
872 /* unmute right and left channels for node 0x0f */
873 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
874 /* start of config #2 */
875
e035b841
MR
876 /* set master volume and direct control */
877 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
aafc4412 878 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR
879 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
880 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
881 {}
882};
883
8e21c34c
TD
884static struct hda_verb stac925x_core_init[] = {
885 /* set dac0mux for dac converter */
886 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI
887 /* mute the master volume */
888 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD
889 {}
890};
891
c7d4b2fa 892static struct hda_verb stac922x_core_init[] = {
2f2f4251 893 /* set master volume and direct control */
c7d4b2fa 894 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M
895 {}
896};
897
93ed1503 898static struct hda_verb d965_core_init[] = {
19039bd0 899 /* set master volume and direct control */
93ed1503 900 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI
901 /* unmute node 0x1b */
902 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
903 /* select node 0x03 as DAC */
904 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
905 {}
906};
907
3cc08dc6
MP
908static struct hda_verb stac927x_core_init[] = {
909 /* set master volume and direct control */
910 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR
911 /* enable analog pc beep path */
912 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP
913 {}
914};
915
f3302a59
MP
916static struct hda_verb stac9205_core_init[] = {
917 /* set master volume and direct control */
918 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR
919 /* enable analog pc beep path */
920 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP
921 {}
922};
923
b22b4821
MR
924#define STAC_MONO_MUX \
925 { \
926 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
927 .name = "Mono Mux", \
928 .count = 1, \
929 .info = stac92xx_mono_mux_enum_info, \
930 .get = stac92xx_mono_mux_enum_get, \
931 .put = stac92xx_mono_mux_enum_put, \
932 }
933
89385035
MR
934#define STAC_AMP_MUX \
935 { \
936 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
937 .name = "Amp Selector Capture Switch", \
938 .count = 1, \
939 .info = stac92xx_amp_mux_enum_info, \
940 .get = stac92xx_amp_mux_enum_get, \
941 .put = stac92xx_amp_mux_enum_put, \
942 }
943
944#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
945 { \
946 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
947 .name = xname, \
948 .index = 0, \
949 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
950 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
951 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
952 .info = stac92xx_amp_volume_info, \
953 .get = stac92xx_amp_volume_get, \
954 .put = stac92xx_amp_volume_put, \
955 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
956 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
957 }
958
9e05b7a3 959#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML
960 { \
961 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
962 .name = "Input Source", \
9e05b7a3 963 .count = cnt, \
ca7c5a8b
ML
964 .info = stac92xx_mux_enum_info, \
965 .get = stac92xx_mux_enum_get, \
966 .put = stac92xx_mux_enum_put, \
967 }
968
e1f0d669 969#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML
970 { \
971 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
972 .name = "Analog Loopback", \
e1f0d669 973 .count = cnt, \
5f10c4a9
ML
974 .info = stac92xx_aloopback_info, \
975 .get = stac92xx_aloopback_get, \
976 .put = stac92xx_aloopback_put, \
977 .private_value = verb_read | (verb_write << 16), \
978 }
979
c8b6bf9b 980static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M
981 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
982 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 983 STAC_INPUT_SOURCE(1),
2f2f4251
M
984 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
985 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M
986 { } /* end */
987};
988
2a9c7816 989#define DELL_M6_MIXER 6
e1f0d669 990static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 991 /* start of config #1 */
e1f0d669
MR
992 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
993 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
994
e1f0d669
MR
995 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
996 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
997
2a9c7816
MR
998 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
999 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1000
1001 /* start of config #2 */
1002 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1003 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1004
e1f0d669
MR
1005 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1006 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1007
2a9c7816
MR
1008 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1009
1010 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1011 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1012
1013 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1014 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1015
e1f0d669
MR
1016 { } /* end */
1017};
1018
1019static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR
1020 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1021
e1f0d669
MR
1022 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1023 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1024
1025 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1026 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1027
1028 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1029 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1030
1031 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1032 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1033
1034 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1035 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1036
1037 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1038 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1039
1040 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1041 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1042 { } /* end */
1043};
1044
1045static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR
1046 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1047
e1f0d669
MR
1048 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1049 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1050
1051 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1052 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1053
1054 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1055 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1056
1057 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1058 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1059
1060 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1061 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1062
1063 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1064 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1065
1066 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1067 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1068 { } /* end */
1069};
1070
d0513fc6
MR
1071
1072static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1073 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1074 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1075
1076 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1077 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1078
74b7ff48
MR
1079 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT),
1080 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT),
d0513fc6 1081
74b7ff48
MR
1082 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT),
1083 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT),
d0513fc6 1084
74b7ff48
MR
1085 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT),
1086 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT),
d0513fc6 1087
74b7ff48
MR
1088 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT),
1089 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT),
d0513fc6
MR
1090
1091 /*
74b7ff48
MR
1092 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT),
1093 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT),
d0513fc6
MR
1094 */
1095 { } /* end */
1096};
1097
541eee87 1098static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1099 STAC_INPUT_SOURCE(2),
4b33c767 1100 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1101
9b35947f
MR
1102 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1103 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR
1104
1105 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1106 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR
1107 /* analog pc-beep replaced with digital beep support */
1108 /*
f7c5dda2
MR
1109 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1110 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1111 */
f7c5dda2 1112
687cb98e
MR
1113 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1114 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1115
687cb98e
MR
1116 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1117 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR
1118
1119 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1120 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1121
1122 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1123 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR
1124 { } /* end */
1125};
1126
541eee87 1127static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR
1128 STAC_INPUT_SOURCE(2),
1129 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1130
541eee87
MR
1131 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1132 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR
1133
1134 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1135 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR
1136 { } /* end */
1137};
1138
8e21c34c 1139static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI
1140 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
1141 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
9e05b7a3 1142 STAC_INPUT_SOURCE(1),
8e21c34c 1143 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1144 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD
1145 { } /* end */
1146};
1147
9e05b7a3 1148static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1149 STAC_INPUT_SOURCE(2),
e1f0d669 1150 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML
1151
1152 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1153 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1154
1155 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1156 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M
1157 { } /* end */
1158};
1159
19039bd0 1160/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML
1161static struct snd_kcontrol_new stac922x_mixer[] = {
1162 STAC_INPUT_SOURCE(2),
9e05b7a3
ML
1163 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1164 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML
1165
1166 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1167 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI
1168 { } /* end */
1169};
1170
9e05b7a3 1171
d1d985f0 1172static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1173 STAC_INPUT_SOURCE(3),
e1f0d669 1174 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1175
9e05b7a3
ML
1176 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1177 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1178
1179 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1180 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1181
1182 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1183 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP
1184 { } /* end */
1185};
1186
1697055e
TI
1187static struct snd_kcontrol_new stac_dmux_mixer = {
1188 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1189 .name = "Digital Input Source",
1190 /* count set later */
1191 .info = stac92xx_dmux_enum_info,
1192 .get = stac92xx_dmux_enum_get,
1193 .put = stac92xx_dmux_enum_put,
1194};
1195
d9737751
MR
1196static struct snd_kcontrol_new stac_smux_mixer = {
1197 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1198 .name = "IEC958 Playback Source",
d9737751
MR
1199 /* count set later */
1200 .info = stac92xx_smux_enum_info,
1201 .get = stac92xx_smux_enum_get,
1202 .put = stac92xx_smux_enum_put,
1203};
1204
2134ea4f
TI
1205static const char *slave_vols[] = {
1206 "Front Playback Volume",
1207 "Surround Playback Volume",
1208 "Center Playback Volume",
1209 "LFE Playback Volume",
1210 "Side Playback Volume",
1211 "Headphone Playback Volume",
1212 "Headphone Playback Volume",
1213 "Speaker Playback Volume",
1214 "External Speaker Playback Volume",
1215 "Speaker2 Playback Volume",
1216 NULL
1217};
1218
1219static const char *slave_sws[] = {
1220 "Front Playback Switch",
1221 "Surround Playback Switch",
1222 "Center Playback Switch",
1223 "LFE Playback Switch",
1224 "Side Playback Switch",
1225 "Headphone Playback Switch",
1226 "Headphone Playback Switch",
1227 "Speaker Playback Switch",
1228 "External Speaker Playback Switch",
1229 "Speaker2 Playback Switch",
edb54a55 1230 "IEC958 Playback Switch",
2134ea4f
TI
1231 NULL
1232};
1233
603c4019 1234static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1235static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1236
2f2f4251
M
1237static int stac92xx_build_controls(struct hda_codec *codec)
1238{
1239 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI
1240 struct auto_pin_cfg *cfg = &spec->autocfg;
1241 hda_nid_t nid;
2f2f4251 1242 int err;
c7d4b2fa 1243 int i;
2f2f4251
M
1244
1245 err = snd_hda_add_new_ctls(codec, spec->mixer);
1246 if (err < 0)
1247 return err;
c7d4b2fa
M
1248
1249 for (i = 0; i < spec->num_mixers; i++) {
1250 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1251 if (err < 0)
1252 return err;
1253 }
1697055e
TI
1254 if (spec->num_dmuxes > 0) {
1255 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1256 err = snd_hda_ctl_add(codec,
1697055e
TI
1257 snd_ctl_new1(&stac_dmux_mixer, codec));
1258 if (err < 0)
1259 return err;
1260 }
d9737751 1261 if (spec->num_smuxes > 0) {
00ef50c2
MR
1262 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1263 struct hda_input_mux *smux = &spec->private_smux;
1264 /* check for mute support on SPDIF out */
1265 if (wcaps & AC_WCAP_OUT_AMP) {
1266 smux->items[smux->num_items].label = "Off";
1267 smux->items[smux->num_items].index = 0;
1268 smux->num_items++;
1269 spec->spdif_mute = 1;
1270 }
d9737751 1271 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1272 err = snd_hda_ctl_add(codec,
d9737751
MR
1273 snd_ctl_new1(&stac_smux_mixer, codec));
1274 if (err < 0)
1275 return err;
1276 }
c7d4b2fa 1277
dabbed6f
M
1278 if (spec->multiout.dig_out_nid) {
1279 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1280 if (err < 0)
1281 return err;
9a08160b
TI
1282 err = snd_hda_create_spdif_share_sw(codec,
1283 &spec->multiout);
1284 if (err < 0)
1285 return err;
1286 spec->multiout.share_spdif = 1;
dabbed6f 1287 }
da74ae3e 1288 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M
1289 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1290 if (err < 0)
1291 return err;
1292 }
2134ea4f
TI
1293
1294 /* if we have no master control, let's create it */
1295 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1296 unsigned int vmaster_tlv[4];
2134ea4f 1297 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1298 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI
1299 /* correct volume offset */
1300 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
2134ea4f 1301 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1302 vmaster_tlv, slave_vols);
2134ea4f
TI
1303 if (err < 0)
1304 return err;
1305 }
1306 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1307 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1308 NULL, slave_sws);
1309 if (err < 0)
1310 return err;
1311 }
1312
603c4019 1313 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI
1314
1315 /* create jack input elements */
1316 if (spec->hp_detect) {
1317 for (i = 0; i < cfg->hp_outs; i++) {
1318 int type = SND_JACK_HEADPHONE;
1319 nid = cfg->hp_pins[i];
1320 /* jack detection */
1321 if (cfg->hp_outs == i)
1322 type |= SND_JACK_LINEOUT;
1323 err = stac92xx_add_jack(codec, nid, type);
1324 if (err < 0)
1325 return err;
1326 }
1327 }
1328 for (i = 0; i < cfg->line_outs; i++) {
1329 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1330 SND_JACK_LINEOUT);
1331 if (err < 0)
1332 return err;
1333 }
1334 for (i = 0; i < AUTO_PIN_LAST; i++) {
1335 nid = cfg->input_pins[i];
1336 if (nid) {
1337 err = stac92xx_add_jack(codec, nid,
1338 SND_JACK_MICROPHONE);
1339 if (err < 0)
1340 return err;
1341 }
1342 }
1343
dabbed6f 1344 return 0;
2f2f4251
M
1345}
1346
403d1944 1347static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1348 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M
1349 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1350};
1351
58eec423
MCC
1352static unsigned int gateway9200_m4_pin_configs[8] = {
1353 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1354 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1355};
1356static unsigned int gateway9200_m4_2_pin_configs[8] = {
1357 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1358 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1359};
1360
1361/*
dfe495d0
TI
1362 STAC 9200 pin configs for
1363 102801A8
1364 102801DE
1365 102801E8
1366*/
1367static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI
1368 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1369 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI
1370};
1371
1372/*
1373 STAC 9200 pin configs for
1374 102801C0
1375 102801C1
1376*/
1377static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI
1378 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1379 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1380};
1381
1382/*
1383 STAC 9200 pin configs for
1384 102801C4 (Dell Dimension E310)
1385 102801C5
1386 102801C7
1387 102801D9
1388 102801DA
1389 102801E3
1390*/
1391static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI
1392 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1393 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1394};
1395
1396
1397/*
1398 STAC 9200-32 pin configs for
1399 102801B5 (Dell Inspiron 630m)
1400 102801D8 (Dell Inspiron 640m)
1401*/
1402static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI
1403 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1404 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1405};
1406
1407/*
1408 STAC 9200-32 pin configs for
1409 102801C2 (Dell Latitude D620)
1410 102801C8
1411 102801CC (Dell Latitude D820)
1412 102801D4
1413 102801D6
1414*/
1415static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI
1416 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1417 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI
1418};
1419
1420/*
1421 STAC 9200-32 pin configs for
1422 102801CE (Dell XPS M1710)
1423 102801CF (Dell Precision M90)
1424*/
1425static unsigned int dell9200_m23_pin_configs[8] = {
1426 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1427 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1428};
1429
1430/*
1431 STAC 9200-32 pin configs for
1432 102801C9
1433 102801CA
1434 102801CB (Dell Latitude 120L)
1435 102801D3
1436*/
1437static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI
1438 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1439 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1440};
1441
1442/*
1443 STAC 9200-32 pin configs for
1444 102801BD (Dell Inspiron E1505n)
1445 102801EE
1446 102801EF
1447*/
1448static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI
1449 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1450 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1451};
1452
1453/*
1454 STAC 9200-32 pin configs for
1455 102801F5 (Dell Inspiron 1501)
1456 102801F6
1457*/
1458static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI
1459 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1460 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1461};
1462
1463/*
1464 STAC 9200-32
1465 102801CD (Dell Inspiron E1705/9400)
1466*/
1467static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI
1468 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1469 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI
1470};
1471
bf277785
TD
1472static unsigned int oqo9200_pin_configs[8] = {
1473 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1474 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1475};
1476
dfe495d0 1477
f5fcc13c
TI
1478static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1479 [STAC_REF] = ref9200_pin_configs,
bf277785 1480 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI
1481 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1482 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1483 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1484 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1485 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1486 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1487 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1488 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1489 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1490 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC
1491 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1492 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1493 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP
1494};
1495
f5fcc13c
TI
1496static const char *stac9200_models[STAC_9200_MODELS] = {
1497 [STAC_REF] = "ref",
bf277785 1498 [STAC_9200_OQO] = "oqo",
dfe495d0
TI
1499 [STAC_9200_DELL_D21] = "dell-d21",
1500 [STAC_9200_DELL_D22] = "dell-d22",
1501 [STAC_9200_DELL_D23] = "dell-d23",
1502 [STAC_9200_DELL_M21] = "dell-m21",
1503 [STAC_9200_DELL_M22] = "dell-m22",
1504 [STAC_9200_DELL_M23] = "dell-m23",
1505 [STAC_9200_DELL_M24] = "dell-m24",
1506 [STAC_9200_DELL_M25] = "dell-m25",
1507 [STAC_9200_DELL_M26] = "dell-m26",
1508 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC
1509 [STAC_9200_M4] = "gateway-m4",
1510 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1511 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI
1512};
1513
1514static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1515 /* SigmaTel reference board */
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1517 "DFI LanParty", STAC_REF),
e7377071 1518 /* Dell laptops have BIOS problem */
dfe495d0
TI
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1520 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI
1522 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1524 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1526 "unknown Dell", STAC_9200_DELL_D22),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1528 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI
1530 "Dell Latitude D620", STAC_9200_DELL_M22),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1532 "unknown Dell", STAC_9200_DELL_D23),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1534 "unknown Dell", STAC_9200_DELL_D23),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1536 "unknown Dell", STAC_9200_DELL_M22),
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1538 "unknown Dell", STAC_9200_DELL_M24),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1540 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1542 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1544 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1546 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1548 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI
1550 "Dell Precision M90", STAC_9200_DELL_M23),
1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1552 "unknown Dell", STAC_9200_DELL_M22),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1554 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1556 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI
1558 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1560 "unknown Dell", STAC_9200_DELL_D23),
1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1562 "unknown Dell", STAC_9200_DELL_D23),
1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1564 "unknown Dell", STAC_9200_DELL_D21),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1566 "unknown Dell", STAC_9200_DELL_D23),
1567 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1568 "unknown Dell", STAC_9200_DELL_D21),
1569 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1570 "unknown Dell", STAC_9200_DELL_M25),
1571 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1572 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1573 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI
1574 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1575 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1576 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1577 /* Panasonic */
117f257d 1578 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1579 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC
1580 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1581 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1582 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD
1583 /* OQO Mobile */
1584 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP
1585 {} /* terminator */
1586};
1587
8e21c34c
TD
1588static unsigned int ref925x_pin_configs[8] = {
1589 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1590 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD
1591};
1592
9cb36c2a
MCC
1593static unsigned int stac925xM1_pin_configs[8] = {
1594 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1595 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD
1596};
1597
9cb36c2a
MCC
1598static unsigned int stac925xM1_2_pin_configs[8] = {
1599 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1600 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1601};
58eec423 1602
9cb36c2a
MCC
1603static unsigned int stac925xM2_pin_configs[8] = {
1604 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1605 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD
1606};
1607
8e21c34c 1608static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC
1609 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1610 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1611};
1612
9cb36c2a
MCC
1613static unsigned int stac925xM3_pin_configs[8] = {
1614 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1615 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1616};
58eec423 1617
9cb36c2a
MCC
1618static unsigned int stac925xM5_pin_configs[8] = {
1619 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1620 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1621};
1622
9cb36c2a
MCC
1623static unsigned int stac925xM6_pin_configs[8] = {
1624 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1625 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD
1626};
1627
1628static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1629 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC
1630 [STAC_M1] = stac925xM1_pin_configs,
1631 [STAC_M1_2] = stac925xM1_2_pin_configs,
1632 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1633 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC
1634 [STAC_M3] = stac925xM3_pin_configs,
1635 [STAC_M5] = stac925xM5_pin_configs,
1636 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD
1637};
1638
1639static const char *stac925x_models[STAC_925x_MODELS] = {
1640 [STAC_REF] = "ref",
9cb36c2a
MCC
1641 [STAC_M1] = "m1",
1642 [STAC_M1_2] = "m1-2",
1643 [STAC_M2] = "m2",
8e21c34c 1644 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC
1645 [STAC_M3] = "m3",
1646 [STAC_M5] = "m5",
1647 [STAC_M6] = "m6",
8e21c34c
TD
1648};
1649
9cb36c2a 1650static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC
1651 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1652 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1653 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1654 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1655 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC
1656 /* Not sure about the brand name for those */
1657 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1658 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1659 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1660 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1661 {} /* terminator */
8e21c34c
TD
1662};
1663
1664static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1665 /* SigmaTel reference board */
1666 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1667 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC
1668
1669 /* Default table for unknown ID */
1670 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1671
8e21c34c
TD
1672 {} /* terminator */
1673};
1674
a7662640 1675static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR
1676 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1677 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1678 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR
1679 0x01452050,
1680};
1681
1682static unsigned int dell_m6_pin_configs[13] = {
1683 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1684 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1685 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1686 0x4f0000f0,
e1f0d669
MR
1687};
1688
1689static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1690 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI
1691 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1692 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1693 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1694 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR
1695};
1696
1697static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1698 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1699 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI
1700 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1701 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1702 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1703 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR
1704};
1705
1706static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1707 /* SigmaTel reference board */
1708 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR
1709 "DFI LanParty", STAC_92HD73XX_REF),
1710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1711 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1713 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1715 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1717 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1719 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1721 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI
1723 "unknown Dell", STAC_DELL_M6_DMIC),
1724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1725 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1726 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1727 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS
1728 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1729 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR
1730 {} /* terminator */
1731};
1732
d0513fc6
MR
1733static unsigned int ref92hd83xxx_pin_configs[14] = {
1734 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1735 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1736 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1737 0x01451160, 0x98560170,
1738};
1739
1740static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1741 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1742};
1743
1744static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1745 [STAC_92HD83XXX_REF] = "ref",
1746};
1747
1748static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1749 /* SigmaTel reference board */
1750 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1751 "DFI LanParty", STAC_92HD83XXX_REF),
574f3c4f 1752 {} /* terminator */
d0513fc6
MR
1753};
1754
0ffa9807 1755static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1756 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1757 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1758 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR
1759};
1760
0ffa9807 1761static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1762 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1763 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1764 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1765};
1766
0ffa9807 1767static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR
1768 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1769 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1770 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR
1771};
1772
3a7abfd2
MR
1773static unsigned int dell_m4_3_pin_configs[11] = {
1774 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1775 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1776 0x40f000f0, 0x044413b0, 0x044413b0,
1777};
1778
e035b841
MR
1779static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1780 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR
1781 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1782 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1783 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1784 [STAC_HP_M4] = NULL,
1b0652eb 1785 [STAC_HP_DV5] = NULL,
e035b841
MR
1786};
1787
1788static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1789 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR
1790 [STAC_DELL_M4_1] = "dell-m4-1",
1791 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1792 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1793 [STAC_HP_M4] = "hp-m4",
1b0652eb 1794 [STAC_HP_DV5] = "hp-dv5",
e035b841
MR
1795};
1796
1797static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1798 /* SigmaTel reference board */
1799 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1800 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI
1801 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1802 "HP dv5", STAC_HP_M4),
1803 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1804 "HP dv7", STAC_HP_M4),
e0c0e943
TI
1805 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f7,
1806 "HP dv4", STAC_HP_DV5),
69dfaefe
TI
1807 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc,
1808 "HP dv7", STAC_HP_M4),
dafb70ce 1809 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603,
1b0652eb 1810 "HP dv5", STAC_HP_DV5),
9a9e2359
MR
1811 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1812 "unknown HP", STAC_HP_M4),
a7662640
MR
1813 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1814 "unknown Dell", STAC_DELL_M4_1),
1815 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1816 "unknown Dell", STAC_DELL_M4_1),
1817 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1818 "unknown Dell", STAC_DELL_M4_1),
1819 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1820 "unknown Dell", STAC_DELL_M4_1),
1821 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1822 "unknown Dell", STAC_DELL_M4_1),
1823 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1824 "unknown Dell", STAC_DELL_M4_1),
1825 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1826 "unknown Dell", STAC_DELL_M4_1),
1827 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1828 "unknown Dell", STAC_DELL_M4_2),
1829 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1830 "unknown Dell", STAC_DELL_M4_2),
1831 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1832 "unknown Dell", STAC_DELL_M4_2),
1833 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1834 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR
1835 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1836 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR
1837 {} /* terminator */
1838};
1839
403d1944
MP
1840static unsigned int ref922x_pin_configs[10] = {
1841 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1842 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M
1843 0x40000100, 0x40000100,
1844};
1845
dfe495d0
TI
1846/*
1847 STAC 922X pin configs for
1848 102801A7
1849 102801AB
1850 102801A9
1851 102801D1
1852 102801D2
1853*/
1854static unsigned int dell_922x_d81_pin_configs[10] = {
1855 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1856 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1857 0x01813122, 0x400001f2,
1858};
1859
1860/*
1861 STAC 922X pin configs for
1862 102801AC
1863 102801D0
1864*/
1865static unsigned int dell_922x_d82_pin_configs[10] = {
1866 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1867 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1868 0x01813122, 0x400001f1,
1869};
1870
1871/*
1872 STAC 922X pin configs for
1873 102801BF
1874*/
1875static unsigned int dell_922x_m81_pin_configs[10] = {
1876 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1877 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1878 0x40C003f1, 0x405003f0,
1879};
1880
1881/*
1882 STAC 9221 A1 pin configs for
1883 102801D7 (Dell XPS M1210)
1884*/
1885static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ
1886 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1887 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI
1888 0x508003f3, 0x405003f4,
1889};
1890
403d1944 1891static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1892 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP
1893 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1894 0x02a19120, 0x40000100,
1895};
1896
1897static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP
1898 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1899 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP
1900 0x02a19320, 0x40000100,
1901};
1902
5d5d3bc3
IZ
1903static unsigned int intel_mac_v1_pin_configs[10] = {
1904 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1905 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1906 0x400000fc, 0x400000fb,
1907};
1908
1909static unsigned int intel_mac_v2_pin_configs[10] = {
1910 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1911 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1912 0x400000fc, 0x400000fb,
6f0778d8
NB
1913};
1914
5d5d3bc3
IZ
1915static unsigned int intel_mac_v3_pin_configs[10] = {
1916 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1917 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI
1918 0x400000fc, 0x400000fb,
1919};
1920
5d5d3bc3
IZ
1921static unsigned int intel_mac_v4_pin_configs[10] = {
1922 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1923 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF
1924 0x400000fc, 0x400000fb,
1925};
1926
5d5d3bc3
IZ
1927static unsigned int intel_mac_v5_pin_configs[10] = {
1928 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1929 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1930 0x400000fc, 0x400000fb,
0dae0f83
TI
1931};
1932
8c650087
MCC
1933static unsigned int ecs202_pin_configs[10] = {
1934 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1935 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1936 0x9037012e, 0x40e000f2,
1937};
76c08828 1938
19039bd0 1939static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1940 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI
1941 [STAC_D945GTP3] = d945gtp3_pin_configs,
1942 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ
1943 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1944 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1945 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1946 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1947 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1948 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1949 /* for backward compatibility */
5d5d3bc3
IZ
1950 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1951 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1952 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1953 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1954 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1955 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1956 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI
1957 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1958 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1959 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1960 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP
1961};
1962
f5fcc13c
TI
1963static const char *stac922x_models[STAC_922X_MODELS] = {
1964 [STAC_D945_REF] = "ref",
1965 [STAC_D945GTP5] = "5stack",
1966 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ
1967 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1968 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1969 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1970 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1971 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1972 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1973 /* for backward compatibility */
f5fcc13c 1974 [STAC_MACMINI] = "macmini",
3fc24d85 1975 [STAC_MACBOOK] = "macbook",
6f0778d8
NB
1976 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1977 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1978 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1979 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1980 [STAC_ECS_202] = "ecs202",
dfe495d0
TI
1981 [STAC_922X_DELL_D81] = "dell-d81",
1982 [STAC_922X_DELL_D82] = "dell-d82",
1983 [STAC_922X_DELL_M81] = "dell-m81",
1984 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI
1985};
1986
1987static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1988 /* SigmaTel reference board */
1989 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1990 "DFI LanParty", STAC_D945_REF),
1991 /* Intel 945G based systems */
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1993 "Intel D945G", STAC_D945GTP3),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1995 "Intel D945G", STAC_D945GTP3),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1997 "Intel D945G", STAC_D945GTP3),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1999 "Intel D945G", STAC_D945GTP3),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2001 "Intel D945G", STAC_D945GTP3),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2003 "Intel D945G", STAC_D945GTP3),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2005 "Intel D945G", STAC_D945GTP3),
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2007 "Intel D945G", STAC_D945GTP3),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2009 "Intel D945G", STAC_D945GTP3),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2011 "Intel D945G", STAC_D945GTP3),
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2013 "Intel D945G", STAC_D945GTP3),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2015 "Intel D945G", STAC_D945GTP3),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2017 "Intel D945G", STAC_D945GTP3),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2019 "Intel D945G", STAC_D945GTP3),
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2021 "Intel D945G", STAC_D945GTP3),
2022 /* Intel D945G 5-stack systems */
2023 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2024 "Intel D945G", STAC_D945GTP5),
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2026 "Intel D945G", STAC_D945GTP5),
2027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2028 "Intel D945G", STAC_D945GTP5),
2029 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2030 "Intel D945G", STAC_D945GTP5),
2031 /* Intel 945P based systems */
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2033 "Intel D945P", STAC_D945GTP3),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2035 "Intel D945P", STAC_D945GTP3),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2037 "Intel D945P", STAC_D945GTP3),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2039 "Intel D945P", STAC_D945GTP3),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2041 "Intel D945P", STAC_D945GTP3),
2042 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2043 "Intel D945P", STAC_D945GTP5),
2044 /* other systems */
536319af 2045 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2046 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2047 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI
2048 /* Dell systems */
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2050 "unknown Dell", STAC_922X_DELL_D81),
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2052 "unknown Dell", STAC_922X_DELL_D81),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2054 "unknown Dell", STAC_922X_DELL_D81),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2056 "unknown Dell", STAC_922X_DELL_D82),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2058 "unknown Dell", STAC_922X_DELL_M81),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2060 "unknown Dell", STAC_922X_DELL_D82),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2062 "unknown Dell", STAC_922X_DELL_D81),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2064 "unknown Dell", STAC_922X_DELL_D81),
2065 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2066 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC
2067 /* ECS/PC Chips boards */
2068 SND_PCI_QUIRK(0x1019, 0x2144,
2069 "ECS/PC chips", STAC_ECS_202),
2070 SND_PCI_QUIRK(0x1019, 0x2608,
2071 "ECS/PC chips", STAC_ECS_202),
2072 SND_PCI_QUIRK(0x1019, 0x2633,
2073 "ECS/PC chips P17G/1333", STAC_ECS_202),
2074 SND_PCI_QUIRK(0x1019, 0x2811,
2075 "ECS/PC chips", STAC_ECS_202),
2076 SND_PCI_QUIRK(0x1019, 0x2812,
2077 "ECS/PC chips", STAC_ECS_202),
2078 SND_PCI_QUIRK(0x1019, 0x2813,
2079 "ECS/PC chips", STAC_ECS_202),
2080 SND_PCI_QUIRK(0x1019, 0x2814,
2081 "ECS/PC chips", STAC_ECS_202),
2082 SND_PCI_QUIRK(0x1019, 0x2815,
2083 "ECS/PC chips", STAC_ECS_202),
2084 SND_PCI_QUIRK(0x1019, 0x2816,
2085 "ECS/PC chips", STAC_ECS_202),
2086 SND_PCI_QUIRK(0x1019, 0x2817,
2087 "ECS/PC chips", STAC_ECS_202),
2088 SND_PCI_QUIRK(0x1019, 0x2818,
2089 "ECS/PC chips", STAC_ECS_202),
2090 SND_PCI_QUIRK(0x1019, 0x2819,
2091 "ECS/PC chips", STAC_ECS_202),
2092 SND_PCI_QUIRK(0x1019, 0x2820,
2093 "ECS/PC chips", STAC_ECS_202),
403d1944
MP
2094 {} /* terminator */
2095};
2096
3cc08dc6 2097static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD
2098 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2099 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2100 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2101 0x01c42190, 0x40000100,
3cc08dc6
MP
2102};
2103
93ed1503 2104static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD
2105 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2106 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2107 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2108 0x40000100, 0x40000100
2109};
2110
93ed1503
TD
2111static unsigned int d965_5st_pin_configs[14] = {
2112 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2113 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2114 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2115 0x40000100, 0x40000100
2116};
2117
4ff076e5
TD
2118static unsigned int dell_3st_pin_configs[14] = {
2119 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2120 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2121 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD
2122 0x40c003fc, 0x40000100
2123};
2124
93ed1503 2125static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2126 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR
2127 [STAC_D965_REF] = ref927x_pin_configs,
2128 [STAC_D965_3ST] = d965_3st_pin_configs,
2129 [STAC_D965_5ST] = d965_5st_pin_configs,
2130 [STAC_DELL_3ST] = dell_3st_pin_configs,
2131 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP
2132};
2133
f5fcc13c 2134static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2135 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR
2136 [STAC_D965_REF] = "ref",
2137 [STAC_D965_3ST] = "3stack",
2138 [STAC_D965_5ST] = "5stack",
2139 [STAC_DELL_3ST] = "dell-3stack",
2140 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI
2141};
2142
2143static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2144 /* SigmaTel reference board */
2145 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2146 "DFI LanParty", STAC_D965_REF),
81d3dbde 2147 /* Intel 946 based systems */
f5fcc13c
TI
2148 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2149 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2150 /* 965 based 3 stack systems */
f5fcc13c
TI
2151 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2152 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2153 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2154 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2155 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2157 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2158 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2159 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2160 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2161 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2163 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2164 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2165 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2166 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2167 /* Dell 3 stack systems */
8e9068b1 2168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD
2170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2172 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR
2173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR
2177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2181 /* 965 based 5 stack systems */
f5fcc13c
TI
2182 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2183 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2184 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2185 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2186 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2187 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2188 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2189 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2190 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP
2191 {} /* terminator */
2192};
2193
f3302a59
MP
2194static unsigned int ref9205_pin_configs[12] = {
2195 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2196 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2197 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP
2198};
2199
dfe495d0
TI
2200/*
2201 STAC 9205 pin configs for
2202 102801F1
2203 102801F2
2204 102801FC
2205 102801FD
2206 10280204
2207 1028021F
3fa2ef74 2208 10280228 (Dell Vostro 1500)
dfe495d0
TI
2209*/
2210static unsigned int dell_9205_m42_pin_configs[12] = {
2211 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2212 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2213 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2214};
2215
2216/*
2217 STAC 9205 pin configs for
2218 102801F9
2219 102801FA
2220 102801FE
2221 102801FF (Dell Precision M4300)
2222 10280206
2223 10280200
2224 10280201
2225*/
2226static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD
2227 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2228 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2229 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2230};
2231
dfe495d0 2232static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD
2233 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2234 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2235 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2236};
2237
f5fcc13c 2238static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2239 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI
2240 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2241 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2242 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP
2243};
2244
f5fcc13c
TI
2245static const char *stac9205_models[STAC_9205_MODELS] = {
2246 [STAC_9205_REF] = "ref",
dfe495d0 2247 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD
2248 [STAC_9205_DELL_M43] = "dell-m43",
2249 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI
2250};
2251
2252static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2253 /* SigmaTel reference board */
2254 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2255 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI
2256 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2257 "unknown Dell", STAC_9205_DELL_M42),
2258 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2259 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2260 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2261 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2262 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2263 "Dell Precision", STAC_9205_DELL_M43),
2264 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2265 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI
2266 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2267 "unknown Dell", STAC_9205_DELL_M42),
2268 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2269 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD
2270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2271 "Dell Precision", STAC_9205_DELL_M43),
2272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2273 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI
2274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2275 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI
2276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2277 "Dell Precision", STAC_9205_DELL_M43),
2278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2279 "Dell Precision", STAC_9205_DELL_M43),
2280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2281 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2283 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR
2284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2285 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP
2286 {} /* terminator */
2287};
2288
11b44bbd
RF
2289static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2290{
2291 int i;
2292 struct sigmatel_spec *spec = codec->spec;
2293
af9f341a
TI
2294 kfree(spec->pin_configs);
2295 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2296 GFP_KERNEL);
2297 if (!spec->pin_configs)
2298 return -ENOMEM;
11b44bbd
RF
2299
2300 for (i = 0; i < spec->num_pins; i++) {
2301 hda_nid_t nid = spec->pin_nids[i];
2302 unsigned int pin_cfg;
2303
2304 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2305 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2306 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2307 nid, pin_cfg);
af9f341a 2308 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF
2309 }
2310
2311 return 0;
2312}
2313
87d48363
MR
2314static void stac92xx_set_config_reg(struct hda_codec *codec,
2315 hda_nid_t pin_nid, unsigned int pin_config)
2316{
2317 int i;
2318 snd_hda_codec_write(codec, pin_nid, 0,
2319 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2320 pin_config & 0x000000ff);
2321 snd_hda_codec_write(codec, pin_nid, 0,
2322 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2323 (pin_config & 0x0000ff00) >> 8);
2324 snd_hda_codec_write(codec, pin_nid, 0,
2325 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2326 (pin_config & 0x00ff0000) >> 16);
2327 snd_hda_codec_write(codec, pin_nid, 0,
2328 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2329 pin_config >> 24);
2330 i = snd_hda_codec_read(codec, pin_nid, 0,
2331 AC_VERB_GET_CONFIG_DEFAULT,
2332 0x00);
2333 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2334 pin_nid, i);
2335}
2336
2f2f4251
M
2337static void stac92xx_set_config_regs(struct hda_codec *codec)
2338{
2339 int i;
2340 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2341
87d48363
MR
2342 if (!spec->pin_configs)
2343 return;
11b44bbd 2344
87d48363
MR
2345 for (i = 0; i < spec->num_pins; i++)
2346 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2347 spec->pin_configs[i]);
2f2f4251 2348}
2f2f4251 2349
af9f341a
TI
2350static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2351{
2352 struct sigmatel_spec *spec = codec->spec;
2353
2354 if (!pins)
2355 return stac92xx_save_bios_config_regs(codec);
2356
2357 kfree(spec->pin_configs);
2358 spec->pin_configs = kmemdup(pins,
2359 spec->num_pins * sizeof(*pins),
2360 GFP_KERNEL);
2361 if (!spec->pin_configs)
2362 return -ENOMEM;
2363
2364 stac92xx_set_config_regs(codec);
2365 return 0;
2366}
2367
2368static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2369 unsigned int cfg)
2370{
2371 struct sigmatel_spec *spec = codec->spec;
2372 int i;
2373
2374 for (i = 0; i < spec->num_pins; i++) {
2375 if (spec->pin_nids[i] == nid) {
2376 spec->pin_configs[i] = cfg;
2377 stac92xx_set_config_reg(codec, nid, cfg);
2378 break;
2379 }
2380 }
2381}
2382
dabbed6f 2383/*
c7d4b2fa 2384 * Analog playback callbacks
dabbed6f 2385 */
c7d4b2fa
M
2386static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2387 struct hda_codec *codec,
c8b6bf9b 2388 struct snd_pcm_substream *substream)
2f2f4251 2389{
dabbed6f 2390 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR
2391 if (spec->stream_delay)
2392 msleep(spec->stream_delay);
9a08160b
TI
2393 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2394 hinfo);
2f2f4251
M
2395}
2396
2f2f4251
M
2397static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2398 struct hda_codec *codec,
2399 unsigned int stream_tag,
2400 unsigned int format,
c8b6bf9b 2401 struct snd_pcm_substream *substream)
2f2f4251
M
2402{
2403 struct sigmatel_spec *spec = codec->spec;
403d1944 2404 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M
2405}
2406
2407static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2408 struct hda_codec *codec,
c8b6bf9b 2409 struct snd_pcm_substream *substream)
2f2f4251
M
2410{
2411 struct sigmatel_spec *spec = codec->spec;
2412 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2413}
2414
dabbed6f
M
2415/*
2416 * Digital playback callbacks
2417 */
2418static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2419 struct hda_codec *codec,
c8b6bf9b 2420 struct snd_pcm_substream *substream)
dabbed6f
M
2421{
2422 struct sigmatel_spec *spec = codec->spec;
2423 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2424}
2425
2426static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2427 struct hda_codec *codec,
c8b6bf9b 2428 struct snd_pcm_substream *substream)
dabbed6f
M
2429{
2430 struct sigmatel_spec *spec = codec->spec;
2431 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2432}
2433
6b97eb45
TI
2434static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2435 struct hda_codec *codec,
2436 unsigned int stream_tag,
2437 unsigned int format,
2438 struct snd_pcm_substream *substream)
2439{
2440 struct sigmatel_spec *spec = codec->spec;
2441 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2442 stream_tag, format, substream);
2443}
2444
dabbed6f 2445
2f2f4251
M
2446/*
2447 * Analog capture callbacks
2448 */
2449static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2450 struct hda_codec *codec,
2451 unsigned int stream_tag,
2452 unsigned int format,
c8b6bf9b 2453 struct snd_pcm_substream *substream)
2f2f4251
M
2454{
2455 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2456 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2457
8daaaa97
MR
2458 if (spec->powerdown_adcs) {
2459 msleep(40);
8c2f767b 2460 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR
2461 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2462 }
2463 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M
2464 return 0;
2465}
2466
2467static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2468 struct hda_codec *codec,
c8b6bf9b 2469 struct snd_pcm_substream *substream)
2f2f4251
M
2470{
2471 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2472 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2473
8daaaa97
MR
2474 snd_hda_codec_cleanup_stream(codec, nid);
2475 if (spec->powerdown_adcs)
8c2f767b 2476 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2477 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M
2478 return 0;
2479}
2480
dabbed6f
M
2481static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2482 .substreams = 1,
2483 .channels_min = 2,
2484 .channels_max = 2,
2485 /* NID is set in stac92xx_build_pcms */
2486 .ops = {
2487 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI
2488 .close = stac92xx_dig_playback_pcm_close,
2489 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M
2490 },
2491};
2492
2493static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2494 .substreams = 1,
2495 .channels_min = 2,
2496 .channels_max = 2,
2497 /* NID is set in stac92xx_build_pcms */
2498};
2499
2f2f4251
M
2500static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2501 .substreams = 1,
2502 .channels_min = 2,
c7d4b2fa 2503 .channels_max = 8,
2f2f4251
M
2504 .nid = 0x02, /* NID to query formats and rates */
2505 .ops = {
2506 .open = stac92xx_playback_pcm_open,
2507 .prepare = stac92xx_playback_pcm_prepare,
2508 .cleanup = stac92xx_playback_pcm_cleanup
2509 },
2510};
2511
3cc08dc6
MP
2512static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2513 .substreams = 1,
2514 .channels_min = 2,
2515 .channels_max = 2,
2516 .nid = 0x06, /* NID to query formats and rates */
2517 .ops = {
2518 .open = stac92xx_playback_pcm_open,
2519 .prepare = stac92xx_playback_pcm_prepare,
2520 .cleanup = stac92xx_playback_pcm_cleanup
2521 },
2522};
2523
2f2f4251 2524static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M
2525 .channels_min = 2,
2526 .channels_max = 2,
9e05b7a3 2527 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M
2528 .ops = {
2529 .prepare = stac92xx_capture_pcm_prepare,
2530 .cleanup = stac92xx_capture_pcm_cleanup
2531 },
2532};
2533
2534static int stac92xx_build_pcms(struct hda_codec *codec)
2535{
2536 struct sigmatel_spec *spec = codec->spec;
2537 struct hda_pcm *info = spec->pcm_rec;
2538
2539 codec->num_pcms = 1;
2540 codec->pcm_info = info;
2541
c7d4b2fa 2542 info->name = "STAC92xx Analog";
2f2f4251 2543 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2544 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2545 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2546 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP
2547
2548 if (spec->alt_switch) {
2549 codec->num_pcms++;
2550 info++;
2551 info->name = "STAC92xx Analog Alt";
2552 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2553 }
2f2f4251 2554
dabbed6f
M
2555 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2556 codec->num_pcms++;
2557 info++;
2558 info->name = "STAC92xx Digital";
8c441982 2559 info->pcm_type = spec->autocfg.dig_out_type;
dabbed6f
M
2560 if (spec->multiout.dig_out_nid) {
2561 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2562 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2563 }
2564 if (spec->dig_in_nid) {
2565 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2566 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2567 }
2568 }
2569
2f2f4251
M
2570 return 0;
2571}
2572
c960a03b
TI
2573static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2574{
2575 unsigned int pincap = snd_hda_param_read(codec, nid,
2576 AC_PAR_PIN_CAP);
2577 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2578 if (pincap & AC_PINCAP_VREF_100)
2579 return AC_PINCTL_VREF_100;
2580 if (pincap & AC_PINCAP_VREF_80)
2581 return AC_PINCTL_VREF_80;
2582 if (pincap & AC_PINCAP_VREF_50)
2583 return AC_PINCTL_VREF_50;
2584 if (pincap & AC_PINCAP_VREF_GRD)
2585 return AC_PINCTL_VREF_GRD;
2586 return 0;
2587}
2588
403d1944
MP
2589static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2590
2591{
82beb8fd
TI
2592 snd_hda_codec_write_cache(codec, nid, 0,
2593 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP
2594}
2595
7c2ba97b
MR
2596#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2597
2598static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2599 struct snd_ctl_elem_value *ucontrol)
2600{
2601 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2602 struct sigmatel_spec *spec = codec->spec;
2603
d7a89436 2604 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR
2605 return 0;
2606}
2607
c6e4c666
TI
2608static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2609 unsigned char type);
2610
7c2ba97b
MR
2611static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2612 struct snd_ctl_elem_value *ucontrol)
2613{
2614 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2615 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI
2616 int nid = kcontrol->private_value;
2617
2618 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR
2619
2620 /* check to be sure that the ports are upto date with
2621 * switch changes
2622 */
c6e4c666 2623 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR
2624
2625 return 1;
2626}
2627
a5ce8890 2628#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP
2629
2630static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2631{
2632 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2633 struct sigmatel_spec *spec = codec->spec;
2634 int io_idx = kcontrol-> private_value & 0xff;
2635
2636 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2637 return 0;
2638}
2639
2640static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2641{
2642 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2643 struct sigmatel_spec *spec = codec->spec;
2644 hda_nid_t nid = kcontrol->private_value >> 8;
2645 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2646 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP
2647
2648 spec->io_switch[io_idx] = val;
2649
2650 if (val)
2651 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI
2652 else {
2653 unsigned int pinctl = AC_PINCTL_IN_EN;
2654 if (io_idx) /* set VREF for mic */
2655 pinctl |= stac92xx_get_vref(codec, nid);
2656 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2657 }
40c1d308
JZ
2658
2659 /* check the auto-mute again: we need to mute/unmute the speaker
2660 * appropriately according to the pin direction
2661 */
2662 if (spec->hp_detect)
c6e4c666 2663 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2664
403d1944
MP
2665 return 1;
2666}
2667
0fb87bb4
ML
2668#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2669
2670static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2671 struct snd_ctl_elem_value *ucontrol)
2672{
2673 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2674 struct sigmatel_spec *spec = codec->spec;
2675
2676 ucontrol->value.integer.value[0] = spec->clfe_swap;
2677 return 0;
2678}
2679
2680static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2681 struct snd_ctl_elem_value *ucontrol)
2682{
2683 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2684 struct sigmatel_spec *spec = codec->spec;
2685 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2686 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2687
68ea7b2f 2688 if (spec->clfe_swap == val)
0fb87bb4
ML
2689 return 0;
2690
68ea7b2f 2691 spec->clfe_swap = val;
0fb87bb4
ML
2692
2693 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2694 spec->clfe_swap ? 0x4 : 0x0);
2695
2696 return 1;
2697}
2698
7c2ba97b
MR
2699#define STAC_CODEC_HP_SWITCH(xname) \
2700 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2701 .name = xname, \
2702 .index = 0, \
2703 .info = stac92xx_hp_switch_info, \
2704 .get = stac92xx_hp_switch_get, \
2705 .put = stac92xx_hp_switch_put, \
2706 }
2707
403d1944
MP
2708#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2709 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2710 .name = xname, \
2711 .index = 0, \
2712 .info = stac92xx_io_switch_info, \
2713 .get = stac92xx_io_switch_get, \
2714 .put = stac92xx_io_switch_put, \
2715 .private_value = xpval, \
2716 }
2717
0fb87bb4
ML
2718#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2719 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2720 .name = xname, \
2721 .index = 0, \
2722 .info = stac92xx_clfe_switch_info, \
2723 .get = stac92xx_clfe_switch_get, \
2724 .put = stac92xx_clfe_switch_put, \
2725 .private_value = xpval, \
2726 }
403d1944 2727
c7d4b2fa
M
2728enum {
2729 STAC_CTL_WIDGET_VOL,
2730 STAC_CTL_WIDGET_MUTE,
09a99959 2731 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR
2732 STAC_CTL_WIDGET_AMP_MUX,
2733 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2734 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2735 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2736 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M
2737};
2738
c8b6bf9b 2739static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M
2740 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2741 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2742 STAC_MONO_MUX,
89385035
MR
2743 STAC_AMP_MUX,
2744 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2745 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2746 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2747 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M
2748};
2749
2750/* add dynamic controls */
4d4e9bb3
TI
2751static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2752 struct snd_kcontrol_new *ktemp,
2753 int idx, const char *name,
2754 unsigned long val)
c7d4b2fa 2755{
c8b6bf9b 2756 struct snd_kcontrol_new *knew;
c7d4b2fa 2757
603c4019
TI
2758 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2759 knew = snd_array_new(&spec->kctls);
2760 if (!knew)
2761 return -ENOMEM;
4d4e9bb3 2762 *knew = *ktemp;
4682eee0 2763 knew->index = idx;
82fe0c58 2764 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2765 if (!knew->name)
c7d4b2fa
M
2766 return -ENOMEM;
2767 knew->private_value = val;
c7d4b2fa
M
2768 return 0;
2769}
2770
4d4e9bb3
TI
2771static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2772 int type, int idx, const char *name,
2773 unsigned long val)
2774{
2775 return stac92xx_add_control_temp(spec,
2776 &stac92xx_control_templates[type],
2777 idx, name, val);
2778}
2779
4682eee0
MR
2780
2781/* add dynamic controls */
4d4e9bb3
TI
2782static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2783 const char *name, unsigned long val)
4682eee0
MR
2784{
2785 return stac92xx_add_control_idx(spec, type, 0, name, val);
2786}
2787
c21ca4a8
TI
2788/* check whether the line-input can be used as line-out */
2789static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP
2790{
2791 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2792 struct auto_pin_cfg *cfg = &spec->autocfg;
2793 hda_nid_t nid;
2794 unsigned int pincap;
8e9068b1 2795
c21ca4a8
TI
2796 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2797 return 0;
2798 nid = cfg->input_pins[AUTO_PIN_LINE];
2799 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2800 if (pincap & AC_PINCAP_OUT)
2801 return nid;
2802 return 0;
2803}
403d1944 2804
c21ca4a8
TI
2805/* check whether the mic-input can be used as line-out */
2806static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2807{
2808 struct sigmatel_spec *spec = codec->spec;
2809 struct auto_pin_cfg *cfg = &spec->autocfg;
2810 unsigned int def_conf, pincap;
2811 unsigned int mic_pin;
2812
2813 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2814 return 0;
2815 mic_pin = AUTO_PIN_MIC;
2816 for (;;) {
2817 hda_nid_t nid = cfg->input_pins[mic_pin];
2818 def_conf = snd_hda_codec_read(codec, nid, 0,
2819 AC_VERB_GET_CONFIG_DEFAULT, 0);
2820 /* some laptops have an internal analog microphone
2821 * which can't be used as a output */
2822 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2823 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2824 if (pincap & AC_PINCAP_OUT)
2825 return nid;
403d1944 2826 }
c21ca4a8
TI
2827 if (mic_pin == AUTO_PIN_MIC)
2828 mic_pin = AUTO_PIN_FRONT_MIC;
2829 else
2830 break;
403d1944 2831 }
403d1944
MP
2832 return 0;
2833}
2834
7b043899
SL
2835static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2836{
2837 int i;
2838
2839 for (i = 0; i < spec->multiout.num_dacs; i++) {
2840 if (spec->multiout.dac_nids[i] == nid)
2841 return 1;
2842 }
2843
2844 return 0;
2845}
2846
c21ca4a8
TI
2847static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2848{
2849 int i;
2850 if (is_in_dac_nids(spec, nid))
2851 return 1;
2852 for (i = 0; i < spec->autocfg.hp_outs; i++)
2853 if (spec->hp_dacs[i] == nid)
2854 return 1;
2855 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2856 if (spec->speaker_dacs[i] == nid)
2857 return 1;
2858 return 0;
2859}
2860
2861static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2862{
2863 struct sigmatel_spec *spec = codec->spec;
2864 int j, conn_len;
2865 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2866 unsigned int wcaps, wtype;
2867
2868 conn_len = snd_hda_get_connections(codec, nid, conn,
2869 HDA_MAX_CONNECTIONS);
2870 for (j = 0; j < conn_len; j++) {
2871 wcaps = snd_hda_param_read(codec, conn[j],
2872 AC_PAR_AUDIO_WIDGET_CAP);
2873 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2874 /* we check only analog outputs */
2875 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2876 continue;
2877 /* if this route has a free DAC, assign it */
2878 if (!check_all_dac_nids(spec, conn[j])) {
2879 if (conn_len > 1) {
2880 /* select this DAC in the pin's input mux */
2881 snd_hda_codec_write_cache(codec, nid, 0,
2882 AC_VERB_SET_CONNECT_SEL, j);
2883 }
2884 return conn[j];
2885 }
2886 }
2887 return 0;
2888}
2889
2890static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2891static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2892
3cc08dc6 2893/*
7b043899
SL
2894 * Fill in the dac_nids table from the parsed pin configuration
2895 * This function only works when every pin in line_out_pins[]
2896 * contains atleast one DAC in its connection list. Some 92xx
2897 * codecs are not connected directly to a DAC, such as the 9200
2898 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2899 */
c21ca4a8 2900static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M
2901{
2902 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2903 struct auto_pin_cfg *cfg = &spec->autocfg;
2904 int i;
2905 hda_nid_t nid, dac;
7b043899 2906
c7d4b2fa
M
2907 for (i = 0; i < cfg->line_outs; i++) {
2908 nid = cfg->line_out_pins[i];
c21ca4a8
TI
2909 dac = get_unassigned_dac(codec, nid);
2910 if (!dac) {
df802952
TI
2911 if (spec->multiout.num_dacs > 0) {
2912 /* we have already working output pins,
2913 * so let's drop the broken ones again
2914 */
2915 cfg->line_outs = spec->multiout.num_dacs;
2916 break;
2917 }
7b043899
SL
2918 /* error out, no available DAC found */
2919 snd_printk(KERN_ERR
2920 "%s: No available DAC for pin 0x%x\n",
2921 __func__, nid);
2922 return -ENODEV;
2923 }
c21ca4a8
TI
2924 add_spec_dacs(spec, dac);
2925 }
7b043899 2926
c21ca4a8
TI
2927 /* add line-in as output */
2928 nid = check_line_out_switch(codec);
2929 if (nid) {
2930 dac = get_unassigned_dac(codec, nid);
2931 if (dac) {
2932 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2933 nid, cfg->line_outs);
2934 cfg->line_out_pins[cfg->line_outs] = nid;
2935 cfg->line_outs++;
2936 spec->line_switch = nid;
2937 add_spec_dacs(spec, dac);
2938 }
2939 }
2940 /* add mic as output */
2941 nid = check_mic_out_switch(codec);
2942 if (nid) {
2943 dac = get_unassigned_dac(codec, nid);
2944 if (dac) {
2945 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2946 nid, cfg->line_outs);
2947 cfg->line_out_pins[cfg->line_outs] = nid;
2948 cfg->line_outs++;
2949 spec->mic_switch = nid;
2950 add_spec_dacs(spec, dac);
2951 }
2952 }
c7d4b2fa 2953
c21ca4a8
TI
2954 for (i = 0; i < cfg->hp_outs; i++) {
2955 nid = cfg->hp_pins[i];
2956 dac = get_unassigned_dac(codec, nid);
2957 if (dac) {
2958 if (!spec->multiout.hp_nid)
2959 spec->multiout.hp_nid = dac;
2960 else
2961 add_spec_extra_dacs(spec, dac);
7b043899 2962 }
c21ca4a8
TI
2963 spec->hp_dacs[i] = dac;
2964 }
2965
2966 for (i = 0; i < cfg->speaker_outs; i++) {
2967 nid = cfg->speaker_pins[i];
2968 dac = get_unassigned_dac(codec, nid);
2969 if (dac)
2970 add_spec_extra_dacs(spec, dac);
2971 spec->speaker_dacs[i] = dac;
7b043899 2972 }
c7d4b2fa 2973
c21ca4a8 2974 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL
2975 spec->multiout.num_dacs,
2976 spec->multiout.dac_nids[0],
2977 spec->multiout.dac_nids[1],
2978 spec->multiout.dac_nids[2],
2979 spec->multiout.dac_nids[3],
2980 spec->multiout.dac_nids[4]);
c21ca4a8 2981
c7d4b2fa
M
2982 return 0;
2983}
2984
eb06ed8f 2985/* create volume control/switch for the given prefx type */
7c7767eb
TI
2986static int create_controls(struct hda_codec *codec, const char *pfx,
2987 hda_nid_t nid, int chs)
eb06ed8f 2988{
7c7767eb 2989 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI
2990 char name[32];
2991 int err;
2992
7c7767eb
TI
2993 if (!spec->check_volume_offset) {
2994 unsigned int caps, step, nums, db_scale;
2995 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
2996 step = (caps & AC_AMPCAP_STEP_SIZE) >>
2997 AC_AMPCAP_STEP_SIZE_SHIFT;
2998 step = (step + 1) * 25; /* in .01dB unit */
2999 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3000 AC_AMPCAP_NUM_STEPS_SHIFT;
3001 db_scale = nums * step;
3002 /* if dB scale is over -64dB, and finer enough,
3003 * let's reduce it to half
3004 */
3005 if (db_scale > 6400 && nums >= 0x1f)
3006 spec->volume_offset = nums / 2;
3007 spec->check_volume_offset = 1;
3008 }
3009
eb06ed8f
TI
3010 sprintf(name, "%s Playback Volume", pfx);
3011 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
7c7767eb
TI
3012 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3013 spec->volume_offset));
eb06ed8f
TI
3014 if (err < 0)
3015 return err;
3016 sprintf(name, "%s Playback Switch", pfx);
3017 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
3018 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3019 if (err < 0)
3020 return err;
3021 return 0;
3022}
3023
ae0afd81
MR
3024static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3025{
c21ca4a8 3026 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR
3027 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3028 return 1;
3029 } else {
3030 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3031 spec->multiout.num_dacs++;
3032 }
3033 return 0;
3034}
3035
c21ca4a8 3036static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3037{
c21ca4a8
TI
3038 int i;
3039 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3040 if (!spec->multiout.extra_out_nid[i]) {
3041 spec->multiout.extra_out_nid[i] = nid;
3042 return 0;
3043 }
3044 }
3045 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3046 return 1;
ae0afd81
MR
3047}
3048
76624534
TI
3049static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid)
3050{
3051 int i;
3052
3053 if (spec->autocfg.line_outs != 1)
3054 return 0;
3055 if (spec->multiout.hp_nid == nid)
3056 return 0;
3057 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++)
3058 if (spec->multiout.extra_out_nid[i] == nid)
3059 return 0;
3060 return 1;
3061}
3062
c7d4b2fa 3063/* add playback controls from the parsed DAC table */
0fb87bb4 3064static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 3065 const struct auto_pin_cfg *cfg)
c7d4b2fa 3066{
76624534 3067 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI
3068 static const char *chname[4] = {
3069 "Front", "Surround", NULL /*CLFE*/, "Side"
3070 };
d21995e3 3071 hda_nid_t nid = 0;
91589232
TI
3072 int i, err;
3073 unsigned int wid_caps;
0fb87bb4 3074
c21ca4a8 3075 for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
c7d4b2fa 3076 nid = spec->multiout.dac_nids[i];
c7d4b2fa
M
3077 if (i == 2) {
3078 /* Center/LFE */
7c7767eb 3079 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3080 if (err < 0)
c7d4b2fa 3081 return err;
7c7767eb 3082 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3083 if (err < 0)
c7d4b2fa 3084 return err;
0fb87bb4
ML
3085
3086 wid_caps = get_wcaps(codec, nid);
3087
3088 if (wid_caps & AC_WCAP_LR_SWAP) {
3089 err = stac92xx_add_control(spec,
3090 STAC_CTL_WIDGET_CLFE_SWITCH,
3091 "Swap Center/LFE Playback Switch", nid);
3092
3093 if (err < 0)
3094 return err;
3095 }
3096
c7d4b2fa 3097 } else {
76624534
TI
3098 const char *name = chname[i];
3099 /* if it's a single DAC, assign a better name */
3100 if (!i && is_unique_dac(spec, nid)) {
3101 switch (cfg->line_out_type) {
3102 case AUTO_PIN_HP_OUT:
3103 name = "Headphone";
3104 break;
3105 case AUTO_PIN_SPEAKER_OUT:
3106 name = "Speaker";
3107 break;
3108 }
3109 }
7c7767eb 3110 err = create_controls(codec, name, nid, 3);
eb06ed8f 3111 if (err < 0)
c7d4b2fa
M
3112 return err;
3113 }
3114 }
3115
a9cb5c90 3116 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR
3117 err = stac92xx_add_control(spec,
3118 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI
3119 "Headphone as Line Out Switch",
3120 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR
3121 if (err < 0)
3122 return err;
3123 }
3124
b5895dc8 3125 if (spec->line_switch) {
c21ca4a8
TI
3126 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3127 "Line In as Output Switch",
3128 spec->line_switch << 8);
3129 if (err < 0)
3130 return err;
b5895dc8 3131 }
403d1944 3132
b5895dc8 3133 if (spec->mic_switch) {
c21ca4a8
TI
3134 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3135 "Mic as Output Switch",
3136 (spec->mic_switch << 8) | 1);
3137 if (err < 0)
3138 return err;
b5895dc8 3139 }
403d1944 3140
c7d4b2fa
M
3141 return 0;
3142}
3143
eb06ed8f
TI
3144/* add playback controls for Speaker and HP outputs */
3145static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3146 struct auto_pin_cfg *cfg)
3147{
3148 struct sigmatel_spec *spec = codec->spec;
3149 hda_nid_t nid;
c21ca4a8 3150 int i, err, nums;
eb06ed8f 3151
c21ca4a8 3152 nums = 0;
eb06ed8f 3153 for (i = 0; i < cfg->hp_outs; i++) {
c21ca4a8
TI
3154 static const char *pfxs[] = {
3155 "Headphone", "Headphone2", "Headphone3",
3156 };
eb06ed8f
TI
3157 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3158 if (wid_caps & AC_WCAP_UNSOL_CAP)
3159 spec->hp_detect = 1;
c21ca4a8 3160 if (nums >= ARRAY_SIZE(pfxs))
c7d4b2fa 3161 continue;
c21ca4a8
TI
3162 nid = spec->hp_dacs[i];
3163 if (!nid)
eb06ed8f 3164 continue;
7c7767eb 3165 err = create_controls(codec, pfxs[nums++], nid, 3);
c21ca4a8
TI
3166 if (err < 0)
3167 return err;
1b290a51 3168 }
c21ca4a8
TI
3169 nums = 0;
3170 for (i = 0; i < cfg->speaker_outs; i++) {
eb06ed8f
TI
3171 static const char *pfxs[] = {
3172 "Speaker", "External Speaker", "Speaker2",
3173 };
c21ca4a8
TI
3174 if (nums >= ARRAY_SIZE(pfxs))
3175 continue;
3176 nid = spec->speaker_dacs[i];
3177 if (!nid)
3178 continue;
7c7767eb 3179 err = create_controls(codec, pfxs[nums++], nid, 3);
eb06ed8f
TI
3180 if (err < 0)
3181 return err;
3182 }
c7d4b2fa
M
3183 return 0;
3184}
3185
b22b4821 3186/* labels for mono mux outputs */
d0513fc6
MR
3187static const char *stac92xx_mono_labels[4] = {
3188 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR
3189};
3190
3191/* create mono mux for mono out on capable codecs */
3192static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3193{
3194 struct sigmatel_spec *spec = codec->spec;
3195 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3196 int i, num_cons;
3197 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3198
3199 num_cons = snd_hda_get_connections(codec,
3200 spec->mono_nid,
3201 con_lst,
3202 HDA_MAX_NUM_INPUTS);
3203 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3204 return -EINVAL;
3205
3206 for (i = 0; i < num_cons; i++) {
3207 mono_mux->items[mono_mux->num_items].label =
3208 stac92xx_mono_labels[i];
3209 mono_mux->items[mono_mux->num_items].index = i;
3210 mono_mux->num_items++;
3211 }
09a99959
MR
3212
3213 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3214 "Mono Mux", spec->mono_nid);
b22b4821
MR
3215}
3216
89385035
MR
3217/* labels for amp mux outputs */
3218static const char *stac92xx_amp_labels[3] = {
4b33c767 3219 "Front Microphone", "Microphone", "Line In",
89385035
MR
3220};
3221
3222/* create amp out controls mux on capable codecs */
3223static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3224{
3225 struct sigmatel_spec *spec = codec->spec;
3226 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3227 int i, err;
3228
2a9c7816 3229 for (i = 0; i < spec->num_amps; i++) {
89385035
MR
3230 amp_mux->items[amp_mux->num_items].label =
3231 stac92xx_amp_labels[i];
3232 amp_mux->items[amp_mux->num_items].index = i;
3233 amp_mux->num_items++;
3234 }
3235
2a9c7816
MR
3236 if (spec->num_amps > 1) {
3237 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3238 "Amp Selector Capture Switch", 0);
3239 if (err < 0)
3240 return err;
3241 }
89385035
MR
3242 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3243 "Amp Capture Volume",
3244 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3245}
3246
3247
1cd2224c
MR
3248/* create PC beep volume controls */
3249static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3250 hda_nid_t nid)
3251{
3252 struct sigmatel_spec *spec = codec->spec;
3253 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3254 int err;
3255
3256 /* check for mute support for the the amp */
3257 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3258 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3259 "PC Beep Playback Switch",
3260 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3261 if (err < 0)
3262 return err;
3263 }
3264
3265 /* check to see if there is volume support for the amp */
3266 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3267 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3268 "PC Beep Playback Volume",
3269 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3270 if (err < 0)
3271 return err;
3272 }
3273 return 0;
3274}
3275
4d4e9bb3
TI
3276#ifdef CONFIG_SND_HDA_INPUT_BEEP
3277#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3278
3279static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3280 struct snd_ctl_elem_value *ucontrol)
3281{
3282 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3283 ucontrol->value.integer.value[0] = codec->beep->enabled;
3284 return 0;
3285}
3286
3287static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3288 struct snd_ctl_elem_value *ucontrol)
3289{
3290 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3291 int enabled = !!ucontrol->value.integer.value[0];
3292 if (codec->beep->enabled != enabled) {
3293 codec->beep->enabled = enabled;
3294 return 1;
3295 }
3296 return 0;
3297}
3298
3299static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3300 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3301 .info = stac92xx_dig_beep_switch_info,
3302 .get = stac92xx_dig_beep_switch_get,
3303 .put = stac92xx_dig_beep_switch_put,
3304};
3305
3306static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3307{
3308 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3309 0, "PC Beep Playback Switch", 0);
3310}
3311#endif
3312
4682eee0
MR
3313static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3314{
3315 struct sigmatel_spec *spec = codec->spec;
3316 int wcaps, nid, i, err = 0;
3317
3318 for (i = 0; i < spec->num_muxes; i++) {
3319 nid = spec->mux_nids[i];
3320 wcaps = get_wcaps(codec, nid);
3321
3322 if (wcaps & AC_WCAP_OUT_AMP) {
3323 err = stac92xx_add_control_idx(spec,
3324 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3325 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3326 if (err < 0)
3327 return err;
3328 }
3329 }
3330 return 0;
3331};
3332
d9737751 3333static const char *stac92xx_spdif_labels[3] = {
65973632 3334 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR
3335};
3336
3337static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3338{
3339 struct sigmatel_spec *spec = codec->spec;
3340 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3341 const char **labels = spec->spdif_labels;
d9737751 3342 int i, num_cons;
65973632 3343 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR
3344
3345 num_cons = snd_hda_get_connections(codec,
3346 spec->smux_nids[0],
3347 con_lst,
3348 HDA_MAX_NUM_INPUTS);
65973632 3349 if (!num_cons)
d9737751
MR
3350 return -EINVAL;
3351
65973632
MR
3352 if (!labels)
3353 labels = stac92xx_spdif_labels;
3354
d9737751 3355 for (i = 0; i < num_cons; i++) {
65973632 3356 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR
3357 spdif_mux->items[spdif_mux->num_items].index = i;
3358 spdif_mux->num_items++;
3359 }
3360
3361 return 0;
3362}
3363
8b65727b 3364/* labels for dmic mux inputs */
ddc2cec4 3365static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP
3366 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3367 "Digital Mic 3", "Digital Mic 4"
3368};
3369
3370/* create playback/capture controls for input pins on dmic capable codecs */
3371static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3372 const struct auto_pin_cfg *cfg)
3373{
3374 struct sigmatel_spec *spec = codec->spec;
3375 struct hda_input_mux *dimux = &spec->private_dimux;
3376 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR
3377 int err, i, j;
3378 char name[32];
8b65727b
MP
3379
3380 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3381 dimux->items[dimux->num_items].index = 0;
3382 dimux->num_items++;
3383
3384 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3385 hda_nid_t nid;
8b65727b
MP
3386 int index;
3387 int num_cons;
0678accd 3388 unsigned int wcaps;
8b65727b
MP
3389 unsigned int def_conf;
3390
3391 def_conf = snd_hda_codec_read(codec,
3392 spec->dmic_nids[i],
3393 0,
3394 AC_VERB_GET_CONFIG_DEFAULT,
3395 0);
3396 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3397 continue;
3398
0678accd 3399 nid = spec->dmic_nids[i];
8b65727b 3400 num_cons = snd_hda_get_connections(codec,
e1f0d669 3401 spec->dmux_nids[0],
8b65727b
MP
3402 con_lst,
3403 HDA_MAX_NUM_INPUTS);
3404 for (j = 0; j < num_cons; j++)
0678accd 3405 if (con_lst[j] == nid) {
8b65727b
MP
3406 index = j;
3407 goto found;
3408 }
3409 continue;
3410found:
d0513fc6
MR
3411 wcaps = get_wcaps(codec, nid) &
3412 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3413
d0513fc6 3414 if (wcaps) {
0678accd
MR
3415 sprintf(name, "%s Capture Volume",
3416 stac92xx_dmic_labels[dimux->num_items]);
3417
3418 err = stac92xx_add_control(spec,
3419 STAC_CTL_WIDGET_VOL,
3420 name,
d0513fc6
MR
3421 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3422 (wcaps & AC_WCAP_OUT_AMP) ?
3423 HDA_OUTPUT : HDA_INPUT));
0678accd
MR
3424 if (err < 0)
3425 return err;
3426 }
3427
8b65727b
MP
3428 dimux->items[dimux->num_items].label =
3429 stac92xx_dmic_labels[dimux->num_items];
3430 dimux->items[dimux->num_items].index = index;
3431 dimux->num_items++;
3432 }
3433
3434 return 0;
3435}
3436
c7d4b2fa
M
3437/* create playback/capture controls for input pins */
3438static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3439{
3440 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
3441 struct hda_input_mux *imux = &spec->private_imux;
3442 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3443 int i, j, k;
3444
3445 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI
3446 int index;
3447
3448 if (!cfg->input_pins[i])
3449 continue;
3450 index = -1;
3451 for (j = 0; j < spec->num_muxes; j++) {
3452 int num_cons;
3453 num_cons = snd_hda_get_connections(codec,
3454 spec->mux_nids[j],
3455 con_lst,
3456 HDA_MAX_NUM_INPUTS);
3457 for (k = 0; k < num_cons; k++)
3458 if (con_lst[k] == cfg->input_pins[i]) {
3459 index = k;
3460 goto found;
3461 }
c7d4b2fa 3462 }
314634bc
TI
3463 continue;
3464 found:
3465 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3466 imux->items[imux->num_items].index = index;
3467 imux->num_items++;
c7d4b2fa
M
3468 }
3469
7b043899 3470 if (imux->num_items) {
62fe78e9
SR
3471 /*
3472 * Set the current input for the muxes.
3473 * The STAC9221 has two input muxes with identical source
3474 * NID lists. Hopefully this won't get confused.
3475 */
3476 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI
3477 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3478 AC_VERB_SET_CONNECT_SEL,
3479 imux->items[0].index);
62fe78e9
SR
3480 }
3481 }
3482
c7d4b2fa
M
3483 return 0;
3484}
3485
c7d4b2fa
M
3486static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3487{
3488 struct sigmatel_spec *spec = codec->spec;
3489 int i;
3490
3491 for (i = 0; i < spec->autocfg.line_outs; i++) {
3492 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3493 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3494 }
3495}
3496
3497static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3498{
3499 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3500 int i;
c7d4b2fa 3501
eb06ed8f
TI
3502 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3503 hda_nid_t pin;
3504 pin = spec->autocfg.hp_pins[i];
3505 if (pin) /* connect to front */
3506 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3507 }
3508 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3509 hda_nid_t pin;
3510 pin = spec->autocfg.speaker_pins[i];
3511 if (pin) /* connect to front */
3512 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3513 }
c7d4b2fa
M
3514}
3515
3cc08dc6 3516static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M
3517{
3518 struct sigmatel_spec *spec = codec->spec;
3519 int err;
3520
8b65727b
MP
3521 if ((err = snd_hda_parse_pin_def_config(codec,
3522 &spec->autocfg,
3523 spec->dmic_nids)) < 0)
c7d4b2fa 3524 return err;
82bc955f 3525 if (! spec->autocfg.line_outs)
869264c4 3526 return 0; /* can't find valid pin config */
19039bd0 3527
bcecd9bd
JZ
3528 /* If we have no real line-out pin and multiple hp-outs, HPs should
3529 * be set up as multi-channel outputs.
3530 */
3531 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3532 spec->autocfg.hp_outs > 1) {
3533 /* Copy hp_outs to line_outs, backup line_outs in
3534 * speaker_outs so that the following routines can handle
3535 * HP pins as primary outputs.
3536 */
c21ca4a8 3537 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ
3538 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3539 sizeof(spec->autocfg.line_out_pins));
3540 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3541 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3542 sizeof(spec->autocfg.hp_pins));
3543 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI
3544 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3545 spec->autocfg.hp_outs = 0;
bcecd9bd 3546 }
09a99959 3547 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR
3548 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3549 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR
3550 u32 caps = query_amp_caps(codec,
3551 spec->autocfg.mono_out_pin, dir);
3552 hda_nid_t conn_list[1];
3553
3554 /* get the mixer node and then the mono mux if it exists */
3555 if (snd_hda_get_connections(codec,
3556 spec->autocfg.mono_out_pin, conn_list, 1) &&
3557 snd_hda_get_connections(codec, conn_list[0],
3558 conn_list, 1)) {
3559
3560 int wcaps = get_wcaps(codec, conn_list[0]);
3561 int wid_type = (wcaps & AC_WCAP_TYPE)
3562 >> AC_WCAP_TYPE_SHIFT;
3563 /* LR swap check, some stac925x have a mux that
3564 * changes the DACs output path instead of the
3565 * mono-mux path.
3566 */
3567 if (wid_type == AC_WID_AUD_SEL &&
3568 !(wcaps & AC_WCAP_LR_SWAP))
3569 spec->mono_nid = conn_list[0];
3570 }
d0513fc6
MR
3571 if (dir) {
3572 hda_nid_t nid = spec->autocfg.mono_out_pin;
3573
3574 /* most mono outs have a least a mute/unmute switch */
3575 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3576 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3577 "Mono Playback Switch",
3578 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR
3579 if (err < 0)
3580 return err;
d0513fc6
MR
3581 /* check for volume support for the amp */
3582 if ((caps & AC_AMPCAP_NUM_STEPS)
3583 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3584 err = stac92xx_add_control(spec,
3585 STAC_CTL_WIDGET_VOL,
3586 "Mono Playback Volume",
3587 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3588 if (err < 0)
3589 return err;
3590 }
09a99959
MR
3591 }
3592
3593 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3594 AC_PINCTL_OUT_EN);
3595 }
bcecd9bd 3596
c21ca4a8
TI
3597 if (!spec->multiout.num_dacs) {
3598 err = stac92xx_auto_fill_dac_nids(codec);
3599 if (err < 0)
19039bd0 3600 return err;
c9280d68
TI
3601 err = stac92xx_auto_create_multi_out_ctls(codec,
3602 &spec->autocfg);
3603 if (err < 0)
3604 return err;
c21ca4a8 3605 }
c7d4b2fa 3606
1cd2224c
MR
3607 /* setup analog beep controls */
3608 if (spec->anabeep_nid > 0) {
3609 err = stac92xx_auto_create_beep_ctls(codec,
3610 spec->anabeep_nid);
3611 if (err < 0)
3612 return err;
3613 }
3614
3615 /* setup digital beep controls and input device */
3616#ifdef CONFIG_SND_HDA_INPUT_BEEP
3617 if (spec->digbeep_nid > 0) {
3618 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3619 unsigned int caps;
1cd2224c
MR
3620
3621 err = stac92xx_auto_create_beep_ctls(codec, nid);
3622 if (err < 0)
3623 return err;
3624 err = snd_hda_attach_beep_device(codec, nid);
3625 if (err < 0)
3626 return err;
4d4e9bb3
TI
3627 /* if no beep switch is available, make its own one */
3628 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3629 if (codec->beep &&
3630 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3631 err = stac92xx_beep_switch_ctl(codec);
3632 if (err < 0)
3633 return err;
3634 }
1cd2224c
MR
3635 }
3636#endif
3637
0fb87bb4
ML
3638 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3639
3640 if (err < 0)
3641 return err;
3642
3643 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3644
3645 if (err < 0)
c7d4b2fa
M
3646 return err;
3647
b22b4821
MR
3648 if (spec->mono_nid > 0) {
3649 err = stac92xx_auto_create_mono_output_ctls(codec);
3650 if (err < 0)
3651 return err;
3652 }
2a9c7816 3653 if (spec->num_amps > 0) {
89385035
MR
3654 err = stac92xx_auto_create_amp_output_ctls(codec);
3655 if (err < 0)
3656 return err;
3657 }
2a9c7816 3658 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP
3659 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3660 &spec->autocfg)) < 0)
3661 return err;
4682eee0
MR
3662 if (spec->num_muxes > 0) {
3663 err = stac92xx_auto_create_mux_input_ctls(codec);
3664 if (err < 0)
3665 return err;
3666 }
d9737751
MR
3667 if (spec->num_smuxes > 0) {
3668 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3669 if (err < 0)
3670 return err;
3671 }
8b65727b 3672
c7d4b2fa 3673 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3674 if (spec->multiout.max_channels > 2)
c7d4b2fa 3675 spec->surr_switch = 1;
c7d4b2fa 3676
82bc955f 3677 if (spec->autocfg.dig_out_pin)
3cc08dc6 3678 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3679 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3680 spec->dig_in_nid = dig_in;
c7d4b2fa 3681
603c4019
TI
3682 if (spec->kctls.list)
3683 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3684
3685 spec->input_mux = &spec->private_imux;
f8ccbf65
MR
3686 if (!spec->dinput_mux)
3687 spec->dinput_mux = &spec->private_dimux;
d9737751 3688 spec->sinput_mux = &spec->private_smux;
b22b4821 3689 spec->mono_mux = &spec->private_mono_mux;
89385035 3690 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M
3691 return 1;
3692}
3693
82bc955f
TI
3694/* add playback controls for HP output */
3695static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3696 struct auto_pin_cfg *cfg)
3697{
3698 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3699 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI
3700 unsigned int wid_caps;
3701
3702 if (! pin)
3703 return 0;
3704
3705 wid_caps = get_wcaps(codec, pin);
505cb341 3706 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3707 spec->hp_detect = 1;
82bc955f
TI
3708
3709 return 0;
3710}
3711
160ea0dc
RF
3712/* add playback controls for LFE output */
3713static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3714 struct auto_pin_cfg *cfg)
3715{
3716 struct sigmatel_spec *spec = codec->spec;
3717 int err;
3718 hda_nid_t lfe_pin = 0x0;
3719 int i;
3720
3721 /*
3722 * search speaker outs and line outs for a mono speaker pin
3723 * with an amp. If one is found, add LFE controls
3724 * for it.
3725 */
3726 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3727 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3728 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3729 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3730 if (wcaps == AC_WCAP_OUT_AMP)
3731 /* found a mono speaker with an amp, must be lfe */
3732 lfe_pin = pin;
3733 }
3734
3735 /* if speaker_outs is 0, then speakers may be in line_outs */
3736 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3737 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3738 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3739 unsigned int defcfg;
8b551785 3740 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF
3741 AC_VERB_GET_CONFIG_DEFAULT,
3742 0x00);
8b551785 3743 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3744 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3745 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3746 if (wcaps == AC_WCAP_OUT_AMP)
3747 /* found a mono speaker with an amp,
3748 must be lfe */
3749 lfe_pin = pin;
3750 }
3751 }
3752 }
3753
3754 if (lfe_pin) {
7c7767eb 3755 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF
3756 if (err < 0)
3757 return err;
3758 }
3759
3760 return 0;
3761}
3762
c7d4b2fa
M
3763static int stac9200_parse_auto_config(struct hda_codec *codec)
3764{
3765 struct sigmatel_spec *spec = codec->spec;
3766 int err;
3767
df694daa 3768 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M
3769 return err;
3770
3771 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3772 return err;
3773
82bc955f
TI
3774 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3775 return err;
3776
160ea0dc
RF
3777 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3778 return err;
3779
355a0ec4
TI
3780 if (spec->num_muxes > 0) {
3781 err = stac92xx_auto_create_mux_input_ctls(codec);
3782 if (err < 0)
3783 return err;
3784 }
3785
82bc955f 3786 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3787 spec->multiout.dig_out_nid = 0x05;
82bc955f 3788 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3789 spec->dig_in_nid = 0x04;
c7d4b2fa 3790
603c4019
TI
3791 if (spec->kctls.list)
3792 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3793
3794 spec->input_mux = &spec->private_imux;
8b65727b 3795 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M
3796
3797 return 1;
3798}
3799
62fe78e9
SR
3800/*
3801 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3802 * funky external mute control using GPIO pins.
3803 */
3804
76e1ddfb 3805static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3806 unsigned int dir_mask, unsigned int data)
62fe78e9
SR
3807{
3808 unsigned int gpiostate, gpiomask, gpiodir;
3809
3810 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3811 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3812 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR
3813
3814 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3815 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3816 gpiomask |= mask;
62fe78e9
SR
3817
3818 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3819 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3820 gpiodir |= dir_mask;
62fe78e9 3821
76e1ddfb 3822 /* Configure GPIOx as CMOS */
62fe78e9
SR
3823 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3824
3825 snd_hda_codec_write(codec, codec->afg, 0,
3826 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI
3827 snd_hda_codec_read(codec, codec->afg, 0,
3828 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR
3829
3830 msleep(1);
3831
76e1ddfb
TI
3832 snd_hda_codec_read(codec, codec->afg, 0,
3833 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR
3834}
3835
74aeaabc
MR
3836static int stac92xx_add_jack(struct hda_codec *codec,
3837 hda_nid_t nid, int type)
3838{
e4973e1e 3839#ifdef CONFIG_SND_JACK
74aeaabc
MR
3840 struct sigmatel_spec *spec = codec->spec;
3841 struct sigmatel_jack *jack;
3842 int def_conf = snd_hda_codec_read(codec, nid,
3843 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3844 int connectivity = get_defcfg_connect(def_conf);
3845 char name[32];
3846
3847 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3848 return 0;
3849
3850 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3851 jack = snd_array_new(&spec->jacks);
3852 if (!jack)
3853 return -ENOMEM;
3854 jack->nid = nid;
3855 jack->type = type;
3856
3857 sprintf(name, "%s at %s %s Jack",
3858 snd_hda_get_jack_type(def_conf),
3859 snd_hda_get_jack_connectivity(def_conf),
3860 snd_hda_get_jack_location(def_conf));
3861
3862 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI
3863#else
3864 return 0;
3865#endif
74aeaabc
MR
3866}
3867
c6e4c666
TI
3868static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3869 unsigned char type, int data)
74aeaabc
MR
3870{
3871 struct sigmatel_event *event;
3872
3873 snd_array_init(&spec->events, sizeof(*event), 32);
3874 event = snd_array_new(&spec->events);
3875 if (!event)
3876 return -ENOMEM;
3877 event->nid = nid;
c6e4c666
TI
3878 event->type = type;
3879 event->tag = spec->events.used;
74aeaabc
MR
3880 event->data = data;
3881
c6e4c666 3882 return event->tag;
74aeaabc
MR
3883}
3884
c6e4c666
TI
3885static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3886 hda_nid_t nid, unsigned char type)
74aeaabc
MR
3887{
3888 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
3889 struct sigmatel_event *event = spec->events.list;
3890 int i;
3891
3892 for (i = 0; i < spec->events.used; i++, event++) {
3893 if (event->nid == nid && event->type == type)
3894 return event;
74aeaabc 3895 }
c6e4c666 3896 return NULL;
74aeaabc
MR
3897}
3898
c6e4c666
TI
3899static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3900 unsigned char tag)
314634bc 3901{
c6e4c666
TI
3902 struct sigmatel_spec *spec = codec->spec;
3903 struct sigmatel_event *event = spec->events.list;
3904 int i;
3905
3906 for (i = 0; i < spec->events.used; i++, event++) {
3907 if (event->tag == tag)
3908 return event;
74aeaabc 3909 }
c6e4c666
TI
3910 return NULL;
3911}
3912
3913static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3914 unsigned int type)
3915{
3916 struct sigmatel_event *event;
3917 int tag;
3918
3919 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3920 return;
3921 event = stac_get_event(codec, nid, type);
3922 if (event)
3923 tag = event->tag;
3924 else
3925 tag = stac_add_event(codec->spec, nid, type, 0);
3926 if (tag < 0)
3927 return;
3928 snd_hda_codec_write_cache(codec, nid, 0,
3929 AC_VERB_SET_UNSOLICITED_ENABLE,
3930 AC_USRSP_EN | tag);
314634bc
TI
3931}
3932
a64135a2
MR
3933static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3934{
3935 int i;
3936 for (i = 0; i < cfg->hp_outs; i++)
3937 if (cfg->hp_pins[i] == nid)
3938 return 1; /* nid is a HP-Out */
3939
3940 return 0; /* nid is not a HP-Out */
3941};
3942
b76c850f
MR
3943static void stac92xx_power_down(struct hda_codec *codec)
3944{
3945 struct sigmatel_spec *spec = codec->spec;
3946
3947 /* power down inactive DACs */
3948 hda_nid_t *dac;
3949 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 3950 if (!check_all_dac_nids(spec, *dac))
8c2f767b 3951 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR
3952 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3953}
3954
f73d3585
TI
3955static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3956 int enable);
3957
c7d4b2fa
M
3958static int stac92xx_init(struct hda_codec *codec)
3959{
3960 struct sigmatel_spec *spec = codec->spec;
82bc955f 3961 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3962 unsigned int gpio;
e4973e1e 3963 int i;
c7d4b2fa 3964
c7d4b2fa
M
3965 snd_hda_sequence_write(codec, spec->init);
3966
8daaaa97
MR
3967 /* power down adcs initially */
3968 if (spec->powerdown_adcs)
3969 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 3970 snd_hda_codec_write(codec,
8daaaa97
MR
3971 spec->adc_nids[i], 0,
3972 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI
3973
3974 /* set up GPIO */
3975 gpio = spec->gpio_data;
3976 /* turn on EAPD statically when spec->eapd_switch isn't set.
3977 * otherwise, unsol event will turn it on/off dynamically
3978 */
3979 if (!spec->eapd_switch)
3980 gpio |= spec->eapd_mask;
3981 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3982
82bc955f
TI
3983 /* set up pins */
3984 if (spec->hp_detect) {
505cb341 3985 /* Enable unsolicited responses on the HP widget */
74aeaabc 3986 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 3987 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 3988 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 3989 }
0a07acaf
TI
3990 /* force to enable the first line-out; the others are set up
3991 * in unsol_event
3992 */
3993 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3994 AC_PINCTL_OUT_EN);
82bc955f 3995 /* fake event to set up pins */
c6e4c666
TI
3996 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
3997 STAC_HP_EVENT);
82bc955f
TI
3998 } else {
3999 stac92xx_auto_init_multi_out(codec);
4000 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI
4001 for (i = 0; i < cfg->hp_outs; i++)
4002 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI
4003 }
4004 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI
4005 hda_nid_t nid = cfg->input_pins[i];
4006 if (nid) {
12dde4c6 4007 unsigned int pinctl, conf;
4f1e6bc3
TI
4008 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
4009 /* for mic pins, force to initialize */
4010 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI
4011 pinctl |= AC_PINCTL_IN_EN;
4012 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI
4013 } else {
4014 pinctl = snd_hda_codec_read(codec, nid, 0,
4015 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4016 /* if PINCTL already set then skip */
12dde4c6
TI
4017 if (!(pinctl & AC_PINCTL_IN_EN)) {
4018 pinctl |= AC_PINCTL_IN_EN;
4019 stac92xx_auto_set_pinctl(codec, nid,
4020 pinctl);
4021 }
4022 }
4023 conf = snd_hda_codec_read(codec, nid, 0,
4024 AC_VERB_GET_CONFIG_DEFAULT, 0);
4025 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4026 enable_pin_detect(codec, nid,
4027 STAC_INSERT_EVENT);
4028 stac_issue_unsol_event(codec, nid,
4029 STAC_INSERT_EVENT);
4f1e6bc3 4030 }
c960a03b 4031 }
82bc955f 4032 }
a64135a2
MR
4033 for (i = 0; i < spec->num_dmics; i++)
4034 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4035 AC_PINCTL_IN_EN);
f73d3585
TI
4036 if (cfg->dig_out_pin)
4037 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
4038 AC_PINCTL_OUT_EN);
4039 if (cfg->dig_in_pin)
4040 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4041 AC_PINCTL_IN_EN);
a64135a2 4042 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI
4043 hda_nid_t nid = spec->pwr_nids[i];
4044 int pinctl, def_conf;
f73d3585 4045
eb632128
TI
4046 /* power on when no jack detection is available */
4047 if (!spec->hp_detect) {
4048 stac_toggle_power_map(codec, nid, 1);
4049 continue;
4050 }
4051
4052 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI
4053 continue; /* already has an unsol event */
4054
4055 pinctl = snd_hda_codec_read(codec, nid, 0,
4056 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR
4057 /* outputs are only ports capable of power management
4058 * any attempts on powering down a input port cause the
4059 * referenced VREF to act quirky.
4060 */
eb632128
TI
4061 if (pinctl & AC_PINCTL_IN_EN) {
4062 stac_toggle_power_map(codec, nid, 1);
a64135a2 4063 continue;
eb632128 4064 }
f73d3585
TI
4065 def_conf = snd_hda_codec_read(codec, nid, 0,
4066 AC_VERB_GET_CONFIG_DEFAULT, 0);
4067 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR
4068 /* skip any ports that don't have jacks since presence
4069 * detection is useless */
f73d3585
TI
4070 if (def_conf != AC_JACK_PORT_COMPLEX) {
4071 if (def_conf != AC_JACK_PORT_NONE)
4072 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4073 continue;
f73d3585 4074 }
12dde4c6
TI
4075 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
4076 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4077 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
4078 }
a64135a2 4079 }
b76c850f
MR
4080 if (spec->dac_list)
4081 stac92xx_power_down(codec);
c7d4b2fa
M
4082 return 0;
4083}
4084
74aeaabc
MR
4085static void stac92xx_free_jacks(struct hda_codec *codec)
4086{
e4973e1e 4087#ifdef CONFIG_SND_JACK
b94d3539 4088 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4089 struct sigmatel_spec *spec = codec->spec;
b94d3539 4090 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR
4091 struct sigmatel_jack *jacks = spec->jacks.list;
4092 int i;
4093 for (i = 0; i < spec->jacks.used; i++)
4094 snd_device_free(codec->bus->card, &jacks[i].jack);
4095 }
4096 snd_array_free(&spec->jacks);
e4973e1e 4097#endif
74aeaabc
MR
4098}
4099
603c4019
TI
4100static void stac92xx_free_kctls(struct hda_codec *codec)
4101{
4102 struct sigmatel_spec *spec = codec->spec;
4103
4104 if (spec->kctls.list) {
4105 struct snd_kcontrol_new *kctl = spec->kctls.list;
4106 int i;
4107 for (i = 0; i < spec->kctls.used; i++)
4108 kfree(kctl[i].name);
4109 }
4110 snd_array_free(&spec->kctls);
4111}
4112
2f2f4251
M
4113static void stac92xx_free(struct hda_codec *codec)
4114{
c7d4b2fa 4115 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
4116
4117 if (! spec)
4118 return;
4119
af9f341a 4120 kfree(spec->pin_configs);
74aeaabc
MR
4121 stac92xx_free_jacks(codec);
4122 snd_array_free(&spec->events);
11b44bbd 4123
c7d4b2fa 4124 kfree(spec);
1cd2224c 4125 snd_hda_detach_beep_device(codec);
2f2f4251
M
4126}
4127
4e55096e
M
4128static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4129 unsigned int flag)
4130{
8ce84198
TI
4131 unsigned int old_ctl, pin_ctl;
4132
4133 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4134 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4135
f9acba43
TI
4136 if (pin_ctl & AC_PINCTL_IN_EN) {
4137 /*
4138 * we need to check the current set-up direction of
4139 * shared input pins since they can be switched via
4140 * "xxx as Output" mixer switch
4141 */
4142 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4143 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI
4144 return;
4145 }
4146
8ce84198 4147 old_ctl = pin_ctl;
7b043899
SL
4148 /* if setting pin direction bits, clear the current
4149 direction bits first */
4150 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4151 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4152
8ce84198
TI
4153 pin_ctl |= flag;
4154 if (old_ctl != pin_ctl)
4155 snd_hda_codec_write_cache(codec, nid, 0,
4156 AC_VERB_SET_PIN_WIDGET_CONTROL,
4157 pin_ctl);
4e55096e
M
4158}
4159
4160static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4161 unsigned int flag)
4162{
4163 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4164 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI
4165 if (pin_ctl & flag)
4166 snd_hda_codec_write_cache(codec, nid, 0,
4167 AC_VERB_SET_PIN_WIDGET_CONTROL,
4168 pin_ctl & ~flag);
4e55096e
M
4169}
4170
e6e3ea25 4171static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI
4172{
4173 if (!nid)
4174 return 0;
4175 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI
4176 & (1 << 31))
4177 return 1;
314634bc
TI
4178 return 0;
4179}
4180
d7a89436
TI
4181/* return non-zero if the hp-pin of the given array index isn't
4182 * a jack-detection target
4183 */
4184static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4185{
4186 struct auto_pin_cfg *cfg = &spec->autocfg;
4187
4188 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4189 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4190 return 1;
c21ca4a8 4191 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI
4192 return 1;
4193 /* ignore if the pin is set as line-out */
4194 if (cfg->hp_pins[i] == spec->hp_switch)
4195 return 1;
4196 return 0;
4197}
4198
c6e4c666 4199static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M
4200{
4201 struct sigmatel_spec *spec = codec->spec;
4202 struct auto_pin_cfg *cfg = &spec->autocfg;
4203 int i, presence;
4204
eb06ed8f 4205 presence = 0;
4fe5195c
MR
4206 if (spec->gpio_mute)
4207 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4208 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4209
eb06ed8f 4210 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI
4211 if (presence)
4212 break;
d7a89436
TI
4213 if (no_hp_sensing(spec, i))
4214 continue;
e6e3ea25
TI
4215 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4216 if (presence) {
4217 unsigned int pinctl;
4218 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4219 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4220 if (pinctl & AC_PINCTL_IN_EN)
4221 presence = 0; /* mic- or line-input */
4222 }
eb06ed8f 4223 }
4e55096e
M
4224
4225 if (presence) {
d7a89436 4226 /* disable lineouts */
7c2ba97b 4227 if (spec->hp_switch)
d7a89436
TI
4228 stac92xx_reset_pinctl(codec, spec->hp_switch,
4229 AC_PINCTL_OUT_EN);
4e55096e
M
4230 for (i = 0; i < cfg->line_outs; i++)
4231 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4232 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4233 for (i = 0; i < cfg->speaker_outs; i++)
4234 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4235 AC_PINCTL_OUT_EN);
c0cea0d0 4236 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4237 stac_gpio_set(codec, spec->gpio_mask,
4238 spec->gpio_dir, spec->gpio_data &
4239 ~spec->eapd_mask);
4e55096e 4240 } else {
d7a89436 4241 /* enable lineouts */
7c2ba97b 4242 if (spec->hp_switch)
d7a89436
TI
4243 stac92xx_set_pinctl(codec, spec->hp_switch,
4244 AC_PINCTL_OUT_EN);
4e55096e
M
4245 for (i = 0; i < cfg->line_outs; i++)
4246 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4247 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4248 for (i = 0; i < cfg->speaker_outs; i++)
4249 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4250 AC_PINCTL_OUT_EN);
c0cea0d0 4251 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4252 stac_gpio_set(codec, spec->gpio_mask,
4253 spec->gpio_dir, spec->gpio_data |
4254 spec->eapd_mask);
4e55096e 4255 }
d7a89436
TI
4256 /* toggle hp outs */
4257 for (i = 0; i < cfg->hp_outs; i++) {
4258 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4259 if (no_hp_sensing(spec, i))
4260 continue;
4261 if (presence)
4262 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI
4263#if 0 /* FIXME */
4264/* Resetting the pinctl like below may lead to (a sort of) regressions
4265 * on some devices since they use the HP pin actually for line/speaker
4266 * outs although the default pin config shows a different pin (that is
4267 * wrong and useless).
4268 *
4269 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4270 * But, disabling the code below just works around it, and I'm too tired of
4271 * bug reports with such devices...
4272 */
d7a89436
TI
4273 else
4274 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4275#endif /* FIXME */
d7a89436 4276 }
4e55096e
M
4277}
4278
f73d3585
TI
4279static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4280 int enable)
a64135a2
MR
4281{
4282 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI
4283 unsigned int idx, val;
4284
4285 for (idx = 0; idx < spec->num_pwrs; idx++) {
4286 if (spec->pwr_nids[idx] == nid)
4287 break;
4288 }
4289 if (idx >= spec->num_pwrs)
4290 return;
d0513fc6
MR
4291
4292 /* several codecs have two power down bits */
4293 if (spec->pwr_mapping)
4294 idx = spec->pwr_mapping[idx];
4295 else
4296 idx = 1 << idx;
a64135a2 4297
f73d3585
TI
4298 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4299 if (enable)
a64135a2
MR
4300 val &= ~idx;
4301 else
4302 val |= idx;
4303
4304 /* power down unused output ports */
4305 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR
4306}
4307
f73d3585
TI
4308static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4309{
e6e3ea25 4310 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4311}
a64135a2 4312
74aeaabc
MR
4313static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4314{
4315 struct sigmatel_spec *spec = codec->spec;
4316 struct sigmatel_jack *jacks = spec->jacks.list;
4317
4318 if (jacks) {
4319 int i;
4320 for (i = 0; i < spec->jacks.used; i++) {
4321 if (jacks->nid == nid) {
4322 unsigned int pin_ctl =
4323 snd_hda_codec_read(codec, nid,
4324 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4325 0x00);
4326 int type = jacks->type;
4327 if (type == (SND_JACK_LINEOUT
4328 | SND_JACK_HEADPHONE))
4329 type = (pin_ctl & AC_PINCTL_HP_EN)
4330 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4331 snd_jack_report(jacks->jack,
e6e3ea25 4332 get_pin_presence(codec, nid)
74aeaabc
MR
4333 ? type : 0);
4334 }
4335 jacks++;
4336 }
4337 }
4338}
a64135a2 4339
c6e4c666
TI
4340static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4341 unsigned char type)
4342{
4343 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4344 if (!event)
4345 return;
4346 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4347}
4348
314634bc
TI
4349static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4350{
a64135a2 4351 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
4352 struct sigmatel_event *event;
4353 int tag, data;
a64135a2 4354
c6e4c666
TI
4355 tag = (res >> 26) & 0x7f;
4356 event = stac_get_event_from_tag(codec, tag);
4357 if (!event)
4358 return;
4359
4360 switch (event->type) {
314634bc 4361 case STAC_HP_EVENT:
c6e4c666 4362 stac92xx_hp_detect(codec);
a64135a2 4363 /* fallthru */
74aeaabc 4364 case STAC_INSERT_EVENT:
a64135a2 4365 case STAC_PWR_EVENT:
c6e4c666
TI
4366 if (spec->num_pwrs > 0)
4367 stac92xx_pin_sense(codec, event->nid);
4368 stac92xx_report_jack(codec, event->nid);
72474be6 4369 break;
c6e4c666
TI
4370 case STAC_VREF_EVENT:
4371 data = snd_hda_codec_read(codec, codec->afg, 0,
4372 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR
4373 /* toggle VREF state based on GPIOx status */
4374 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4375 !!(data & (1 << event->data)));
72474be6 4376 break;
314634bc
TI
4377 }
4378}
4379
2d34e1b3
TI
4380#ifdef CONFIG_PROC_FS
4381static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4382 struct hda_codec *codec, hda_nid_t nid)
4383{
4384 if (nid == codec->afg)
4385 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4386 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4387}
4388
4389static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4390 struct hda_codec *codec,
4391 unsigned int verb)
4392{
4393 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4394 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4395}
4396
4397/* stac92hd71bxx, stac92hd73xx */
4398static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4399 struct hda_codec *codec, hda_nid_t nid)
4400{
4401 stac92hd_proc_hook(buffer, codec, nid);
4402 if (nid == codec->afg)
4403 analog_loop_proc_hook(buffer, codec, 0xfa0);
4404}
4405
4406static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4407 struct hda_codec *codec, hda_nid_t nid)
4408{
4409 if (nid == codec->afg)
4410 analog_loop_proc_hook(buffer, codec, 0xfe0);
4411}
4412
4413static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4414 struct hda_codec *codec, hda_nid_t nid)
4415{
4416 if (nid == codec->afg)
4417 analog_loop_proc_hook(buffer, codec, 0xfeb);
4418}
4419#else
4420#define stac92hd_proc_hook NULL
4421#define stac92hd7x_proc_hook NULL
4422#define stac9205_proc_hook NULL
4423#define stac927x_proc_hook NULL
4424#endif
4425
cb53c626 4426#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M
4427static int stac92xx_resume(struct hda_codec *codec)
4428{
dc81bed1
TI
4429 struct sigmatel_spec *spec = codec->spec;
4430
11b44bbd 4431 stac92xx_set_config_regs(codec);
2c885878 4432 stac92xx_init(codec);
82beb8fd
TI
4433 snd_hda_codec_resume_amp(codec);
4434 snd_hda_codec_resume_cache(codec);
2c885878 4435 /* fake event to set up pins again to override cached values */
dc81bed1 4436 if (spec->hp_detect)
c6e4c666
TI
4437 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4438 STAC_HP_EVENT);
ff6fdc37
M
4439 return 0;
4440}
c6798d2b
MR
4441
4442static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4443{
4444 struct sigmatel_spec *spec = codec->spec;
4445 if (spec->eapd_mask)
4446 stac_gpio_set(codec, spec->gpio_mask,
4447 spec->gpio_dir, spec->gpio_data &
4448 ~spec->eapd_mask);
4449 return 0;
4450}
ff6fdc37
M
4451#endif
4452
2f2f4251
M
4453static struct hda_codec_ops stac92xx_patch_ops = {
4454 .build_controls = stac92xx_build_controls,
4455 .build_pcms = stac92xx_build_pcms,
4456 .init = stac92xx_init,
4457 .free = stac92xx_free,
4e55096e 4458 .unsol_event = stac92xx_unsol_event,
cb53c626 4459#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4460 .suspend = stac92xx_suspend,
ff6fdc37
M
4461 .resume = stac92xx_resume,
4462#endif
2f2f4251
M
4463};
4464
4465static int patch_stac9200(struct hda_codec *codec)
4466{
4467 struct sigmatel_spec *spec;
c7d4b2fa 4468 int err;
2f2f4251 4469
e560d8d8 4470 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
4471 if (spec == NULL)
4472 return -ENOMEM;
4473
4474 codec->spec = spec;
a4eed138 4475 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4476 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI
4477 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4478 stac9200_models,
4479 stac9200_cfg_tbl);
11b44bbd
RF
4480 if (spec->board_config < 0) {
4481 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4482 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4483 } else
4484 err = stac_save_pin_cfgs(codec,
4485 stac9200_brd_tbl[spec->board_config]);
4486 if (err < 0) {
4487 stac92xx_free(codec);
4488 return err;
403d1944 4489 }
2f2f4251
M
4490
4491 spec->multiout.max_channels = 2;
4492 spec->multiout.num_dacs = 1;
4493 spec->multiout.dac_nids = stac9200_dac_nids;
4494 spec->adc_nids = stac9200_adc_nids;
4495 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4496 spec->num_muxes = 1;
8b65727b 4497 spec->num_dmics = 0;
9e05b7a3 4498 spec->num_adcs = 1;
a64135a2 4499 spec->num_pwrs = 0;
c7d4b2fa 4500
58eec423
MCC
4501 if (spec->board_config == STAC_9200_M4 ||
4502 spec->board_config == STAC_9200_M4_2 ||
bf277785 4503 spec->board_config == STAC_9200_OQO)
1194b5b7
TI
4504 spec->init = stac9200_eapd_init;
4505 else
4506 spec->init = stac9200_core_init;
2f2f4251 4507 spec->mixer = stac9200_mixer;
c7d4b2fa 4508
117f257d
TI
4509 if (spec->board_config == STAC_9200_PANASONIC) {
4510 spec->gpio_mask = spec->gpio_dir = 0x09;
4511 spec->gpio_data = 0x00;
4512 }
4513
c7d4b2fa
M
4514 err = stac9200_parse_auto_config(codec);
4515 if (err < 0) {
4516 stac92xx_free(codec);
4517 return err;
4518 }
2f2f4251 4519
2acc9dcb
TI
4520 /* CF-74 has no headphone detection, and the driver should *NOT*
4521 * do detection and HP/speaker toggle because the hardware does it.
4522 */
4523 if (spec->board_config == STAC_9200_PANASONIC)
4524 spec->hp_detect = 0;
4525
2f2f4251
M
4526 codec->patch_ops = stac92xx_patch_ops;
4527
4528 return 0;
4529}
4530
8e21c34c
TD
4531static int patch_stac925x(struct hda_codec *codec)
4532{
4533 struct sigmatel_spec *spec;
4534 int err;
4535
4536 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4537 if (spec == NULL)
4538 return -ENOMEM;
4539
4540 codec->spec = spec;
a4eed138 4541 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4542 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC
4543
4544 /* Check first for codec ID */
4545 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4546 STAC_925x_MODELS,
4547 stac925x_models,
4548 stac925x_codec_id_cfg_tbl);
4549
4550 /* Now checks for PCI ID, if codec ID is not found */
4551 if (spec->board_config < 0)
4552 spec->board_config = snd_hda_check_board_config(codec,
4553 STAC_925x_MODELS,
8e21c34c
TD
4554 stac925x_models,
4555 stac925x_cfg_tbl);
9e507abd 4556 again:
8e21c34c 4557 if (spec->board_config < 0) {
9cb36c2a 4558 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4559 "using BIOS defaults\n");
8e21c34c 4560 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4561 } else
4562 err = stac_save_pin_cfgs(codec,
4563 stac925x_brd_tbl[spec->board_config]);
4564 if (err < 0) {
4565 stac92xx_free(codec);
4566 return err;
8e21c34c
TD
4567 }
4568
4569 spec->multiout.max_channels = 2;
4570 spec->multiout.num_dacs = 1;
4571 spec->multiout.dac_nids = stac925x_dac_nids;
4572 spec->adc_nids = stac925x_adc_nids;
4573 spec->mux_nids = stac925x_mux_nids;
4574 spec->num_muxes = 1;
9e05b7a3 4575 spec->num_adcs = 1;
a64135a2 4576 spec->num_pwrs = 0;
2c11f955
TD
4577 switch (codec->vendor_id) {
4578 case 0x83847632: /* STAC9202 */
4579 case 0x83847633: /* STAC9202D */
4580 case 0x83847636: /* STAC9251 */
4581 case 0x83847637: /* STAC9251D */
f6e9852a 4582 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4583 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI
4584 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4585 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD
4586 break;
4587 default:
4588 spec->num_dmics = 0;
4589 break;
4590 }
8e21c34c
TD
4591
4592 spec->init = stac925x_core_init;
4593 spec->mixer = stac925x_mixer;
4594
4595 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI
4596 if (!err) {
4597 if (spec->board_config < 0) {
4598 printk(KERN_WARNING "hda_codec: No auto-config is "
4599 "available, default to model=ref\n");
4600 spec->board_config = STAC_925x_REF;
4601 goto again;
4602 }
4603 err = -EINVAL;
4604 }
8e21c34c
TD
4605 if (err < 0) {
4606 stac92xx_free(codec);
4607 return err;
4608 }
4609
4610 codec->patch_ops = stac92xx_patch_ops;
4611
4612 return 0;
4613}
4614
e1f0d669
MR
4615static struct hda_input_mux stac92hd73xx_dmux = {
4616 .num_items = 4,
4617 .items = {
4618 { "Analog Inputs", 0x0b },
e1f0d669
MR
4619 { "Digital Mic 1", 0x09 },
4620 { "Digital Mic 2", 0x0a },
2a9c7816 4621 { "CD", 0x08 },
e1f0d669
MR
4622 }
4623};
4624
4625static int patch_stac92hd73xx(struct hda_codec *codec)
4626{
4627 struct sigmatel_spec *spec;
4628 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4629 int err = 0;
c21ca4a8 4630 int num_dacs;
e1f0d669
MR
4631
4632 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4633 if (spec == NULL)
4634 return -ENOMEM;
4635
4636 codec->spec = spec;
e99d32b3 4637 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR
4638 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4639 spec->pin_nids = stac92hd73xx_pin_nids;
4640 spec->board_config = snd_hda_check_board_config(codec,
4641 STAC_92HD73XX_MODELS,
4642 stac92hd73xx_models,
4643 stac92hd73xx_cfg_tbl);
4644again:
4645 if (spec->board_config < 0) {
4646 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4647 " STAC92HD73XX, using BIOS defaults\n");
4648 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4649 } else
4650 err = stac_save_pin_cfgs(codec,
4651 stac92hd73xx_brd_tbl[spec->board_config]);
4652 if (err < 0) {
4653 stac92xx_free(codec);
4654 return err;
e1f0d669
MR
4655 }
4656
c21ca4a8 4657 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR
4658 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4659
c21ca4a8 4660 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR
4661 printk(KERN_WARNING "hda_codec: Could not determine "
4662 "number of channels defaulting to DAC count\n");
c21ca4a8 4663 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4664 }
c21ca4a8 4665 switch (num_dacs) {
e1f0d669
MR
4666 case 0x3: /* 6 Channel */
4667 spec->mixer = stac92hd73xx_6ch_mixer;
4668 spec->init = stac92hd73xx_6ch_core_init;
4669 break;
4670 case 0x4: /* 8 Channel */
e1f0d669
MR
4671 spec->mixer = stac92hd73xx_8ch_mixer;
4672 spec->init = stac92hd73xx_8ch_core_init;
4673 break;
4674 case 0x5: /* 10 Channel */
e1f0d669
MR
4675 spec->mixer = stac92hd73xx_10ch_mixer;
4676 spec->init = stac92hd73xx_10ch_core_init;
c21ca4a8
TI
4677 }
4678 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4679
e1f0d669
MR
4680 spec->aloopback_mask = 0x01;
4681 spec->aloopback_shift = 8;
4682
1cd2224c 4683 spec->digbeep_nid = 0x1c;
e1f0d669
MR
4684 spec->mux_nids = stac92hd73xx_mux_nids;
4685 spec->adc_nids = stac92hd73xx_adc_nids;
4686 spec->dmic_nids = stac92hd73xx_dmic_nids;
4687 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4688 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4689 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4690 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR
4691
4692 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4693 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4694 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR
4695 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4696 sizeof(stac92hd73xx_dmux));
4697
a7662640 4698 switch (spec->board_config) {
6b3ab21e 4699 case STAC_DELL_EQ:
d654a660 4700 spec->init = dell_eq_core_init;
6b3ab21e 4701 /* fallthru */
661cd8fb
TI
4702 case STAC_DELL_M6_AMIC:
4703 case STAC_DELL_M6_DMIC:
4704 case STAC_DELL_M6_BOTH:
2a9c7816 4705 spec->num_smuxes = 0;
2a9c7816
MR
4706 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4707 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4708 spec->eapd_switch = 0;
2a9c7816 4709 spec->num_amps = 1;
6b3ab21e 4710
c21ca4a8 4711 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4712 spec->init = dell_m6_core_init;
661cd8fb
TI
4713 switch (spec->board_config) {
4714 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR
4715 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4716 spec->num_dmics = 0;
2a9c7816 4717 spec->private_dimux.num_items = 1;
a7662640 4718 break;
661cd8fb 4719 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR
4720 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4721 spec->num_dmics = 1;
2a9c7816 4722 spec->private_dimux.num_items = 2;
a7662640 4723 break;
661cd8fb 4724 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR
4725 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4726 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4727 spec->num_dmics = 1;
2a9c7816 4728 spec->private_dimux.num_items = 2;
a7662640
MR
4729 break;
4730 }
4731 break;
4732 default:
4733 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4734 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4735 spec->eapd_switch = 1;
a7662640 4736 }
b2c4f4d7
MR
4737 if (spec->board_config > STAC_92HD73XX_REF) {
4738 /* GPIO0 High = Enable EAPD */
4739 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4740 spec->gpio_data = 0x01;
4741 }
2a9c7816 4742 spec->dinput_mux = &spec->private_dimux;
a7662640 4743
a64135a2
MR
4744 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4745 spec->pwr_nids = stac92hd73xx_pwr_nids;
4746
d9737751 4747 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR
4748
4749 if (!err) {
4750 if (spec->board_config < 0) {
4751 printk(KERN_WARNING "hda_codec: No auto-config is "
4752 "available, default to model=ref\n");
4753 spec->board_config = STAC_92HD73XX_REF;
4754 goto again;
4755 }
4756 err = -EINVAL;
4757 }
4758
4759 if (err < 0) {
4760 stac92xx_free(codec);
4761 return err;
4762 }
4763
9e43f0de
TI
4764 if (spec->board_config == STAC_92HD73XX_NO_JD)
4765 spec->hp_detect = 0;
4766
e1f0d669
MR
4767 codec->patch_ops = stac92xx_patch_ops;
4768
2d34e1b3
TI
4769 codec->proc_widget_hook = stac92hd7x_proc_hook;
4770
e1f0d669
MR
4771 return 0;
4772}
4773
d0513fc6
MR
4774static struct hda_input_mux stac92hd83xxx_dmux = {
4775 .num_items = 3,
4776 .items = {
4777 { "Analog Inputs", 0x03 },
4778 { "Digital Mic 1", 0x04 },
4779 { "Digital Mic 2", 0x05 },
4780 }
4781};
4782
4783static int patch_stac92hd83xxx(struct hda_codec *codec)
4784{
4785 struct sigmatel_spec *spec;
65557f35 4786 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 4787 int err;
65557f35 4788 int num_dacs;
d0513fc6
MR
4789
4790 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4791 if (spec == NULL)
4792 return -ENOMEM;
4793
4794 codec->spec = spec;
0ffa9807 4795 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR
4796 spec->mono_nid = 0x19;
4797 spec->digbeep_nid = 0x21;
4798 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4799 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4800 spec->adc_nids = stac92hd83xxx_adc_nids;
4801 spec->pwr_nids = stac92hd83xxx_pwr_nids;
c15c5060 4802 spec->amp_nids = stac92hd83xxx_amp_nids;
d0513fc6
MR
4803 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4804 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4805 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 4806
65557f35
MR
4807
4808 /* set port 0xe to select the last DAC
4809 */
4810 num_dacs = snd_hda_get_connections(codec, 0x0e,
4811 conn, STAC92HD83_DAC_COUNT + 1) - 1;
4812
4813 snd_hda_codec_write_cache(codec, 0xe, 0,
4814 AC_VERB_SET_CONNECT_SEL, num_dacs);
4815
d0513fc6
MR
4816 spec->init = stac92hd83xxx_core_init;
4817 switch (codec->vendor_id) {
4818 case 0x111d7605:
d0513fc6
MR
4819 break;
4820 default:
4821 spec->num_pwrs--;
d0513fc6
MR
4822 }
4823
4824 spec->mixer = stac92hd83xxx_mixer;
4825 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4826 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4827 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
c15c5060 4828 spec->num_amps = ARRAY_SIZE(stac92hd83xxx_amp_nids);
d0513fc6
MR
4829 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4830 spec->dinput_mux = &stac92hd83xxx_dmux;
4831 spec->pin_nids = stac92hd83xxx_pin_nids;
4832 spec->board_config = snd_hda_check_board_config(codec,
4833 STAC_92HD83XXX_MODELS,
4834 stac92hd83xxx_models,
4835 stac92hd83xxx_cfg_tbl);
4836again:
4837 if (spec->board_config < 0) {
4838 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4839 " STAC92HD83XXX, using BIOS defaults\n");
4840 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4841 } else
4842 err = stac_save_pin_cfgs(codec,
4843 stac92hd83xxx_brd_tbl[spec->board_config]);
4844 if (err < 0) {
4845 stac92xx_free(codec);
4846 return err;
d0513fc6
MR
4847 }
4848
4849 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4850 if (!err) {
4851 if (spec->board_config < 0) {
4852 printk(KERN_WARNING "hda_codec: No auto-config is "
4853 "available, default to model=ref\n");
4854 spec->board_config = STAC_92HD83XXX_REF;
4855 goto again;
4856 }
4857 err = -EINVAL;
4858 }
4859
4860 if (err < 0) {
4861 stac92xx_free(codec);
4862 return err;
4863 }
4864
4865 codec->patch_ops = stac92xx_patch_ops;
4866
2d34e1b3
TI
4867 codec->proc_widget_hook = stac92hd_proc_hook;
4868
d0513fc6
MR
4869 return 0;
4870}
4871
4b33c767
MR
4872static struct hda_input_mux stac92hd71bxx_dmux = {
4873 .num_items = 4,
4874 .items = {
4875 { "Analog Inputs", 0x00 },
4876 { "Mixer", 0x01 },
4877 { "Digital Mic 1", 0x02 },
4878 { "Digital Mic 2", 0x03 },
4879 }
4880};
4881
e035b841
MR
4882static int patch_stac92hd71bxx(struct hda_codec *codec)
4883{
4884 struct sigmatel_spec *spec;
4885 int err = 0;
4886
4887 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4888 if (spec == NULL)
4889 return -ENOMEM;
4890
4891 codec->spec = spec;
8daaaa97 4892 codec->patch_ops = stac92xx_patch_ops;
e035b841 4893 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4894 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4895 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR
4896 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4897 sizeof(stac92hd71bxx_dmux));
e035b841
MR
4898 spec->board_config = snd_hda_check_board_config(codec,
4899 STAC_92HD71BXX_MODELS,
4900 stac92hd71bxx_models,
4901 stac92hd71bxx_cfg_tbl);
4902again:
4903 if (spec->board_config < 0) {
4904 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4905 " STAC92HD71BXX, using BIOS defaults\n");
4906 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4907 } else
4908 err = stac_save_pin_cfgs(codec,
4909 stac92hd71bxx_brd_tbl[spec->board_config]);
4910 if (err < 0) {
4911 stac92xx_free(codec);
4912 return err;
e035b841
MR
4913 }
4914
41c3b648
TI
4915 if (spec->board_config > STAC_92HD71BXX_REF) {
4916 /* GPIO0 = EAPD */
4917 spec->gpio_mask = 0x01;
4918 spec->gpio_dir = 0x01;
4919 spec->gpio_data = 0x01;
4920 }
4921
541eee87
MR
4922 switch (codec->vendor_id) {
4923 case 0x111d76b6: /* 4 Port without Analog Mixer */
4924 case 0x111d76b7:
4925 case 0x111d76b4: /* 6 Port without Analog Mixer */
4926 case 0x111d76b5:
4927 spec->mixer = stac92hd71bxx_mixer;
4928 spec->init = stac92hd71bxx_core_init;
0ffa9807 4929 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4930 break;
aafc4412 4931 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI
4932 switch (spec->board_config) {
4933 case STAC_HP_M4:
72474be6 4934 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI
4935 err = stac_add_event(spec, codec->afg,
4936 STAC_VREF_EVENT, 0x02);
4937 if (err < 0)
4938 return err;
c5d08bb5 4939 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR
4940 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4941 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4942 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4943 AC_USRSP_EN | err);
72474be6
MR
4944 spec->gpio_mask |= 0x02;
4945 break;
4946 }
8daaaa97 4947 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4948 (codec->revision_id & 0xf) == 1)
8daaaa97 4949 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4950
aafc4412
MR
4951 /* no output amps */
4952 spec->num_pwrs = 0;
4953 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4954 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR
4955
4956 /* disable VSW */
4957 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4958 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR
4959 break;
4960 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4961 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4962 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4963
aafc4412
MR
4964 /* no output amps */
4965 spec->num_pwrs = 0;
4966 /* fallthru */
541eee87 4967 default:
4b33c767 4968 spec->dinput_mux = &spec->private_dimux;
541eee87
MR
4969 spec->mixer = stac92hd71bxx_analog_mixer;
4970 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4971 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR
4972 }
4973
4b33c767 4974 spec->aloopback_mask = 0x50;
541eee87
MR
4975 spec->aloopback_shift = 0;
4976
8daaaa97 4977 spec->powerdown_adcs = 1;
1cd2224c 4978 spec->digbeep_nid = 0x26;
e035b841
MR
4979 spec->mux_nids = stac92hd71bxx_mux_nids;
4980 spec->adc_nids = stac92hd71bxx_adc_nids;
4981 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4982 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4983 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4984 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR
4985
4986 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4987 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4988
6a14f585
MR
4989 switch (spec->board_config) {
4990 case STAC_HP_M4:
6a14f585 4991 /* enable internal microphone */
af9f341a 4992 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR
4993 stac92xx_auto_set_pinctl(codec, 0x0e,
4994 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR
4995 /* fallthru */
4996 case STAC_DELL_M4_2:
4997 spec->num_dmics = 0;
4998 spec->num_smuxes = 0;
4999 spec->num_dmuxes = 0;
5000 break;
5001 case STAC_DELL_M4_1:
5002 case STAC_DELL_M4_3:
5003 spec->num_dmics = 1;
5004 spec->num_smuxes = 0;
5005 spec->num_dmuxes = 0;
6a14f585
MR
5006 break;
5007 default:
5008 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
5009 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
5010 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
5011 };
5012
c21ca4a8 5013 spec->multiout.dac_nids = spec->dac_nids;
4b33c767
MR
5014 if (spec->dinput_mux)
5015 spec->private_dimux.num_items +=
5016 spec->num_dmics -
5017 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR
5018
5019 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
5020 if (!err) {
5021 if (spec->board_config < 0) {
5022 printk(KERN_WARNING "hda_codec: No auto-config is "
5023 "available, default to model=ref\n");
5024 spec->board_config = STAC_92HD71BXX_REF;
5025 goto again;
5026 }
5027 err = -EINVAL;
5028 }
5029
5030 if (err < 0) {
5031 stac92xx_free(codec);
5032 return err;
5033 }
5034
2d34e1b3
TI
5035 codec->proc_widget_hook = stac92hd7x_proc_hook;
5036
e035b841
MR
5037 return 0;
5038};
5039
2f2f4251
M
5040static int patch_stac922x(struct hda_codec *codec)
5041{
5042 struct sigmatel_spec *spec;
c7d4b2fa 5043 int err;
2f2f4251 5044
e560d8d8 5045 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
5046 if (spec == NULL)
5047 return -ENOMEM;
5048
5049 codec->spec = spec;
a4eed138 5050 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5051 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI
5052 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5053 stac922x_models,
5054 stac922x_cfg_tbl);
536319af 5055 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR
5056 spec->gpio_mask = spec->gpio_dir = 0x03;
5057 spec->gpio_data = 0x03;
3fc24d85
TI
5058 /* Intel Macs have all same PCI SSID, so we need to check
5059 * codec SSID to distinguish the exact models
5060 */
6f0778d8 5061 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5062 switch (codec->subsystem_id) {
5d5d3bc3
IZ
5063
5064 case 0x106b0800:
5065 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5066 break;
5d5d3bc3
IZ
5067 case 0x106b0600:
5068 case 0x106b0700:
5069 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5070 break;
5d5d3bc3
IZ
5071 case 0x106b0e00:
5072 case 0x106b0f00:
5073 case 0x106b1600:
5074 case 0x106b1700:
5075 case 0x106b0200:
5076 case 0x106b1e00:
5077 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5078 break;
5d5d3bc3
IZ
5079 case 0x106b1a00:
5080 case 0x00000100:
5081 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5082 break;
5d5d3bc3
IZ
5083 case 0x106b0a00:
5084 case 0x106b2200:
5085 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5086 break;
536319af
NB
5087 default:
5088 spec->board_config = STAC_INTEL_MAC_V3;
5089 break;
3fc24d85
TI
5090 }
5091 }
5092
9e507abd 5093 again:
11b44bbd
RF
5094 if (spec->board_config < 0) {
5095 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5096 "using BIOS defaults\n");
5097 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5098 } else
5099 err = stac_save_pin_cfgs(codec,
5100 stac922x_brd_tbl[spec->board_config]);
5101 if (err < 0) {
5102 stac92xx_free(codec);
5103 return err;
403d1944 5104 }
2f2f4251 5105
c7d4b2fa
M
5106 spec->adc_nids = stac922x_adc_nids;
5107 spec->mux_nids = stac922x_mux_nids;
2549413e 5108 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5109 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5110 spec->num_dmics = 0;
a64135a2 5111 spec->num_pwrs = 0;
c7d4b2fa
M
5112
5113 spec->init = stac922x_core_init;
2f2f4251 5114 spec->mixer = stac922x_mixer;
c7d4b2fa
M
5115
5116 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5117
3cc08dc6 5118 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI
5119 if (!err) {
5120 if (spec->board_config < 0) {
5121 printk(KERN_WARNING "hda_codec: No auto-config is "
5122 "available, default to model=ref\n");
5123 spec->board_config = STAC_D945_REF;
5124 goto again;
5125 }
5126 err = -EINVAL;
5127 }
3cc08dc6
MP
5128 if (err < 0) {
5129 stac92xx_free(codec);
5130 return err;
5131 }
5132
5133 codec->patch_ops = stac92xx_patch_ops;
5134
807a4636
TI
5135 /* Fix Mux capture level; max to 2 */
5136 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5137 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5138 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5139 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5140 (0 << AC_AMPCAP_MUTE_SHIFT));
5141
3cc08dc6
MP
5142 return 0;
5143}
5144
5145static int patch_stac927x(struct hda_codec *codec)
5146{
5147 struct sigmatel_spec *spec;
5148 int err;
5149
5150 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5151 if (spec == NULL)
5152 return -ENOMEM;
5153
5154 codec->spec = spec;
a4eed138 5155 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5156 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI
5157 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5158 stac927x_models,
5159 stac927x_cfg_tbl);
9e507abd 5160 again:
8e9068b1
MR
5161 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5162 if (spec->board_config < 0)
5163 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5164 "STAC927x, using BIOS defaults\n");
11b44bbd 5165 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5166 } else
5167 err = stac_save_pin_cfgs(codec,
5168 stac927x_brd_tbl[spec->board_config]);
5169 if (err < 0) {
5170 stac92xx_free(codec);
5171 return err;
3cc08dc6
MP
5172 }
5173
1cd2224c 5174 spec->digbeep_nid = 0x23;
8e9068b1
MR
5175 spec->adc_nids = stac927x_adc_nids;
5176 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5177 spec->mux_nids = stac927x_mux_nids;
5178 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR
5179 spec->smux_nids = stac927x_smux_nids;
5180 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5181 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5182 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR
5183 spec->multiout.dac_nids = spec->dac_nids;
5184
81d3dbde 5185 switch (spec->board_config) {
93ed1503 5186 case STAC_D965_3ST:
93ed1503 5187 case STAC_D965_5ST:
8e9068b1 5188 /* GPIO0 High = Enable EAPD */
0fc9dec4 5189 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5190 spec->gpio_data = 0x01;
8e9068b1
MR
5191 spec->num_dmics = 0;
5192
93ed1503 5193 spec->init = d965_core_init;
9e05b7a3 5194 spec->mixer = stac927x_mixer;
81d3dbde 5195 break;
8e9068b1 5196 case STAC_DELL_BIOS:
780c8be4
MR
5197 switch (codec->subsystem_id) {
5198 case 0x10280209:
5199 case 0x1028022e:
5200 /* correct the device field to SPDIF out */
af9f341a 5201 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR
5202 break;
5203 };
03d7ca17 5204 /* configure the analog microphone on some laptops */
af9f341a 5205 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5206 /* correct the front output jack as a hp out */
af9f341a 5207 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5208 /* correct the front input jack as a mic */
af9f341a 5209 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5210 /* fallthru */
8e9068b1
MR
5211 case STAC_DELL_3ST:
5212 /* GPIO2 High = Enable EAPD */
0fc9dec4 5213 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5214 spec->gpio_data = 0x04;
7f16859a
MR
5215 spec->dmic_nids = stac927x_dmic_nids;
5216 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5217
8e9068b1
MR
5218 spec->init = d965_core_init;
5219 spec->mixer = stac927x_mixer;
5220 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5221 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR
5222 break;
5223 default:
b2c4f4d7
MR
5224 if (spec->board_config > STAC_D965_REF) {
5225 /* GPIO0 High = Enable EAPD */
5226 spec->eapd_mask = spec->gpio_mask = 0x01;
5227 spec->gpio_dir = spec->gpio_data = 0x01;
5228 }
8e9068b1
MR
5229 spec->num_dmics = 0;
5230
5231 spec->init = stac927x_core_init;
5232 spec->mixer = stac927x_mixer;
7f16859a
MR
5233 }
5234
a64135a2 5235 spec->num_pwrs = 0;
e1f0d669
MR
5236 spec->aloopback_mask = 0x40;
5237 spec->aloopback_shift = 0;
c0cea0d0 5238 spec->eapd_switch = 1;
8e9068b1 5239
3cc08dc6 5240 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI
5241 if (!err) {
5242 if (spec->board_config < 0) {
5243 printk(KERN_WARNING "hda_codec: No auto-config is "
5244 "available, default to model=ref\n");
5245 spec->board_config = STAC_D965_REF;
5246 goto again;
5247 }
5248 err = -EINVAL;
5249 }
c7d4b2fa
M
5250 if (err < 0) {
5251 stac92xx_free(codec);
5252 return err;
5253 }
2f2f4251
M
5254
5255 codec->patch_ops = stac92xx_patch_ops;
5256
2d34e1b3
TI
5257 codec->proc_widget_hook = stac927x_proc_hook;
5258
52987656
TI
5259 /*
5260 * !!FIXME!!
5261 * The STAC927x seem to require fairly long delays for certain
5262 * command sequences. With too short delays (even if the answer
5263 * is set to RIRB properly), it results in the silence output
5264 * on some hardwares like Dell.
5265 *
5266 * The below flag enables the longer delay (see get_response
5267 * in hda_intel.c).
5268 */
5269 codec->bus->needs_damn_long_delay = 1;
5270
e28d8322
TI
5271 /* no jack detecion for ref-no-jd model */
5272 if (spec->board_config == STAC_D965_REF_NO_JD)
5273 spec->hp_detect = 0;
5274
2f2f4251
M
5275 return 0;
5276}
5277
f3302a59
MP
5278static int patch_stac9205(struct hda_codec *codec)
5279{
5280 struct sigmatel_spec *spec;
8259980e 5281 int err;
f3302a59
MP
5282
5283 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5284 if (spec == NULL)
5285 return -ENOMEM;
5286
5287 codec->spec = spec;
a4eed138 5288 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5289 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI
5290 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5291 stac9205_models,
5292 stac9205_cfg_tbl);
9e507abd 5293 again:
11b44bbd
RF
5294 if (spec->board_config < 0) {
5295 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5296 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5297 } else
5298 err = stac_save_pin_cfgs(codec,
5299 stac9205_brd_tbl[spec->board_config]);
5300 if (err < 0) {
5301 stac92xx_free(codec);
5302 return err;
f3302a59
MP
5303 }
5304
1cd2224c 5305 spec->digbeep_nid = 0x23;
f3302a59 5306 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5307 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5308 spec->mux_nids = stac9205_mux_nids;
2549413e 5309 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR
5310 spec->smux_nids = stac9205_smux_nids;
5311 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5312 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5313 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5314 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5315 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5316 spec->num_pwrs = 0;
f3302a59
MP
5317
5318 spec->init = stac9205_core_init;
5319 spec->mixer = stac9205_mixer;
5320
e1f0d669
MR
5321 spec->aloopback_mask = 0x40;
5322 spec->aloopback_shift = 0;
c0cea0d0 5323 spec->eapd_switch = 1;
f3302a59 5324 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5325
ae0a8ed8 5326 switch (spec->board_config){
ae0a8ed8 5327 case STAC_9205_DELL_M43:
87d48363 5328 /* Enable SPDIF in/out */
af9f341a
TI
5329 stac_change_pin_config(codec, 0x1f, 0x01441030);
5330 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5331
4fe5195c 5332 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI
5333 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5334 if (err < 0)
5335 return err;
c5d08bb5 5336 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR
5337 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5338 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI
5339 AC_VERB_SET_UNSOLICITED_ENABLE,
5340 AC_USRSP_EN | err);
4fe5195c
MR
5341
5342 spec->gpio_dir = 0x0b;
0fc9dec4 5343 spec->eapd_mask = 0x01;
4fe5195c
MR
5344 spec->gpio_mask = 0x1b;
5345 spec->gpio_mute = 0x10;
e2e7d624 5346 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5347 * GPIO3 Low = DRM
87d48363 5348 */
4fe5195c 5349 spec->gpio_data = 0x01;
ae0a8ed8 5350 break;
b2c4f4d7
MR
5351 case STAC_9205_REF:
5352 /* SPDIF-In enabled */
5353 break;
ae0a8ed8
TD
5354 default:
5355 /* GPIO0 High = EAPD */
0fc9dec4 5356 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5357 spec->gpio_data = 0x01;
ae0a8ed8
TD
5358 break;
5359 }
33382403 5360
f3302a59 5361 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI
5362 if (!err) {
5363 if (spec->board_config < 0) {
5364 printk(KERN_WARNING "hda_codec: No auto-config is "
5365 "available, default to model=ref\n");
5366 spec->board_config = STAC_9205_REF;
5367 goto again;
5368 }
5369 err = -EINVAL;
5370 }
f3302a59
MP
5371 if (err < 0) {
5372 stac92xx_free(codec);
5373 return err;
5374 }
5375
5376 codec->patch_ops = stac92xx_patch_ops;
5377
2d34e1b3
TI
5378 codec->proc_widget_hook = stac9205_proc_hook;
5379
f3302a59
MP
5380 return 0;
5381}
5382
db064e50 5383/*
6d859065 5384 * STAC9872 hack
db064e50
TI
5385 */
5386
1e137f92 5387static struct hda_verb stac9872_core_init[] = {
1624cb9a 5388 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM
5389 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5390 {}
5391};
5392
caa10b6e
TI
5393static struct snd_kcontrol_new stac9872_mixer[] = {
5394 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5395 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5396 STAC_INPUT_SOURCE(1),
5397 { } /* end */
5398};
5399
5400static hda_nid_t stac9872_pin_nids[] = {
5401 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
5402 0x11, 0x13, 0x14,
5403};
5404
5405static hda_nid_t stac9872_adc_nids[] = {
5406 0x8 /*,0x6*/
5407};
5408
5409static hda_nid_t stac9872_mux_nids[] = {
5410 0x15
5411};
5412
6d859065 5413static int patch_stac9872(struct hda_codec *codec)
db064e50
TI
5414{
5415 struct sigmatel_spec *spec;
1e137f92 5416 int err;
db064e50 5417
db064e50
TI
5418 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5419 if (spec == NULL)
5420 return -ENOMEM;
db064e50 5421 codec->spec = spec;
caa10b6e 5422
1e137f92 5423#if 0 /* no model right now */
caa10b6e
TI
5424 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5425 stac9872_models,
5426 stac9872_cfg_tbl);
1e137f92 5427#endif
db064e50 5428
1e137f92
TI
5429 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
5430 spec->pin_nids = stac9872_pin_nids;
5431 spec->multiout.dac_nids = spec->dac_nids;
5432 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
5433 spec->adc_nids = stac9872_adc_nids;
5434 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
5435 spec->mux_nids = stac9872_mux_nids;
5436 spec->mixer = stac9872_mixer;
5437 spec->init = stac9872_core_init;
5438
5439 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
5440 if (err < 0) {
5441 stac92xx_free(codec);
5442 return -EINVAL;
5443 }
5444 spec->input_mux = &spec->private_imux;
5445 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI
5446 return 0;
5447}
5448
5449
2f2f4251
M
5450/*
5451 * patch entries
5452 */
1289e9e8 5453static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M
5454 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5455 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5456 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5457 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5458 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5459 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5460 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP
5461 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5462 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5463 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5464 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5465 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5466 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP
5467 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5468 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5469 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5470 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5471 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5472 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5473 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5474 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5475 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5476 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD
5477 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5478 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5479 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5480 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5481 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5482 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI
5483 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5484 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM
5485 /* The following does not take into account .id=0x83847661 when subsys =
5486 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5487 * currently not fully supported.
5488 */
5489 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5490 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5491 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP
5492 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5493 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5494 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5495 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5496 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5497 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5498 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5499 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5500 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR
5501 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5502 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5503 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR
5504 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5505 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5506 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR
5507 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5508 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5509 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5510 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5511 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5512 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5513 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5514 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M
5515 {} /* terminator */
5516};
1289e9e8
TI
5517
5518MODULE_ALIAS("snd-hda-codec-id:8384*");
5519MODULE_ALIAS("snd-hda-codec-id:111d*");
5520
5521MODULE_LICENSE("GPL");
5522MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5523
5524static struct hda_codec_preset_list sigmatel_list = {
5525 .preset = snd_hda_preset_sigmatel,
5526 .owner = THIS_MODULE,
5527};
5528
5529static int __init patch_sigmatel_init(void)
5530{
5531 return snd_hda_add_codec_preset(&sigmatel_list);
5532}
5533
5534static void __exit patch_sigmatel_exit(void)
5535{
5536 snd_hda_delete_codec_preset(&sigmatel_list);
5537}
5538
5539module_init(patch_sigmatel_init)
5540module_exit(patch_sigmatel_exit)