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2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
TI		 38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
58eec423
MCC		 58 STAC_9200_M4,
59 STAC_9200_M4_2,
117f257d 60 STAC_9200_PANASONIC,
f5fcc13c
TI		 61 STAC_9200_MODELS
62};
63
64enum {
65 STAC_9205_REF,
dfe495d0 66 STAC_9205_DELL_M42,
ae0a8ed8
TD		 67 STAC_9205_DELL_M43,
68 STAC_9205_DELL_M44,
d9a4268e 69 STAC_9205_EAPD,
f5fcc13c
TI		 70 STAC_9205_MODELS
71};
72
e1f0d669 73enum {
9e43f0de 74 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 75 STAC_92HD73XX_REF,
661cd8fb
TI		 76 STAC_DELL_M6_AMIC,
77 STAC_DELL_M6_DMIC,
78 STAC_DELL_M6_BOTH,
6b3ab21e 79 STAC_DELL_EQ,
e1f0d669
MR		 80 STAC_92HD73XX_MODELS
81};
82
d0513fc6
MR		 83enum {
84 STAC_92HD83XXX_REF,
32ed3f46 85 STAC_92HD83XXX_PWR_REF,
d0513fc6
MR		 86 STAC_92HD83XXX_MODELS
87};
88
e035b841
MR		 89enum {
90 STAC_92HD71BXX_REF,
a7662640
MR		 91 STAC_DELL_M4_1,
92 STAC_DELL_M4_2,
3a7abfd2 93 STAC_DELL_M4_3,
6a14f585 94 STAC_HP_M4,
1b0652eb 95 STAC_HP_DV5,
e035b841
MR		 96 STAC_92HD71BXX_MODELS
97};
98
8e21c34c
TD		 99enum {
100 STAC_925x_REF,
9cb36c2a
MCC		 101 STAC_M1,
102 STAC_M1_2,
103 STAC_M2,
8e21c34c 104 STAC_M2_2,
9cb36c2a
MCC		 105 STAC_M3,
106 STAC_M5,
107 STAC_M6,
8e21c34c
TD		 108 STAC_925x_MODELS
109};
110
f5fcc13c
TI		 111enum {
112 STAC_D945_REF,
113 STAC_D945GTP3,
114 STAC_D945GTP5,
5d5d3bc3
IZ		 115 STAC_INTEL_MAC_V1,
116 STAC_INTEL_MAC_V2,
117 STAC_INTEL_MAC_V3,
118 STAC_INTEL_MAC_V4,
119 STAC_INTEL_MAC_V5,
536319af
NB		 120 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
121 * is given, one of the above models will be
122 * chosen according to the subsystem id. */
dfe495d0 123 /* for backward compatibility */
f5fcc13c 124 STAC_MACMINI,
3fc24d85 125 STAC_MACBOOK,
6f0778d8
NB		 126 STAC_MACBOOK_PRO_V1,
127 STAC_MACBOOK_PRO_V2,
f16928fb 128 STAC_IMAC_INTEL,
0dae0f83 129 STAC_IMAC_INTEL_20,
8c650087 130 STAC_ECS_202,
dfe495d0
TI		 131 STAC_922X_DELL_D81,
132 STAC_922X_DELL_D82,
133 STAC_922X_DELL_M81,
134 STAC_922X_DELL_M82,
f5fcc13c
TI		 135 STAC_922X_MODELS
136};
137
138enum {
e28d8322 139 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 140 STAC_D965_REF,
141 STAC_D965_3ST,
142 STAC_D965_5ST,
4ff076e5 143 STAC_DELL_3ST,
8e9068b1 144 STAC_DELL_BIOS,
f5fcc13c
TI		 145 STAC_927X_MODELS
146};
403d1944 147
74aeaabc
MR		 148struct sigmatel_event {
149 hda_nid_t nid;
c6e4c666
TI		 150 unsigned char type;
151 unsigned char tag;
74aeaabc
MR		 152 int data;
153};
154
155struct sigmatel_jack {
156 hda_nid_t nid;
157 int type;
158 struct snd_jack *jack;
159};
160
2f2f4251 161struct sigmatel_spec {
c8b6bf9b 162 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 163 unsigned int num_mixers;
164
403d1944 165 int board_config;
c0cea0d0 166 unsigned int eapd_switch: 1;
c7d4b2fa 167 unsigned int surr_switch: 1;
3cc08dc6 168 unsigned int alt_switch: 1;
82bc955f 169 unsigned int hp_detect: 1;
00ef50c2 170 unsigned int spdif_mute: 1;
7c7767eb 171 unsigned int check_volume_offset:1;
c7d4b2fa 172
4fe5195c 173 /* gpio lines */
0fc9dec4 174 unsigned int eapd_mask;
4fe5195c
MR		 175 unsigned int gpio_mask;
176 unsigned int gpio_dir;
177 unsigned int gpio_data;
178 unsigned int gpio_mute;
179
8daaaa97
MR		 180 /* stream */
181 unsigned int stream_delay;
182
4fe5195c 183 /* analog loopback */
e1f0d669
MR		 184 unsigned char aloopback_mask;
185 unsigned char aloopback_shift;
8259980e 186
a64135a2
MR		 187 /* power management */
188 unsigned int num_pwrs;
d0513fc6 189 unsigned int *pwr_mapping;
a64135a2 190 hda_nid_t *pwr_nids;
b76c850f 191 hda_nid_t *dac_list;
a64135a2 192
74aeaabc
MR		 193 /* jack detection */
194 struct snd_array jacks;
195
196 /* events */
197 struct snd_array events;
198
2f2f4251 199 /* playback */
b22b4821 200 struct hda_input_mux *mono_mux;
89385035 201 struct hda_input_mux *amp_mux;
b22b4821 202 unsigned int cur_mmux;
2f2f4251 203 struct hda_multi_out multiout;
3cc08dc6 204 hda_nid_t dac_nids[5];
c21ca4a8
TI		 205 hda_nid_t hp_dacs[5];
206 hda_nid_t speaker_dacs[5];
2f2f4251 207
7c7767eb
TI		 208 int volume_offset;
209
2f2f4251
M		 210 /* capture */
211 hda_nid_t *adc_nids;
2f2f4251 212 unsigned int num_adcs;
dabbed6f
M		 213 hda_nid_t *mux_nids;
214 unsigned int num_muxes;
8b65727b
MP		 215 hda_nid_t *dmic_nids;
216 unsigned int num_dmics;
e1f0d669 217 hda_nid_t *dmux_nids;
1697055e 218 unsigned int num_dmuxes;
d9737751
MR		 219 hda_nid_t *smux_nids;
220 unsigned int num_smuxes;
65973632 221 const char **spdif_labels;
d9737751 222
dabbed6f 223 hda_nid_t dig_in_nid;
b22b4821 224 hda_nid_t mono_nid;
1cd2224c
MR		 225 hda_nid_t anabeep_nid;
226 hda_nid_t digbeep_nid;
2f2f4251 227
2f2f4251
M		 228 /* pin widgets */
229 hda_nid_t *pin_nids;
230 unsigned int num_pins;
2f2f4251 231 unsigned int *pin_configs;
2f2f4251
M		 232
233 /* codec specific stuff */
234 struct hda_verb *init;
c8b6bf9b 235 struct snd_kcontrol_new *mixer;
2f2f4251
M		 236
237 /* capture source */
8b65727b 238 struct hda_input_mux *dinput_mux;
e1f0d669 239 unsigned int cur_dmux[2];
c7d4b2fa 240 struct hda_input_mux *input_mux;
3cc08dc6 241 unsigned int cur_mux[3];
d9737751
MR		 242 struct hda_input_mux *sinput_mux;
243 unsigned int cur_smux[2];
2a9c7816
MR		 244 unsigned int cur_amux;
245 hda_nid_t *amp_nids;
246 unsigned int num_amps;
8daaaa97 247 unsigned int powerdown_adcs;
2f2f4251 248
403d1944
MP		 249 /* i/o switches */
250 unsigned int io_switch[2];
0fb87bb4 251 unsigned int clfe_swap;
c21ca4a8
TI		 252 hda_nid_t line_switch; /* shared line-in for input and output */
253 hda_nid_t mic_switch; /* shared mic-in for input and output */
254 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 255 unsigned int aloopback;
2f2f4251 256
c7d4b2fa
M		 257 struct hda_pcm pcm_rec[2]; /* PCM information */
258
259 /* dynamic controls and input_mux */
260 struct auto_pin_cfg autocfg;
603c4019 261 struct snd_array kctls;
8b65727b 262 struct hda_input_mux private_dimux;
c7d4b2fa 263 struct hda_input_mux private_imux;
d9737751 264 struct hda_input_mux private_smux;
89385035 265 struct hda_input_mux private_amp_mux;
b22b4821 266 struct hda_input_mux private_mono_mux;
2f2f4251
M		 267};
268
269static hda_nid_t stac9200_adc_nids[1] = {
270 0x03,
271};
272
273static hda_nid_t stac9200_mux_nids[1] = {
274 0x0c,
275};
276
277static hda_nid_t stac9200_dac_nids[1] = {
278 0x02,
279};
280
a64135a2
MR		 281static hda_nid_t stac92hd73xx_pwr_nids[8] = {
282 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
283 0x0f, 0x10, 0x11
284};
285
0ffa9807
MR		 286static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
287 0x26, 0,
288};
289
e1f0d669
MR		 290static hda_nid_t stac92hd73xx_adc_nids[2] = {
291 0x1a, 0x1b
292};
293
2a9c7816
MR		 294#define DELL_M6_AMP 2
295static hda_nid_t stac92hd73xx_amp_nids[3] = {
296 0x0b, 0x0c, 0x0e
89385035
MR		 297};
298
e1f0d669
MR		 299#define STAC92HD73XX_NUM_DMICS 2
300static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
301 0x13, 0x14, 0
302};
303
304#define STAC92HD73_DAC_COUNT 5
e1f0d669
MR		 305
306static hda_nid_t stac92hd73xx_mux_nids[4] = {
307 0x28, 0x29, 0x2a, 0x2b,
308};
309
310static hda_nid_t stac92hd73xx_dmux_nids[2] = {
311 0x20, 0x21,
312};
313
d9737751
MR		 314static hda_nid_t stac92hd73xx_smux_nids[2] = {
315 0x22, 0x23,
316};
317
d0513fc6
MR		 318#define STAC92HD83XXX_NUM_DMICS 2
319static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
320 0x11, 0x12, 0
321};
322
d0513fc6 323#define STAC92HD83_DAC_COUNT 3
d0513fc6
MR		 324
325static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
326 0x17, 0x18,
327};
328
329static hda_nid_t stac92hd83xxx_adc_nids[2] = {
330 0x15, 0x16,
331};
332
333static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
334 0xa, 0xb, 0xd, 0xe,
335};
336
0ffa9807
MR		 337static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
338 0x1e, 0,
339};
340
d0513fc6 341static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 342 0x03, 0x0c, 0x20, 0x40,
d0513fc6
MR		 343};
344
9248f269 345static hda_nid_t stac92hd83xxx_amp_nids[1] = {
c15c5060
MR		 346 0xc,
347};
348
a64135a2
MR		 349static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
350 0x0a, 0x0d, 0x0f
351};
352
e035b841
MR		 353static hda_nid_t stac92hd71bxx_adc_nids[2] = {
354 0x12, 0x13,
355};
356
357static hda_nid_t stac92hd71bxx_mux_nids[2] = {
358 0x1a, 0x1b
359};
360
4b33c767
MR		 361static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
362 0x1c, 0x1d,
e1f0d669
MR		 363};
364
d9737751
MR		 365static hda_nid_t stac92hd71bxx_smux_nids[2] = {
366 0x24, 0x25,
367};
368
e035b841
MR		 369#define STAC92HD71BXX_NUM_DMICS 2
370static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
371 0x18, 0x19, 0
372};
373
0ffa9807
MR		 374static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
375 0x22, 0
376};
377
8e21c34c
TD		 378static hda_nid_t stac925x_adc_nids[1] = {
379 0x03,
380};
381
382static hda_nid_t stac925x_mux_nids[1] = {
383 0x0f,
384};
385
386static hda_nid_t stac925x_dac_nids[1] = {
387 0x02,
388};
389
f6e9852a
TI		 390#define STAC925X_NUM_DMICS 1
391static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
392 0x15, 0
2c11f955
TD		 393};
394
1697055e
TI		 395static hda_nid_t stac925x_dmux_nids[1] = {
396 0x14,
397};
398
2f2f4251
M		 399static hda_nid_t stac922x_adc_nids[2] = {
400 0x06, 0x07,
401};
402
403static hda_nid_t stac922x_mux_nids[2] = {
404 0x12, 0x13,
405};
406
3cc08dc6
MP		 407static hda_nid_t stac927x_adc_nids[3] = {
408 0x07, 0x08, 0x09
409};
410
411static hda_nid_t stac927x_mux_nids[3] = {
412 0x15, 0x16, 0x17
413};
414
d9737751
MR		 415static hda_nid_t stac927x_smux_nids[1] = {
416 0x21,
417};
418
b76c850f
MR		 419static hda_nid_t stac927x_dac_nids[6] = {
420 0x02, 0x03, 0x04, 0x05, 0x06, 0
421};
422
e1f0d669
MR		 423static hda_nid_t stac927x_dmux_nids[1] = {
424 0x1b,
425};
426
7f16859a
MR		 427#define STAC927X_NUM_DMICS 2
428static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
429 0x13, 0x14, 0
430};
431
65973632
MR		 432static const char *stac927x_spdif_labels[5] = {
433 "Digital Playback", "ADAT", "Analog Mux 1",
434 "Analog Mux 2", "Analog Mux 3"
435};
436
f3302a59
MP		 437static hda_nid_t stac9205_adc_nids[2] = {
438 0x12, 0x13
439};
440
441static hda_nid_t stac9205_mux_nids[2] = {
442 0x19, 0x1a
443};
444
e1f0d669 445static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 446 0x1d,
e1f0d669
MR		 447};
448
d9737751
MR		 449static hda_nid_t stac9205_smux_nids[1] = {
450 0x21,
451};
452
f6e9852a
TI		 453#define STAC9205_NUM_DMICS 2
454static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
455 0x17, 0x18, 0
8b65727b
MP		 456};
457
c7d4b2fa 458static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 459 0x08, 0x09, 0x0d, 0x0e,
460 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 461};
462
8e21c34c
TD		 463static hda_nid_t stac925x_pin_nids[8] = {
464 0x07, 0x08, 0x0a, 0x0b,
465 0x0c, 0x0d, 0x10, 0x11,
466};
467
2f2f4251
M		 468static hda_nid_t stac922x_pin_nids[10] = {
469 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
470 0x0f, 0x10, 0x11, 0x15, 0x1b,
471};
472
a7662640 473static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 474 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
475 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 476 0x14, 0x22, 0x23
e1f0d669
MR		 477};
478
d0513fc6
MR		 479static hda_nid_t stac92hd83xxx_pin_nids[14] = {
480 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
481 0x0f, 0x10, 0x11, 0x12, 0x13,
482 0x1d, 0x1e, 0x1f, 0x20
483};
0ffa9807 484static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 485 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
486 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 487 0x1f,
e035b841
MR		 488};
489
3cc08dc6
MP		 490static hda_nid_t stac927x_pin_nids[14] = {
491 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
492 0x0f, 0x10, 0x11, 0x12, 0x13,
493 0x14, 0x21, 0x22, 0x23,
494};
495
f3302a59
MP		 496static hda_nid_t stac9205_pin_nids[12] = {
497 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
498 0x0f, 0x14, 0x16, 0x17, 0x18,
499 0x21, 0x22,
f3302a59
MP		 500};
501
89385035
MR		 502#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
503
504static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
505 struct snd_ctl_elem_value *ucontrol)
506{
507 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
508 struct sigmatel_spec *spec = codec->spec;
509 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
510
511 kcontrol->private_value ^= get_amp_nid(kcontrol);
512 kcontrol->private_value |= nid;
513
514 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
515}
516
517static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
518 struct snd_ctl_elem_value *ucontrol)
519{
520 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
521 struct sigmatel_spec *spec = codec->spec;
522 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
523
524 kcontrol->private_value ^= get_amp_nid(kcontrol);
525 kcontrol->private_value |= nid;
526
527 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
528}
529
8b65727b
MP		 530static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
531 struct snd_ctl_elem_info *uinfo)
532{
533 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
534 struct sigmatel_spec *spec = codec->spec;
535 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
536}
537
538static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
539 struct snd_ctl_elem_value *ucontrol)
540{
541 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
542 struct sigmatel_spec *spec = codec->spec;
e1f0d669 543 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 544
e1f0d669 545 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 546 return 0;
547}
548
549static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
550 struct snd_ctl_elem_value *ucontrol)
551{
552 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
553 struct sigmatel_spec *spec = codec->spec;
e1f0d669 554 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 555
556 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 557 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 558}
559
d9737751
MR		 560static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
561 struct snd_ctl_elem_info *uinfo)
562{
563 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
564 struct sigmatel_spec *spec = codec->spec;
565 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
566}
567
568static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
569 struct snd_ctl_elem_value *ucontrol)
570{
571 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
572 struct sigmatel_spec *spec = codec->spec;
573 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
574
575 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
576 return 0;
577}
578
579static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
580 struct snd_ctl_elem_value *ucontrol)
581{
582 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
583 struct sigmatel_spec *spec = codec->spec;
00ef50c2 584 struct hda_input_mux *smux = &spec->private_smux;
d9737751 585 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 586 int err, val;
587 hda_nid_t nid;
d9737751 588
00ef50c2 589 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 590 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 591 if (err < 0)
592 return err;
593
594 if (spec->spdif_mute) {
595 if (smux_idx == 0)
596 nid = spec->multiout.dig_out_nid;
597 else
598 nid = codec->slave_dig_outs[smux_idx - 1];
599 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 600 val = HDA_AMP_MUTE;
00ef50c2 601 else
c9b46f91 602 val = 0;
00ef50c2 603 /* un/mute SPDIF out */
c9b46f91
TI		 604 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
605 HDA_AMP_MUTE, val);
00ef50c2
MR		 606 }
607 return 0;
d9737751
MR		 608}
609
c8b6bf9b 610static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 611{
612 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
613 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 614 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 615}
616
c8b6bf9b 617static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 618{
619 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
620 struct sigmatel_spec *spec = codec->spec;
621 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
622
623 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
624 return 0;
625}
626
c8b6bf9b 627static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 628{
629 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
630 struct sigmatel_spec *spec = codec->spec;
631 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
632
c7d4b2fa 633 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 634 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
635}
636
b22b4821
MR		 637static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
638 struct snd_ctl_elem_info *uinfo)
639{
640 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
641 struct sigmatel_spec *spec = codec->spec;
642 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
643}
644
645static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
646 struct snd_ctl_elem_value *ucontrol)
647{
648 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
649 struct sigmatel_spec *spec = codec->spec;
650
651 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
652 return 0;
653}
654
655static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
656 struct snd_ctl_elem_value *ucontrol)
657{
658 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
659 struct sigmatel_spec *spec = codec->spec;
660
661 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
662 spec->mono_nid, &spec->cur_mmux);
663}
664
89385035
MR		 665static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
666 struct snd_ctl_elem_info *uinfo)
667{
668 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
669 struct sigmatel_spec *spec = codec->spec;
670 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
671}
672
673static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
674 struct snd_ctl_elem_value *ucontrol)
675{
676 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
677 struct sigmatel_spec *spec = codec->spec;
678
679 ucontrol->value.enumerated.item[0] = spec->cur_amux;
680 return 0;
681}
682
683static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
684 struct snd_ctl_elem_value *ucontrol)
685{
686 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
687 struct sigmatel_spec *spec = codec->spec;
688 struct snd_kcontrol *ctl =
689 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
690 if (!ctl)
691 return -EINVAL;
692
693 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
694 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
695
696 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
697 0, &spec->cur_amux);
698}
699
5f10c4a9
ML		 700#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
701
702static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
703 struct snd_ctl_elem_value *ucontrol)
704{
705 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 706 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 707 struct sigmatel_spec *spec = codec->spec;
708
e1f0d669
MR		 709 ucontrol->value.integer.value[0] = !!(spec->aloopback &
710 (spec->aloopback_mask << idx));
5f10c4a9
ML		 711 return 0;
712}
713
714static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
715 struct snd_ctl_elem_value *ucontrol)
716{
717 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
718 struct sigmatel_spec *spec = codec->spec;
e1f0d669 719 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 720 unsigned int dac_mode;
e1f0d669 721 unsigned int val, idx_val;
5f10c4a9 722
e1f0d669
MR		 723 idx_val = spec->aloopback_mask << idx;
724 if (ucontrol->value.integer.value[0])
725 val = spec->aloopback | idx_val;
726 else
727 val = spec->aloopback & ~idx_val;
68ea7b2f 728 if (spec->aloopback == val)
5f10c4a9
ML		 729 return 0;
730
68ea7b2f 731 spec->aloopback = val;
5f10c4a9 732
e1f0d669
MR		 733 /* Only return the bits defined by the shift value of the
734 * first two bytes of the mask
735 */
5f10c4a9 736 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 737 kcontrol->private_value & 0xFFFF, 0x0);
738 dac_mode >>= spec->aloopback_shift;
5f10c4a9 739
e1f0d669 740 if (spec->aloopback & idx_val) {
5f10c4a9 741 snd_hda_power_up(codec);
e1f0d669 742 dac_mode |= idx_val;
5f10c4a9
ML		 743 } else {
744 snd_hda_power_down(codec);
e1f0d669 745 dac_mode &= ~idx_val;
5f10c4a9
ML		 746 }
747
748 snd_hda_codec_write_cache(codec, codec->afg, 0,
749 kcontrol->private_value >> 16, dac_mode);
750
751 return 1;
752}
753
c7d4b2fa 754static struct hda_verb stac9200_core_init[] = {
2f2f4251 755 /* set dac0mux for dac converter */
c7d4b2fa 756 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 757 {}
758};
759
1194b5b7
TI		 760static struct hda_verb stac9200_eapd_init[] = {
761 /* set dac0mux for dac converter */
762 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
763 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
764 {}
765};
766
e1f0d669
MR		 767static struct hda_verb stac92hd73xx_6ch_core_init[] = {
768 /* set master volume and direct control */
769 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 770 /* setup adcs to point to mixer */
771 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
772 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 773 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
774 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
775 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
776 /* setup import muxs */
777 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
778 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
779 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
780 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
781 {}
782};
783
d654a660
MR		 784static struct hda_verb dell_eq_core_init[] = {
785 /* set master volume to max value without distortion
786 * and direct control */
787 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR		 788 /* setup adcs to point to mixer */
789 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
790 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
791 /* setup import muxs */
792 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
793 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
794 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
795 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
796 {}
797};
798
52fe0f9d 799static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 800 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR		 801 /* setup adcs to point to mixer */
802 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
803 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
804 /* setup import muxs */
805 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
806 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
807 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
808 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
809 {}
810};
811
e1f0d669
MR		 812static struct hda_verb stac92hd73xx_8ch_core_init[] = {
813 /* set master volume and direct control */
814 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 815 /* setup adcs to point to mixer */
816 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
817 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 818 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
819 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
820 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
821 /* setup import muxs */
822 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
823 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
824 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
825 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
826 {}
827};
828
829static struct hda_verb stac92hd73xx_10ch_core_init[] = {
830 /* set master volume and direct control */
831 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 832 /* dac3 is connected to import3 mux */
833 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR		 834 /* setup adcs to point to mixer */
835 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
836 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 837 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
838 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
839 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
840 /* setup import muxs */
841 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
842 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
843 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
844 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
845 {}
846};
847
d0513fc6 848static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 849 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
850 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
851 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
852
853 /* power state controls amps */
854 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 855 {}
d0513fc6
MR		 856};
857
e035b841 858static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 859 /* set master volume and direct control */
860 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
541eee87
MR		 861 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
862 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
863 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
864 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
574f3c4f 865 {}
541eee87
MR		 866};
867
4b33c767 868#define HD_DISABLE_PORTF 2
541eee87 869static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 870 /* start of config #1 */
871
872 /* connect port 0f to audio mixer */
873 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 874 /* unmute right and left channels for node 0x0f */
875 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
876 /* start of config #2 */
877
e035b841
MR		 878 /* set master volume and direct control */
879 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
aafc4412 880 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 881 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
882 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 883 {}
884};
885
8e21c34c
TD		 886static struct hda_verb stac925x_core_init[] = {
887 /* set dac0mux for dac converter */
888 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 889 /* mute the master volume */
890 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 891 {}
892};
893
c7d4b2fa 894static struct hda_verb stac922x_core_init[] = {
2f2f4251 895 /* set master volume and direct control */
c7d4b2fa 896 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 897 {}
898};
899
93ed1503 900static struct hda_verb d965_core_init[] = {
19039bd0 901 /* set master volume and direct control */
93ed1503 902 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 903 /* unmute node 0x1b */
904 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
905 /* select node 0x03 as DAC */
906 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
907 {}
908};
909
3cc08dc6
MP		 910static struct hda_verb stac927x_core_init[] = {
911 /* set master volume and direct control */
912 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 913 /* enable analog pc beep path */
914 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 915 {}
916};
917
f3302a59
MP		 918static struct hda_verb stac9205_core_init[] = {
919 /* set master volume and direct control */
920 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 921 /* enable analog pc beep path */
922 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 923 {}
924};
925
b22b4821
MR		 926#define STAC_MONO_MUX \
927 { \
928 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
929 .name = "Mono Mux", \
930 .count = 1, \
931 .info = stac92xx_mono_mux_enum_info, \
932 .get = stac92xx_mono_mux_enum_get, \
933 .put = stac92xx_mono_mux_enum_put, \
934 }
935
89385035
MR		 936#define STAC_AMP_MUX \
937 { \
938 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
939 .name = "Amp Selector Capture Switch", \
940 .count = 1, \
941 .info = stac92xx_amp_mux_enum_info, \
942 .get = stac92xx_amp_mux_enum_get, \
943 .put = stac92xx_amp_mux_enum_put, \
944 }
945
946#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
947 { \
948 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
949 .name = xname, \
950 .index = 0, \
951 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
952 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
953 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
954 .info = stac92xx_amp_volume_info, \
955 .get = stac92xx_amp_volume_get, \
956 .put = stac92xx_amp_volume_put, \
957 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
958 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
959 }
960
9e05b7a3 961#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 962 { \
963 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
964 .name = "Input Source", \
9e05b7a3 965 .count = cnt, \
ca7c5a8b
ML		 966 .info = stac92xx_mux_enum_info, \
967 .get = stac92xx_mux_enum_get, \
968 .put = stac92xx_mux_enum_put, \
969 }
970
e1f0d669 971#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 972 { \
973 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
974 .name = "Analog Loopback", \
e1f0d669 975 .count = cnt, \
5f10c4a9
ML		 976 .info = stac92xx_aloopback_info, \
977 .get = stac92xx_aloopback_get, \
978 .put = stac92xx_aloopback_put, \
979 .private_value = verb_read | (verb_write << 16), \
980 }
981
c8b6bf9b 982static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 983 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
984 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 985 STAC_INPUT_SOURCE(1),
2f2f4251
M		 986 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
987 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 988 { } /* end */
989};
990
2a9c7816 991#define DELL_M6_MIXER 6
e1f0d669 992static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 993 /* start of config #1 */
e1f0d669
MR		 994 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
995 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
996
e1f0d669
MR		 997 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
998 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
999
2a9c7816
MR		 1000 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1001 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1002
1003 /* start of config #2 */
1004 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1005 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1006
e1f0d669
MR		 1007 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1008 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1009
2a9c7816
MR		 1010 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1011
1012 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1013 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1014
1015 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1016 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1017
e1f0d669
MR		 1018 { } /* end */
1019};
1020
1021static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1022 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1023
e1f0d669
MR		 1024 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1025 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1026
1027 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1028 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1029
1030 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1031 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1032
1033 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1034 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1035
1036 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1037 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1038
1039 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1040 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1041
1042 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1043 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1044 { } /* end */
1045};
1046
1047static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1048 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1049
e1f0d669
MR		 1050 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1051 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1052
1053 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1054 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1055
1056 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1057 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1058
1059 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1060 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1061
1062 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1063 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1064
1065 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1066 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1067
1068 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1069 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1070 { } /* end */
1071};
1072
d0513fc6
MR		 1073
1074static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1075 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1076 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1077
1078 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1079 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1080
74b7ff48
MR		 1081 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT),
1082 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT),
d0513fc6 1083
74b7ff48
MR		 1084 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT),
1085 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT),
d0513fc6 1086
74b7ff48
MR		 1087 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT),
1088 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT),
d0513fc6 1089
74b7ff48
MR		 1090 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT),
1091 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT),
d0513fc6
MR		 1092
1093 /*
74b7ff48
MR		 1094 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT),
1095 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT),
d0513fc6
MR		 1096 */
1097 { } /* end */
1098};
1099
541eee87 1100static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1101 STAC_INPUT_SOURCE(2),
4b33c767 1102 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1103
9b35947f
MR		 1104 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1105 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1106
1107 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1108 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1109 /* analog pc-beep replaced with digital beep support */
1110 /*
f7c5dda2
MR		 1111 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1112 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1113 */
f7c5dda2 1114
687cb98e
MR		 1115 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1116 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1117
687cb98e
MR		 1118 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1119 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1120
1121 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1122 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1123
1124 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1125 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1126 { } /* end */
1127};
1128
541eee87 1129static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1130 STAC_INPUT_SOURCE(2),
1131 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1132
541eee87
MR		 1133 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1134 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1135
1136 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1137 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1138 { } /* end */
1139};
1140
8e21c34c 1141static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI		 1142 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
1143 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
9e05b7a3 1144 STAC_INPUT_SOURCE(1),
8e21c34c 1145 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1146 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1147 { } /* end */
1148};
1149
9e05b7a3 1150static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1151 STAC_INPUT_SOURCE(2),
e1f0d669 1152 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1153
1154 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1155 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1156
1157 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1158 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1159 { } /* end */
1160};
1161
19039bd0 1162/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1163static struct snd_kcontrol_new stac922x_mixer[] = {
1164 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1165 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1166 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1167
1168 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1169 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1170 { } /* end */
1171};
1172
9e05b7a3 1173
d1d985f0 1174static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1175 STAC_INPUT_SOURCE(3),
e1f0d669 1176 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1177
9e05b7a3
ML		 1178 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1179 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1180
1181 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1182 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1183
1184 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1185 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1186 { } /* end */
1187};
1188
1697055e
TI		 1189static struct snd_kcontrol_new stac_dmux_mixer = {
1190 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1191 .name = "Digital Input Source",
1192 /* count set later */
1193 .info = stac92xx_dmux_enum_info,
1194 .get = stac92xx_dmux_enum_get,
1195 .put = stac92xx_dmux_enum_put,
1196};
1197
d9737751
MR		 1198static struct snd_kcontrol_new stac_smux_mixer = {
1199 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1200 .name = "IEC958 Playback Source",
d9737751
MR		 1201 /* count set later */
1202 .info = stac92xx_smux_enum_info,
1203 .get = stac92xx_smux_enum_get,
1204 .put = stac92xx_smux_enum_put,
1205};
1206
2134ea4f
TI		 1207static const char *slave_vols[] = {
1208 "Front Playback Volume",
1209 "Surround Playback Volume",
1210 "Center Playback Volume",
1211 "LFE Playback Volume",
1212 "Side Playback Volume",
1213 "Headphone Playback Volume",
1214 "Headphone Playback Volume",
1215 "Speaker Playback Volume",
1216 "External Speaker Playback Volume",
1217 "Speaker2 Playback Volume",
1218 NULL
1219};
1220
1221static const char *slave_sws[] = {
1222 "Front Playback Switch",
1223 "Surround Playback Switch",
1224 "Center Playback Switch",
1225 "LFE Playback Switch",
1226 "Side Playback Switch",
1227 "Headphone Playback Switch",
1228 "Headphone Playback Switch",
1229 "Speaker Playback Switch",
1230 "External Speaker Playback Switch",
1231 "Speaker2 Playback Switch",
edb54a55 1232 "IEC958 Playback Switch",
2134ea4f
TI		 1233 NULL
1234};
1235
603c4019 1236static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1237static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1238
2f2f4251
M		 1239static int stac92xx_build_controls(struct hda_codec *codec)
1240{
1241 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1242 struct auto_pin_cfg *cfg = &spec->autocfg;
1243 hda_nid_t nid;
2f2f4251 1244 int err;
c7d4b2fa 1245 int i;
2f2f4251
M		 1246
1247 err = snd_hda_add_new_ctls(codec, spec->mixer);
1248 if (err < 0)
1249 return err;
c7d4b2fa
M		 1250
1251 for (i = 0; i < spec->num_mixers; i++) {
1252 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1253 if (err < 0)
1254 return err;
1255 }
1697055e
TI		 1256 if (spec->num_dmuxes > 0) {
1257 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1258 err = snd_hda_ctl_add(codec,
1697055e
TI		 1259 snd_ctl_new1(&stac_dmux_mixer, codec));
1260 if (err < 0)
1261 return err;
1262 }
d9737751 1263 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1264 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1265 struct hda_input_mux *smux = &spec->private_smux;
1266 /* check for mute support on SPDIF out */
1267 if (wcaps & AC_WCAP_OUT_AMP) {
1268 smux->items[smux->num_items].label = "Off";
1269 smux->items[smux->num_items].index = 0;
1270 smux->num_items++;
1271 spec->spdif_mute = 1;
1272 }
d9737751 1273 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1274 err = snd_hda_ctl_add(codec,
d9737751
MR		 1275 snd_ctl_new1(&stac_smux_mixer, codec));
1276 if (err < 0)
1277 return err;
1278 }
c7d4b2fa 1279
dabbed6f
M		 1280 if (spec->multiout.dig_out_nid) {
1281 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1282 if (err < 0)
1283 return err;
9a08160b
TI		 1284 err = snd_hda_create_spdif_share_sw(codec,
1285 &spec->multiout);
1286 if (err < 0)
1287 return err;
1288 spec->multiout.share_spdif = 1;
dabbed6f 1289 }
da74ae3e 1290 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1291 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1292 if (err < 0)
1293 return err;
1294 }
2134ea4f
TI		 1295
1296 /* if we have no master control, let's create it */
1297 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1298 unsigned int vmaster_tlv[4];
2134ea4f 1299 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1300 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI		 1301 /* correct volume offset */
1302 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
2134ea4f 1303 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1304 vmaster_tlv, slave_vols);
2134ea4f
TI		 1305 if (err < 0)
1306 return err;
1307 }
1308 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1309 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1310 NULL, slave_sws);
1311 if (err < 0)
1312 return err;
1313 }
1314
603c4019 1315 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1316
1317 /* create jack input elements */
1318 if (spec->hp_detect) {
1319 for (i = 0; i < cfg->hp_outs; i++) {
1320 int type = SND_JACK_HEADPHONE;
1321 nid = cfg->hp_pins[i];
1322 /* jack detection */
1323 if (cfg->hp_outs == i)
1324 type |= SND_JACK_LINEOUT;
1325 err = stac92xx_add_jack(codec, nid, type);
1326 if (err < 0)
1327 return err;
1328 }
1329 }
1330 for (i = 0; i < cfg->line_outs; i++) {
1331 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1332 SND_JACK_LINEOUT);
1333 if (err < 0)
1334 return err;
1335 }
1336 for (i = 0; i < AUTO_PIN_LAST; i++) {
1337 nid = cfg->input_pins[i];
1338 if (nid) {
1339 err = stac92xx_add_jack(codec, nid,
1340 SND_JACK_MICROPHONE);
1341 if (err < 0)
1342 return err;
1343 }
1344 }
1345
dabbed6f 1346 return 0;
2f2f4251
M		 1347}
1348
403d1944 1349static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1350 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1351 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1352};
1353
58eec423
MCC		 1354static unsigned int gateway9200_m4_pin_configs[8] = {
1355 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1356 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1357};
1358static unsigned int gateway9200_m4_2_pin_configs[8] = {
1359 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1360 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1361};
1362
1363/*
dfe495d0
TI		 1364 STAC 9200 pin configs for
1365 102801A8
1366 102801DE
1367 102801E8
1368*/
1369static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1370 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1371 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1372};
1373
1374/*
1375 STAC 9200 pin configs for
1376 102801C0
1377 102801C1
1378*/
1379static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1380 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1381 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1382};
1383
1384/*
1385 STAC 9200 pin configs for
1386 102801C4 (Dell Dimension E310)
1387 102801C5
1388 102801C7
1389 102801D9
1390 102801DA
1391 102801E3
1392*/
1393static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1394 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1395 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1396};
1397
1398
1399/*
1400 STAC 9200-32 pin configs for
1401 102801B5 (Dell Inspiron 630m)
1402 102801D8 (Dell Inspiron 640m)
1403*/
1404static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1405 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1406 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1407};
1408
1409/*
1410 STAC 9200-32 pin configs for
1411 102801C2 (Dell Latitude D620)
1412 102801C8
1413 102801CC (Dell Latitude D820)
1414 102801D4
1415 102801D6
1416*/
1417static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1418 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1419 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1420};
1421
1422/*
1423 STAC 9200-32 pin configs for
1424 102801CE (Dell XPS M1710)
1425 102801CF (Dell Precision M90)
1426*/
1427static unsigned int dell9200_m23_pin_configs[8] = {
1428 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1429 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1430};
1431
1432/*
1433 STAC 9200-32 pin configs for
1434 102801C9
1435 102801CA
1436 102801CB (Dell Latitude 120L)
1437 102801D3
1438*/
1439static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1440 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1441 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1442};
1443
1444/*
1445 STAC 9200-32 pin configs for
1446 102801BD (Dell Inspiron E1505n)
1447 102801EE
1448 102801EF
1449*/
1450static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1451 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1452 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1453};
1454
1455/*
1456 STAC 9200-32 pin configs for
1457 102801F5 (Dell Inspiron 1501)
1458 102801F6
1459*/
1460static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1461 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1462 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1463};
1464
1465/*
1466 STAC 9200-32
1467 102801CD (Dell Inspiron E1705/9400)
1468*/
1469static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1470 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1471 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1472};
1473
bf277785
TD		 1474static unsigned int oqo9200_pin_configs[8] = {
1475 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1476 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1477};
1478
dfe495d0 1479
f5fcc13c
TI		 1480static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1481 [STAC_REF] = ref9200_pin_configs,
bf277785 1482 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1483 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1484 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1485 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1486 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1487 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1488 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1489 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1490 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1491 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1492 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1493 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1494 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1495 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1496};
1497
f5fcc13c
TI		 1498static const char *stac9200_models[STAC_9200_MODELS] = {
1499 [STAC_REF] = "ref",
bf277785 1500 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1501 [STAC_9200_DELL_D21] = "dell-d21",
1502 [STAC_9200_DELL_D22] = "dell-d22",
1503 [STAC_9200_DELL_D23] = "dell-d23",
1504 [STAC_9200_DELL_M21] = "dell-m21",
1505 [STAC_9200_DELL_M22] = "dell-m22",
1506 [STAC_9200_DELL_M23] = "dell-m23",
1507 [STAC_9200_DELL_M24] = "dell-m24",
1508 [STAC_9200_DELL_M25] = "dell-m25",
1509 [STAC_9200_DELL_M26] = "dell-m26",
1510 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1511 [STAC_9200_M4] = "gateway-m4",
1512 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1513 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1514};
1515
1516static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1517 /* SigmaTel reference board */
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1519 "DFI LanParty", STAC_REF),
e7377071 1520 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1522 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1524 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1526 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1528 "unknown Dell", STAC_9200_DELL_D22),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1530 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1532 "Dell Latitude D620", STAC_9200_DELL_M22),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1534 "unknown Dell", STAC_9200_DELL_D23),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1536 "unknown Dell", STAC_9200_DELL_D23),
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1538 "unknown Dell", STAC_9200_DELL_M22),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1540 "unknown Dell", STAC_9200_DELL_M24),
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1542 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1544 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1546 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1548 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1550 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1552 "Dell Precision M90", STAC_9200_DELL_M23),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1554 "unknown Dell", STAC_9200_DELL_M22),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1556 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1558 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1560 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1562 "unknown Dell", STAC_9200_DELL_D23),
1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1564 "unknown Dell", STAC_9200_DELL_D23),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1566 "unknown Dell", STAC_9200_DELL_D21),
1567 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1568 "unknown Dell", STAC_9200_DELL_D23),
1569 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1570 "unknown Dell", STAC_9200_DELL_D21),
1571 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1572 "unknown Dell", STAC_9200_DELL_M25),
1573 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1574 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1575 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1576 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1577 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1578 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1579 /* Panasonic */
117f257d 1580 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1581 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1582 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1583 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1584 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1585 /* OQO Mobile */
1586 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1587 {} /* terminator */
1588};
1589
8e21c34c
TD		 1590static unsigned int ref925x_pin_configs[8] = {
1591 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1592 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1593};
1594
9cb36c2a
MCC		 1595static unsigned int stac925xM1_pin_configs[8] = {
1596 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1597 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1598};
1599
9cb36c2a
MCC		 1600static unsigned int stac925xM1_2_pin_configs[8] = {
1601 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1602 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1603};
58eec423 1604
9cb36c2a
MCC		 1605static unsigned int stac925xM2_pin_configs[8] = {
1606 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1607 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1608};
1609
8e21c34c 1610static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1611 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1612 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1613};
1614
9cb36c2a
MCC		 1615static unsigned int stac925xM3_pin_configs[8] = {
1616 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1617 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1618};
58eec423 1619
9cb36c2a
MCC		 1620static unsigned int stac925xM5_pin_configs[8] = {
1621 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1622 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1623};
1624
9cb36c2a
MCC		 1625static unsigned int stac925xM6_pin_configs[8] = {
1626 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1627 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1628};
1629
1630static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1631 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1632 [STAC_M1] = stac925xM1_pin_configs,
1633 [STAC_M1_2] = stac925xM1_2_pin_configs,
1634 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1635 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1636 [STAC_M3] = stac925xM3_pin_configs,
1637 [STAC_M5] = stac925xM5_pin_configs,
1638 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1639};
1640
1641static const char *stac925x_models[STAC_925x_MODELS] = {
1642 [STAC_REF] = "ref",
9cb36c2a
MCC		 1643 [STAC_M1] = "m1",
1644 [STAC_M1_2] = "m1-2",
1645 [STAC_M2] = "m2",
8e21c34c 1646 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1647 [STAC_M3] = "m3",
1648 [STAC_M5] = "m5",
1649 [STAC_M6] = "m6",
8e21c34c
TD		 1650};
1651
9cb36c2a 1652static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1653 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1654 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1655 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1656 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1657 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1658 /* Not sure about the brand name for those */
1659 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1660 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1661 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1662 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1663 {} /* terminator */
8e21c34c
TD		 1664};
1665
1666static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1667 /* SigmaTel reference board */
1668 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1669 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1670
1671 /* Default table for unknown ID */
1672 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1673
8e21c34c
TD		 1674 {} /* terminator */
1675};
1676
a7662640 1677static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1678 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1679 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1680 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1681 0x01452050,
1682};
1683
1684static unsigned int dell_m6_pin_configs[13] = {
1685 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1686 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1687 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1688 0x4f0000f0,
e1f0d669
MR		 1689};
1690
1691static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1692 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1693 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1694 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1695 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1696 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1697};
1698
1699static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1700 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1701 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI		 1702 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1703 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1704 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1705 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1706};
1707
1708static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1709 /* SigmaTel reference board */
1710 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1711 "DFI LanParty", STAC_92HD73XX_REF),
1712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1713 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1715 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1717 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1719 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1721 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1723 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1725 "unknown Dell", STAC_DELL_M6_DMIC),
1726 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1727 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1728 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1729 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1730 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1731 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1732 {} /* terminator */
1733};
1734
d0513fc6
MR		 1735static unsigned int ref92hd83xxx_pin_configs[14] = {
1736 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1737 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1738 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1739 0x01451160, 0x98560170,
1740};
1741
1742static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1743 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1744 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
d0513fc6
MR		 1745};
1746
1747static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1748 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1749 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
d0513fc6
MR		 1750};
1751
1752static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1753 /* SigmaTel reference board */
1754 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1755 "DFI LanParty", STAC_92HD83XXX_REF),
574f3c4f 1756 {} /* terminator */
d0513fc6
MR		 1757};
1758
0ffa9807 1759static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1760 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1761 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1762 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1763};
1764
0ffa9807 1765static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1766 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1767 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1768 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1769};
1770
0ffa9807 1771static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1772 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1773 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1774 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1775};
1776
3a7abfd2
MR		 1777static unsigned int dell_m4_3_pin_configs[11] = {
1778 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1779 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1780 0x40f000f0, 0x044413b0, 0x044413b0,
1781};
1782
e035b841
MR		 1783static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1784 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1785 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1786 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1787 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1788 [STAC_HP_M4] = NULL,
1b0652eb 1789 [STAC_HP_DV5] = NULL,
e035b841
MR		 1790};
1791
1792static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1793 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1794 [STAC_DELL_M4_1] = "dell-m4-1",
1795 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1796 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1797 [STAC_HP_M4] = "hp-m4",
1b0652eb 1798 [STAC_HP_DV5] = "hp-dv5",
e035b841
MR		 1799};
1800
1801static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1802 /* SigmaTel reference board */
1803 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1804 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1805 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1806 "HP dv5", STAC_HP_M4),
1807 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1808 "HP dv7", STAC_HP_M4),
e0c0e943
TI		 1809 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f7,
1810 "HP dv4", STAC_HP_DV5),
69dfaefe
TI		 1811 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc,
1812 "HP dv7", STAC_HP_M4),
dafb70ce 1813 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603,
1b0652eb 1814 "HP dv5", STAC_HP_DV5),
9a9e2359
MR		 1815 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1816 "unknown HP", STAC_HP_M4),
a7662640
MR		 1817 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1818 "unknown Dell", STAC_DELL_M4_1),
1819 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1820 "unknown Dell", STAC_DELL_M4_1),
1821 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1822 "unknown Dell", STAC_DELL_M4_1),
1823 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1824 "unknown Dell", STAC_DELL_M4_1),
1825 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1826 "unknown Dell", STAC_DELL_M4_1),
1827 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1828 "unknown Dell", STAC_DELL_M4_1),
1829 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1830 "unknown Dell", STAC_DELL_M4_1),
1831 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1832 "unknown Dell", STAC_DELL_M4_2),
1833 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1834 "unknown Dell", STAC_DELL_M4_2),
1835 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1836 "unknown Dell", STAC_DELL_M4_2),
1837 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1838 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1839 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1840 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1841 {} /* terminator */
1842};
1843
403d1944
MP		 1844static unsigned int ref922x_pin_configs[10] = {
1845 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1846 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1847 0x40000100, 0x40000100,
1848};
1849
dfe495d0
TI		 1850/*
1851 STAC 922X pin configs for
1852 102801A7
1853 102801AB
1854 102801A9
1855 102801D1
1856 102801D2
1857*/
1858static unsigned int dell_922x_d81_pin_configs[10] = {
1859 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1860 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1861 0x01813122, 0x400001f2,
1862};
1863
1864/*
1865 STAC 922X pin configs for
1866 102801AC
1867 102801D0
1868*/
1869static unsigned int dell_922x_d82_pin_configs[10] = {
1870 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1871 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1872 0x01813122, 0x400001f1,
1873};
1874
1875/*
1876 STAC 922X pin configs for
1877 102801BF
1878*/
1879static unsigned int dell_922x_m81_pin_configs[10] = {
1880 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1881 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1882 0x40C003f1, 0x405003f0,
1883};
1884
1885/*
1886 STAC 9221 A1 pin configs for
1887 102801D7 (Dell XPS M1210)
1888*/
1889static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1890 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1891 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1892 0x508003f3, 0x405003f4,
1893};
1894
403d1944 1895static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1896 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1897 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1898 0x02a19120, 0x40000100,
1899};
1900
1901static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1902 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1903 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1904 0x02a19320, 0x40000100,
1905};
1906
5d5d3bc3
IZ		 1907static unsigned int intel_mac_v1_pin_configs[10] = {
1908 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1909 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1910 0x400000fc, 0x400000fb,
1911};
1912
1913static unsigned int intel_mac_v2_pin_configs[10] = {
1914 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1915 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1916 0x400000fc, 0x400000fb,
6f0778d8
NB		 1917};
1918
5d5d3bc3
IZ		 1919static unsigned int intel_mac_v3_pin_configs[10] = {
1920 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1921 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1922 0x400000fc, 0x400000fb,
1923};
1924
5d5d3bc3
IZ		 1925static unsigned int intel_mac_v4_pin_configs[10] = {
1926 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1927 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1928 0x400000fc, 0x400000fb,
1929};
1930
5d5d3bc3
IZ		 1931static unsigned int intel_mac_v5_pin_configs[10] = {
1932 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1933 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1934 0x400000fc, 0x400000fb,
0dae0f83
TI		 1935};
1936
8c650087
MCC		 1937static unsigned int ecs202_pin_configs[10] = {
1938 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1939 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1940 0x9037012e, 0x40e000f2,
1941};
76c08828 1942
19039bd0 1943static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1944 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1945 [STAC_D945GTP3] = d945gtp3_pin_configs,
1946 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1947 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1948 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1949 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1950 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1951 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1952 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1953 /* for backward compatibility */
5d5d3bc3
IZ		 1954 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1955 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1956 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1957 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1958 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1959 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1960 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1961 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1962 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1963 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1964 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1965};
1966
f5fcc13c
TI		 1967static const char *stac922x_models[STAC_922X_MODELS] = {
1968 [STAC_D945_REF] = "ref",
1969 [STAC_D945GTP5] = "5stack",
1970 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1971 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1972 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1973 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1974 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1975 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1976 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1977 /* for backward compatibility */
f5fcc13c 1978 [STAC_MACMINI] = "macmini",
3fc24d85 1979 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1980 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1981 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1982 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1983 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1984 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1985 [STAC_922X_DELL_D81] = "dell-d81",
1986 [STAC_922X_DELL_D82] = "dell-d82",
1987 [STAC_922X_DELL_M81] = "dell-m81",
1988 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1989};
1990
1991static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1992 /* SigmaTel reference board */
1993 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1994 "DFI LanParty", STAC_D945_REF),
1995 /* Intel 945G based systems */
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1997 "Intel D945G", STAC_D945GTP3),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1999 "Intel D945G", STAC_D945GTP3),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2001 "Intel D945G", STAC_D945GTP3),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2003 "Intel D945G", STAC_D945GTP3),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2005 "Intel D945G", STAC_D945GTP3),
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2007 "Intel D945G", STAC_D945GTP3),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2009 "Intel D945G", STAC_D945GTP3),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2011 "Intel D945G", STAC_D945GTP3),
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2013 "Intel D945G", STAC_D945GTP3),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2015 "Intel D945G", STAC_D945GTP3),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2017 "Intel D945G", STAC_D945GTP3),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2019 "Intel D945G", STAC_D945GTP3),
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2021 "Intel D945G", STAC_D945GTP3),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2023 "Intel D945G", STAC_D945GTP3),
2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2025 "Intel D945G", STAC_D945GTP3),
2026 /* Intel D945G 5-stack systems */
2027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2028 "Intel D945G", STAC_D945GTP5),
2029 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2030 "Intel D945G", STAC_D945GTP5),
2031 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2032 "Intel D945G", STAC_D945GTP5),
2033 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2034 "Intel D945G", STAC_D945GTP5),
2035 /* Intel 945P based systems */
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2037 "Intel D945P", STAC_D945GTP3),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2039 "Intel D945P", STAC_D945GTP3),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2041 "Intel D945P", STAC_D945GTP3),
2042 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2043 "Intel D945P", STAC_D945GTP3),
2044 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2045 "Intel D945P", STAC_D945GTP3),
2046 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2047 "Intel D945P", STAC_D945GTP5),
2048 /* other systems */
536319af 2049 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2050 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2051 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2052 /* Dell systems */
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2054 "unknown Dell", STAC_922X_DELL_D81),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2056 "unknown Dell", STAC_922X_DELL_D81),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2058 "unknown Dell", STAC_922X_DELL_D81),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2060 "unknown Dell", STAC_922X_DELL_D82),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2062 "unknown Dell", STAC_922X_DELL_M81),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2064 "unknown Dell", STAC_922X_DELL_D82),
2065 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2066 "unknown Dell", STAC_922X_DELL_D81),
2067 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2068 "unknown Dell", STAC_922X_DELL_D81),
2069 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2070 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 2071 /* ECS/PC Chips boards */
2072 SND_PCI_QUIRK(0x1019, 0x2144,
2073 "ECS/PC chips", STAC_ECS_202),
2074 SND_PCI_QUIRK(0x1019, 0x2608,
2075 "ECS/PC chips", STAC_ECS_202),
2076 SND_PCI_QUIRK(0x1019, 0x2633,
2077 "ECS/PC chips P17G/1333", STAC_ECS_202),
2078 SND_PCI_QUIRK(0x1019, 0x2811,
2079 "ECS/PC chips", STAC_ECS_202),
2080 SND_PCI_QUIRK(0x1019, 0x2812,
2081 "ECS/PC chips", STAC_ECS_202),
2082 SND_PCI_QUIRK(0x1019, 0x2813,
2083 "ECS/PC chips", STAC_ECS_202),
2084 SND_PCI_QUIRK(0x1019, 0x2814,
2085 "ECS/PC chips", STAC_ECS_202),
2086 SND_PCI_QUIRK(0x1019, 0x2815,
2087 "ECS/PC chips", STAC_ECS_202),
2088 SND_PCI_QUIRK(0x1019, 0x2816,
2089 "ECS/PC chips", STAC_ECS_202),
2090 SND_PCI_QUIRK(0x1019, 0x2817,
2091 "ECS/PC chips", STAC_ECS_202),
2092 SND_PCI_QUIRK(0x1019, 0x2818,
2093 "ECS/PC chips", STAC_ECS_202),
2094 SND_PCI_QUIRK(0x1019, 0x2819,
2095 "ECS/PC chips", STAC_ECS_202),
2096 SND_PCI_QUIRK(0x1019, 0x2820,
2097 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2098 {} /* terminator */
2099};
2100
3cc08dc6 2101static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2102 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2103 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2104 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2105 0x01c42190, 0x40000100,
3cc08dc6
MP		 2106};
2107
93ed1503 2108static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2109 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2110 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2111 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2112 0x40000100, 0x40000100
2113};
2114
93ed1503
TD		 2115static unsigned int d965_5st_pin_configs[14] = {
2116 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2117 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2118 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2119 0x40000100, 0x40000100
2120};
2121
4ff076e5
TD		 2122static unsigned int dell_3st_pin_configs[14] = {
2123 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2124 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2125 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2126 0x40c003fc, 0x40000100
2127};
2128
93ed1503 2129static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2130 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2131 [STAC_D965_REF] = ref927x_pin_configs,
2132 [STAC_D965_3ST] = d965_3st_pin_configs,
2133 [STAC_D965_5ST] = d965_5st_pin_configs,
2134 [STAC_DELL_3ST] = dell_3st_pin_configs,
2135 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2136};
2137
f5fcc13c 2138static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2139 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2140 [STAC_D965_REF] = "ref",
2141 [STAC_D965_3ST] = "3stack",
2142 [STAC_D965_5ST] = "5stack",
2143 [STAC_DELL_3ST] = "dell-3stack",
2144 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2145};
2146
2147static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2148 /* SigmaTel reference board */
2149 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2150 "DFI LanParty", STAC_D965_REF),
81d3dbde 2151 /* Intel 946 based systems */
f5fcc13c
TI		 2152 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2153 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2154 /* 965 based 3 stack systems */
f5fcc13c
TI		 2155 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2157 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2158 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2159 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2160 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2161 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2163 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2164 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2165 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2166 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2167 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2168 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2169 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2170 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2171 /* Dell 3 stack systems */
8e9068b1 2172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2176 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2182 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2183 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2184 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2185 /* 965 based 5 stack systems */
f5fcc13c
TI		 2186 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2187 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2188 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2189 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2190 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2191 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2192 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2193 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2194 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2195 {} /* terminator */
2196};
2197
f3302a59
MP		 2198static unsigned int ref9205_pin_configs[12] = {
2199 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2200 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2201 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2202};
2203
dfe495d0
TI		 2204/*
2205 STAC 9205 pin configs for
2206 102801F1
2207 102801F2
2208 102801FC
2209 102801FD
2210 10280204
2211 1028021F
3fa2ef74 2212 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2213*/
2214static unsigned int dell_9205_m42_pin_configs[12] = {
2215 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2216 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2217 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2218};
2219
2220/*
2221 STAC 9205 pin configs for
2222 102801F9
2223 102801FA
2224 102801FE
2225 102801FF (Dell Precision M4300)
2226 10280206
2227 10280200
2228 10280201
2229*/
2230static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2231 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2232 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2233 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2234};
2235
dfe495d0 2236static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2237 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2238 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2239 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2240};
2241
f5fcc13c 2242static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2243 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2244 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2245 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2246 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2247 [STAC_9205_EAPD] = NULL,
f3302a59
MP		 2248};
2249
f5fcc13c
TI		 2250static const char *stac9205_models[STAC_9205_MODELS] = {
2251 [STAC_9205_REF] = "ref",
dfe495d0 2252 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2253 [STAC_9205_DELL_M43] = "dell-m43",
2254 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2255 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI		 2256};
2257
2258static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2259 /* SigmaTel reference board */
2260 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2261 "DFI LanParty", STAC_9205_REF),
d9a4268e 2262 /* Dell */
dfe495d0
TI		 2263 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2264 "unknown Dell", STAC_9205_DELL_M42),
2265 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2266 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2267 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2268 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2269 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2270 "Dell Precision", STAC_9205_DELL_M43),
2271 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2272 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2273 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2274 "unknown Dell", STAC_9205_DELL_M42),
2275 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2276 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2277 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2278 "Dell Precision", STAC_9205_DELL_M43),
2279 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2280 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2281 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2282 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2283 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2284 "Dell Precision", STAC_9205_DELL_M43),
2285 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2286 "Dell Precision", STAC_9205_DELL_M43),
2287 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2288 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2289 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2290 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2291 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2292 "Dell Vostro 1500", STAC_9205_DELL_M42),
d9a4268e
TI		 2293 /* Gateway */
2294 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP		 2295 {} /* terminator */
2296};
2297
11b44bbd
RF		 2298static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2299{
2300 int i;
2301 struct sigmatel_spec *spec = codec->spec;
2302
af9f341a
TI		 2303 kfree(spec->pin_configs);
2304 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2305 GFP_KERNEL);
2306 if (!spec->pin_configs)
2307 return -ENOMEM;
11b44bbd
RF		 2308
2309 for (i = 0; i < spec->num_pins; i++) {
2310 hda_nid_t nid = spec->pin_nids[i];
2311 unsigned int pin_cfg;
2312
2313 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2314 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2315 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2316 nid, pin_cfg);
af9f341a 2317 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF		 2318 }
2319
2320 return 0;
2321}
2322
87d48363
MR		 2323static void stac92xx_set_config_reg(struct hda_codec *codec,
2324 hda_nid_t pin_nid, unsigned int pin_config)
2325{
2326 int i;
2327 snd_hda_codec_write(codec, pin_nid, 0,
2328 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2329 pin_config & 0x000000ff);
2330 snd_hda_codec_write(codec, pin_nid, 0,
2331 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2332 (pin_config & 0x0000ff00) >> 8);
2333 snd_hda_codec_write(codec, pin_nid, 0,
2334 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2335 (pin_config & 0x00ff0000) >> 16);
2336 snd_hda_codec_write(codec, pin_nid, 0,
2337 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2338 pin_config >> 24);
2339 i = snd_hda_codec_read(codec, pin_nid, 0,
2340 AC_VERB_GET_CONFIG_DEFAULT,
2341 0x00);
2342 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2343 pin_nid, i);
2344}
2345
2f2f4251
M		 2346static void stac92xx_set_config_regs(struct hda_codec *codec)
2347{
2348 int i;
2349 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2350
87d48363
MR		 2351 if (!spec->pin_configs)
2352 return;
11b44bbd 2353
87d48363
MR		 2354 for (i = 0; i < spec->num_pins; i++)
2355 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2356 spec->pin_configs[i]);
2f2f4251 2357}
2f2f4251 2358
af9f341a
TI		 2359static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2360{
2361 struct sigmatel_spec *spec = codec->spec;
2362
2363 if (!pins)
2364 return stac92xx_save_bios_config_regs(codec);
2365
2366 kfree(spec->pin_configs);
2367 spec->pin_configs = kmemdup(pins,
2368 spec->num_pins * sizeof(*pins),
2369 GFP_KERNEL);
2370 if (!spec->pin_configs)
2371 return -ENOMEM;
2372
2373 stac92xx_set_config_regs(codec);
2374 return 0;
2375}
2376
2377static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2378 unsigned int cfg)
2379{
2380 struct sigmatel_spec *spec = codec->spec;
2381 int i;
2382
2383 for (i = 0; i < spec->num_pins; i++) {
2384 if (spec->pin_nids[i] == nid) {
2385 spec->pin_configs[i] = cfg;
2386 stac92xx_set_config_reg(codec, nid, cfg);
2387 break;
2388 }
2389 }
2390}
2391
dabbed6f 2392/*
c7d4b2fa 2393 * Analog playback callbacks
dabbed6f 2394 */
c7d4b2fa
M		 2395static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2396 struct hda_codec *codec,
c8b6bf9b 2397 struct snd_pcm_substream *substream)
2f2f4251 2398{
dabbed6f 2399 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2400 if (spec->stream_delay)
2401 msleep(spec->stream_delay);
9a08160b
TI		 2402 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2403 hinfo);
2f2f4251
M		 2404}
2405
2f2f4251
M		 2406static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2407 struct hda_codec *codec,
2408 unsigned int stream_tag,
2409 unsigned int format,
c8b6bf9b 2410 struct snd_pcm_substream *substream)
2f2f4251
M		 2411{
2412 struct sigmatel_spec *spec = codec->spec;
403d1944 2413 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2414}
2415
2416static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2417 struct hda_codec *codec,
c8b6bf9b 2418 struct snd_pcm_substream *substream)
2f2f4251
M		 2419{
2420 struct sigmatel_spec *spec = codec->spec;
2421 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2422}
2423
dabbed6f
M		 2424/*
2425 * Digital playback callbacks
2426 */
2427static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2428 struct hda_codec *codec,
c8b6bf9b 2429 struct snd_pcm_substream *substream)
dabbed6f
M		 2430{
2431 struct sigmatel_spec *spec = codec->spec;
2432 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2433}
2434
2435static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2436 struct hda_codec *codec,
c8b6bf9b 2437 struct snd_pcm_substream *substream)
dabbed6f
M		 2438{
2439 struct sigmatel_spec *spec = codec->spec;
2440 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2441}
2442
6b97eb45
TI		 2443static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2444 struct hda_codec *codec,
2445 unsigned int stream_tag,
2446 unsigned int format,
2447 struct snd_pcm_substream *substream)
2448{
2449 struct sigmatel_spec *spec = codec->spec;
2450 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2451 stream_tag, format, substream);
2452}
2453
dabbed6f 2454
2f2f4251
M		 2455/*
2456 * Analog capture callbacks
2457 */
2458static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2459 struct hda_codec *codec,
2460 unsigned int stream_tag,
2461 unsigned int format,
c8b6bf9b 2462 struct snd_pcm_substream *substream)
2f2f4251
M		 2463{
2464 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2465 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2466
8daaaa97
MR		 2467 if (spec->powerdown_adcs) {
2468 msleep(40);
8c2f767b 2469 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2470 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2471 }
2472 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2473 return 0;
2474}
2475
2476static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2477 struct hda_codec *codec,
c8b6bf9b 2478 struct snd_pcm_substream *substream)
2f2f4251
M		 2479{
2480 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2481 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2482
8daaaa97
MR		 2483 snd_hda_codec_cleanup_stream(codec, nid);
2484 if (spec->powerdown_adcs)
8c2f767b 2485 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2486 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2487 return 0;
2488}
2489
dabbed6f
M		 2490static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2491 .substreams = 1,
2492 .channels_min = 2,
2493 .channels_max = 2,
2494 /* NID is set in stac92xx_build_pcms */
2495 .ops = {
2496 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2497 .close = stac92xx_dig_playback_pcm_close,
2498 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2499 },
2500};
2501
2502static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2503 .substreams = 1,
2504 .channels_min = 2,
2505 .channels_max = 2,
2506 /* NID is set in stac92xx_build_pcms */
2507};
2508
2f2f4251
M		 2509static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2510 .substreams = 1,
2511 .channels_min = 2,
c7d4b2fa 2512 .channels_max = 8,
2f2f4251
M		 2513 .nid = 0x02, /* NID to query formats and rates */
2514 .ops = {
2515 .open = stac92xx_playback_pcm_open,
2516 .prepare = stac92xx_playback_pcm_prepare,
2517 .cleanup = stac92xx_playback_pcm_cleanup
2518 },
2519};
2520
3cc08dc6
MP		 2521static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2522 .substreams = 1,
2523 .channels_min = 2,
2524 .channels_max = 2,
2525 .nid = 0x06, /* NID to query formats and rates */
2526 .ops = {
2527 .open = stac92xx_playback_pcm_open,
2528 .prepare = stac92xx_playback_pcm_prepare,
2529 .cleanup = stac92xx_playback_pcm_cleanup
2530 },
2531};
2532
2f2f4251 2533static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2534 .channels_min = 2,
2535 .channels_max = 2,
9e05b7a3 2536 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2537 .ops = {
2538 .prepare = stac92xx_capture_pcm_prepare,
2539 .cleanup = stac92xx_capture_pcm_cleanup
2540 },
2541};
2542
2543static int stac92xx_build_pcms(struct hda_codec *codec)
2544{
2545 struct sigmatel_spec *spec = codec->spec;
2546 struct hda_pcm *info = spec->pcm_rec;
2547
2548 codec->num_pcms = 1;
2549 codec->pcm_info = info;
2550
c7d4b2fa 2551 info->name = "STAC92xx Analog";
2f2f4251 2552 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2553 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2554 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2555 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2556
2557 if (spec->alt_switch) {
2558 codec->num_pcms++;
2559 info++;
2560 info->name = "STAC92xx Analog Alt";
2561 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2562 }
2f2f4251 2563
dabbed6f
M		 2564 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2565 codec->num_pcms++;
2566 info++;
2567 info->name = "STAC92xx Digital";
8c441982 2568 info->pcm_type = spec->autocfg.dig_out_type;
dabbed6f
M		 2569 if (spec->multiout.dig_out_nid) {
2570 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2571 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2572 }
2573 if (spec->dig_in_nid) {
2574 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2575 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2576 }
2577 }
2578
2f2f4251
M		 2579 return 0;
2580}
2581
c960a03b
TI		 2582static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2583{
2584 unsigned int pincap = snd_hda_param_read(codec, nid,
2585 AC_PAR_PIN_CAP);
2586 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2587 if (pincap & AC_PINCAP_VREF_100)
2588 return AC_PINCTL_VREF_100;
2589 if (pincap & AC_PINCAP_VREF_80)
2590 return AC_PINCTL_VREF_80;
2591 if (pincap & AC_PINCAP_VREF_50)
2592 return AC_PINCTL_VREF_50;
2593 if (pincap & AC_PINCAP_VREF_GRD)
2594 return AC_PINCTL_VREF_GRD;
2595 return 0;
2596}
2597
403d1944
MP		 2598static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2599
2600{
82beb8fd
TI		 2601 snd_hda_codec_write_cache(codec, nid, 0,
2602 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2603}
2604
7c2ba97b
MR		 2605#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2606
2607static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2608 struct snd_ctl_elem_value *ucontrol)
2609{
2610 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2611 struct sigmatel_spec *spec = codec->spec;
2612
d7a89436 2613 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2614 return 0;
2615}
2616
c6e4c666
TI		 2617static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2618 unsigned char type);
2619
7c2ba97b
MR		 2620static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2621 struct snd_ctl_elem_value *ucontrol)
2622{
2623 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2624 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2625 int nid = kcontrol->private_value;
2626
2627 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2628
2629 /* check to be sure that the ports are upto date with
2630 * switch changes
2631 */
c6e4c666 2632 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR		 2633
2634 return 1;
2635}
2636
a5ce8890 2637#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2638
2639static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2640{
2641 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2642 struct sigmatel_spec *spec = codec->spec;
2643 int io_idx = kcontrol-> private_value & 0xff;
2644
2645 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2646 return 0;
2647}
2648
2649static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2650{
2651 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2652 struct sigmatel_spec *spec = codec->spec;
2653 hda_nid_t nid = kcontrol->private_value >> 8;
2654 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2655 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2656
2657 spec->io_switch[io_idx] = val;
2658
2659 if (val)
2660 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2661 else {
2662 unsigned int pinctl = AC_PINCTL_IN_EN;
2663 if (io_idx) /* set VREF for mic */
2664 pinctl |= stac92xx_get_vref(codec, nid);
2665 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2666 }
40c1d308
JZ		 2667
2668 /* check the auto-mute again: we need to mute/unmute the speaker
2669 * appropriately according to the pin direction
2670 */
2671 if (spec->hp_detect)
c6e4c666 2672 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2673
403d1944
MP		 2674 return 1;
2675}
2676
0fb87bb4
ML		 2677#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2678
2679static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2680 struct snd_ctl_elem_value *ucontrol)
2681{
2682 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2683 struct sigmatel_spec *spec = codec->spec;
2684
2685 ucontrol->value.integer.value[0] = spec->clfe_swap;
2686 return 0;
2687}
2688
2689static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2690 struct snd_ctl_elem_value *ucontrol)
2691{
2692 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2693 struct sigmatel_spec *spec = codec->spec;
2694 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2695 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2696
68ea7b2f 2697 if (spec->clfe_swap == val)
0fb87bb4
ML		 2698 return 0;
2699
68ea7b2f 2700 spec->clfe_swap = val;
0fb87bb4
ML		 2701
2702 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2703 spec->clfe_swap ? 0x4 : 0x0);
2704
2705 return 1;
2706}
2707
7c2ba97b
MR		 2708#define STAC_CODEC_HP_SWITCH(xname) \
2709 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2710 .name = xname, \
2711 .index = 0, \
2712 .info = stac92xx_hp_switch_info, \
2713 .get = stac92xx_hp_switch_get, \
2714 .put = stac92xx_hp_switch_put, \
2715 }
2716
403d1944
MP		 2717#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2718 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2719 .name = xname, \
2720 .index = 0, \
2721 .info = stac92xx_io_switch_info, \
2722 .get = stac92xx_io_switch_get, \
2723 .put = stac92xx_io_switch_put, \
2724 .private_value = xpval, \
2725 }
2726
0fb87bb4
ML		 2727#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2728 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2729 .name = xname, \
2730 .index = 0, \
2731 .info = stac92xx_clfe_switch_info, \
2732 .get = stac92xx_clfe_switch_get, \
2733 .put = stac92xx_clfe_switch_put, \
2734 .private_value = xpval, \
2735 }
403d1944 2736
c7d4b2fa
M		 2737enum {
2738 STAC_CTL_WIDGET_VOL,
2739 STAC_CTL_WIDGET_MUTE,
09a99959 2740 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2741 STAC_CTL_WIDGET_AMP_MUX,
2742 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2743 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2744 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2745 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2746};
2747
c8b6bf9b 2748static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2749 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2750 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2751 STAC_MONO_MUX,
89385035
MR		 2752 STAC_AMP_MUX,
2753 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2754 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2755 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2756 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2757};
2758
2759/* add dynamic controls */
4d4e9bb3
TI		 2760static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2761 struct snd_kcontrol_new *ktemp,
2762 int idx, const char *name,
2763 unsigned long val)
c7d4b2fa 2764{
c8b6bf9b 2765 struct snd_kcontrol_new *knew;
c7d4b2fa 2766
603c4019
TI		 2767 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2768 knew = snd_array_new(&spec->kctls);
2769 if (!knew)
2770 return -ENOMEM;
4d4e9bb3 2771 *knew = *ktemp;
4682eee0 2772 knew->index = idx;
82fe0c58 2773 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2774 if (!knew->name)
c7d4b2fa
M		 2775 return -ENOMEM;
2776 knew->private_value = val;
c7d4b2fa
M		 2777 return 0;
2778}
2779
4d4e9bb3
TI		 2780static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2781 int type, int idx, const char *name,
2782 unsigned long val)
2783{
2784 return stac92xx_add_control_temp(spec,
2785 &stac92xx_control_templates[type],
2786 idx, name, val);
2787}
2788
4682eee0
MR		 2789
2790/* add dynamic controls */
4d4e9bb3
TI		 2791static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2792 const char *name, unsigned long val)
4682eee0
MR		 2793{
2794 return stac92xx_add_control_idx(spec, type, 0, name, val);
2795}
2796
c21ca4a8
TI		 2797/* check whether the line-input can be used as line-out */
2798static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2799{
2800 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2801 struct auto_pin_cfg *cfg = &spec->autocfg;
2802 hda_nid_t nid;
2803 unsigned int pincap;
8e9068b1 2804
c21ca4a8
TI		 2805 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2806 return 0;
2807 nid = cfg->input_pins[AUTO_PIN_LINE];
2808 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2809 if (pincap & AC_PINCAP_OUT)
2810 return nid;
2811 return 0;
2812}
403d1944 2813
c21ca4a8
TI		 2814/* check whether the mic-input can be used as line-out */
2815static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2816{
2817 struct sigmatel_spec *spec = codec->spec;
2818 struct auto_pin_cfg *cfg = &spec->autocfg;
2819 unsigned int def_conf, pincap;
2820 unsigned int mic_pin;
2821
2822 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2823 return 0;
2824 mic_pin = AUTO_PIN_MIC;
2825 for (;;) {
2826 hda_nid_t nid = cfg->input_pins[mic_pin];
2827 def_conf = snd_hda_codec_read(codec, nid, 0,
2828 AC_VERB_GET_CONFIG_DEFAULT, 0);
2829 /* some laptops have an internal analog microphone
2830 * which can't be used as a output */
2831 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2832 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2833 if (pincap & AC_PINCAP_OUT)
2834 return nid;
403d1944 2835 }
c21ca4a8
TI		 2836 if (mic_pin == AUTO_PIN_MIC)
2837 mic_pin = AUTO_PIN_FRONT_MIC;
2838 else
2839 break;
403d1944 2840 }
403d1944
MP		 2841 return 0;
2842}
2843
7b043899
SL		 2844static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2845{
2846 int i;
2847
2848 for (i = 0; i < spec->multiout.num_dacs; i++) {
2849 if (spec->multiout.dac_nids[i] == nid)
2850 return 1;
2851 }
2852
2853 return 0;
2854}
2855
c21ca4a8
TI		 2856static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2857{
2858 int i;
2859 if (is_in_dac_nids(spec, nid))
2860 return 1;
2861 for (i = 0; i < spec->autocfg.hp_outs; i++)
2862 if (spec->hp_dacs[i] == nid)
2863 return 1;
2864 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2865 if (spec->speaker_dacs[i] == nid)
2866 return 1;
2867 return 0;
2868}
2869
2870static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2871{
2872 struct sigmatel_spec *spec = codec->spec;
2873 int j, conn_len;
2874 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2875 unsigned int wcaps, wtype;
2876
2877 conn_len = snd_hda_get_connections(codec, nid, conn,
2878 HDA_MAX_CONNECTIONS);
2879 for (j = 0; j < conn_len; j++) {
2880 wcaps = snd_hda_param_read(codec, conn[j],
2881 AC_PAR_AUDIO_WIDGET_CAP);
2882 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2883 /* we check only analog outputs */
2884 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2885 continue;
2886 /* if this route has a free DAC, assign it */
2887 if (!check_all_dac_nids(spec, conn[j])) {
2888 if (conn_len > 1) {
2889 /* select this DAC in the pin's input mux */
2890 snd_hda_codec_write_cache(codec, nid, 0,
2891 AC_VERB_SET_CONNECT_SEL, j);
2892 }
2893 return conn[j];
2894 }
2895 }
2896 return 0;
2897}
2898
2899static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2900static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2901
3cc08dc6 2902/*
7b043899
SL		 2903 * Fill in the dac_nids table from the parsed pin configuration
2904 * This function only works when every pin in line_out_pins[]
2905 * contains atleast one DAC in its connection list. Some 92xx
2906 * codecs are not connected directly to a DAC, such as the 9200
2907 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2908 */
c21ca4a8 2909static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 2910{
2911 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2912 struct auto_pin_cfg *cfg = &spec->autocfg;
2913 int i;
2914 hda_nid_t nid, dac;
7b043899 2915
c7d4b2fa
M		 2916 for (i = 0; i < cfg->line_outs; i++) {
2917 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 2918 dac = get_unassigned_dac(codec, nid);
2919 if (!dac) {
df802952
TI		 2920 if (spec->multiout.num_dacs > 0) {
2921 /* we have already working output pins,
2922 * so let's drop the broken ones again
2923 */
2924 cfg->line_outs = spec->multiout.num_dacs;
2925 break;
2926 }
7b043899
SL		 2927 /* error out, no available DAC found */
2928 snd_printk(KERN_ERR
2929 "%s: No available DAC for pin 0x%x\n",
2930 __func__, nid);
2931 return -ENODEV;
2932 }
c21ca4a8
TI		 2933 add_spec_dacs(spec, dac);
2934 }
7b043899 2935
c21ca4a8
TI		 2936 /* add line-in as output */
2937 nid = check_line_out_switch(codec);
2938 if (nid) {
2939 dac = get_unassigned_dac(codec, nid);
2940 if (dac) {
2941 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2942 nid, cfg->line_outs);
2943 cfg->line_out_pins[cfg->line_outs] = nid;
2944 cfg->line_outs++;
2945 spec->line_switch = nid;
2946 add_spec_dacs(spec, dac);
2947 }
2948 }
2949 /* add mic as output */
2950 nid = check_mic_out_switch(codec);
2951 if (nid) {
2952 dac = get_unassigned_dac(codec, nid);
2953 if (dac) {
2954 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2955 nid, cfg->line_outs);
2956 cfg->line_out_pins[cfg->line_outs] = nid;
2957 cfg->line_outs++;
2958 spec->mic_switch = nid;
2959 add_spec_dacs(spec, dac);
2960 }
2961 }
c7d4b2fa 2962
c21ca4a8
TI		 2963 for (i = 0; i < cfg->hp_outs; i++) {
2964 nid = cfg->hp_pins[i];
2965 dac = get_unassigned_dac(codec, nid);
2966 if (dac) {
2967 if (!spec->multiout.hp_nid)
2968 spec->multiout.hp_nid = dac;
2969 else
2970 add_spec_extra_dacs(spec, dac);
7b043899 2971 }
c21ca4a8
TI		 2972 spec->hp_dacs[i] = dac;
2973 }
2974
2975 for (i = 0; i < cfg->speaker_outs; i++) {
2976 nid = cfg->speaker_pins[i];
2977 dac = get_unassigned_dac(codec, nid);
2978 if (dac)
2979 add_spec_extra_dacs(spec, dac);
2980 spec->speaker_dacs[i] = dac;
7b043899 2981 }
c7d4b2fa 2982
c21ca4a8 2983 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 2984 spec->multiout.num_dacs,
2985 spec->multiout.dac_nids[0],
2986 spec->multiout.dac_nids[1],
2987 spec->multiout.dac_nids[2],
2988 spec->multiout.dac_nids[3],
2989 spec->multiout.dac_nids[4]);
c21ca4a8 2990
c7d4b2fa
M		 2991 return 0;
2992}
2993
eb06ed8f 2994/* create volume control/switch for the given prefx type */
7c7767eb
TI		 2995static int create_controls(struct hda_codec *codec, const char *pfx,
2996 hda_nid_t nid, int chs)
eb06ed8f 2997{
7c7767eb 2998 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI		 2999 char name[32];
3000 int err;
3001
7c7767eb
TI		 3002 if (!spec->check_volume_offset) {
3003 unsigned int caps, step, nums, db_scale;
3004 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3005 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3006 AC_AMPCAP_STEP_SIZE_SHIFT;
3007 step = (step + 1) * 25; /* in .01dB unit */
3008 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3009 AC_AMPCAP_NUM_STEPS_SHIFT;
3010 db_scale = nums * step;
3011 /* if dB scale is over -64dB, and finer enough,
3012 * let's reduce it to half
3013 */
3014 if (db_scale > 6400 && nums >= 0x1f)
3015 spec->volume_offset = nums / 2;
3016 spec->check_volume_offset = 1;
3017 }
3018
eb06ed8f
TI		 3019 sprintf(name, "%s Playback Volume", pfx);
3020 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
7c7767eb
TI		 3021 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3022 spec->volume_offset));
eb06ed8f
TI		 3023 if (err < 0)
3024 return err;
3025 sprintf(name, "%s Playback Switch", pfx);
3026 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
3027 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3028 if (err < 0)
3029 return err;
3030 return 0;
3031}
3032
ae0afd81
MR		 3033static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3034{
c21ca4a8 3035 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3036 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3037 return 1;
3038 } else {
3039 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3040 spec->multiout.num_dacs++;
3041 }
3042 return 0;
3043}
3044
c21ca4a8 3045static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3046{
c21ca4a8
TI		 3047 int i;
3048 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3049 if (!spec->multiout.extra_out_nid[i]) {
3050 spec->multiout.extra_out_nid[i] = nid;
3051 return 0;
3052 }
3053 }
3054 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3055 return 1;
ae0afd81
MR		 3056}
3057
76624534
TI		 3058static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid)
3059{
3060 int i;
3061
3062 if (spec->autocfg.line_outs != 1)
3063 return 0;
3064 if (spec->multiout.hp_nid == nid)
3065 return 0;
3066 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++)
3067 if (spec->multiout.extra_out_nid[i] == nid)
3068 return 0;
3069 return 1;
3070}
3071
c7d4b2fa 3072/* add playback controls from the parsed DAC table */
0fb87bb4 3073static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 3074 const struct auto_pin_cfg *cfg)
c7d4b2fa 3075{
76624534 3076 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI		 3077 static const char *chname[4] = {
3078 "Front", "Surround", NULL /*CLFE*/, "Side"
3079 };
d21995e3 3080 hda_nid_t nid = 0;
91589232
TI		 3081 int i, err;
3082 unsigned int wid_caps;
0fb87bb4 3083
c21ca4a8 3084 for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
c7d4b2fa 3085 nid = spec->multiout.dac_nids[i];
c7d4b2fa
M		 3086 if (i == 2) {
3087 /* Center/LFE */
7c7767eb 3088 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3089 if (err < 0)
c7d4b2fa 3090 return err;
7c7767eb 3091 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3092 if (err < 0)
c7d4b2fa 3093 return err;
0fb87bb4
ML		 3094
3095 wid_caps = get_wcaps(codec, nid);
3096
3097 if (wid_caps & AC_WCAP_LR_SWAP) {
3098 err = stac92xx_add_control(spec,
3099 STAC_CTL_WIDGET_CLFE_SWITCH,
3100 "Swap Center/LFE Playback Switch", nid);
3101
3102 if (err < 0)
3103 return err;
3104 }
3105
c7d4b2fa 3106 } else {
76624534
TI		 3107 const char *name = chname[i];
3108 /* if it's a single DAC, assign a better name */
3109 if (!i && is_unique_dac(spec, nid)) {
3110 switch (cfg->line_out_type) {
3111 case AUTO_PIN_HP_OUT:
3112 name = "Headphone";
3113 break;
3114 case AUTO_PIN_SPEAKER_OUT:
3115 name = "Speaker";
3116 break;
3117 }
3118 }
7c7767eb 3119 err = create_controls(codec, name, nid, 3);
eb06ed8f 3120 if (err < 0)
c7d4b2fa
M		 3121 return err;
3122 }
3123 }
3124
a9cb5c90 3125 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3126 err = stac92xx_add_control(spec,
3127 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3128 "Headphone as Line Out Switch",
3129 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3130 if (err < 0)
3131 return err;
3132 }
3133
b5895dc8 3134 if (spec->line_switch) {
c21ca4a8
TI		 3135 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3136 "Line In as Output Switch",
3137 spec->line_switch << 8);
3138 if (err < 0)
3139 return err;
b5895dc8 3140 }
403d1944 3141
b5895dc8 3142 if (spec->mic_switch) {
c21ca4a8
TI		 3143 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3144 "Mic as Output Switch",
3145 (spec->mic_switch << 8) | 1);
3146 if (err < 0)
3147 return err;
b5895dc8 3148 }
403d1944 3149
c7d4b2fa
M		 3150 return 0;
3151}
3152
eb06ed8f
TI		 3153/* add playback controls for Speaker and HP outputs */
3154static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3155 struct auto_pin_cfg *cfg)
3156{
3157 struct sigmatel_spec *spec = codec->spec;
3158 hda_nid_t nid;
c21ca4a8 3159 int i, err, nums;
eb06ed8f 3160
c21ca4a8 3161 nums = 0;
eb06ed8f 3162 for (i = 0; i < cfg->hp_outs; i++) {
c21ca4a8
TI		 3163 static const char *pfxs[] = {
3164 "Headphone", "Headphone2", "Headphone3",
3165 };
eb06ed8f
TI		 3166 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3167 if (wid_caps & AC_WCAP_UNSOL_CAP)
3168 spec->hp_detect = 1;
c21ca4a8 3169 if (nums >= ARRAY_SIZE(pfxs))
c7d4b2fa 3170 continue;
c21ca4a8
TI		 3171 nid = spec->hp_dacs[i];
3172 if (!nid)
eb06ed8f 3173 continue;
7c7767eb 3174 err = create_controls(codec, pfxs[nums++], nid, 3);
c21ca4a8
TI		 3175 if (err < 0)
3176 return err;
1b290a51 3177 }
c21ca4a8
TI		 3178 nums = 0;
3179 for (i = 0; i < cfg->speaker_outs; i++) {
eb06ed8f
TI		 3180 static const char *pfxs[] = {
3181 "Speaker", "External Speaker", "Speaker2",
3182 };
c21ca4a8
TI		 3183 if (nums >= ARRAY_SIZE(pfxs))
3184 continue;
3185 nid = spec->speaker_dacs[i];
3186 if (!nid)
3187 continue;
7c7767eb 3188 err = create_controls(codec, pfxs[nums++], nid, 3);
eb06ed8f
TI		 3189 if (err < 0)
3190 return err;
3191 }
c7d4b2fa
M		 3192 return 0;
3193}
3194
b22b4821 3195/* labels for mono mux outputs */
d0513fc6
MR		 3196static const char *stac92xx_mono_labels[4] = {
3197 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3198};
3199
3200/* create mono mux for mono out on capable codecs */
3201static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3202{
3203 struct sigmatel_spec *spec = codec->spec;
3204 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3205 int i, num_cons;
3206 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3207
3208 num_cons = snd_hda_get_connections(codec,
3209 spec->mono_nid,
3210 con_lst,
3211 HDA_MAX_NUM_INPUTS);
3212 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3213 return -EINVAL;
3214
3215 for (i = 0; i < num_cons; i++) {
3216 mono_mux->items[mono_mux->num_items].label =
3217 stac92xx_mono_labels[i];
3218 mono_mux->items[mono_mux->num_items].index = i;
3219 mono_mux->num_items++;
3220 }
09a99959
MR		 3221
3222 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3223 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3224}
3225
89385035
MR		 3226/* labels for amp mux outputs */
3227static const char *stac92xx_amp_labels[3] = {
4b33c767 3228 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3229};
3230
3231/* create amp out controls mux on capable codecs */
3232static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3233{
3234 struct sigmatel_spec *spec = codec->spec;
3235 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3236 int i, err;
3237
2a9c7816 3238 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3239 amp_mux->items[amp_mux->num_items].label =
3240 stac92xx_amp_labels[i];
3241 amp_mux->items[amp_mux->num_items].index = i;
3242 amp_mux->num_items++;
3243 }
3244
2a9c7816
MR		 3245 if (spec->num_amps > 1) {
3246 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3247 "Amp Selector Capture Switch", 0);
3248 if (err < 0)
3249 return err;
3250 }
89385035
MR		 3251 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3252 "Amp Capture Volume",
3253 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3254}
3255
3256
1cd2224c
MR		 3257/* create PC beep volume controls */
3258static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3259 hda_nid_t nid)
3260{
3261 struct sigmatel_spec *spec = codec->spec;
3262 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3263 int err;
3264
3265 /* check for mute support for the the amp */
3266 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3267 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3268 "PC Beep Playback Switch",
3269 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3270 if (err < 0)
3271 return err;
3272 }
3273
3274 /* check to see if there is volume support for the amp */
3275 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3276 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3277 "PC Beep Playback Volume",
3278 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3279 if (err < 0)
3280 return err;
3281 }
3282 return 0;
3283}
3284
4d4e9bb3
TI		 3285#ifdef CONFIG_SND_HDA_INPUT_BEEP
3286#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3287
3288static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3289 struct snd_ctl_elem_value *ucontrol)
3290{
3291 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3292 ucontrol->value.integer.value[0] = codec->beep->enabled;
3293 return 0;
3294}
3295
3296static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3297 struct snd_ctl_elem_value *ucontrol)
3298{
3299 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3300 int enabled = !!ucontrol->value.integer.value[0];
3301 if (codec->beep->enabled != enabled) {
3302 codec->beep->enabled = enabled;
3303 return 1;
3304 }
3305 return 0;
3306}
3307
3308static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3309 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3310 .info = stac92xx_dig_beep_switch_info,
3311 .get = stac92xx_dig_beep_switch_get,
3312 .put = stac92xx_dig_beep_switch_put,
3313};
3314
3315static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3316{
3317 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3318 0, "PC Beep Playback Switch", 0);
3319}
3320#endif
3321
4682eee0
MR		 3322static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3323{
3324 struct sigmatel_spec *spec = codec->spec;
3325 int wcaps, nid, i, err = 0;
3326
3327 for (i = 0; i < spec->num_muxes; i++) {
3328 nid = spec->mux_nids[i];
3329 wcaps = get_wcaps(codec, nid);
3330
3331 if (wcaps & AC_WCAP_OUT_AMP) {
3332 err = stac92xx_add_control_idx(spec,
3333 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3334 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3335 if (err < 0)
3336 return err;
3337 }
3338 }
3339 return 0;
3340};
3341
d9737751 3342static const char *stac92xx_spdif_labels[3] = {
65973632 3343 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3344};
3345
3346static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3347{
3348 struct sigmatel_spec *spec = codec->spec;
3349 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3350 const char **labels = spec->spdif_labels;
d9737751 3351 int i, num_cons;
65973632 3352 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3353
3354 num_cons = snd_hda_get_connections(codec,
3355 spec->smux_nids[0],
3356 con_lst,
3357 HDA_MAX_NUM_INPUTS);
65973632 3358 if (!num_cons)
d9737751
MR		 3359 return -EINVAL;
3360
65973632
MR		 3361 if (!labels)
3362 labels = stac92xx_spdif_labels;
3363
d9737751 3364 for (i = 0; i < num_cons; i++) {
65973632 3365 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3366 spdif_mux->items[spdif_mux->num_items].index = i;
3367 spdif_mux->num_items++;
3368 }
3369
3370 return 0;
3371}
3372
8b65727b 3373/* labels for dmic mux inputs */
ddc2cec4 3374static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3375 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3376 "Digital Mic 3", "Digital Mic 4"
3377};
3378
3379/* create playback/capture controls for input pins on dmic capable codecs */
3380static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3381 const struct auto_pin_cfg *cfg)
3382{
3383 struct sigmatel_spec *spec = codec->spec;
3384 struct hda_input_mux *dimux = &spec->private_dimux;
3385 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3386 int err, i, j;
3387 char name[32];
8b65727b
MP		 3388
3389 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3390 dimux->items[dimux->num_items].index = 0;
3391 dimux->num_items++;
3392
3393 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3394 hda_nid_t nid;
8b65727b
MP		 3395 int index;
3396 int num_cons;
0678accd 3397 unsigned int wcaps;
8b65727b
MP		 3398 unsigned int def_conf;
3399
3400 def_conf = snd_hda_codec_read(codec,
3401 spec->dmic_nids[i],
3402 0,
3403 AC_VERB_GET_CONFIG_DEFAULT,
3404 0);
3405 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3406 continue;
3407
0678accd 3408 nid = spec->dmic_nids[i];
8b65727b 3409 num_cons = snd_hda_get_connections(codec,
e1f0d669 3410 spec->dmux_nids[0],
8b65727b
MP		 3411 con_lst,
3412 HDA_MAX_NUM_INPUTS);
3413 for (j = 0; j < num_cons; j++)
0678accd 3414 if (con_lst[j] == nid) {
8b65727b
MP		 3415 index = j;
3416 goto found;
3417 }
3418 continue;
3419found:
d0513fc6
MR		 3420 wcaps = get_wcaps(codec, nid) &
3421 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3422
d0513fc6 3423 if (wcaps) {
0678accd
MR		 3424 sprintf(name, "%s Capture Volume",
3425 stac92xx_dmic_labels[dimux->num_items]);
3426
3427 err = stac92xx_add_control(spec,
3428 STAC_CTL_WIDGET_VOL,
3429 name,
d0513fc6
MR		 3430 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3431 (wcaps & AC_WCAP_OUT_AMP) ?
3432 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3433 if (err < 0)
3434 return err;
3435 }
3436
8b65727b
MP		 3437 dimux->items[dimux->num_items].label =
3438 stac92xx_dmic_labels[dimux->num_items];
3439 dimux->items[dimux->num_items].index = index;
3440 dimux->num_items++;
3441 }
3442
3443 return 0;
3444}
3445
c7d4b2fa
M		 3446/* create playback/capture controls for input pins */
3447static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3448{
3449 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3450 struct hda_input_mux *imux = &spec->private_imux;
3451 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3452 int i, j, k;
3453
3454 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3455 int index;
3456
3457 if (!cfg->input_pins[i])
3458 continue;
3459 index = -1;
3460 for (j = 0; j < spec->num_muxes; j++) {
3461 int num_cons;
3462 num_cons = snd_hda_get_connections(codec,
3463 spec->mux_nids[j],
3464 con_lst,
3465 HDA_MAX_NUM_INPUTS);
3466 for (k = 0; k < num_cons; k++)
3467 if (con_lst[k] == cfg->input_pins[i]) {
3468 index = k;
3469 goto found;
3470 }
c7d4b2fa 3471 }
314634bc
TI		 3472 continue;
3473 found:
3474 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3475 imux->items[imux->num_items].index = index;
3476 imux->num_items++;
c7d4b2fa
M		 3477 }
3478
7b043899 3479 if (imux->num_items) {
62fe78e9
SR		 3480 /*
3481 * Set the current input for the muxes.
3482 * The STAC9221 has two input muxes with identical source
3483 * NID lists. Hopefully this won't get confused.
3484 */
3485 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3486 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3487 AC_VERB_SET_CONNECT_SEL,
3488 imux->items[0].index);
62fe78e9
SR		 3489 }
3490 }
3491
c7d4b2fa
M		 3492 return 0;
3493}
3494
c7d4b2fa
M		 3495static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3496{
3497 struct sigmatel_spec *spec = codec->spec;
3498 int i;
3499
3500 for (i = 0; i < spec->autocfg.line_outs; i++) {
3501 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3502 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3503 }
3504}
3505
3506static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3507{
3508 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3509 int i;
c7d4b2fa 3510
eb06ed8f
TI		 3511 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3512 hda_nid_t pin;
3513 pin = spec->autocfg.hp_pins[i];
3514 if (pin) /* connect to front */
3515 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3516 }
3517 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3518 hda_nid_t pin;
3519 pin = spec->autocfg.speaker_pins[i];
3520 if (pin) /* connect to front */
3521 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3522 }
c7d4b2fa
M		 3523}
3524
3cc08dc6 3525static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3526{
3527 struct sigmatel_spec *spec = codec->spec;
3528 int err;
3529
8b65727b
MP		 3530 if ((err = snd_hda_parse_pin_def_config(codec,
3531 &spec->autocfg,
3532 spec->dmic_nids)) < 0)
c7d4b2fa 3533 return err;
82bc955f 3534 if (! spec->autocfg.line_outs)
869264c4 3535 return 0; /* can't find valid pin config */
19039bd0 3536
bcecd9bd
JZ		 3537 /* If we have no real line-out pin and multiple hp-outs, HPs should
3538 * be set up as multi-channel outputs.
3539 */
3540 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3541 spec->autocfg.hp_outs > 1) {
3542 /* Copy hp_outs to line_outs, backup line_outs in
3543 * speaker_outs so that the following routines can handle
3544 * HP pins as primary outputs.
3545 */
c21ca4a8 3546 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3547 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3548 sizeof(spec->autocfg.line_out_pins));
3549 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3550 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3551 sizeof(spec->autocfg.hp_pins));
3552 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3553 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3554 spec->autocfg.hp_outs = 0;
bcecd9bd 3555 }
09a99959 3556 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3557 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3558 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3559 u32 caps = query_amp_caps(codec,
3560 spec->autocfg.mono_out_pin, dir);
3561 hda_nid_t conn_list[1];
3562
3563 /* get the mixer node and then the mono mux if it exists */
3564 if (snd_hda_get_connections(codec,
3565 spec->autocfg.mono_out_pin, conn_list, 1) &&
3566 snd_hda_get_connections(codec, conn_list[0],
3567 conn_list, 1)) {
3568
3569 int wcaps = get_wcaps(codec, conn_list[0]);
3570 int wid_type = (wcaps & AC_WCAP_TYPE)
3571 >> AC_WCAP_TYPE_SHIFT;
3572 /* LR swap check, some stac925x have a mux that
3573 * changes the DACs output path instead of the
3574 * mono-mux path.
3575 */
3576 if (wid_type == AC_WID_AUD_SEL &&
3577 !(wcaps & AC_WCAP_LR_SWAP))
3578 spec->mono_nid = conn_list[0];
3579 }
d0513fc6
MR		 3580 if (dir) {
3581 hda_nid_t nid = spec->autocfg.mono_out_pin;
3582
3583 /* most mono outs have a least a mute/unmute switch */
3584 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3585 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3586 "Mono Playback Switch",
3587 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3588 if (err < 0)
3589 return err;
d0513fc6
MR		 3590 /* check for volume support for the amp */
3591 if ((caps & AC_AMPCAP_NUM_STEPS)
3592 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3593 err = stac92xx_add_control(spec,
3594 STAC_CTL_WIDGET_VOL,
3595 "Mono Playback Volume",
3596 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3597 if (err < 0)
3598 return err;
3599 }
09a99959
MR		 3600 }
3601
3602 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3603 AC_PINCTL_OUT_EN);
3604 }
bcecd9bd 3605
c21ca4a8
TI		 3606 if (!spec->multiout.num_dacs) {
3607 err = stac92xx_auto_fill_dac_nids(codec);
3608 if (err < 0)
19039bd0 3609 return err;
c9280d68
TI		 3610 err = stac92xx_auto_create_multi_out_ctls(codec,
3611 &spec->autocfg);
3612 if (err < 0)
3613 return err;
c21ca4a8 3614 }
c7d4b2fa 3615
1cd2224c
MR		 3616 /* setup analog beep controls */
3617 if (spec->anabeep_nid > 0) {
3618 err = stac92xx_auto_create_beep_ctls(codec,
3619 spec->anabeep_nid);
3620 if (err < 0)
3621 return err;
3622 }
3623
3624 /* setup digital beep controls and input device */
3625#ifdef CONFIG_SND_HDA_INPUT_BEEP
3626 if (spec->digbeep_nid > 0) {
3627 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3628 unsigned int caps;
1cd2224c
MR		 3629
3630 err = stac92xx_auto_create_beep_ctls(codec, nid);
3631 if (err < 0)
3632 return err;
3633 err = snd_hda_attach_beep_device(codec, nid);
3634 if (err < 0)
3635 return err;
4d4e9bb3
TI		 3636 /* if no beep switch is available, make its own one */
3637 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3638 if (codec->beep &&
3639 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3640 err = stac92xx_beep_switch_ctl(codec);
3641 if (err < 0)
3642 return err;
3643 }
1cd2224c
MR		 3644 }
3645#endif
3646
0fb87bb4
ML		 3647 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3648
3649 if (err < 0)
3650 return err;
3651
3652 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3653
3654 if (err < 0)
c7d4b2fa
M		 3655 return err;
3656
b22b4821
MR		 3657 if (spec->mono_nid > 0) {
3658 err = stac92xx_auto_create_mono_output_ctls(codec);
3659 if (err < 0)
3660 return err;
3661 }
2a9c7816 3662 if (spec->num_amps > 0) {
89385035
MR		 3663 err = stac92xx_auto_create_amp_output_ctls(codec);
3664 if (err < 0)
3665 return err;
3666 }
2a9c7816 3667 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3668 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3669 &spec->autocfg)) < 0)
3670 return err;
4682eee0
MR		 3671 if (spec->num_muxes > 0) {
3672 err = stac92xx_auto_create_mux_input_ctls(codec);
3673 if (err < 0)
3674 return err;
3675 }
d9737751
MR		 3676 if (spec->num_smuxes > 0) {
3677 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3678 if (err < 0)
3679 return err;
3680 }
8b65727b 3681
c7d4b2fa 3682 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3683 if (spec->multiout.max_channels > 2)
c7d4b2fa 3684 spec->surr_switch = 1;
c7d4b2fa 3685
82bc955f 3686 if (spec->autocfg.dig_out_pin)
3cc08dc6 3687 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3688 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3689 spec->dig_in_nid = dig_in;
c7d4b2fa 3690
603c4019
TI		 3691 if (spec->kctls.list)
3692 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3693
3694 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3695 if (!spec->dinput_mux)
3696 spec->dinput_mux = &spec->private_dimux;
d9737751 3697 spec->sinput_mux = &spec->private_smux;
b22b4821 3698 spec->mono_mux = &spec->private_mono_mux;
89385035 3699 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3700 return 1;
3701}
3702
82bc955f
TI		 3703/* add playback controls for HP output */
3704static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3705 struct auto_pin_cfg *cfg)
3706{
3707 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3708 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3709 unsigned int wid_caps;
3710
3711 if (! pin)
3712 return 0;
3713
3714 wid_caps = get_wcaps(codec, pin);
505cb341 3715 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3716 spec->hp_detect = 1;
82bc955f
TI		 3717
3718 return 0;
3719}
3720
160ea0dc
RF		 3721/* add playback controls for LFE output */
3722static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3723 struct auto_pin_cfg *cfg)
3724{
3725 struct sigmatel_spec *spec = codec->spec;
3726 int err;
3727 hda_nid_t lfe_pin = 0x0;
3728 int i;
3729
3730 /*
3731 * search speaker outs and line outs for a mono speaker pin
3732 * with an amp. If one is found, add LFE controls
3733 * for it.
3734 */
3735 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3736 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3737 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3738 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3739 if (wcaps == AC_WCAP_OUT_AMP)
3740 /* found a mono speaker with an amp, must be lfe */
3741 lfe_pin = pin;
3742 }
3743
3744 /* if speaker_outs is 0, then speakers may be in line_outs */
3745 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3746 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3747 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3748 unsigned int defcfg;
8b551785 3749 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3750 AC_VERB_GET_CONFIG_DEFAULT,
3751 0x00);
8b551785 3752 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3753 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3754 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3755 if (wcaps == AC_WCAP_OUT_AMP)
3756 /* found a mono speaker with an amp,
3757 must be lfe */
3758 lfe_pin = pin;
3759 }
3760 }
3761 }
3762
3763 if (lfe_pin) {
7c7767eb 3764 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3765 if (err < 0)
3766 return err;
3767 }
3768
3769 return 0;
3770}
3771
c7d4b2fa
M		 3772static int stac9200_parse_auto_config(struct hda_codec *codec)
3773{
3774 struct sigmatel_spec *spec = codec->spec;
3775 int err;
3776
df694daa 3777 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3778 return err;
3779
3780 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3781 return err;
3782
82bc955f
TI		 3783 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3784 return err;
3785
160ea0dc
RF		 3786 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3787 return err;
3788
355a0ec4
TI		 3789 if (spec->num_muxes > 0) {
3790 err = stac92xx_auto_create_mux_input_ctls(codec);
3791 if (err < 0)
3792 return err;
3793 }
3794
82bc955f 3795 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3796 spec->multiout.dig_out_nid = 0x05;
82bc955f 3797 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3798 spec->dig_in_nid = 0x04;
c7d4b2fa 3799
603c4019
TI		 3800 if (spec->kctls.list)
3801 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3802
3803 spec->input_mux = &spec->private_imux;
8b65727b 3804 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3805
3806 return 1;
3807}
3808
62fe78e9
SR		 3809/*
3810 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3811 * funky external mute control using GPIO pins.
3812 */
3813
76e1ddfb 3814static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3815 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3816{
3817 unsigned int gpiostate, gpiomask, gpiodir;
3818
3819 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3820 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3821 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3822
3823 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3824 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3825 gpiomask |= mask;
62fe78e9
SR		 3826
3827 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3828 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3829 gpiodir |= dir_mask;
62fe78e9 3830
76e1ddfb 3831 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3832 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3833
3834 snd_hda_codec_write(codec, codec->afg, 0,
3835 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3836 snd_hda_codec_read(codec, codec->afg, 0,
3837 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3838
3839 msleep(1);
3840
76e1ddfb
TI		 3841 snd_hda_codec_read(codec, codec->afg, 0,
3842 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3843}
3844
74aeaabc
MR		 3845static int stac92xx_add_jack(struct hda_codec *codec,
3846 hda_nid_t nid, int type)
3847{
e4973e1e 3848#ifdef CONFIG_SND_JACK
74aeaabc
MR		 3849 struct sigmatel_spec *spec = codec->spec;
3850 struct sigmatel_jack *jack;
3851 int def_conf = snd_hda_codec_read(codec, nid,
3852 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3853 int connectivity = get_defcfg_connect(def_conf);
3854 char name[32];
3855
3856 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3857 return 0;
3858
3859 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3860 jack = snd_array_new(&spec->jacks);
3861 if (!jack)
3862 return -ENOMEM;
3863 jack->nid = nid;
3864 jack->type = type;
3865
3866 sprintf(name, "%s at %s %s Jack",
3867 snd_hda_get_jack_type(def_conf),
3868 snd_hda_get_jack_connectivity(def_conf),
3869 snd_hda_get_jack_location(def_conf));
3870
3871 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI		 3872#else
3873 return 0;
3874#endif
74aeaabc
MR		 3875}
3876
c6e4c666
TI		 3877static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3878 unsigned char type, int data)
74aeaabc
MR		 3879{
3880 struct sigmatel_event *event;
3881
3882 snd_array_init(&spec->events, sizeof(*event), 32);
3883 event = snd_array_new(&spec->events);
3884 if (!event)
3885 return -ENOMEM;
3886 event->nid = nid;
c6e4c666
TI		 3887 event->type = type;
3888 event->tag = spec->events.used;
74aeaabc
MR		 3889 event->data = data;
3890
c6e4c666 3891 return event->tag;
74aeaabc
MR		 3892}
3893
c6e4c666
TI		 3894static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3895 hda_nid_t nid, unsigned char type)
74aeaabc
MR		 3896{
3897 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 3898 struct sigmatel_event *event = spec->events.list;
3899 int i;
3900
3901 for (i = 0; i < spec->events.used; i++, event++) {
3902 if (event->nid == nid && event->type == type)
3903 return event;
74aeaabc 3904 }
c6e4c666 3905 return NULL;
74aeaabc
MR		 3906}
3907
c6e4c666
TI		 3908static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3909 unsigned char tag)
314634bc 3910{
c6e4c666
TI		 3911 struct sigmatel_spec *spec = codec->spec;
3912 struct sigmatel_event *event = spec->events.list;
3913 int i;
3914
3915 for (i = 0; i < spec->events.used; i++, event++) {
3916 if (event->tag == tag)
3917 return event;
74aeaabc 3918 }
c6e4c666
TI		 3919 return NULL;
3920}
3921
3922static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3923 unsigned int type)
3924{
3925 struct sigmatel_event *event;
3926 int tag;
3927
3928 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3929 return;
3930 event = stac_get_event(codec, nid, type);
3931 if (event)
3932 tag = event->tag;
3933 else
3934 tag = stac_add_event(codec->spec, nid, type, 0);
3935 if (tag < 0)
3936 return;
3937 snd_hda_codec_write_cache(codec, nid, 0,
3938 AC_VERB_SET_UNSOLICITED_ENABLE,
3939 AC_USRSP_EN | tag);
314634bc
TI		 3940}
3941
a64135a2
MR		 3942static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3943{
3944 int i;
3945 for (i = 0; i < cfg->hp_outs; i++)
3946 if (cfg->hp_pins[i] == nid)
3947 return 1; /* nid is a HP-Out */
3948
3949 return 0; /* nid is not a HP-Out */
3950};
3951
b76c850f
MR		 3952static void stac92xx_power_down(struct hda_codec *codec)
3953{
3954 struct sigmatel_spec *spec = codec->spec;
3955
3956 /* power down inactive DACs */
3957 hda_nid_t *dac;
3958 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 3959 if (!check_all_dac_nids(spec, *dac))
8c2f767b 3960 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 3961 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3962}
3963
f73d3585
TI		 3964static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3965 int enable);
3966
c7d4b2fa
M		 3967static int stac92xx_init(struct hda_codec *codec)
3968{
3969 struct sigmatel_spec *spec = codec->spec;
82bc955f 3970 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3971 unsigned int gpio;
e4973e1e 3972 int i;
c7d4b2fa 3973
c7d4b2fa
M		 3974 snd_hda_sequence_write(codec, spec->init);
3975
8daaaa97
MR		 3976 /* power down adcs initially */
3977 if (spec->powerdown_adcs)
3978 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 3979 snd_hda_codec_write(codec,
8daaaa97
MR		 3980 spec->adc_nids[i], 0,
3981 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI		 3982
3983 /* set up GPIO */
3984 gpio = spec->gpio_data;
3985 /* turn on EAPD statically when spec->eapd_switch isn't set.
3986 * otherwise, unsol event will turn it on/off dynamically
3987 */
3988 if (!spec->eapd_switch)
3989 gpio |= spec->eapd_mask;
3990 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3991
82bc955f
TI		 3992 /* set up pins */
3993 if (spec->hp_detect) {
505cb341 3994 /* Enable unsolicited responses on the HP widget */
74aeaabc 3995 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 3996 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 3997 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 3998 }
0a07acaf
TI		 3999 /* force to enable the first line-out; the others are set up
4000 * in unsol_event
4001 */
4002 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4003 AC_PINCTL_OUT_EN);
82bc955f 4004 /* fake event to set up pins */
c6e4c666
TI		 4005 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4006 STAC_HP_EVENT);
82bc955f
TI		 4007 } else {
4008 stac92xx_auto_init_multi_out(codec);
4009 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 4010 for (i = 0; i < cfg->hp_outs; i++)
4011 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI		 4012 }
4013 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 4014 hda_nid_t nid = cfg->input_pins[i];
4015 if (nid) {
12dde4c6 4016 unsigned int pinctl, conf;
4f1e6bc3
TI		 4017 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
4018 /* for mic pins, force to initialize */
4019 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI		 4020 pinctl |= AC_PINCTL_IN_EN;
4021 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI		 4022 } else {
4023 pinctl = snd_hda_codec_read(codec, nid, 0,
4024 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4025 /* if PINCTL already set then skip */
12dde4c6
TI		 4026 if (!(pinctl & AC_PINCTL_IN_EN)) {
4027 pinctl |= AC_PINCTL_IN_EN;
4028 stac92xx_auto_set_pinctl(codec, nid,
4029 pinctl);
4030 }
4031 }
4032 conf = snd_hda_codec_read(codec, nid, 0,
4033 AC_VERB_GET_CONFIG_DEFAULT, 0);
4034 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4035 enable_pin_detect(codec, nid,
4036 STAC_INSERT_EVENT);
4037 stac_issue_unsol_event(codec, nid,
4038 STAC_INSERT_EVENT);
4f1e6bc3 4039 }
c960a03b 4040 }
82bc955f 4041 }
a64135a2
MR		 4042 for (i = 0; i < spec->num_dmics; i++)
4043 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4044 AC_PINCTL_IN_EN);
f73d3585
TI		 4045 if (cfg->dig_out_pin)
4046 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
4047 AC_PINCTL_OUT_EN);
4048 if (cfg->dig_in_pin)
4049 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4050 AC_PINCTL_IN_EN);
a64135a2 4051 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4052 hda_nid_t nid = spec->pwr_nids[i];
4053 int pinctl, def_conf;
f73d3585 4054
eb632128
TI		 4055 /* power on when no jack detection is available */
4056 if (!spec->hp_detect) {
4057 stac_toggle_power_map(codec, nid, 1);
4058 continue;
4059 }
4060
4061 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI		 4062 continue; /* already has an unsol event */
4063
4064 pinctl = snd_hda_codec_read(codec, nid, 0,
4065 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4066 /* outputs are only ports capable of power management
4067 * any attempts on powering down a input port cause the
4068 * referenced VREF to act quirky.
4069 */
eb632128
TI		 4070 if (pinctl & AC_PINCTL_IN_EN) {
4071 stac_toggle_power_map(codec, nid, 1);
a64135a2 4072 continue;
eb632128 4073 }
f73d3585
TI		 4074 def_conf = snd_hda_codec_read(codec, nid, 0,
4075 AC_VERB_GET_CONFIG_DEFAULT, 0);
4076 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4077 /* skip any ports that don't have jacks since presence
4078 * detection is useless */
f73d3585
TI		 4079 if (def_conf != AC_JACK_PORT_COMPLEX) {
4080 if (def_conf != AC_JACK_PORT_NONE)
4081 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4082 continue;
f73d3585 4083 }
12dde4c6
TI		 4084 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
4085 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4086 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
4087 }
a64135a2 4088 }
b76c850f
MR		 4089 if (spec->dac_list)
4090 stac92xx_power_down(codec);
c7d4b2fa
M		 4091 return 0;
4092}
4093
74aeaabc
MR		 4094static void stac92xx_free_jacks(struct hda_codec *codec)
4095{
e4973e1e 4096#ifdef CONFIG_SND_JACK
b94d3539 4097 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4098 struct sigmatel_spec *spec = codec->spec;
b94d3539 4099 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 4100 struct sigmatel_jack *jacks = spec->jacks.list;
4101 int i;
4102 for (i = 0; i < spec->jacks.used; i++)
4103 snd_device_free(codec->bus->card, &jacks[i].jack);
4104 }
4105 snd_array_free(&spec->jacks);
e4973e1e 4106#endif
74aeaabc
MR		 4107}
4108
603c4019
TI		 4109static void stac92xx_free_kctls(struct hda_codec *codec)
4110{
4111 struct sigmatel_spec *spec = codec->spec;
4112
4113 if (spec->kctls.list) {
4114 struct snd_kcontrol_new *kctl = spec->kctls.list;
4115 int i;
4116 for (i = 0; i < spec->kctls.used; i++)
4117 kfree(kctl[i].name);
4118 }
4119 snd_array_free(&spec->kctls);
4120}
4121
2f2f4251
M		 4122static void stac92xx_free(struct hda_codec *codec)
4123{
c7d4b2fa 4124 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4125
4126 if (! spec)
4127 return;
4128
af9f341a 4129 kfree(spec->pin_configs);
74aeaabc
MR		 4130 stac92xx_free_jacks(codec);
4131 snd_array_free(&spec->events);
11b44bbd 4132
c7d4b2fa 4133 kfree(spec);
1cd2224c 4134 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4135}
4136
4e55096e
M		 4137static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4138 unsigned int flag)
4139{
8ce84198
TI		 4140 unsigned int old_ctl, pin_ctl;
4141
4142 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4143 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4144
f9acba43
TI		 4145 if (pin_ctl & AC_PINCTL_IN_EN) {
4146 /*
4147 * we need to check the current set-up direction of
4148 * shared input pins since they can be switched via
4149 * "xxx as Output" mixer switch
4150 */
4151 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4152 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4153 return;
4154 }
4155
8ce84198 4156 old_ctl = pin_ctl;
7b043899
SL		 4157 /* if setting pin direction bits, clear the current
4158 direction bits first */
4159 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4160 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4161
8ce84198
TI		 4162 pin_ctl |= flag;
4163 if (old_ctl != pin_ctl)
4164 snd_hda_codec_write_cache(codec, nid, 0,
4165 AC_VERB_SET_PIN_WIDGET_CONTROL,
4166 pin_ctl);
4e55096e
M		 4167}
4168
4169static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4170 unsigned int flag)
4171{
4172 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4173 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI		 4174 if (pin_ctl & flag)
4175 snd_hda_codec_write_cache(codec, nid, 0,
4176 AC_VERB_SET_PIN_WIDGET_CONTROL,
4177 pin_ctl & ~flag);
4e55096e
M		 4178}
4179
e6e3ea25 4180static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4181{
4182 if (!nid)
4183 return 0;
4184 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI		 4185 & (1 << 31))
4186 return 1;
314634bc
TI		 4187 return 0;
4188}
4189
d7a89436
TI		 4190/* return non-zero if the hp-pin of the given array index isn't
4191 * a jack-detection target
4192 */
4193static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4194{
4195 struct auto_pin_cfg *cfg = &spec->autocfg;
4196
4197 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4198 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4199 return 1;
c21ca4a8 4200 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4201 return 1;
4202 /* ignore if the pin is set as line-out */
4203 if (cfg->hp_pins[i] == spec->hp_switch)
4204 return 1;
4205 return 0;
4206}
4207
c6e4c666 4208static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4209{
4210 struct sigmatel_spec *spec = codec->spec;
4211 struct auto_pin_cfg *cfg = &spec->autocfg;
4212 int i, presence;
4213
eb06ed8f 4214 presence = 0;
4fe5195c
MR		 4215 if (spec->gpio_mute)
4216 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4217 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4218
eb06ed8f 4219 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4220 if (presence)
4221 break;
d7a89436
TI		 4222 if (no_hp_sensing(spec, i))
4223 continue;
e6e3ea25
TI		 4224 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4225 if (presence) {
4226 unsigned int pinctl;
4227 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4228 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4229 if (pinctl & AC_PINCTL_IN_EN)
4230 presence = 0; /* mic- or line-input */
4231 }
eb06ed8f 4232 }
4e55096e
M		 4233
4234 if (presence) {
d7a89436 4235 /* disable lineouts */
7c2ba97b 4236 if (spec->hp_switch)
d7a89436
TI		 4237 stac92xx_reset_pinctl(codec, spec->hp_switch,
4238 AC_PINCTL_OUT_EN);
4e55096e
M		 4239 for (i = 0; i < cfg->line_outs; i++)
4240 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4241 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4242 for (i = 0; i < cfg->speaker_outs; i++)
4243 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4244 AC_PINCTL_OUT_EN);
c0cea0d0 4245 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4246 stac_gpio_set(codec, spec->gpio_mask,
4247 spec->gpio_dir, spec->gpio_data &
4248 ~spec->eapd_mask);
4e55096e 4249 } else {
d7a89436 4250 /* enable lineouts */
7c2ba97b 4251 if (spec->hp_switch)
d7a89436
TI		 4252 stac92xx_set_pinctl(codec, spec->hp_switch,
4253 AC_PINCTL_OUT_EN);
4e55096e
M		 4254 for (i = 0; i < cfg->line_outs; i++)
4255 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4256 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4257 for (i = 0; i < cfg->speaker_outs; i++)
4258 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4259 AC_PINCTL_OUT_EN);
c0cea0d0 4260 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4261 stac_gpio_set(codec, spec->gpio_mask,
4262 spec->gpio_dir, spec->gpio_data |
4263 spec->eapd_mask);
4e55096e 4264 }
d7a89436
TI		 4265 /* toggle hp outs */
4266 for (i = 0; i < cfg->hp_outs; i++) {
4267 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4268 if (no_hp_sensing(spec, i))
4269 continue;
4270 if (presence)
4271 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4272#if 0 /* FIXME */
4273/* Resetting the pinctl like below may lead to (a sort of) regressions
4274 * on some devices since they use the HP pin actually for line/speaker
4275 * outs although the default pin config shows a different pin (that is
4276 * wrong and useless).
4277 *
4278 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4279 * But, disabling the code below just works around it, and I'm too tired of
4280 * bug reports with such devices...
4281 */
d7a89436
TI		 4282 else
4283 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4284#endif /* FIXME */
d7a89436 4285 }
4e55096e
M		 4286}
4287
f73d3585
TI		 4288static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4289 int enable)
a64135a2
MR		 4290{
4291 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4292 unsigned int idx, val;
4293
4294 for (idx = 0; idx < spec->num_pwrs; idx++) {
4295 if (spec->pwr_nids[idx] == nid)
4296 break;
4297 }
4298 if (idx >= spec->num_pwrs)
4299 return;
d0513fc6
MR		 4300
4301 /* several codecs have two power down bits */
4302 if (spec->pwr_mapping)
4303 idx = spec->pwr_mapping[idx];
4304 else
4305 idx = 1 << idx;
a64135a2 4306
f73d3585
TI		 4307 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4308 if (enable)
a64135a2
MR		 4309 val &= ~idx;
4310 else
4311 val |= idx;
4312
4313 /* power down unused output ports */
4314 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4315}
4316
f73d3585
TI		 4317static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4318{
e6e3ea25 4319 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4320}
a64135a2 4321
74aeaabc
MR		 4322static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4323{
4324 struct sigmatel_spec *spec = codec->spec;
4325 struct sigmatel_jack *jacks = spec->jacks.list;
4326
4327 if (jacks) {
4328 int i;
4329 for (i = 0; i < spec->jacks.used; i++) {
4330 if (jacks->nid == nid) {
4331 unsigned int pin_ctl =
4332 snd_hda_codec_read(codec, nid,
4333 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4334 0x00);
4335 int type = jacks->type;
4336 if (type == (SND_JACK_LINEOUT
4337 | SND_JACK_HEADPHONE))
4338 type = (pin_ctl & AC_PINCTL_HP_EN)
4339 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4340 snd_jack_report(jacks->jack,
e6e3ea25 4341 get_pin_presence(codec, nid)
74aeaabc
MR		 4342 ? type : 0);
4343 }
4344 jacks++;
4345 }
4346 }
4347}
a64135a2 4348
c6e4c666
TI		 4349static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4350 unsigned char type)
4351{
4352 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4353 if (!event)
4354 return;
4355 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4356}
4357
314634bc
TI		 4358static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4359{
a64135a2 4360 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4361 struct sigmatel_event *event;
4362 int tag, data;
a64135a2 4363
c6e4c666
TI		 4364 tag = (res >> 26) & 0x7f;
4365 event = stac_get_event_from_tag(codec, tag);
4366 if (!event)
4367 return;
4368
4369 switch (event->type) {
314634bc 4370 case STAC_HP_EVENT:
c6e4c666 4371 stac92xx_hp_detect(codec);
a64135a2 4372 /* fallthru */
74aeaabc 4373 case STAC_INSERT_EVENT:
a64135a2 4374 case STAC_PWR_EVENT:
c6e4c666
TI		 4375 if (spec->num_pwrs > 0)
4376 stac92xx_pin_sense(codec, event->nid);
4377 stac92xx_report_jack(codec, event->nid);
72474be6 4378 break;
c6e4c666
TI		 4379 case STAC_VREF_EVENT:
4380 data = snd_hda_codec_read(codec, codec->afg, 0,
4381 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4382 /* toggle VREF state based on GPIOx status */
4383 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4384 !!(data & (1 << event->data)));
72474be6 4385 break;
314634bc
TI		 4386 }
4387}
4388
2d34e1b3
TI		 4389#ifdef CONFIG_PROC_FS
4390static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4391 struct hda_codec *codec, hda_nid_t nid)
4392{
4393 if (nid == codec->afg)
4394 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4395 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4396}
4397
4398static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4399 struct hda_codec *codec,
4400 unsigned int verb)
4401{
4402 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4403 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4404}
4405
4406/* stac92hd71bxx, stac92hd73xx */
4407static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4408 struct hda_codec *codec, hda_nid_t nid)
4409{
4410 stac92hd_proc_hook(buffer, codec, nid);
4411 if (nid == codec->afg)
4412 analog_loop_proc_hook(buffer, codec, 0xfa0);
4413}
4414
4415static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4416 struct hda_codec *codec, hda_nid_t nid)
4417{
4418 if (nid == codec->afg)
4419 analog_loop_proc_hook(buffer, codec, 0xfe0);
4420}
4421
4422static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4423 struct hda_codec *codec, hda_nid_t nid)
4424{
4425 if (nid == codec->afg)
4426 analog_loop_proc_hook(buffer, codec, 0xfeb);
4427}
4428#else
4429#define stac92hd_proc_hook NULL
4430#define stac92hd7x_proc_hook NULL
4431#define stac9205_proc_hook NULL
4432#define stac927x_proc_hook NULL
4433#endif
4434
cb53c626 4435#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4436static int stac92xx_resume(struct hda_codec *codec)
4437{
dc81bed1
TI		 4438 struct sigmatel_spec *spec = codec->spec;
4439
11b44bbd 4440 stac92xx_set_config_regs(codec);
2c885878 4441 stac92xx_init(codec);
82beb8fd
TI		 4442 snd_hda_codec_resume_amp(codec);
4443 snd_hda_codec_resume_cache(codec);
2c885878 4444 /* fake event to set up pins again to override cached values */
dc81bed1 4445 if (spec->hp_detect)
c6e4c666
TI		 4446 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4447 STAC_HP_EVENT);
ff6fdc37
M		 4448 return 0;
4449}
c6798d2b
MR		 4450
4451static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4452{
4453 struct sigmatel_spec *spec = codec->spec;
4454 if (spec->eapd_mask)
4455 stac_gpio_set(codec, spec->gpio_mask,
4456 spec->gpio_dir, spec->gpio_data &
4457 ~spec->eapd_mask);
4458 return 0;
4459}
ff6fdc37
M		 4460#endif
4461
2f2f4251
M		 4462static struct hda_codec_ops stac92xx_patch_ops = {
4463 .build_controls = stac92xx_build_controls,
4464 .build_pcms = stac92xx_build_pcms,
4465 .init = stac92xx_init,
4466 .free = stac92xx_free,
4e55096e 4467 .unsol_event = stac92xx_unsol_event,
cb53c626 4468#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4469 .suspend = stac92xx_suspend,
ff6fdc37
M		 4470 .resume = stac92xx_resume,
4471#endif
2f2f4251
M		 4472};
4473
4474static int patch_stac9200(struct hda_codec *codec)
4475{
4476 struct sigmatel_spec *spec;
c7d4b2fa 4477 int err;
2f2f4251 4478
e560d8d8 4479 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4480 if (spec == NULL)
4481 return -ENOMEM;
4482
4483 codec->spec = spec;
a4eed138 4484 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4485 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4486 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4487 stac9200_models,
4488 stac9200_cfg_tbl);
11b44bbd
RF		 4489 if (spec->board_config < 0) {
4490 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4491 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4492 } else
4493 err = stac_save_pin_cfgs(codec,
4494 stac9200_brd_tbl[spec->board_config]);
4495 if (err < 0) {
4496 stac92xx_free(codec);
4497 return err;
403d1944 4498 }
2f2f4251
M		 4499
4500 spec->multiout.max_channels = 2;
4501 spec->multiout.num_dacs = 1;
4502 spec->multiout.dac_nids = stac9200_dac_nids;
4503 spec->adc_nids = stac9200_adc_nids;
4504 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4505 spec->num_muxes = 1;
8b65727b 4506 spec->num_dmics = 0;
9e05b7a3 4507 spec->num_adcs = 1;
a64135a2 4508 spec->num_pwrs = 0;
c7d4b2fa 4509
58eec423
MCC		 4510 if (spec->board_config == STAC_9200_M4 ||
4511 spec->board_config == STAC_9200_M4_2 ||
bf277785 4512 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4513 spec->init = stac9200_eapd_init;
4514 else
4515 spec->init = stac9200_core_init;
2f2f4251 4516 spec->mixer = stac9200_mixer;
c7d4b2fa 4517
117f257d
TI		 4518 if (spec->board_config == STAC_9200_PANASONIC) {
4519 spec->gpio_mask = spec->gpio_dir = 0x09;
4520 spec->gpio_data = 0x00;
4521 }
4522
c7d4b2fa
M		 4523 err = stac9200_parse_auto_config(codec);
4524 if (err < 0) {
4525 stac92xx_free(codec);
4526 return err;
4527 }
2f2f4251 4528
2acc9dcb
TI		 4529 /* CF-74 has no headphone detection, and the driver should *NOT*
4530 * do detection and HP/speaker toggle because the hardware does it.
4531 */
4532 if (spec->board_config == STAC_9200_PANASONIC)
4533 spec->hp_detect = 0;
4534
2f2f4251
M		 4535 codec->patch_ops = stac92xx_patch_ops;
4536
4537 return 0;
4538}
4539
8e21c34c
TD		 4540static int patch_stac925x(struct hda_codec *codec)
4541{
4542 struct sigmatel_spec *spec;
4543 int err;
4544
4545 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4546 if (spec == NULL)
4547 return -ENOMEM;
4548
4549 codec->spec = spec;
a4eed138 4550 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4551 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 4552
4553 /* Check first for codec ID */
4554 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4555 STAC_925x_MODELS,
4556 stac925x_models,
4557 stac925x_codec_id_cfg_tbl);
4558
4559 /* Now checks for PCI ID, if codec ID is not found */
4560 if (spec->board_config < 0)
4561 spec->board_config = snd_hda_check_board_config(codec,
4562 STAC_925x_MODELS,
8e21c34c
TD		 4563 stac925x_models,
4564 stac925x_cfg_tbl);
9e507abd 4565 again:
8e21c34c 4566 if (spec->board_config < 0) {
9cb36c2a 4567 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4568 "using BIOS defaults\n");
8e21c34c 4569 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4570 } else
4571 err = stac_save_pin_cfgs(codec,
4572 stac925x_brd_tbl[spec->board_config]);
4573 if (err < 0) {
4574 stac92xx_free(codec);
4575 return err;
8e21c34c
TD		 4576 }
4577
4578 spec->multiout.max_channels = 2;
4579 spec->multiout.num_dacs = 1;
4580 spec->multiout.dac_nids = stac925x_dac_nids;
4581 spec->adc_nids = stac925x_adc_nids;
4582 spec->mux_nids = stac925x_mux_nids;
4583 spec->num_muxes = 1;
9e05b7a3 4584 spec->num_adcs = 1;
a64135a2 4585 spec->num_pwrs = 0;
2c11f955
TD		 4586 switch (codec->vendor_id) {
4587 case 0x83847632: /* STAC9202 */
4588 case 0x83847633: /* STAC9202D */
4589 case 0x83847636: /* STAC9251 */
4590 case 0x83847637: /* STAC9251D */
f6e9852a 4591 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4592 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4593 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4594 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4595 break;
4596 default:
4597 spec->num_dmics = 0;
4598 break;
4599 }
8e21c34c
TD		 4600
4601 spec->init = stac925x_core_init;
4602 spec->mixer = stac925x_mixer;
4603
4604 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4605 if (!err) {
4606 if (spec->board_config < 0) {
4607 printk(KERN_WARNING "hda_codec: No auto-config is "
4608 "available, default to model=ref\n");
4609 spec->board_config = STAC_925x_REF;
4610 goto again;
4611 }
4612 err = -EINVAL;
4613 }
8e21c34c
TD		 4614 if (err < 0) {
4615 stac92xx_free(codec);
4616 return err;
4617 }
4618
4619 codec->patch_ops = stac92xx_patch_ops;
4620
4621 return 0;
4622}
4623
e1f0d669
MR		 4624static struct hda_input_mux stac92hd73xx_dmux = {
4625 .num_items = 4,
4626 .items = {
4627 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4628 { "Digital Mic 1", 0x09 },
4629 { "Digital Mic 2", 0x0a },
2a9c7816 4630 { "CD", 0x08 },
e1f0d669
MR		 4631 }
4632};
4633
4634static int patch_stac92hd73xx(struct hda_codec *codec)
4635{
4636 struct sigmatel_spec *spec;
4637 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4638 int err = 0;
c21ca4a8 4639 int num_dacs;
e1f0d669
MR		 4640
4641 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4642 if (spec == NULL)
4643 return -ENOMEM;
4644
4645 codec->spec = spec;
e99d32b3 4646 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4647 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4648 spec->pin_nids = stac92hd73xx_pin_nids;
4649 spec->board_config = snd_hda_check_board_config(codec,
4650 STAC_92HD73XX_MODELS,
4651 stac92hd73xx_models,
4652 stac92hd73xx_cfg_tbl);
4653again:
4654 if (spec->board_config < 0) {
4655 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4656 " STAC92HD73XX, using BIOS defaults\n");
4657 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4658 } else
4659 err = stac_save_pin_cfgs(codec,
4660 stac92hd73xx_brd_tbl[spec->board_config]);
4661 if (err < 0) {
4662 stac92xx_free(codec);
4663 return err;
e1f0d669
MR		 4664 }
4665
c21ca4a8 4666 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 4667 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4668
c21ca4a8 4669 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 4670 printk(KERN_WARNING "hda_codec: Could not determine "
4671 "number of channels defaulting to DAC count\n");
c21ca4a8 4672 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4673 }
c21ca4a8 4674 switch (num_dacs) {
e1f0d669
MR		 4675 case 0x3: /* 6 Channel */
4676 spec->mixer = stac92hd73xx_6ch_mixer;
4677 spec->init = stac92hd73xx_6ch_core_init;
4678 break;
4679 case 0x4: /* 8 Channel */
e1f0d669
MR		 4680 spec->mixer = stac92hd73xx_8ch_mixer;
4681 spec->init = stac92hd73xx_8ch_core_init;
4682 break;
4683 case 0x5: /* 10 Channel */
e1f0d669
MR		 4684 spec->mixer = stac92hd73xx_10ch_mixer;
4685 spec->init = stac92hd73xx_10ch_core_init;
c21ca4a8
TI		 4686 }
4687 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4688
e1f0d669
MR		 4689 spec->aloopback_mask = 0x01;
4690 spec->aloopback_shift = 8;
4691
1cd2224c 4692 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4693 spec->mux_nids = stac92hd73xx_mux_nids;
4694 spec->adc_nids = stac92hd73xx_adc_nids;
4695 spec->dmic_nids = stac92hd73xx_dmic_nids;
4696 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4697 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4698 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4699 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4700
4701 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4702 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4703 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4704 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4705 sizeof(stac92hd73xx_dmux));
4706
a7662640 4707 switch (spec->board_config) {
6b3ab21e 4708 case STAC_DELL_EQ:
d654a660 4709 spec->init = dell_eq_core_init;
6b3ab21e 4710 /* fallthru */
661cd8fb
TI		 4711 case STAC_DELL_M6_AMIC:
4712 case STAC_DELL_M6_DMIC:
4713 case STAC_DELL_M6_BOTH:
2a9c7816 4714 spec->num_smuxes = 0;
2a9c7816
MR		 4715 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4716 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4717 spec->eapd_switch = 0;
2a9c7816 4718 spec->num_amps = 1;
6b3ab21e 4719
c21ca4a8 4720 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4721 spec->init = dell_m6_core_init;
661cd8fb
TI		 4722 switch (spec->board_config) {
4723 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR		 4724 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4725 spec->num_dmics = 0;
2a9c7816 4726 spec->private_dimux.num_items = 1;
a7662640 4727 break;
661cd8fb 4728 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR		 4729 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4730 spec->num_dmics = 1;
2a9c7816 4731 spec->private_dimux.num_items = 2;
a7662640 4732 break;
661cd8fb 4733 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR		 4734 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4735 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4736 spec->num_dmics = 1;
2a9c7816 4737 spec->private_dimux.num_items = 2;
a7662640
MR		 4738 break;
4739 }
4740 break;
4741 default:
4742 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4743 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4744 spec->eapd_switch = 1;
a7662640 4745 }
b2c4f4d7
MR		 4746 if (spec->board_config > STAC_92HD73XX_REF) {
4747 /* GPIO0 High = Enable EAPD */
4748 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4749 spec->gpio_data = 0x01;
4750 }
2a9c7816 4751 spec->dinput_mux = &spec->private_dimux;
a7662640 4752
a64135a2
MR		 4753 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4754 spec->pwr_nids = stac92hd73xx_pwr_nids;
4755
d9737751 4756 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4757
4758 if (!err) {
4759 if (spec->board_config < 0) {
4760 printk(KERN_WARNING "hda_codec: No auto-config is "
4761 "available, default to model=ref\n");
4762 spec->board_config = STAC_92HD73XX_REF;
4763 goto again;
4764 }
4765 err = -EINVAL;
4766 }
4767
4768 if (err < 0) {
4769 stac92xx_free(codec);
4770 return err;
4771 }
4772
9e43f0de
TI		 4773 if (spec->board_config == STAC_92HD73XX_NO_JD)
4774 spec->hp_detect = 0;
4775
e1f0d669
MR		 4776 codec->patch_ops = stac92xx_patch_ops;
4777
2d34e1b3
TI		 4778 codec->proc_widget_hook = stac92hd7x_proc_hook;
4779
e1f0d669
MR		 4780 return 0;
4781}
4782
d0513fc6
MR		 4783static struct hda_input_mux stac92hd83xxx_dmux = {
4784 .num_items = 3,
4785 .items = {
4786 { "Analog Inputs", 0x03 },
4787 { "Digital Mic 1", 0x04 },
4788 { "Digital Mic 2", 0x05 },
4789 }
4790};
4791
4792static int patch_stac92hd83xxx(struct hda_codec *codec)
4793{
4794 struct sigmatel_spec *spec;
65557f35 4795 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 4796 int err;
65557f35 4797 int num_dacs;
d0513fc6
MR		 4798
4799 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4800 if (spec == NULL)
4801 return -ENOMEM;
4802
4803 codec->spec = spec;
0ffa9807 4804 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4805 spec->mono_nid = 0x19;
4806 spec->digbeep_nid = 0x21;
4807 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4808 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4809 spec->adc_nids = stac92hd83xxx_adc_nids;
4810 spec->pwr_nids = stac92hd83xxx_pwr_nids;
c15c5060 4811 spec->amp_nids = stac92hd83xxx_amp_nids;
d0513fc6
MR		 4812 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4813 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4814 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 4815
65557f35
MR		 4816
4817 /* set port 0xe to select the last DAC
4818 */
4819 num_dacs = snd_hda_get_connections(codec, 0x0e,
4820 conn, STAC92HD83_DAC_COUNT + 1) - 1;
4821
4822 snd_hda_codec_write_cache(codec, 0xe, 0,
4823 AC_VERB_SET_CONNECT_SEL, num_dacs);
4824
d0513fc6 4825 spec->init = stac92hd83xxx_core_init;
d0513fc6
MR		 4826 spec->mixer = stac92hd83xxx_mixer;
4827 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4828 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4829 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
c15c5060 4830 spec->num_amps = ARRAY_SIZE(stac92hd83xxx_amp_nids);
d0513fc6
MR		 4831 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4832 spec->dinput_mux = &stac92hd83xxx_dmux;
4833 spec->pin_nids = stac92hd83xxx_pin_nids;
4834 spec->board_config = snd_hda_check_board_config(codec,
4835 STAC_92HD83XXX_MODELS,
4836 stac92hd83xxx_models,
4837 stac92hd83xxx_cfg_tbl);
4838again:
4839 if (spec->board_config < 0) {
4840 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4841 " STAC92HD83XXX, using BIOS defaults\n");
4842 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4843 } else
4844 err = stac_save_pin_cfgs(codec,
4845 stac92hd83xxx_brd_tbl[spec->board_config]);
4846 if (err < 0) {
4847 stac92xx_free(codec);
4848 return err;
d0513fc6
MR		 4849 }
4850
32ed3f46
MR		 4851 switch (codec->vendor_id) {
4852 case 0x111d7604:
4853 case 0x111d7605:
4854 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
4855 break;
4856 spec->num_pwrs = 0;
4857 break;
4858 }
4859
d0513fc6
MR		 4860 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4861 if (!err) {
4862 if (spec->board_config < 0) {
4863 printk(KERN_WARNING "hda_codec: No auto-config is "
4864 "available, default to model=ref\n");
4865 spec->board_config = STAC_92HD83XXX_REF;
4866 goto again;
4867 }
4868 err = -EINVAL;
4869 }
4870
4871 if (err < 0) {
4872 stac92xx_free(codec);
4873 return err;
4874 }
4875
4876 codec->patch_ops = stac92xx_patch_ops;
4877
2d34e1b3
TI		 4878 codec->proc_widget_hook = stac92hd_proc_hook;
4879
d0513fc6
MR		 4880 return 0;
4881}
4882
4b33c767
MR		 4883static struct hda_input_mux stac92hd71bxx_dmux = {
4884 .num_items = 4,
4885 .items = {
4886 { "Analog Inputs", 0x00 },
4887 { "Mixer", 0x01 },
4888 { "Digital Mic 1", 0x02 },
4889 { "Digital Mic 2", 0x03 },
4890 }
4891};
4892
e035b841
MR		 4893static int patch_stac92hd71bxx(struct hda_codec *codec)
4894{
4895 struct sigmatel_spec *spec;
4896 int err = 0;
4897
4898 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4899 if (spec == NULL)
4900 return -ENOMEM;
4901
4902 codec->spec = spec;
8daaaa97 4903 codec->patch_ops = stac92xx_patch_ops;
e035b841 4904 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4905 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4906 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4907 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4908 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4909 spec->board_config = snd_hda_check_board_config(codec,
4910 STAC_92HD71BXX_MODELS,
4911 stac92hd71bxx_models,
4912 stac92hd71bxx_cfg_tbl);
4913again:
4914 if (spec->board_config < 0) {
4915 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4916 " STAC92HD71BXX, using BIOS defaults\n");
4917 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4918 } else
4919 err = stac_save_pin_cfgs(codec,
4920 stac92hd71bxx_brd_tbl[spec->board_config]);
4921 if (err < 0) {
4922 stac92xx_free(codec);
4923 return err;
e035b841
MR		 4924 }
4925
41c3b648
TI		 4926 if (spec->board_config > STAC_92HD71BXX_REF) {
4927 /* GPIO0 = EAPD */
4928 spec->gpio_mask = 0x01;
4929 spec->gpio_dir = 0x01;
4930 spec->gpio_data = 0x01;
4931 }
4932
541eee87
MR		 4933 switch (codec->vendor_id) {
4934 case 0x111d76b6: /* 4 Port without Analog Mixer */
4935 case 0x111d76b7:
4936 case 0x111d76b4: /* 6 Port without Analog Mixer */
4937 case 0x111d76b5:
4938 spec->mixer = stac92hd71bxx_mixer;
4939 spec->init = stac92hd71bxx_core_init;
0ffa9807 4940 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4941 break;
aafc4412 4942 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4943 switch (spec->board_config) {
4944 case STAC_HP_M4:
72474be6 4945 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 4946 err = stac_add_event(spec, codec->afg,
4947 STAC_VREF_EVENT, 0x02);
4948 if (err < 0)
4949 return err;
c5d08bb5 4950 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4951 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4952 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4953 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4954 AC_USRSP_EN | err);
72474be6
MR		 4955 spec->gpio_mask |= 0x02;
4956 break;
4957 }
8daaaa97 4958 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4959 (codec->revision_id & 0xf) == 1)
8daaaa97 4960 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4961
aafc4412
MR		 4962 /* no output amps */
4963 spec->num_pwrs = 0;
4964 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4965 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4966
4967 /* disable VSW */
4968 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4969 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR		 4970 break;
4971 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4972 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4973 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4974
aafc4412
MR		 4975 /* no output amps */
4976 spec->num_pwrs = 0;
4977 /* fallthru */
541eee87 4978 default:
4b33c767 4979 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4980 spec->mixer = stac92hd71bxx_analog_mixer;
4981 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4982 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4983 }
4984
4b33c767 4985 spec->aloopback_mask = 0x50;
541eee87
MR		 4986 spec->aloopback_shift = 0;
4987
8daaaa97 4988 spec->powerdown_adcs = 1;
1cd2224c 4989 spec->digbeep_nid = 0x26;
e035b841
MR		 4990 spec->mux_nids = stac92hd71bxx_mux_nids;
4991 spec->adc_nids = stac92hd71bxx_adc_nids;
4992 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4993 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4994 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4995 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4996
4997 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4998 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4999
6a14f585
MR		 5000 switch (spec->board_config) {
5001 case STAC_HP_M4:
6a14f585 5002 /* enable internal microphone */
af9f341a 5003 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR		 5004 stac92xx_auto_set_pinctl(codec, 0x0e,
5005 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 5006 /* fallthru */
5007 case STAC_DELL_M4_2:
5008 spec->num_dmics = 0;
5009 spec->num_smuxes = 0;
5010 spec->num_dmuxes = 0;
5011 break;
5012 case STAC_DELL_M4_1:
5013 case STAC_DELL_M4_3:
5014 spec->num_dmics = 1;
5015 spec->num_smuxes = 0;
5016 spec->num_dmuxes = 0;
6a14f585
MR		 5017 break;
5018 default:
5019 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
5020 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
5021 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
5022 };
5023
c21ca4a8 5024 spec->multiout.dac_nids = spec->dac_nids;
4b33c767
MR		 5025 if (spec->dinput_mux)
5026 spec->private_dimux.num_items +=
5027 spec->num_dmics -
5028 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 5029
5030 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
5031 if (!err) {
5032 if (spec->board_config < 0) {
5033 printk(KERN_WARNING "hda_codec: No auto-config is "
5034 "available, default to model=ref\n");
5035 spec->board_config = STAC_92HD71BXX_REF;
5036 goto again;
5037 }
5038 err = -EINVAL;
5039 }
5040
5041 if (err < 0) {
5042 stac92xx_free(codec);
5043 return err;
5044 }
5045
2d34e1b3
TI		 5046 codec->proc_widget_hook = stac92hd7x_proc_hook;
5047
e035b841
MR		 5048 return 0;
5049};
5050
2f2f4251
M		 5051static int patch_stac922x(struct hda_codec *codec)
5052{
5053 struct sigmatel_spec *spec;
c7d4b2fa 5054 int err;
2f2f4251 5055
e560d8d8 5056 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5057 if (spec == NULL)
5058 return -ENOMEM;
5059
5060 codec->spec = spec;
a4eed138 5061 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5062 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 5063 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5064 stac922x_models,
5065 stac922x_cfg_tbl);
536319af 5066 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 5067 spec->gpio_mask = spec->gpio_dir = 0x03;
5068 spec->gpio_data = 0x03;
3fc24d85
TI		 5069 /* Intel Macs have all same PCI SSID, so we need to check
5070 * codec SSID to distinguish the exact models
5071 */
6f0778d8 5072 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5073 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 5074
5075 case 0x106b0800:
5076 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5077 break;
5d5d3bc3
IZ		 5078 case 0x106b0600:
5079 case 0x106b0700:
5080 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5081 break;
5d5d3bc3
IZ		 5082 case 0x106b0e00:
5083 case 0x106b0f00:
5084 case 0x106b1600:
5085 case 0x106b1700:
5086 case 0x106b0200:
5087 case 0x106b1e00:
5088 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5089 break;
5d5d3bc3
IZ		 5090 case 0x106b1a00:
5091 case 0x00000100:
5092 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5093 break;
5d5d3bc3
IZ		 5094 case 0x106b0a00:
5095 case 0x106b2200:
5096 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5097 break;
536319af
NB		 5098 default:
5099 spec->board_config = STAC_INTEL_MAC_V3;
5100 break;
3fc24d85
TI		 5101 }
5102 }
5103
9e507abd 5104 again:
11b44bbd
RF		 5105 if (spec->board_config < 0) {
5106 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5107 "using BIOS defaults\n");
5108 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5109 } else
5110 err = stac_save_pin_cfgs(codec,
5111 stac922x_brd_tbl[spec->board_config]);
5112 if (err < 0) {
5113 stac92xx_free(codec);
5114 return err;
403d1944 5115 }
2f2f4251 5116
c7d4b2fa
M		 5117 spec->adc_nids = stac922x_adc_nids;
5118 spec->mux_nids = stac922x_mux_nids;
2549413e 5119 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5120 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5121 spec->num_dmics = 0;
a64135a2 5122 spec->num_pwrs = 0;
c7d4b2fa
M		 5123
5124 spec->init = stac922x_core_init;
2f2f4251 5125 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 5126
5127 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5128
3cc08dc6 5129 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 5130 if (!err) {
5131 if (spec->board_config < 0) {
5132 printk(KERN_WARNING "hda_codec: No auto-config is "
5133 "available, default to model=ref\n");
5134 spec->board_config = STAC_D945_REF;
5135 goto again;
5136 }
5137 err = -EINVAL;
5138 }
3cc08dc6
MP		 5139 if (err < 0) {
5140 stac92xx_free(codec);
5141 return err;
5142 }
5143
5144 codec->patch_ops = stac92xx_patch_ops;
5145
807a4636
TI		 5146 /* Fix Mux capture level; max to 2 */
5147 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5148 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5149 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5150 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5151 (0 << AC_AMPCAP_MUTE_SHIFT));
5152
3cc08dc6
MP		 5153 return 0;
5154}
5155
5156static int patch_stac927x(struct hda_codec *codec)
5157{
5158 struct sigmatel_spec *spec;
5159 int err;
5160
5161 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5162 if (spec == NULL)
5163 return -ENOMEM;
5164
5165 codec->spec = spec;
a4eed138 5166 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5167 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 5168 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5169 stac927x_models,
5170 stac927x_cfg_tbl);
9e507abd 5171 again:
8e9068b1
MR		 5172 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5173 if (spec->board_config < 0)
5174 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5175 "STAC927x, using BIOS defaults\n");
11b44bbd 5176 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5177 } else
5178 err = stac_save_pin_cfgs(codec,
5179 stac927x_brd_tbl[spec->board_config]);
5180 if (err < 0) {
5181 stac92xx_free(codec);
5182 return err;
3cc08dc6
MP		 5183 }
5184
1cd2224c 5185 spec->digbeep_nid = 0x23;
8e9068b1
MR		 5186 spec->adc_nids = stac927x_adc_nids;
5187 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5188 spec->mux_nids = stac927x_mux_nids;
5189 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 5190 spec->smux_nids = stac927x_smux_nids;
5191 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5192 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5193 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 5194 spec->multiout.dac_nids = spec->dac_nids;
5195
81d3dbde 5196 switch (spec->board_config) {
93ed1503 5197 case STAC_D965_3ST:
93ed1503 5198 case STAC_D965_5ST:
8e9068b1 5199 /* GPIO0 High = Enable EAPD */
0fc9dec4 5200 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5201 spec->gpio_data = 0x01;
8e9068b1
MR		 5202 spec->num_dmics = 0;
5203
93ed1503 5204 spec->init = d965_core_init;
9e05b7a3 5205 spec->mixer = stac927x_mixer;
81d3dbde 5206 break;
8e9068b1 5207 case STAC_DELL_BIOS:
780c8be4
MR		 5208 switch (codec->subsystem_id) {
5209 case 0x10280209:
5210 case 0x1028022e:
5211 /* correct the device field to SPDIF out */
af9f341a 5212 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR		 5213 break;
5214 };
03d7ca17 5215 /* configure the analog microphone on some laptops */
af9f341a 5216 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5217 /* correct the front output jack as a hp out */
af9f341a 5218 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5219 /* correct the front input jack as a mic */
af9f341a 5220 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5221 /* fallthru */
8e9068b1
MR		 5222 case STAC_DELL_3ST:
5223 /* GPIO2 High = Enable EAPD */
0fc9dec4 5224 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5225 spec->gpio_data = 0x04;
7f16859a
MR		 5226 spec->dmic_nids = stac927x_dmic_nids;
5227 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5228
8e9068b1
MR		 5229 spec->init = d965_core_init;
5230 spec->mixer = stac927x_mixer;
5231 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5232 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 5233 break;
5234 default:
b2c4f4d7
MR		 5235 if (spec->board_config > STAC_D965_REF) {
5236 /* GPIO0 High = Enable EAPD */
5237 spec->eapd_mask = spec->gpio_mask = 0x01;
5238 spec->gpio_dir = spec->gpio_data = 0x01;
5239 }
8e9068b1
MR		 5240 spec->num_dmics = 0;
5241
5242 spec->init = stac927x_core_init;
5243 spec->mixer = stac927x_mixer;
7f16859a
MR		 5244 }
5245
a64135a2 5246 spec->num_pwrs = 0;
e1f0d669
MR		 5247 spec->aloopback_mask = 0x40;
5248 spec->aloopback_shift = 0;
c0cea0d0 5249 spec->eapd_switch = 1;
8e9068b1 5250
3cc08dc6 5251 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5252 if (!err) {
5253 if (spec->board_config < 0) {
5254 printk(KERN_WARNING "hda_codec: No auto-config is "
5255 "available, default to model=ref\n");
5256 spec->board_config = STAC_D965_REF;
5257 goto again;
5258 }
5259 err = -EINVAL;
5260 }
c7d4b2fa
M		 5261 if (err < 0) {
5262 stac92xx_free(codec);
5263 return err;
5264 }
2f2f4251
M		 5265
5266 codec->patch_ops = stac92xx_patch_ops;
5267
2d34e1b3
TI		 5268 codec->proc_widget_hook = stac927x_proc_hook;
5269
52987656
TI		 5270 /*
5271 * !!FIXME!!
5272 * The STAC927x seem to require fairly long delays for certain
5273 * command sequences. With too short delays (even if the answer
5274 * is set to RIRB properly), it results in the silence output
5275 * on some hardwares like Dell.
5276 *
5277 * The below flag enables the longer delay (see get_response
5278 * in hda_intel.c).
5279 */
5280 codec->bus->needs_damn_long_delay = 1;
5281
e28d8322
TI		 5282 /* no jack detecion for ref-no-jd model */
5283 if (spec->board_config == STAC_D965_REF_NO_JD)
5284 spec->hp_detect = 0;
5285
2f2f4251
M		 5286 return 0;
5287}
5288
f3302a59
MP		 5289static int patch_stac9205(struct hda_codec *codec)
5290{
5291 struct sigmatel_spec *spec;
8259980e 5292 int err;
f3302a59
MP		 5293
5294 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5295 if (spec == NULL)
5296 return -ENOMEM;
5297
5298 codec->spec = spec;
a4eed138 5299 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5300 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 5301 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5302 stac9205_models,
5303 stac9205_cfg_tbl);
9e507abd 5304 again:
11b44bbd
RF		 5305 if (spec->board_config < 0) {
5306 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5307 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5308 } else
5309 err = stac_save_pin_cfgs(codec,
5310 stac9205_brd_tbl[spec->board_config]);
5311 if (err < 0) {
5312 stac92xx_free(codec);
5313 return err;
f3302a59
MP		 5314 }
5315
1cd2224c 5316 spec->digbeep_nid = 0x23;
f3302a59 5317 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5318 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5319 spec->mux_nids = stac9205_mux_nids;
2549413e 5320 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 5321 spec->smux_nids = stac9205_smux_nids;
5322 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5323 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5324 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5325 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5326 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5327 spec->num_pwrs = 0;
f3302a59
MP		 5328
5329 spec->init = stac9205_core_init;
5330 spec->mixer = stac9205_mixer;
5331
e1f0d669
MR		 5332 spec->aloopback_mask = 0x40;
5333 spec->aloopback_shift = 0;
d9a4268e
TI		 5334 /* Turn on/off EAPD per HP plugging */
5335 if (spec->board_config != STAC_9205_EAPD)
5336 spec->eapd_switch = 1;
f3302a59 5337 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5338
ae0a8ed8 5339 switch (spec->board_config){
ae0a8ed8 5340 case STAC_9205_DELL_M43:
87d48363 5341 /* Enable SPDIF in/out */
af9f341a
TI		 5342 stac_change_pin_config(codec, 0x1f, 0x01441030);
5343 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5344
4fe5195c 5345 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 5346 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5347 if (err < 0)
5348 return err;
c5d08bb5 5349 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 5350 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5351 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 5352 AC_VERB_SET_UNSOLICITED_ENABLE,
5353 AC_USRSP_EN | err);
4fe5195c
MR		 5354
5355 spec->gpio_dir = 0x0b;
0fc9dec4 5356 spec->eapd_mask = 0x01;
4fe5195c
MR		 5357 spec->gpio_mask = 0x1b;
5358 spec->gpio_mute = 0x10;
e2e7d624 5359 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5360 * GPIO3 Low = DRM
87d48363 5361 */
4fe5195c 5362 spec->gpio_data = 0x01;
ae0a8ed8 5363 break;
b2c4f4d7
MR		 5364 case STAC_9205_REF:
5365 /* SPDIF-In enabled */
5366 break;
ae0a8ed8
TD		 5367 default:
5368 /* GPIO0 High = EAPD */
0fc9dec4 5369 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5370 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5371 break;
5372 }
33382403 5373
f3302a59 5374 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5375 if (!err) {
5376 if (spec->board_config < 0) {
5377 printk(KERN_WARNING "hda_codec: No auto-config is "
5378 "available, default to model=ref\n");
5379 spec->board_config = STAC_9205_REF;
5380 goto again;
5381 }
5382 err = -EINVAL;
5383 }
f3302a59
MP		 5384 if (err < 0) {
5385 stac92xx_free(codec);
5386 return err;
5387 }
5388
5389 codec->patch_ops = stac92xx_patch_ops;
5390
2d34e1b3
TI		 5391 codec->proc_widget_hook = stac9205_proc_hook;
5392
f3302a59
MP		 5393 return 0;
5394}
5395
db064e50 5396/*
6d859065 5397 * STAC9872 hack
db064e50
TI		 5398 */
5399
1e137f92 5400static struct hda_verb stac9872_core_init[] = {
1624cb9a 5401 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5402 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5403 {}
5404};
5405
caa10b6e
TI		 5406static struct snd_kcontrol_new stac9872_mixer[] = {
5407 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5408 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5409 STAC_INPUT_SOURCE(1),
5410 { } /* end */
5411};
5412
5413static hda_nid_t stac9872_pin_nids[] = {
5414 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
5415 0x11, 0x13, 0x14,
5416};
5417
5418static hda_nid_t stac9872_adc_nids[] = {
5419 0x8 /*,0x6*/
5420};
5421
5422static hda_nid_t stac9872_mux_nids[] = {
5423 0x15
5424};
5425
6d859065 5426static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5427{
5428 struct sigmatel_spec *spec;
1e137f92 5429 int err;
db064e50 5430
db064e50
TI		 5431 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5432 if (spec == NULL)
5433 return -ENOMEM;
db064e50 5434 codec->spec = spec;
caa10b6e 5435
1e137f92 5436#if 0 /* no model right now */
caa10b6e
TI		 5437 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5438 stac9872_models,
5439 stac9872_cfg_tbl);
1e137f92 5440#endif
db064e50 5441
1e137f92
TI		 5442 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
5443 spec->pin_nids = stac9872_pin_nids;
5444 spec->multiout.dac_nids = spec->dac_nids;
5445 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
5446 spec->adc_nids = stac9872_adc_nids;
5447 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
5448 spec->mux_nids = stac9872_mux_nids;
5449 spec->mixer = stac9872_mixer;
5450 spec->init = stac9872_core_init;
5451
5452 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
5453 if (err < 0) {
5454 stac92xx_free(codec);
5455 return -EINVAL;
5456 }
5457 spec->input_mux = &spec->private_imux;
5458 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI		 5459 return 0;
5460}
5461
5462
2f2f4251
M		 5463/*
5464 * patch entries
5465 */
1289e9e8 5466static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 5467 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5468 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5469 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5470 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5471 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5472 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5473 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5474 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5475 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5476 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5477 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5478 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5479 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5480 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5481 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5482 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5483 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5484 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5485 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5486 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5487 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5488 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5489 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5490 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5491 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5492 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5493 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5494 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5495 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5496 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5497 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5498 /* The following does not take into account .id=0x83847661 when subsys =
5499 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5500 * currently not fully supported.
5501 */
5502 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5503 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5504 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5505 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5506 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5507 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5508 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5509 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5510 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5511 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5512 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5513 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5514 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5515 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5516 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5517 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5518 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5519 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5520 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5521 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5522 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5523 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5524 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5525 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5526 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5527 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5528 {} /* terminator */
5529};
1289e9e8
TI		 5530
5531MODULE_ALIAS("snd-hda-codec-id:8384*");
5532MODULE_ALIAS("snd-hda-codec-id:111d*");
5533
5534MODULE_LICENSE("GPL");
5535MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5536
5537static struct hda_codec_preset_list sigmatel_list = {
5538 .preset = snd_hda_preset_sigmatel,
5539 .owner = THIS_MODULE,
5540};
5541
5542static int __init patch_sigmatel_init(void)
5543{
5544 return snd_hda_add_codec_preset(&sigmatel_list);
5545}
5546
5547static void __exit patch_sigmatel_exit(void)
5548{
5549 snd_hda_delete_codec_preset(&sigmatel_list);
5550}
5551
5552module_init(patch_sigmatel_init)
5553module_exit(patch_sigmatel_exit)
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