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CommitLineData
1da177e4
LT
1/*
2 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
3 * VIA VT1720 (Envy24PT)
4 *
c1017a4c 5 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
1da177e4
LT
6 * 2002 James Stafford <jstafford@ampltd.com>
7 * 2003 Takashi Iwai <tiwai@suse.de>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
1da177e4
LT
25#include <asm/io.h>
26#include <linux/delay.h>
27#include <linux/interrupt.h>
28#include <linux/init.h>
29#include <linux/pci.h>
30#include <linux/slab.h>
31#include <linux/moduleparam.h>
62932df8 32#include <linux/mutex.h>
1da177e4
LT
33#include <sound/core.h>
34#include <sound/info.h>
35#include <sound/mpu401.h>
36#include <sound/initval.h>
37
38#include <sound/asoundef.h>
39
40#include "ice1712.h"
41#include "envy24ht.h"
42
43/* lowlevel routines */
44#include "amp.h"
45#include "revo.h"
46#include "aureon.h"
47#include "vt1720_mobo.h"
48#include "pontis.h"
49#include "prodigy192.h"
6b8d6e55 50#include "prodigy_hifi.h"
1da177e4
LT
51#include "juli.h"
52#include "phase.h"
f6cdab5f 53#include "wtm.h"
f31639b8 54#include "se.h"
1da177e4 55
c1017a4c 56MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT
57MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
58MODULE_LICENSE("GPL");
59MODULE_SUPPORTED_DEVICE("{"
60 REVO_DEVICE_DESC
61 AMP_AUDIO2000_DEVICE_DESC
62 AUREON_DEVICE_DESC
63 VT1720_MOBO_DEVICE_DESC
64 PONTIS_DEVICE_DESC
65 PRODIGY192_DEVICE_DESC
6b8d6e55 66 PRODIGY_HIFI_DEVICE_DESC
1da177e4
LT
67 JULI_DEVICE_DESC
68 PHASE_DEVICE_DESC
f6cdab5f 69 WTM_DEVICE_DESC
f31639b8 70 SE_DEVICE_DESC
1da177e4
LT
71 "{VIA,VT1720},"
72 "{VIA,VT1724},"
73 "{ICEnsemble,Generic ICE1724},"
74 "{ICEnsemble,Generic Envy24HT}"
75 "{ICEnsemble,Generic Envy24PT}}");
76
77static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
78static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
79static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
80static char *model[SNDRV_CARDS];
81
82module_param_array(index, int, NULL, 0444);
83MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
84module_param_array(id, charp, NULL, 0444);
85MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
86module_param_array(enable, bool, NULL, 0444);
87MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
88module_param_array(model, charp, NULL, 0444);
89MODULE_PARM_DESC(model, "Use the given board model.");
90
1da177e4
LT
91
92/* Both VT1720 and VT1724 have the same PCI IDs */
32b47da0 93static const struct pci_device_id snd_vt1724_ids[] = {
1da177e4
LT
94 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
95 { 0, }
96};
97
98MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
99
100
101static int PRO_RATE_LOCKED;
102static int PRO_RATE_RESET = 1;
103static unsigned int PRO_RATE_DEFAULT = 44100;
104
105/*
106 * Basic I/O
107 */
108
d16be8ed
PH
109/*
110 * default rates, default clock routines
111 */
112
1da177e4 113/* check whether the clock mode is spdif-in */
d16be8ed 114static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
1da177e4
LT
115{
116 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
117}
118
ab0c7d72 119static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
1da177e4 120{
d16be8ed 121 return ice->is_spdif_master(ice) || PRO_RATE_LOCKED;
1da177e4
LT
122}
123
124/*
125 * ac97 section
126 */
127
ab0c7d72 128static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
1da177e4
LT
129{
130 unsigned char old_cmd;
131 int tm;
132 for (tm = 0; tm < 0x10000; tm++) {
133 old_cmd = inb(ICEMT1724(ice, AC97_CMD));
134 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
135 continue;
136 if (!(old_cmd & VT1724_AC97_READY))
137 continue;
138 return old_cmd;
139 }
140 snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
141 return old_cmd;
142}
143
ab0c7d72 144static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
1da177e4
LT
145{
146 int tm;
147 for (tm = 0; tm < 0x10000; tm++)
148 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
149 return 0;
150 snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
151 return -EIO;
152}
153
ab0c7d72 154static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT
155 unsigned short reg,
156 unsigned short val)
157{
ab0c7d72 158 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT
159 unsigned char old_cmd;
160
161 old_cmd = snd_vt1724_ac97_ready(ice);
162 old_cmd &= ~VT1724_AC97_ID_MASK;
163 old_cmd |= ac97->num;
164 outb(reg, ICEMT1724(ice, AC97_INDEX));
165 outw(val, ICEMT1724(ice, AC97_DATA));
166 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
167 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
168}
169
ab0c7d72 170static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 171{
ab0c7d72 172 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT
173 unsigned char old_cmd;
174
175 old_cmd = snd_vt1724_ac97_ready(ice);
176 old_cmd &= ~VT1724_AC97_ID_MASK;
177 old_cmd |= ac97->num;
178 outb(reg, ICEMT1724(ice, AC97_INDEX));
179 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
180 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
181 return ~0;
182 return inw(ICEMT1724(ice, AC97_DATA));
183}
184
185
186/*
187 * GPIO operations
188 */
189
190/* set gpio direction 0 = read, 1 = write */
ab0c7d72 191static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT
192{
193 outl(data, ICEREG1724(ice, GPIO_DIRECTION));
194 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
195}
196
197/* set the gpio mask (0 = writable) */
ab0c7d72 198static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT
199{
200 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
201 if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */
202 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
203 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
204}
205
ab0c7d72 206static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT
207{
208 outw(data, ICEREG1724(ice, GPIO_DATA));
209 if (! ice->vt1720)
210 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
211 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
212}
213
ab0c7d72 214static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
1da177e4
LT
215{
216 unsigned int data;
217 if (! ice->vt1720)
218 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
219 else
220 data = 0;
221 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
222 return data;
223}
224
225/*
226 * Interrupt handler
227 */
228
7d12e780 229static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
1da177e4 230{
ab0c7d72 231 struct snd_ice1712 *ice = dev_id;
1da177e4
LT
232 unsigned char status;
233 int handled = 0;
234
235 while (1) {
236 status = inb(ICEREG1724(ice, IRQSTAT));
237 if (status == 0)
238 break;
239
240 handled = 1;
ab0c7d72
TI
241 /* these should probably be separated at some point,
242 * but as we don't currently have MPU support on the board
243 * I will leave it
244 */
1da177e4
LT
245 if ((status & VT1724_IRQ_MPU_RX)||(status & VT1724_IRQ_MPU_TX)) {
246 if (ice->rmidi[0])
7d12e780 247 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
1da177e4
LT
248 outb(status & (VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX), ICEREG1724(ice, IRQSTAT));
249 status &= ~(VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX);
250 }
251 if (status & VT1724_IRQ_MTPCM) {
252 /*
253 * Multi-track PCM
254 * PCM assignment are:
255 * Playback DMA0 (M/C) = playback_pro_substream
256 * Playback DMA1 = playback_con_substream_ds[0]
257 * Playback DMA2 = playback_con_substream_ds[1]
258 * Playback DMA3 = playback_con_substream_ds[2]
259 * Playback DMA4 (SPDIF) = playback_con_substream
260 * Record DMA0 = capture_pro_substream
261 * Record DMA1 = capture_con_substream
262 */
263 unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
264 if (mtstat & VT1724_MULTI_PDMA0) {
265 if (ice->playback_pro_substream)
266 snd_pcm_period_elapsed(ice->playback_pro_substream);
267 }
268 if (mtstat & VT1724_MULTI_RDMA0) {
269 if (ice->capture_pro_substream)
270 snd_pcm_period_elapsed(ice->capture_pro_substream);
271 }
272 if (mtstat & VT1724_MULTI_PDMA1) {
273 if (ice->playback_con_substream_ds[0])
274 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
275 }
276 if (mtstat & VT1724_MULTI_PDMA2) {
277 if (ice->playback_con_substream_ds[1])
278 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
279 }
280 if (mtstat & VT1724_MULTI_PDMA3) {
281 if (ice->playback_con_substream_ds[2])
282 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
283 }
284 if (mtstat & VT1724_MULTI_PDMA4) {
285 if (ice->playback_con_substream)
286 snd_pcm_period_elapsed(ice->playback_con_substream);
287 }
288 if (mtstat & VT1724_MULTI_RDMA1) {
289 if (ice->capture_con_substream)
290 snd_pcm_period_elapsed(ice->capture_con_substream);
291 }
292 /* ack anyway to avoid freeze */
293 outb(mtstat, ICEMT1724(ice, IRQ));
294 /* ought to really handle this properly */
295 if (mtstat & VT1724_MULTI_FIFO_ERR) {
296 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
297 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
298 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
299 /* If I don't do this, I get machine lockup due to continual interrupts */
300 }
301
302 }
303 }
304 return IRQ_RETVAL(handled);
305}
306
307/*
308 * PCM code - professional part (multitrack)
309 */
310
311static unsigned int rates[] = {
312 8000, 9600, 11025, 12000, 16000, 22050, 24000,
313 32000, 44100, 48000, 64000, 88200, 96000,
314 176400, 192000,
315};
316
ab0c7d72 317static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
1da177e4
LT
318 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
319 .list = rates,
320 .mask = 0,
321};
322
ab0c7d72 323static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
1da177e4
LT
324 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
325 .list = rates,
326 .mask = 0,
327};
328
ab0c7d72 329static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
1da177e4
LT
330 .count = ARRAY_SIZE(rates),
331 .list = rates,
332 .mask = 0,
333};
334
335struct vt1724_pcm_reg {
336 unsigned int addr; /* ADDR register offset */
337 unsigned int size; /* SIZE register offset */
338 unsigned int count; /* COUNT register offset */
339 unsigned int start; /* start & pause bit */
340};
341
ab0c7d72 342static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 343{
ab0c7d72 344 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
345 unsigned char what;
346 unsigned char old;
ab0c7d72 347 struct snd_pcm_substream *s;
1da177e4
LT
348
349 what = 0;
ef991b95 350 snd_pcm_group_for_each_entry(s, substream) {
29998d24
CL
351 if (snd_pcm_substream_chip(s) == ice) {
352 const struct vt1724_pcm_reg *reg;
353 reg = s->runtime->private_data;
354 what |= reg->start;
355 snd_pcm_trigger_done(s, substream);
356 }
1da177e4
LT
357 }
358
359 switch (cmd) {
360 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
361 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
362 spin_lock(&ice->reg_lock);
363 old = inb(ICEMT1724(ice, DMA_PAUSE));
364 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
365 old |= what;
366 else
367 old &= ~what;
368 outb(old, ICEMT1724(ice, DMA_PAUSE));
369 spin_unlock(&ice->reg_lock);
370 break;
371
372 case SNDRV_PCM_TRIGGER_START:
373 case SNDRV_PCM_TRIGGER_STOP:
374 spin_lock(&ice->reg_lock);
375 old = inb(ICEMT1724(ice, DMA_CONTROL));
376 if (cmd == SNDRV_PCM_TRIGGER_START)
377 old |= what;
378 else
379 old &= ~what;
380 outb(old, ICEMT1724(ice, DMA_CONTROL));
381 spin_unlock(&ice->reg_lock);
382 break;
383
384 default:
385 return -EINVAL;
386 }
387 return 0;
388}
389
390/*
391 */
392
393#define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
394 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
395#define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
396 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
397
d16be8ed
PH
398static const unsigned int stdclock_rate_list[16] = {
399 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
400 22050, 11025, 88200, 176400, 0, 192000, 64000
401};
402
403static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
1da177e4 404{
d16be8ed
PH
405 unsigned int rate;
406 rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
407 return rate;
408}
409
410static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
411{
412 int i;
413 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
414 if (stdclock_rate_list[i] == rate) {
415 outb(i, ICEMT1724(ice, RATE));
416 return;
417 }
418 }
419}
420
421static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
422 unsigned int rate)
423{
424 unsigned char val, old;
425 /* check MT02 */
1da177e4 426 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
d16be8ed
PH
427 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
428 if (rate > 96000)
429 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
1da177e4 430 else
d16be8ed
PH
431 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
432 if (val != old) {
433 outb(val, ICEMT1724(ice, I2S_FORMAT));
434 /* master clock changed */
435 return 1;
436 }
437 }
438 /* no change in master clock */
439 return 0;
1da177e4
LT
440}
441
ab0c7d72
TI
442static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
443 int force)
1da177e4
LT
444{
445 unsigned long flags;
d16be8ed
PH
446 unsigned char mclk_change;
447 unsigned int i, old_rate;
1da177e4 448
d16be8ed 449 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
1da177e4 450 return;
1da177e4 451 spin_lock_irqsave(&ice->reg_lock, flags);
d16be8ed 452 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
1da177e4
LT
453 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
454 /* running? we cannot change the rate now... */
455 spin_unlock_irqrestore(&ice->reg_lock, flags);
456 return;
457 }
458 if (!force && is_pro_rate_locked(ice)) {
459 spin_unlock_irqrestore(&ice->reg_lock, flags);
460 return;
461 }
462
d16be8ed
PH
463 old_rate = ice->get_rate(ice);
464 if (force || (old_rate != rate))
465 ice->set_rate(ice, rate);
1da177e4
LT
466 else if (rate == ice->cur_rate) {
467 spin_unlock_irqrestore(&ice->reg_lock, flags);
468 return;
469 }
470
471 ice->cur_rate = rate;
472
d16be8ed
PH
473 /* setting master clock */
474 mclk_change = ice->set_mclk(ice, rate);
475
1da177e4
LT
476 spin_unlock_irqrestore(&ice->reg_lock, flags);
477
478 if (mclk_change && ice->gpio.i2s_mclk_changed)
479 ice->gpio.i2s_mclk_changed(ice);
480 if (ice->gpio.set_pro_rate)
481 ice->gpio.set_pro_rate(ice, rate);
482
483 /* set up codecs */
484 for (i = 0; i < ice->akm_codecs; i++) {
485 if (ice->akm[i].ops.set_rate_val)
486 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
487 }
488 if (ice->spdif.ops.setup_rate)
489 ice->spdif.ops.setup_rate(ice, rate);
490}
491
ab0c7d72
TI
492static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
493 struct snd_pcm_hw_params *hw_params)
1da177e4 494{
ab0c7d72 495 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
496 int i, chs;
497
498 chs = params_channels(hw_params);
62932df8 499 mutex_lock(&ice->open_mutex);
1da177e4
LT
500 /* mark surround channels */
501 if (substream == ice->playback_pro_substream) {
502 /* PDMA0 can be multi-channel up to 8 */
503 chs = chs / 2 - 1;
504 for (i = 0; i < chs; i++) {
ab0c7d72
TI
505 if (ice->pcm_reserved[i] &&
506 ice->pcm_reserved[i] != substream) {
62932df8 507 mutex_unlock(&ice->open_mutex);
1da177e4
LT
508 return -EBUSY;
509 }
510 ice->pcm_reserved[i] = substream;
511 }
512 for (; i < 3; i++) {
513 if (ice->pcm_reserved[i] == substream)
514 ice->pcm_reserved[i] = NULL;
515 }
516 } else {
517 for (i = 0; i < 3; i++) {
518 /* check individual playback stream */
519 if (ice->playback_con_substream_ds[i] == substream) {
ab0c7d72
TI
520 if (ice->pcm_reserved[i] &&
521 ice->pcm_reserved[i] != substream) {
62932df8 522 mutex_unlock(&ice->open_mutex);
1da177e4
LT
523 return -EBUSY;
524 }
525 ice->pcm_reserved[i] = substream;
526 break;
527 }
528 }
529 }
62932df8 530 mutex_unlock(&ice->open_mutex);
1da177e4
LT
531 snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
532 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
533}
534
ab0c7d72 535static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4 536{
ab0c7d72 537 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
538 int i;
539
62932df8 540 mutex_lock(&ice->open_mutex);
1da177e4
LT
541 /* unmark surround channels */
542 for (i = 0; i < 3; i++)
543 if (ice->pcm_reserved[i] == substream)
544 ice->pcm_reserved[i] = NULL;
62932df8 545 mutex_unlock(&ice->open_mutex);
1da177e4
LT
546 return snd_pcm_lib_free_pages(substream);
547}
548
ab0c7d72 549static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 550{
ab0c7d72 551 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
552 unsigned char val;
553 unsigned int size;
554
555 spin_lock_irq(&ice->reg_lock);
556 val = (8 - substream->runtime->channels) >> 1;
557 outb(val, ICEMT1724(ice, BURST));
558
559 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
560
561 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
562 // outl(size, ICEMT1724(ice, PLAYBACK_SIZE));
563 outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
564 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
565 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
566 // outl(size, ICEMT1724(ice, PLAYBACK_COUNT));
567 outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
568 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
569
570 spin_unlock_irq(&ice->reg_lock);
571
572 // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream));
573 return 0;
574}
575
ab0c7d72 576static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 577{
ab0c7d72 578 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
579 size_t ptr;
580
581 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
582 return 0;
583#if 0 /* read PLAYBACK_ADDR */
584 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
585 if (ptr < substream->runtime->dma_addr) {
586 snd_printd("ice1724: invalid negative ptr\n");
587 return 0;
588 }
589 ptr -= substream->runtime->dma_addr;
590 ptr = bytes_to_frames(substream->runtime, ptr);
591 if (ptr >= substream->runtime->buffer_size) {
ab0c7d72
TI
592 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
593 (int)ptr, (int)substream->runtime->period_size);
1da177e4
LT
594 return 0;
595 }
596#else /* read PLAYBACK_SIZE */
597 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
598 ptr = (ptr + 1) << 2;
599 ptr = bytes_to_frames(substream->runtime, ptr);
600 if (! ptr)
601 ;
602 else if (ptr <= substream->runtime->buffer_size)
603 ptr = substream->runtime->buffer_size - ptr;
604 else {
ab0c7d72
TI
605 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
606 (int)ptr, (int)substream->runtime->buffer_size);
1da177e4
LT
607 ptr = 0;
608 }
609#endif
610 return ptr;
611}
612
ab0c7d72 613static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
1da177e4 614{
ab0c7d72 615 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
32b47da0 616 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
1da177e4
LT
617
618 spin_lock_irq(&ice->reg_lock);
619 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
ab0c7d72
TI
620 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
621 ice->profi_port + reg->size);
622 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
623 ice->profi_port + reg->count);
1da177e4
LT
624 spin_unlock_irq(&ice->reg_lock);
625 return 0;
626}
627
ab0c7d72 628static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 629{
ab0c7d72 630 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
32b47da0 631 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
1da177e4
LT
632 size_t ptr;
633
634 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
635 return 0;
636#if 0 /* use ADDR register */
637 ptr = inl(ice->profi_port + reg->addr);
638 ptr -= substream->runtime->dma_addr;
639 return bytes_to_frames(substream->runtime, ptr);
640#else /* use SIZE register */
641 ptr = inw(ice->profi_port + reg->size);
642 ptr = (ptr + 1) << 2;
643 ptr = bytes_to_frames(substream->runtime, ptr);
644 if (! ptr)
645 ;
646 else if (ptr <= substream->runtime->buffer_size)
647 ptr = substream->runtime->buffer_size - ptr;
648 else {
ab0c7d72
TI
649 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
650 (int)ptr, (int)substream->runtime->buffer_size);
1da177e4
LT
651 ptr = 0;
652 }
653 return ptr;
654#endif
655}
656
32b47da0 657static const struct vt1724_pcm_reg vt1724_playback_pro_reg = {
1da177e4
LT
658 .addr = VT1724_MT_PLAYBACK_ADDR,
659 .size = VT1724_MT_PLAYBACK_SIZE,
660 .count = VT1724_MT_PLAYBACK_COUNT,
661 .start = VT1724_PDMA0_START,
662};
663
32b47da0 664static const struct vt1724_pcm_reg vt1724_capture_pro_reg = {
1da177e4
LT
665 .addr = VT1724_MT_CAPTURE_ADDR,
666 .size = VT1724_MT_CAPTURE_SIZE,
667 .count = VT1724_MT_CAPTURE_COUNT,
668 .start = VT1724_RDMA0_START,
669};
670
32b47da0 671static const struct snd_pcm_hardware snd_vt1724_playback_pro =
1da177e4
LT
672{
673 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
674 SNDRV_PCM_INFO_BLOCK_TRANSFER |
675 SNDRV_PCM_INFO_MMAP_VALID |
676 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
677 .formats = SNDRV_PCM_FMTBIT_S32_LE,
678 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
679 .rate_min = 8000,
680 .rate_max = 192000,
681 .channels_min = 2,
682 .channels_max = 8,
683 .buffer_bytes_max = (1UL << 21), /* 19bits dword */
684 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
685 .period_bytes_max = (1UL << 21),
686 .periods_min = 2,
687 .periods_max = 1024,
688};
689
32b47da0 690static const struct snd_pcm_hardware snd_vt1724_spdif =
1da177e4
LT
691{
692 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
693 SNDRV_PCM_INFO_BLOCK_TRANSFER |
694 SNDRV_PCM_INFO_MMAP_VALID |
695 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
696 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2dfbeca9
TI
697 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
698 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
699 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
700 SNDRV_PCM_RATE_192000),
1da177e4 701 .rate_min = 32000,
2dfbeca9 702 .rate_max = 192000,
1da177e4
LT
703 .channels_min = 2,
704 .channels_max = 2,
705 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
706 .period_bytes_min = 2 * 4 * 2,
707 .period_bytes_max = (1UL << 18),
708 .periods_min = 2,
709 .periods_max = 1024,
710};
711
32b47da0 712static const struct snd_pcm_hardware snd_vt1724_2ch_stereo =
1da177e4
LT
713{
714 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
715 SNDRV_PCM_INFO_BLOCK_TRANSFER |
716 SNDRV_PCM_INFO_MMAP_VALID |
717 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
718 .formats = SNDRV_PCM_FMTBIT_S32_LE,
719 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
720 .rate_min = 8000,
721 .rate_max = 192000,
722 .channels_min = 2,
723 .channels_max = 2,
724 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
725 .period_bytes_min = 2 * 4 * 2,
726 .period_bytes_max = (1UL << 18),
727 .periods_min = 2,
728 .periods_max = 1024,
729};
730
731/*
732 * set rate constraints
733 */
d16be8ed 734static void set_std_hw_rates(struct snd_ice1712 *ice)
1da177e4 735{
1da177e4
LT
736 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
737 /* I2S */
738 /* VT1720 doesn't support more than 96kHz */
739 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
d16be8ed
PH
740 ice->hw_rates = &hw_constraints_rates_192;
741 else
742 ice->hw_rates = &hw_constraints_rates_96;
743 } else {
1da177e4 744 /* ACLINK */
d16be8ed 745 ice->hw_rates = &hw_constraints_rates_48;
1da177e4 746 }
d16be8ed
PH
747}
748
749static int set_rate_constraints(struct snd_ice1712 *ice,
750 struct snd_pcm_substream *substream)
751{
752 struct snd_pcm_runtime *runtime = substream->runtime;
753
754 runtime->hw.rate_min = ice->hw_rates->list[0];
755 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
756 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
757 return snd_pcm_hw_constraint_list(runtime, 0,
758 SNDRV_PCM_HW_PARAM_RATE,
759 ice->hw_rates);
1da177e4
LT
760}
761
762/* multi-channel playback needs alignment 8x32bit regardless of the channels
763 * actually used
764 */
765#define VT1724_BUFFER_ALIGN 0x20
766
ab0c7d72 767static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
1da177e4 768{
ab0c7d72
TI
769 struct snd_pcm_runtime *runtime = substream->runtime;
770 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
771 int chs;
772
32b47da0 773 runtime->private_data = (void *)&vt1724_playback_pro_reg;
1da177e4
LT
774 ice->playback_pro_substream = substream;
775 runtime->hw = snd_vt1724_playback_pro;
776 snd_pcm_set_sync(substream);
777 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
778 set_rate_constraints(ice, substream);
62932df8 779 mutex_lock(&ice->open_mutex);
1da177e4
LT
780 /* calculate the currently available channels */
781 for (chs = 0; chs < 3; chs++) {
782 if (ice->pcm_reserved[chs])
783 break;
784 }
785 chs = (chs + 1) * 2;
786 runtime->hw.channels_max = chs;
787 if (chs > 2) /* channels must be even */
788 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
62932df8 789 mutex_unlock(&ice->open_mutex);
1da177e4
LT
790 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
791 VT1724_BUFFER_ALIGN);
792 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
793 VT1724_BUFFER_ALIGN);
794 return 0;
795}
796
ab0c7d72 797static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
1da177e4 798{
ab0c7d72
TI
799 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
800 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 801
32b47da0 802 runtime->private_data = (void *)&vt1724_capture_pro_reg;
1da177e4
LT
803 ice->capture_pro_substream = substream;
804 runtime->hw = snd_vt1724_2ch_stereo;
805 snd_pcm_set_sync(substream);
806 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
807 set_rate_constraints(ice, substream);
808 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
809 VT1724_BUFFER_ALIGN);
810 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
811 VT1724_BUFFER_ALIGN);
812 return 0;
813}
814
ab0c7d72 815static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
1da177e4 816{
ab0c7d72 817 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
818
819 if (PRO_RATE_RESET)
d16be8ed 820 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4
LT
821 ice->playback_pro_substream = NULL;
822
823 return 0;
824}
825
ab0c7d72 826static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
1da177e4 827{
ab0c7d72 828 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
829
830 if (PRO_RATE_RESET)
d16be8ed 831 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4
LT
832 ice->capture_pro_substream = NULL;
833 return 0;
834}
835
ab0c7d72 836static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
1da177e4
LT
837 .open = snd_vt1724_playback_pro_open,
838 .close = snd_vt1724_playback_pro_close,
839 .ioctl = snd_pcm_lib_ioctl,
840 .hw_params = snd_vt1724_pcm_hw_params,
841 .hw_free = snd_vt1724_pcm_hw_free,
842 .prepare = snd_vt1724_playback_pro_prepare,
843 .trigger = snd_vt1724_pcm_trigger,
844 .pointer = snd_vt1724_playback_pro_pointer,
845};
846
ab0c7d72 847static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
1da177e4
LT
848 .open = snd_vt1724_capture_pro_open,
849 .close = snd_vt1724_capture_pro_close,
850 .ioctl = snd_pcm_lib_ioctl,
851 .hw_params = snd_vt1724_pcm_hw_params,
852 .hw_free = snd_vt1724_pcm_hw_free,
853 .prepare = snd_vt1724_pcm_prepare,
854 .trigger = snd_vt1724_pcm_trigger,
855 .pointer = snd_vt1724_pcm_pointer,
856};
857
ab0c7d72 858static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 * ice, int device)
1da177e4 859{
ab0c7d72 860 struct snd_pcm *pcm;
1da177e4
LT
861 int err;
862
863 err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
864 if (err < 0)
865 return err;
866
867 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
868 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
869
870 pcm->private_data = ice;
871 pcm->info_flags = 0;
872 strcpy(pcm->name, "ICE1724");
873
874 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI
875 snd_dma_pci_data(ice->pci),
876 256*1024, 256*1024);
1da177e4
LT
877
878 ice->pcm_pro = pcm;
879
880 return 0;
881}
882
883
884/*
885 * SPDIF PCM
886 */
887
32b47da0 888static const struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
1da177e4
LT
889 .addr = VT1724_MT_PDMA4_ADDR,
890 .size = VT1724_MT_PDMA4_SIZE,
891 .count = VT1724_MT_PDMA4_COUNT,
892 .start = VT1724_PDMA4_START,
893};
894
32b47da0 895static const struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
1da177e4
LT
896 .addr = VT1724_MT_RDMA1_ADDR,
897 .size = VT1724_MT_RDMA1_SIZE,
898 .count = VT1724_MT_RDMA1_COUNT,
899 .start = VT1724_RDMA1_START,
900};
901
902/* update spdif control bits; call with reg_lock */
ab0c7d72 903static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
1da177e4
LT
904{
905 unsigned char cbit, disabled;
906
907 cbit = inb(ICEREG1724(ice, SPDIF_CFG));
908 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
909 if (cbit != disabled)
910 outb(disabled, ICEREG1724(ice, SPDIF_CFG));
911 outw(val, ICEMT1724(ice, SPDIF_CTRL));
912 if (cbit != disabled)
913 outb(cbit, ICEREG1724(ice, SPDIF_CFG));
914 outw(val, ICEMT1724(ice, SPDIF_CTRL));
915}
916
917/* update SPDIF control bits according to the given rate */
ab0c7d72 918static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
1da177e4
LT
919{
920 unsigned int val, nval;
921 unsigned long flags;
922
923 spin_lock_irqsave(&ice->reg_lock, flags);
924 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
925 nval &= ~(7 << 12);
926 switch (rate) {
927 case 44100: break;
928 case 48000: nval |= 2 << 12; break;
929 case 32000: nval |= 3 << 12; break;
2dfbeca9
TI
930 case 88200: nval |= 4 << 12; break;
931 case 96000: nval |= 5 << 12; break;
932 case 192000: nval |= 6 << 12; break;
933 case 176400: nval |= 7 << 12; break;
1da177e4
LT
934 }
935 if (val != nval)
936 update_spdif_bits(ice, nval);
937 spin_unlock_irqrestore(&ice->reg_lock, flags);
938}
939
ab0c7d72 940static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
1da177e4 941{
ab0c7d72 942 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
943 if (! ice->force_pdma4)
944 update_spdif_rate(ice, substream->runtime->rate);
945 return snd_vt1724_pcm_prepare(substream);
946}
947
ab0c7d72 948static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
1da177e4 949{
ab0c7d72
TI
950 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
951 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 952
32b47da0 953 runtime->private_data = (void *)&vt1724_playback_spdif_reg;
1da177e4
LT
954 ice->playback_con_substream = substream;
955 if (ice->force_pdma4) {
956 runtime->hw = snd_vt1724_2ch_stereo;
957 set_rate_constraints(ice, substream);
958 } else
959 runtime->hw = snd_vt1724_spdif;
960 snd_pcm_set_sync(substream);
961 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
962 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
963 VT1724_BUFFER_ALIGN);
964 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
965 VT1724_BUFFER_ALIGN);
c93f5a1e
TI
966 if (ice->spdif.ops.open)
967 ice->spdif.ops.open(ice, substream);
1da177e4
LT
968 return 0;
969}
970
ab0c7d72 971static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
1da177e4 972{
ab0c7d72 973 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
974
975 if (PRO_RATE_RESET)
d16be8ed 976 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4 977 ice->playback_con_substream = NULL;
c93f5a1e
TI
978 if (ice->spdif.ops.close)
979 ice->spdif.ops.close(ice, substream);
1da177e4
LT
980
981 return 0;
982}
983
ab0c7d72 984static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
1da177e4 985{
ab0c7d72
TI
986 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
987 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 988
32b47da0 989 runtime->private_data = (void *)&vt1724_capture_spdif_reg;
1da177e4
LT
990 ice->capture_con_substream = substream;
991 if (ice->force_rdma1) {
992 runtime->hw = snd_vt1724_2ch_stereo;
993 set_rate_constraints(ice, substream);
994 } else
995 runtime->hw = snd_vt1724_spdif;
996 snd_pcm_set_sync(substream);
997 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
998 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
999 VT1724_BUFFER_ALIGN);
1000 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1001 VT1724_BUFFER_ALIGN);
c93f5a1e
TI
1002 if (ice->spdif.ops.open)
1003 ice->spdif.ops.open(ice, substream);
1da177e4
LT
1004 return 0;
1005}
1006
ab0c7d72 1007static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1008{
ab0c7d72 1009 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1010
1011 if (PRO_RATE_RESET)
d16be8ed 1012 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4 1013 ice->capture_con_substream = NULL;
c93f5a1e
TI
1014 if (ice->spdif.ops.close)
1015 ice->spdif.ops.close(ice, substream);
1da177e4
LT
1016
1017 return 0;
1018}
1019
ab0c7d72 1020static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
1da177e4
LT
1021 .open = snd_vt1724_playback_spdif_open,
1022 .close = snd_vt1724_playback_spdif_close,
1023 .ioctl = snd_pcm_lib_ioctl,
1024 .hw_params = snd_vt1724_pcm_hw_params,
1025 .hw_free = snd_vt1724_pcm_hw_free,
1026 .prepare = snd_vt1724_playback_spdif_prepare,
1027 .trigger = snd_vt1724_pcm_trigger,
1028 .pointer = snd_vt1724_pcm_pointer,
1029};
1030
ab0c7d72 1031static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
1da177e4
LT
1032 .open = snd_vt1724_capture_spdif_open,
1033 .close = snd_vt1724_capture_spdif_close,
1034 .ioctl = snd_pcm_lib_ioctl,
1035 .hw_params = snd_vt1724_pcm_hw_params,
1036 .hw_free = snd_vt1724_pcm_hw_free,
1037 .prepare = snd_vt1724_pcm_prepare,
1038 .trigger = snd_vt1724_pcm_trigger,
1039 .pointer = snd_vt1724_pcm_pointer,
1040};
1041
1042
ab0c7d72 1043static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 * ice, int device)
1da177e4
LT
1044{
1045 char *name;
ab0c7d72 1046 struct snd_pcm *pcm;
1da177e4
LT
1047 int play, capt;
1048 int err;
1049
1050 if (ice->force_pdma4 ||
1051 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
1052 play = 1;
1053 ice->has_spdif = 1;
1054 } else
1055 play = 0;
1056 if (ice->force_rdma1 ||
1057 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
1058 capt = 1;
1059 ice->has_spdif = 1;
1060 } else
1061 capt = 0;
1062 if (! play && ! capt)
1063 return 0; /* no spdif device */
1064
1065 if (ice->force_pdma4 || ice->force_rdma1)
1066 name = "ICE1724 Secondary";
1067 else
1068 name = "IEC1724 IEC958";
1069 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
1070 if (err < 0)
1071 return err;
1072
1073 if (play)
1074 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1075 &snd_vt1724_playback_spdif_ops);
1076 if (capt)
1077 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1078 &snd_vt1724_capture_spdif_ops);
1079
1080 pcm->private_data = ice;
1081 pcm->info_flags = 0;
1082 strcpy(pcm->name, name);
1083
1084 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI
1085 snd_dma_pci_data(ice->pci),
1086 64*1024, 64*1024);
1da177e4
LT
1087
1088 ice->pcm = pcm;
1089
1090 return 0;
1091}
1092
1093
1094/*
1095 * independent surround PCMs
1096 */
1097
32b47da0 1098static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
1da177e4
LT
1099 {
1100 .addr = VT1724_MT_PDMA1_ADDR,
1101 .size = VT1724_MT_PDMA1_SIZE,
1102 .count = VT1724_MT_PDMA1_COUNT,
1103 .start = VT1724_PDMA1_START,
1104 },
1105 {
1106 .addr = VT1724_MT_PDMA2_ADDR,
1107 .size = VT1724_MT_PDMA2_SIZE,
1108 .count = VT1724_MT_PDMA2_COUNT,
1109 .start = VT1724_PDMA2_START,
1110 },
1111 {
1112 .addr = VT1724_MT_PDMA3_ADDR,
1113 .size = VT1724_MT_PDMA3_SIZE,
1114 .count = VT1724_MT_PDMA3_COUNT,
1115 .start = VT1724_PDMA3_START,
1116 },
1117};
1118
ab0c7d72 1119static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
1da177e4 1120{
ab0c7d72 1121 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1122 unsigned char val;
1123
1124 spin_lock_irq(&ice->reg_lock);
1125 val = 3 - substream->number;
1126 if (inb(ICEMT1724(ice, BURST)) < val)
1127 outb(val, ICEMT1724(ice, BURST));
1128 spin_unlock_irq(&ice->reg_lock);
1129 return snd_vt1724_pcm_prepare(substream);
1130}
1131
ab0c7d72 1132static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
1da177e4 1133{
ab0c7d72
TI
1134 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1135 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 1136
62932df8 1137 mutex_lock(&ice->open_mutex);
1da177e4
LT
1138 /* already used by PDMA0? */
1139 if (ice->pcm_reserved[substream->number]) {
62932df8 1140 mutex_unlock(&ice->open_mutex);
1da177e4
LT
1141 return -EBUSY; /* FIXME: should handle blocking mode properly */
1142 }
62932df8 1143 mutex_unlock(&ice->open_mutex);
32b47da0 1144 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
1da177e4
LT
1145 ice->playback_con_substream_ds[substream->number] = substream;
1146 runtime->hw = snd_vt1724_2ch_stereo;
1147 snd_pcm_set_sync(substream);
1148 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1149 set_rate_constraints(ice, substream);
1150 return 0;
1151}
1152
ab0c7d72 1153static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
1da177e4 1154{
ab0c7d72 1155 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT
1156
1157 if (PRO_RATE_RESET)
d16be8ed 1158 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4
LT
1159 ice->playback_con_substream_ds[substream->number] = NULL;
1160 ice->pcm_reserved[substream->number] = NULL;
1161
1162 return 0;
1163}
1164
ab0c7d72 1165static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
1da177e4
LT
1166 .open = snd_vt1724_playback_indep_open,
1167 .close = snd_vt1724_playback_indep_close,
1168 .ioctl = snd_pcm_lib_ioctl,
1169 .hw_params = snd_vt1724_pcm_hw_params,
1170 .hw_free = snd_vt1724_pcm_hw_free,
1171 .prepare = snd_vt1724_playback_indep_prepare,
1172 .trigger = snd_vt1724_pcm_trigger,
1173 .pointer = snd_vt1724_pcm_pointer,
1174};
1175
1176
ab0c7d72 1177static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 * ice, int device)
1da177e4 1178{
ab0c7d72 1179 struct snd_pcm *pcm;
1da177e4
LT
1180 int play;
1181 int err;
1182
1183 play = ice->num_total_dacs / 2 - 1;
1184 if (play <= 0)
1185 return 0;
1186
1187 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
1188 if (err < 0)
1189 return err;
1190
1191 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1192 &snd_vt1724_playback_indep_ops);
1193
1194 pcm->private_data = ice;
1195 pcm->info_flags = 0;
1196 strcpy(pcm->name, "ICE1724 Surround PCM");
1197
1198 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI
1199 snd_dma_pci_data(ice->pci),
1200 64*1024, 64*1024);
1da177e4
LT
1201
1202 ice->pcm_ds = pcm;
1203
1204 return 0;
1205}
1206
1207
1208/*
1209 * Mixer section
1210 */
1211
ab0c7d72 1212static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 * ice)
1da177e4
LT
1213{
1214 int err;
1215
1216 if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
ab0c7d72
TI
1217 struct snd_ac97_bus *pbus;
1218 struct snd_ac97_template ac97;
1219 static struct snd_ac97_bus_ops ops = {
1da177e4
LT
1220 .write = snd_vt1724_ac97_write,
1221 .read = snd_vt1724_ac97_read,
1222 };
1223
1224 /* cold reset */
1225 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
1226 mdelay(5); /* FIXME */
1227 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
1228
1229 if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0)
1230 return err;
1231 memset(&ac97, 0, sizeof(ac97));
1232 ac97.private_data = ice;
1233 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1234 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1235 else
1236 return 0;
1237 }
1238 /* I2S mixer only */
1239 strcat(ice->card->mixername, "ICE1724 - multitrack");
1240 return 0;
1241}
1242
1243/*
1244 *
1245 */
1246
ab0c7d72 1247static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
1da177e4
LT
1248{
1249 return (unsigned int)ice->eeprom.data[idx] | \
1250 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
1251 ((unsigned int)ice->eeprom.data[idx + 2] << 16);
1252}
1253
ab0c7d72
TI
1254static void snd_vt1724_proc_read(struct snd_info_entry *entry,
1255 struct snd_info_buffer *buffer)
1da177e4 1256{
ab0c7d72 1257 struct snd_ice1712 *ice = entry->private_data;
1da177e4
LT
1258 unsigned int idx;
1259
1260 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1261 snd_iprintf(buffer, "EEPROM:\n");
1262
1263 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1264 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1265 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
ab0c7d72
TI
1266 snd_iprintf(buffer, " System Config : 0x%x\n",
1267 ice->eeprom.data[ICE_EEP2_SYSCONF]);
1268 snd_iprintf(buffer, " ACLink : 0x%x\n",
1269 ice->eeprom.data[ICE_EEP2_ACLINK]);
1270 snd_iprintf(buffer, " I2S : 0x%x\n",
1271 ice->eeprom.data[ICE_EEP2_I2S]);
1272 snd_iprintf(buffer, " S/PDIF : 0x%x\n",
1273 ice->eeprom.data[ICE_EEP2_SPDIF]);
1274 snd_iprintf(buffer, " GPIO direction : 0x%x\n",
1275 ice->eeprom.gpiodir);
1276 snd_iprintf(buffer, " GPIO mask : 0x%x\n",
1277 ice->eeprom.gpiomask);
1278 snd_iprintf(buffer, " GPIO state : 0x%x\n",
1279 ice->eeprom.gpiostate);
1da177e4 1280 for (idx = 0x12; idx < ice->eeprom.size; idx++)
ab0c7d72
TI
1281 snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
1282 idx, ice->eeprom.data[idx]);
1da177e4
LT
1283
1284 snd_iprintf(buffer, "\nRegisters:\n");
1285
ab0c7d72
TI
1286 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
1287 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
1da177e4 1288 for (idx = 0x0; idx < 0x20 ; idx++)
ab0c7d72
TI
1289 snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
1290 idx, inb(ice->port+idx));
1da177e4 1291 for (idx = 0x0; idx < 0x30 ; idx++)
ab0c7d72
TI
1292 snd_iprintf(buffer, " MT%02x : 0x%02x\n",
1293 idx, inb(ice->profi_port+idx));
1da177e4
LT
1294}
1295
ab0c7d72 1296static void __devinit snd_vt1724_proc_init(struct snd_ice1712 * ice)
1da177e4 1297{
ab0c7d72 1298 struct snd_info_entry *entry;
1da177e4
LT
1299
1300 if (! snd_card_proc_new(ice->card, "ice1724", &entry))
bf850204 1301 snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
1da177e4
LT
1302}
1303
1304/*
1305 *
1306 */
1307
ab0c7d72
TI
1308static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
1309 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1310{
1311 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
ab0c7d72 1312 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1da177e4
LT
1313 return 0;
1314}
1315
ab0c7d72
TI
1316static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
1317 struct snd_ctl_elem_value *ucontrol)
1da177e4 1318{
ab0c7d72 1319 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1320
1321 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1322 return 0;
1323}
1324
1b60f6b0 1325static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
1da177e4
LT
1326 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1327 .name = "ICE1724 EEPROM",
1328 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1329 .info = snd_vt1724_eeprom_info,
1330 .get = snd_vt1724_eeprom_get
1331};
1332
1333/*
1334 */
ab0c7d72
TI
1335static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
1336 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1337{
1338 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1339 uinfo->count = 1;
1340 return 0;
1341}
1342
ab0c7d72 1343static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
1da177e4 1344{
2dfbeca9 1345 unsigned int val, rbits;
1da177e4
LT
1346
1347 val = diga->status[0] & 0x03; /* professional, non-audio */
1348 if (val & 0x01) {
1349 /* professional */
ab0c7d72
TI
1350 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
1351 IEC958_AES0_PRO_EMPHASIS_5015)
1da177e4 1352 val |= 1U << 3;
2dfbeca9
TI
1353 rbits = (diga->status[4] >> 3) & 0x0f;
1354 if (rbits) {
1355 switch (rbits) {
1356 case 2: val |= 5 << 12; break; /* 96k */
1357 case 3: val |= 6 << 12; break; /* 192k */
1358 case 10: val |= 4 << 12; break; /* 88.2k */
1359 case 11: val |= 7 << 12; break; /* 176.4k */
1360 }
1361 } else {
1362 switch (diga->status[0] & IEC958_AES0_PRO_FS) {
1363 case IEC958_AES0_PRO_FS_44100:
1364 break;
1365 case IEC958_AES0_PRO_FS_32000:
1366 val |= 3U << 12;
1367 break;
1368 default:
1369 val |= 2U << 12;
1370 break;
1371 }
1da177e4
LT
1372 }
1373 } else {
1374 /* consumer */
1375 val |= diga->status[1] & 0x04; /* copyright */
ab0c7d72
TI
1376 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
1377 IEC958_AES0_CON_EMPHASIS_5015)
1da177e4
LT
1378 val |= 1U << 3;
1379 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
1380 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
1381 }
1382 return val;
1383}
1384
ab0c7d72 1385static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
1da177e4
LT
1386{
1387 memset(diga->status, 0, sizeof(diga->status));
1388 diga->status[0] = val & 0x03; /* professional, non-audio */
1389 if (val & 0x01) {
1390 /* professional */
1391 if (val & (1U << 3))
1392 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
1393 switch ((val >> 12) & 0x7) {
1394 case 0:
1395 break;
1396 case 2:
1397 diga->status[0] |= IEC958_AES0_PRO_FS_32000;
1398 break;
1399 default:
1400 diga->status[0] |= IEC958_AES0_PRO_FS_48000;
1401 break;
1402 }
1403 } else {
1404 /* consumer */
1405 diga->status[0] |= val & (1U << 2); /* copyright */
1406 if (val & (1U << 3))
1407 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
1408 diga->status[1] |= (val >> 4) & 0x3f; /* category */
1409 diga->status[3] |= (val >> 12) & 0x07; /* fs */
1410 }
1411}
1412
ab0c7d72
TI
1413static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
1414 struct snd_ctl_elem_value *ucontrol)
1da177e4 1415{
ab0c7d72 1416 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1417 unsigned int val;
1418 val = inw(ICEMT1724(ice, SPDIF_CTRL));
1419 decode_spdif_bits(&ucontrol->value.iec958, val);
1420 return 0;
1421}
1422
ab0c7d72
TI
1423static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
1424 struct snd_ctl_elem_value *ucontrol)
1da177e4 1425{
ab0c7d72 1426 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1427 unsigned int val, old;
1428
1429 val = encode_spdif_bits(&ucontrol->value.iec958);
1430 spin_lock_irq(&ice->reg_lock);
1431 old = inw(ICEMT1724(ice, SPDIF_CTRL));
1432 if (val != old)
1433 update_spdif_bits(ice, val);
1434 spin_unlock_irq(&ice->reg_lock);
1435 return (val != old);
1436}
1437
1b60f6b0 1438static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
1da177e4
LT
1439{
1440 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1441 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1442 .info = snd_vt1724_spdif_info,
1443 .get = snd_vt1724_spdif_default_get,
1444 .put = snd_vt1724_spdif_default_put
1445};
1446
ab0c7d72
TI
1447static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1448 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
1449{
1450 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1451 IEC958_AES0_PROFESSIONAL |
1452 IEC958_AES0_CON_NOT_COPYRIGHT |
1453 IEC958_AES0_CON_EMPHASIS;
1454 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1455 IEC958_AES1_CON_CATEGORY;
1456 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1457 return 0;
1458}
1459
ab0c7d72
TI
1460static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1461 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
1462{
1463 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1464 IEC958_AES0_PROFESSIONAL |
1465 IEC958_AES0_PRO_FS |
1466 IEC958_AES0_PRO_EMPHASIS;
1467 return 0;
1468}
1469
1b60f6b0 1470static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
1da177e4
LT
1471{
1472 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1473 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT
1474 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1475 .info = snd_vt1724_spdif_info,
1476 .get = snd_vt1724_spdif_maskc_get,
1477};
1478
1b60f6b0 1479static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
1da177e4
LT
1480{
1481 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1482 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT
1483 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1484 .info = snd_vt1724_spdif_info,
1485 .get = snd_vt1724_spdif_maskp_get,
1486};
1487
a5ce8890 1488#define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
1da177e4 1489
ab0c7d72
TI
1490static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
1491 struct snd_ctl_elem_value *ucontrol)
1da177e4 1492{
ab0c7d72
TI
1493 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1494 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
1495 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
1da177e4
LT
1496 return 0;
1497}
1498
ab0c7d72
TI
1499static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
1500 struct snd_ctl_elem_value *ucontrol)
1da177e4 1501{
ab0c7d72 1502 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1503 unsigned char old, val;
1504
1505 spin_lock_irq(&ice->reg_lock);
1506 old = val = inb(ICEREG1724(ice, SPDIF_CFG));
1507 val &= ~VT1724_CFG_SPDIF_OUT_EN;
1508 if (ucontrol->value.integer.value[0])
1509 val |= VT1724_CFG_SPDIF_OUT_EN;
1510 if (old != val)
1511 outb(val, ICEREG1724(ice, SPDIF_CFG));
1512 spin_unlock_irq(&ice->reg_lock);
1513 return old != val;
1514}
1515
1b60f6b0 1516static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
1da177e4
LT
1517{
1518 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1519 /* FIXME: the following conflict with IEC958 Playback Route */
1520 // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),
10e8d78a 1521 .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
1da177e4
LT
1522 .info = snd_vt1724_spdif_sw_info,
1523 .get = snd_vt1724_spdif_sw_get,
1524 .put = snd_vt1724_spdif_sw_put
1525};
1526
1527
1528#if 0 /* NOT USED YET */
1529/*
1530 * GPIO access from extern
1531 */
1532
a5ce8890 1533#define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
1da177e4 1534
ab0c7d72
TI
1535int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
1536 struct snd_ctl_elem_value *ucontrol)
1da177e4 1537{
ab0c7d72 1538 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1539 int shift = kcontrol->private_value & 0xff;
1540 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1541
1542 snd_ice1712_save_gpio_status(ice);
ab0c7d72
TI
1543 ucontrol->value.integer.value[0] =
1544 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
1da177e4
LT
1545 snd_ice1712_restore_gpio_status(ice);
1546 return 0;
1547}
1548
ab0c7d72
TI
1549int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1550 struct snd_ctl_elem_value *ucontrol)
1da177e4 1551{
ab0c7d72 1552 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1553 int shift = kcontrol->private_value & 0xff;
1554 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1555 unsigned int val, nval;
1556
1557 if (kcontrol->private_value & (1 << 31))
1558 return -EPERM;
1559 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
1560 snd_ice1712_save_gpio_status(ice);
1561 val = snd_ice1712_gpio_read(ice);
1562 nval |= val & ~(1 << shift);
1563 if (val != nval)
1564 snd_ice1712_gpio_write(ice, nval);
1565 snd_ice1712_restore_gpio_status(ice);
1566 return val != nval;
1567}
1568#endif /* NOT USED YET */
1569
1570/*
1571 * rate
1572 */
ab0c7d72
TI
1573static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1574 struct snd_ctl_elem_info *uinfo)
1da177e4 1575{
ab0c7d72 1576 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1577
1578 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1579 uinfo->count = 1;
d16be8ed 1580 uinfo->value.enumerated.items = ice->hw_rates->count + 1;
1da177e4
LT
1581 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1582 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
d16be8ed
PH
1583 if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
1584 strcpy(uinfo->value.enumerated.name, "IEC958 Input");
1585 else
1586 sprintf(uinfo->value.enumerated.name, "%d",
1587 ice->hw_rates->list[uinfo->value.enumerated.item]);
1da177e4
LT
1588 return 0;
1589}
1590
ab0c7d72
TI
1591static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1592 struct snd_ctl_elem_value *ucontrol)
1da177e4 1593{
ab0c7d72 1594 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
d16be8ed 1595 unsigned int i, rate;
1da177e4
LT
1596
1597 spin_lock_irq(&ice->reg_lock);
d16be8ed
PH
1598 if (ice->is_spdif_master(ice)) {
1599 ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
1da177e4 1600 } else {
d16be8ed
PH
1601 rate = ice->get_rate(ice);
1602 ucontrol->value.enumerated.item[0] = 0;
1603 for (i = 0; i < ice->hw_rates->count; i++) {
1604 if (ice->hw_rates->list[i] == rate) {
1605 ucontrol->value.enumerated.item[0] = i;
1606 break;
1607 }
1da177e4 1608 }
1da177e4
LT
1609 }
1610 spin_unlock_irq(&ice->reg_lock);
1611 return 0;
1612}
1613
d16be8ed
PH
1614/* setting clock to external - SPDIF */
1615static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
1616{
1617 unsigned char oval;
1618 unsigned char i2s_oval;
1619 oval = inb(ICEMT1724(ice, RATE));
1620 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1621 /* setting 256fs */
1622 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
1623 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
1624}
1625
ab0c7d72
TI
1626static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1627 struct snd_ctl_elem_value *ucontrol)
1da177e4 1628{
ab0c7d72 1629 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
d16be8ed
PH
1630 unsigned int old_rate, new_rate;
1631 unsigned int item = ucontrol->value.enumerated.item[0];
1632 unsigned int spdif = ice->hw_rates->count;
1633
1634 if (item > spdif)
1635 return -EINVAL;
1da177e4
LT
1636
1637 spin_lock_irq(&ice->reg_lock);
d16be8ed
PH
1638 if (ice->is_spdif_master(ice))
1639 old_rate = 0;
1640 else
1641 old_rate = ice->get_rate(ice);
1642 if (item == spdif) {
1643 /* switching to external clock via SPDIF */
1644 ice->set_spdif_clock(ice);
1645 new_rate = 0;
1da177e4 1646 } else {
d16be8ed
PH
1647 /* internal on-card clock */
1648 new_rate = ice->hw_rates->list[item];
1649 ice->pro_rate_default = new_rate;
1650 spin_unlock_irq(&ice->reg_lock);
1651 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
1652 spin_lock_irq(&ice->reg_lock);
1da177e4 1653 }
1da177e4
LT
1654 spin_unlock_irq(&ice->reg_lock);
1655
d16be8ed
PH
1656 /* the first reset to the SPDIF master mode? */
1657 if (old_rate != new_rate && !new_rate) {
1da177e4 1658 /* notify akm chips as well */
d16be8ed
PH
1659 unsigned int i;
1660 if (ice->gpio.set_pro_rate)
1661 ice->gpio.set_pro_rate(ice, 0);
1662 for (i = 0; i < ice->akm_codecs; i++) {
1663 if (ice->akm[i].ops.set_rate_val)
1664 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1da177e4
LT
1665 }
1666 }
d16be8ed 1667 return old_rate != new_rate;
1da177e4
LT
1668}
1669
1b60f6b0 1670static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
1da177e4
LT
1671 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1672 .name = "Multi Track Internal Clock",
1673 .info = snd_vt1724_pro_internal_clock_info,
1674 .get = snd_vt1724_pro_internal_clock_get,
1675 .put = snd_vt1724_pro_internal_clock_put
1676};
1677
a5ce8890 1678#define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
1da177e4 1679
ab0c7d72
TI
1680static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1681 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
1682{
1683 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1684 return 0;
1685}
1686
ab0c7d72
TI
1687static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1688 struct snd_ctl_elem_value *ucontrol)
1da177e4 1689{
ab0c7d72 1690 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1691 int change = 0, nval;
1692
1693 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1694 spin_lock_irq(&ice->reg_lock);
1695 change = PRO_RATE_LOCKED != nval;
1696 PRO_RATE_LOCKED = nval;
1697 spin_unlock_irq(&ice->reg_lock);
1698 return change;
1699}
1700
1b60f6b0 1701static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
1da177e4
LT
1702 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1703 .name = "Multi Track Rate Locking",
1704 .info = snd_vt1724_pro_rate_locking_info,
1705 .get = snd_vt1724_pro_rate_locking_get,
1706 .put = snd_vt1724_pro_rate_locking_put
1707};
1708
a5ce8890 1709#define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
1da177e4 1710
ab0c7d72
TI
1711static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
1712 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT
1713{
1714 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
1715 return 0;
1716}
1717
ab0c7d72
TI
1718static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
1719 struct snd_ctl_elem_value *ucontrol)
1da177e4 1720{
ab0c7d72 1721 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1722 int change = 0, nval;
1723
1724 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1725 spin_lock_irq(&ice->reg_lock);
1726 change = PRO_RATE_RESET != nval;
1727 PRO_RATE_RESET = nval;
1728 spin_unlock_irq(&ice->reg_lock);
1729 return change;
1730}
1731
1b60f6b0 1732static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
1da177e4
LT
1733 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1734 .name = "Multi Track Rate Reset",
1735 .info = snd_vt1724_pro_rate_reset_info,
1736 .get = snd_vt1724_pro_rate_reset_get,
1737 .put = snd_vt1724_pro_rate_reset_put
1738};
1739
1740
1741/*
1742 * routing
1743 */
ab0c7d72
TI
1744static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
1745 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1746{
1747 static char *texts[] = {
1748 "PCM Out", /* 0 */
1749 "H/W In 0", "H/W In 1", /* 1-2 */
1750 "IEC958 In L", "IEC958 In R", /* 3-4 */
1751 };
1752
1753 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1754 uinfo->count = 1;
1755 uinfo->value.enumerated.items = 5;
1756 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1757 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1758 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1759 return 0;
1760}
1761
1762static inline int analog_route_shift(int idx)
1763{
1764 return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
1765}
1766
1767static inline int digital_route_shift(int idx)
1768{
1769 return idx * 3;
1770}
1771
ab0c7d72 1772static int get_route_val(struct snd_ice1712 *ice, int shift)
1da177e4
LT
1773{
1774 unsigned long val;
1775 unsigned char eitem;
32b47da0 1776 static const unsigned char xlate[8] = {
1da177e4
LT
1777 0, 255, 1, 2, 255, 255, 3, 4,
1778 };
1779
1780 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1781 val >>= shift;
1782 val &= 7; //we now have 3 bits per output
1783 eitem = xlate[val];
1784 if (eitem == 255) {
1785 snd_BUG();
1786 return 0;
1787 }
1788 return eitem;
1789}
1790
ab0c7d72 1791static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift)
1da177e4
LT
1792{
1793 unsigned int old_val, nval;
1794 int change;
32b47da0 1795 static const unsigned char xroute[8] = {
1da177e4
LT
1796 0, /* PCM */
1797 2, /* PSDIN0 Left */
1798 3, /* PSDIN0 Right */
1799 6, /* SPDIN Left */
1800 7, /* SPDIN Right */
1801 };
1802
1803 nval = xroute[val % 5];
1804 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1805 val &= ~(0x07 << shift);
1806 val |= nval << shift;
1807 change = val != old_val;
1808 if (change)
1809 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
1810 return change;
1811}
1812
ab0c7d72
TI
1813static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
1814 struct snd_ctl_elem_value *ucontrol)
1da177e4 1815{
ab0c7d72 1816 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 1817 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ab0c7d72
TI
1818 ucontrol->value.enumerated.item[0] =
1819 get_route_val(ice, analog_route_shift(idx));
1da177e4
LT
1820 return 0;
1821}
1822
ab0c7d72
TI
1823static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
1824 struct snd_ctl_elem_value *ucontrol)
1da177e4 1825{
ab0c7d72 1826 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1827 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1828 return put_route_val(ice, ucontrol->value.enumerated.item[0],
1829 analog_route_shift(idx));
1830}
1831
ab0c7d72
TI
1832static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
1833 struct snd_ctl_elem_value *ucontrol)
1da177e4 1834{
ab0c7d72 1835 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 1836 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ab0c7d72
TI
1837 ucontrol->value.enumerated.item[0] =
1838 get_route_val(ice, digital_route_shift(idx));
1da177e4
LT
1839 return 0;
1840}
1841
ab0c7d72
TI
1842static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
1843 struct snd_ctl_elem_value *ucontrol)
1da177e4 1844{
ab0c7d72 1845 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1846 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1847 return put_route_val(ice, ucontrol->value.enumerated.item[0],
1848 digital_route_shift(idx));
1849}
1850
1b60f6b0 1851static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = {
1da177e4
LT
1852 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1853 .name = "H/W Playback Route",
1854 .info = snd_vt1724_pro_route_info,
1855 .get = snd_vt1724_pro_route_analog_get,
1856 .put = snd_vt1724_pro_route_analog_put,
1857};
1858
1b60f6b0 1859static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
1da177e4
LT
1860 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1861 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
1862 .info = snd_vt1724_pro_route_info,
1863 .get = snd_vt1724_pro_route_spdif_get,
1864 .put = snd_vt1724_pro_route_spdif_put,
1865 .count = 2,
1866};
1867
1868
ab0c7d72
TI
1869static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
1870 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1871{
1872 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1873 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
1874 uinfo->value.integer.min = 0;
1875 uinfo->value.integer.max = 255;
1876 return 0;
1877}
1878
ab0c7d72
TI
1879static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
1880 struct snd_ctl_elem_value *ucontrol)
1da177e4 1881{
ab0c7d72 1882 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1883 int idx;
1884
1885 spin_lock_irq(&ice->reg_lock);
1886 for (idx = 0; idx < 22; idx++) {
1887 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
ab0c7d72
TI
1888 ucontrol->value.integer.value[idx] =
1889 inb(ICEMT1724(ice, MONITOR_PEAKDATA));
1da177e4
LT
1890 }
1891 spin_unlock_irq(&ice->reg_lock);
1892 return 0;
1893}
1894
1b60f6b0 1895static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
1da177e4
LT
1896 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1897 .name = "Multi Track Peak",
1898 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
1899 .info = snd_vt1724_pro_peak_info,
1900 .get = snd_vt1724_pro_peak_get
1901};
1902
1903/*
1904 *
1905 */
1906
1b60f6b0 1907static struct snd_ice1712_card_info no_matched __devinitdata;
1da177e4 1908
1b60f6b0 1909static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
1da177e4
LT
1910 snd_vt1724_revo_cards,
1911 snd_vt1724_amp_cards,
1912 snd_vt1724_aureon_cards,
1913 snd_vt1720_mobo_cards,
1914 snd_vt1720_pontis_cards,
6b8d6e55 1915 snd_vt1724_prodigy_hifi_cards,
1da177e4
LT
1916 snd_vt1724_prodigy192_cards,
1917 snd_vt1724_juli_cards,
1918 snd_vt1724_phase_cards,
f6cdab5f 1919 snd_vt1724_wtm_cards,
f31639b8 1920 snd_vt1724_se_cards,
1da177e4
LT
1921 NULL,
1922};
1923
1924
1925/*
1926 */
1927
ab0c7d72 1928static void wait_i2c_busy(struct snd_ice1712 *ice)
1da177e4
LT
1929{
1930 int t = 0x10000;
1931 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
1932 ;
1933 if (t == -1)
1934 printk(KERN_ERR "ice1724: i2c busy timeout\n");
1935}
1936
ab0c7d72
TI
1937unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
1938 unsigned char dev, unsigned char addr)
1da177e4
LT
1939{
1940 unsigned char val;
1941
62932df8 1942 mutex_lock(&ice->i2c_mutex);
acec30ff 1943 wait_i2c_busy(ice);
1da177e4
LT
1944 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
1945 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
1946 wait_i2c_busy(ice);
1947 val = inb(ICEREG1724(ice, I2C_DATA));
62932df8 1948 mutex_unlock(&ice->i2c_mutex);
1da177e4
LT
1949 //printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
1950 return val;
1951}
1952
ab0c7d72
TI
1953void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
1954 unsigned char dev, unsigned char addr, unsigned char data)
1da177e4 1955{
62932df8 1956 mutex_lock(&ice->i2c_mutex);
1da177e4
LT
1957 wait_i2c_busy(ice);
1958 //printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
1959 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
1960 outb(data, ICEREG1724(ice, I2C_DATA));
1961 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
1962 wait_i2c_busy(ice);
62932df8 1963 mutex_unlock(&ice->i2c_mutex);
1da177e4
LT
1964}
1965
ab0c7d72
TI
1966static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
1967 const char *modelname)
1da177e4
LT
1968{
1969 const int dev = 0xa0; /* EEPROM device address */
1970 unsigned int i, size;
1b60f6b0 1971 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4
LT
1972
1973 if (! modelname || ! *modelname) {
1974 ice->eeprom.subvendor = 0;
1975 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
1976 ice->eeprom.subvendor =
1977 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
1978 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
1979 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
1980 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
ab0c7d72
TI
1981 if (ice->eeprom.subvendor == 0 ||
1982 ice->eeprom.subvendor == (unsigned int)-1) {
1983 /* invalid subvendor from EEPROM, try the PCI
1984 * subststem ID instead
1985 */
1da177e4 1986 u16 vendor, device;
ab0c7d72
TI
1987 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
1988 &vendor);
1da177e4 1989 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
ab0c7d72
TI
1990 ice->eeprom.subvendor =
1991 ((unsigned int)swab16(vendor) << 16) | swab16(device);
1992 if (ice->eeprom.subvendor == 0 ||
1993 ice->eeprom.subvendor == (unsigned int)-1) {
1da177e4
LT
1994 printk(KERN_ERR "ice1724: No valid ID is found\n");
1995 return -ENXIO;
1996 }
1997 }
1998 }
1999 for (tbl = card_tables; *tbl; tbl++) {
2000 for (c = *tbl; c->subvendor; c++) {
ab0c7d72
TI
2001 if (modelname && c->model &&
2002 ! strcmp(modelname, c->model)) {
2003 printk(KERN_INFO "ice1724: Using board model %s\n",
2004 c->name);
1da177e4
LT
2005 ice->eeprom.subvendor = c->subvendor;
2006 } else if (c->subvendor != ice->eeprom.subvendor)
2007 continue;
2008 if (! c->eeprom_size || ! c->eeprom_data)
2009 goto found;
2010 /* if the EEPROM is given by the driver, use it */
2011 snd_printdd("using the defined eeprom..\n");
2012 ice->eeprom.version = 2;
2013 ice->eeprom.size = c->eeprom_size + 6;
2014 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2015 goto read_skipped;
2016 }
2017 }
ab0c7d72
TI
2018 printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
2019 ice->eeprom.subvendor);
1da177e4
LT
2020
2021 found:
2022 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
2023 if (ice->eeprom.size < 6)
2024 ice->eeprom.size = 32;
2025 else if (ice->eeprom.size > 32) {
ab0c7d72
TI
2026 printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
2027 ice->eeprom.size);
1da177e4
LT
2028 return -EIO;
2029 }
2030 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
2031 if (ice->eeprom.version != 2)
ab0c7d72
TI
2032 printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
2033 ice->eeprom.version);
1da177e4
LT
2034 size = ice->eeprom.size - 6;
2035 for (i = 0; i < size; i++)
2036 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
2037
2038 read_skipped:
2039 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
2040 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
2041 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
2042
2043 return 0;
2044}
2045
2046
2047
ab0c7d72 2048static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
1da177e4
LT
2049{
2050 outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
2051 udelay(200);
2052 outb(0, ICEREG1724(ice, CONTROL));
2053 udelay(200);
2054 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
2055 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
2056 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
2057 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
2058
2059 ice->gpio.write_mask = ice->eeprom.gpiomask;
2060 ice->gpio.direction = ice->eeprom.gpiodir;
2061 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
2062 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
2063 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
2064
2065 outb(0, ICEREG1724(ice, POWERDOWN));
2066
2067 return 0;
2068}
2069
ab0c7d72 2070static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
1da177e4
LT
2071{
2072 int err;
ab0c7d72 2073 struct snd_kcontrol *kctl;
1da177e4
LT
2074
2075 snd_assert(ice->pcm != NULL, return -EIO);
2076
2077 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
2078 if (err < 0)
2079 return err;
2080
2081 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
2082 if (err < 0)
2083 return err;
2084
2085 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
2086 if (err < 0)
2087 return err;
2088 kctl->id.device = ice->pcm->device;
2089 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
2090 if (err < 0)
2091 return err;
2092 kctl->id.device = ice->pcm->device;
2093 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
2094 if (err < 0)
2095 return err;
2096 kctl->id.device = ice->pcm->device;
2097#if 0 /* use default only */
2098 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
2099 if (err < 0)
2100 return err;
2101 kctl->id.device = ice->pcm->device;
2102 ice->spdif.stream_ctl = kctl;
2103#endif
2104 return 0;
2105}
2106
2107
ab0c7d72 2108static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
1da177e4
LT
2109{
2110 int err;
2111
2112 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
2113 if (err < 0)
2114 return err;
2115 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
2116 if (err < 0)
2117 return err;
2118
2119 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
2120 if (err < 0)
2121 return err;
2122 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
2123 if (err < 0)
2124 return err;
2125
2126 if (ice->num_total_dacs > 0) {
ab0c7d72 2127 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
1da177e4
LT
2128 tmp.count = ice->num_total_dacs;
2129 if (ice->vt1720 && tmp.count > 2)
2130 tmp.count = 2;
2131 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2132 if (err < 0)
2133 return err;
2134 }
2135
2136 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
2137 if (err < 0)
2138 return err;
2139
2140 return 0;
2141}
2142
ab0c7d72 2143static int snd_vt1724_free(struct snd_ice1712 *ice)
1da177e4
LT
2144{
2145 if (! ice->port)
2146 goto __hw_end;
2147 /* mask all interrupts */
2148 outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
2149 outb(0xff, ICEREG1724(ice, IRQMASK));
2150 /* --- */
2151 __hw_end:
2152 if (ice->irq >= 0) {
2153 synchronize_irq(ice->irq);
ab0c7d72 2154 free_irq(ice->irq, ice);
1da177e4
LT
2155 }
2156 pci_release_regions(ice->pci);
2157 snd_ice1712_akm4xxx_free(ice);
2158 pci_disable_device(ice->pci);
7cda8ba9 2159 kfree(ice->spec);
1da177e4
LT
2160 kfree(ice);
2161 return 0;
2162}
2163
ab0c7d72 2164static int snd_vt1724_dev_free(struct snd_device *device)
1da177e4 2165{
ab0c7d72 2166 struct snd_ice1712 *ice = device->device_data;
1da177e4
LT
2167 return snd_vt1724_free(ice);
2168}
2169
ab0c7d72 2170static int __devinit snd_vt1724_create(struct snd_card *card,
1da177e4
LT
2171 struct pci_dev *pci,
2172 const char *modelname,
ab0c7d72 2173 struct snd_ice1712 ** r_ice1712)
1da177e4 2174{
ab0c7d72 2175 struct snd_ice1712 *ice;
1da177e4
LT
2176 int err;
2177 unsigned char mask;
ab0c7d72 2178 static struct snd_device_ops ops = {
1da177e4
LT
2179 .dev_free = snd_vt1724_dev_free,
2180 };
2181
2182 *r_ice1712 = NULL;
2183
2184 /* enable PCI device */
2185 if ((err = pci_enable_device(pci)) < 0)
2186 return err;
2187
e560d8d8 2188 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
1da177e4
LT
2189 if (ice == NULL) {
2190 pci_disable_device(pci);
2191 return -ENOMEM;
2192 }
2193 ice->vt1724 = 1;
2194 spin_lock_init(&ice->reg_lock);
62932df8
IM
2195 mutex_init(&ice->gpio_mutex);
2196 mutex_init(&ice->open_mutex);
2197 mutex_init(&ice->i2c_mutex);
1da177e4
LT
2198 ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
2199 ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
2200 ice->gpio.set_data = snd_vt1724_set_gpio_data;
2201 ice->gpio.get_data = snd_vt1724_get_gpio_data;
2202 ice->card = card;
2203 ice->pci = pci;
2204 ice->irq = -1;
2205 pci_set_master(pci);
2206 snd_vt1724_proc_init(ice);
2207 synchronize_irq(pci->irq);
2208
2209 if ((err = pci_request_regions(pci, "ICE1724")) < 0) {
2210 kfree(ice);
2211 pci_disable_device(pci);
2212 return err;
2213 }
2214 ice->port = pci_resource_start(pci, 0);
2215 ice->profi_port = pci_resource_start(pci, 1);
2216
ab0c7d72 2217 if (request_irq(pci->irq, snd_vt1724_interrupt,
437a5a46 2218 IRQF_SHARED, "ICE1724", ice)) {
99b359ba 2219 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT
2220 snd_vt1724_free(ice);
2221 return -EIO;
2222 }
2223
2224 ice->irq = pci->irq;
2225
2226 if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
2227 snd_vt1724_free(ice);
2228 return -EIO;
2229 }
2230 if (snd_vt1724_chip_init(ice) < 0) {
2231 snd_vt1724_free(ice);
2232 return -EIO;
2233 }
2234
2235 /* unmask used interrupts */
2236 if (! (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401))
2237 mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
2238 else
2239 mask = 0;
2240 outb(mask, ICEREG1724(ice, IRQMASK));
ab0c7d72
TI
2241 /* don't handle FIFO overrun/underruns (just yet),
2242 * since they cause machine lockups
2243 */
1da177e4
LT
2244 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
2245
2246 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
2247 snd_vt1724_free(ice);
2248 return err;
2249 }
2250
2251 snd_card_set_dev(card, &pci->dev);
2252
2253 *r_ice1712 = ice;
2254 return 0;
2255}
2256
2257
2258/*
2259 *
2260 * Registration
2261 *
2262 */
2263
2264static int __devinit snd_vt1724_probe(struct pci_dev *pci,
2265 const struct pci_device_id *pci_id)
2266{
2267 static int dev;
ab0c7d72
TI
2268 struct snd_card *card;
2269 struct snd_ice1712 *ice;
1da177e4 2270 int pcm_dev = 0, err;
1b60f6b0 2271 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4
LT
2272
2273 if (dev >= SNDRV_CARDS)
2274 return -ENODEV;
2275 if (!enable[dev]) {
2276 dev++;
2277 return -ENOENT;
2278 }
2279
2280 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
2281 if (card == NULL)
2282 return -ENOMEM;
2283
2284 strcpy(card->driver, "ICE1724");
2285 strcpy(card->shortname, "ICEnsemble ICE1724");
2286
2287 if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) {
2288 snd_card_free(card);
2289 return err;
2290 }
2291
2292 for (tbl = card_tables; *tbl; tbl++) {
2293 for (c = *tbl; c->subvendor; c++) {
2294 if (c->subvendor == ice->eeprom.subvendor) {
2295 strcpy(card->shortname, c->name);
2296 if (c->driver) /* specific driver? */
2297 strcpy(card->driver, c->driver);
2298 if (c->chip_init) {
2299 if ((err = c->chip_init(ice)) < 0) {
2300 snd_card_free(card);
2301 return err;
2302 }
2303 }
2304 goto __found;
2305 }
2306 }
2307 }
2308 c = &no_matched;
2309 __found:
f06934bd
TI
2310 /*
2311 * VT1724 has separate DMAs for the analog and the SPDIF streams while
2312 * ICE1712 has only one for both (mixed up).
2313 *
2314 * Confusingly the analog PCM is named "professional" here because it
2315 * was called so in ice1712 driver, and vt1724 driver is derived from
2316 * ice1712 driver.
2317 */
d16be8ed
PH
2318 ice->pro_rate_default = PRO_RATE_DEFAULT;
2319 if (!ice->is_spdif_master)
2320 ice->is_spdif_master = stdclock_is_spdif_master;
2321 if (!ice->get_rate)
2322 ice->get_rate = stdclock_get_rate;
2323 if (!ice->set_rate)
2324 ice->set_rate = stdclock_set_rate;
2325 if (!ice->set_mclk)
2326 ice->set_mclk = stdclock_set_mclk;
2327 if (!ice->set_spdif_clock)
2328 ice->set_spdif_clock = stdclock_set_spdif_clock;
2329 if (!ice->hw_rates)
2330 set_std_hw_rates(ice);
1da177e4
LT
2331
2332 if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
2333 snd_card_free(card);
2334 return err;
2335 }
2336
2337 if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) {
2338 snd_card_free(card);
2339 return err;
2340 }
2341
2342 if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) {
2343 snd_card_free(card);
2344 return err;
2345 }
2346
2347 if ((err = snd_vt1724_ac97_mixer(ice)) < 0) {
2348 snd_card_free(card);
2349 return err;
2350 }
2351
2352 if ((err = snd_vt1724_build_controls(ice)) < 0) {
2353 snd_card_free(card);
2354 return err;
2355 }
2356
2357 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
2358 if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) {
2359 snd_card_free(card);
2360 return err;
2361 }
2362 }
2363
2364 if (c->build_controls) {
2365 if ((err = c->build_controls(ice)) < 0) {
2366 snd_card_free(card);
2367 return err;
2368 }
2369 }
2370
2371 if (! c->no_mpu401) {
2372 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
2373 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
302e4c2f
TI
2374 ICEREG1724(ice, MPU_CTRL),
2375 MPU401_INFO_INTEGRATED,
1da177e4
LT
2376 ice->irq, 0,
2377 &ice->rmidi[0])) < 0) {
2378 snd_card_free(card);
2379 return err;
2380 }
2381 }
2382 }
2383
2384 sprintf(card->longname, "%s at 0x%lx, irq %i",
2385 card->shortname, ice->port, ice->irq);
2386
2387 if ((err = snd_card_register(card)) < 0) {
2388 snd_card_free(card);
2389 return err;
2390 }
2391 pci_set_drvdata(pci, card);
2392 dev++;
2393 return 0;
2394}
2395
2396static void __devexit snd_vt1724_remove(struct pci_dev *pci)
2397{
2398 snd_card_free(pci_get_drvdata(pci));
2399 pci_set_drvdata(pci, NULL);
2400}
2401
2402static struct pci_driver driver = {
2403 .name = "ICE1724",
2404 .id_table = snd_vt1724_ids,
2405 .probe = snd_vt1724_probe,
2406 .remove = __devexit_p(snd_vt1724_remove),
2407};
2408
2409static int __init alsa_card_ice1724_init(void)
2410{
01d25d46 2411 return pci_register_driver(&driver);
1da177e4
LT
2412}
2413
2414static void __exit alsa_card_ice1724_exit(void)
2415{
2416 pci_unregister_driver(&driver);
2417}
2418
2419module_init(alsa_card_ice1724_init)
2420module_exit(alsa_card_ice1724_exit)