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1da177e4 LT |
1 | /* |
2 | * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT) | |
3 | * VIA VT1720 (Envy24PT) | |
4 | * | |
5 | * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz> | |
6 | * 2002 James Stafford <jstafford@ampltd.com> | |
7 | * 2003 Takashi Iwai <tiwai@suse.de> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | */ | |
24 | ||
25 | #include <sound/driver.h> | |
26 | #include <asm/io.h> | |
27 | #include <linux/delay.h> | |
28 | #include <linux/interrupt.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/pci.h> | |
31 | #include <linux/slab.h> | |
32 | #include <linux/moduleparam.h> | |
33 | #include <sound/core.h> | |
34 | #include <sound/info.h> | |
35 | #include <sound/mpu401.h> | |
36 | #include <sound/initval.h> | |
37 | ||
38 | #include <sound/asoundef.h> | |
39 | ||
40 | #include "ice1712.h" | |
41 | #include "envy24ht.h" | |
42 | ||
43 | /* lowlevel routines */ | |
44 | #include "amp.h" | |
45 | #include "revo.h" | |
46 | #include "aureon.h" | |
47 | #include "vt1720_mobo.h" | |
48 | #include "pontis.h" | |
49 | #include "prodigy192.h" | |
50 | #include "juli.h" | |
51 | #include "phase.h" | |
52 | ||
53 | ||
54 | MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>"); | |
55 | MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)"); | |
56 | MODULE_LICENSE("GPL"); | |
57 | MODULE_SUPPORTED_DEVICE("{" | |
58 | REVO_DEVICE_DESC | |
59 | AMP_AUDIO2000_DEVICE_DESC | |
60 | AUREON_DEVICE_DESC | |
61 | VT1720_MOBO_DEVICE_DESC | |
62 | PONTIS_DEVICE_DESC | |
63 | PRODIGY192_DEVICE_DESC | |
64 | JULI_DEVICE_DESC | |
65 | PHASE_DEVICE_DESC | |
66 | "{VIA,VT1720}," | |
67 | "{VIA,VT1724}," | |
68 | "{ICEnsemble,Generic ICE1724}," | |
69 | "{ICEnsemble,Generic Envy24HT}" | |
70 | "{ICEnsemble,Generic Envy24PT}}"); | |
71 | ||
72 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ | |
73 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
74 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ | |
75 | static char *model[SNDRV_CARDS]; | |
76 | ||
77 | module_param_array(index, int, NULL, 0444); | |
78 | MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard."); | |
79 | module_param_array(id, charp, NULL, 0444); | |
80 | MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard."); | |
81 | module_param_array(enable, bool, NULL, 0444); | |
82 | MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard."); | |
83 | module_param_array(model, charp, NULL, 0444); | |
84 | MODULE_PARM_DESC(model, "Use the given board model."); | |
85 | ||
1da177e4 LT |
86 | |
87 | /* Both VT1720 and VT1724 have the same PCI IDs */ | |
88 | static struct pci_device_id snd_vt1724_ids[] = { | |
89 | { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | |
90 | { 0, } | |
91 | }; | |
92 | ||
93 | MODULE_DEVICE_TABLE(pci, snd_vt1724_ids); | |
94 | ||
95 | ||
96 | static int PRO_RATE_LOCKED; | |
97 | static int PRO_RATE_RESET = 1; | |
98 | static unsigned int PRO_RATE_DEFAULT = 44100; | |
99 | ||
100 | /* | |
101 | * Basic I/O | |
102 | */ | |
103 | ||
104 | /* check whether the clock mode is spdif-in */ | |
ab0c7d72 | 105 | static inline int is_spdif_master(struct snd_ice1712 *ice) |
1da177e4 LT |
106 | { |
107 | return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0; | |
108 | } | |
109 | ||
ab0c7d72 | 110 | static inline int is_pro_rate_locked(struct snd_ice1712 *ice) |
1da177e4 LT |
111 | { |
112 | return is_spdif_master(ice) || PRO_RATE_LOCKED; | |
113 | } | |
114 | ||
115 | /* | |
116 | * ac97 section | |
117 | */ | |
118 | ||
ab0c7d72 | 119 | static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice) |
1da177e4 LT |
120 | { |
121 | unsigned char old_cmd; | |
122 | int tm; | |
123 | for (tm = 0; tm < 0x10000; tm++) { | |
124 | old_cmd = inb(ICEMT1724(ice, AC97_CMD)); | |
125 | if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ)) | |
126 | continue; | |
127 | if (!(old_cmd & VT1724_AC97_READY)) | |
128 | continue; | |
129 | return old_cmd; | |
130 | } | |
131 | snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n"); | |
132 | return old_cmd; | |
133 | } | |
134 | ||
ab0c7d72 | 135 | static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit) |
1da177e4 LT |
136 | { |
137 | int tm; | |
138 | for (tm = 0; tm < 0x10000; tm++) | |
139 | if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0) | |
140 | return 0; | |
141 | snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n"); | |
142 | return -EIO; | |
143 | } | |
144 | ||
ab0c7d72 | 145 | static void snd_vt1724_ac97_write(struct snd_ac97 *ac97, |
1da177e4 LT |
146 | unsigned short reg, |
147 | unsigned short val) | |
148 | { | |
ab0c7d72 | 149 | struct snd_ice1712 *ice = ac97->private_data; |
1da177e4 LT |
150 | unsigned char old_cmd; |
151 | ||
152 | old_cmd = snd_vt1724_ac97_ready(ice); | |
153 | old_cmd &= ~VT1724_AC97_ID_MASK; | |
154 | old_cmd |= ac97->num; | |
155 | outb(reg, ICEMT1724(ice, AC97_INDEX)); | |
156 | outw(val, ICEMT1724(ice, AC97_DATA)); | |
157 | outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD)); | |
158 | snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE); | |
159 | } | |
160 | ||
ab0c7d72 | 161 | static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg) |
1da177e4 | 162 | { |
ab0c7d72 | 163 | struct snd_ice1712 *ice = ac97->private_data; |
1da177e4 LT |
164 | unsigned char old_cmd; |
165 | ||
166 | old_cmd = snd_vt1724_ac97_ready(ice); | |
167 | old_cmd &= ~VT1724_AC97_ID_MASK; | |
168 | old_cmd |= ac97->num; | |
169 | outb(reg, ICEMT1724(ice, AC97_INDEX)); | |
170 | outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD)); | |
171 | if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0) | |
172 | return ~0; | |
173 | return inw(ICEMT1724(ice, AC97_DATA)); | |
174 | } | |
175 | ||
176 | ||
177 | /* | |
178 | * GPIO operations | |
179 | */ | |
180 | ||
181 | /* set gpio direction 0 = read, 1 = write */ | |
ab0c7d72 | 182 | static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) |
1da177e4 LT |
183 | { |
184 | outl(data, ICEREG1724(ice, GPIO_DIRECTION)); | |
185 | inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */ | |
186 | } | |
187 | ||
188 | /* set the gpio mask (0 = writable) */ | |
ab0c7d72 | 189 | static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) |
1da177e4 LT |
190 | { |
191 | outw(data, ICEREG1724(ice, GPIO_WRITE_MASK)); | |
192 | if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */ | |
193 | outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22)); | |
194 | inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */ | |
195 | } | |
196 | ||
ab0c7d72 | 197 | static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data) |
1da177e4 LT |
198 | { |
199 | outw(data, ICEREG1724(ice, GPIO_DATA)); | |
200 | if (! ice->vt1720) | |
201 | outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22)); | |
202 | inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */ | |
203 | } | |
204 | ||
ab0c7d72 | 205 | static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice) |
1da177e4 LT |
206 | { |
207 | unsigned int data; | |
208 | if (! ice->vt1720) | |
209 | data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22)); | |
210 | else | |
211 | data = 0; | |
212 | data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA)); | |
213 | return data; | |
214 | } | |
215 | ||
216 | /* | |
217 | * Interrupt handler | |
218 | */ | |
219 | ||
220 | static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
221 | { | |
ab0c7d72 | 222 | struct snd_ice1712 *ice = dev_id; |
1da177e4 LT |
223 | unsigned char status; |
224 | int handled = 0; | |
225 | ||
226 | while (1) { | |
227 | status = inb(ICEREG1724(ice, IRQSTAT)); | |
228 | if (status == 0) | |
229 | break; | |
230 | ||
231 | handled = 1; | |
ab0c7d72 TI |
232 | /* these should probably be separated at some point, |
233 | * but as we don't currently have MPU support on the board | |
234 | * I will leave it | |
235 | */ | |
1da177e4 LT |
236 | if ((status & VT1724_IRQ_MPU_RX)||(status & VT1724_IRQ_MPU_TX)) { |
237 | if (ice->rmidi[0]) | |
238 | snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs); | |
239 | outb(status & (VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX), ICEREG1724(ice, IRQSTAT)); | |
240 | status &= ~(VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX); | |
241 | } | |
242 | if (status & VT1724_IRQ_MTPCM) { | |
243 | /* | |
244 | * Multi-track PCM | |
245 | * PCM assignment are: | |
246 | * Playback DMA0 (M/C) = playback_pro_substream | |
247 | * Playback DMA1 = playback_con_substream_ds[0] | |
248 | * Playback DMA2 = playback_con_substream_ds[1] | |
249 | * Playback DMA3 = playback_con_substream_ds[2] | |
250 | * Playback DMA4 (SPDIF) = playback_con_substream | |
251 | * Record DMA0 = capture_pro_substream | |
252 | * Record DMA1 = capture_con_substream | |
253 | */ | |
254 | unsigned char mtstat = inb(ICEMT1724(ice, IRQ)); | |
255 | if (mtstat & VT1724_MULTI_PDMA0) { | |
256 | if (ice->playback_pro_substream) | |
257 | snd_pcm_period_elapsed(ice->playback_pro_substream); | |
258 | } | |
259 | if (mtstat & VT1724_MULTI_RDMA0) { | |
260 | if (ice->capture_pro_substream) | |
261 | snd_pcm_period_elapsed(ice->capture_pro_substream); | |
262 | } | |
263 | if (mtstat & VT1724_MULTI_PDMA1) { | |
264 | if (ice->playback_con_substream_ds[0]) | |
265 | snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]); | |
266 | } | |
267 | if (mtstat & VT1724_MULTI_PDMA2) { | |
268 | if (ice->playback_con_substream_ds[1]) | |
269 | snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]); | |
270 | } | |
271 | if (mtstat & VT1724_MULTI_PDMA3) { | |
272 | if (ice->playback_con_substream_ds[2]) | |
273 | snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]); | |
274 | } | |
275 | if (mtstat & VT1724_MULTI_PDMA4) { | |
276 | if (ice->playback_con_substream) | |
277 | snd_pcm_period_elapsed(ice->playback_con_substream); | |
278 | } | |
279 | if (mtstat & VT1724_MULTI_RDMA1) { | |
280 | if (ice->capture_con_substream) | |
281 | snd_pcm_period_elapsed(ice->capture_con_substream); | |
282 | } | |
283 | /* ack anyway to avoid freeze */ | |
284 | outb(mtstat, ICEMT1724(ice, IRQ)); | |
285 | /* ought to really handle this properly */ | |
286 | if (mtstat & VT1724_MULTI_FIFO_ERR) { | |
287 | unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR)); | |
288 | outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR)); | |
289 | outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK)); | |
290 | /* If I don't do this, I get machine lockup due to continual interrupts */ | |
291 | } | |
292 | ||
293 | } | |
294 | } | |
295 | return IRQ_RETVAL(handled); | |
296 | } | |
297 | ||
298 | /* | |
299 | * PCM code - professional part (multitrack) | |
300 | */ | |
301 | ||
302 | static unsigned int rates[] = { | |
303 | 8000, 9600, 11025, 12000, 16000, 22050, 24000, | |
304 | 32000, 44100, 48000, 64000, 88200, 96000, | |
305 | 176400, 192000, | |
306 | }; | |
307 | ||
ab0c7d72 | 308 | static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = { |
1da177e4 LT |
309 | .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */ |
310 | .list = rates, | |
311 | .mask = 0, | |
312 | }; | |
313 | ||
ab0c7d72 | 314 | static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = { |
1da177e4 LT |
315 | .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */ |
316 | .list = rates, | |
317 | .mask = 0, | |
318 | }; | |
319 | ||
ab0c7d72 | 320 | static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = { |
1da177e4 LT |
321 | .count = ARRAY_SIZE(rates), |
322 | .list = rates, | |
323 | .mask = 0, | |
324 | }; | |
325 | ||
326 | struct vt1724_pcm_reg { | |
327 | unsigned int addr; /* ADDR register offset */ | |
328 | unsigned int size; /* SIZE register offset */ | |
329 | unsigned int count; /* COUNT register offset */ | |
330 | unsigned int start; /* start & pause bit */ | |
331 | }; | |
332 | ||
ab0c7d72 | 333 | static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 334 | { |
ab0c7d72 | 335 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
336 | unsigned char what; |
337 | unsigned char old; | |
338 | struct list_head *pos; | |
ab0c7d72 | 339 | struct snd_pcm_substream *s; |
1da177e4 LT |
340 | |
341 | what = 0; | |
342 | snd_pcm_group_for_each(pos, substream) { | |
343 | struct vt1724_pcm_reg *reg; | |
344 | s = snd_pcm_group_substream_entry(pos); | |
345 | reg = s->runtime->private_data; | |
346 | what |= reg->start; | |
347 | snd_pcm_trigger_done(s, substream); | |
348 | } | |
349 | ||
350 | switch (cmd) { | |
351 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
352 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
353 | spin_lock(&ice->reg_lock); | |
354 | old = inb(ICEMT1724(ice, DMA_PAUSE)); | |
355 | if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) | |
356 | old |= what; | |
357 | else | |
358 | old &= ~what; | |
359 | outb(old, ICEMT1724(ice, DMA_PAUSE)); | |
360 | spin_unlock(&ice->reg_lock); | |
361 | break; | |
362 | ||
363 | case SNDRV_PCM_TRIGGER_START: | |
364 | case SNDRV_PCM_TRIGGER_STOP: | |
365 | spin_lock(&ice->reg_lock); | |
366 | old = inb(ICEMT1724(ice, DMA_CONTROL)); | |
367 | if (cmd == SNDRV_PCM_TRIGGER_START) | |
368 | old |= what; | |
369 | else | |
370 | old &= ~what; | |
371 | outb(old, ICEMT1724(ice, DMA_CONTROL)); | |
372 | spin_unlock(&ice->reg_lock); | |
373 | break; | |
374 | ||
375 | default: | |
376 | return -EINVAL; | |
377 | } | |
378 | return 0; | |
379 | } | |
380 | ||
381 | /* | |
382 | */ | |
383 | ||
384 | #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\ | |
385 | VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START) | |
386 | #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\ | |
387 | VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE) | |
388 | ||
ab0c7d72 | 389 | static int get_max_rate(struct snd_ice1712 *ice) |
1da177e4 LT |
390 | { |
391 | if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { | |
392 | if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720) | |
393 | return 192000; | |
394 | else | |
395 | return 96000; | |
396 | } else | |
397 | return 48000; | |
398 | } | |
399 | ||
ab0c7d72 TI |
400 | static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, |
401 | int force) | |
1da177e4 LT |
402 | { |
403 | unsigned long flags; | |
404 | unsigned char val, old; | |
405 | unsigned int i, mclk_change; | |
406 | ||
407 | if (rate > get_max_rate(ice)) | |
408 | return; | |
409 | ||
410 | switch (rate) { | |
411 | case 8000: val = 6; break; | |
412 | case 9600: val = 3; break; | |
413 | case 11025: val = 10; break; | |
414 | case 12000: val = 2; break; | |
415 | case 16000: val = 5; break; | |
416 | case 22050: val = 9; break; | |
417 | case 24000: val = 1; break; | |
418 | case 32000: val = 4; break; | |
419 | case 44100: val = 8; break; | |
420 | case 48000: val = 0; break; | |
421 | case 64000: val = 15; break; | |
422 | case 88200: val = 11; break; | |
423 | case 96000: val = 7; break; | |
424 | case 176400: val = 12; break; | |
425 | case 192000: val = 14; break; | |
426 | default: | |
427 | snd_BUG(); | |
428 | val = 0; | |
429 | break; | |
430 | } | |
431 | ||
432 | spin_lock_irqsave(&ice->reg_lock, flags); | |
433 | if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) || | |
434 | (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) { | |
435 | /* running? we cannot change the rate now... */ | |
436 | spin_unlock_irqrestore(&ice->reg_lock, flags); | |
437 | return; | |
438 | } | |
439 | if (!force && is_pro_rate_locked(ice)) { | |
440 | spin_unlock_irqrestore(&ice->reg_lock, flags); | |
441 | return; | |
442 | } | |
443 | ||
444 | old = inb(ICEMT1724(ice, RATE)); | |
445 | if (force || old != val) | |
446 | outb(val, ICEMT1724(ice, RATE)); | |
447 | else if (rate == ice->cur_rate) { | |
448 | spin_unlock_irqrestore(&ice->reg_lock, flags); | |
449 | return; | |
450 | } | |
451 | ||
452 | ice->cur_rate = rate; | |
453 | ||
454 | /* check MT02 */ | |
455 | mclk_change = 0; | |
456 | if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { | |
457 | val = old = inb(ICEMT1724(ice, I2S_FORMAT)); | |
458 | if (rate > 96000) | |
459 | val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */ | |
460 | else | |
461 | val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */ | |
462 | if (val != old) { | |
463 | outb(val, ICEMT1724(ice, I2S_FORMAT)); | |
464 | mclk_change = 1; | |
465 | } | |
466 | } | |
467 | spin_unlock_irqrestore(&ice->reg_lock, flags); | |
468 | ||
469 | if (mclk_change && ice->gpio.i2s_mclk_changed) | |
470 | ice->gpio.i2s_mclk_changed(ice); | |
471 | if (ice->gpio.set_pro_rate) | |
472 | ice->gpio.set_pro_rate(ice, rate); | |
473 | ||
474 | /* set up codecs */ | |
475 | for (i = 0; i < ice->akm_codecs; i++) { | |
476 | if (ice->akm[i].ops.set_rate_val) | |
477 | ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); | |
478 | } | |
479 | if (ice->spdif.ops.setup_rate) | |
480 | ice->spdif.ops.setup_rate(ice, rate); | |
481 | } | |
482 | ||
ab0c7d72 TI |
483 | static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream, |
484 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 485 | { |
ab0c7d72 | 486 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
487 | int i, chs; |
488 | ||
489 | chs = params_channels(hw_params); | |
490 | down(&ice->open_mutex); | |
491 | /* mark surround channels */ | |
492 | if (substream == ice->playback_pro_substream) { | |
493 | /* PDMA0 can be multi-channel up to 8 */ | |
494 | chs = chs / 2 - 1; | |
495 | for (i = 0; i < chs; i++) { | |
ab0c7d72 TI |
496 | if (ice->pcm_reserved[i] && |
497 | ice->pcm_reserved[i] != substream) { | |
1da177e4 LT |
498 | up(&ice->open_mutex); |
499 | return -EBUSY; | |
500 | } | |
501 | ice->pcm_reserved[i] = substream; | |
502 | } | |
503 | for (; i < 3; i++) { | |
504 | if (ice->pcm_reserved[i] == substream) | |
505 | ice->pcm_reserved[i] = NULL; | |
506 | } | |
507 | } else { | |
508 | for (i = 0; i < 3; i++) { | |
509 | /* check individual playback stream */ | |
510 | if (ice->playback_con_substream_ds[i] == substream) { | |
ab0c7d72 TI |
511 | if (ice->pcm_reserved[i] && |
512 | ice->pcm_reserved[i] != substream) { | |
1da177e4 LT |
513 | up(&ice->open_mutex); |
514 | return -EBUSY; | |
515 | } | |
516 | ice->pcm_reserved[i] = substream; | |
517 | break; | |
518 | } | |
519 | } | |
520 | } | |
521 | up(&ice->open_mutex); | |
522 | snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0); | |
523 | return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); | |
524 | } | |
525 | ||
ab0c7d72 | 526 | static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream) |
1da177e4 | 527 | { |
ab0c7d72 | 528 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
529 | int i; |
530 | ||
531 | down(&ice->open_mutex); | |
532 | /* unmark surround channels */ | |
533 | for (i = 0; i < 3; i++) | |
534 | if (ice->pcm_reserved[i] == substream) | |
535 | ice->pcm_reserved[i] = NULL; | |
536 | up(&ice->open_mutex); | |
537 | return snd_pcm_lib_free_pages(substream); | |
538 | } | |
539 | ||
ab0c7d72 | 540 | static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 541 | { |
ab0c7d72 | 542 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
543 | unsigned char val; |
544 | unsigned int size; | |
545 | ||
546 | spin_lock_irq(&ice->reg_lock); | |
547 | val = (8 - substream->runtime->channels) >> 1; | |
548 | outb(val, ICEMT1724(ice, BURST)); | |
549 | ||
550 | outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR)); | |
551 | ||
552 | size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1; | |
553 | // outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); | |
554 | outw(size, ICEMT1724(ice, PLAYBACK_SIZE)); | |
555 | outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2); | |
556 | size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; | |
557 | // outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); | |
558 | outw(size, ICEMT1724(ice, PLAYBACK_COUNT)); | |
559 | outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2); | |
560 | ||
561 | spin_unlock_irq(&ice->reg_lock); | |
562 | ||
563 | // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream)); | |
564 | return 0; | |
565 | } | |
566 | ||
ab0c7d72 | 567 | static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 568 | { |
ab0c7d72 | 569 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
570 | size_t ptr; |
571 | ||
572 | if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START)) | |
573 | return 0; | |
574 | #if 0 /* read PLAYBACK_ADDR */ | |
575 | ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR)); | |
576 | if (ptr < substream->runtime->dma_addr) { | |
577 | snd_printd("ice1724: invalid negative ptr\n"); | |
578 | return 0; | |
579 | } | |
580 | ptr -= substream->runtime->dma_addr; | |
581 | ptr = bytes_to_frames(substream->runtime, ptr); | |
582 | if (ptr >= substream->runtime->buffer_size) { | |
ab0c7d72 TI |
583 | snd_printd("ice1724: invalid ptr %d (size=%d)\n", |
584 | (int)ptr, (int)substream->runtime->period_size); | |
1da177e4 LT |
585 | return 0; |
586 | } | |
587 | #else /* read PLAYBACK_SIZE */ | |
588 | ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff; | |
589 | ptr = (ptr + 1) << 2; | |
590 | ptr = bytes_to_frames(substream->runtime, ptr); | |
591 | if (! ptr) | |
592 | ; | |
593 | else if (ptr <= substream->runtime->buffer_size) | |
594 | ptr = substream->runtime->buffer_size - ptr; | |
595 | else { | |
ab0c7d72 TI |
596 | snd_printd("ice1724: invalid ptr %d (size=%d)\n", |
597 | (int)ptr, (int)substream->runtime->buffer_size); | |
1da177e4 LT |
598 | ptr = 0; |
599 | } | |
600 | #endif | |
601 | return ptr; | |
602 | } | |
603 | ||
ab0c7d72 | 604 | static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 605 | { |
ab0c7d72 | 606 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
607 | struct vt1724_pcm_reg *reg = substream->runtime->private_data; |
608 | ||
609 | spin_lock_irq(&ice->reg_lock); | |
610 | outl(substream->runtime->dma_addr, ice->profi_port + reg->addr); | |
ab0c7d72 TI |
611 | outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1, |
612 | ice->profi_port + reg->size); | |
613 | outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, | |
614 | ice->profi_port + reg->count); | |
1da177e4 LT |
615 | spin_unlock_irq(&ice->reg_lock); |
616 | return 0; | |
617 | } | |
618 | ||
ab0c7d72 | 619 | static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 620 | { |
ab0c7d72 | 621 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
622 | struct vt1724_pcm_reg *reg = substream->runtime->private_data; |
623 | size_t ptr; | |
624 | ||
625 | if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start)) | |
626 | return 0; | |
627 | #if 0 /* use ADDR register */ | |
628 | ptr = inl(ice->profi_port + reg->addr); | |
629 | ptr -= substream->runtime->dma_addr; | |
630 | return bytes_to_frames(substream->runtime, ptr); | |
631 | #else /* use SIZE register */ | |
632 | ptr = inw(ice->profi_port + reg->size); | |
633 | ptr = (ptr + 1) << 2; | |
634 | ptr = bytes_to_frames(substream->runtime, ptr); | |
635 | if (! ptr) | |
636 | ; | |
637 | else if (ptr <= substream->runtime->buffer_size) | |
638 | ptr = substream->runtime->buffer_size - ptr; | |
639 | else { | |
ab0c7d72 TI |
640 | snd_printd("ice1724: invalid ptr %d (size=%d)\n", |
641 | (int)ptr, (int)substream->runtime->buffer_size); | |
1da177e4 LT |
642 | ptr = 0; |
643 | } | |
644 | return ptr; | |
645 | #endif | |
646 | } | |
647 | ||
648 | static struct vt1724_pcm_reg vt1724_playback_pro_reg = { | |
649 | .addr = VT1724_MT_PLAYBACK_ADDR, | |
650 | .size = VT1724_MT_PLAYBACK_SIZE, | |
651 | .count = VT1724_MT_PLAYBACK_COUNT, | |
652 | .start = VT1724_PDMA0_START, | |
653 | }; | |
654 | ||
655 | static struct vt1724_pcm_reg vt1724_capture_pro_reg = { | |
656 | .addr = VT1724_MT_CAPTURE_ADDR, | |
657 | .size = VT1724_MT_CAPTURE_SIZE, | |
658 | .count = VT1724_MT_CAPTURE_COUNT, | |
659 | .start = VT1724_RDMA0_START, | |
660 | }; | |
661 | ||
ab0c7d72 | 662 | static struct snd_pcm_hardware snd_vt1724_playback_pro = |
1da177e4 LT |
663 | { |
664 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
665 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
666 | SNDRV_PCM_INFO_MMAP_VALID | | |
667 | SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), | |
668 | .formats = SNDRV_PCM_FMTBIT_S32_LE, | |
669 | .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, | |
670 | .rate_min = 8000, | |
671 | .rate_max = 192000, | |
672 | .channels_min = 2, | |
673 | .channels_max = 8, | |
674 | .buffer_bytes_max = (1UL << 21), /* 19bits dword */ | |
675 | .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */ | |
676 | .period_bytes_max = (1UL << 21), | |
677 | .periods_min = 2, | |
678 | .periods_max = 1024, | |
679 | }; | |
680 | ||
ab0c7d72 | 681 | static struct snd_pcm_hardware snd_vt1724_spdif = |
1da177e4 LT |
682 | { |
683 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
684 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
685 | SNDRV_PCM_INFO_MMAP_VALID | | |
686 | SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), | |
687 | .formats = SNDRV_PCM_FMTBIT_S32_LE, | |
2dfbeca9 TI |
688 | .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100| |
689 | SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200| | |
690 | SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400| | |
691 | SNDRV_PCM_RATE_192000), | |
1da177e4 | 692 | .rate_min = 32000, |
2dfbeca9 | 693 | .rate_max = 192000, |
1da177e4 LT |
694 | .channels_min = 2, |
695 | .channels_max = 2, | |
696 | .buffer_bytes_max = (1UL << 18), /* 16bits dword */ | |
697 | .period_bytes_min = 2 * 4 * 2, | |
698 | .period_bytes_max = (1UL << 18), | |
699 | .periods_min = 2, | |
700 | .periods_max = 1024, | |
701 | }; | |
702 | ||
ab0c7d72 | 703 | static struct snd_pcm_hardware snd_vt1724_2ch_stereo = |
1da177e4 LT |
704 | { |
705 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
706 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
707 | SNDRV_PCM_INFO_MMAP_VALID | | |
708 | SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), | |
709 | .formats = SNDRV_PCM_FMTBIT_S32_LE, | |
710 | .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, | |
711 | .rate_min = 8000, | |
712 | .rate_max = 192000, | |
713 | .channels_min = 2, | |
714 | .channels_max = 2, | |
715 | .buffer_bytes_max = (1UL << 18), /* 16bits dword */ | |
716 | .period_bytes_min = 2 * 4 * 2, | |
717 | .period_bytes_max = (1UL << 18), | |
718 | .periods_min = 2, | |
719 | .periods_max = 1024, | |
720 | }; | |
721 | ||
722 | /* | |
723 | * set rate constraints | |
724 | */ | |
ab0c7d72 TI |
725 | static int set_rate_constraints(struct snd_ice1712 *ice, |
726 | struct snd_pcm_substream *substream) | |
1da177e4 | 727 | { |
ab0c7d72 | 728 | struct snd_pcm_runtime *runtime = substream->runtime; |
1da177e4 LT |
729 | if (ice->hw_rates) { |
730 | /* hardware specific */ | |
731 | runtime->hw.rate_min = ice->hw_rates->list[0]; | |
732 | runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1]; | |
733 | runtime->hw.rates = SNDRV_PCM_RATE_KNOT; | |
ab0c7d72 TI |
734 | return snd_pcm_hw_constraint_list(runtime, 0, |
735 | SNDRV_PCM_HW_PARAM_RATE, | |
736 | ice->hw_rates); | |
1da177e4 LT |
737 | } |
738 | if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { | |
739 | /* I2S */ | |
740 | /* VT1720 doesn't support more than 96kHz */ | |
741 | if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720) | |
ab0c7d72 TI |
742 | return snd_pcm_hw_constraint_list(runtime, 0, |
743 | SNDRV_PCM_HW_PARAM_RATE, | |
744 | &hw_constraints_rates_192); | |
1da177e4 | 745 | else { |
ab0c7d72 TI |
746 | runtime->hw.rates = SNDRV_PCM_RATE_KNOT | |
747 | SNDRV_PCM_RATE_8000_96000; | |
1da177e4 | 748 | runtime->hw.rate_max = 96000; |
ab0c7d72 TI |
749 | return snd_pcm_hw_constraint_list(runtime, 0, |
750 | SNDRV_PCM_HW_PARAM_RATE, | |
751 | &hw_constraints_rates_96); | |
1da177e4 LT |
752 | } |
753 | } else if (ice->ac97) { | |
754 | /* ACLINK */ | |
755 | runtime->hw.rate_max = 48000; | |
756 | runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000; | |
ab0c7d72 TI |
757 | return snd_pcm_hw_constraint_list(runtime, 0, |
758 | SNDRV_PCM_HW_PARAM_RATE, | |
759 | &hw_constraints_rates_48); | |
1da177e4 LT |
760 | } |
761 | return 0; | |
762 | } | |
763 | ||
764 | /* multi-channel playback needs alignment 8x32bit regardless of the channels | |
765 | * actually used | |
766 | */ | |
767 | #define VT1724_BUFFER_ALIGN 0x20 | |
768 | ||
ab0c7d72 | 769 | static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream) |
1da177e4 | 770 | { |
ab0c7d72 TI |
771 | struct snd_pcm_runtime *runtime = substream->runtime; |
772 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); | |
1da177e4 LT |
773 | int chs; |
774 | ||
775 | runtime->private_data = &vt1724_playback_pro_reg; | |
776 | ice->playback_pro_substream = substream; | |
777 | runtime->hw = snd_vt1724_playback_pro; | |
778 | snd_pcm_set_sync(substream); | |
779 | snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); | |
780 | set_rate_constraints(ice, substream); | |
781 | down(&ice->open_mutex); | |
782 | /* calculate the currently available channels */ | |
783 | for (chs = 0; chs < 3; chs++) { | |
784 | if (ice->pcm_reserved[chs]) | |
785 | break; | |
786 | } | |
787 | chs = (chs + 1) * 2; | |
788 | runtime->hw.channels_max = chs; | |
789 | if (chs > 2) /* channels must be even */ | |
790 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2); | |
791 | up(&ice->open_mutex); | |
792 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, | |
793 | VT1724_BUFFER_ALIGN); | |
794 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, | |
795 | VT1724_BUFFER_ALIGN); | |
796 | return 0; | |
797 | } | |
798 | ||
ab0c7d72 | 799 | static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream) |
1da177e4 | 800 | { |
ab0c7d72 TI |
801 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
802 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
803 | |
804 | runtime->private_data = &vt1724_capture_pro_reg; | |
805 | ice->capture_pro_substream = substream; | |
806 | runtime->hw = snd_vt1724_2ch_stereo; | |
807 | snd_pcm_set_sync(substream); | |
808 | snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); | |
809 | set_rate_constraints(ice, substream); | |
810 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, | |
811 | VT1724_BUFFER_ALIGN); | |
812 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, | |
813 | VT1724_BUFFER_ALIGN); | |
814 | return 0; | |
815 | } | |
816 | ||
ab0c7d72 | 817 | static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream) |
1da177e4 | 818 | { |
ab0c7d72 | 819 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
820 | |
821 | if (PRO_RATE_RESET) | |
822 | snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); | |
823 | ice->playback_pro_substream = NULL; | |
824 | ||
825 | return 0; | |
826 | } | |
827 | ||
ab0c7d72 | 828 | static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream) |
1da177e4 | 829 | { |
ab0c7d72 | 830 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
831 | |
832 | if (PRO_RATE_RESET) | |
833 | snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); | |
834 | ice->capture_pro_substream = NULL; | |
835 | return 0; | |
836 | } | |
837 | ||
ab0c7d72 | 838 | static struct snd_pcm_ops snd_vt1724_playback_pro_ops = { |
1da177e4 LT |
839 | .open = snd_vt1724_playback_pro_open, |
840 | .close = snd_vt1724_playback_pro_close, | |
841 | .ioctl = snd_pcm_lib_ioctl, | |
842 | .hw_params = snd_vt1724_pcm_hw_params, | |
843 | .hw_free = snd_vt1724_pcm_hw_free, | |
844 | .prepare = snd_vt1724_playback_pro_prepare, | |
845 | .trigger = snd_vt1724_pcm_trigger, | |
846 | .pointer = snd_vt1724_playback_pro_pointer, | |
847 | }; | |
848 | ||
ab0c7d72 | 849 | static struct snd_pcm_ops snd_vt1724_capture_pro_ops = { |
1da177e4 LT |
850 | .open = snd_vt1724_capture_pro_open, |
851 | .close = snd_vt1724_capture_pro_close, | |
852 | .ioctl = snd_pcm_lib_ioctl, | |
853 | .hw_params = snd_vt1724_pcm_hw_params, | |
854 | .hw_free = snd_vt1724_pcm_hw_free, | |
855 | .prepare = snd_vt1724_pcm_prepare, | |
856 | .trigger = snd_vt1724_pcm_trigger, | |
857 | .pointer = snd_vt1724_pcm_pointer, | |
858 | }; | |
859 | ||
ab0c7d72 | 860 | static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 * ice, int device) |
1da177e4 | 861 | { |
ab0c7d72 | 862 | struct snd_pcm *pcm; |
1da177e4 LT |
863 | int err; |
864 | ||
865 | err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm); | |
866 | if (err < 0) | |
867 | return err; | |
868 | ||
869 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops); | |
870 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops); | |
871 | ||
872 | pcm->private_data = ice; | |
873 | pcm->info_flags = 0; | |
874 | strcpy(pcm->name, "ICE1724"); | |
875 | ||
876 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
ab0c7d72 TI |
877 | snd_dma_pci_data(ice->pci), |
878 | 256*1024, 256*1024); | |
1da177e4 LT |
879 | |
880 | ice->pcm_pro = pcm; | |
881 | ||
882 | return 0; | |
883 | } | |
884 | ||
885 | ||
886 | /* | |
887 | * SPDIF PCM | |
888 | */ | |
889 | ||
890 | static struct vt1724_pcm_reg vt1724_playback_spdif_reg = { | |
891 | .addr = VT1724_MT_PDMA4_ADDR, | |
892 | .size = VT1724_MT_PDMA4_SIZE, | |
893 | .count = VT1724_MT_PDMA4_COUNT, | |
894 | .start = VT1724_PDMA4_START, | |
895 | }; | |
896 | ||
897 | static struct vt1724_pcm_reg vt1724_capture_spdif_reg = { | |
898 | .addr = VT1724_MT_RDMA1_ADDR, | |
899 | .size = VT1724_MT_RDMA1_SIZE, | |
900 | .count = VT1724_MT_RDMA1_COUNT, | |
901 | .start = VT1724_RDMA1_START, | |
902 | }; | |
903 | ||
904 | /* update spdif control bits; call with reg_lock */ | |
ab0c7d72 | 905 | static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val) |
1da177e4 LT |
906 | { |
907 | unsigned char cbit, disabled; | |
908 | ||
909 | cbit = inb(ICEREG1724(ice, SPDIF_CFG)); | |
910 | disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN; | |
911 | if (cbit != disabled) | |
912 | outb(disabled, ICEREG1724(ice, SPDIF_CFG)); | |
913 | outw(val, ICEMT1724(ice, SPDIF_CTRL)); | |
914 | if (cbit != disabled) | |
915 | outb(cbit, ICEREG1724(ice, SPDIF_CFG)); | |
916 | outw(val, ICEMT1724(ice, SPDIF_CTRL)); | |
917 | } | |
918 | ||
919 | /* update SPDIF control bits according to the given rate */ | |
ab0c7d72 | 920 | static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate) |
1da177e4 LT |
921 | { |
922 | unsigned int val, nval; | |
923 | unsigned long flags; | |
924 | ||
925 | spin_lock_irqsave(&ice->reg_lock, flags); | |
926 | nval = val = inw(ICEMT1724(ice, SPDIF_CTRL)); | |
927 | nval &= ~(7 << 12); | |
928 | switch (rate) { | |
929 | case 44100: break; | |
930 | case 48000: nval |= 2 << 12; break; | |
931 | case 32000: nval |= 3 << 12; break; | |
2dfbeca9 TI |
932 | case 88200: nval |= 4 << 12; break; |
933 | case 96000: nval |= 5 << 12; break; | |
934 | case 192000: nval |= 6 << 12; break; | |
935 | case 176400: nval |= 7 << 12; break; | |
1da177e4 LT |
936 | } |
937 | if (val != nval) | |
938 | update_spdif_bits(ice, nval); | |
939 | spin_unlock_irqrestore(&ice->reg_lock, flags); | |
940 | } | |
941 | ||
ab0c7d72 | 942 | static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 943 | { |
ab0c7d72 | 944 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
945 | if (! ice->force_pdma4) |
946 | update_spdif_rate(ice, substream->runtime->rate); | |
947 | return snd_vt1724_pcm_prepare(substream); | |
948 | } | |
949 | ||
ab0c7d72 | 950 | static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream) |
1da177e4 | 951 | { |
ab0c7d72 TI |
952 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
953 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
954 | |
955 | runtime->private_data = &vt1724_playback_spdif_reg; | |
956 | ice->playback_con_substream = substream; | |
957 | if (ice->force_pdma4) { | |
958 | runtime->hw = snd_vt1724_2ch_stereo; | |
959 | set_rate_constraints(ice, substream); | |
960 | } else | |
961 | runtime->hw = snd_vt1724_spdif; | |
962 | snd_pcm_set_sync(substream); | |
963 | snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); | |
964 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, | |
965 | VT1724_BUFFER_ALIGN); | |
966 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, | |
967 | VT1724_BUFFER_ALIGN); | |
968 | return 0; | |
969 | } | |
970 | ||
ab0c7d72 | 971 | static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream) |
1da177e4 | 972 | { |
ab0c7d72 | 973 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
974 | |
975 | if (PRO_RATE_RESET) | |
976 | snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); | |
977 | ice->playback_con_substream = NULL; | |
978 | ||
979 | return 0; | |
980 | } | |
981 | ||
ab0c7d72 | 982 | static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream) |
1da177e4 | 983 | { |
ab0c7d72 TI |
984 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
985 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
986 | |
987 | runtime->private_data = &vt1724_capture_spdif_reg; | |
988 | ice->capture_con_substream = substream; | |
989 | if (ice->force_rdma1) { | |
990 | runtime->hw = snd_vt1724_2ch_stereo; | |
991 | set_rate_constraints(ice, substream); | |
992 | } else | |
993 | runtime->hw = snd_vt1724_spdif; | |
994 | snd_pcm_set_sync(substream); | |
995 | snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); | |
996 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, | |
997 | VT1724_BUFFER_ALIGN); | |
998 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, | |
999 | VT1724_BUFFER_ALIGN); | |
1000 | return 0; | |
1001 | } | |
1002 | ||
ab0c7d72 | 1003 | static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream) |
1da177e4 | 1004 | { |
ab0c7d72 | 1005 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1006 | |
1007 | if (PRO_RATE_RESET) | |
1008 | snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); | |
1009 | ice->capture_con_substream = NULL; | |
1010 | ||
1011 | return 0; | |
1012 | } | |
1013 | ||
ab0c7d72 | 1014 | static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = { |
1da177e4 LT |
1015 | .open = snd_vt1724_playback_spdif_open, |
1016 | .close = snd_vt1724_playback_spdif_close, | |
1017 | .ioctl = snd_pcm_lib_ioctl, | |
1018 | .hw_params = snd_vt1724_pcm_hw_params, | |
1019 | .hw_free = snd_vt1724_pcm_hw_free, | |
1020 | .prepare = snd_vt1724_playback_spdif_prepare, | |
1021 | .trigger = snd_vt1724_pcm_trigger, | |
1022 | .pointer = snd_vt1724_pcm_pointer, | |
1023 | }; | |
1024 | ||
ab0c7d72 | 1025 | static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = { |
1da177e4 LT |
1026 | .open = snd_vt1724_capture_spdif_open, |
1027 | .close = snd_vt1724_capture_spdif_close, | |
1028 | .ioctl = snd_pcm_lib_ioctl, | |
1029 | .hw_params = snd_vt1724_pcm_hw_params, | |
1030 | .hw_free = snd_vt1724_pcm_hw_free, | |
1031 | .prepare = snd_vt1724_pcm_prepare, | |
1032 | .trigger = snd_vt1724_pcm_trigger, | |
1033 | .pointer = snd_vt1724_pcm_pointer, | |
1034 | }; | |
1035 | ||
1036 | ||
ab0c7d72 | 1037 | static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 * ice, int device) |
1da177e4 LT |
1038 | { |
1039 | char *name; | |
ab0c7d72 | 1040 | struct snd_pcm *pcm; |
1da177e4 LT |
1041 | int play, capt; |
1042 | int err; | |
1043 | ||
1044 | if (ice->force_pdma4 || | |
1045 | (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) { | |
1046 | play = 1; | |
1047 | ice->has_spdif = 1; | |
1048 | } else | |
1049 | play = 0; | |
1050 | if (ice->force_rdma1 || | |
1051 | (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) { | |
1052 | capt = 1; | |
1053 | ice->has_spdif = 1; | |
1054 | } else | |
1055 | capt = 0; | |
1056 | if (! play && ! capt) | |
1057 | return 0; /* no spdif device */ | |
1058 | ||
1059 | if (ice->force_pdma4 || ice->force_rdma1) | |
1060 | name = "ICE1724 Secondary"; | |
1061 | else | |
1062 | name = "IEC1724 IEC958"; | |
1063 | err = snd_pcm_new(ice->card, name, device, play, capt, &pcm); | |
1064 | if (err < 0) | |
1065 | return err; | |
1066 | ||
1067 | if (play) | |
1068 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, | |
1069 | &snd_vt1724_playback_spdif_ops); | |
1070 | if (capt) | |
1071 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, | |
1072 | &snd_vt1724_capture_spdif_ops); | |
1073 | ||
1074 | pcm->private_data = ice; | |
1075 | pcm->info_flags = 0; | |
1076 | strcpy(pcm->name, name); | |
1077 | ||
1078 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
ab0c7d72 TI |
1079 | snd_dma_pci_data(ice->pci), |
1080 | 64*1024, 64*1024); | |
1da177e4 LT |
1081 | |
1082 | ice->pcm = pcm; | |
1083 | ||
1084 | return 0; | |
1085 | } | |
1086 | ||
1087 | ||
1088 | /* | |
1089 | * independent surround PCMs | |
1090 | */ | |
1091 | ||
1092 | static struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = { | |
1093 | { | |
1094 | .addr = VT1724_MT_PDMA1_ADDR, | |
1095 | .size = VT1724_MT_PDMA1_SIZE, | |
1096 | .count = VT1724_MT_PDMA1_COUNT, | |
1097 | .start = VT1724_PDMA1_START, | |
1098 | }, | |
1099 | { | |
1100 | .addr = VT1724_MT_PDMA2_ADDR, | |
1101 | .size = VT1724_MT_PDMA2_SIZE, | |
1102 | .count = VT1724_MT_PDMA2_COUNT, | |
1103 | .start = VT1724_PDMA2_START, | |
1104 | }, | |
1105 | { | |
1106 | .addr = VT1724_MT_PDMA3_ADDR, | |
1107 | .size = VT1724_MT_PDMA3_SIZE, | |
1108 | .count = VT1724_MT_PDMA3_COUNT, | |
1109 | .start = VT1724_PDMA3_START, | |
1110 | }, | |
1111 | }; | |
1112 | ||
ab0c7d72 | 1113 | static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 1114 | { |
ab0c7d72 | 1115 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1116 | unsigned char val; |
1117 | ||
1118 | spin_lock_irq(&ice->reg_lock); | |
1119 | val = 3 - substream->number; | |
1120 | if (inb(ICEMT1724(ice, BURST)) < val) | |
1121 | outb(val, ICEMT1724(ice, BURST)); | |
1122 | spin_unlock_irq(&ice->reg_lock); | |
1123 | return snd_vt1724_pcm_prepare(substream); | |
1124 | } | |
1125 | ||
ab0c7d72 | 1126 | static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream) |
1da177e4 | 1127 | { |
ab0c7d72 TI |
1128 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1129 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1130 | |
1131 | down(&ice->open_mutex); | |
1132 | /* already used by PDMA0? */ | |
1133 | if (ice->pcm_reserved[substream->number]) { | |
1134 | up(&ice->open_mutex); | |
1135 | return -EBUSY; /* FIXME: should handle blocking mode properly */ | |
1136 | } | |
1137 | up(&ice->open_mutex); | |
1138 | runtime->private_data = &vt1724_playback_dma_regs[substream->number]; | |
1139 | ice->playback_con_substream_ds[substream->number] = substream; | |
1140 | runtime->hw = snd_vt1724_2ch_stereo; | |
1141 | snd_pcm_set_sync(substream); | |
1142 | snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); | |
1143 | set_rate_constraints(ice, substream); | |
1144 | return 0; | |
1145 | } | |
1146 | ||
ab0c7d72 | 1147 | static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream) |
1da177e4 | 1148 | { |
ab0c7d72 | 1149 | struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1150 | |
1151 | if (PRO_RATE_RESET) | |
1152 | snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); | |
1153 | ice->playback_con_substream_ds[substream->number] = NULL; | |
1154 | ice->pcm_reserved[substream->number] = NULL; | |
1155 | ||
1156 | return 0; | |
1157 | } | |
1158 | ||
ab0c7d72 | 1159 | static struct snd_pcm_ops snd_vt1724_playback_indep_ops = { |
1da177e4 LT |
1160 | .open = snd_vt1724_playback_indep_open, |
1161 | .close = snd_vt1724_playback_indep_close, | |
1162 | .ioctl = snd_pcm_lib_ioctl, | |
1163 | .hw_params = snd_vt1724_pcm_hw_params, | |
1164 | .hw_free = snd_vt1724_pcm_hw_free, | |
1165 | .prepare = snd_vt1724_playback_indep_prepare, | |
1166 | .trigger = snd_vt1724_pcm_trigger, | |
1167 | .pointer = snd_vt1724_pcm_pointer, | |
1168 | }; | |
1169 | ||
1170 | ||
ab0c7d72 | 1171 | static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 * ice, int device) |
1da177e4 | 1172 | { |
ab0c7d72 | 1173 | struct snd_pcm *pcm; |
1da177e4 LT |
1174 | int play; |
1175 | int err; | |
1176 | ||
1177 | play = ice->num_total_dacs / 2 - 1; | |
1178 | if (play <= 0) | |
1179 | return 0; | |
1180 | ||
1181 | err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm); | |
1182 | if (err < 0) | |
1183 | return err; | |
1184 | ||
1185 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, | |
1186 | &snd_vt1724_playback_indep_ops); | |
1187 | ||
1188 | pcm->private_data = ice; | |
1189 | pcm->info_flags = 0; | |
1190 | strcpy(pcm->name, "ICE1724 Surround PCM"); | |
1191 | ||
1192 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
ab0c7d72 TI |
1193 | snd_dma_pci_data(ice->pci), |
1194 | 64*1024, 64*1024); | |
1da177e4 LT |
1195 | |
1196 | ice->pcm_ds = pcm; | |
1197 | ||
1198 | return 0; | |
1199 | } | |
1200 | ||
1201 | ||
1202 | /* | |
1203 | * Mixer section | |
1204 | */ | |
1205 | ||
ab0c7d72 | 1206 | static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 * ice) |
1da177e4 LT |
1207 | { |
1208 | int err; | |
1209 | ||
1210 | if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) { | |
ab0c7d72 TI |
1211 | struct snd_ac97_bus *pbus; |
1212 | struct snd_ac97_template ac97; | |
1213 | static struct snd_ac97_bus_ops ops = { | |
1da177e4 LT |
1214 | .write = snd_vt1724_ac97_write, |
1215 | .read = snd_vt1724_ac97_read, | |
1216 | }; | |
1217 | ||
1218 | /* cold reset */ | |
1219 | outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD)); | |
1220 | mdelay(5); /* FIXME */ | |
1221 | outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD)); | |
1222 | ||
1223 | if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0) | |
1224 | return err; | |
1225 | memset(&ac97, 0, sizeof(ac97)); | |
1226 | ac97.private_data = ice; | |
1227 | if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0) | |
1228 | printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n"); | |
1229 | else | |
1230 | return 0; | |
1231 | } | |
1232 | /* I2S mixer only */ | |
1233 | strcat(ice->card->mixername, "ICE1724 - multitrack"); | |
1234 | return 0; | |
1235 | } | |
1236 | ||
1237 | /* | |
1238 | * | |
1239 | */ | |
1240 | ||
ab0c7d72 | 1241 | static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx) |
1da177e4 LT |
1242 | { |
1243 | return (unsigned int)ice->eeprom.data[idx] | \ | |
1244 | ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \ | |
1245 | ((unsigned int)ice->eeprom.data[idx + 2] << 16); | |
1246 | } | |
1247 | ||
ab0c7d72 TI |
1248 | static void snd_vt1724_proc_read(struct snd_info_entry *entry, |
1249 | struct snd_info_buffer *buffer) | |
1da177e4 | 1250 | { |
ab0c7d72 | 1251 | struct snd_ice1712 *ice = entry->private_data; |
1da177e4 LT |
1252 | unsigned int idx; |
1253 | ||
1254 | snd_iprintf(buffer, "%s\n\n", ice->card->longname); | |
1255 | snd_iprintf(buffer, "EEPROM:\n"); | |
1256 | ||
1257 | snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); | |
1258 | snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); | |
1259 | snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); | |
ab0c7d72 TI |
1260 | snd_iprintf(buffer, " System Config : 0x%x\n", |
1261 | ice->eeprom.data[ICE_EEP2_SYSCONF]); | |
1262 | snd_iprintf(buffer, " ACLink : 0x%x\n", | |
1263 | ice->eeprom.data[ICE_EEP2_ACLINK]); | |
1264 | snd_iprintf(buffer, " I2S : 0x%x\n", | |
1265 | ice->eeprom.data[ICE_EEP2_I2S]); | |
1266 | snd_iprintf(buffer, " S/PDIF : 0x%x\n", | |
1267 | ice->eeprom.data[ICE_EEP2_SPDIF]); | |
1268 | snd_iprintf(buffer, " GPIO direction : 0x%x\n", | |
1269 | ice->eeprom.gpiodir); | |
1270 | snd_iprintf(buffer, " GPIO mask : 0x%x\n", | |
1271 | ice->eeprom.gpiomask); | |
1272 | snd_iprintf(buffer, " GPIO state : 0x%x\n", | |
1273 | ice->eeprom.gpiostate); | |
1da177e4 | 1274 | for (idx = 0x12; idx < ice->eeprom.size; idx++) |
ab0c7d72 TI |
1275 | snd_iprintf(buffer, " Extra #%02i : 0x%x\n", |
1276 | idx, ice->eeprom.data[idx]); | |
1da177e4 LT |
1277 | |
1278 | snd_iprintf(buffer, "\nRegisters:\n"); | |
1279 | ||
ab0c7d72 TI |
1280 | snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n", |
1281 | (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK))); | |
1da177e4 | 1282 | for (idx = 0x0; idx < 0x20 ; idx++) |
ab0c7d72 TI |
1283 | snd_iprintf(buffer, " CCS%02x : 0x%02x\n", |
1284 | idx, inb(ice->port+idx)); | |
1da177e4 | 1285 | for (idx = 0x0; idx < 0x30 ; idx++) |
ab0c7d72 TI |
1286 | snd_iprintf(buffer, " MT%02x : 0x%02x\n", |
1287 | idx, inb(ice->profi_port+idx)); | |
1da177e4 LT |
1288 | } |
1289 | ||
ab0c7d72 | 1290 | static void __devinit snd_vt1724_proc_init(struct snd_ice1712 * ice) |
1da177e4 | 1291 | { |
ab0c7d72 | 1292 | struct snd_info_entry *entry; |
1da177e4 LT |
1293 | |
1294 | if (! snd_card_proc_new(ice->card, "ice1724", &entry)) | |
1295 | snd_info_set_text_ops(entry, ice, 1024, snd_vt1724_proc_read); | |
1296 | } | |
1297 | ||
1298 | /* | |
1299 | * | |
1300 | */ | |
1301 | ||
ab0c7d72 TI |
1302 | static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol, |
1303 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1304 | { |
1305 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; | |
ab0c7d72 | 1306 | uinfo->count = sizeof(struct snd_ice1712_eeprom); |
1da177e4 LT |
1307 | return 0; |
1308 | } | |
1309 | ||
ab0c7d72 TI |
1310 | static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol, |
1311 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1312 | { |
ab0c7d72 | 1313 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1314 | |
1315 | memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); | |
1316 | return 0; | |
1317 | } | |
1318 | ||
ab0c7d72 | 1319 | static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = { |
1da177e4 LT |
1320 | .iface = SNDRV_CTL_ELEM_IFACE_CARD, |
1321 | .name = "ICE1724 EEPROM", | |
1322 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
1323 | .info = snd_vt1724_eeprom_info, | |
1324 | .get = snd_vt1724_eeprom_get | |
1325 | }; | |
1326 | ||
1327 | /* | |
1328 | */ | |
ab0c7d72 TI |
1329 | static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol, |
1330 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1331 | { |
1332 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
1333 | uinfo->count = 1; | |
1334 | return 0; | |
1335 | } | |
1336 | ||
ab0c7d72 | 1337 | static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga) |
1da177e4 | 1338 | { |
2dfbeca9 | 1339 | unsigned int val, rbits; |
1da177e4 LT |
1340 | |
1341 | val = diga->status[0] & 0x03; /* professional, non-audio */ | |
1342 | if (val & 0x01) { | |
1343 | /* professional */ | |
ab0c7d72 TI |
1344 | if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) == |
1345 | IEC958_AES0_PRO_EMPHASIS_5015) | |
1da177e4 | 1346 | val |= 1U << 3; |
2dfbeca9 TI |
1347 | rbits = (diga->status[4] >> 3) & 0x0f; |
1348 | if (rbits) { | |
1349 | switch (rbits) { | |
1350 | case 2: val |= 5 << 12; break; /* 96k */ | |
1351 | case 3: val |= 6 << 12; break; /* 192k */ | |
1352 | case 10: val |= 4 << 12; break; /* 88.2k */ | |
1353 | case 11: val |= 7 << 12; break; /* 176.4k */ | |
1354 | } | |
1355 | } else { | |
1356 | switch (diga->status[0] & IEC958_AES0_PRO_FS) { | |
1357 | case IEC958_AES0_PRO_FS_44100: | |
1358 | break; | |
1359 | case IEC958_AES0_PRO_FS_32000: | |
1360 | val |= 3U << 12; | |
1361 | break; | |
1362 | default: | |
1363 | val |= 2U << 12; | |
1364 | break; | |
1365 | } | |
1da177e4 LT |
1366 | } |
1367 | } else { | |
1368 | /* consumer */ | |
1369 | val |= diga->status[1] & 0x04; /* copyright */ | |
ab0c7d72 TI |
1370 | if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) == |
1371 | IEC958_AES0_CON_EMPHASIS_5015) | |
1da177e4 LT |
1372 | val |= 1U << 3; |
1373 | val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */ | |
1374 | val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */ | |
1375 | } | |
1376 | return val; | |
1377 | } | |
1378 | ||
ab0c7d72 | 1379 | static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val) |
1da177e4 LT |
1380 | { |
1381 | memset(diga->status, 0, sizeof(diga->status)); | |
1382 | diga->status[0] = val & 0x03; /* professional, non-audio */ | |
1383 | if (val & 0x01) { | |
1384 | /* professional */ | |
1385 | if (val & (1U << 3)) | |
1386 | diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015; | |
1387 | switch ((val >> 12) & 0x7) { | |
1388 | case 0: | |
1389 | break; | |
1390 | case 2: | |
1391 | diga->status[0] |= IEC958_AES0_PRO_FS_32000; | |
1392 | break; | |
1393 | default: | |
1394 | diga->status[0] |= IEC958_AES0_PRO_FS_48000; | |
1395 | break; | |
1396 | } | |
1397 | } else { | |
1398 | /* consumer */ | |
1399 | diga->status[0] |= val & (1U << 2); /* copyright */ | |
1400 | if (val & (1U << 3)) | |
1401 | diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015; | |
1402 | diga->status[1] |= (val >> 4) & 0x3f; /* category */ | |
1403 | diga->status[3] |= (val >> 12) & 0x07; /* fs */ | |
1404 | } | |
1405 | } | |
1406 | ||
ab0c7d72 TI |
1407 | static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol, |
1408 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1409 | { |
ab0c7d72 | 1410 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1411 | unsigned int val; |
1412 | val = inw(ICEMT1724(ice, SPDIF_CTRL)); | |
1413 | decode_spdif_bits(&ucontrol->value.iec958, val); | |
1414 | return 0; | |
1415 | } | |
1416 | ||
ab0c7d72 TI |
1417 | static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol, |
1418 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1419 | { |
ab0c7d72 | 1420 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1421 | unsigned int val, old; |
1422 | ||
1423 | val = encode_spdif_bits(&ucontrol->value.iec958); | |
1424 | spin_lock_irq(&ice->reg_lock); | |
1425 | old = inw(ICEMT1724(ice, SPDIF_CTRL)); | |
1426 | if (val != old) | |
1427 | update_spdif_bits(ice, val); | |
1428 | spin_unlock_irq(&ice->reg_lock); | |
1429 | return (val != old); | |
1430 | } | |
1431 | ||
ab0c7d72 | 1432 | static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata = |
1da177e4 LT |
1433 | { |
1434 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
1435 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), | |
1436 | .info = snd_vt1724_spdif_info, | |
1437 | .get = snd_vt1724_spdif_default_get, | |
1438 | .put = snd_vt1724_spdif_default_put | |
1439 | }; | |
1440 | ||
ab0c7d72 TI |
1441 | static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol, |
1442 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 LT |
1443 | { |
1444 | ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | | |
1445 | IEC958_AES0_PROFESSIONAL | | |
1446 | IEC958_AES0_CON_NOT_COPYRIGHT | | |
1447 | IEC958_AES0_CON_EMPHASIS; | |
1448 | ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | | |
1449 | IEC958_AES1_CON_CATEGORY; | |
1450 | ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; | |
1451 | return 0; | |
1452 | } | |
1453 | ||
ab0c7d72 TI |
1454 | static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol, |
1455 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 LT |
1456 | { |
1457 | ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | | |
1458 | IEC958_AES0_PROFESSIONAL | | |
1459 | IEC958_AES0_PRO_FS | | |
1460 | IEC958_AES0_PRO_EMPHASIS; | |
1461 | return 0; | |
1462 | } | |
1463 | ||
ab0c7d72 | 1464 | static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata = |
1da177e4 LT |
1465 | { |
1466 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
67ed4161 | 1467 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1da177e4 LT |
1468 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), |
1469 | .info = snd_vt1724_spdif_info, | |
1470 | .get = snd_vt1724_spdif_maskc_get, | |
1471 | }; | |
1472 | ||
ab0c7d72 | 1473 | static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata = |
1da177e4 LT |
1474 | { |
1475 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
67ed4161 | 1476 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1da177e4 LT |
1477 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK), |
1478 | .info = snd_vt1724_spdif_info, | |
1479 | .get = snd_vt1724_spdif_maskp_get, | |
1480 | }; | |
1481 | ||
ab0c7d72 TI |
1482 | static int snd_vt1724_spdif_sw_info(struct snd_kcontrol *kcontrol, |
1483 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1484 | { |
1485 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; | |
1486 | uinfo->count = 1; | |
1487 | uinfo->value.integer.min = 0; | |
1488 | uinfo->value.integer.max = 1; | |
1489 | return 0; | |
1490 | } | |
1491 | ||
ab0c7d72 TI |
1492 | static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol, |
1493 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1494 | { |
ab0c7d72 TI |
1495 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1496 | ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) & | |
1497 | VT1724_CFG_SPDIF_OUT_EN ? 1 : 0; | |
1da177e4 LT |
1498 | return 0; |
1499 | } | |
1500 | ||
ab0c7d72 TI |
1501 | static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol, |
1502 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1503 | { |
ab0c7d72 | 1504 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1505 | unsigned char old, val; |
1506 | ||
1507 | spin_lock_irq(&ice->reg_lock); | |
1508 | old = val = inb(ICEREG1724(ice, SPDIF_CFG)); | |
1509 | val &= ~VT1724_CFG_SPDIF_OUT_EN; | |
1510 | if (ucontrol->value.integer.value[0]) | |
1511 | val |= VT1724_CFG_SPDIF_OUT_EN; | |
1512 | if (old != val) | |
1513 | outb(val, ICEREG1724(ice, SPDIF_CFG)); | |
1514 | spin_unlock_irq(&ice->reg_lock); | |
1515 | return old != val; | |
1516 | } | |
1517 | ||
ab0c7d72 | 1518 | static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata = |
1da177e4 LT |
1519 | { |
1520 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1521 | /* FIXME: the following conflict with IEC958 Playback Route */ | |
1522 | // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), | |
10e8d78a | 1523 | .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH), |
1da177e4 LT |
1524 | .info = snd_vt1724_spdif_sw_info, |
1525 | .get = snd_vt1724_spdif_sw_get, | |
1526 | .put = snd_vt1724_spdif_sw_put | |
1527 | }; | |
1528 | ||
1529 | ||
1530 | #if 0 /* NOT USED YET */ | |
1531 | /* | |
1532 | * GPIO access from extern | |
1533 | */ | |
1534 | ||
ab0c7d72 TI |
1535 | int snd_vt1724_gpio_info(struct snd_kcontrol *kcontrol, |
1536 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1537 | { |
1538 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; | |
1539 | uinfo->count = 1; | |
1540 | uinfo->value.integer.min = 0; | |
1541 | uinfo->value.integer.max = 1; | |
1542 | return 0; | |
1543 | } | |
1544 | ||
ab0c7d72 TI |
1545 | int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol, |
1546 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1547 | { |
ab0c7d72 | 1548 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1549 | int shift = kcontrol->private_value & 0xff; |
1550 | int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; | |
1551 | ||
1552 | snd_ice1712_save_gpio_status(ice); | |
ab0c7d72 TI |
1553 | ucontrol->value.integer.value[0] = |
1554 | (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert; | |
1da177e4 LT |
1555 | snd_ice1712_restore_gpio_status(ice); |
1556 | return 0; | |
1557 | } | |
1558 | ||
ab0c7d72 TI |
1559 | int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, |
1560 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1561 | { |
ab0c7d72 | 1562 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1563 | int shift = kcontrol->private_value & 0xff; |
1564 | int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; | |
1565 | unsigned int val, nval; | |
1566 | ||
1567 | if (kcontrol->private_value & (1 << 31)) | |
1568 | return -EPERM; | |
1569 | nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert; | |
1570 | snd_ice1712_save_gpio_status(ice); | |
1571 | val = snd_ice1712_gpio_read(ice); | |
1572 | nval |= val & ~(1 << shift); | |
1573 | if (val != nval) | |
1574 | snd_ice1712_gpio_write(ice, nval); | |
1575 | snd_ice1712_restore_gpio_status(ice); | |
1576 | return val != nval; | |
1577 | } | |
1578 | #endif /* NOT USED YET */ | |
1579 | ||
1580 | /* | |
1581 | * rate | |
1582 | */ | |
ab0c7d72 TI |
1583 | static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol, |
1584 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1585 | { |
1586 | static char *texts_1724[] = { | |
1587 | "8000", /* 0: 6 */ | |
1588 | "9600", /* 1: 3 */ | |
1589 | "11025", /* 2: 10 */ | |
1590 | "12000", /* 3: 2 */ | |
1591 | "16000", /* 4: 5 */ | |
1592 | "22050", /* 5: 9 */ | |
1593 | "24000", /* 6: 1 */ | |
1594 | "32000", /* 7: 4 */ | |
1595 | "44100", /* 8: 8 */ | |
1596 | "48000", /* 9: 0 */ | |
1597 | "64000", /* 10: 15 */ | |
1598 | "88200", /* 11: 11 */ | |
1599 | "96000", /* 12: 7 */ | |
1600 | "176400", /* 13: 12 */ | |
1601 | "192000", /* 14: 14 */ | |
1602 | "IEC958 Input", /* 15: -- */ | |
1603 | }; | |
1604 | static char *texts_1720[] = { | |
1605 | "8000", /* 0: 6 */ | |
1606 | "9600", /* 1: 3 */ | |
1607 | "11025", /* 2: 10 */ | |
1608 | "12000", /* 3: 2 */ | |
1609 | "16000", /* 4: 5 */ | |
1610 | "22050", /* 5: 9 */ | |
1611 | "24000", /* 6: 1 */ | |
1612 | "32000", /* 7: 4 */ | |
1613 | "44100", /* 8: 8 */ | |
1614 | "48000", /* 9: 0 */ | |
1615 | "64000", /* 10: 15 */ | |
1616 | "88200", /* 11: 11 */ | |
1617 | "96000", /* 12: 7 */ | |
1618 | "IEC958 Input", /* 13: -- */ | |
1619 | }; | |
ab0c7d72 | 1620 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1621 | |
1622 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
1623 | uinfo->count = 1; | |
1624 | uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16; | |
1625 | if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) | |
1626 | uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; | |
1627 | strcpy(uinfo->value.enumerated.name, | |
1628 | ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] : | |
1629 | texts_1724[uinfo->value.enumerated.item]); | |
1630 | return 0; | |
1631 | } | |
1632 | ||
ab0c7d72 TI |
1633 | static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol, |
1634 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1635 | { |
ab0c7d72 | 1636 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1637 | static unsigned char xlate[16] = { |
1638 | 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10 | |
1639 | }; | |
1640 | unsigned char val; | |
1641 | ||
1642 | spin_lock_irq(&ice->reg_lock); | |
1643 | if (is_spdif_master(ice)) { | |
1644 | ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15; | |
1645 | } else { | |
1646 | val = xlate[inb(ICEMT1724(ice, RATE)) & 15]; | |
1647 | if (val == 255) { | |
1648 | snd_BUG(); | |
1649 | val = 0; | |
1650 | } | |
1651 | ucontrol->value.enumerated.item[0] = val; | |
1652 | } | |
1653 | spin_unlock_irq(&ice->reg_lock); | |
1654 | return 0; | |
1655 | } | |
1656 | ||
ab0c7d72 TI |
1657 | static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol, |
1658 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1659 | { |
ab0c7d72 | 1660 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1661 | unsigned char oval; |
1662 | int rate; | |
1663 | int change = 0; | |
1664 | int spdif = ice->vt1720 ? 13 : 15; | |
1665 | ||
1666 | spin_lock_irq(&ice->reg_lock); | |
1667 | oval = inb(ICEMT1724(ice, RATE)); | |
1668 | if (ucontrol->value.enumerated.item[0] == spdif) { | |
1669 | outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); | |
1670 | } else { | |
1671 | rate = rates[ucontrol->value.integer.value[0] % 15]; | |
1672 | if (rate <= get_max_rate(ice)) { | |
1673 | PRO_RATE_DEFAULT = rate; | |
1674 | spin_unlock_irq(&ice->reg_lock); | |
1675 | snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1); | |
1676 | spin_lock_irq(&ice->reg_lock); | |
1677 | } | |
1678 | } | |
1679 | change = inb(ICEMT1724(ice, RATE)) != oval; | |
1680 | spin_unlock_irq(&ice->reg_lock); | |
1681 | ||
ab0c7d72 TI |
1682 | if ((oval & VT1724_SPDIF_MASTER) != |
1683 | (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) { | |
1da177e4 LT |
1684 | /* notify akm chips as well */ |
1685 | if (is_spdif_master(ice)) { | |
1686 | unsigned int i; | |
1687 | for (i = 0; i < ice->akm_codecs; i++) { | |
1688 | if (ice->akm[i].ops.set_rate_val) | |
1689 | ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); | |
1690 | } | |
1691 | } | |
1692 | } | |
1693 | return change; | |
1694 | } | |
1695 | ||
ab0c7d72 | 1696 | static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = { |
1da177e4 LT |
1697 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
1698 | .name = "Multi Track Internal Clock", | |
1699 | .info = snd_vt1724_pro_internal_clock_info, | |
1700 | .get = snd_vt1724_pro_internal_clock_get, | |
1701 | .put = snd_vt1724_pro_internal_clock_put | |
1702 | }; | |
1703 | ||
ab0c7d72 TI |
1704 | static int snd_vt1724_pro_rate_locking_info(struct snd_kcontrol *kcontrol, |
1705 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1706 | { |
1707 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; | |
1708 | uinfo->count = 1; | |
1709 | uinfo->value.integer.min = 0; | |
1710 | uinfo->value.integer.max = 1; | |
1711 | return 0; | |
1712 | } | |
1713 | ||
ab0c7d72 TI |
1714 | static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol, |
1715 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 LT |
1716 | { |
1717 | ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; | |
1718 | return 0; | |
1719 | } | |
1720 | ||
ab0c7d72 TI |
1721 | static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol, |
1722 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1723 | { |
ab0c7d72 | 1724 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1725 | int change = 0, nval; |
1726 | ||
1727 | nval = ucontrol->value.integer.value[0] ? 1 : 0; | |
1728 | spin_lock_irq(&ice->reg_lock); | |
1729 | change = PRO_RATE_LOCKED != nval; | |
1730 | PRO_RATE_LOCKED = nval; | |
1731 | spin_unlock_irq(&ice->reg_lock); | |
1732 | return change; | |
1733 | } | |
1734 | ||
ab0c7d72 | 1735 | static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = { |
1da177e4 LT |
1736 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
1737 | .name = "Multi Track Rate Locking", | |
1738 | .info = snd_vt1724_pro_rate_locking_info, | |
1739 | .get = snd_vt1724_pro_rate_locking_get, | |
1740 | .put = snd_vt1724_pro_rate_locking_put | |
1741 | }; | |
1742 | ||
ab0c7d72 TI |
1743 | static int snd_vt1724_pro_rate_reset_info(struct snd_kcontrol *kcontrol, |
1744 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1745 | { |
1746 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; | |
1747 | uinfo->count = 1; | |
1748 | uinfo->value.integer.min = 0; | |
1749 | uinfo->value.integer.max = 1; | |
1750 | return 0; | |
1751 | } | |
1752 | ||
ab0c7d72 TI |
1753 | static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol, |
1754 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 LT |
1755 | { |
1756 | ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0; | |
1757 | return 0; | |
1758 | } | |
1759 | ||
ab0c7d72 TI |
1760 | static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol, |
1761 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1762 | { |
ab0c7d72 | 1763 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1764 | int change = 0, nval; |
1765 | ||
1766 | nval = ucontrol->value.integer.value[0] ? 1 : 0; | |
1767 | spin_lock_irq(&ice->reg_lock); | |
1768 | change = PRO_RATE_RESET != nval; | |
1769 | PRO_RATE_RESET = nval; | |
1770 | spin_unlock_irq(&ice->reg_lock); | |
1771 | return change; | |
1772 | } | |
1773 | ||
ab0c7d72 | 1774 | static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = { |
1da177e4 LT |
1775 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
1776 | .name = "Multi Track Rate Reset", | |
1777 | .info = snd_vt1724_pro_rate_reset_info, | |
1778 | .get = snd_vt1724_pro_rate_reset_get, | |
1779 | .put = snd_vt1724_pro_rate_reset_put | |
1780 | }; | |
1781 | ||
1782 | ||
1783 | /* | |
1784 | * routing | |
1785 | */ | |
ab0c7d72 TI |
1786 | static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol, |
1787 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1788 | { |
1789 | static char *texts[] = { | |
1790 | "PCM Out", /* 0 */ | |
1791 | "H/W In 0", "H/W In 1", /* 1-2 */ | |
1792 | "IEC958 In L", "IEC958 In R", /* 3-4 */ | |
1793 | }; | |
1794 | ||
1795 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
1796 | uinfo->count = 1; | |
1797 | uinfo->value.enumerated.items = 5; | |
1798 | if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) | |
1799 | uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; | |
1800 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
1801 | return 0; | |
1802 | } | |
1803 | ||
1804 | static inline int analog_route_shift(int idx) | |
1805 | { | |
1806 | return (idx % 2) * 12 + ((idx / 2) * 3) + 8; | |
1807 | } | |
1808 | ||
1809 | static inline int digital_route_shift(int idx) | |
1810 | { | |
1811 | return idx * 3; | |
1812 | } | |
1813 | ||
ab0c7d72 | 1814 | static int get_route_val(struct snd_ice1712 *ice, int shift) |
1da177e4 LT |
1815 | { |
1816 | unsigned long val; | |
1817 | unsigned char eitem; | |
1818 | static unsigned char xlate[8] = { | |
1819 | 0, 255, 1, 2, 255, 255, 3, 4, | |
1820 | }; | |
1821 | ||
1822 | val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); | |
1823 | val >>= shift; | |
1824 | val &= 7; //we now have 3 bits per output | |
1825 | eitem = xlate[val]; | |
1826 | if (eitem == 255) { | |
1827 | snd_BUG(); | |
1828 | return 0; | |
1829 | } | |
1830 | return eitem; | |
1831 | } | |
1832 | ||
ab0c7d72 | 1833 | static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift) |
1da177e4 LT |
1834 | { |
1835 | unsigned int old_val, nval; | |
1836 | int change; | |
1837 | static unsigned char xroute[8] = { | |
1838 | 0, /* PCM */ | |
1839 | 2, /* PSDIN0 Left */ | |
1840 | 3, /* PSDIN0 Right */ | |
1841 | 6, /* SPDIN Left */ | |
1842 | 7, /* SPDIN Right */ | |
1843 | }; | |
1844 | ||
1845 | nval = xroute[val % 5]; | |
1846 | val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); | |
1847 | val &= ~(0x07 << shift); | |
1848 | val |= nval << shift; | |
1849 | change = val != old_val; | |
1850 | if (change) | |
1851 | outl(val, ICEMT1724(ice, ROUTE_PLAYBACK)); | |
1852 | return change; | |
1853 | } | |
1854 | ||
ab0c7d72 TI |
1855 | static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol, |
1856 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1857 | { |
ab0c7d72 | 1858 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 | 1859 | int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
ab0c7d72 TI |
1860 | ucontrol->value.enumerated.item[0] = |
1861 | get_route_val(ice, analog_route_shift(idx)); | |
1da177e4 LT |
1862 | return 0; |
1863 | } | |
1864 | ||
ab0c7d72 TI |
1865 | static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol, |
1866 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1867 | { |
ab0c7d72 | 1868 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1869 | int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
1870 | return put_route_val(ice, ucontrol->value.enumerated.item[0], | |
1871 | analog_route_shift(idx)); | |
1872 | } | |
1873 | ||
ab0c7d72 TI |
1874 | static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol, |
1875 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1876 | { |
ab0c7d72 | 1877 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 | 1878 | int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
ab0c7d72 TI |
1879 | ucontrol->value.enumerated.item[0] = |
1880 | get_route_val(ice, digital_route_shift(idx)); | |
1da177e4 LT |
1881 | return 0; |
1882 | } | |
1883 | ||
ab0c7d72 TI |
1884 | static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol, |
1885 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1886 | { |
ab0c7d72 | 1887 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1888 | int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
1889 | return put_route_val(ice, ucontrol->value.enumerated.item[0], | |
1890 | digital_route_shift(idx)); | |
1891 | } | |
1892 | ||
ab0c7d72 | 1893 | static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = { |
1da177e4 LT |
1894 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
1895 | .name = "H/W Playback Route", | |
1896 | .info = snd_vt1724_pro_route_info, | |
1897 | .get = snd_vt1724_pro_route_analog_get, | |
1898 | .put = snd_vt1724_pro_route_analog_put, | |
1899 | }; | |
1900 | ||
ab0c7d72 | 1901 | static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = { |
1da177e4 LT |
1902 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
1903 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route", | |
1904 | .info = snd_vt1724_pro_route_info, | |
1905 | .get = snd_vt1724_pro_route_spdif_get, | |
1906 | .put = snd_vt1724_pro_route_spdif_put, | |
1907 | .count = 2, | |
1908 | }; | |
1909 | ||
1910 | ||
ab0c7d72 TI |
1911 | static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol, |
1912 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1913 | { |
1914 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1915 | uinfo->count = 22; /* FIXME: for compatibility with ice1712... */ | |
1916 | uinfo->value.integer.min = 0; | |
1917 | uinfo->value.integer.max = 255; | |
1918 | return 0; | |
1919 | } | |
1920 | ||
ab0c7d72 TI |
1921 | static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol, |
1922 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1923 | { |
ab0c7d72 | 1924 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1925 | int idx; |
1926 | ||
1927 | spin_lock_irq(&ice->reg_lock); | |
1928 | for (idx = 0; idx < 22; idx++) { | |
1929 | outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX)); | |
ab0c7d72 TI |
1930 | ucontrol->value.integer.value[idx] = |
1931 | inb(ICEMT1724(ice, MONITOR_PEAKDATA)); | |
1da177e4 LT |
1932 | } |
1933 | spin_unlock_irq(&ice->reg_lock); | |
1934 | return 0; | |
1935 | } | |
1936 | ||
ab0c7d72 | 1937 | static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = { |
1da177e4 LT |
1938 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
1939 | .name = "Multi Track Peak", | |
1940 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
1941 | .info = snd_vt1724_pro_peak_info, | |
1942 | .get = snd_vt1724_pro_peak_get | |
1943 | }; | |
1944 | ||
1945 | /* | |
1946 | * | |
1947 | */ | |
1948 | ||
1949 | static struct snd_ice1712_card_info no_matched __devinitdata; | |
1950 | ||
1951 | static struct snd_ice1712_card_info *card_tables[] __devinitdata = { | |
1952 | snd_vt1724_revo_cards, | |
1953 | snd_vt1724_amp_cards, | |
1954 | snd_vt1724_aureon_cards, | |
1955 | snd_vt1720_mobo_cards, | |
1956 | snd_vt1720_pontis_cards, | |
1957 | snd_vt1724_prodigy192_cards, | |
1958 | snd_vt1724_juli_cards, | |
1959 | snd_vt1724_phase_cards, | |
1960 | NULL, | |
1961 | }; | |
1962 | ||
1963 | ||
1964 | /* | |
1965 | */ | |
1966 | ||
ab0c7d72 | 1967 | static void wait_i2c_busy(struct snd_ice1712 *ice) |
1da177e4 LT |
1968 | { |
1969 | int t = 0x10000; | |
1970 | while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--) | |
1971 | ; | |
1972 | if (t == -1) | |
1973 | printk(KERN_ERR "ice1724: i2c busy timeout\n"); | |
1974 | } | |
1975 | ||
ab0c7d72 TI |
1976 | unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice, |
1977 | unsigned char dev, unsigned char addr) | |
1da177e4 LT |
1978 | { |
1979 | unsigned char val; | |
1980 | ||
1981 | down(&ice->i2c_mutex); | |
1982 | outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); | |
1983 | outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); | |
1984 | wait_i2c_busy(ice); | |
1985 | val = inb(ICEREG1724(ice, I2C_DATA)); | |
1986 | up(&ice->i2c_mutex); | |
1987 | //printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val); | |
1988 | return val; | |
1989 | } | |
1990 | ||
ab0c7d72 TI |
1991 | void snd_vt1724_write_i2c(struct snd_ice1712 *ice, |
1992 | unsigned char dev, unsigned char addr, unsigned char data) | |
1da177e4 LT |
1993 | { |
1994 | down(&ice->i2c_mutex); | |
1995 | wait_i2c_busy(ice); | |
1996 | //printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data); | |
1997 | outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); | |
1998 | outb(data, ICEREG1724(ice, I2C_DATA)); | |
1999 | outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); | |
2000 | wait_i2c_busy(ice); | |
2001 | up(&ice->i2c_mutex); | |
2002 | } | |
2003 | ||
ab0c7d72 TI |
2004 | static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice, |
2005 | const char *modelname) | |
1da177e4 LT |
2006 | { |
2007 | const int dev = 0xa0; /* EEPROM device address */ | |
2008 | unsigned int i, size; | |
2009 | struct snd_ice1712_card_info **tbl, *c; | |
2010 | ||
2011 | if (! modelname || ! *modelname) { | |
2012 | ice->eeprom.subvendor = 0; | |
2013 | if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0) | |
2014 | ice->eeprom.subvendor = | |
2015 | (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) | | |
2016 | (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) | | |
2017 | (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) | | |
2018 | (snd_vt1724_read_i2c(ice, dev, 0x03) << 24); | |
ab0c7d72 TI |
2019 | if (ice->eeprom.subvendor == 0 || |
2020 | ice->eeprom.subvendor == (unsigned int)-1) { | |
2021 | /* invalid subvendor from EEPROM, try the PCI | |
2022 | * subststem ID instead | |
2023 | */ | |
1da177e4 | 2024 | u16 vendor, device; |
ab0c7d72 TI |
2025 | pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, |
2026 | &vendor); | |
1da177e4 | 2027 | pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); |
ab0c7d72 TI |
2028 | ice->eeprom.subvendor = |
2029 | ((unsigned int)swab16(vendor) << 16) | swab16(device); | |
2030 | if (ice->eeprom.subvendor == 0 || | |
2031 | ice->eeprom.subvendor == (unsigned int)-1) { | |
1da177e4 LT |
2032 | printk(KERN_ERR "ice1724: No valid ID is found\n"); |
2033 | return -ENXIO; | |
2034 | } | |
2035 | } | |
2036 | } | |
2037 | for (tbl = card_tables; *tbl; tbl++) { | |
2038 | for (c = *tbl; c->subvendor; c++) { | |
ab0c7d72 TI |
2039 | if (modelname && c->model && |
2040 | ! strcmp(modelname, c->model)) { | |
2041 | printk(KERN_INFO "ice1724: Using board model %s\n", | |
2042 | c->name); | |
1da177e4 LT |
2043 | ice->eeprom.subvendor = c->subvendor; |
2044 | } else if (c->subvendor != ice->eeprom.subvendor) | |
2045 | continue; | |
2046 | if (! c->eeprom_size || ! c->eeprom_data) | |
2047 | goto found; | |
2048 | /* if the EEPROM is given by the driver, use it */ | |
2049 | snd_printdd("using the defined eeprom..\n"); | |
2050 | ice->eeprom.version = 2; | |
2051 | ice->eeprom.size = c->eeprom_size + 6; | |
2052 | memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); | |
2053 | goto read_skipped; | |
2054 | } | |
2055 | } | |
ab0c7d72 TI |
2056 | printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n", |
2057 | ice->eeprom.subvendor); | |
1da177e4 LT |
2058 | |
2059 | found: | |
2060 | ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04); | |
2061 | if (ice->eeprom.size < 6) | |
2062 | ice->eeprom.size = 32; | |
2063 | else if (ice->eeprom.size > 32) { | |
ab0c7d72 TI |
2064 | printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n", |
2065 | ice->eeprom.size); | |
1da177e4 LT |
2066 | return -EIO; |
2067 | } | |
2068 | ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05); | |
2069 | if (ice->eeprom.version != 2) | |
ab0c7d72 TI |
2070 | printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n", |
2071 | ice->eeprom.version); | |
1da177e4 LT |
2072 | size = ice->eeprom.size - 6; |
2073 | for (i = 0; i < size; i++) | |
2074 | ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6); | |
2075 | ||
2076 | read_skipped: | |
2077 | ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK); | |
2078 | ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE); | |
2079 | ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR); | |
2080 | ||
2081 | return 0; | |
2082 | } | |
2083 | ||
2084 | ||
2085 | ||
ab0c7d72 | 2086 | static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice) |
1da177e4 LT |
2087 | { |
2088 | outb(VT1724_RESET , ICEREG1724(ice, CONTROL)); | |
2089 | udelay(200); | |
2090 | outb(0, ICEREG1724(ice, CONTROL)); | |
2091 | udelay(200); | |
2092 | outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG)); | |
2093 | outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG)); | |
2094 | outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES)); | |
2095 | outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG)); | |
2096 | ||
2097 | ice->gpio.write_mask = ice->eeprom.gpiomask; | |
2098 | ice->gpio.direction = ice->eeprom.gpiodir; | |
2099 | snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask); | |
2100 | snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir); | |
2101 | snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate); | |
2102 | ||
2103 | outb(0, ICEREG1724(ice, POWERDOWN)); | |
2104 | ||
2105 | return 0; | |
2106 | } | |
2107 | ||
ab0c7d72 | 2108 | static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice) |
1da177e4 LT |
2109 | { |
2110 | int err; | |
ab0c7d72 | 2111 | struct snd_kcontrol *kctl; |
1da177e4 LT |
2112 | |
2113 | snd_assert(ice->pcm != NULL, return -EIO); | |
2114 | ||
2115 | err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice)); | |
2116 | if (err < 0) | |
2117 | return err; | |
2118 | ||
2119 | err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice)); | |
2120 | if (err < 0) | |
2121 | return err; | |
2122 | ||
2123 | err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice)); | |
2124 | if (err < 0) | |
2125 | return err; | |
2126 | kctl->id.device = ice->pcm->device; | |
2127 | err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice)); | |
2128 | if (err < 0) | |
2129 | return err; | |
2130 | kctl->id.device = ice->pcm->device; | |
2131 | err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice)); | |
2132 | if (err < 0) | |
2133 | return err; | |
2134 | kctl->id.device = ice->pcm->device; | |
2135 | #if 0 /* use default only */ | |
2136 | err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice)); | |
2137 | if (err < 0) | |
2138 | return err; | |
2139 | kctl->id.device = ice->pcm->device; | |
2140 | ice->spdif.stream_ctl = kctl; | |
2141 | #endif | |
2142 | return 0; | |
2143 | } | |
2144 | ||
2145 | ||
ab0c7d72 | 2146 | static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice) |
1da177e4 LT |
2147 | { |
2148 | int err; | |
2149 | ||
2150 | err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice)); | |
2151 | if (err < 0) | |
2152 | return err; | |
2153 | err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice)); | |
2154 | if (err < 0) | |
2155 | return err; | |
2156 | ||
2157 | err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice)); | |
2158 | if (err < 0) | |
2159 | return err; | |
2160 | err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice)); | |
2161 | if (err < 0) | |
2162 | return err; | |
2163 | ||
2164 | if (ice->num_total_dacs > 0) { | |
ab0c7d72 | 2165 | struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route; |
1da177e4 LT |
2166 | tmp.count = ice->num_total_dacs; |
2167 | if (ice->vt1720 && tmp.count > 2) | |
2168 | tmp.count = 2; | |
2169 | err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); | |
2170 | if (err < 0) | |
2171 | return err; | |
2172 | } | |
2173 | ||
2174 | err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice)); | |
2175 | if (err < 0) | |
2176 | return err; | |
2177 | ||
2178 | return 0; | |
2179 | } | |
2180 | ||
ab0c7d72 | 2181 | static int snd_vt1724_free(struct snd_ice1712 *ice) |
1da177e4 LT |
2182 | { |
2183 | if (! ice->port) | |
2184 | goto __hw_end; | |
2185 | /* mask all interrupts */ | |
2186 | outb(0xff, ICEMT1724(ice, DMA_INT_MASK)); | |
2187 | outb(0xff, ICEREG1724(ice, IRQMASK)); | |
2188 | /* --- */ | |
2189 | __hw_end: | |
2190 | if (ice->irq >= 0) { | |
2191 | synchronize_irq(ice->irq); | |
ab0c7d72 | 2192 | free_irq(ice->irq, ice); |
1da177e4 LT |
2193 | } |
2194 | pci_release_regions(ice->pci); | |
2195 | snd_ice1712_akm4xxx_free(ice); | |
2196 | pci_disable_device(ice->pci); | |
2197 | kfree(ice); | |
2198 | return 0; | |
2199 | } | |
2200 | ||
ab0c7d72 | 2201 | static int snd_vt1724_dev_free(struct snd_device *device) |
1da177e4 | 2202 | { |
ab0c7d72 | 2203 | struct snd_ice1712 *ice = device->device_data; |
1da177e4 LT |
2204 | return snd_vt1724_free(ice); |
2205 | } | |
2206 | ||
ab0c7d72 | 2207 | static int __devinit snd_vt1724_create(struct snd_card *card, |
1da177e4 LT |
2208 | struct pci_dev *pci, |
2209 | const char *modelname, | |
ab0c7d72 | 2210 | struct snd_ice1712 ** r_ice1712) |
1da177e4 | 2211 | { |
ab0c7d72 | 2212 | struct snd_ice1712 *ice; |
1da177e4 LT |
2213 | int err; |
2214 | unsigned char mask; | |
ab0c7d72 | 2215 | static struct snd_device_ops ops = { |
1da177e4 LT |
2216 | .dev_free = snd_vt1724_dev_free, |
2217 | }; | |
2218 | ||
2219 | *r_ice1712 = NULL; | |
2220 | ||
2221 | /* enable PCI device */ | |
2222 | if ((err = pci_enable_device(pci)) < 0) | |
2223 | return err; | |
2224 | ||
e560d8d8 | 2225 | ice = kzalloc(sizeof(*ice), GFP_KERNEL); |
1da177e4 LT |
2226 | if (ice == NULL) { |
2227 | pci_disable_device(pci); | |
2228 | return -ENOMEM; | |
2229 | } | |
2230 | ice->vt1724 = 1; | |
2231 | spin_lock_init(&ice->reg_lock); | |
2232 | init_MUTEX(&ice->gpio_mutex); | |
2233 | init_MUTEX(&ice->open_mutex); | |
2234 | init_MUTEX(&ice->i2c_mutex); | |
2235 | ice->gpio.set_mask = snd_vt1724_set_gpio_mask; | |
2236 | ice->gpio.set_dir = snd_vt1724_set_gpio_dir; | |
2237 | ice->gpio.set_data = snd_vt1724_set_gpio_data; | |
2238 | ice->gpio.get_data = snd_vt1724_get_gpio_data; | |
2239 | ice->card = card; | |
2240 | ice->pci = pci; | |
2241 | ice->irq = -1; | |
2242 | pci_set_master(pci); | |
2243 | snd_vt1724_proc_init(ice); | |
2244 | synchronize_irq(pci->irq); | |
2245 | ||
2246 | if ((err = pci_request_regions(pci, "ICE1724")) < 0) { | |
2247 | kfree(ice); | |
2248 | pci_disable_device(pci); | |
2249 | return err; | |
2250 | } | |
2251 | ice->port = pci_resource_start(pci, 0); | |
2252 | ice->profi_port = pci_resource_start(pci, 1); | |
2253 | ||
ab0c7d72 TI |
2254 | if (request_irq(pci->irq, snd_vt1724_interrupt, |
2255 | SA_INTERRUPT|SA_SHIRQ, "ICE1724", ice)) { | |
99b359ba | 2256 | snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); |
1da177e4 LT |
2257 | snd_vt1724_free(ice); |
2258 | return -EIO; | |
2259 | } | |
2260 | ||
2261 | ice->irq = pci->irq; | |
2262 | ||
2263 | if (snd_vt1724_read_eeprom(ice, modelname) < 0) { | |
2264 | snd_vt1724_free(ice); | |
2265 | return -EIO; | |
2266 | } | |
2267 | if (snd_vt1724_chip_init(ice) < 0) { | |
2268 | snd_vt1724_free(ice); | |
2269 | return -EIO; | |
2270 | } | |
2271 | ||
2272 | /* unmask used interrupts */ | |
2273 | if (! (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401)) | |
2274 | mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX; | |
2275 | else | |
2276 | mask = 0; | |
2277 | outb(mask, ICEREG1724(ice, IRQMASK)); | |
ab0c7d72 TI |
2278 | /* don't handle FIFO overrun/underruns (just yet), |
2279 | * since they cause machine lockups | |
2280 | */ | |
1da177e4 LT |
2281 | outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK)); |
2282 | ||
2283 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) { | |
2284 | snd_vt1724_free(ice); | |
2285 | return err; | |
2286 | } | |
2287 | ||
2288 | snd_card_set_dev(card, &pci->dev); | |
2289 | ||
2290 | *r_ice1712 = ice; | |
2291 | return 0; | |
2292 | } | |
2293 | ||
2294 | ||
2295 | /* | |
2296 | * | |
2297 | * Registration | |
2298 | * | |
2299 | */ | |
2300 | ||
2301 | static int __devinit snd_vt1724_probe(struct pci_dev *pci, | |
2302 | const struct pci_device_id *pci_id) | |
2303 | { | |
2304 | static int dev; | |
ab0c7d72 TI |
2305 | struct snd_card *card; |
2306 | struct snd_ice1712 *ice; | |
1da177e4 LT |
2307 | int pcm_dev = 0, err; |
2308 | struct snd_ice1712_card_info **tbl, *c; | |
2309 | ||
2310 | if (dev >= SNDRV_CARDS) | |
2311 | return -ENODEV; | |
2312 | if (!enable[dev]) { | |
2313 | dev++; | |
2314 | return -ENOENT; | |
2315 | } | |
2316 | ||
2317 | card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); | |
2318 | if (card == NULL) | |
2319 | return -ENOMEM; | |
2320 | ||
2321 | strcpy(card->driver, "ICE1724"); | |
2322 | strcpy(card->shortname, "ICEnsemble ICE1724"); | |
2323 | ||
2324 | if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) { | |
2325 | snd_card_free(card); | |
2326 | return err; | |
2327 | } | |
2328 | ||
2329 | for (tbl = card_tables; *tbl; tbl++) { | |
2330 | for (c = *tbl; c->subvendor; c++) { | |
2331 | if (c->subvendor == ice->eeprom.subvendor) { | |
2332 | strcpy(card->shortname, c->name); | |
2333 | if (c->driver) /* specific driver? */ | |
2334 | strcpy(card->driver, c->driver); | |
2335 | if (c->chip_init) { | |
2336 | if ((err = c->chip_init(ice)) < 0) { | |
2337 | snd_card_free(card); | |
2338 | return err; | |
2339 | } | |
2340 | } | |
2341 | goto __found; | |
2342 | } | |
2343 | } | |
2344 | } | |
2345 | c = &no_matched; | |
2346 | __found: | |
2347 | ||
2348 | if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) { | |
2349 | snd_card_free(card); | |
2350 | return err; | |
2351 | } | |
2352 | ||
2353 | if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) { | |
2354 | snd_card_free(card); | |
2355 | return err; | |
2356 | } | |
2357 | ||
2358 | if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) { | |
2359 | snd_card_free(card); | |
2360 | return err; | |
2361 | } | |
2362 | ||
2363 | if ((err = snd_vt1724_ac97_mixer(ice)) < 0) { | |
2364 | snd_card_free(card); | |
2365 | return err; | |
2366 | } | |
2367 | ||
2368 | if ((err = snd_vt1724_build_controls(ice)) < 0) { | |
2369 | snd_card_free(card); | |
2370 | return err; | |
2371 | } | |
2372 | ||
2373 | if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */ | |
2374 | if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) { | |
2375 | snd_card_free(card); | |
2376 | return err; | |
2377 | } | |
2378 | } | |
2379 | ||
2380 | if (c->build_controls) { | |
2381 | if ((err = c->build_controls(ice)) < 0) { | |
2382 | snd_card_free(card); | |
2383 | return err; | |
2384 | } | |
2385 | } | |
2386 | ||
2387 | if (! c->no_mpu401) { | |
2388 | if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) { | |
2389 | if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712, | |
2390 | ICEREG1724(ice, MPU_CTRL), 1, | |
2391 | ice->irq, 0, | |
2392 | &ice->rmidi[0])) < 0) { | |
2393 | snd_card_free(card); | |
2394 | return err; | |
2395 | } | |
2396 | } | |
2397 | } | |
2398 | ||
2399 | sprintf(card->longname, "%s at 0x%lx, irq %i", | |
2400 | card->shortname, ice->port, ice->irq); | |
2401 | ||
2402 | if ((err = snd_card_register(card)) < 0) { | |
2403 | snd_card_free(card); | |
2404 | return err; | |
2405 | } | |
2406 | pci_set_drvdata(pci, card); | |
2407 | dev++; | |
2408 | return 0; | |
2409 | } | |
2410 | ||
2411 | static void __devexit snd_vt1724_remove(struct pci_dev *pci) | |
2412 | { | |
2413 | snd_card_free(pci_get_drvdata(pci)); | |
2414 | pci_set_drvdata(pci, NULL); | |
2415 | } | |
2416 | ||
2417 | static struct pci_driver driver = { | |
2418 | .name = "ICE1724", | |
2419 | .id_table = snd_vt1724_ids, | |
2420 | .probe = snd_vt1724_probe, | |
2421 | .remove = __devexit_p(snd_vt1724_remove), | |
2422 | }; | |
2423 | ||
2424 | static int __init alsa_card_ice1724_init(void) | |
2425 | { | |
01d25d46 | 2426 | return pci_register_driver(&driver); |
1da177e4 LT |
2427 | } |
2428 | ||
2429 | static void __exit alsa_card_ice1724_exit(void) | |
2430 | { | |
2431 | pci_unregister_driver(&driver); | |
2432 | } | |
2433 | ||
2434 | module_init(alsa_card_ice1724_init) | |
2435 | module_exit(alsa_card_ice1724_exit) |