]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * ALSA driver for ICEnsemble VT1724 (Envy24HT) | |
3 | * | |
4 | * Lowlevel functions for Pontis MS300 | |
5 | * | |
6 | * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | * | |
22 | */ | |
23 | ||
1da177e4 LT |
24 | #include <asm/io.h> |
25 | #include <linux/delay.h> | |
26 | #include <linux/interrupt.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/slab.h> | |
62932df8 IM |
29 | #include <linux/mutex.h> |
30 | ||
1da177e4 LT |
31 | #include <sound/core.h> |
32 | #include <sound/info.h> | |
f640c320 | 33 | #include <sound/tlv.h> |
1da177e4 LT |
34 | |
35 | #include "ice1712.h" | |
36 | #include "envy24ht.h" | |
37 | #include "pontis.h" | |
38 | ||
39 | /* I2C addresses */ | |
40 | #define WM_DEV 0x34 | |
41 | #define CS_DEV 0x20 | |
42 | ||
43 | /* WM8776 registers */ | |
44 | #define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */ | |
45 | #define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */ | |
46 | #define WM_HP_MASTER 0x02 /* headphone master (both channels), override LLR */ | |
47 | #define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */ | |
48 | #define WM_DAC_ATTEN_R 0x04 | |
49 | #define WM_DAC_MASTER 0x05 | |
50 | #define WM_PHASE_SWAP 0x06 /* DAC phase swap */ | |
51 | #define WM_DAC_CTRL1 0x07 | |
52 | #define WM_DAC_MUTE 0x08 | |
53 | #define WM_DAC_CTRL2 0x09 | |
54 | #define WM_DAC_INT 0x0a | |
55 | #define WM_ADC_INT 0x0b | |
56 | #define WM_MASTER_CTRL 0x0c | |
57 | #define WM_POWERDOWN 0x0d | |
58 | #define WM_ADC_ATTEN_L 0x0e | |
59 | #define WM_ADC_ATTEN_R 0x0f | |
60 | #define WM_ALC_CTRL1 0x10 | |
61 | #define WM_ALC_CTRL2 0x11 | |
62 | #define WM_ALC_CTRL3 0x12 | |
63 | #define WM_NOISE_GATE 0x13 | |
64 | #define WM_LIMITER 0x14 | |
65 | #define WM_ADC_MUX 0x15 | |
66 | #define WM_OUT_MUX 0x16 | |
67 | #define WM_RESET 0x17 | |
68 | ||
69 | /* | |
70 | * GPIO | |
71 | */ | |
72 | #define PONTIS_CS_CS (1<<4) /* CS */ | |
73 | #define PONTIS_CS_CLK (1<<5) /* CLK */ | |
74 | #define PONTIS_CS_RDATA (1<<6) /* CS8416 -> VT1720 */ | |
75 | #define PONTIS_CS_WDATA (1<<7) /* VT1720 -> CS8416 */ | |
76 | ||
77 | ||
78 | /* | |
79 | * get the current register value of WM codec | |
80 | */ | |
ab0c7d72 | 81 | static unsigned short wm_get(struct snd_ice1712 *ice, int reg) |
1da177e4 LT |
82 | { |
83 | reg <<= 1; | |
84 | return ((unsigned short)ice->akm[0].images[reg] << 8) | | |
85 | ice->akm[0].images[reg + 1]; | |
86 | } | |
87 | ||
88 | /* | |
89 | * set the register value of WM codec and remember it | |
90 | */ | |
ab0c7d72 | 91 | static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val) |
1da177e4 LT |
92 | { |
93 | unsigned short cval; | |
94 | cval = (reg << 9) | val; | |
95 | snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff); | |
96 | } | |
97 | ||
ab0c7d72 | 98 | static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val) |
1da177e4 LT |
99 | { |
100 | wm_put_nocache(ice, reg, val); | |
101 | reg <<= 1; | |
102 | ice->akm[0].images[reg] = val >> 8; | |
103 | ice->akm[0].images[reg + 1] = val; | |
104 | } | |
105 | ||
106 | /* | |
107 | * DAC volume attenuation mixer control (-64dB to 0dB) | |
108 | */ | |
109 | ||
110 | #define DAC_0dB 0xff | |
111 | #define DAC_RES 128 | |
112 | #define DAC_MIN (DAC_0dB - DAC_RES) | |
113 | ||
ab0c7d72 | 114 | static int wm_dac_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
115 | { |
116 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
117 | uinfo->count = 2; | |
118 | uinfo->value.integer.min = 0; /* mute */ | |
119 | uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */ | |
120 | return 0; | |
121 | } | |
122 | ||
ab0c7d72 | 123 | static int wm_dac_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 124 | { |
ab0c7d72 | 125 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
126 | unsigned short val; |
127 | int i; | |
128 | ||
62932df8 | 129 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
130 | for (i = 0; i < 2; i++) { |
131 | val = wm_get(ice, WM_DAC_ATTEN_L + i) & 0xff; | |
132 | val = val > DAC_MIN ? (val - DAC_MIN) : 0; | |
133 | ucontrol->value.integer.value[i] = val; | |
134 | } | |
62932df8 | 135 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
136 | return 0; |
137 | } | |
138 | ||
ab0c7d72 | 139 | static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 140 | { |
ab0c7d72 | 141 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
142 | unsigned short oval, nval; |
143 | int i, idx, change = 0; | |
144 | ||
62932df8 | 145 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
146 | for (i = 0; i < 2; i++) { |
147 | nval = ucontrol->value.integer.value[i]; | |
148 | nval = (nval ? (nval + DAC_MIN) : 0) & 0xff; | |
149 | idx = WM_DAC_ATTEN_L + i; | |
150 | oval = wm_get(ice, idx) & 0xff; | |
151 | if (oval != nval) { | |
152 | wm_put(ice, idx, nval); | |
153 | wm_put_nocache(ice, idx, nval | 0x100); | |
154 | change = 1; | |
155 | } | |
156 | } | |
62932df8 | 157 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
158 | return change; |
159 | } | |
160 | ||
161 | /* | |
162 | * ADC gain mixer control (-64dB to 0dB) | |
163 | */ | |
164 | ||
165 | #define ADC_0dB 0xcf | |
166 | #define ADC_RES 128 | |
167 | #define ADC_MIN (ADC_0dB - ADC_RES) | |
168 | ||
ab0c7d72 | 169 | static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
170 | { |
171 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
172 | uinfo->count = 2; | |
173 | uinfo->value.integer.min = 0; /* mute (-64dB) */ | |
174 | uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */ | |
175 | return 0; | |
176 | } | |
177 | ||
ab0c7d72 | 178 | static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 179 | { |
ab0c7d72 | 180 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
181 | unsigned short val; |
182 | int i; | |
183 | ||
62932df8 | 184 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
185 | for (i = 0; i < 2; i++) { |
186 | val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff; | |
187 | val = val > ADC_MIN ? (val - ADC_MIN) : 0; | |
188 | ucontrol->value.integer.value[i] = val; | |
189 | } | |
62932df8 | 190 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
191 | return 0; |
192 | } | |
193 | ||
ab0c7d72 | 194 | static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 195 | { |
ab0c7d72 | 196 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
197 | unsigned short ovol, nvol; |
198 | int i, idx, change = 0; | |
199 | ||
62932df8 | 200 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
201 | for (i = 0; i < 2; i++) { |
202 | nvol = ucontrol->value.integer.value[i]; | |
203 | nvol = nvol ? (nvol + ADC_MIN) : 0; | |
204 | idx = WM_ADC_ATTEN_L + i; | |
205 | ovol = wm_get(ice, idx) & 0xff; | |
206 | if (ovol != nvol) { | |
207 | wm_put(ice, idx, nvol); | |
208 | change = 1; | |
209 | } | |
210 | } | |
62932df8 | 211 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
212 | return change; |
213 | } | |
214 | ||
215 | /* | |
216 | * ADC input mux mixer control | |
217 | */ | |
a5ce8890 | 218 | #define wm_adc_mux_info snd_ctl_boolean_mono_info |
1da177e4 | 219 | |
ab0c7d72 | 220 | static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 221 | { |
ab0c7d72 | 222 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
223 | int bit = kcontrol->private_value; |
224 | ||
62932df8 | 225 | mutex_lock(&ice->gpio_mutex); |
1da177e4 | 226 | ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0; |
62932df8 | 227 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
228 | return 0; |
229 | } | |
230 | ||
ab0c7d72 | 231 | static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 232 | { |
ab0c7d72 | 233 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
234 | int bit = kcontrol->private_value; |
235 | unsigned short oval, nval; | |
236 | int change; | |
237 | ||
62932df8 | 238 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
239 | nval = oval = wm_get(ice, WM_ADC_MUX); |
240 | if (ucontrol->value.integer.value[0]) | |
241 | nval |= (1 << bit); | |
242 | else | |
243 | nval &= ~(1 << bit); | |
244 | change = nval != oval; | |
245 | if (change) { | |
246 | wm_put(ice, WM_ADC_MUX, nval); | |
247 | } | |
62932df8 | 248 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
249 | return 0; |
250 | } | |
251 | ||
252 | /* | |
253 | * Analog bypass (In -> Out) | |
254 | */ | |
a5ce8890 | 255 | #define wm_bypass_info snd_ctl_boolean_mono_info |
1da177e4 | 256 | |
ab0c7d72 | 257 | static int wm_bypass_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 258 | { |
ab0c7d72 | 259 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 | 260 | |
62932df8 | 261 | mutex_lock(&ice->gpio_mutex); |
1da177e4 | 262 | ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0; |
62932df8 | 263 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
264 | return 0; |
265 | } | |
266 | ||
ab0c7d72 | 267 | static int wm_bypass_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 268 | { |
ab0c7d72 | 269 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
270 | unsigned short val, oval; |
271 | int change = 0; | |
272 | ||
62932df8 | 273 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
274 | val = oval = wm_get(ice, WM_OUT_MUX); |
275 | if (ucontrol->value.integer.value[0]) | |
276 | val |= 0x04; | |
277 | else | |
278 | val &= ~0x04; | |
279 | if (val != oval) { | |
280 | wm_put(ice, WM_OUT_MUX, val); | |
281 | change = 1; | |
282 | } | |
62932df8 | 283 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
284 | return change; |
285 | } | |
286 | ||
287 | /* | |
288 | * Left/Right swap | |
289 | */ | |
a5ce8890 | 290 | #define wm_chswap_info snd_ctl_boolean_mono_info |
1da177e4 | 291 | |
ab0c7d72 | 292 | static int wm_chswap_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 293 | { |
ab0c7d72 | 294 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 | 295 | |
62932df8 | 296 | mutex_lock(&ice->gpio_mutex); |
1da177e4 | 297 | ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90; |
62932df8 | 298 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
299 | return 0; |
300 | } | |
301 | ||
ab0c7d72 | 302 | static int wm_chswap_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 303 | { |
ab0c7d72 | 304 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
305 | unsigned short val, oval; |
306 | int change = 0; | |
307 | ||
62932df8 | 308 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
309 | oval = wm_get(ice, WM_DAC_CTRL1); |
310 | val = oval & 0x0f; | |
311 | if (ucontrol->value.integer.value[0]) | |
312 | val |= 0x60; | |
313 | else | |
314 | val |= 0x90; | |
315 | if (val != oval) { | |
316 | wm_put(ice, WM_DAC_CTRL1, val); | |
317 | wm_put_nocache(ice, WM_DAC_CTRL1, val); | |
318 | change = 1; | |
319 | } | |
62932df8 | 320 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
321 | return change; |
322 | } | |
323 | ||
324 | /* | |
325 | * write data in the SPI mode | |
326 | */ | |
ab0c7d72 | 327 | static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val) |
1da177e4 LT |
328 | { |
329 | unsigned int tmp = snd_ice1712_gpio_read(ice); | |
330 | if (val) | |
331 | tmp |= bit; | |
332 | else | |
333 | tmp &= ~bit; | |
334 | snd_ice1712_gpio_write(ice, tmp); | |
335 | } | |
336 | ||
ab0c7d72 | 337 | static void spi_send_byte(struct snd_ice1712 *ice, unsigned char data) |
1da177e4 LT |
338 | { |
339 | int i; | |
340 | for (i = 0; i < 8; i++) { | |
341 | set_gpio_bit(ice, PONTIS_CS_CLK, 0); | |
342 | udelay(1); | |
343 | set_gpio_bit(ice, PONTIS_CS_WDATA, data & 0x80); | |
344 | udelay(1); | |
345 | set_gpio_bit(ice, PONTIS_CS_CLK, 1); | |
346 | udelay(1); | |
347 | data <<= 1; | |
348 | } | |
349 | } | |
350 | ||
ab0c7d72 | 351 | static unsigned int spi_read_byte(struct snd_ice1712 *ice) |
1da177e4 LT |
352 | { |
353 | int i; | |
354 | unsigned int val = 0; | |
355 | ||
356 | for (i = 0; i < 8; i++) { | |
357 | val <<= 1; | |
358 | set_gpio_bit(ice, PONTIS_CS_CLK, 0); | |
359 | udelay(1); | |
360 | if (snd_ice1712_gpio_read(ice) & PONTIS_CS_RDATA) | |
361 | val |= 1; | |
362 | udelay(1); | |
363 | set_gpio_bit(ice, PONTIS_CS_CLK, 1); | |
364 | udelay(1); | |
365 | } | |
366 | return val; | |
367 | } | |
368 | ||
369 | ||
ab0c7d72 | 370 | static void spi_write(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg, unsigned int data) |
1da177e4 LT |
371 | { |
372 | snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK); | |
373 | snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK)); | |
374 | set_gpio_bit(ice, PONTIS_CS_CS, 0); | |
375 | spi_send_byte(ice, dev & ~1); /* WRITE */ | |
376 | spi_send_byte(ice, reg); /* MAP */ | |
377 | spi_send_byte(ice, data); /* DATA */ | |
378 | /* trigger */ | |
379 | set_gpio_bit(ice, PONTIS_CS_CS, 1); | |
380 | udelay(1); | |
381 | /* restore */ | |
382 | snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); | |
383 | snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); | |
384 | } | |
385 | ||
ab0c7d72 | 386 | static unsigned int spi_read(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg) |
1da177e4 LT |
387 | { |
388 | unsigned int val; | |
389 | snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK); | |
390 | snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK)); | |
391 | set_gpio_bit(ice, PONTIS_CS_CS, 0); | |
392 | spi_send_byte(ice, dev & ~1); /* WRITE */ | |
393 | spi_send_byte(ice, reg); /* MAP */ | |
394 | /* trigger */ | |
395 | set_gpio_bit(ice, PONTIS_CS_CS, 1); | |
396 | udelay(1); | |
397 | set_gpio_bit(ice, PONTIS_CS_CS, 0); | |
398 | spi_send_byte(ice, dev | 1); /* READ */ | |
399 | val = spi_read_byte(ice); | |
400 | /* trigger */ | |
401 | set_gpio_bit(ice, PONTIS_CS_CS, 1); | |
402 | udelay(1); | |
403 | /* restore */ | |
404 | snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); | |
405 | snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); | |
406 | return val; | |
407 | } | |
408 | ||
409 | ||
410 | /* | |
411 | * SPDIF input source | |
412 | */ | |
ab0c7d72 | 413 | static int cs_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 | 414 | { |
32b47da0 | 415 | static const char * const texts[] = { |
1da177e4 LT |
416 | "Coax", /* RXP0 */ |
417 | "Optical", /* RXP1 */ | |
418 | "CD", /* RXP2 */ | |
419 | }; | |
420 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
421 | uinfo->count = 1; | |
422 | uinfo->value.enumerated.items = 3; | |
423 | if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) | |
424 | uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; | |
425 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
426 | return 0; | |
427 | } | |
428 | ||
ab0c7d72 | 429 | static int cs_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 430 | { |
ab0c7d72 | 431 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 | 432 | |
62932df8 | 433 | mutex_lock(&ice->gpio_mutex); |
1da177e4 | 434 | ucontrol->value.enumerated.item[0] = ice->gpio.saved[0]; |
62932df8 | 435 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
436 | return 0; |
437 | } | |
438 | ||
ab0c7d72 | 439 | static int cs_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 440 | { |
ab0c7d72 | 441 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
442 | unsigned char val; |
443 | int change = 0; | |
444 | ||
62932df8 | 445 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
446 | if (ucontrol->value.enumerated.item[0] != ice->gpio.saved[0]) { |
447 | ice->gpio.saved[0] = ucontrol->value.enumerated.item[0] & 3; | |
448 | val = 0x80 | (ice->gpio.saved[0] << 3); | |
449 | spi_write(ice, CS_DEV, 0x04, val); | |
450 | change = 1; | |
451 | } | |
62932df8 | 452 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
453 | return 0; |
454 | } | |
455 | ||
456 | ||
457 | /* | |
458 | * GPIO controls | |
459 | */ | |
ab0c7d72 | 460 | static int pontis_gpio_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
461 | { |
462 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
463 | uinfo->count = 1; | |
464 | uinfo->value.integer.min = 0; | |
465 | uinfo->value.integer.max = 0xffff; /* 16bit */ | |
466 | return 0; | |
467 | } | |
468 | ||
ab0c7d72 | 469 | static int pontis_gpio_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 470 | { |
ab0c7d72 | 471 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
62932df8 | 472 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
473 | /* 4-7 reserved */ |
474 | ucontrol->value.integer.value[0] = (~ice->gpio.write_mask & 0xffff) | 0x00f0; | |
62932df8 | 475 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
476 | return 0; |
477 | } | |
478 | ||
ab0c7d72 | 479 | static int pontis_gpio_mask_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 480 | { |
ab0c7d72 | 481 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
482 | unsigned int val; |
483 | int changed; | |
62932df8 | 484 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
485 | /* 4-7 reserved */ |
486 | val = (~ucontrol->value.integer.value[0] & 0xffff) | 0x00f0; | |
487 | changed = val != ice->gpio.write_mask; | |
488 | ice->gpio.write_mask = val; | |
62932df8 | 489 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
490 | return changed; |
491 | } | |
492 | ||
ab0c7d72 | 493 | static int pontis_gpio_dir_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 494 | { |
ab0c7d72 | 495 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
62932df8 | 496 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
497 | /* 4-7 reserved */ |
498 | ucontrol->value.integer.value[0] = ice->gpio.direction & 0xff0f; | |
62932df8 | 499 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
500 | return 0; |
501 | } | |
502 | ||
ab0c7d72 | 503 | static int pontis_gpio_dir_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 504 | { |
ab0c7d72 | 505 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
506 | unsigned int val; |
507 | int changed; | |
62932df8 | 508 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
509 | /* 4-7 reserved */ |
510 | val = ucontrol->value.integer.value[0] & 0xff0f; | |
511 | changed = (val != ice->gpio.direction); | |
512 | ice->gpio.direction = val; | |
62932df8 | 513 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
514 | return changed; |
515 | } | |
516 | ||
ab0c7d72 | 517 | static int pontis_gpio_data_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 518 | { |
ab0c7d72 | 519 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
62932df8 | 520 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
521 | snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); |
522 | snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); | |
523 | ucontrol->value.integer.value[0] = snd_ice1712_gpio_read(ice) & 0xffff; | |
62932df8 | 524 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
525 | return 0; |
526 | } | |
527 | ||
ab0c7d72 | 528 | static int pontis_gpio_data_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 529 | { |
ab0c7d72 | 530 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
531 | unsigned int val, nval; |
532 | int changed = 0; | |
62932df8 | 533 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
534 | snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); |
535 | snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); | |
536 | val = snd_ice1712_gpio_read(ice) & 0xffff; | |
537 | nval = ucontrol->value.integer.value[0] & 0xffff; | |
538 | if (val != nval) { | |
539 | snd_ice1712_gpio_write(ice, nval); | |
540 | changed = 1; | |
541 | } | |
62932df8 | 542 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
543 | return changed; |
544 | } | |
545 | ||
0cb29ea0 | 546 | static const DECLARE_TLV_DB_SCALE(db_scale_volume, -6400, 50, 1); |
f640c320 | 547 | |
1da177e4 LT |
548 | /* |
549 | * mixers | |
550 | */ | |
551 | ||
1b60f6b0 | 552 | static struct snd_kcontrol_new pontis_controls[] __devinitdata = { |
1da177e4 LT |
553 | { |
554 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
f640c320 TI |
555 | .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | |
556 | SNDRV_CTL_ELEM_ACCESS_TLV_READ), | |
1da177e4 LT |
557 | .name = "PCM Playback Volume", |
558 | .info = wm_dac_vol_info, | |
559 | .get = wm_dac_vol_get, | |
560 | .put = wm_dac_vol_put, | |
f640c320 | 561 | .tlv = { .p = db_scale_volume }, |
1da177e4 LT |
562 | }, |
563 | { | |
564 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
f640c320 TI |
565 | .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | |
566 | SNDRV_CTL_ELEM_ACCESS_TLV_READ), | |
1da177e4 LT |
567 | .name = "Capture Volume", |
568 | .info = wm_adc_vol_info, | |
569 | .get = wm_adc_vol_get, | |
570 | .put = wm_adc_vol_put, | |
f640c320 | 571 | .tlv = { .p = db_scale_volume }, |
1da177e4 LT |
572 | }, |
573 | { | |
574 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
575 | .name = "CD Capture Switch", | |
576 | .info = wm_adc_mux_info, | |
577 | .get = wm_adc_mux_get, | |
578 | .put = wm_adc_mux_put, | |
579 | .private_value = 0, | |
580 | }, | |
581 | { | |
582 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
583 | .name = "Line Capture Switch", | |
584 | .info = wm_adc_mux_info, | |
585 | .get = wm_adc_mux_get, | |
586 | .put = wm_adc_mux_put, | |
587 | .private_value = 1, | |
588 | }, | |
589 | { | |
590 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
591 | .name = "Analog Bypass Switch", | |
592 | .info = wm_bypass_info, | |
593 | .get = wm_bypass_get, | |
594 | .put = wm_bypass_put, | |
595 | }, | |
596 | { | |
597 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
598 | .name = "Swap Output Channels", | |
599 | .info = wm_chswap_info, | |
600 | .get = wm_chswap_get, | |
601 | .put = wm_chswap_put, | |
602 | }, | |
603 | { | |
604 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
605 | .name = "IEC958 Input Source", | |
606 | .info = cs_source_info, | |
607 | .get = cs_source_get, | |
608 | .put = cs_source_put, | |
609 | }, | |
610 | /* FIXME: which interface? */ | |
611 | { | |
612 | .iface = SNDRV_CTL_ELEM_IFACE_CARD, | |
613 | .name = "GPIO Mask", | |
614 | .info = pontis_gpio_mask_info, | |
615 | .get = pontis_gpio_mask_get, | |
616 | .put = pontis_gpio_mask_put, | |
617 | }, | |
618 | { | |
619 | .iface = SNDRV_CTL_ELEM_IFACE_CARD, | |
620 | .name = "GPIO Direction", | |
621 | .info = pontis_gpio_mask_info, | |
622 | .get = pontis_gpio_dir_get, | |
623 | .put = pontis_gpio_dir_put, | |
624 | }, | |
625 | { | |
626 | .iface = SNDRV_CTL_ELEM_IFACE_CARD, | |
627 | .name = "GPIO Data", | |
628 | .info = pontis_gpio_mask_info, | |
629 | .get = pontis_gpio_data_get, | |
630 | .put = pontis_gpio_data_put, | |
631 | }, | |
632 | }; | |
633 | ||
634 | ||
635 | /* | |
636 | * WM codec registers | |
637 | */ | |
ab0c7d72 | 638 | static void wm_proc_regs_write(struct snd_info_entry *entry, struct snd_info_buffer *buffer) |
1da177e4 | 639 | { |
ab0c7d72 | 640 | struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data; |
1da177e4 LT |
641 | char line[64]; |
642 | unsigned int reg, val; | |
62932df8 | 643 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
644 | while (!snd_info_get_line(buffer, line, sizeof(line))) { |
645 | if (sscanf(line, "%x %x", ®, &val) != 2) | |
646 | continue; | |
647 | if (reg <= 0x17 && val <= 0xffff) | |
648 | wm_put(ice, reg, val); | |
649 | } | |
62932df8 | 650 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
651 | } |
652 | ||
ab0c7d72 | 653 | static void wm_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) |
1da177e4 | 654 | { |
ab0c7d72 | 655 | struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data; |
1da177e4 LT |
656 | int reg, val; |
657 | ||
62932df8 | 658 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
659 | for (reg = 0; reg <= 0x17; reg++) { |
660 | val = wm_get(ice, reg); | |
661 | snd_iprintf(buffer, "%02x = %04x\n", reg, val); | |
662 | } | |
62932df8 | 663 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
664 | } |
665 | ||
ab0c7d72 | 666 | static void wm_proc_init(struct snd_ice1712 *ice) |
1da177e4 | 667 | { |
ab0c7d72 | 668 | struct snd_info_entry *entry; |
1da177e4 | 669 | if (! snd_card_proc_new(ice->card, "wm_codec", &entry)) { |
bf850204 | 670 | snd_info_set_text_ops(entry, ice, wm_proc_regs_read); |
1da177e4 | 671 | entry->mode |= S_IWUSR; |
1da177e4 LT |
672 | entry->c.text.write = wm_proc_regs_write; |
673 | } | |
674 | } | |
675 | ||
ab0c7d72 | 676 | static void cs_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) |
1da177e4 | 677 | { |
ab0c7d72 | 678 | struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data; |
1da177e4 LT |
679 | int reg, val; |
680 | ||
62932df8 | 681 | mutex_lock(&ice->gpio_mutex); |
1da177e4 LT |
682 | for (reg = 0; reg <= 0x26; reg++) { |
683 | val = spi_read(ice, CS_DEV, reg); | |
684 | snd_iprintf(buffer, "%02x = %02x\n", reg, val); | |
685 | } | |
686 | val = spi_read(ice, CS_DEV, 0x7f); | |
687 | snd_iprintf(buffer, "%02x = %02x\n", 0x7f, val); | |
62932df8 | 688 | mutex_unlock(&ice->gpio_mutex); |
1da177e4 LT |
689 | } |
690 | ||
ab0c7d72 | 691 | static void cs_proc_init(struct snd_ice1712 *ice) |
1da177e4 | 692 | { |
ab0c7d72 | 693 | struct snd_info_entry *entry; |
bf850204 TI |
694 | if (! snd_card_proc_new(ice->card, "cs_codec", &entry)) |
695 | snd_info_set_text_ops(entry, ice, cs_proc_regs_read); | |
1da177e4 LT |
696 | } |
697 | ||
698 | ||
ab0c7d72 | 699 | static int __devinit pontis_add_controls(struct snd_ice1712 *ice) |
1da177e4 LT |
700 | { |
701 | unsigned int i; | |
702 | int err; | |
703 | ||
704 | for (i = 0; i < ARRAY_SIZE(pontis_controls); i++) { | |
705 | err = snd_ctl_add(ice->card, snd_ctl_new1(&pontis_controls[i], ice)); | |
706 | if (err < 0) | |
707 | return err; | |
708 | } | |
709 | ||
710 | wm_proc_init(ice); | |
711 | cs_proc_init(ice); | |
712 | ||
713 | return 0; | |
714 | } | |
715 | ||
716 | ||
717 | /* | |
718 | * initialize the chip | |
719 | */ | |
ab0c7d72 | 720 | static int __devinit pontis_init(struct snd_ice1712 *ice) |
1da177e4 | 721 | { |
32b47da0 | 722 | static const unsigned short wm_inits[] = { |
1da177e4 LT |
723 | /* These come first to reduce init pop noise */ |
724 | WM_ADC_MUX, 0x00c0, /* ADC mute */ | |
725 | WM_DAC_MUTE, 0x0001, /* DAC softmute */ | |
726 | WM_DAC_CTRL1, 0x0000, /* DAC mute */ | |
727 | ||
728 | WM_POWERDOWN, 0x0008, /* All power-up except HP */ | |
729 | WM_RESET, 0x0000, /* reset */ | |
730 | }; | |
32b47da0 | 731 | static const unsigned short wm_inits2[] = { |
1da177e4 LT |
732 | WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */ |
733 | WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */ | |
734 | WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */ | |
735 | WM_DAC_CTRL1, 0x0090, /* DAC L/R */ | |
736 | WM_OUT_MUX, 0x0001, /* OUT DAC */ | |
737 | WM_HP_ATTEN_L, 0x0179, /* HP 0dB */ | |
738 | WM_HP_ATTEN_R, 0x0179, /* HP 0dB */ | |
739 | WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */ | |
740 | WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */ | |
741 | WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */ | |
742 | WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */ | |
743 | // WM_DAC_MASTER, 0x0100, /* DAC master muted */ | |
744 | WM_PHASE_SWAP, 0x0000, /* phase normal */ | |
745 | WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */ | |
746 | WM_ADC_ATTEN_L, 0x0000, /* ADC muted */ | |
747 | WM_ADC_ATTEN_R, 0x0000, /* ADC muted */ | |
748 | #if 0 | |
749 | WM_ALC_CTRL1, 0x007b, /* */ | |
750 | WM_ALC_CTRL2, 0x0000, /* */ | |
751 | WM_ALC_CTRL3, 0x0000, /* */ | |
752 | WM_NOISE_GATE, 0x0000, /* */ | |
753 | #endif | |
754 | WM_DAC_MUTE, 0x0000, /* DAC unmute */ | |
755 | WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */ | |
756 | }; | |
32b47da0 | 757 | static const unsigned char cs_inits[] = { |
1da177e4 LT |
758 | 0x04, 0x80, /* RUN, RXP0 */ |
759 | 0x05, 0x05, /* slave, 24bit */ | |
760 | 0x01, 0x00, | |
761 | 0x02, 0x00, | |
762 | 0x03, 0x00, | |
763 | }; | |
764 | unsigned int i; | |
765 | ||
766 | ice->vt1720 = 1; | |
767 | ice->num_total_dacs = 2; | |
768 | ice->num_total_adcs = 2; | |
769 | ||
770 | /* to remeber the register values */ | |
ab0c7d72 | 771 | ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); |
1da177e4 LT |
772 | if (! ice->akm) |
773 | return -ENOMEM; | |
774 | ice->akm_codecs = 1; | |
775 | ||
776 | /* HACK - use this as the SPDIF source. | |
777 | * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten | |
778 | */ | |
779 | ice->gpio.saved[0] = 0; | |
780 | ||
781 | /* initialize WM8776 codec */ | |
782 | for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2) | |
783 | wm_put(ice, wm_inits[i], wm_inits[i+1]); | |
8433a509 | 784 | schedule_timeout_uninterruptible(1); |
1da177e4 LT |
785 | for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2) |
786 | wm_put(ice, wm_inits2[i], wm_inits2[i+1]); | |
787 | ||
788 | /* initialize CS8416 codec */ | |
789 | /* assert PRST#; MT05 bit 7 */ | |
790 | outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD)); | |
791 | mdelay(5); | |
792 | /* deassert PRST# */ | |
793 | outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD)); | |
794 | ||
795 | for (i = 0; i < ARRAY_SIZE(cs_inits); i += 2) | |
796 | spi_write(ice, CS_DEV, cs_inits[i], cs_inits[i+1]); | |
797 | ||
798 | return 0; | |
799 | } | |
800 | ||
801 | ||
802 | /* | |
803 | * Pontis boards don't provide the EEPROM data at all. | |
804 | * hence the driver needs to sets up it properly. | |
805 | */ | |
806 | ||
1b60f6b0 | 807 | static unsigned char pontis_eeprom[] __devinitdata = { |
189bc171 TI |
808 | [ICE_EEP2_SYSCONF] = 0x08, /* clock 256, mpu401, spdif-in/ADC, 1DAC */ |
809 | [ICE_EEP2_ACLINK] = 0x80, /* I2S */ | |
810 | [ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */ | |
811 | [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */ | |
812 | [ICE_EEP2_GPIO_DIR] = 0x07, | |
813 | [ICE_EEP2_GPIO_DIR1] = 0x00, | |
814 | [ICE_EEP2_GPIO_DIR2] = 0x00, /* ignored */ | |
815 | [ICE_EEP2_GPIO_MASK] = 0x0f, /* 4-7 reserved for CS8416 */ | |
816 | [ICE_EEP2_GPIO_MASK1] = 0xff, | |
817 | [ICE_EEP2_GPIO_MASK2] = 0x00, /* ignored */ | |
818 | [ICE_EEP2_GPIO_STATE] = 0x06, /* 0-low, 1-high, 2-high */ | |
819 | [ICE_EEP2_GPIO_STATE1] = 0x00, | |
820 | [ICE_EEP2_GPIO_STATE2] = 0x00, /* ignored */ | |
1da177e4 LT |
821 | }; |
822 | ||
823 | /* entry point */ | |
1b60f6b0 | 824 | struct snd_ice1712_card_info snd_vt1720_pontis_cards[] __devinitdata = { |
1da177e4 LT |
825 | { |
826 | .subvendor = VT1720_SUBDEVICE_PONTIS_MS300, | |
827 | .name = "Pontis MS300", | |
828 | .model = "ms300", | |
829 | .chip_init = pontis_init, | |
830 | .build_controls = pontis_add_controls, | |
831 | .eeprom_size = sizeof(pontis_eeprom), | |
832 | .eeprom_data = pontis_eeprom, | |
833 | }, | |
834 | { } /* terminator */ | |
835 | }; |