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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Driver for NeoMagic 256AV and 256ZX chipsets. | |
3 | * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de> | |
4 | * | |
5 | * Based on nm256_audio.c OSS driver in linux kernel. | |
6 | * The original author of OSS nm256 driver wishes to remain anonymous, | |
7 | * so I just put my acknoledgment to him/her here. | |
8 | * The original author's web page is found at | |
9 | * http://www.uglx.org/sony.html | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2 of the License, or | |
15 | * (at your option) any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
25 | */ | |
26 | ||
1da177e4 LT |
27 | #include <asm/io.h> |
28 | #include <linux/delay.h> | |
29 | #include <linux/interrupt.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/pci.h> | |
32 | #include <linux/slab.h> | |
33 | #include <linux/moduleparam.h> | |
62932df8 IM |
34 | #include <linux/mutex.h> |
35 | ||
1da177e4 LT |
36 | #include <sound/core.h> |
37 | #include <sound/info.h> | |
38 | #include <sound/control.h> | |
39 | #include <sound/pcm.h> | |
40 | #include <sound/ac97_codec.h> | |
41 | #include <sound/initval.h> | |
42 | ||
43 | #define CARD_NAME "NeoMagic 256AV/ZX" | |
44 | #define DRIVER_NAME "NM256" | |
45 | ||
46 | MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>"); | |
47 | MODULE_DESCRIPTION("NeoMagic NM256AV/ZX"); | |
48 | MODULE_LICENSE("GPL"); | |
49 | MODULE_SUPPORTED_DEVICE("{{NeoMagic,NM256AV}," | |
50 | "{NeoMagic,NM256ZX}}"); | |
51 | ||
52 | /* | |
53 | * some compile conditions. | |
54 | */ | |
55 | ||
8a3fb4d0 TI |
56 | static int index = SNDRV_DEFAULT_IDX1; /* Index */ |
57 | static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ | |
58 | static int playback_bufsize = 16; | |
59 | static int capture_bufsize = 16; | |
60 | static int force_ac97; /* disabled as default */ | |
61 | static int buffer_top; /* not specified */ | |
62 | static int use_cache; /* disabled */ | |
63 | static int vaio_hack; /* disabled */ | |
64 | static int reset_workaround; | |
65 | static int reset_workaround_2; | |
66 | ||
67 | module_param(index, int, 0444); | |
1da177e4 | 68 | MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard."); |
8a3fb4d0 | 69 | module_param(id, charp, 0444); |
1da177e4 | 70 | MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard."); |
8a3fb4d0 | 71 | module_param(playback_bufsize, int, 0444); |
1da177e4 | 72 | MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard."); |
8a3fb4d0 | 73 | module_param(capture_bufsize, int, 0444); |
1da177e4 | 74 | MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard."); |
8a3fb4d0 | 75 | module_param(force_ac97, bool, 0444); |
1da177e4 | 76 | MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard."); |
8a3fb4d0 | 77 | module_param(buffer_top, int, 0444); |
1da177e4 | 78 | MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard."); |
8a3fb4d0 | 79 | module_param(use_cache, bool, 0444); |
1da177e4 | 80 | MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access."); |
8a3fb4d0 | 81 | module_param(vaio_hack, bool, 0444); |
1da177e4 | 82 | MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks."); |
8a3fb4d0 | 83 | module_param(reset_workaround, bool, 0444); |
1da177e4 | 84 | MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops."); |
8a3fb4d0 | 85 | module_param(reset_workaround_2, bool, 0444); |
47530cf4 | 86 | MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops."); |
1da177e4 | 87 | |
8a3fb4d0 TI |
88 | /* just for backward compatibility */ |
89 | static int enable; | |
90 | module_param(enable, bool, 0444); | |
91 | ||
92 | ||
93 | ||
1da177e4 LT |
94 | /* |
95 | * hw definitions | |
96 | */ | |
97 | ||
98 | /* The BIOS signature. */ | |
99 | #define NM_SIGNATURE 0x4e4d0000 | |
100 | /* Signature mask. */ | |
101 | #define NM_SIG_MASK 0xffff0000 | |
102 | ||
103 | /* Size of the second memory area. */ | |
104 | #define NM_PORT2_SIZE 4096 | |
105 | ||
106 | /* The base offset of the mixer in the second memory area. */ | |
107 | #define NM_MIXER_OFFSET 0x600 | |
108 | ||
109 | /* The maximum size of a coefficient entry. */ | |
110 | #define NM_MAX_PLAYBACK_COEF_SIZE 0x5000 | |
111 | #define NM_MAX_RECORD_COEF_SIZE 0x1260 | |
112 | ||
113 | /* The interrupt register. */ | |
114 | #define NM_INT_REG 0xa04 | |
115 | /* And its bits. */ | |
116 | #define NM_PLAYBACK_INT 0x40 | |
117 | #define NM_RECORD_INT 0x100 | |
118 | #define NM_MISC_INT_1 0x4000 | |
119 | #define NM_MISC_INT_2 0x1 | |
120 | #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1) | |
121 | ||
122 | /* The AV's "mixer ready" status bit and location. */ | |
123 | #define NM_MIXER_STATUS_OFFSET 0xa04 | |
124 | #define NM_MIXER_READY_MASK 0x0800 | |
125 | #define NM_MIXER_PRESENCE 0xa06 | |
126 | #define NM_PRESENCE_MASK 0x0050 | |
127 | #define NM_PRESENCE_VALUE 0x0040 | |
128 | ||
129 | /* | |
130 | * For the ZX. It uses the same interrupt register, but it holds 32 | |
131 | * bits instead of 16. | |
132 | */ | |
133 | #define NM2_PLAYBACK_INT 0x10000 | |
134 | #define NM2_RECORD_INT 0x80000 | |
135 | #define NM2_MISC_INT_1 0x8 | |
136 | #define NM2_MISC_INT_2 0x2 | |
137 | #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X)) | |
138 | ||
139 | /* The ZX's "mixer ready" status bit and location. */ | |
140 | #define NM2_MIXER_STATUS_OFFSET 0xa06 | |
141 | #define NM2_MIXER_READY_MASK 0x0800 | |
142 | ||
143 | /* The playback registers start from here. */ | |
144 | #define NM_PLAYBACK_REG_OFFSET 0x0 | |
145 | /* The record registers start from here. */ | |
146 | #define NM_RECORD_REG_OFFSET 0x200 | |
147 | ||
148 | /* The rate register is located 2 bytes from the start of the register area. */ | |
149 | #define NM_RATE_REG_OFFSET 2 | |
150 | ||
151 | /* Mono/stereo flag, number of bits on playback, and rate mask. */ | |
152 | #define NM_RATE_STEREO 1 | |
153 | #define NM_RATE_BITS_16 2 | |
154 | #define NM_RATE_MASK 0xf0 | |
155 | ||
156 | /* Playback enable register. */ | |
157 | #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1) | |
158 | #define NM_PLAYBACK_ENABLE_FLAG 1 | |
159 | #define NM_PLAYBACK_ONESHOT 2 | |
160 | #define NM_PLAYBACK_FREERUN 4 | |
161 | ||
162 | /* Mutes the audio output. */ | |
163 | #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18) | |
164 | #define NM_AUDIO_MUTE_LEFT 0x8000 | |
165 | #define NM_AUDIO_MUTE_RIGHT 0x0080 | |
166 | ||
167 | /* Recording enable register. */ | |
168 | #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0) | |
169 | #define NM_RECORD_ENABLE_FLAG 1 | |
170 | #define NM_RECORD_FREERUN 2 | |
171 | ||
172 | /* coefficient buffer pointer */ | |
173 | #define NM_COEFF_START_OFFSET 0x1c | |
174 | #define NM_COEFF_END_OFFSET 0x20 | |
175 | ||
176 | /* DMA buffer offsets */ | |
177 | #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4) | |
178 | #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10) | |
179 | #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc) | |
180 | #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8) | |
181 | ||
182 | #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4) | |
183 | #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14) | |
184 | #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc) | |
185 | #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8) | |
186 | ||
10754f53 | 187 | struct nm256_stream { |
1da177e4 | 188 | |
10754f53 TI |
189 | struct nm256 *chip; |
190 | struct snd_pcm_substream *substream; | |
1da177e4 | 191 | int running; |
1204de32 | 192 | int suspended; |
1da177e4 LT |
193 | |
194 | u32 buf; /* offset from chip->buffer */ | |
195 | int bufsize; /* buffer size in bytes */ | |
196 | void __iomem *bufptr; /* mapped pointer */ | |
197 | unsigned long bufptr_addr; /* physical address of the mapped pointer */ | |
198 | ||
199 | int dma_size; /* buffer size of the substream in bytes */ | |
200 | int period_size; /* period size in bytes */ | |
201 | int periods; /* # of periods */ | |
202 | int shift; /* bit shifts */ | |
203 | int cur_period; /* current period # */ | |
204 | ||
205 | }; | |
206 | ||
10754f53 | 207 | struct nm256 { |
1da177e4 | 208 | |
10754f53 | 209 | struct snd_card *card; |
1da177e4 LT |
210 | |
211 | void __iomem *cport; /* control port */ | |
212 | struct resource *res_cport; /* its resource */ | |
213 | unsigned long cport_addr; /* physical address */ | |
214 | ||
215 | void __iomem *buffer; /* buffer */ | |
216 | struct resource *res_buffer; /* its resource */ | |
217 | unsigned long buffer_addr; /* buffer phyiscal address */ | |
218 | ||
219 | u32 buffer_start; /* start offset from pci resource 0 */ | |
220 | u32 buffer_end; /* end offset */ | |
221 | u32 buffer_size; /* total buffer size */ | |
222 | ||
223 | u32 all_coeff_buf; /* coefficient buffer */ | |
224 | u32 coeff_buf[2]; /* coefficient buffer for each stream */ | |
225 | ||
226 | unsigned int coeffs_current: 1; /* coeff. table is loaded? */ | |
227 | unsigned int use_cache: 1; /* use one big coef. table */ | |
228 | unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */ | |
47530cf4 | 229 | unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */ |
a23446c0 | 230 | unsigned int in_resume: 1; |
1da177e4 LT |
231 | |
232 | int mixer_base; /* register offset of ac97 mixer */ | |
233 | int mixer_status_offset; /* offset of mixer status reg. */ | |
234 | int mixer_status_mask; /* bit mask to test the mixer status */ | |
235 | ||
236 | int irq; | |
1204de32 | 237 | int irq_acks; |
7d12e780 | 238 | irq_handler_t interrupt; |
1da177e4 | 239 | int badintrcount; /* counter to check bogus interrupts */ |
62932df8 | 240 | struct mutex irq_mutex; |
1da177e4 | 241 | |
10754f53 | 242 | struct nm256_stream streams[2]; |
1da177e4 | 243 | |
10754f53 | 244 | struct snd_ac97 *ac97; |
a23446c0 | 245 | unsigned short *ac97_regs; /* register caches, only for valid regs */ |
1da177e4 | 246 | |
10754f53 | 247 | struct snd_pcm *pcm; |
1da177e4 LT |
248 | |
249 | struct pci_dev *pci; | |
250 | ||
251 | spinlock_t reg_lock; | |
252 | ||
253 | }; | |
254 | ||
255 | ||
256 | /* | |
257 | * include coefficient table | |
258 | */ | |
259 | #include "nm256_coef.c" | |
260 | ||
261 | ||
262 | /* | |
263 | * PCI ids | |
264 | */ | |
f40b6890 | 265 | static struct pci_device_id snd_nm256_ids[] = { |
1da177e4 LT |
266 | {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
267 | {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
268 | {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
269 | {0,}, | |
270 | }; | |
271 | ||
272 | MODULE_DEVICE_TABLE(pci, snd_nm256_ids); | |
273 | ||
274 | ||
275 | /* | |
276 | * lowlvel stuffs | |
277 | */ | |
278 | ||
77933d72 | 279 | static inline u8 |
10754f53 | 280 | snd_nm256_readb(struct nm256 *chip, int offset) |
1da177e4 LT |
281 | { |
282 | return readb(chip->cport + offset); | |
283 | } | |
284 | ||
77933d72 | 285 | static inline u16 |
10754f53 | 286 | snd_nm256_readw(struct nm256 *chip, int offset) |
1da177e4 LT |
287 | { |
288 | return readw(chip->cport + offset); | |
289 | } | |
290 | ||
77933d72 | 291 | static inline u32 |
10754f53 | 292 | snd_nm256_readl(struct nm256 *chip, int offset) |
1da177e4 LT |
293 | { |
294 | return readl(chip->cport + offset); | |
295 | } | |
296 | ||
77933d72 | 297 | static inline void |
10754f53 | 298 | snd_nm256_writeb(struct nm256 *chip, int offset, u8 val) |
1da177e4 LT |
299 | { |
300 | writeb(val, chip->cport + offset); | |
301 | } | |
302 | ||
77933d72 | 303 | static inline void |
10754f53 | 304 | snd_nm256_writew(struct nm256 *chip, int offset, u16 val) |
1da177e4 LT |
305 | { |
306 | writew(val, chip->cport + offset); | |
307 | } | |
308 | ||
77933d72 | 309 | static inline void |
10754f53 | 310 | snd_nm256_writel(struct nm256 *chip, int offset, u32 val) |
1da177e4 LT |
311 | { |
312 | writel(val, chip->cport + offset); | |
313 | } | |
314 | ||
77933d72 | 315 | static inline void |
10754f53 | 316 | snd_nm256_write_buffer(struct nm256 *chip, void *src, int offset, int size) |
1da177e4 LT |
317 | { |
318 | offset -= chip->buffer_start; | |
99b359ba | 319 | #ifdef CONFIG_SND_DEBUG |
1da177e4 | 320 | if (offset < 0 || offset >= chip->buffer_size) { |
10754f53 TI |
321 | snd_printk(KERN_ERR "write_buffer invalid offset = %d size = %d\n", |
322 | offset, size); | |
1da177e4 LT |
323 | return; |
324 | } | |
325 | #endif | |
326 | memcpy_toio(chip->buffer + offset, src, size); | |
327 | } | |
328 | ||
329 | /* | |
330 | * coefficient handlers -- what a magic! | |
331 | */ | |
332 | ||
333 | static u16 | |
334 | snd_nm256_get_start_offset(int which) | |
335 | { | |
336 | u16 offset = 0; | |
337 | while (which-- > 0) | |
338 | offset += coefficient_sizes[which]; | |
339 | return offset; | |
340 | } | |
341 | ||
342 | static void | |
10754f53 | 343 | snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which) |
1da177e4 LT |
344 | { |
345 | u32 coeff_buf = chip->coeff_buf[stream]; | |
346 | u16 offset = snd_nm256_get_start_offset(which); | |
347 | u16 size = coefficient_sizes[which]; | |
348 | ||
349 | snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size); | |
350 | snd_nm256_writel(chip, port, coeff_buf); | |
351 | /* ??? Record seems to behave differently than playback. */ | |
352 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) | |
353 | size--; | |
354 | snd_nm256_writel(chip, port + 4, coeff_buf + size); | |
355 | } | |
356 | ||
357 | static void | |
10754f53 | 358 | snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number) |
1da177e4 LT |
359 | { |
360 | /* The enable register for the specified engine. */ | |
10754f53 TI |
361 | u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ? |
362 | NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG); | |
1da177e4 LT |
363 | u32 addr = NM_COEFF_START_OFFSET; |
364 | ||
10754f53 TI |
365 | addr += (stream == SNDRV_PCM_STREAM_CAPTURE ? |
366 | NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET); | |
1da177e4 LT |
367 | |
368 | if (snd_nm256_readb(chip, poffset) & 1) { | |
369 | snd_printd("NM256: Engine was enabled while loading coefficients!\n"); | |
370 | return; | |
371 | } | |
372 | ||
373 | /* The recording engine uses coefficient values 8-15. */ | |
374 | number &= 7; | |
375 | if (stream == SNDRV_PCM_STREAM_CAPTURE) | |
376 | number += 8; | |
377 | ||
378 | if (! chip->use_cache) { | |
379 | snd_nm256_load_one_coefficient(chip, stream, addr, number); | |
380 | return; | |
381 | } | |
382 | if (! chip->coeffs_current) { | |
383 | snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf, | |
384 | NM_TOTAL_COEFF_COUNT * 4); | |
385 | chip->coeffs_current = 1; | |
386 | } else { | |
387 | u32 base = chip->all_coeff_buf; | |
388 | u32 offset = snd_nm256_get_start_offset(number); | |
389 | u32 end_offset = offset + coefficient_sizes[number]; | |
390 | snd_nm256_writel(chip, addr, base + offset); | |
391 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) | |
392 | end_offset--; | |
393 | snd_nm256_writel(chip, addr + 4, base + end_offset); | |
394 | } | |
395 | } | |
396 | ||
397 | ||
398 | /* The actual rates supported by the card. */ | |
399 | static unsigned int samplerates[8] = { | |
400 | 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000, | |
401 | }; | |
10754f53 | 402 | static struct snd_pcm_hw_constraint_list constraints_rates = { |
1da177e4 LT |
403 | .count = ARRAY_SIZE(samplerates), |
404 | .list = samplerates, | |
405 | .mask = 0, | |
406 | }; | |
407 | ||
408 | /* | |
409 | * return the index of the target rate | |
410 | */ | |
411 | static int | |
412 | snd_nm256_fixed_rate(unsigned int rate) | |
413 | { | |
414 | unsigned int i; | |
415 | for (i = 0; i < ARRAY_SIZE(samplerates); i++) { | |
416 | if (rate == samplerates[i]) | |
417 | return i; | |
418 | } | |
419 | snd_BUG(); | |
420 | return 0; | |
421 | } | |
422 | ||
423 | /* | |
424 | * set sample rate and format | |
425 | */ | |
426 | static void | |
10754f53 TI |
427 | snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s, |
428 | struct snd_pcm_substream *substream) | |
1da177e4 | 429 | { |
10754f53 | 430 | struct snd_pcm_runtime *runtime = substream->runtime; |
1da177e4 LT |
431 | int rate_index = snd_nm256_fixed_rate(runtime->rate); |
432 | unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK; | |
433 | ||
434 | s->shift = 0; | |
435 | if (snd_pcm_format_width(runtime->format) == 16) { | |
436 | ratebits |= NM_RATE_BITS_16; | |
437 | s->shift++; | |
438 | } | |
439 | if (runtime->channels > 1) { | |
440 | ratebits |= NM_RATE_STEREO; | |
441 | s->shift++; | |
442 | } | |
443 | ||
444 | runtime->rate = samplerates[rate_index]; | |
445 | ||
446 | switch (substream->stream) { | |
447 | case SNDRV_PCM_STREAM_PLAYBACK: | |
448 | snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */ | |
449 | snd_nm256_writeb(chip, | |
450 | NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET, | |
451 | ratebits); | |
452 | break; | |
453 | case SNDRV_PCM_STREAM_CAPTURE: | |
454 | snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */ | |
455 | snd_nm256_writeb(chip, | |
456 | NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET, | |
457 | ratebits); | |
458 | break; | |
459 | } | |
460 | } | |
461 | ||
1204de32 | 462 | /* acquire interrupt */ |
10754f53 | 463 | static int snd_nm256_acquire_irq(struct nm256 *chip) |
1204de32 | 464 | { |
62932df8 | 465 | mutex_lock(&chip->irq_mutex); |
1204de32 | 466 | if (chip->irq < 0) { |
437a5a46 | 467 | if (request_irq(chip->pci->irq, chip->interrupt, IRQF_SHARED, |
10754f53 | 468 | chip->card->driver, chip)) { |
99b359ba | 469 | snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->pci->irq); |
62932df8 | 470 | mutex_unlock(&chip->irq_mutex); |
1204de32 TI |
471 | return -EBUSY; |
472 | } | |
473 | chip->irq = chip->pci->irq; | |
474 | } | |
475 | chip->irq_acks++; | |
62932df8 | 476 | mutex_unlock(&chip->irq_mutex); |
1204de32 TI |
477 | return 0; |
478 | } | |
479 | ||
480 | /* release interrupt */ | |
10754f53 | 481 | static void snd_nm256_release_irq(struct nm256 *chip) |
1204de32 | 482 | { |
62932df8 | 483 | mutex_lock(&chip->irq_mutex); |
1204de32 TI |
484 | if (chip->irq_acks > 0) |
485 | chip->irq_acks--; | |
486 | if (chip->irq_acks == 0 && chip->irq >= 0) { | |
10754f53 | 487 | free_irq(chip->irq, chip); |
1204de32 TI |
488 | chip->irq = -1; |
489 | } | |
62932df8 | 490 | mutex_unlock(&chip->irq_mutex); |
1204de32 TI |
491 | } |
492 | ||
1da177e4 LT |
493 | /* |
494 | * start / stop | |
495 | */ | |
496 | ||
497 | /* update the watermark (current period) */ | |
10754f53 | 498 | static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg) |
1da177e4 LT |
499 | { |
500 | s->cur_period++; | |
501 | s->cur_period %= s->periods; | |
502 | snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size); | |
503 | } | |
504 | ||
505 | #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK) | |
506 | #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK) | |
507 | ||
508 | static void | |
10754f53 TI |
509 | snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s, |
510 | struct snd_pcm_substream *substream) | |
1da177e4 LT |
511 | { |
512 | /* program buffer pointers */ | |
513 | snd_nm256_writel(chip, NM_PBUFFER_START, s->buf); | |
514 | snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift)); | |
515 | snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf); | |
516 | snd_nm256_playback_mark(chip, s); | |
517 | ||
518 | /* Enable playback engine and interrupts. */ | |
519 | snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, | |
520 | NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN); | |
521 | /* Enable both channels. */ | |
522 | snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0); | |
523 | } | |
524 | ||
525 | static void | |
10754f53 TI |
526 | snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s, |
527 | struct snd_pcm_substream *substream) | |
1da177e4 LT |
528 | { |
529 | /* program buffer pointers */ | |
530 | snd_nm256_writel(chip, NM_RBUFFER_START, s->buf); | |
531 | snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size); | |
532 | snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf); | |
533 | snd_nm256_capture_mark(chip, s); | |
534 | ||
535 | /* Enable playback engine and interrupts. */ | |
536 | snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, | |
537 | NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN); | |
538 | } | |
539 | ||
540 | /* Stop the play engine. */ | |
541 | static void | |
10754f53 | 542 | snd_nm256_playback_stop(struct nm256 *chip) |
1da177e4 LT |
543 | { |
544 | /* Shut off sound from both channels. */ | |
545 | snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, | |
546 | NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT); | |
547 | /* Disable play engine. */ | |
548 | snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0); | |
549 | } | |
550 | ||
551 | static void | |
10754f53 | 552 | snd_nm256_capture_stop(struct nm256 *chip) |
1da177e4 LT |
553 | { |
554 | /* Disable recording engine. */ | |
555 | snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0); | |
556 | } | |
557 | ||
558 | static int | |
10754f53 | 559 | snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 560 | { |
10754f53 TI |
561 | struct nm256 *chip = snd_pcm_substream_chip(substream); |
562 | struct nm256_stream *s = substream->runtime->private_data; | |
1da177e4 LT |
563 | int err = 0; |
564 | ||
565 | snd_assert(s != NULL, return -ENXIO); | |
566 | ||
567 | spin_lock(&chip->reg_lock); | |
568 | switch (cmd) { | |
1da177e4 | 569 | case SNDRV_PCM_TRIGGER_RESUME: |
1204de32 TI |
570 | s->suspended = 0; |
571 | /* fallthru */ | |
572 | case SNDRV_PCM_TRIGGER_START: | |
1da177e4 LT |
573 | if (! s->running) { |
574 | snd_nm256_playback_start(chip, s, substream); | |
575 | s->running = 1; | |
576 | } | |
577 | break; | |
1da177e4 | 578 | case SNDRV_PCM_TRIGGER_SUSPEND: |
1204de32 TI |
579 | s->suspended = 1; |
580 | /* fallthru */ | |
581 | case SNDRV_PCM_TRIGGER_STOP: | |
1da177e4 LT |
582 | if (s->running) { |
583 | snd_nm256_playback_stop(chip); | |
584 | s->running = 0; | |
585 | } | |
586 | break; | |
587 | default: | |
588 | err = -EINVAL; | |
589 | break; | |
590 | } | |
591 | spin_unlock(&chip->reg_lock); | |
592 | return err; | |
593 | } | |
594 | ||
595 | static int | |
10754f53 | 596 | snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 597 | { |
10754f53 TI |
598 | struct nm256 *chip = snd_pcm_substream_chip(substream); |
599 | struct nm256_stream *s = substream->runtime->private_data; | |
1da177e4 LT |
600 | int err = 0; |
601 | ||
602 | snd_assert(s != NULL, return -ENXIO); | |
603 | ||
604 | spin_lock(&chip->reg_lock); | |
605 | switch (cmd) { | |
606 | case SNDRV_PCM_TRIGGER_START: | |
607 | case SNDRV_PCM_TRIGGER_RESUME: | |
608 | if (! s->running) { | |
609 | snd_nm256_capture_start(chip, s, substream); | |
610 | s->running = 1; | |
611 | } | |
612 | break; | |
613 | case SNDRV_PCM_TRIGGER_STOP: | |
614 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
615 | if (s->running) { | |
616 | snd_nm256_capture_stop(chip); | |
617 | s->running = 0; | |
618 | } | |
619 | break; | |
620 | default: | |
621 | err = -EINVAL; | |
622 | break; | |
623 | } | |
624 | spin_unlock(&chip->reg_lock); | |
625 | return err; | |
626 | } | |
627 | ||
628 | ||
629 | /* | |
630 | * prepare playback/capture channel | |
631 | */ | |
10754f53 | 632 | static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 633 | { |
10754f53 TI |
634 | struct nm256 *chip = snd_pcm_substream_chip(substream); |
635 | struct snd_pcm_runtime *runtime = substream->runtime; | |
636 | struct nm256_stream *s = runtime->private_data; | |
1da177e4 LT |
637 | |
638 | snd_assert(s, return -ENXIO); | |
639 | s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size); | |
640 | s->period_size = frames_to_bytes(runtime, substream->runtime->period_size); | |
641 | s->periods = substream->runtime->periods; | |
642 | s->cur_period = 0; | |
643 | ||
644 | spin_lock_irq(&chip->reg_lock); | |
645 | s->running = 0; | |
646 | snd_nm256_set_format(chip, s, substream); | |
647 | spin_unlock_irq(&chip->reg_lock); | |
648 | ||
649 | return 0; | |
650 | } | |
651 | ||
652 | ||
653 | /* | |
654 | * get the current pointer | |
655 | */ | |
656 | static snd_pcm_uframes_t | |
10754f53 | 657 | snd_nm256_playback_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 658 | { |
10754f53 TI |
659 | struct nm256 *chip = snd_pcm_substream_chip(substream); |
660 | struct nm256_stream *s = substream->runtime->private_data; | |
1da177e4 LT |
661 | unsigned long curp; |
662 | ||
663 | snd_assert(s, return 0); | |
664 | curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf; | |
665 | curp %= s->dma_size; | |
666 | return bytes_to_frames(substream->runtime, curp); | |
667 | } | |
668 | ||
669 | static snd_pcm_uframes_t | |
10754f53 | 670 | snd_nm256_capture_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 671 | { |
10754f53 TI |
672 | struct nm256 *chip = snd_pcm_substream_chip(substream); |
673 | struct nm256_stream *s = substream->runtime->private_data; | |
1da177e4 LT |
674 | unsigned long curp; |
675 | ||
676 | snd_assert(s != NULL, return 0); | |
677 | curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf; | |
678 | curp %= s->dma_size; | |
679 | return bytes_to_frames(substream->runtime, curp); | |
680 | } | |
681 | ||
682 | /* Remapped I/O space can be accessible as pointer on i386 */ | |
683 | /* This might be changed in the future */ | |
684 | #ifndef __i386__ | |
685 | /* | |
686 | * silence / copy for playback | |
687 | */ | |
688 | static int | |
10754f53 | 689 | snd_nm256_playback_silence(struct snd_pcm_substream *substream, |
1da177e4 LT |
690 | int channel, /* not used (interleaved data) */ |
691 | snd_pcm_uframes_t pos, | |
692 | snd_pcm_uframes_t count) | |
693 | { | |
10754f53 TI |
694 | struct snd_pcm_runtime *runtime = substream->runtime; |
695 | struct nm256_stream *s = runtime->private_data; | |
1da177e4 LT |
696 | count = frames_to_bytes(runtime, count); |
697 | pos = frames_to_bytes(runtime, pos); | |
698 | memset_io(s->bufptr + pos, 0, count); | |
699 | return 0; | |
700 | } | |
701 | ||
702 | static int | |
10754f53 | 703 | snd_nm256_playback_copy(struct snd_pcm_substream *substream, |
1da177e4 LT |
704 | int channel, /* not used (interleaved data) */ |
705 | snd_pcm_uframes_t pos, | |
706 | void __user *src, | |
707 | snd_pcm_uframes_t count) | |
708 | { | |
10754f53 TI |
709 | struct snd_pcm_runtime *runtime = substream->runtime; |
710 | struct nm256_stream *s = runtime->private_data; | |
1da177e4 LT |
711 | count = frames_to_bytes(runtime, count); |
712 | pos = frames_to_bytes(runtime, pos); | |
713 | if (copy_from_user_toio(s->bufptr + pos, src, count)) | |
714 | return -EFAULT; | |
715 | return 0; | |
716 | } | |
717 | ||
718 | /* | |
719 | * copy to user | |
720 | */ | |
721 | static int | |
10754f53 | 722 | snd_nm256_capture_copy(struct snd_pcm_substream *substream, |
1da177e4 LT |
723 | int channel, /* not used (interleaved data) */ |
724 | snd_pcm_uframes_t pos, | |
725 | void __user *dst, | |
726 | snd_pcm_uframes_t count) | |
727 | { | |
10754f53 TI |
728 | struct snd_pcm_runtime *runtime = substream->runtime; |
729 | struct nm256_stream *s = runtime->private_data; | |
1da177e4 LT |
730 | count = frames_to_bytes(runtime, count); |
731 | pos = frames_to_bytes(runtime, pos); | |
732 | if (copy_to_user_fromio(dst, s->bufptr + pos, count)) | |
733 | return -EFAULT; | |
734 | return 0; | |
735 | } | |
736 | ||
737 | #endif /* !__i386__ */ | |
738 | ||
739 | ||
740 | /* | |
741 | * update playback/capture watermarks | |
742 | */ | |
743 | ||
744 | /* spinlock held! */ | |
745 | static void | |
10754f53 | 746 | snd_nm256_playback_update(struct nm256 *chip) |
1da177e4 | 747 | { |
10754f53 | 748 | struct nm256_stream *s; |
1da177e4 LT |
749 | |
750 | s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK]; | |
751 | if (s->running && s->substream) { | |
752 | spin_unlock(&chip->reg_lock); | |
753 | snd_pcm_period_elapsed(s->substream); | |
754 | spin_lock(&chip->reg_lock); | |
755 | snd_nm256_playback_mark(chip, s); | |
756 | } | |
757 | } | |
758 | ||
759 | /* spinlock held! */ | |
760 | static void | |
10754f53 | 761 | snd_nm256_capture_update(struct nm256 *chip) |
1da177e4 | 762 | { |
10754f53 | 763 | struct nm256_stream *s; |
1da177e4 LT |
764 | |
765 | s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE]; | |
766 | if (s->running && s->substream) { | |
767 | spin_unlock(&chip->reg_lock); | |
768 | snd_pcm_period_elapsed(s->substream); | |
769 | spin_lock(&chip->reg_lock); | |
770 | snd_nm256_capture_mark(chip, s); | |
771 | } | |
772 | } | |
773 | ||
774 | /* | |
775 | * hardware info | |
776 | */ | |
10754f53 | 777 | static struct snd_pcm_hardware snd_nm256_playback = |
1da177e4 LT |
778 | { |
779 | .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID | | |
780 | SNDRV_PCM_INFO_INTERLEAVED | | |
781 | /*SNDRV_PCM_INFO_PAUSE |*/ | |
782 | SNDRV_PCM_INFO_RESUME, | |
783 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, | |
784 | .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000, | |
785 | .rate_min = 8000, | |
786 | .rate_max = 48000, | |
787 | .channels_min = 1, | |
788 | .channels_max = 2, | |
789 | .periods_min = 2, | |
790 | .periods_max = 1024, | |
791 | .buffer_bytes_max = 128 * 1024, | |
792 | .period_bytes_min = 256, | |
793 | .period_bytes_max = 128 * 1024, | |
794 | }; | |
795 | ||
10754f53 | 796 | static struct snd_pcm_hardware snd_nm256_capture = |
1da177e4 LT |
797 | { |
798 | .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID | | |
799 | SNDRV_PCM_INFO_INTERLEAVED | | |
800 | /*SNDRV_PCM_INFO_PAUSE |*/ | |
801 | SNDRV_PCM_INFO_RESUME, | |
802 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, | |
803 | .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000, | |
804 | .rate_min = 8000, | |
805 | .rate_max = 48000, | |
806 | .channels_min = 1, | |
807 | .channels_max = 2, | |
808 | .periods_min = 2, | |
809 | .periods_max = 1024, | |
810 | .buffer_bytes_max = 128 * 1024, | |
811 | .period_bytes_min = 256, | |
812 | .period_bytes_max = 128 * 1024, | |
813 | }; | |
814 | ||
815 | ||
816 | /* set dma transfer size */ | |
10754f53 TI |
817 | static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream, |
818 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 LT |
819 | { |
820 | /* area and addr are already set and unchanged */ | |
821 | substream->runtime->dma_bytes = params_buffer_bytes(hw_params); | |
822 | return 0; | |
823 | } | |
824 | ||
825 | /* | |
826 | * open | |
827 | */ | |
10754f53 TI |
828 | static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s, |
829 | struct snd_pcm_substream *substream, | |
830 | struct snd_pcm_hardware *hw_ptr) | |
1da177e4 | 831 | { |
10754f53 | 832 | struct snd_pcm_runtime *runtime = substream->runtime; |
1da177e4 LT |
833 | |
834 | s->running = 0; | |
835 | runtime->hw = *hw_ptr; | |
836 | runtime->hw.buffer_bytes_max = s->bufsize; | |
837 | runtime->hw.period_bytes_max = s->bufsize / 2; | |
4d23359b | 838 | runtime->dma_area = (void __force *) s->bufptr; |
1da177e4 LT |
839 | runtime->dma_addr = s->bufptr_addr; |
840 | runtime->dma_bytes = s->bufsize; | |
841 | runtime->private_data = s; | |
842 | s->substream = substream; | |
843 | ||
1da177e4 LT |
844 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, |
845 | &constraints_rates); | |
846 | } | |
847 | ||
848 | static int | |
10754f53 | 849 | snd_nm256_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 850 | { |
10754f53 | 851 | struct nm256 *chip = snd_pcm_substream_chip(substream); |
1da177e4 | 852 | |
1204de32 TI |
853 | if (snd_nm256_acquire_irq(chip) < 0) |
854 | return -EBUSY; | |
1da177e4 LT |
855 | snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK], |
856 | substream, &snd_nm256_playback); | |
857 | return 0; | |
858 | } | |
859 | ||
860 | static int | |
10754f53 | 861 | snd_nm256_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 862 | { |
10754f53 | 863 | struct nm256 *chip = snd_pcm_substream_chip(substream); |
1da177e4 | 864 | |
1204de32 TI |
865 | if (snd_nm256_acquire_irq(chip) < 0) |
866 | return -EBUSY; | |
1da177e4 LT |
867 | snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE], |
868 | substream, &snd_nm256_capture); | |
869 | return 0; | |
870 | } | |
871 | ||
872 | /* | |
873 | * close - we don't have to do special.. | |
874 | */ | |
875 | static int | |
10754f53 | 876 | snd_nm256_playback_close(struct snd_pcm_substream *substream) |
1da177e4 | 877 | { |
10754f53 | 878 | struct nm256 *chip = snd_pcm_substream_chip(substream); |
1204de32 TI |
879 | |
880 | snd_nm256_release_irq(chip); | |
1da177e4 LT |
881 | return 0; |
882 | } | |
883 | ||
884 | ||
885 | static int | |
10754f53 | 886 | snd_nm256_capture_close(struct snd_pcm_substream *substream) |
1da177e4 | 887 | { |
10754f53 | 888 | struct nm256 *chip = snd_pcm_substream_chip(substream); |
1204de32 TI |
889 | |
890 | snd_nm256_release_irq(chip); | |
1da177e4 LT |
891 | return 0; |
892 | } | |
893 | ||
894 | /* | |
895 | * create a pcm instance | |
896 | */ | |
10754f53 | 897 | static struct snd_pcm_ops snd_nm256_playback_ops = { |
1da177e4 LT |
898 | .open = snd_nm256_playback_open, |
899 | .close = snd_nm256_playback_close, | |
900 | .ioctl = snd_pcm_lib_ioctl, | |
901 | .hw_params = snd_nm256_pcm_hw_params, | |
902 | .prepare = snd_nm256_pcm_prepare, | |
903 | .trigger = snd_nm256_playback_trigger, | |
904 | .pointer = snd_nm256_playback_pointer, | |
905 | #ifndef __i386__ | |
906 | .copy = snd_nm256_playback_copy, | |
907 | .silence = snd_nm256_playback_silence, | |
908 | #endif | |
909 | .mmap = snd_pcm_lib_mmap_iomem, | |
910 | }; | |
911 | ||
10754f53 | 912 | static struct snd_pcm_ops snd_nm256_capture_ops = { |
1da177e4 LT |
913 | .open = snd_nm256_capture_open, |
914 | .close = snd_nm256_capture_close, | |
915 | .ioctl = snd_pcm_lib_ioctl, | |
916 | .hw_params = snd_nm256_pcm_hw_params, | |
917 | .prepare = snd_nm256_pcm_prepare, | |
918 | .trigger = snd_nm256_capture_trigger, | |
919 | .pointer = snd_nm256_capture_pointer, | |
920 | #ifndef __i386__ | |
921 | .copy = snd_nm256_capture_copy, | |
922 | #endif | |
923 | .mmap = snd_pcm_lib_mmap_iomem, | |
924 | }; | |
925 | ||
926 | static int __devinit | |
10754f53 | 927 | snd_nm256_pcm(struct nm256 *chip, int device) |
1da177e4 | 928 | { |
10754f53 | 929 | struct snd_pcm *pcm; |
1da177e4 LT |
930 | int i, err; |
931 | ||
932 | for (i = 0; i < 2; i++) { | |
10754f53 | 933 | struct nm256_stream *s = &chip->streams[i]; |
1da177e4 LT |
934 | s->bufptr = chip->buffer + (s->buf - chip->buffer_start); |
935 | s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start); | |
936 | } | |
937 | ||
938 | err = snd_pcm_new(chip->card, chip->card->driver, device, | |
939 | 1, 1, &pcm); | |
940 | if (err < 0) | |
941 | return err; | |
942 | ||
943 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops); | |
944 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops); | |
945 | ||
946 | pcm->private_data = chip; | |
947 | pcm->info_flags = 0; | |
948 | chip->pcm = pcm; | |
949 | ||
950 | return 0; | |
951 | } | |
952 | ||
953 | ||
954 | /* | |
955 | * Initialize the hardware. | |
956 | */ | |
957 | static void | |
10754f53 | 958 | snd_nm256_init_chip(struct nm256 *chip) |
1da177e4 | 959 | { |
1da177e4 LT |
960 | /* Reset everything. */ |
961 | snd_nm256_writeb(chip, 0x0, 0x11); | |
962 | snd_nm256_writew(chip, 0x214, 0); | |
963 | /* stop sounds.. */ | |
964 | //snd_nm256_playback_stop(chip); | |
965 | //snd_nm256_capture_stop(chip); | |
1da177e4 LT |
966 | } |
967 | ||
968 | ||
1204de32 | 969 | static irqreturn_t |
10754f53 | 970 | snd_nm256_intr_check(struct nm256 *chip) |
1da177e4 LT |
971 | { |
972 | if (chip->badintrcount++ > 1000) { | |
973 | /* | |
974 | * I'm not sure if the best thing is to stop the card from | |
975 | * playing or just release the interrupt (after all, we're in | |
976 | * a bad situation, so doing fancy stuff may not be such a good | |
977 | * idea). | |
978 | * | |
979 | * I worry about the card engine continuing to play noise | |
980 | * over and over, however--that could become a very | |
981 | * obnoxious problem. And we know that when this usually | |
982 | * happens things are fairly safe, it just means the user's | |
983 | * inserted a PCMCIA card and someone's spamming us with IRQ 9s. | |
984 | */ | |
985 | if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running) | |
986 | snd_nm256_playback_stop(chip); | |
987 | if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running) | |
988 | snd_nm256_capture_stop(chip); | |
989 | chip->badintrcount = 0; | |
1204de32 | 990 | return IRQ_HANDLED; |
1da177e4 | 991 | } |
1204de32 | 992 | return IRQ_NONE; |
1da177e4 LT |
993 | } |
994 | ||
995 | /* | |
996 | * Handle a potential interrupt for the device referred to by DEV_ID. | |
997 | * | |
998 | * I don't like the cut-n-paste job here either between the two routines, | |
999 | * but there are sufficient differences between the two interrupt handlers | |
1000 | * that parameterizing it isn't all that great either. (Could use a macro, | |
1001 | * I suppose...yucky bleah.) | |
1002 | */ | |
1003 | ||
1004 | static irqreturn_t | |
7d12e780 | 1005 | snd_nm256_interrupt(int irq, void *dev_id) |
1da177e4 | 1006 | { |
10754f53 | 1007 | struct nm256 *chip = dev_id; |
1da177e4 LT |
1008 | u16 status; |
1009 | u8 cbyte; | |
1010 | ||
1011 | status = snd_nm256_readw(chip, NM_INT_REG); | |
1012 | ||
1013 | /* Not ours. */ | |
1204de32 TI |
1014 | if (status == 0) |
1015 | return snd_nm256_intr_check(chip); | |
1da177e4 LT |
1016 | |
1017 | chip->badintrcount = 0; | |
1018 | ||
1019 | /* Rather boring; check for individual interrupts and process them. */ | |
1020 | ||
1021 | spin_lock(&chip->reg_lock); | |
1022 | if (status & NM_PLAYBACK_INT) { | |
1023 | status &= ~NM_PLAYBACK_INT; | |
1024 | NM_ACK_INT(chip, NM_PLAYBACK_INT); | |
1025 | snd_nm256_playback_update(chip); | |
1026 | } | |
1027 | ||
1028 | if (status & NM_RECORD_INT) { | |
1029 | status &= ~NM_RECORD_INT; | |
1030 | NM_ACK_INT(chip, NM_RECORD_INT); | |
1031 | snd_nm256_capture_update(chip); | |
1032 | } | |
1033 | ||
1034 | if (status & NM_MISC_INT_1) { | |
1035 | status &= ~NM_MISC_INT_1; | |
1036 | NM_ACK_INT(chip, NM_MISC_INT_1); | |
1037 | snd_printd("NM256: Got misc interrupt #1\n"); | |
1038 | snd_nm256_writew(chip, NM_INT_REG, 0x8000); | |
1039 | cbyte = snd_nm256_readb(chip, 0x400); | |
1040 | snd_nm256_writeb(chip, 0x400, cbyte | 2); | |
1041 | } | |
1042 | ||
1043 | if (status & NM_MISC_INT_2) { | |
1044 | status &= ~NM_MISC_INT_2; | |
1045 | NM_ACK_INT(chip, NM_MISC_INT_2); | |
1046 | snd_printd("NM256: Got misc interrupt #2\n"); | |
1047 | cbyte = snd_nm256_readb(chip, 0x400); | |
1048 | snd_nm256_writeb(chip, 0x400, cbyte & ~2); | |
1049 | } | |
1050 | ||
1051 | /* Unknown interrupt. */ | |
1052 | if (status) { | |
1053 | snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n", | |
1054 | status); | |
1055 | /* Pray. */ | |
1056 | NM_ACK_INT(chip, status); | |
1057 | } | |
1058 | ||
1059 | spin_unlock(&chip->reg_lock); | |
1060 | return IRQ_HANDLED; | |
1061 | } | |
1062 | ||
1063 | /* | |
1064 | * Handle a potential interrupt for the device referred to by DEV_ID. | |
1065 | * This handler is for the 256ZX, and is very similar to the non-ZX | |
1066 | * routine. | |
1067 | */ | |
1068 | ||
1069 | static irqreturn_t | |
7d12e780 | 1070 | snd_nm256_interrupt_zx(int irq, void *dev_id) |
1da177e4 | 1071 | { |
10754f53 | 1072 | struct nm256 *chip = dev_id; |
1da177e4 LT |
1073 | u32 status; |
1074 | u8 cbyte; | |
1075 | ||
1076 | status = snd_nm256_readl(chip, NM_INT_REG); | |
1077 | ||
1078 | /* Not ours. */ | |
1204de32 TI |
1079 | if (status == 0) |
1080 | return snd_nm256_intr_check(chip); | |
1da177e4 LT |
1081 | |
1082 | chip->badintrcount = 0; | |
1083 | ||
1084 | /* Rather boring; check for individual interrupts and process them. */ | |
1085 | ||
1086 | spin_lock(&chip->reg_lock); | |
1087 | if (status & NM2_PLAYBACK_INT) { | |
1088 | status &= ~NM2_PLAYBACK_INT; | |
1089 | NM2_ACK_INT(chip, NM2_PLAYBACK_INT); | |
1090 | snd_nm256_playback_update(chip); | |
1091 | } | |
1092 | ||
1093 | if (status & NM2_RECORD_INT) { | |
1094 | status &= ~NM2_RECORD_INT; | |
1095 | NM2_ACK_INT(chip, NM2_RECORD_INT); | |
1096 | snd_nm256_capture_update(chip); | |
1097 | } | |
1098 | ||
1099 | if (status & NM2_MISC_INT_1) { | |
1100 | status &= ~NM2_MISC_INT_1; | |
1101 | NM2_ACK_INT(chip, NM2_MISC_INT_1); | |
1102 | snd_printd("NM256: Got misc interrupt #1\n"); | |
1103 | cbyte = snd_nm256_readb(chip, 0x400); | |
1104 | snd_nm256_writeb(chip, 0x400, cbyte | 2); | |
1105 | } | |
1106 | ||
1107 | if (status & NM2_MISC_INT_2) { | |
1108 | status &= ~NM2_MISC_INT_2; | |
1109 | NM2_ACK_INT(chip, NM2_MISC_INT_2); | |
1110 | snd_printd("NM256: Got misc interrupt #2\n"); | |
1111 | cbyte = snd_nm256_readb(chip, 0x400); | |
1112 | snd_nm256_writeb(chip, 0x400, cbyte & ~2); | |
1113 | } | |
1114 | ||
1115 | /* Unknown interrupt. */ | |
1116 | if (status) { | |
1117 | snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n", | |
1118 | status); | |
1119 | /* Pray. */ | |
1120 | NM2_ACK_INT(chip, status); | |
1121 | } | |
1122 | ||
1123 | spin_unlock(&chip->reg_lock); | |
1124 | return IRQ_HANDLED; | |
1125 | } | |
1126 | ||
1127 | /* | |
1128 | * AC97 interface | |
1129 | */ | |
1130 | ||
1131 | /* | |
1132 | * Waits for the mixer to become ready to be written; returns a zero value | |
1133 | * if it timed out. | |
1134 | */ | |
1135 | static int | |
10754f53 | 1136 | snd_nm256_ac97_ready(struct nm256 *chip) |
1da177e4 LT |
1137 | { |
1138 | int timeout = 10; | |
1139 | u32 testaddr; | |
1140 | u16 testb; | |
1141 | ||
1142 | testaddr = chip->mixer_status_offset; | |
1143 | testb = chip->mixer_status_mask; | |
1144 | ||
1145 | /* | |
1146 | * Loop around waiting for the mixer to become ready. | |
1147 | */ | |
1148 | while (timeout-- > 0) { | |
1149 | if ((snd_nm256_readw(chip, testaddr) & testb) == 0) | |
1150 | return 1; | |
1151 | udelay(100); | |
1152 | } | |
1153 | return 0; | |
1154 | } | |
1155 | ||
a23446c0 FS |
1156 | /* |
1157 | * Initial register values to be written to the AC97 mixer. | |
1158 | * While most of these are identical to the reset values, we do this | |
1159 | * so that we have most of the register contents cached--this avoids | |
1160 | * reading from the mixer directly (which seems to be problematic, | |
1161 | * probably due to ignorance). | |
1162 | */ | |
1163 | ||
1164 | struct initialValues { | |
1165 | unsigned short reg; | |
1166 | unsigned short value; | |
1167 | }; | |
1168 | ||
1169 | static struct initialValues nm256_ac97_init_val[] = | |
1170 | { | |
1171 | { AC97_MASTER, 0x8000 }, | |
1172 | { AC97_HEADPHONE, 0x8000 }, | |
1173 | { AC97_MASTER_MONO, 0x8000 }, | |
1174 | { AC97_PC_BEEP, 0x8000 }, | |
1175 | { AC97_PHONE, 0x8008 }, | |
1176 | { AC97_MIC, 0x8000 }, | |
1177 | { AC97_LINE, 0x8808 }, | |
1178 | { AC97_CD, 0x8808 }, | |
1179 | { AC97_VIDEO, 0x8808 }, | |
1180 | { AC97_AUX, 0x8808 }, | |
1181 | { AC97_PCM, 0x8808 }, | |
1182 | { AC97_REC_SEL, 0x0000 }, | |
1183 | { AC97_REC_GAIN, 0x0B0B }, | |
1184 | { AC97_GENERAL_PURPOSE, 0x0000 }, | |
1185 | { AC97_3D_CONTROL, 0x8000 }, | |
1186 | { AC97_VENDOR_ID1, 0x8384 }, | |
1187 | { AC97_VENDOR_ID2, 0x7609 }, | |
1188 | }; | |
1189 | ||
1190 | static int nm256_ac97_idx(unsigned short reg) | |
1191 | { | |
1192 | int i; | |
1193 | for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) | |
1194 | if (nm256_ac97_init_val[i].reg == reg) | |
1195 | return i; | |
1196 | return -1; | |
1197 | } | |
1198 | ||
1da177e4 | 1199 | /* |
a23446c0 FS |
1200 | * some nm256 easily crash when reading from mixer registers |
1201 | * thus we're treating it as a write-only mixer and cache the | |
1202 | * written values | |
1da177e4 LT |
1203 | */ |
1204 | static unsigned short | |
10754f53 | 1205 | snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg) |
1da177e4 | 1206 | { |
10754f53 | 1207 | struct nm256 *chip = ac97->private_data; |
a23446c0 | 1208 | int idx = nm256_ac97_idx(reg); |
1da177e4 | 1209 | |
a23446c0 | 1210 | if (idx < 0) |
1da177e4 | 1211 | return 0; |
a23446c0 | 1212 | return chip->ac97_regs[idx]; |
1da177e4 LT |
1213 | } |
1214 | ||
1215 | /* | |
1216 | */ | |
1217 | static void | |
10754f53 | 1218 | snd_nm256_ac97_write(struct snd_ac97 *ac97, |
1da177e4 LT |
1219 | unsigned short reg, unsigned short val) |
1220 | { | |
10754f53 | 1221 | struct nm256 *chip = ac97->private_data; |
1da177e4 | 1222 | int tries = 2; |
a23446c0 | 1223 | int idx = nm256_ac97_idx(reg); |
1da177e4 LT |
1224 | u32 base; |
1225 | ||
a23446c0 FS |
1226 | if (idx < 0) |
1227 | return; | |
1228 | ||
1da177e4 LT |
1229 | base = chip->mixer_base; |
1230 | ||
1231 | snd_nm256_ac97_ready(chip); | |
1232 | ||
1233 | /* Wait for the write to take, too. */ | |
1234 | while (tries-- > 0) { | |
1235 | snd_nm256_writew(chip, base + reg, val); | |
1236 | msleep(1); /* a little delay here seems better.. */ | |
a23446c0 FS |
1237 | if (snd_nm256_ac97_ready(chip)) { |
1238 | /* successful write: set cache */ | |
1239 | chip->ac97_regs[idx] = val; | |
1da177e4 | 1240 | return; |
a23446c0 | 1241 | } |
1da177e4 LT |
1242 | } |
1243 | snd_printd("nm256: ac97 codec not ready..\n"); | |
1244 | } | |
1245 | ||
a23446c0 FS |
1246 | /* static resolution table */ |
1247 | static struct snd_ac97_res_table nm256_res_table[] = { | |
1248 | { AC97_MASTER, 0x1f1f }, | |
1249 | { AC97_HEADPHONE, 0x1f1f }, | |
1250 | { AC97_MASTER_MONO, 0x001f }, | |
1251 | { AC97_PC_BEEP, 0x001f }, | |
1252 | { AC97_PHONE, 0x001f }, | |
1253 | { AC97_MIC, 0x001f }, | |
1254 | { AC97_LINE, 0x1f1f }, | |
1255 | { AC97_CD, 0x1f1f }, | |
1256 | { AC97_VIDEO, 0x1f1f }, | |
1257 | { AC97_AUX, 0x1f1f }, | |
1258 | { AC97_PCM, 0x1f1f }, | |
1259 | { AC97_REC_GAIN, 0x0f0f }, | |
1260 | { } /* terminator */ | |
1261 | }; | |
1262 | ||
1da177e4 LT |
1263 | /* initialize the ac97 into a known state */ |
1264 | static void | |
10754f53 | 1265 | snd_nm256_ac97_reset(struct snd_ac97 *ac97) |
1da177e4 | 1266 | { |
10754f53 | 1267 | struct nm256 *chip = ac97->private_data; |
1da177e4 LT |
1268 | |
1269 | /* Reset the mixer. 'Tis magic! */ | |
1270 | snd_nm256_writeb(chip, 0x6c0, 1); | |
1271 | if (! chip->reset_workaround) { | |
1272 | /* Dell latitude LS will lock up by this */ | |
1273 | snd_nm256_writeb(chip, 0x6cc, 0x87); | |
1274 | } | |
47530cf4 JL |
1275 | if (! chip->reset_workaround_2) { |
1276 | /* Dell latitude CSx will lock up by this */ | |
1277 | snd_nm256_writeb(chip, 0x6cc, 0x80); | |
1278 | snd_nm256_writeb(chip, 0x6cc, 0x0); | |
1279 | } | |
a23446c0 FS |
1280 | if (! chip->in_resume) { |
1281 | int i; | |
1282 | for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) { | |
1283 | /* preload the cache, so as to avoid even a single | |
1284 | * read of the mixer regs | |
1285 | */ | |
1286 | snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg, | |
1287 | nm256_ac97_init_val[i].value); | |
1288 | } | |
1289 | } | |
1da177e4 LT |
1290 | } |
1291 | ||
1292 | /* create an ac97 mixer interface */ | |
1293 | static int __devinit | |
10754f53 | 1294 | snd_nm256_mixer(struct nm256 *chip) |
1da177e4 | 1295 | { |
10754f53 TI |
1296 | struct snd_ac97_bus *pbus; |
1297 | struct snd_ac97_template ac97; | |
a23446c0 | 1298 | int err; |
10754f53 | 1299 | static struct snd_ac97_bus_ops ops = { |
1da177e4 LT |
1300 | .reset = snd_nm256_ac97_reset, |
1301 | .write = snd_nm256_ac97_write, | |
1302 | .read = snd_nm256_ac97_read, | |
1303 | }; | |
a23446c0 FS |
1304 | |
1305 | chip->ac97_regs = kcalloc(sizeof(short), | |
1306 | ARRAY_SIZE(nm256_ac97_init_val), GFP_KERNEL); | |
1307 | if (! chip->ac97_regs) | |
1308 | return -ENOMEM; | |
1da177e4 LT |
1309 | |
1310 | if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0) | |
1311 | return err; | |
1312 | ||
1313 | memset(&ac97, 0, sizeof(ac97)); | |
1314 | ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */ | |
1da177e4 | 1315 | ac97.private_data = chip; |
a23446c0 | 1316 | ac97.res_table = nm256_res_table; |
1204de32 | 1317 | pbus->no_vra = 1; |
1da177e4 LT |
1318 | err = snd_ac97_mixer(pbus, &ac97, &chip->ac97); |
1319 | if (err < 0) | |
1320 | return err; | |
1321 | if (! (chip->ac97->id & (0xf0000000))) { | |
1322 | /* looks like an invalid id */ | |
1323 | sprintf(chip->card->mixername, "%s AC97", chip->card->driver); | |
1324 | } | |
1325 | return 0; | |
1326 | } | |
1327 | ||
1328 | /* | |
1329 | * See if the signature left by the NM256 BIOS is intact; if so, we use | |
1330 | * the associated address as the end of our audio buffer in the video | |
1331 | * RAM. | |
1332 | */ | |
1333 | ||
1334 | static int __devinit | |
10754f53 | 1335 | snd_nm256_peek_for_sig(struct nm256 *chip) |
1da177e4 LT |
1336 | { |
1337 | /* The signature is located 1K below the end of video RAM. */ | |
1338 | void __iomem *temp; | |
1339 | /* Default buffer end is 5120 bytes below the top of RAM. */ | |
1340 | unsigned long pointer_found = chip->buffer_end - 0x1400; | |
1341 | u32 sig; | |
1342 | ||
1343 | temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16); | |
1344 | if (temp == NULL) { | |
99b359ba | 1345 | snd_printk(KERN_ERR "Unable to scan for card signature in video RAM\n"); |
1da177e4 LT |
1346 | return -EBUSY; |
1347 | } | |
1348 | ||
1349 | sig = readl(temp); | |
1350 | if ((sig & NM_SIG_MASK) == NM_SIGNATURE) { | |
1351 | u32 pointer = readl(temp + 4); | |
1352 | ||
1353 | /* | |
1354 | * If it's obviously invalid, don't use it | |
1355 | */ | |
1356 | if (pointer == 0xffffffff || | |
1357 | pointer < chip->buffer_size || | |
1358 | pointer > chip->buffer_end) { | |
99b359ba | 1359 | snd_printk(KERN_ERR "invalid signature found: 0x%x\n", pointer); |
1da177e4 LT |
1360 | iounmap(temp); |
1361 | return -ENODEV; | |
1362 | } else { | |
1363 | pointer_found = pointer; | |
10754f53 TI |
1364 | printk(KERN_INFO "nm256: found card signature in video RAM: 0x%x\n", |
1365 | pointer); | |
1da177e4 LT |
1366 | } |
1367 | } | |
1368 | ||
1369 | iounmap(temp); | |
1370 | chip->buffer_end = pointer_found; | |
1371 | ||
1372 | return 0; | |
1373 | } | |
1374 | ||
1375 | #ifdef CONFIG_PM | |
1376 | /* | |
1377 | * APM event handler, so the card is properly reinitialized after a power | |
1378 | * event. | |
1379 | */ | |
3fcf7d2c | 1380 | static int nm256_suspend(struct pci_dev *pci, pm_message_t state) |
1da177e4 | 1381 | { |
3fcf7d2c TI |
1382 | struct snd_card *card = pci_get_drvdata(pci); |
1383 | struct nm256 *chip = card->private_data; | |
1da177e4 | 1384 | |
3fcf7d2c | 1385 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); |
1da177e4 LT |
1386 | snd_pcm_suspend_all(chip->pcm); |
1387 | snd_ac97_suspend(chip->ac97); | |
1388 | chip->coeffs_current = 0; | |
3fcf7d2c TI |
1389 | pci_disable_device(pci); |
1390 | pci_save_state(pci); | |
30b35399 | 1391 | pci_set_power_state(pci, pci_choose_state(pci, state)); |
1da177e4 LT |
1392 | return 0; |
1393 | } | |
1394 | ||
3fcf7d2c | 1395 | static int nm256_resume(struct pci_dev *pci) |
1da177e4 | 1396 | { |
3fcf7d2c TI |
1397 | struct snd_card *card = pci_get_drvdata(pci); |
1398 | struct nm256 *chip = card->private_data; | |
1204de32 | 1399 | int i; |
1da177e4 LT |
1400 | |
1401 | /* Perform a full reset on the hardware */ | |
a23446c0 | 1402 | chip->in_resume = 1; |
30b35399 TI |
1403 | |
1404 | pci_set_power_state(pci, PCI_D0); | |
3fcf7d2c | 1405 | pci_restore_state(pci); |
30b35399 TI |
1406 | if (pci_enable_device(pci) < 0) { |
1407 | printk(KERN_ERR "nm256: pci_enable_device failed, " | |
1408 | "disabling device\n"); | |
1409 | snd_card_disconnect(card); | |
1410 | return -EIO; | |
1411 | } | |
1412 | pci_set_master(pci); | |
1413 | ||
1da177e4 LT |
1414 | snd_nm256_init_chip(chip); |
1415 | ||
1416 | /* restore ac97 */ | |
1417 | snd_ac97_resume(chip->ac97); | |
1418 | ||
1204de32 | 1419 | for (i = 0; i < 2; i++) { |
10754f53 | 1420 | struct nm256_stream *s = &chip->streams[i]; |
1204de32 TI |
1421 | if (s->substream && s->suspended) { |
1422 | spin_lock_irq(&chip->reg_lock); | |
1423 | snd_nm256_set_format(chip, s, s->substream); | |
1424 | spin_unlock_irq(&chip->reg_lock); | |
1425 | } | |
1426 | } | |
1427 | ||
3fcf7d2c | 1428 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
a23446c0 | 1429 | chip->in_resume = 0; |
1da177e4 LT |
1430 | return 0; |
1431 | } | |
1432 | #endif /* CONFIG_PM */ | |
1433 | ||
10754f53 | 1434 | static int snd_nm256_free(struct nm256 *chip) |
1da177e4 LT |
1435 | { |
1436 | if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running) | |
1437 | snd_nm256_playback_stop(chip); | |
1438 | if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running) | |
1439 | snd_nm256_capture_stop(chip); | |
1440 | ||
1441 | if (chip->irq >= 0) | |
1442 | synchronize_irq(chip->irq); | |
1443 | ||
1444 | if (chip->cport) | |
1445 | iounmap(chip->cport); | |
1446 | if (chip->buffer) | |
1447 | iounmap(chip->buffer); | |
b1d5776d TI |
1448 | release_and_free_resource(chip->res_cport); |
1449 | release_and_free_resource(chip->res_buffer); | |
1da177e4 | 1450 | if (chip->irq >= 0) |
10754f53 | 1451 | free_irq(chip->irq, chip); |
1da177e4 LT |
1452 | |
1453 | pci_disable_device(chip->pci); | |
a23446c0 | 1454 | kfree(chip->ac97_regs); |
1da177e4 LT |
1455 | kfree(chip); |
1456 | return 0; | |
1457 | } | |
1458 | ||
10754f53 | 1459 | static int snd_nm256_dev_free(struct snd_device *device) |
1da177e4 | 1460 | { |
10754f53 | 1461 | struct nm256 *chip = device->device_data; |
1da177e4 LT |
1462 | return snd_nm256_free(chip); |
1463 | } | |
1464 | ||
1465 | static int __devinit | |
10754f53 TI |
1466 | snd_nm256_create(struct snd_card *card, struct pci_dev *pci, |
1467 | struct nm256 **chip_ret) | |
1da177e4 | 1468 | { |
10754f53 | 1469 | struct nm256 *chip; |
1da177e4 | 1470 | int err, pval; |
10754f53 | 1471 | static struct snd_device_ops ops = { |
1da177e4 LT |
1472 | .dev_free = snd_nm256_dev_free, |
1473 | }; | |
1474 | u32 addr; | |
1475 | ||
1476 | *chip_ret = NULL; | |
1477 | ||
1478 | if ((err = pci_enable_device(pci)) < 0) | |
1479 | return err; | |
1480 | ||
e560d8d8 | 1481 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 LT |
1482 | if (chip == NULL) { |
1483 | pci_disable_device(pci); | |
1484 | return -ENOMEM; | |
1485 | } | |
1486 | ||
1487 | chip->card = card; | |
1488 | chip->pci = pci; | |
3f05f868 | 1489 | chip->use_cache = use_cache; |
1da177e4 LT |
1490 | spin_lock_init(&chip->reg_lock); |
1491 | chip->irq = -1; | |
62932df8 | 1492 | mutex_init(&chip->irq_mutex); |
1da177e4 | 1493 | |
3f05f868 TI |
1494 | /* store buffer sizes in bytes */ |
1495 | chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024; | |
1496 | chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024; | |
1da177e4 LT |
1497 | |
1498 | /* | |
1499 | * The NM256 has two memory ports. The first port is nothing | |
1500 | * more than a chunk of video RAM, which is used as the I/O ring | |
1501 | * buffer. The second port has the actual juicy stuff (like the | |
1502 | * mixer and the playback engine control registers). | |
1503 | */ | |
1504 | ||
1505 | chip->buffer_addr = pci_resource_start(pci, 0); | |
1506 | chip->cport_addr = pci_resource_start(pci, 1); | |
1507 | ||
1508 | /* Init the memory port info. */ | |
1509 | /* remap control port (#2) */ | |
1510 | chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE, | |
1511 | card->driver); | |
1512 | if (chip->res_cport == NULL) { | |
99b359ba | 1513 | snd_printk(KERN_ERR "memory region 0x%lx (size 0x%x) busy\n", |
1da177e4 LT |
1514 | chip->cport_addr, NM_PORT2_SIZE); |
1515 | err = -EBUSY; | |
1516 | goto __error; | |
1517 | } | |
1518 | chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE); | |
1519 | if (chip->cport == NULL) { | |
99b359ba | 1520 | snd_printk(KERN_ERR "unable to map control port %lx\n", chip->cport_addr); |
1da177e4 LT |
1521 | err = -ENOMEM; |
1522 | goto __error; | |
1523 | } | |
1524 | ||
1525 | if (!strcmp(card->driver, "NM256AV")) { | |
1526 | /* Ok, try to see if this is a non-AC97 version of the hardware. */ | |
1527 | pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE); | |
1528 | if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) { | |
3f05f868 | 1529 | if (! force_ac97) { |
1da177e4 | 1530 | printk(KERN_ERR "nm256: no ac97 is found!\n"); |
10754f53 TI |
1531 | printk(KERN_ERR " force the driver to load by " |
1532 | "passing in the module parameter\n"); | |
1da177e4 | 1533 | printk(KERN_ERR " force_ac97=1\n"); |
42108619 PV |
1534 | printk(KERN_ERR " or try sb16, opl3sa2, or " |
1535 | "cs423x drivers instead.\n"); | |
1da177e4 LT |
1536 | err = -ENXIO; |
1537 | goto __error; | |
1538 | } | |
1539 | } | |
1540 | chip->buffer_end = 2560 * 1024; | |
1541 | chip->interrupt = snd_nm256_interrupt; | |
1542 | chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET; | |
1543 | chip->mixer_status_mask = NM_MIXER_READY_MASK; | |
1544 | } else { | |
1545 | /* Not sure if there is any relevant detect for the ZX or not. */ | |
1546 | if (snd_nm256_readb(chip, 0xa0b) != 0) | |
1547 | chip->buffer_end = 6144 * 1024; | |
1548 | else | |
1549 | chip->buffer_end = 4096 * 1024; | |
1550 | ||
1551 | chip->interrupt = snd_nm256_interrupt_zx; | |
1552 | chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET; | |
1553 | chip->mixer_status_mask = NM2_MIXER_READY_MASK; | |
1554 | } | |
1555 | ||
10754f53 TI |
1556 | chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize + |
1557 | chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize; | |
1da177e4 LT |
1558 | if (chip->use_cache) |
1559 | chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4; | |
1560 | else | |
1561 | chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE; | |
1562 | ||
3f05f868 TI |
1563 | if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end) |
1564 | chip->buffer_end = buffer_top; | |
1da177e4 LT |
1565 | else { |
1566 | /* get buffer end pointer from signature */ | |
1567 | if ((err = snd_nm256_peek_for_sig(chip)) < 0) | |
1568 | goto __error; | |
1569 | } | |
1570 | ||
1571 | chip->buffer_start = chip->buffer_end - chip->buffer_size; | |
1572 | chip->buffer_addr += chip->buffer_start; | |
1573 | ||
1574 | printk(KERN_INFO "nm256: Mapping port 1 from 0x%x - 0x%x\n", | |
1575 | chip->buffer_start, chip->buffer_end); | |
1576 | ||
1577 | chip->res_buffer = request_mem_region(chip->buffer_addr, | |
1578 | chip->buffer_size, | |
1579 | card->driver); | |
1580 | if (chip->res_buffer == NULL) { | |
99b359ba | 1581 | snd_printk(KERN_ERR "nm256: buffer 0x%lx (size 0x%x) busy\n", |
1da177e4 LT |
1582 | chip->buffer_addr, chip->buffer_size); |
1583 | err = -EBUSY; | |
1584 | goto __error; | |
1585 | } | |
1586 | chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size); | |
1587 | if (chip->buffer == NULL) { | |
1588 | err = -ENOMEM; | |
99b359ba | 1589 | snd_printk(KERN_ERR "unable to map ring buffer at %lx\n", chip->buffer_addr); |
1da177e4 LT |
1590 | goto __error; |
1591 | } | |
1592 | ||
1593 | /* set offsets */ | |
1594 | addr = chip->buffer_start; | |
1595 | chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr; | |
1596 | addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize; | |
1597 | chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr; | |
1598 | addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize; | |
1599 | if (chip->use_cache) { | |
1600 | chip->all_coeff_buf = addr; | |
1601 | } else { | |
1602 | chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr; | |
1603 | addr += NM_MAX_PLAYBACK_COEF_SIZE; | |
1604 | chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr; | |
1605 | } | |
1606 | ||
1da177e4 LT |
1607 | /* Fixed setting. */ |
1608 | chip->mixer_base = NM_MIXER_OFFSET; | |
1609 | ||
1610 | chip->coeffs_current = 0; | |
1611 | ||
1612 | snd_nm256_init_chip(chip); | |
1613 | ||
1614 | // pci_set_master(pci); /* needed? */ | |
1615 | ||
1da177e4 LT |
1616 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) |
1617 | goto __error; | |
1618 | ||
1619 | snd_card_set_dev(card, &pci->dev); | |
1620 | ||
1621 | *chip_ret = chip; | |
1622 | return 0; | |
1623 | ||
1624 | __error: | |
1625 | snd_nm256_free(chip); | |
1626 | return err; | |
1627 | } | |
1628 | ||
1629 | ||
47530cf4 | 1630 | enum { NM_BLACKLISTED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 }; |
1da177e4 | 1631 | |
e2b6d13b | 1632 | static struct snd_pci_quirk nm256_quirks[] __devinitdata = { |
1da177e4 | 1633 | /* HP omnibook 4150 has cs4232 codec internally */ |
e2b6d13b TI |
1634 | SND_PCI_QUIRK(0x103c, 0x0007, "HP omnibook 4150", NM_BLACKLISTED), |
1635 | /* Reset workarounds to avoid lock-ups */ | |
1636 | SND_PCI_QUIRK(0x104d, 0x8041, "Sony PCG-F305", NM_RESET_WORKAROUND), | |
1637 | SND_PCI_QUIRK(0x1028, 0x0080, "Dell Latitude LS", NM_RESET_WORKAROUND), | |
1638 | SND_PCI_QUIRK(0x1028, 0x0091, "Dell Latitude CSx", NM_RESET_WORKAROUND_2), | |
1da177e4 LT |
1639 | { } /* terminator */ |
1640 | }; | |
1641 | ||
1642 | ||
1643 | static int __devinit snd_nm256_probe(struct pci_dev *pci, | |
1644 | const struct pci_device_id *pci_id) | |
1645 | { | |
10754f53 TI |
1646 | struct snd_card *card; |
1647 | struct nm256 *chip; | |
1da177e4 | 1648 | int err; |
e2b6d13b TI |
1649 | const struct snd_pci_quirk *q; |
1650 | ||
1651 | q = snd_pci_quirk_lookup(pci, nm256_quirks); | |
1652 | if (q) { | |
1653 | snd_printdd(KERN_INFO "nm256: Enabled quirk for %s.\n", q->name); | |
1654 | switch (q->value) { | |
1655 | case NM_BLACKLISTED: | |
1656 | printk(KERN_INFO "nm256: The device is blacklisted. " | |
1657 | "Loading stopped\n"); | |
1658 | return -ENODEV; | |
1659 | case NM_RESET_WORKAROUND_2: | |
1660 | reset_workaround_2 = 1; | |
1661 | /* Fall-through */ | |
1662 | case NM_RESET_WORKAROUND: | |
1663 | reset_workaround = 1; | |
1664 | break; | |
1da177e4 LT |
1665 | } |
1666 | } | |
1667 | ||
8a3fb4d0 | 1668 | card = snd_card_new(index, id, THIS_MODULE, 0); |
1da177e4 LT |
1669 | if (card == NULL) |
1670 | return -ENOMEM; | |
1671 | ||
1672 | switch (pci->device) { | |
1673 | case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO: | |
1674 | strcpy(card->driver, "NM256AV"); | |
1675 | break; | |
1676 | case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO: | |
1677 | strcpy(card->driver, "NM256ZX"); | |
1678 | break; | |
1679 | case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO: | |
1680 | strcpy(card->driver, "NM256XL+"); | |
1681 | break; | |
1682 | default: | |
99b359ba | 1683 | snd_printk(KERN_ERR "invalid device id 0x%x\n", pci->device); |
1da177e4 LT |
1684 | snd_card_free(card); |
1685 | return -EINVAL; | |
1686 | } | |
1687 | ||
8a3fb4d0 | 1688 | if (vaio_hack) |
3f05f868 | 1689 | buffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */ |
8a3fb4d0 TI |
1690 | |
1691 | if (playback_bufsize < 4) | |
1692 | playback_bufsize = 4; | |
1693 | if (playback_bufsize > 128) | |
1694 | playback_bufsize = 128; | |
1695 | if (capture_bufsize < 4) | |
1696 | capture_bufsize = 4; | |
1697 | if (capture_bufsize > 128) | |
1698 | capture_bufsize = 128; | |
3f05f868 | 1699 | if ((err = snd_nm256_create(card, pci, &chip)) < 0) { |
1da177e4 LT |
1700 | snd_card_free(card); |
1701 | return err; | |
1702 | } | |
3fcf7d2c | 1703 | card->private_data = chip; |
1da177e4 | 1704 | |
8a3fb4d0 | 1705 | if (reset_workaround) { |
1da177e4 LT |
1706 | snd_printdd(KERN_INFO "nm256: reset_workaround activated\n"); |
1707 | chip->reset_workaround = 1; | |
1708 | } | |
1709 | ||
8a3fb4d0 | 1710 | if (reset_workaround_2) { |
47530cf4 JL |
1711 | snd_printdd(KERN_INFO "nm256: reset_workaround_2 activated\n"); |
1712 | chip->reset_workaround_2 = 1; | |
1713 | } | |
1714 | ||
1da177e4 LT |
1715 | if ((err = snd_nm256_pcm(chip, 0)) < 0 || |
1716 | (err = snd_nm256_mixer(chip)) < 0) { | |
1717 | snd_card_free(card); | |
1718 | return err; | |
1719 | } | |
1720 | ||
1721 | sprintf(card->shortname, "NeoMagic %s", card->driver); | |
1722 | sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d", | |
1723 | card->shortname, | |
1724 | chip->buffer_addr, chip->cport_addr, chip->irq); | |
1725 | ||
1726 | if ((err = snd_card_register(card)) < 0) { | |
1727 | snd_card_free(card); | |
1728 | return err; | |
1729 | } | |
1730 | ||
1731 | pci_set_drvdata(pci, card); | |
1da177e4 LT |
1732 | return 0; |
1733 | } | |
1734 | ||
1735 | static void __devexit snd_nm256_remove(struct pci_dev *pci) | |
1736 | { | |
1737 | snd_card_free(pci_get_drvdata(pci)); | |
1738 | pci_set_drvdata(pci, NULL); | |
1739 | } | |
1740 | ||
1741 | ||
1742 | static struct pci_driver driver = { | |
1743 | .name = "NeoMagic 256", | |
1744 | .id_table = snd_nm256_ids, | |
1745 | .probe = snd_nm256_probe, | |
1746 | .remove = __devexit_p(snd_nm256_remove), | |
3fcf7d2c TI |
1747 | #ifdef CONFIG_PM |
1748 | .suspend = nm256_suspend, | |
1749 | .resume = nm256_resume, | |
1750 | #endif | |
1da177e4 LT |
1751 | }; |
1752 | ||
1753 | ||
1754 | static int __init alsa_card_nm256_init(void) | |
1755 | { | |
01d25d46 | 1756 | return pci_register_driver(&driver); |
1da177e4 LT |
1757 | } |
1758 | ||
1759 | static void __exit alsa_card_nm256_exit(void) | |
1760 | { | |
1761 | pci_unregister_driver(&driver); | |
1762 | } | |
1763 | ||
1764 | module_init(alsa_card_nm256_init) | |
1765 | module_exit(alsa_card_nm256_exit) |