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1da177e4 LT |
1 | /* |
2 | * Driver for NeoMagic 256AV and 256ZX chipsets. | |
3 | * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de> | |
4 | * | |
5 | * Based on nm256_audio.c OSS driver in linux kernel. | |
6 | * The original author of OSS nm256 driver wishes to remain anonymous, | |
7 | * so I just put my acknoledgment to him/her here. | |
8 | * The original author's web page is found at | |
9 | * http://www.uglx.org/sony.html | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2 of the License, or | |
15 | * (at your option) any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | #include <sound/driver.h> | |
28 | #include <asm/io.h> | |
29 | #include <linux/delay.h> | |
30 | #include <linux/interrupt.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/pci.h> | |
33 | #include <linux/slab.h> | |
34 | #include <linux/moduleparam.h> | |
35 | #include <sound/core.h> | |
36 | #include <sound/info.h> | |
37 | #include <sound/control.h> | |
38 | #include <sound/pcm.h> | |
39 | #include <sound/ac97_codec.h> | |
40 | #include <sound/initval.h> | |
41 | ||
42 | #define CARD_NAME "NeoMagic 256AV/ZX" | |
43 | #define DRIVER_NAME "NM256" | |
44 | ||
45 | MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>"); | |
46 | MODULE_DESCRIPTION("NeoMagic NM256AV/ZX"); | |
47 | MODULE_LICENSE("GPL"); | |
48 | MODULE_SUPPORTED_DEVICE("{{NeoMagic,NM256AV}," | |
49 | "{NeoMagic,NM256ZX}}"); | |
50 | ||
51 | /* | |
52 | * some compile conditions. | |
53 | */ | |
54 | ||
8a3fb4d0 TI |
55 | static int index = SNDRV_DEFAULT_IDX1; /* Index */ |
56 | static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ | |
57 | static int playback_bufsize = 16; | |
58 | static int capture_bufsize = 16; | |
59 | static int force_ac97; /* disabled as default */ | |
60 | static int buffer_top; /* not specified */ | |
61 | static int use_cache; /* disabled */ | |
62 | static int vaio_hack; /* disabled */ | |
63 | static int reset_workaround; | |
64 | static int reset_workaround_2; | |
65 | ||
66 | module_param(index, int, 0444); | |
1da177e4 | 67 | MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard."); |
8a3fb4d0 | 68 | module_param(id, charp, 0444); |
1da177e4 | 69 | MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard."); |
8a3fb4d0 | 70 | module_param(playback_bufsize, int, 0444); |
1da177e4 | 71 | MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard."); |
8a3fb4d0 | 72 | module_param(capture_bufsize, int, 0444); |
1da177e4 | 73 | MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard."); |
8a3fb4d0 | 74 | module_param(force_ac97, bool, 0444); |
1da177e4 | 75 | MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard."); |
8a3fb4d0 | 76 | module_param(buffer_top, int, 0444); |
1da177e4 | 77 | MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard."); |
8a3fb4d0 | 78 | module_param(use_cache, bool, 0444); |
1da177e4 | 79 | MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access."); |
8a3fb4d0 | 80 | module_param(vaio_hack, bool, 0444); |
1da177e4 | 81 | MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks."); |
8a3fb4d0 | 82 | module_param(reset_workaround, bool, 0444); |
1da177e4 | 83 | MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops."); |
8a3fb4d0 | 84 | module_param(reset_workaround_2, bool, 0444); |
47530cf4 | 85 | MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops."); |
1da177e4 | 86 | |
8a3fb4d0 TI |
87 | /* just for backward compatibility */ |
88 | static int enable; | |
89 | module_param(enable, bool, 0444); | |
90 | ||
91 | ||
92 | ||
1da177e4 LT |
93 | /* |
94 | * hw definitions | |
95 | */ | |
96 | ||
97 | /* The BIOS signature. */ | |
98 | #define NM_SIGNATURE 0x4e4d0000 | |
99 | /* Signature mask. */ | |
100 | #define NM_SIG_MASK 0xffff0000 | |
101 | ||
102 | /* Size of the second memory area. */ | |
103 | #define NM_PORT2_SIZE 4096 | |
104 | ||
105 | /* The base offset of the mixer in the second memory area. */ | |
106 | #define NM_MIXER_OFFSET 0x600 | |
107 | ||
108 | /* The maximum size of a coefficient entry. */ | |
109 | #define NM_MAX_PLAYBACK_COEF_SIZE 0x5000 | |
110 | #define NM_MAX_RECORD_COEF_SIZE 0x1260 | |
111 | ||
112 | /* The interrupt register. */ | |
113 | #define NM_INT_REG 0xa04 | |
114 | /* And its bits. */ | |
115 | #define NM_PLAYBACK_INT 0x40 | |
116 | #define NM_RECORD_INT 0x100 | |
117 | #define NM_MISC_INT_1 0x4000 | |
118 | #define NM_MISC_INT_2 0x1 | |
119 | #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1) | |
120 | ||
121 | /* The AV's "mixer ready" status bit and location. */ | |
122 | #define NM_MIXER_STATUS_OFFSET 0xa04 | |
123 | #define NM_MIXER_READY_MASK 0x0800 | |
124 | #define NM_MIXER_PRESENCE 0xa06 | |
125 | #define NM_PRESENCE_MASK 0x0050 | |
126 | #define NM_PRESENCE_VALUE 0x0040 | |
127 | ||
128 | /* | |
129 | * For the ZX. It uses the same interrupt register, but it holds 32 | |
130 | * bits instead of 16. | |
131 | */ | |
132 | #define NM2_PLAYBACK_INT 0x10000 | |
133 | #define NM2_RECORD_INT 0x80000 | |
134 | #define NM2_MISC_INT_1 0x8 | |
135 | #define NM2_MISC_INT_2 0x2 | |
136 | #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X)) | |
137 | ||
138 | /* The ZX's "mixer ready" status bit and location. */ | |
139 | #define NM2_MIXER_STATUS_OFFSET 0xa06 | |
140 | #define NM2_MIXER_READY_MASK 0x0800 | |
141 | ||
142 | /* The playback registers start from here. */ | |
143 | #define NM_PLAYBACK_REG_OFFSET 0x0 | |
144 | /* The record registers start from here. */ | |
145 | #define NM_RECORD_REG_OFFSET 0x200 | |
146 | ||
147 | /* The rate register is located 2 bytes from the start of the register area. */ | |
148 | #define NM_RATE_REG_OFFSET 2 | |
149 | ||
150 | /* Mono/stereo flag, number of bits on playback, and rate mask. */ | |
151 | #define NM_RATE_STEREO 1 | |
152 | #define NM_RATE_BITS_16 2 | |
153 | #define NM_RATE_MASK 0xf0 | |
154 | ||
155 | /* Playback enable register. */ | |
156 | #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1) | |
157 | #define NM_PLAYBACK_ENABLE_FLAG 1 | |
158 | #define NM_PLAYBACK_ONESHOT 2 | |
159 | #define NM_PLAYBACK_FREERUN 4 | |
160 | ||
161 | /* Mutes the audio output. */ | |
162 | #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18) | |
163 | #define NM_AUDIO_MUTE_LEFT 0x8000 | |
164 | #define NM_AUDIO_MUTE_RIGHT 0x0080 | |
165 | ||
166 | /* Recording enable register. */ | |
167 | #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0) | |
168 | #define NM_RECORD_ENABLE_FLAG 1 | |
169 | #define NM_RECORD_FREERUN 2 | |
170 | ||
171 | /* coefficient buffer pointer */ | |
172 | #define NM_COEFF_START_OFFSET 0x1c | |
173 | #define NM_COEFF_END_OFFSET 0x20 | |
174 | ||
175 | /* DMA buffer offsets */ | |
176 | #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4) | |
177 | #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10) | |
178 | #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc) | |
179 | #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8) | |
180 | ||
181 | #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4) | |
182 | #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14) | |
183 | #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc) | |
184 | #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8) | |
185 | ||
186 | /* | |
187 | * type definitions | |
188 | */ | |
189 | ||
190 | typedef struct snd_nm256 nm256_t; | |
191 | typedef struct snd_nm256_stream nm256_stream_t; | |
192 | ||
193 | struct snd_nm256_stream { | |
194 | ||
195 | nm256_t *chip; | |
196 | snd_pcm_substream_t *substream; | |
197 | int running; | |
1204de32 | 198 | int suspended; |
1da177e4 LT |
199 | |
200 | u32 buf; /* offset from chip->buffer */ | |
201 | int bufsize; /* buffer size in bytes */ | |
202 | void __iomem *bufptr; /* mapped pointer */ | |
203 | unsigned long bufptr_addr; /* physical address of the mapped pointer */ | |
204 | ||
205 | int dma_size; /* buffer size of the substream in bytes */ | |
206 | int period_size; /* period size in bytes */ | |
207 | int periods; /* # of periods */ | |
208 | int shift; /* bit shifts */ | |
209 | int cur_period; /* current period # */ | |
210 | ||
211 | }; | |
212 | ||
213 | struct snd_nm256 { | |
214 | ||
215 | snd_card_t *card; | |
216 | ||
217 | void __iomem *cport; /* control port */ | |
218 | struct resource *res_cport; /* its resource */ | |
219 | unsigned long cport_addr; /* physical address */ | |
220 | ||
221 | void __iomem *buffer; /* buffer */ | |
222 | struct resource *res_buffer; /* its resource */ | |
223 | unsigned long buffer_addr; /* buffer phyiscal address */ | |
224 | ||
225 | u32 buffer_start; /* start offset from pci resource 0 */ | |
226 | u32 buffer_end; /* end offset */ | |
227 | u32 buffer_size; /* total buffer size */ | |
228 | ||
229 | u32 all_coeff_buf; /* coefficient buffer */ | |
230 | u32 coeff_buf[2]; /* coefficient buffer for each stream */ | |
231 | ||
232 | unsigned int coeffs_current: 1; /* coeff. table is loaded? */ | |
233 | unsigned int use_cache: 1; /* use one big coef. table */ | |
234 | unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */ | |
47530cf4 | 235 | unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */ |
1da177e4 LT |
236 | |
237 | int mixer_base; /* register offset of ac97 mixer */ | |
238 | int mixer_status_offset; /* offset of mixer status reg. */ | |
239 | int mixer_status_mask; /* bit mask to test the mixer status */ | |
240 | ||
241 | int irq; | |
1204de32 | 242 | int irq_acks; |
1da177e4 LT |
243 | irqreturn_t (*interrupt)(int, void *, struct pt_regs *); |
244 | int badintrcount; /* counter to check bogus interrupts */ | |
1204de32 | 245 | struct semaphore irq_mutex; |
1da177e4 LT |
246 | |
247 | nm256_stream_t streams[2]; | |
248 | ||
249 | ac97_t *ac97; | |
250 | ||
251 | snd_pcm_t *pcm; | |
252 | ||
253 | struct pci_dev *pci; | |
254 | ||
255 | spinlock_t reg_lock; | |
256 | ||
257 | }; | |
258 | ||
259 | ||
260 | /* | |
261 | * include coefficient table | |
262 | */ | |
263 | #include "nm256_coef.c" | |
264 | ||
265 | ||
266 | /* | |
267 | * PCI ids | |
268 | */ | |
1da177e4 LT |
269 | static struct pci_device_id snd_nm256_ids[] = { |
270 | {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
271 | {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
272 | {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
273 | {0,}, | |
274 | }; | |
275 | ||
276 | MODULE_DEVICE_TABLE(pci, snd_nm256_ids); | |
277 | ||
278 | ||
279 | /* | |
280 | * lowlvel stuffs | |
281 | */ | |
282 | ||
77933d72 | 283 | static inline u8 |
1da177e4 LT |
284 | snd_nm256_readb(nm256_t *chip, int offset) |
285 | { | |
286 | return readb(chip->cport + offset); | |
287 | } | |
288 | ||
77933d72 | 289 | static inline u16 |
1da177e4 LT |
290 | snd_nm256_readw(nm256_t *chip, int offset) |
291 | { | |
292 | return readw(chip->cport + offset); | |
293 | } | |
294 | ||
77933d72 | 295 | static inline u32 |
1da177e4 LT |
296 | snd_nm256_readl(nm256_t *chip, int offset) |
297 | { | |
298 | return readl(chip->cport + offset); | |
299 | } | |
300 | ||
77933d72 | 301 | static inline void |
1da177e4 LT |
302 | snd_nm256_writeb(nm256_t *chip, int offset, u8 val) |
303 | { | |
304 | writeb(val, chip->cport + offset); | |
305 | } | |
306 | ||
77933d72 | 307 | static inline void |
1da177e4 LT |
308 | snd_nm256_writew(nm256_t *chip, int offset, u16 val) |
309 | { | |
310 | writew(val, chip->cport + offset); | |
311 | } | |
312 | ||
77933d72 | 313 | static inline void |
1da177e4 LT |
314 | snd_nm256_writel(nm256_t *chip, int offset, u32 val) |
315 | { | |
316 | writel(val, chip->cport + offset); | |
317 | } | |
318 | ||
77933d72 | 319 | static inline void |
1da177e4 LT |
320 | snd_nm256_write_buffer(nm256_t *chip, void *src, int offset, int size) |
321 | { | |
322 | offset -= chip->buffer_start; | |
99b359ba | 323 | #ifdef CONFIG_SND_DEBUG |
1da177e4 | 324 | if (offset < 0 || offset >= chip->buffer_size) { |
99b359ba | 325 | snd_printk(KERN_ERR "write_buffer invalid offset = %d size = %d\n", offset, size); |
1da177e4 LT |
326 | return; |
327 | } | |
328 | #endif | |
329 | memcpy_toio(chip->buffer + offset, src, size); | |
330 | } | |
331 | ||
332 | /* | |
333 | * coefficient handlers -- what a magic! | |
334 | */ | |
335 | ||
336 | static u16 | |
337 | snd_nm256_get_start_offset(int which) | |
338 | { | |
339 | u16 offset = 0; | |
340 | while (which-- > 0) | |
341 | offset += coefficient_sizes[which]; | |
342 | return offset; | |
343 | } | |
344 | ||
345 | static void | |
346 | snd_nm256_load_one_coefficient(nm256_t *chip, int stream, u32 port, int which) | |
347 | { | |
348 | u32 coeff_buf = chip->coeff_buf[stream]; | |
349 | u16 offset = snd_nm256_get_start_offset(which); | |
350 | u16 size = coefficient_sizes[which]; | |
351 | ||
352 | snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size); | |
353 | snd_nm256_writel(chip, port, coeff_buf); | |
354 | /* ??? Record seems to behave differently than playback. */ | |
355 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) | |
356 | size--; | |
357 | snd_nm256_writel(chip, port + 4, coeff_buf + size); | |
358 | } | |
359 | ||
360 | static void | |
361 | snd_nm256_load_coefficient(nm256_t *chip, int stream, int number) | |
362 | { | |
363 | /* The enable register for the specified engine. */ | |
364 | u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ? NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG); | |
365 | u32 addr = NM_COEFF_START_OFFSET; | |
366 | ||
367 | addr += (stream == SNDRV_PCM_STREAM_CAPTURE ? NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET); | |
368 | ||
369 | if (snd_nm256_readb(chip, poffset) & 1) { | |
370 | snd_printd("NM256: Engine was enabled while loading coefficients!\n"); | |
371 | return; | |
372 | } | |
373 | ||
374 | /* The recording engine uses coefficient values 8-15. */ | |
375 | number &= 7; | |
376 | if (stream == SNDRV_PCM_STREAM_CAPTURE) | |
377 | number += 8; | |
378 | ||
379 | if (! chip->use_cache) { | |
380 | snd_nm256_load_one_coefficient(chip, stream, addr, number); | |
381 | return; | |
382 | } | |
383 | if (! chip->coeffs_current) { | |
384 | snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf, | |
385 | NM_TOTAL_COEFF_COUNT * 4); | |
386 | chip->coeffs_current = 1; | |
387 | } else { | |
388 | u32 base = chip->all_coeff_buf; | |
389 | u32 offset = snd_nm256_get_start_offset(number); | |
390 | u32 end_offset = offset + coefficient_sizes[number]; | |
391 | snd_nm256_writel(chip, addr, base + offset); | |
392 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) | |
393 | end_offset--; | |
394 | snd_nm256_writel(chip, addr + 4, base + end_offset); | |
395 | } | |
396 | } | |
397 | ||
398 | ||
399 | /* The actual rates supported by the card. */ | |
400 | static unsigned int samplerates[8] = { | |
401 | 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000, | |
402 | }; | |
403 | static snd_pcm_hw_constraint_list_t constraints_rates = { | |
404 | .count = ARRAY_SIZE(samplerates), | |
405 | .list = samplerates, | |
406 | .mask = 0, | |
407 | }; | |
408 | ||
409 | /* | |
410 | * return the index of the target rate | |
411 | */ | |
412 | static int | |
413 | snd_nm256_fixed_rate(unsigned int rate) | |
414 | { | |
415 | unsigned int i; | |
416 | for (i = 0; i < ARRAY_SIZE(samplerates); i++) { | |
417 | if (rate == samplerates[i]) | |
418 | return i; | |
419 | } | |
420 | snd_BUG(); | |
421 | return 0; | |
422 | } | |
423 | ||
424 | /* | |
425 | * set sample rate and format | |
426 | */ | |
427 | static void | |
428 | snd_nm256_set_format(nm256_t *chip, nm256_stream_t *s, snd_pcm_substream_t *substream) | |
429 | { | |
430 | snd_pcm_runtime_t *runtime = substream->runtime; | |
431 | int rate_index = snd_nm256_fixed_rate(runtime->rate); | |
432 | unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK; | |
433 | ||
434 | s->shift = 0; | |
435 | if (snd_pcm_format_width(runtime->format) == 16) { | |
436 | ratebits |= NM_RATE_BITS_16; | |
437 | s->shift++; | |
438 | } | |
439 | if (runtime->channels > 1) { | |
440 | ratebits |= NM_RATE_STEREO; | |
441 | s->shift++; | |
442 | } | |
443 | ||
444 | runtime->rate = samplerates[rate_index]; | |
445 | ||
446 | switch (substream->stream) { | |
447 | case SNDRV_PCM_STREAM_PLAYBACK: | |
448 | snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */ | |
449 | snd_nm256_writeb(chip, | |
450 | NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET, | |
451 | ratebits); | |
452 | break; | |
453 | case SNDRV_PCM_STREAM_CAPTURE: | |
454 | snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */ | |
455 | snd_nm256_writeb(chip, | |
456 | NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET, | |
457 | ratebits); | |
458 | break; | |
459 | } | |
460 | } | |
461 | ||
1204de32 TI |
462 | /* acquire interrupt */ |
463 | static int snd_nm256_acquire_irq(nm256_t *chip) | |
464 | { | |
465 | down(&chip->irq_mutex); | |
466 | if (chip->irq < 0) { | |
467 | if (request_irq(chip->pci->irq, chip->interrupt, SA_INTERRUPT|SA_SHIRQ, | |
468 | chip->card->driver, (void*)chip)) { | |
99b359ba | 469 | snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->pci->irq); |
1204de32 TI |
470 | up(&chip->irq_mutex); |
471 | return -EBUSY; | |
472 | } | |
473 | chip->irq = chip->pci->irq; | |
474 | } | |
475 | chip->irq_acks++; | |
476 | up(&chip->irq_mutex); | |
477 | return 0; | |
478 | } | |
479 | ||
480 | /* release interrupt */ | |
481 | static void snd_nm256_release_irq(nm256_t *chip) | |
482 | { | |
483 | down(&chip->irq_mutex); | |
484 | if (chip->irq_acks > 0) | |
485 | chip->irq_acks--; | |
486 | if (chip->irq_acks == 0 && chip->irq >= 0) { | |
487 | free_irq(chip->irq, (void*)chip); | |
488 | chip->irq = -1; | |
489 | } | |
490 | up(&chip->irq_mutex); | |
491 | } | |
492 | ||
1da177e4 LT |
493 | /* |
494 | * start / stop | |
495 | */ | |
496 | ||
497 | /* update the watermark (current period) */ | |
498 | static void snd_nm256_pcm_mark(nm256_t *chip, nm256_stream_t *s, int reg) | |
499 | { | |
500 | s->cur_period++; | |
501 | s->cur_period %= s->periods; | |
502 | snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size); | |
503 | } | |
504 | ||
505 | #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK) | |
506 | #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK) | |
507 | ||
508 | static void | |
509 | snd_nm256_playback_start(nm256_t *chip, nm256_stream_t *s, snd_pcm_substream_t *substream) | |
510 | { | |
511 | /* program buffer pointers */ | |
512 | snd_nm256_writel(chip, NM_PBUFFER_START, s->buf); | |
513 | snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift)); | |
514 | snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf); | |
515 | snd_nm256_playback_mark(chip, s); | |
516 | ||
517 | /* Enable playback engine and interrupts. */ | |
518 | snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, | |
519 | NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN); | |
520 | /* Enable both channels. */ | |
521 | snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0); | |
522 | } | |
523 | ||
524 | static void | |
525 | snd_nm256_capture_start(nm256_t *chip, nm256_stream_t *s, snd_pcm_substream_t *substream) | |
526 | { | |
527 | /* program buffer pointers */ | |
528 | snd_nm256_writel(chip, NM_RBUFFER_START, s->buf); | |
529 | snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size); | |
530 | snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf); | |
531 | snd_nm256_capture_mark(chip, s); | |
532 | ||
533 | /* Enable playback engine and interrupts. */ | |
534 | snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, | |
535 | NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN); | |
536 | } | |
537 | ||
538 | /* Stop the play engine. */ | |
539 | static void | |
540 | snd_nm256_playback_stop(nm256_t *chip) | |
541 | { | |
542 | /* Shut off sound from both channels. */ | |
543 | snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, | |
544 | NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT); | |
545 | /* Disable play engine. */ | |
546 | snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0); | |
547 | } | |
548 | ||
549 | static void | |
550 | snd_nm256_capture_stop(nm256_t *chip) | |
551 | { | |
552 | /* Disable recording engine. */ | |
553 | snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0); | |
554 | } | |
555 | ||
556 | static int | |
557 | snd_nm256_playback_trigger(snd_pcm_substream_t *substream, int cmd) | |
558 | { | |
559 | nm256_t *chip = snd_pcm_substream_chip(substream); | |
560 | nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data; | |
561 | int err = 0; | |
562 | ||
563 | snd_assert(s != NULL, return -ENXIO); | |
564 | ||
565 | spin_lock(&chip->reg_lock); | |
566 | switch (cmd) { | |
1da177e4 | 567 | case SNDRV_PCM_TRIGGER_RESUME: |
1204de32 TI |
568 | s->suspended = 0; |
569 | /* fallthru */ | |
570 | case SNDRV_PCM_TRIGGER_START: | |
1da177e4 LT |
571 | if (! s->running) { |
572 | snd_nm256_playback_start(chip, s, substream); | |
573 | s->running = 1; | |
574 | } | |
575 | break; | |
1da177e4 | 576 | case SNDRV_PCM_TRIGGER_SUSPEND: |
1204de32 TI |
577 | s->suspended = 1; |
578 | /* fallthru */ | |
579 | case SNDRV_PCM_TRIGGER_STOP: | |
1da177e4 LT |
580 | if (s->running) { |
581 | snd_nm256_playback_stop(chip); | |
582 | s->running = 0; | |
583 | } | |
584 | break; | |
585 | default: | |
586 | err = -EINVAL; | |
587 | break; | |
588 | } | |
589 | spin_unlock(&chip->reg_lock); | |
590 | return err; | |
591 | } | |
592 | ||
593 | static int | |
594 | snd_nm256_capture_trigger(snd_pcm_substream_t *substream, int cmd) | |
595 | { | |
596 | nm256_t *chip = snd_pcm_substream_chip(substream); | |
597 | nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data; | |
598 | int err = 0; | |
599 | ||
600 | snd_assert(s != NULL, return -ENXIO); | |
601 | ||
602 | spin_lock(&chip->reg_lock); | |
603 | switch (cmd) { | |
604 | case SNDRV_PCM_TRIGGER_START: | |
605 | case SNDRV_PCM_TRIGGER_RESUME: | |
606 | if (! s->running) { | |
607 | snd_nm256_capture_start(chip, s, substream); | |
608 | s->running = 1; | |
609 | } | |
610 | break; | |
611 | case SNDRV_PCM_TRIGGER_STOP: | |
612 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
613 | if (s->running) { | |
614 | snd_nm256_capture_stop(chip); | |
615 | s->running = 0; | |
616 | } | |
617 | break; | |
618 | default: | |
619 | err = -EINVAL; | |
620 | break; | |
621 | } | |
622 | spin_unlock(&chip->reg_lock); | |
623 | return err; | |
624 | } | |
625 | ||
626 | ||
627 | /* | |
628 | * prepare playback/capture channel | |
629 | */ | |
630 | static int snd_nm256_pcm_prepare(snd_pcm_substream_t *substream) | |
631 | { | |
632 | nm256_t *chip = snd_pcm_substream_chip(substream); | |
633 | snd_pcm_runtime_t *runtime = substream->runtime; | |
634 | nm256_stream_t *s = (nm256_stream_t*)runtime->private_data; | |
635 | ||
636 | snd_assert(s, return -ENXIO); | |
637 | s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size); | |
638 | s->period_size = frames_to_bytes(runtime, substream->runtime->period_size); | |
639 | s->periods = substream->runtime->periods; | |
640 | s->cur_period = 0; | |
641 | ||
642 | spin_lock_irq(&chip->reg_lock); | |
643 | s->running = 0; | |
644 | snd_nm256_set_format(chip, s, substream); | |
645 | spin_unlock_irq(&chip->reg_lock); | |
646 | ||
647 | return 0; | |
648 | } | |
649 | ||
650 | ||
651 | /* | |
652 | * get the current pointer | |
653 | */ | |
654 | static snd_pcm_uframes_t | |
655 | snd_nm256_playback_pointer(snd_pcm_substream_t * substream) | |
656 | { | |
657 | nm256_t *chip = snd_pcm_substream_chip(substream); | |
658 | nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data; | |
659 | unsigned long curp; | |
660 | ||
661 | snd_assert(s, return 0); | |
662 | curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf; | |
663 | curp %= s->dma_size; | |
664 | return bytes_to_frames(substream->runtime, curp); | |
665 | } | |
666 | ||
667 | static snd_pcm_uframes_t | |
668 | snd_nm256_capture_pointer(snd_pcm_substream_t * substream) | |
669 | { | |
670 | nm256_t *chip = snd_pcm_substream_chip(substream); | |
671 | nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data; | |
672 | unsigned long curp; | |
673 | ||
674 | snd_assert(s != NULL, return 0); | |
675 | curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf; | |
676 | curp %= s->dma_size; | |
677 | return bytes_to_frames(substream->runtime, curp); | |
678 | } | |
679 | ||
680 | /* Remapped I/O space can be accessible as pointer on i386 */ | |
681 | /* This might be changed in the future */ | |
682 | #ifndef __i386__ | |
683 | /* | |
684 | * silence / copy for playback | |
685 | */ | |
686 | static int | |
687 | snd_nm256_playback_silence(snd_pcm_substream_t *substream, | |
688 | int channel, /* not used (interleaved data) */ | |
689 | snd_pcm_uframes_t pos, | |
690 | snd_pcm_uframes_t count) | |
691 | { | |
692 | snd_pcm_runtime_t *runtime = substream->runtime; | |
693 | nm256_stream_t *s = (nm256_stream_t*)runtime->private_data; | |
694 | count = frames_to_bytes(runtime, count); | |
695 | pos = frames_to_bytes(runtime, pos); | |
696 | memset_io(s->bufptr + pos, 0, count); | |
697 | return 0; | |
698 | } | |
699 | ||
700 | static int | |
701 | snd_nm256_playback_copy(snd_pcm_substream_t *substream, | |
702 | int channel, /* not used (interleaved data) */ | |
703 | snd_pcm_uframes_t pos, | |
704 | void __user *src, | |
705 | snd_pcm_uframes_t count) | |
706 | { | |
707 | snd_pcm_runtime_t *runtime = substream->runtime; | |
708 | nm256_stream_t *s = (nm256_stream_t*)runtime->private_data; | |
709 | count = frames_to_bytes(runtime, count); | |
710 | pos = frames_to_bytes(runtime, pos); | |
711 | if (copy_from_user_toio(s->bufptr + pos, src, count)) | |
712 | return -EFAULT; | |
713 | return 0; | |
714 | } | |
715 | ||
716 | /* | |
717 | * copy to user | |
718 | */ | |
719 | static int | |
720 | snd_nm256_capture_copy(snd_pcm_substream_t *substream, | |
721 | int channel, /* not used (interleaved data) */ | |
722 | snd_pcm_uframes_t pos, | |
723 | void __user *dst, | |
724 | snd_pcm_uframes_t count) | |
725 | { | |
726 | snd_pcm_runtime_t *runtime = substream->runtime; | |
727 | nm256_stream_t *s = (nm256_stream_t*)runtime->private_data; | |
728 | count = frames_to_bytes(runtime, count); | |
729 | pos = frames_to_bytes(runtime, pos); | |
730 | if (copy_to_user_fromio(dst, s->bufptr + pos, count)) | |
731 | return -EFAULT; | |
732 | return 0; | |
733 | } | |
734 | ||
735 | #endif /* !__i386__ */ | |
736 | ||
737 | ||
738 | /* | |
739 | * update playback/capture watermarks | |
740 | */ | |
741 | ||
742 | /* spinlock held! */ | |
743 | static void | |
744 | snd_nm256_playback_update(nm256_t *chip) | |
745 | { | |
746 | nm256_stream_t *s; | |
747 | ||
748 | s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK]; | |
749 | if (s->running && s->substream) { | |
750 | spin_unlock(&chip->reg_lock); | |
751 | snd_pcm_period_elapsed(s->substream); | |
752 | spin_lock(&chip->reg_lock); | |
753 | snd_nm256_playback_mark(chip, s); | |
754 | } | |
755 | } | |
756 | ||
757 | /* spinlock held! */ | |
758 | static void | |
759 | snd_nm256_capture_update(nm256_t *chip) | |
760 | { | |
761 | nm256_stream_t *s; | |
762 | ||
763 | s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE]; | |
764 | if (s->running && s->substream) { | |
765 | spin_unlock(&chip->reg_lock); | |
766 | snd_pcm_period_elapsed(s->substream); | |
767 | spin_lock(&chip->reg_lock); | |
768 | snd_nm256_capture_mark(chip, s); | |
769 | } | |
770 | } | |
771 | ||
772 | /* | |
773 | * hardware info | |
774 | */ | |
775 | static snd_pcm_hardware_t snd_nm256_playback = | |
776 | { | |
777 | .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID | | |
778 | SNDRV_PCM_INFO_INTERLEAVED | | |
779 | /*SNDRV_PCM_INFO_PAUSE |*/ | |
780 | SNDRV_PCM_INFO_RESUME, | |
781 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, | |
782 | .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000, | |
783 | .rate_min = 8000, | |
784 | .rate_max = 48000, | |
785 | .channels_min = 1, | |
786 | .channels_max = 2, | |
787 | .periods_min = 2, | |
788 | .periods_max = 1024, | |
789 | .buffer_bytes_max = 128 * 1024, | |
790 | .period_bytes_min = 256, | |
791 | .period_bytes_max = 128 * 1024, | |
792 | }; | |
793 | ||
794 | static snd_pcm_hardware_t snd_nm256_capture = | |
795 | { | |
796 | .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID | | |
797 | SNDRV_PCM_INFO_INTERLEAVED | | |
798 | /*SNDRV_PCM_INFO_PAUSE |*/ | |
799 | SNDRV_PCM_INFO_RESUME, | |
800 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, | |
801 | .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000, | |
802 | .rate_min = 8000, | |
803 | .rate_max = 48000, | |
804 | .channels_min = 1, | |
805 | .channels_max = 2, | |
806 | .periods_min = 2, | |
807 | .periods_max = 1024, | |
808 | .buffer_bytes_max = 128 * 1024, | |
809 | .period_bytes_min = 256, | |
810 | .period_bytes_max = 128 * 1024, | |
811 | }; | |
812 | ||
813 | ||
814 | /* set dma transfer size */ | |
815 | static int snd_nm256_pcm_hw_params(snd_pcm_substream_t *substream, snd_pcm_hw_params_t *hw_params) | |
816 | { | |
817 | /* area and addr are already set and unchanged */ | |
818 | substream->runtime->dma_bytes = params_buffer_bytes(hw_params); | |
819 | return 0; | |
820 | } | |
821 | ||
822 | /* | |
823 | * open | |
824 | */ | |
825 | static void snd_nm256_setup_stream(nm256_t *chip, nm256_stream_t *s, | |
826 | snd_pcm_substream_t *substream, | |
827 | snd_pcm_hardware_t *hw_ptr) | |
828 | { | |
829 | snd_pcm_runtime_t *runtime = substream->runtime; | |
830 | ||
831 | s->running = 0; | |
832 | runtime->hw = *hw_ptr; | |
833 | runtime->hw.buffer_bytes_max = s->bufsize; | |
834 | runtime->hw.period_bytes_max = s->bufsize / 2; | |
4d23359b | 835 | runtime->dma_area = (void __force *) s->bufptr; |
1da177e4 LT |
836 | runtime->dma_addr = s->bufptr_addr; |
837 | runtime->dma_bytes = s->bufsize; | |
838 | runtime->private_data = s; | |
839 | s->substream = substream; | |
840 | ||
841 | snd_pcm_set_sync(substream); | |
842 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
843 | &constraints_rates); | |
844 | } | |
845 | ||
846 | static int | |
847 | snd_nm256_playback_open(snd_pcm_substream_t *substream) | |
848 | { | |
849 | nm256_t *chip = snd_pcm_substream_chip(substream); | |
850 | ||
1204de32 TI |
851 | if (snd_nm256_acquire_irq(chip) < 0) |
852 | return -EBUSY; | |
1da177e4 LT |
853 | snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK], |
854 | substream, &snd_nm256_playback); | |
855 | return 0; | |
856 | } | |
857 | ||
858 | static int | |
859 | snd_nm256_capture_open(snd_pcm_substream_t *substream) | |
860 | { | |
861 | nm256_t *chip = snd_pcm_substream_chip(substream); | |
862 | ||
1204de32 TI |
863 | if (snd_nm256_acquire_irq(chip) < 0) |
864 | return -EBUSY; | |
1da177e4 LT |
865 | snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE], |
866 | substream, &snd_nm256_capture); | |
867 | return 0; | |
868 | } | |
869 | ||
870 | /* | |
871 | * close - we don't have to do special.. | |
872 | */ | |
873 | static int | |
874 | snd_nm256_playback_close(snd_pcm_substream_t *substream) | |
875 | { | |
1204de32 TI |
876 | nm256_t *chip = snd_pcm_substream_chip(substream); |
877 | ||
878 | snd_nm256_release_irq(chip); | |
1da177e4 LT |
879 | return 0; |
880 | } | |
881 | ||
882 | ||
883 | static int | |
884 | snd_nm256_capture_close(snd_pcm_substream_t *substream) | |
885 | { | |
1204de32 TI |
886 | nm256_t *chip = snd_pcm_substream_chip(substream); |
887 | ||
888 | snd_nm256_release_irq(chip); | |
1da177e4 LT |
889 | return 0; |
890 | } | |
891 | ||
892 | /* | |
893 | * create a pcm instance | |
894 | */ | |
895 | static snd_pcm_ops_t snd_nm256_playback_ops = { | |
896 | .open = snd_nm256_playback_open, | |
897 | .close = snd_nm256_playback_close, | |
898 | .ioctl = snd_pcm_lib_ioctl, | |
899 | .hw_params = snd_nm256_pcm_hw_params, | |
900 | .prepare = snd_nm256_pcm_prepare, | |
901 | .trigger = snd_nm256_playback_trigger, | |
902 | .pointer = snd_nm256_playback_pointer, | |
903 | #ifndef __i386__ | |
904 | .copy = snd_nm256_playback_copy, | |
905 | .silence = snd_nm256_playback_silence, | |
906 | #endif | |
907 | .mmap = snd_pcm_lib_mmap_iomem, | |
908 | }; | |
909 | ||
910 | static snd_pcm_ops_t snd_nm256_capture_ops = { | |
911 | .open = snd_nm256_capture_open, | |
912 | .close = snd_nm256_capture_close, | |
913 | .ioctl = snd_pcm_lib_ioctl, | |
914 | .hw_params = snd_nm256_pcm_hw_params, | |
915 | .prepare = snd_nm256_pcm_prepare, | |
916 | .trigger = snd_nm256_capture_trigger, | |
917 | .pointer = snd_nm256_capture_pointer, | |
918 | #ifndef __i386__ | |
919 | .copy = snd_nm256_capture_copy, | |
920 | #endif | |
921 | .mmap = snd_pcm_lib_mmap_iomem, | |
922 | }; | |
923 | ||
924 | static int __devinit | |
925 | snd_nm256_pcm(nm256_t *chip, int device) | |
926 | { | |
927 | snd_pcm_t *pcm; | |
928 | int i, err; | |
929 | ||
930 | for (i = 0; i < 2; i++) { | |
931 | nm256_stream_t *s = &chip->streams[i]; | |
932 | s->bufptr = chip->buffer + (s->buf - chip->buffer_start); | |
933 | s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start); | |
934 | } | |
935 | ||
936 | err = snd_pcm_new(chip->card, chip->card->driver, device, | |
937 | 1, 1, &pcm); | |
938 | if (err < 0) | |
939 | return err; | |
940 | ||
941 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops); | |
942 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops); | |
943 | ||
944 | pcm->private_data = chip; | |
945 | pcm->info_flags = 0; | |
946 | chip->pcm = pcm; | |
947 | ||
948 | return 0; | |
949 | } | |
950 | ||
951 | ||
952 | /* | |
953 | * Initialize the hardware. | |
954 | */ | |
955 | static void | |
956 | snd_nm256_init_chip(nm256_t *chip) | |
957 | { | |
1da177e4 LT |
958 | /* Reset everything. */ |
959 | snd_nm256_writeb(chip, 0x0, 0x11); | |
960 | snd_nm256_writew(chip, 0x214, 0); | |
961 | /* stop sounds.. */ | |
962 | //snd_nm256_playback_stop(chip); | |
963 | //snd_nm256_capture_stop(chip); | |
1da177e4 LT |
964 | } |
965 | ||
966 | ||
1204de32 | 967 | static irqreturn_t |
1da177e4 LT |
968 | snd_nm256_intr_check(nm256_t *chip) |
969 | { | |
970 | if (chip->badintrcount++ > 1000) { | |
971 | /* | |
972 | * I'm not sure if the best thing is to stop the card from | |
973 | * playing or just release the interrupt (after all, we're in | |
974 | * a bad situation, so doing fancy stuff may not be such a good | |
975 | * idea). | |
976 | * | |
977 | * I worry about the card engine continuing to play noise | |
978 | * over and over, however--that could become a very | |
979 | * obnoxious problem. And we know that when this usually | |
980 | * happens things are fairly safe, it just means the user's | |
981 | * inserted a PCMCIA card and someone's spamming us with IRQ 9s. | |
982 | */ | |
983 | if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running) | |
984 | snd_nm256_playback_stop(chip); | |
985 | if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running) | |
986 | snd_nm256_capture_stop(chip); | |
987 | chip->badintrcount = 0; | |
1204de32 | 988 | return IRQ_HANDLED; |
1da177e4 | 989 | } |
1204de32 | 990 | return IRQ_NONE; |
1da177e4 LT |
991 | } |
992 | ||
993 | /* | |
994 | * Handle a potential interrupt for the device referred to by DEV_ID. | |
995 | * | |
996 | * I don't like the cut-n-paste job here either between the two routines, | |
997 | * but there are sufficient differences between the two interrupt handlers | |
998 | * that parameterizing it isn't all that great either. (Could use a macro, | |
999 | * I suppose...yucky bleah.) | |
1000 | */ | |
1001 | ||
1002 | static irqreturn_t | |
1003 | snd_nm256_interrupt(int irq, void *dev_id, struct pt_regs *dummy) | |
1004 | { | |
1005 | nm256_t *chip = dev_id; | |
1006 | u16 status; | |
1007 | u8 cbyte; | |
1008 | ||
1009 | status = snd_nm256_readw(chip, NM_INT_REG); | |
1010 | ||
1011 | /* Not ours. */ | |
1204de32 TI |
1012 | if (status == 0) |
1013 | return snd_nm256_intr_check(chip); | |
1da177e4 LT |
1014 | |
1015 | chip->badintrcount = 0; | |
1016 | ||
1017 | /* Rather boring; check for individual interrupts and process them. */ | |
1018 | ||
1019 | spin_lock(&chip->reg_lock); | |
1020 | if (status & NM_PLAYBACK_INT) { | |
1021 | status &= ~NM_PLAYBACK_INT; | |
1022 | NM_ACK_INT(chip, NM_PLAYBACK_INT); | |
1023 | snd_nm256_playback_update(chip); | |
1024 | } | |
1025 | ||
1026 | if (status & NM_RECORD_INT) { | |
1027 | status &= ~NM_RECORD_INT; | |
1028 | NM_ACK_INT(chip, NM_RECORD_INT); | |
1029 | snd_nm256_capture_update(chip); | |
1030 | } | |
1031 | ||
1032 | if (status & NM_MISC_INT_1) { | |
1033 | status &= ~NM_MISC_INT_1; | |
1034 | NM_ACK_INT(chip, NM_MISC_INT_1); | |
1035 | snd_printd("NM256: Got misc interrupt #1\n"); | |
1036 | snd_nm256_writew(chip, NM_INT_REG, 0x8000); | |
1037 | cbyte = snd_nm256_readb(chip, 0x400); | |
1038 | snd_nm256_writeb(chip, 0x400, cbyte | 2); | |
1039 | } | |
1040 | ||
1041 | if (status & NM_MISC_INT_2) { | |
1042 | status &= ~NM_MISC_INT_2; | |
1043 | NM_ACK_INT(chip, NM_MISC_INT_2); | |
1044 | snd_printd("NM256: Got misc interrupt #2\n"); | |
1045 | cbyte = snd_nm256_readb(chip, 0x400); | |
1046 | snd_nm256_writeb(chip, 0x400, cbyte & ~2); | |
1047 | } | |
1048 | ||
1049 | /* Unknown interrupt. */ | |
1050 | if (status) { | |
1051 | snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n", | |
1052 | status); | |
1053 | /* Pray. */ | |
1054 | NM_ACK_INT(chip, status); | |
1055 | } | |
1056 | ||
1057 | spin_unlock(&chip->reg_lock); | |
1058 | return IRQ_HANDLED; | |
1059 | } | |
1060 | ||
1061 | /* | |
1062 | * Handle a potential interrupt for the device referred to by DEV_ID. | |
1063 | * This handler is for the 256ZX, and is very similar to the non-ZX | |
1064 | * routine. | |
1065 | */ | |
1066 | ||
1067 | static irqreturn_t | |
1068 | snd_nm256_interrupt_zx(int irq, void *dev_id, struct pt_regs *dummy) | |
1069 | { | |
1070 | nm256_t *chip = dev_id; | |
1071 | u32 status; | |
1072 | u8 cbyte; | |
1073 | ||
1074 | status = snd_nm256_readl(chip, NM_INT_REG); | |
1075 | ||
1076 | /* Not ours. */ | |
1204de32 TI |
1077 | if (status == 0) |
1078 | return snd_nm256_intr_check(chip); | |
1da177e4 LT |
1079 | |
1080 | chip->badintrcount = 0; | |
1081 | ||
1082 | /* Rather boring; check for individual interrupts and process them. */ | |
1083 | ||
1084 | spin_lock(&chip->reg_lock); | |
1085 | if (status & NM2_PLAYBACK_INT) { | |
1086 | status &= ~NM2_PLAYBACK_INT; | |
1087 | NM2_ACK_INT(chip, NM2_PLAYBACK_INT); | |
1088 | snd_nm256_playback_update(chip); | |
1089 | } | |
1090 | ||
1091 | if (status & NM2_RECORD_INT) { | |
1092 | status &= ~NM2_RECORD_INT; | |
1093 | NM2_ACK_INT(chip, NM2_RECORD_INT); | |
1094 | snd_nm256_capture_update(chip); | |
1095 | } | |
1096 | ||
1097 | if (status & NM2_MISC_INT_1) { | |
1098 | status &= ~NM2_MISC_INT_1; | |
1099 | NM2_ACK_INT(chip, NM2_MISC_INT_1); | |
1100 | snd_printd("NM256: Got misc interrupt #1\n"); | |
1101 | cbyte = snd_nm256_readb(chip, 0x400); | |
1102 | snd_nm256_writeb(chip, 0x400, cbyte | 2); | |
1103 | } | |
1104 | ||
1105 | if (status & NM2_MISC_INT_2) { | |
1106 | status &= ~NM2_MISC_INT_2; | |
1107 | NM2_ACK_INT(chip, NM2_MISC_INT_2); | |
1108 | snd_printd("NM256: Got misc interrupt #2\n"); | |
1109 | cbyte = snd_nm256_readb(chip, 0x400); | |
1110 | snd_nm256_writeb(chip, 0x400, cbyte & ~2); | |
1111 | } | |
1112 | ||
1113 | /* Unknown interrupt. */ | |
1114 | if (status) { | |
1115 | snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n", | |
1116 | status); | |
1117 | /* Pray. */ | |
1118 | NM2_ACK_INT(chip, status); | |
1119 | } | |
1120 | ||
1121 | spin_unlock(&chip->reg_lock); | |
1122 | return IRQ_HANDLED; | |
1123 | } | |
1124 | ||
1125 | /* | |
1126 | * AC97 interface | |
1127 | */ | |
1128 | ||
1129 | /* | |
1130 | * Waits for the mixer to become ready to be written; returns a zero value | |
1131 | * if it timed out. | |
1132 | */ | |
1133 | static int | |
1134 | snd_nm256_ac97_ready(nm256_t *chip) | |
1135 | { | |
1136 | int timeout = 10; | |
1137 | u32 testaddr; | |
1138 | u16 testb; | |
1139 | ||
1140 | testaddr = chip->mixer_status_offset; | |
1141 | testb = chip->mixer_status_mask; | |
1142 | ||
1143 | /* | |
1144 | * Loop around waiting for the mixer to become ready. | |
1145 | */ | |
1146 | while (timeout-- > 0) { | |
1147 | if ((snd_nm256_readw(chip, testaddr) & testb) == 0) | |
1148 | return 1; | |
1149 | udelay(100); | |
1150 | } | |
1151 | return 0; | |
1152 | } | |
1153 | ||
1154 | /* | |
1155 | */ | |
1156 | static unsigned short | |
1157 | snd_nm256_ac97_read(ac97_t *ac97, unsigned short reg) | |
1158 | { | |
1159 | nm256_t *chip = ac97->private_data; | |
1160 | int res; | |
1161 | ||
1162 | if (reg >= 128) | |
1163 | return 0; | |
1164 | ||
1165 | if (! snd_nm256_ac97_ready(chip)) | |
1166 | return 0; | |
1167 | res = snd_nm256_readw(chip, chip->mixer_base + reg); | |
1168 | /* Magic delay. Bleah yucky. */ | |
1169 | msleep(1); | |
1170 | return res; | |
1171 | } | |
1172 | ||
1173 | /* | |
1174 | */ | |
1175 | static void | |
1176 | snd_nm256_ac97_write(ac97_t *ac97, | |
1177 | unsigned short reg, unsigned short val) | |
1178 | { | |
1179 | nm256_t *chip = ac97->private_data; | |
1180 | int tries = 2; | |
1181 | u32 base; | |
1182 | ||
1183 | base = chip->mixer_base; | |
1184 | ||
1185 | snd_nm256_ac97_ready(chip); | |
1186 | ||
1187 | /* Wait for the write to take, too. */ | |
1188 | while (tries-- > 0) { | |
1189 | snd_nm256_writew(chip, base + reg, val); | |
1190 | msleep(1); /* a little delay here seems better.. */ | |
1191 | if (snd_nm256_ac97_ready(chip)) | |
1192 | return; | |
1193 | } | |
1194 | snd_printd("nm256: ac97 codec not ready..\n"); | |
1195 | } | |
1196 | ||
1197 | /* initialize the ac97 into a known state */ | |
1198 | static void | |
1199 | snd_nm256_ac97_reset(ac97_t *ac97) | |
1200 | { | |
1201 | nm256_t *chip = ac97->private_data; | |
1202 | ||
1203 | /* Reset the mixer. 'Tis magic! */ | |
1204 | snd_nm256_writeb(chip, 0x6c0, 1); | |
1205 | if (! chip->reset_workaround) { | |
1206 | /* Dell latitude LS will lock up by this */ | |
1207 | snd_nm256_writeb(chip, 0x6cc, 0x87); | |
1208 | } | |
47530cf4 JL |
1209 | if (! chip->reset_workaround_2) { |
1210 | /* Dell latitude CSx will lock up by this */ | |
1211 | snd_nm256_writeb(chip, 0x6cc, 0x80); | |
1212 | snd_nm256_writeb(chip, 0x6cc, 0x0); | |
1213 | } | |
1da177e4 LT |
1214 | } |
1215 | ||
1216 | /* create an ac97 mixer interface */ | |
1217 | static int __devinit | |
1218 | snd_nm256_mixer(nm256_t *chip) | |
1219 | { | |
1220 | ac97_bus_t *pbus; | |
1221 | ac97_template_t ac97; | |
1222 | int i, err; | |
1223 | static ac97_bus_ops_t ops = { | |
1224 | .reset = snd_nm256_ac97_reset, | |
1225 | .write = snd_nm256_ac97_write, | |
1226 | .read = snd_nm256_ac97_read, | |
1227 | }; | |
1228 | /* looks like nm256 hangs up when unexpected registers are touched... */ | |
1229 | static int mixer_regs[] = { | |
1230 | AC97_MASTER, AC97_HEADPHONE, AC97_MASTER_MONO, | |
1231 | AC97_PC_BEEP, AC97_PHONE, AC97_MIC, AC97_LINE, AC97_CD, | |
1232 | AC97_VIDEO, AC97_AUX, AC97_PCM, AC97_REC_SEL, | |
1233 | AC97_REC_GAIN, AC97_GENERAL_PURPOSE, AC97_3D_CONTROL, | |
1204de32 | 1234 | /*AC97_EXTENDED_ID,*/ |
1da177e4 LT |
1235 | AC97_VENDOR_ID1, AC97_VENDOR_ID2, |
1236 | -1 | |
1237 | }; | |
1238 | ||
1239 | if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0) | |
1240 | return err; | |
1241 | ||
1242 | memset(&ac97, 0, sizeof(ac97)); | |
1243 | ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */ | |
1244 | ac97.limited_regs = 1; | |
1245 | for (i = 0; mixer_regs[i] >= 0; i++) | |
1246 | set_bit(mixer_regs[i], ac97.reg_accessed); | |
1247 | ac97.private_data = chip; | |
1204de32 | 1248 | pbus->no_vra = 1; |
1da177e4 LT |
1249 | err = snd_ac97_mixer(pbus, &ac97, &chip->ac97); |
1250 | if (err < 0) | |
1251 | return err; | |
1252 | if (! (chip->ac97->id & (0xf0000000))) { | |
1253 | /* looks like an invalid id */ | |
1254 | sprintf(chip->card->mixername, "%s AC97", chip->card->driver); | |
1255 | } | |
1256 | return 0; | |
1257 | } | |
1258 | ||
1259 | /* | |
1260 | * See if the signature left by the NM256 BIOS is intact; if so, we use | |
1261 | * the associated address as the end of our audio buffer in the video | |
1262 | * RAM. | |
1263 | */ | |
1264 | ||
1265 | static int __devinit | |
1266 | snd_nm256_peek_for_sig(nm256_t *chip) | |
1267 | { | |
1268 | /* The signature is located 1K below the end of video RAM. */ | |
1269 | void __iomem *temp; | |
1270 | /* Default buffer end is 5120 bytes below the top of RAM. */ | |
1271 | unsigned long pointer_found = chip->buffer_end - 0x1400; | |
1272 | u32 sig; | |
1273 | ||
1274 | temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16); | |
1275 | if (temp == NULL) { | |
99b359ba | 1276 | snd_printk(KERN_ERR "Unable to scan for card signature in video RAM\n"); |
1da177e4 LT |
1277 | return -EBUSY; |
1278 | } | |
1279 | ||
1280 | sig = readl(temp); | |
1281 | if ((sig & NM_SIG_MASK) == NM_SIGNATURE) { | |
1282 | u32 pointer = readl(temp + 4); | |
1283 | ||
1284 | /* | |
1285 | * If it's obviously invalid, don't use it | |
1286 | */ | |
1287 | if (pointer == 0xffffffff || | |
1288 | pointer < chip->buffer_size || | |
1289 | pointer > chip->buffer_end) { | |
99b359ba | 1290 | snd_printk(KERN_ERR "invalid signature found: 0x%x\n", pointer); |
1da177e4 LT |
1291 | iounmap(temp); |
1292 | return -ENODEV; | |
1293 | } else { | |
1294 | pointer_found = pointer; | |
1295 | printk(KERN_INFO "nm256: found card signature in video RAM: 0x%x\n", pointer); | |
1296 | } | |
1297 | } | |
1298 | ||
1299 | iounmap(temp); | |
1300 | chip->buffer_end = pointer_found; | |
1301 | ||
1302 | return 0; | |
1303 | } | |
1304 | ||
1305 | #ifdef CONFIG_PM | |
1306 | /* | |
1307 | * APM event handler, so the card is properly reinitialized after a power | |
1308 | * event. | |
1309 | */ | |
1310 | static int nm256_suspend(snd_card_t *card, pm_message_t state) | |
1311 | { | |
1312 | nm256_t *chip = card->pm_private_data; | |
1313 | ||
1314 | snd_pcm_suspend_all(chip->pcm); | |
1315 | snd_ac97_suspend(chip->ac97); | |
1316 | chip->coeffs_current = 0; | |
1317 | pci_disable_device(chip->pci); | |
1318 | return 0; | |
1319 | } | |
1320 | ||
1321 | static int nm256_resume(snd_card_t *card) | |
1322 | { | |
1323 | nm256_t *chip = card->pm_private_data; | |
1204de32 | 1324 | int i; |
1da177e4 LT |
1325 | |
1326 | /* Perform a full reset on the hardware */ | |
1327 | pci_enable_device(chip->pci); | |
1328 | snd_nm256_init_chip(chip); | |
1329 | ||
1330 | /* restore ac97 */ | |
1331 | snd_ac97_resume(chip->ac97); | |
1332 | ||
1204de32 TI |
1333 | for (i = 0; i < 2; i++) { |
1334 | nm256_stream_t *s = &chip->streams[i]; | |
1335 | if (s->substream && s->suspended) { | |
1336 | spin_lock_irq(&chip->reg_lock); | |
1337 | snd_nm256_set_format(chip, s, s->substream); | |
1338 | spin_unlock_irq(&chip->reg_lock); | |
1339 | } | |
1340 | } | |
1341 | ||
1da177e4 LT |
1342 | return 0; |
1343 | } | |
1344 | #endif /* CONFIG_PM */ | |
1345 | ||
1346 | static int snd_nm256_free(nm256_t *chip) | |
1347 | { | |
1348 | if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running) | |
1349 | snd_nm256_playback_stop(chip); | |
1350 | if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running) | |
1351 | snd_nm256_capture_stop(chip); | |
1352 | ||
1353 | if (chip->irq >= 0) | |
1354 | synchronize_irq(chip->irq); | |
1355 | ||
1356 | if (chip->cport) | |
1357 | iounmap(chip->cport); | |
1358 | if (chip->buffer) | |
1359 | iounmap(chip->buffer); | |
b1d5776d TI |
1360 | release_and_free_resource(chip->res_cport); |
1361 | release_and_free_resource(chip->res_buffer); | |
1da177e4 LT |
1362 | if (chip->irq >= 0) |
1363 | free_irq(chip->irq, (void*)chip); | |
1364 | ||
1365 | pci_disable_device(chip->pci); | |
1366 | kfree(chip); | |
1367 | return 0; | |
1368 | } | |
1369 | ||
1370 | static int snd_nm256_dev_free(snd_device_t *device) | |
1371 | { | |
1372 | nm256_t *chip = device->device_data; | |
1373 | return snd_nm256_free(chip); | |
1374 | } | |
1375 | ||
1376 | static int __devinit | |
1377 | snd_nm256_create(snd_card_t *card, struct pci_dev *pci, | |
1da177e4 LT |
1378 | nm256_t **chip_ret) |
1379 | { | |
1380 | nm256_t *chip; | |
1381 | int err, pval; | |
1382 | static snd_device_ops_t ops = { | |
1383 | .dev_free = snd_nm256_dev_free, | |
1384 | }; | |
1385 | u32 addr; | |
1386 | ||
1387 | *chip_ret = NULL; | |
1388 | ||
1389 | if ((err = pci_enable_device(pci)) < 0) | |
1390 | return err; | |
1391 | ||
e560d8d8 | 1392 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 LT |
1393 | if (chip == NULL) { |
1394 | pci_disable_device(pci); | |
1395 | return -ENOMEM; | |
1396 | } | |
1397 | ||
1398 | chip->card = card; | |
1399 | chip->pci = pci; | |
3f05f868 | 1400 | chip->use_cache = use_cache; |
1da177e4 LT |
1401 | spin_lock_init(&chip->reg_lock); |
1402 | chip->irq = -1; | |
1204de32 | 1403 | init_MUTEX(&chip->irq_mutex); |
1da177e4 | 1404 | |
3f05f868 TI |
1405 | /* store buffer sizes in bytes */ |
1406 | chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024; | |
1407 | chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024; | |
1da177e4 LT |
1408 | |
1409 | /* | |
1410 | * The NM256 has two memory ports. The first port is nothing | |
1411 | * more than a chunk of video RAM, which is used as the I/O ring | |
1412 | * buffer. The second port has the actual juicy stuff (like the | |
1413 | * mixer and the playback engine control registers). | |
1414 | */ | |
1415 | ||
1416 | chip->buffer_addr = pci_resource_start(pci, 0); | |
1417 | chip->cport_addr = pci_resource_start(pci, 1); | |
1418 | ||
1419 | /* Init the memory port info. */ | |
1420 | /* remap control port (#2) */ | |
1421 | chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE, | |
1422 | card->driver); | |
1423 | if (chip->res_cport == NULL) { | |
99b359ba | 1424 | snd_printk(KERN_ERR "memory region 0x%lx (size 0x%x) busy\n", |
1da177e4 LT |
1425 | chip->cport_addr, NM_PORT2_SIZE); |
1426 | err = -EBUSY; | |
1427 | goto __error; | |
1428 | } | |
1429 | chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE); | |
1430 | if (chip->cport == NULL) { | |
99b359ba | 1431 | snd_printk(KERN_ERR "unable to map control port %lx\n", chip->cport_addr); |
1da177e4 LT |
1432 | err = -ENOMEM; |
1433 | goto __error; | |
1434 | } | |
1435 | ||
1436 | if (!strcmp(card->driver, "NM256AV")) { | |
1437 | /* Ok, try to see if this is a non-AC97 version of the hardware. */ | |
1438 | pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE); | |
1439 | if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) { | |
3f05f868 | 1440 | if (! force_ac97) { |
1da177e4 LT |
1441 | printk(KERN_ERR "nm256: no ac97 is found!\n"); |
1442 | printk(KERN_ERR " force the driver to load by passing in the module parameter\n"); | |
1443 | printk(KERN_ERR " force_ac97=1\n"); | |
1444 | printk(KERN_ERR " or try sb16 or cs423x drivers instead.\n"); | |
1445 | err = -ENXIO; | |
1446 | goto __error; | |
1447 | } | |
1448 | } | |
1449 | chip->buffer_end = 2560 * 1024; | |
1450 | chip->interrupt = snd_nm256_interrupt; | |
1451 | chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET; | |
1452 | chip->mixer_status_mask = NM_MIXER_READY_MASK; | |
1453 | } else { | |
1454 | /* Not sure if there is any relevant detect for the ZX or not. */ | |
1455 | if (snd_nm256_readb(chip, 0xa0b) != 0) | |
1456 | chip->buffer_end = 6144 * 1024; | |
1457 | else | |
1458 | chip->buffer_end = 4096 * 1024; | |
1459 | ||
1460 | chip->interrupt = snd_nm256_interrupt_zx; | |
1461 | chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET; | |
1462 | chip->mixer_status_mask = NM2_MIXER_READY_MASK; | |
1463 | } | |
1464 | ||
1465 | chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize + chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize; | |
1466 | if (chip->use_cache) | |
1467 | chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4; | |
1468 | else | |
1469 | chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE; | |
1470 | ||
3f05f868 TI |
1471 | if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end) |
1472 | chip->buffer_end = buffer_top; | |
1da177e4 LT |
1473 | else { |
1474 | /* get buffer end pointer from signature */ | |
1475 | if ((err = snd_nm256_peek_for_sig(chip)) < 0) | |
1476 | goto __error; | |
1477 | } | |
1478 | ||
1479 | chip->buffer_start = chip->buffer_end - chip->buffer_size; | |
1480 | chip->buffer_addr += chip->buffer_start; | |
1481 | ||
1482 | printk(KERN_INFO "nm256: Mapping port 1 from 0x%x - 0x%x\n", | |
1483 | chip->buffer_start, chip->buffer_end); | |
1484 | ||
1485 | chip->res_buffer = request_mem_region(chip->buffer_addr, | |
1486 | chip->buffer_size, | |
1487 | card->driver); | |
1488 | if (chip->res_buffer == NULL) { | |
99b359ba | 1489 | snd_printk(KERN_ERR "nm256: buffer 0x%lx (size 0x%x) busy\n", |
1da177e4 LT |
1490 | chip->buffer_addr, chip->buffer_size); |
1491 | err = -EBUSY; | |
1492 | goto __error; | |
1493 | } | |
1494 | chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size); | |
1495 | if (chip->buffer == NULL) { | |
1496 | err = -ENOMEM; | |
99b359ba | 1497 | snd_printk(KERN_ERR "unable to map ring buffer at %lx\n", chip->buffer_addr); |
1da177e4 LT |
1498 | goto __error; |
1499 | } | |
1500 | ||
1501 | /* set offsets */ | |
1502 | addr = chip->buffer_start; | |
1503 | chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr; | |
1504 | addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize; | |
1505 | chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr; | |
1506 | addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize; | |
1507 | if (chip->use_cache) { | |
1508 | chip->all_coeff_buf = addr; | |
1509 | } else { | |
1510 | chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr; | |
1511 | addr += NM_MAX_PLAYBACK_COEF_SIZE; | |
1512 | chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr; | |
1513 | } | |
1514 | ||
1da177e4 LT |
1515 | /* Fixed setting. */ |
1516 | chip->mixer_base = NM_MIXER_OFFSET; | |
1517 | ||
1518 | chip->coeffs_current = 0; | |
1519 | ||
1520 | snd_nm256_init_chip(chip); | |
1521 | ||
1522 | // pci_set_master(pci); /* needed? */ | |
1523 | ||
1524 | snd_card_set_pm_callback(card, nm256_suspend, nm256_resume, chip); | |
1525 | ||
1526 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) | |
1527 | goto __error; | |
1528 | ||
1529 | snd_card_set_dev(card, &pci->dev); | |
1530 | ||
1531 | *chip_ret = chip; | |
1532 | return 0; | |
1533 | ||
1534 | __error: | |
1535 | snd_nm256_free(chip); | |
1536 | return err; | |
1537 | } | |
1538 | ||
1539 | ||
1540 | struct nm256_quirk { | |
1541 | unsigned short vendor; | |
1542 | unsigned short device; | |
1543 | int type; | |
1544 | }; | |
1545 | ||
47530cf4 | 1546 | enum { NM_BLACKLISTED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 }; |
1da177e4 LT |
1547 | |
1548 | static struct nm256_quirk nm256_quirks[] __devinitdata = { | |
1549 | /* HP omnibook 4150 has cs4232 codec internally */ | |
1550 | { .vendor = 0x103c, .device = 0x0007, .type = NM_BLACKLISTED }, | |
1551 | /* Sony PCG-F305 */ | |
1552 | { .vendor = 0x104d, .device = 0x8041, .type = NM_RESET_WORKAROUND }, | |
1553 | /* Dell Latitude LS */ | |
1554 | { .vendor = 0x1028, .device = 0x0080, .type = NM_RESET_WORKAROUND }, | |
47530cf4 JL |
1555 | /* Dell Latitude CSx */ |
1556 | { .vendor = 0x1028, .device = 0x0091, .type = NM_RESET_WORKAROUND_2 }, | |
1da177e4 LT |
1557 | { } /* terminator */ |
1558 | }; | |
1559 | ||
1560 | ||
1561 | static int __devinit snd_nm256_probe(struct pci_dev *pci, | |
1562 | const struct pci_device_id *pci_id) | |
1563 | { | |
1da177e4 LT |
1564 | snd_card_t *card; |
1565 | nm256_t *chip; | |
1566 | int err; | |
1da177e4 LT |
1567 | struct nm256_quirk *q; |
1568 | u16 subsystem_vendor, subsystem_device; | |
1569 | ||
1da177e4 LT |
1570 | pci_read_config_word(pci, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vendor); |
1571 | pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &subsystem_device); | |
1572 | ||
1573 | for (q = nm256_quirks; q->vendor; q++) { | |
1574 | if (q->vendor == subsystem_vendor && q->device == subsystem_device) { | |
1575 | switch (q->type) { | |
1576 | case NM_BLACKLISTED: | |
1577 | printk(KERN_INFO "nm256: The device is blacklisted. Loading stopped\n"); | |
1578 | return -ENODEV; | |
47530cf4 | 1579 | case NM_RESET_WORKAROUND_2: |
8a3fb4d0 | 1580 | reset_workaround_2 = 1; |
47530cf4 | 1581 | /* Fall-through */ |
1da177e4 | 1582 | case NM_RESET_WORKAROUND: |
8a3fb4d0 | 1583 | reset_workaround = 1; |
1da177e4 LT |
1584 | break; |
1585 | } | |
1586 | } | |
1587 | } | |
1588 | ||
8a3fb4d0 | 1589 | card = snd_card_new(index, id, THIS_MODULE, 0); |
1da177e4 LT |
1590 | if (card == NULL) |
1591 | return -ENOMEM; | |
1592 | ||
1593 | switch (pci->device) { | |
1594 | case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO: | |
1595 | strcpy(card->driver, "NM256AV"); | |
1596 | break; | |
1597 | case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO: | |
1598 | strcpy(card->driver, "NM256ZX"); | |
1599 | break; | |
1600 | case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO: | |
1601 | strcpy(card->driver, "NM256XL+"); | |
1602 | break; | |
1603 | default: | |
99b359ba | 1604 | snd_printk(KERN_ERR "invalid device id 0x%x\n", pci->device); |
1da177e4 LT |
1605 | snd_card_free(card); |
1606 | return -EINVAL; | |
1607 | } | |
1608 | ||
8a3fb4d0 | 1609 | if (vaio_hack) |
3f05f868 | 1610 | buffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */ |
8a3fb4d0 TI |
1611 | |
1612 | if (playback_bufsize < 4) | |
1613 | playback_bufsize = 4; | |
1614 | if (playback_bufsize > 128) | |
1615 | playback_bufsize = 128; | |
1616 | if (capture_bufsize < 4) | |
1617 | capture_bufsize = 4; | |
1618 | if (capture_bufsize > 128) | |
1619 | capture_bufsize = 128; | |
3f05f868 | 1620 | if ((err = snd_nm256_create(card, pci, &chip)) < 0) { |
1da177e4 LT |
1621 | snd_card_free(card); |
1622 | return err; | |
1623 | } | |
1624 | ||
8a3fb4d0 | 1625 | if (reset_workaround) { |
1da177e4 LT |
1626 | snd_printdd(KERN_INFO "nm256: reset_workaround activated\n"); |
1627 | chip->reset_workaround = 1; | |
1628 | } | |
1629 | ||
8a3fb4d0 | 1630 | if (reset_workaround_2) { |
47530cf4 JL |
1631 | snd_printdd(KERN_INFO "nm256: reset_workaround_2 activated\n"); |
1632 | chip->reset_workaround_2 = 1; | |
1633 | } | |
1634 | ||
1da177e4 LT |
1635 | if ((err = snd_nm256_pcm(chip, 0)) < 0 || |
1636 | (err = snd_nm256_mixer(chip)) < 0) { | |
1637 | snd_card_free(card); | |
1638 | return err; | |
1639 | } | |
1640 | ||
1641 | sprintf(card->shortname, "NeoMagic %s", card->driver); | |
1642 | sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d", | |
1643 | card->shortname, | |
1644 | chip->buffer_addr, chip->cport_addr, chip->irq); | |
1645 | ||
1646 | if ((err = snd_card_register(card)) < 0) { | |
1647 | snd_card_free(card); | |
1648 | return err; | |
1649 | } | |
1650 | ||
1651 | pci_set_drvdata(pci, card); | |
1da177e4 LT |
1652 | return 0; |
1653 | } | |
1654 | ||
1655 | static void __devexit snd_nm256_remove(struct pci_dev *pci) | |
1656 | { | |
1657 | snd_card_free(pci_get_drvdata(pci)); | |
1658 | pci_set_drvdata(pci, NULL); | |
1659 | } | |
1660 | ||
1661 | ||
1662 | static struct pci_driver driver = { | |
1663 | .name = "NeoMagic 256", | |
1664 | .id_table = snd_nm256_ids, | |
1665 | .probe = snd_nm256_probe, | |
1666 | .remove = __devexit_p(snd_nm256_remove), | |
1667 | SND_PCI_PM_CALLBACKS | |
1668 | }; | |
1669 | ||
1670 | ||
1671 | static int __init alsa_card_nm256_init(void) | |
1672 | { | |
01d25d46 | 1673 | return pci_register_driver(&driver); |
1da177e4 LT |
1674 | } |
1675 | ||
1676 | static void __exit alsa_card_nm256_exit(void) | |
1677 | { | |
1678 | pci_unregister_driver(&driver); | |
1679 | } | |
1680 | ||
1681 | module_init(alsa_card_nm256_init) | |
1682 | module_exit(alsa_card_nm256_exit) |