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1b8ff22f CL |
1 | /* |
2 | * C-Media CMI8788 driver for Asus Xonar cards | |
3 | * | |
4 | * Copyright (c) Clemens Ladisch <clemens@ladisch.de> | |
5 | * | |
6 | * | |
7 | * This driver is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License, version 2. | |
9 | * | |
10 | * This driver is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this driver; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | */ | |
19 | ||
20 | /* | |
a9d3cc48 CL |
21 | * Xonar D2/D2X |
22 | * ------------ | |
23 | * | |
878ac3ee CL |
24 | * CMI8788: |
25 | * | |
1b8ff22f | 26 | * SPI 0 -> 1st PCM1796 (front) |
7113e958 | 27 | * SPI 1 -> 2nd PCM1796 (surround) |
1b8ff22f | 28 | * SPI 2 -> 3rd PCM1796 (center/LFE) |
7e86c0e6 | 29 | * SPI 4 -> 4th PCM1796 (back) and EEPROM self-destruct (do not use!) |
1b8ff22f CL |
30 | * |
31 | * GPIO 2 -> M0 of CS5381 | |
32 | * GPIO 3 -> M1 of CS5381 | |
878ac3ee | 33 | * GPIO 5 <- external power present (D2X only) |
1b8ff22f | 34 | * GPIO 7 -> ALT |
878ac3ee | 35 | * GPIO 8 -> enable output to speakers |
1b8ff22f CL |
36 | */ |
37 | ||
a9d3cc48 | 38 | /* |
5430c72b CL |
39 | * Xonar D1/DX |
40 | * ----------- | |
a9d3cc48 CL |
41 | * |
42 | * CMI8788: | |
43 | * | |
44 | * I²C <-> CS4398 (front) | |
45 | * <-> CS4362A (surround, center/LFE, back) | |
46 | * | |
5430c72b | 47 | * GPI 0 <- external power present (DX only) |
a9d3cc48 CL |
48 | * |
49 | * GPIO 0 -> enable output to speakers | |
a8bb1bad | 50 | * GPIO 1 -> enable front panel I/O |
a9d3cc48 CL |
51 | * GPIO 2 -> M0 of CS5361 |
52 | * GPIO 3 -> M1 of CS5361 | |
11864b4b | 53 | * GPIO 8 -> route input jack to line-in (0) or mic-in (1) |
a9d3cc48 CL |
54 | * |
55 | * CS4398: | |
56 | * | |
57 | * AD0 <- 1 | |
58 | * AD1 <- 1 | |
59 | * | |
60 | * CS4362A: | |
61 | * | |
62 | * AD0 <- 0 | |
63 | */ | |
64 | ||
7407a2e4 CL |
65 | /* |
66 | * Xonar HDAV1.3 (Deluxe) | |
67 | * ---------------------- | |
68 | * | |
69 | * CMI8788: | |
70 | * | |
71 | * I²C <-> PCM1796 (front) | |
72 | * | |
73 | * GPI 0 <- external power present | |
74 | * | |
75 | * GPIO 0 -> enable output to speakers | |
76 | * GPIO 2 -> M0 of CS5381 | |
77 | * GPIO 3 -> M1 of CS5381 | |
78 | * GPIO 8 -> route input jack to line-in (0) or mic-in (1) | |
79 | * | |
80 | * TXD -> HDMI controller | |
81 | * RXD <- HDMI controller | |
82 | * | |
83 | * PCM1796 front: AD1,0 <- 0,0 | |
84 | * | |
85 | * no daughterboard | |
86 | * ---------------- | |
87 | * | |
88 | * GPIO 4 <- 1 | |
89 | * | |
90 | * H6 daughterboard | |
91 | * ---------------- | |
92 | * | |
93 | * GPIO 4 <- 0 | |
94 | * GPIO 5 <- 0 | |
95 | * | |
96 | * I²C <-> PCM1796 (surround) | |
97 | * <-> PCM1796 (center/LFE) | |
98 | * <-> PCM1796 (back) | |
99 | * | |
100 | * PCM1796 surround: AD1,0 <- 0,1 | |
101 | * PCM1796 center/LFE: AD1,0 <- 1,0 | |
102 | * PCM1796 back: AD1,0 <- 1,1 | |
103 | * | |
104 | * unknown daughterboard | |
105 | * --------------------- | |
106 | * | |
107 | * GPIO 4 <- 0 | |
108 | * GPIO 5 <- 1 | |
109 | * | |
110 | * I²C <-> CS4362A (surround, center/LFE, back) | |
111 | * | |
112 | * CS4362A: AD0 <- 0 | |
113 | */ | |
114 | ||
1b8ff22f CL |
115 | #include <linux/pci.h> |
116 | #include <linux/delay.h> | |
ccc80fb4 CL |
117 | #include <linux/mutex.h> |
118 | #include <sound/ac97_codec.h> | |
7407a2e4 | 119 | #include <sound/asoundef.h> |
1b8ff22f CL |
120 | #include <sound/control.h> |
121 | #include <sound/core.h> | |
122 | #include <sound/initval.h> | |
123 | #include <sound/pcm.h> | |
7407a2e4 | 124 | #include <sound/pcm_params.h> |
1b8ff22f CL |
125 | #include <sound/tlv.h> |
126 | #include "oxygen.h" | |
878ac3ee | 127 | #include "cm9780.h" |
33fa724e | 128 | #include "pcm1796.h" |
a9d3cc48 CL |
129 | #include "cs4398.h" |
130 | #include "cs4362a.h" | |
1b8ff22f CL |
131 | |
132 | MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); | |
a9d3cc48 | 133 | MODULE_DESCRIPTION("Asus AVx00 driver"); |
d023dc0a | 134 | MODULE_LICENSE("GPL v2"); |
a9d3cc48 | 135 | MODULE_SUPPORTED_DEVICE("{{Asus,AV100},{Asus,AV200}}"); |
1b8ff22f CL |
136 | |
137 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; | |
138 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; | |
139 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; | |
140 | ||
141 | module_param_array(index, int, NULL, 0444); | |
142 | MODULE_PARM_DESC(index, "card index"); | |
143 | module_param_array(id, charp, NULL, 0444); | |
144 | MODULE_PARM_DESC(id, "ID string"); | |
145 | module_param_array(enable, bool, NULL, 0444); | |
146 | MODULE_PARM_DESC(enable, "enable card"); | |
147 | ||
271ebfca CL |
148 | enum { |
149 | MODEL_D2, | |
150 | MODEL_D2X, | |
5430c72b | 151 | MODEL_D1, |
a9d3cc48 | 152 | MODEL_DX, |
7407a2e4 CL |
153 | MODEL_HDAV, /* without daughterboard */ |
154 | MODEL_HDAV_H6, /* with H6 daughterboard */ | |
271ebfca CL |
155 | }; |
156 | ||
1b8ff22f | 157 | static struct pci_device_id xonar_ids[] __devinitdata = { |
271ebfca | 158 | { OXYGEN_PCI_SUBID(0x1043, 0x8269), .driver_data = MODEL_D2 }, |
a9d3cc48 | 159 | { OXYGEN_PCI_SUBID(0x1043, 0x8275), .driver_data = MODEL_DX }, |
271ebfca | 160 | { OXYGEN_PCI_SUBID(0x1043, 0x82b7), .driver_data = MODEL_D2X }, |
7407a2e4 | 161 | { OXYGEN_PCI_SUBID(0x1043, 0x8314), .driver_data = MODEL_HDAV }, |
5430c72b | 162 | { OXYGEN_PCI_SUBID(0x1043, 0x834f), .driver_data = MODEL_D1 }, |
1b8ff22f CL |
163 | { } |
164 | }; | |
165 | MODULE_DEVICE_TABLE(pci, xonar_ids); | |
166 | ||
878ac3ee | 167 | |
a694a6a0 CL |
168 | #define GPIO_CS53x1_M_MASK 0x000c |
169 | #define GPIO_CS53x1_M_SINGLE 0x0000 | |
170 | #define GPIO_CS53x1_M_DOUBLE 0x0004 | |
171 | #define GPIO_CS53x1_M_QUAD 0x0008 | |
172 | ||
af9af174 CL |
173 | #define GPIO_D2X_EXT_POWER 0x0020 |
174 | #define GPIO_D2_ALT 0x0080 | |
175 | #define GPIO_D2_OUTPUT_ENABLE 0x0100 | |
878ac3ee | 176 | |
a9d3cc48 CL |
177 | #define GPI_DX_EXT_POWER 0x01 |
178 | #define GPIO_DX_OUTPUT_ENABLE 0x0001 | |
a8bb1bad | 179 | #define GPIO_DX_FRONT_PANEL 0x0002 |
11864b4b | 180 | #define GPIO_DX_INPUT_ROUTE 0x0100 |
a9d3cc48 | 181 | |
7407a2e4 CL |
182 | #define GPIO_HDAV_DB_MASK 0x0030 |
183 | #define GPIO_HDAV_DB_H6 0x0000 | |
184 | #define GPIO_HDAV_DB_XX 0x0020 | |
185 | ||
4f50d2fd | 186 | #define I2C_DEVICE_PCM1796(i) (0x98 + ((i) << 1)) /* 10011, ADx=i, /W=0 */ |
a9d3cc48 CL |
187 | #define I2C_DEVICE_CS4398 0x9e /* 10011, AD1=1, AD0=1, /W=0 */ |
188 | #define I2C_DEVICE_CS4362A 0x30 /* 001100, AD0=0, /W=0 */ | |
189 | ||
7c014159 | 190 | struct xonar_data { |
fe10662c | 191 | unsigned int model; |
af9af174 | 192 | unsigned int anti_pop_delay; |
70c27d34 | 193 | unsigned int dacs; |
af9af174 CL |
194 | u16 output_enable_bit; |
195 | u8 ext_power_reg; | |
196 | u8 ext_power_int_reg; | |
197 | u8 ext_power_bit; | |
7c014159 | 198 | u8 has_power; |
e58aee95 CL |
199 | u8 pcm1796_oversampling; |
200 | u8 cs4398_fm; | |
201 | u8 cs4362a_fm; | |
7407a2e4 | 202 | u8 hdmi_params[5]; |
7c014159 CL |
203 | }; |
204 | ||
fe10662c CL |
205 | static void xonar_gpio_changed(struct oxygen *chip); |
206 | ||
4f50d2fd CL |
207 | static inline void pcm1796_write_spi(struct oxygen *chip, unsigned int codec, |
208 | u8 reg, u8 value) | |
1b8ff22f | 209 | { |
7e86c0e6 CL |
210 | /* |
211 | * We don't want to do writes on SPI 4 because the EEPROM, which shares | |
212 | * the same pin, might get confused and broken. We'd better take care | |
213 | * that the driver works with the default register values ... | |
214 | */ | |
215 | #if 0 | |
1b8ff22f CL |
216 | /* maps ALSA channel pair number to SPI output */ |
217 | static const u8 codec_map[4] = { | |
7113e958 | 218 | 0, 1, 2, 4 |
1b8ff22f | 219 | }; |
c2353a08 | 220 | oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | |
1b8ff22f | 221 | OXYGEN_SPI_DATA_LENGTH_2 | |
c2353a08 | 222 | OXYGEN_SPI_CLOCK_160 | |
1b8ff22f | 223 | (codec_map[codec] << OXYGEN_SPI_CODEC_SHIFT) | |
c2353a08 | 224 | OXYGEN_SPI_CEN_LATCH_CLOCK_HI, |
1b8ff22f | 225 | (reg << 8) | value); |
7e86c0e6 | 226 | #endif |
1b8ff22f CL |
227 | } |
228 | ||
4f50d2fd CL |
229 | static inline void pcm1796_write_i2c(struct oxygen *chip, unsigned int codec, |
230 | u8 reg, u8 value) | |
231 | { | |
232 | oxygen_write_i2c(chip, I2C_DEVICE_PCM1796(codec), reg, value); | |
233 | } | |
234 | ||
235 | static void pcm1796_write(struct oxygen *chip, unsigned int codec, | |
236 | u8 reg, u8 value) | |
237 | { | |
238 | if ((chip->model.function_flags & OXYGEN_FUNCTION_2WIRE_SPI_MASK) == | |
239 | OXYGEN_FUNCTION_SPI) | |
240 | pcm1796_write_spi(chip, codec, reg, value); | |
241 | else | |
242 | pcm1796_write_i2c(chip, codec, reg, value); | |
243 | } | |
244 | ||
a9d3cc48 CL |
245 | static void cs4398_write(struct oxygen *chip, u8 reg, u8 value) |
246 | { | |
247 | oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value); | |
248 | } | |
249 | ||
250 | static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value) | |
251 | { | |
252 | oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value); | |
253 | } | |
254 | ||
7407a2e4 CL |
255 | static void hdmi_write_command(struct oxygen *chip, u8 command, |
256 | unsigned int count, const u8 *params) | |
257 | { | |
258 | unsigned int i; | |
259 | u8 checksum; | |
260 | ||
261 | oxygen_write_uart(chip, 0xfb); | |
262 | oxygen_write_uart(chip, 0xef); | |
263 | oxygen_write_uart(chip, command); | |
264 | oxygen_write_uart(chip, count); | |
265 | for (i = 0; i < count; ++i) | |
266 | oxygen_write_uart(chip, params[i]); | |
267 | checksum = 0xfb + 0xef + command + count; | |
268 | for (i = 0; i < count; ++i) | |
269 | checksum += params[i]; | |
270 | oxygen_write_uart(chip, checksum); | |
271 | } | |
272 | ||
92215f3a CL |
273 | static void xonar_enable_output(struct oxygen *chip) |
274 | { | |
275 | struct xonar_data *data = chip->model_data; | |
276 | ||
277 | msleep(data->anti_pop_delay); | |
278 | oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit); | |
279 | } | |
280 | ||
af9af174 CL |
281 | static void xonar_common_init(struct oxygen *chip) |
282 | { | |
283 | struct xonar_data *data = chip->model_data; | |
284 | ||
285 | if (data->ext_power_reg) { | |
286 | oxygen_set_bits8(chip, data->ext_power_int_reg, | |
287 | data->ext_power_bit); | |
288 | chip->interrupt_mask |= OXYGEN_INT_GPIO; | |
fe10662c | 289 | chip->model.gpio_changed = xonar_gpio_changed; |
af9af174 CL |
290 | data->has_power = !!(oxygen_read8(chip, data->ext_power_reg) |
291 | & data->ext_power_bit); | |
292 | } | |
92215f3a CL |
293 | oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, |
294 | GPIO_CS53x1_M_MASK | data->output_enable_bit); | |
af9af174 CL |
295 | oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, |
296 | GPIO_CS53x1_M_SINGLE, GPIO_CS53x1_M_MASK); | |
297 | oxygen_ac97_set_bits(chip, 0, CM9780_JACK, CM9780_FMIC2MIC); | |
92215f3a | 298 | xonar_enable_output(chip); |
af9af174 CL |
299 | } |
300 | ||
bbbfb552 CL |
301 | static void update_pcm1796_volume(struct oxygen *chip) |
302 | { | |
70c27d34 | 303 | struct xonar_data *data = chip->model_data; |
bbbfb552 CL |
304 | unsigned int i; |
305 | ||
70c27d34 | 306 | for (i = 0; i < data->dacs; ++i) { |
bbbfb552 CL |
307 | pcm1796_write(chip, i, 16, chip->dac_volume[i * 2]); |
308 | pcm1796_write(chip, i, 17, chip->dac_volume[i * 2 + 1]); | |
309 | } | |
310 | } | |
311 | ||
312 | static void update_pcm1796_mute(struct oxygen *chip) | |
313 | { | |
70c27d34 | 314 | struct xonar_data *data = chip->model_data; |
bbbfb552 CL |
315 | unsigned int i; |
316 | u8 value; | |
317 | ||
318 | value = PCM1796_DMF_DISABLED | PCM1796_FMT_24_LJUST | PCM1796_ATLD; | |
319 | if (chip->dac_mute) | |
320 | value |= PCM1796_MUTE; | |
70c27d34 | 321 | for (i = 0; i < data->dacs; ++i) |
bbbfb552 CL |
322 | pcm1796_write(chip, i, 18, value); |
323 | } | |
324 | ||
75146fc0 | 325 | static void pcm1796_init(struct oxygen *chip) |
1b8ff22f | 326 | { |
af9af174 | 327 | struct xonar_data *data = chip->model_data; |
1b8ff22f CL |
328 | unsigned int i; |
329 | ||
70c27d34 | 330 | for (i = 0; i < data->dacs; ++i) { |
878ac3ee | 331 | pcm1796_write(chip, i, 19, PCM1796_FLT_SHARP | PCM1796_ATS_1); |
e58aee95 | 332 | pcm1796_write(chip, i, 20, data->pcm1796_oversampling); |
878ac3ee | 333 | pcm1796_write(chip, i, 21, 0); |
1b8ff22f | 334 | } |
bbbfb552 CL |
335 | update_pcm1796_mute(chip); /* set ATLD before ATL/ATR */ |
336 | update_pcm1796_volume(chip); | |
75146fc0 CL |
337 | } |
338 | ||
339 | static void xonar_d2_init(struct oxygen *chip) | |
340 | { | |
341 | struct xonar_data *data = chip->model_data; | |
342 | ||
343 | data->anti_pop_delay = 300; | |
344 | data->output_enable_bit = GPIO_D2_OUTPUT_ENABLE; | |
345 | data->pcm1796_oversampling = PCM1796_OS_64; | |
fe10662c CL |
346 | if (data->model == MODEL_D2X) { |
347 | data->ext_power_reg = OXYGEN_GPIO_DATA; | |
348 | data->ext_power_int_reg = OXYGEN_GPIO_INTERRUPT_MASK; | |
349 | data->ext_power_bit = GPIO_D2X_EXT_POWER; | |
350 | oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, | |
351 | GPIO_D2X_EXT_POWER); | |
352 | } | |
75146fc0 CL |
353 | |
354 | pcm1796_init(chip); | |
1b8ff22f | 355 | |
af9af174 CL |
356 | oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2_ALT); |
357 | oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_D2_ALT); | |
358 | ||
359 | xonar_common_init(chip); | |
1b8ff22f CL |
360 | |
361 | snd_component_add(chip->card, "PCM1796"); | |
362 | snd_component_add(chip->card, "CS5381"); | |
363 | } | |
364 | ||
bbbfb552 CL |
365 | static void update_cs4362a_volumes(struct oxygen *chip) |
366 | { | |
367 | u8 mute; | |
368 | ||
369 | mute = chip->dac_mute ? CS4362A_MUTE : 0; | |
370 | cs4362a_write(chip, 7, (127 - chip->dac_volume[2]) | mute); | |
371 | cs4362a_write(chip, 8, (127 - chip->dac_volume[3]) | mute); | |
372 | cs4362a_write(chip, 10, (127 - chip->dac_volume[4]) | mute); | |
373 | cs4362a_write(chip, 11, (127 - chip->dac_volume[5]) | mute); | |
374 | cs4362a_write(chip, 13, (127 - chip->dac_volume[6]) | mute); | |
375 | cs4362a_write(chip, 14, (127 - chip->dac_volume[7]) | mute); | |
376 | } | |
377 | ||
378 | static void update_cs43xx_volume(struct oxygen *chip) | |
379 | { | |
380 | cs4398_write(chip, 5, (127 - chip->dac_volume[0]) * 2); | |
381 | cs4398_write(chip, 6, (127 - chip->dac_volume[1]) * 2); | |
382 | update_cs4362a_volumes(chip); | |
383 | } | |
384 | ||
385 | static void update_cs43xx_mute(struct oxygen *chip) | |
386 | { | |
387 | u8 reg; | |
388 | ||
389 | reg = CS4398_MUTEP_LOW | CS4398_PAMUTE; | |
390 | if (chip->dac_mute) | |
391 | reg |= CS4398_MUTE_B | CS4398_MUTE_A; | |
392 | cs4398_write(chip, 4, reg); | |
393 | update_cs4362a_volumes(chip); | |
394 | } | |
395 | ||
75146fc0 | 396 | static void cs43xx_init(struct oxygen *chip) |
a9d3cc48 CL |
397 | { |
398 | struct xonar_data *data = chip->model_data; | |
a9d3cc48 | 399 | |
a9d3cc48 CL |
400 | /* set CPEN (control port mode) and power down */ |
401 | cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN); | |
402 | cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN); | |
403 | /* configure */ | |
e58aee95 | 404 | cs4398_write(chip, 2, data->cs4398_fm); |
a9d3cc48 | 405 | cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L); |
a9d3cc48 CL |
406 | cs4398_write(chip, 7, CS4398_RMP_DN | CS4398_RMP_UP | |
407 | CS4398_ZERO_CROSS | CS4398_SOFT_RAMP); | |
408 | cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST); | |
409 | cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE | | |
410 | CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP); | |
411 | cs4362a_write(chip, 0x04, CS4362A_RMP_DN | CS4362A_DEM_NONE); | |
412 | cs4362a_write(chip, 0x05, 0); | |
e58aee95 | 413 | cs4362a_write(chip, 0x06, data->cs4362a_fm); |
e58aee95 | 414 | cs4362a_write(chip, 0x09, data->cs4362a_fm); |
e58aee95 | 415 | cs4362a_write(chip, 0x0c, data->cs4362a_fm); |
bbbfb552 CL |
416 | update_cs43xx_volume(chip); |
417 | update_cs43xx_mute(chip); | |
a9d3cc48 CL |
418 | /* clear power down */ |
419 | cs4398_write(chip, 8, CS4398_CPEN); | |
420 | cs4362a_write(chip, 0x01, CS4362A_CPEN); | |
75146fc0 CL |
421 | } |
422 | ||
5430c72b | 423 | static void xonar_d1_init(struct oxygen *chip) |
75146fc0 CL |
424 | { |
425 | struct xonar_data *data = chip->model_data; | |
426 | ||
427 | data->anti_pop_delay = 800; | |
428 | data->output_enable_bit = GPIO_DX_OUTPUT_ENABLE; | |
75146fc0 CL |
429 | data->cs4398_fm = CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST; |
430 | data->cs4362a_fm = CS4362A_FM_SINGLE | | |
431 | CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L; | |
fe10662c CL |
432 | if (data->model == MODEL_DX) { |
433 | data->ext_power_reg = OXYGEN_GPI_DATA; | |
434 | data->ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK; | |
435 | data->ext_power_bit = GPI_DX_EXT_POWER; | |
436 | } | |
75146fc0 CL |
437 | |
438 | oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS, | |
439 | OXYGEN_2WIRE_LENGTH_8 | | |
440 | OXYGEN_2WIRE_INTERRUPT_MASK | | |
441 | OXYGEN_2WIRE_SPEED_FAST); | |
442 | ||
443 | cs43xx_init(chip); | |
a9d3cc48 CL |
444 | |
445 | oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, | |
a8bb1bad CL |
446 | GPIO_DX_FRONT_PANEL | GPIO_DX_INPUT_ROUTE); |
447 | oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, | |
448 | GPIO_DX_FRONT_PANEL | GPIO_DX_INPUT_ROUTE); | |
a9d3cc48 CL |
449 | |
450 | xonar_common_init(chip); | |
451 | ||
452 | snd_component_add(chip->card, "CS4398"); | |
453 | snd_component_add(chip->card, "CS4362A"); | |
454 | snd_component_add(chip->card, "CS5361"); | |
455 | } | |
456 | ||
7407a2e4 CL |
457 | static void xonar_hdav_init(struct oxygen *chip) |
458 | { | |
459 | struct xonar_data *data = chip->model_data; | |
460 | u8 param; | |
461 | ||
462 | oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS, | |
463 | OXYGEN_2WIRE_LENGTH_8 | | |
464 | OXYGEN_2WIRE_INTERRUPT_MASK | | |
465 | OXYGEN_2WIRE_SPEED_FAST); | |
466 | ||
467 | data->anti_pop_delay = 100; | |
468 | data->output_enable_bit = GPIO_DX_OUTPUT_ENABLE; | |
469 | data->ext_power_reg = OXYGEN_GPI_DATA; | |
470 | data->ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK; | |
471 | data->ext_power_bit = GPI_DX_EXT_POWER; | |
472 | data->pcm1796_oversampling = PCM1796_OS_64; | |
473 | ||
474 | pcm1796_init(chip); | |
475 | ||
476 | oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_DX_INPUT_ROUTE); | |
477 | oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_DX_INPUT_ROUTE); | |
478 | ||
479 | oxygen_reset_uart(chip); | |
480 | param = 0; | |
481 | hdmi_write_command(chip, 0x61, 1, ¶m); | |
482 | param = 1; | |
483 | hdmi_write_command(chip, 0x74, 1, ¶m); | |
484 | data->hdmi_params[1] = IEC958_AES3_CON_FS_48000; | |
485 | data->hdmi_params[4] = 1; | |
486 | hdmi_write_command(chip, 0x54, 5, data->hdmi_params); | |
487 | ||
488 | xonar_common_init(chip); | |
489 | ||
490 | snd_component_add(chip->card, "PCM1796"); | |
491 | snd_component_add(chip->card, "CS5381"); | |
492 | } | |
493 | ||
c2bc4ff5 | 494 | static void xonar_disable_output(struct oxygen *chip) |
1b8ff22f | 495 | { |
af9af174 CL |
496 | struct xonar_data *data = chip->model_data; |
497 | ||
498 | oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit); | |
1b8ff22f CL |
499 | } |
500 | ||
c2bc4ff5 CL |
501 | static void xonar_d2_cleanup(struct oxygen *chip) |
502 | { | |
503 | xonar_disable_output(chip); | |
504 | } | |
505 | ||
5430c72b | 506 | static void xonar_d1_cleanup(struct oxygen *chip) |
a9d3cc48 | 507 | { |
c2bc4ff5 | 508 | xonar_disable_output(chip); |
a9d3cc48 CL |
509 | cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN); |
510 | oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC); | |
511 | } | |
512 | ||
7407a2e4 CL |
513 | static void xonar_hdav_cleanup(struct oxygen *chip) |
514 | { | |
515 | u8 param = 0; | |
516 | ||
517 | hdmi_write_command(chip, 0x74, 1, ¶m); | |
518 | xonar_disable_output(chip); | |
519 | } | |
520 | ||
c2bc4ff5 CL |
521 | static void xonar_d2_suspend(struct oxygen *chip) |
522 | { | |
523 | xonar_d2_cleanup(chip); | |
524 | } | |
525 | ||
526 | static void xonar_d1_suspend(struct oxygen *chip) | |
527 | { | |
528 | xonar_d1_cleanup(chip); | |
529 | } | |
530 | ||
7407a2e4 CL |
531 | static void xonar_hdav_suspend(struct oxygen *chip) |
532 | { | |
533 | xonar_hdav_cleanup(chip); | |
534 | msleep(2); | |
535 | } | |
536 | ||
4a4bc53b CL |
537 | static void xonar_d2_resume(struct oxygen *chip) |
538 | { | |
539 | pcm1796_init(chip); | |
540 | xonar_enable_output(chip); | |
541 | } | |
542 | ||
5430c72b | 543 | static void xonar_d1_resume(struct oxygen *chip) |
4a4bc53b CL |
544 | { |
545 | cs43xx_init(chip); | |
546 | xonar_enable_output(chip); | |
547 | } | |
548 | ||
7407a2e4 CL |
549 | static void xonar_hdav_resume(struct oxygen *chip) |
550 | { | |
551 | struct xonar_data *data = chip->model_data; | |
552 | u8 param; | |
553 | ||
554 | oxygen_reset_uart(chip); | |
555 | param = 0; | |
556 | hdmi_write_command(chip, 0x61, 1, ¶m); | |
557 | param = 1; | |
558 | hdmi_write_command(chip, 0x74, 1, ¶m); | |
559 | hdmi_write_command(chip, 0x54, 5, data->hdmi_params); | |
560 | pcm1796_init(chip); | |
561 | xonar_enable_output(chip); | |
562 | } | |
563 | ||
564 | static void xonar_hdav_pcm_hardware_filter(unsigned int channel, | |
565 | struct snd_pcm_hardware *hardware) | |
566 | { | |
567 | if (channel == PCM_MULTICH) { | |
568 | hardware->rates = SNDRV_PCM_RATE_44100 | | |
569 | SNDRV_PCM_RATE_48000 | | |
570 | SNDRV_PCM_RATE_96000 | | |
571 | SNDRV_PCM_RATE_192000; | |
572 | hardware->rate_min = 44100; | |
573 | } | |
574 | } | |
575 | ||
1b8ff22f CL |
576 | static void set_pcm1796_params(struct oxygen *chip, |
577 | struct snd_pcm_hw_params *params) | |
578 | { | |
e58aee95 | 579 | struct xonar_data *data = chip->model_data; |
1b8ff22f | 580 | unsigned int i; |
1b8ff22f | 581 | |
e58aee95 CL |
582 | data->pcm1796_oversampling = |
583 | params_rate(params) >= 96000 ? PCM1796_OS_32 : PCM1796_OS_64; | |
70c27d34 | 584 | for (i = 0; i < data->dacs; ++i) |
e58aee95 | 585 | pcm1796_write(chip, i, 20, data->pcm1796_oversampling); |
1b8ff22f CL |
586 | } |
587 | ||
a694a6a0 | 588 | static void set_cs53x1_params(struct oxygen *chip, |
1b8ff22f CL |
589 | struct snd_pcm_hw_params *params) |
590 | { | |
591 | unsigned int value; | |
592 | ||
593 | if (params_rate(params) <= 54000) | |
a694a6a0 | 594 | value = GPIO_CS53x1_M_SINGLE; |
1b8ff22f | 595 | else if (params_rate(params) <= 108000) |
a694a6a0 | 596 | value = GPIO_CS53x1_M_DOUBLE; |
1b8ff22f | 597 | else |
a694a6a0 | 598 | value = GPIO_CS53x1_M_QUAD; |
878ac3ee | 599 | oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, |
a694a6a0 | 600 | value, GPIO_CS53x1_M_MASK); |
1b8ff22f CL |
601 | } |
602 | ||
a9d3cc48 CL |
603 | static void set_cs43xx_params(struct oxygen *chip, |
604 | struct snd_pcm_hw_params *params) | |
605 | { | |
e58aee95 | 606 | struct xonar_data *data = chip->model_data; |
a9d3cc48 | 607 | |
e58aee95 CL |
608 | data->cs4398_fm = CS4398_DEM_NONE | CS4398_DIF_LJUST; |
609 | data->cs4362a_fm = CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L; | |
a9d3cc48 | 610 | if (params_rate(params) <= 50000) { |
e58aee95 CL |
611 | data->cs4398_fm |= CS4398_FM_SINGLE; |
612 | data->cs4362a_fm |= CS4362A_FM_SINGLE; | |
a9d3cc48 | 613 | } else if (params_rate(params) <= 100000) { |
e58aee95 CL |
614 | data->cs4398_fm |= CS4398_FM_DOUBLE; |
615 | data->cs4362a_fm |= CS4362A_FM_DOUBLE; | |
a9d3cc48 | 616 | } else { |
e58aee95 CL |
617 | data->cs4398_fm |= CS4398_FM_QUAD; |
618 | data->cs4362a_fm |= CS4362A_FM_QUAD; | |
a9d3cc48 | 619 | } |
e58aee95 CL |
620 | cs4398_write(chip, 2, data->cs4398_fm); |
621 | cs4362a_write(chip, 0x06, data->cs4362a_fm); | |
622 | cs4362a_write(chip, 0x09, data->cs4362a_fm); | |
623 | cs4362a_write(chip, 0x0c, data->cs4362a_fm); | |
a9d3cc48 CL |
624 | } |
625 | ||
7407a2e4 CL |
626 | static void set_hdmi_params(struct oxygen *chip, |
627 | struct snd_pcm_hw_params *params) | |
628 | { | |
629 | struct xonar_data *data = chip->model_data; | |
630 | ||
631 | data->hdmi_params[0] = 0; /* 1 = non-audio */ | |
632 | switch (params_rate(params)) { | |
633 | case 44100: | |
634 | data->hdmi_params[1] = IEC958_AES3_CON_FS_44100; | |
635 | break; | |
636 | case 48000: | |
637 | data->hdmi_params[1] = IEC958_AES3_CON_FS_48000; | |
638 | break; | |
639 | default: /* 96000 */ | |
640 | data->hdmi_params[1] = IEC958_AES3_CON_FS_96000; | |
641 | break; | |
642 | case 192000: | |
643 | data->hdmi_params[1] = IEC958_AES3_CON_FS_192000; | |
644 | break; | |
645 | } | |
646 | data->hdmi_params[2] = params_channels(params) / 2 - 1; | |
647 | if (params_format(params) == SNDRV_PCM_FORMAT_S16_LE) | |
648 | data->hdmi_params[3] = 0; | |
649 | else | |
650 | data->hdmi_params[3] = 0xc0; | |
651 | data->hdmi_params[4] = 1; /* ? */ | |
652 | hdmi_write_command(chip, 0x54, 5, data->hdmi_params); | |
653 | } | |
654 | ||
655 | static void set_hdav_params(struct oxygen *chip, | |
656 | struct snd_pcm_hw_params *params) | |
657 | { | |
658 | set_pcm1796_params(chip, params); | |
659 | set_hdmi_params(chip, params); | |
660 | } | |
661 | ||
7c014159 CL |
662 | static void xonar_gpio_changed(struct oxygen *chip) |
663 | { | |
664 | struct xonar_data *data = chip->model_data; | |
665 | u8 has_power; | |
666 | ||
af9af174 CL |
667 | has_power = !!(oxygen_read8(chip, data->ext_power_reg) |
668 | & data->ext_power_bit); | |
7c014159 CL |
669 | if (has_power != data->has_power) { |
670 | data->has_power = has_power; | |
671 | if (has_power) { | |
672 | snd_printk(KERN_NOTICE "power restored\n"); | |
673 | } else { | |
674 | snd_printk(KERN_CRIT | |
675 | "Hey! Don't unplug the power cable!\n"); | |
676 | /* TODO: stop PCMs */ | |
677 | } | |
678 | } | |
679 | } | |
680 | ||
7407a2e4 CL |
681 | static void xonar_hdav_uart_input(struct oxygen *chip) |
682 | { | |
683 | if (chip->uart_input_count >= 2 && | |
684 | chip->uart_input[chip->uart_input_count - 2] == 'O' && | |
685 | chip->uart_input[chip->uart_input_count - 1] == 'K') { | |
45bf8101 | 686 | printk(KERN_DEBUG "message from Xonar HDAV HDMI chip received:\n"); |
7407a2e4 CL |
687 | print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, |
688 | chip->uart_input, chip->uart_input_count); | |
689 | chip->uart_input_count = 0; | |
690 | } | |
691 | } | |
692 | ||
c3f00739 CL |
693 | static int gpio_bit_switch_get(struct snd_kcontrol *ctl, |
694 | struct snd_ctl_elem_value *value) | |
1b8ff22f CL |
695 | { |
696 | struct oxygen *chip = ctl->private_data; | |
c3f00739 | 697 | u16 bit = ctl->private_value; |
1b8ff22f CL |
698 | |
699 | value->value.integer.value[0] = | |
c3f00739 | 700 | !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) & bit); |
1b8ff22f CL |
701 | return 0; |
702 | } | |
703 | ||
c3f00739 CL |
704 | static int gpio_bit_switch_put(struct snd_kcontrol *ctl, |
705 | struct snd_ctl_elem_value *value) | |
1b8ff22f CL |
706 | { |
707 | struct oxygen *chip = ctl->private_data; | |
c3f00739 | 708 | u16 bit = ctl->private_value; |
1b8ff22f CL |
709 | u16 old_bits, new_bits; |
710 | int changed; | |
711 | ||
712 | spin_lock_irq(&chip->reg_lock); | |
713 | old_bits = oxygen_read16(chip, OXYGEN_GPIO_DATA); | |
714 | if (value->value.integer.value[0]) | |
c3f00739 | 715 | new_bits = old_bits | bit; |
1b8ff22f | 716 | else |
c3f00739 | 717 | new_bits = old_bits & ~bit; |
1b8ff22f CL |
718 | changed = new_bits != old_bits; |
719 | if (changed) | |
720 | oxygen_write16(chip, OXYGEN_GPIO_DATA, new_bits); | |
721 | spin_unlock_irq(&chip->reg_lock); | |
722 | return changed; | |
723 | } | |
724 | ||
725 | static const struct snd_kcontrol_new alt_switch = { | |
726 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
727 | .name = "Analog Loopback Switch", | |
728 | .info = snd_ctl_boolean_mono_info, | |
c3f00739 CL |
729 | .get = gpio_bit_switch_get, |
730 | .put = gpio_bit_switch_put, | |
731 | .private_value = GPIO_D2_ALT, | |
1b8ff22f CL |
732 | }; |
733 | ||
a8bb1bad | 734 | static const struct snd_kcontrol_new front_panel_switch = { |
387fb6a2 | 735 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
a8bb1bad CL |
736 | .name = "Front Panel Switch", |
737 | .info = snd_ctl_boolean_mono_info, | |
c3f00739 CL |
738 | .get = gpio_bit_switch_get, |
739 | .put = gpio_bit_switch_put, | |
740 | .private_value = GPIO_DX_FRONT_PANEL, | |
387fb6a2 CL |
741 | }; |
742 | ||
c871c4a8 CL |
743 | static void xonar_line_mic_ac97_switch(struct oxygen *chip, |
744 | unsigned int reg, unsigned int mute) | |
11864b4b CL |
745 | { |
746 | if (reg == AC97_LINE) { | |
747 | spin_lock_irq(&chip->reg_lock); | |
748 | oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, | |
749 | mute ? GPIO_DX_INPUT_ROUTE : 0, | |
750 | GPIO_DX_INPUT_ROUTE); | |
751 | spin_unlock_irq(&chip->reg_lock); | |
752 | } | |
753 | } | |
754 | ||
1b8ff22f | 755 | static const DECLARE_TLV_DB_SCALE(pcm1796_db_scale, -12000, 50, 0); |
a9d3cc48 | 756 | static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -12700, 100, 0); |
1b8ff22f | 757 | |
af9af174 | 758 | static int xonar_d2_control_filter(struct snd_kcontrol_new *template) |
ccc80fb4 | 759 | { |
7e86c0e6 CL |
760 | if (!strncmp(template->name, "Master Playback ", 16)) |
761 | /* disable volume/mute because they would require SPI writes */ | |
762 | return 1; | |
4972a177 | 763 | if (!strncmp(template->name, "CD Capture ", 11)) |
911b499a | 764 | /* CD in is actually connected to the video in pin */ |
ccc80fb4 | 765 | template->private_value ^= AC97_CD ^ AC97_VIDEO; |
ccc80fb4 CL |
766 | return 0; |
767 | } | |
768 | ||
5430c72b | 769 | static int xonar_d1_control_filter(struct snd_kcontrol_new *template) |
a9d3cc48 | 770 | { |
4972a177 | 771 | if (!strncmp(template->name, "CD Capture ", 11)) |
a9d3cc48 | 772 | return 1; /* no CD input */ |
a9d3cc48 CL |
773 | return 0; |
774 | } | |
775 | ||
fe10662c | 776 | static int xonar_d2_mixer_init(struct oxygen *chip) |
1b8ff22f CL |
777 | { |
778 | return snd_ctl_add(chip->card, snd_ctl_new1(&alt_switch, chip)); | |
779 | } | |
780 | ||
5430c72b | 781 | static int xonar_d1_mixer_init(struct oxygen *chip) |
387fb6a2 | 782 | { |
a8bb1bad | 783 | return snd_ctl_add(chip->card, snd_ctl_new1(&front_panel_switch, chip)); |
387fb6a2 CL |
784 | } |
785 | ||
fe10662c CL |
786 | static int xonar_model_probe(struct oxygen *chip, unsigned long driver_data) |
787 | { | |
788 | static const char *const names[] = { | |
789 | [MODEL_D1] = "Xonar D1", | |
790 | [MODEL_DX] = "Xonar DX", | |
791 | [MODEL_D2] = "Xonar D2", | |
792 | [MODEL_D2X] = "Xonar D2X", | |
7407a2e4 CL |
793 | [MODEL_HDAV] = "Xonar HDAV1.3", |
794 | [MODEL_HDAV_H6] = "Xonar HDAV1.3+H6", | |
fe10662c | 795 | }; |
70c27d34 CL |
796 | static const u8 dacs[] = { |
797 | [MODEL_D1] = 2, | |
798 | [MODEL_DX] = 2, | |
799 | [MODEL_D2] = 4, | |
800 | [MODEL_D2X] = 4, | |
7407a2e4 CL |
801 | [MODEL_HDAV] = 1, |
802 | [MODEL_HDAV_H6] = 4, | |
70c27d34 | 803 | }; |
fe10662c CL |
804 | struct xonar_data *data = chip->model_data; |
805 | ||
806 | data->model = driver_data; | |
7407a2e4 CL |
807 | if (data->model == MODEL_HDAV) { |
808 | oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, | |
809 | GPIO_HDAV_DB_MASK); | |
810 | switch (oxygen_read16(chip, OXYGEN_GPIO_DATA) & | |
811 | GPIO_HDAV_DB_MASK) { | |
812 | case GPIO_HDAV_DB_H6: | |
813 | data->model = MODEL_HDAV_H6; | |
814 | break; | |
815 | case GPIO_HDAV_DB_XX: | |
816 | snd_printk(KERN_ERR "unknown daughterboard\n"); | |
817 | return -ENODEV; | |
818 | } | |
819 | } | |
70c27d34 CL |
820 | |
821 | data->dacs = dacs[data->model]; | |
fe10662c CL |
822 | chip->model.shortname = names[data->model]; |
823 | return 0; | |
824 | } | |
825 | ||
826 | static const struct oxygen_model model_xonar_d2 = { | |
827 | .longname = "Asus Virtuoso 200", | |
828 | .chip = "AV200", | |
829 | .owner = THIS_MODULE, | |
830 | .probe = xonar_model_probe, | |
831 | .init = xonar_d2_init, | |
832 | .control_filter = xonar_d2_control_filter, | |
833 | .mixer_init = xonar_d2_mixer_init, | |
c2bc4ff5 CL |
834 | .cleanup = xonar_d2_cleanup, |
835 | .suspend = xonar_d2_suspend, | |
fe10662c CL |
836 | .resume = xonar_d2_resume, |
837 | .set_dac_params = set_pcm1796_params, | |
838 | .set_adc_params = set_cs53x1_params, | |
839 | .update_dac_volume = update_pcm1796_volume, | |
840 | .update_dac_mute = update_pcm1796_mute, | |
841 | .dac_tlv = pcm1796_db_scale, | |
842 | .model_data_size = sizeof(struct xonar_data), | |
d76596b1 CL |
843 | .device_config = PLAYBACK_0_TO_I2S | |
844 | PLAYBACK_1_TO_SPDIF | | |
845 | CAPTURE_0_FROM_I2S_2 | | |
dbbbd674 CL |
846 | CAPTURE_1_FROM_SPDIF | |
847 | MIDI_OUTPUT | | |
848 | MIDI_INPUT, | |
fe10662c CL |
849 | .dac_channels = 8, |
850 | .dac_volume_min = 0x0f, | |
851 | .dac_volume_max = 0xff, | |
852 | .misc_flags = OXYGEN_MISC_MIDI, | |
7e86c0e6 CL |
853 | .function_flags = OXYGEN_FUNCTION_SPI, |
854 | .dac_i2s_format = OXYGEN_I2S_FORMAT_I2S, | |
fe10662c CL |
855 | .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, |
856 | }; | |
857 | ||
858 | static const struct oxygen_model model_xonar_d1 = { | |
859 | .longname = "Asus Virtuoso 100", | |
860 | .chip = "AV200", | |
861 | .owner = THIS_MODULE, | |
862 | .probe = xonar_model_probe, | |
863 | .init = xonar_d1_init, | |
864 | .control_filter = xonar_d1_control_filter, | |
865 | .mixer_init = xonar_d1_mixer_init, | |
866 | .cleanup = xonar_d1_cleanup, | |
c2bc4ff5 | 867 | .suspend = xonar_d1_suspend, |
fe10662c CL |
868 | .resume = xonar_d1_resume, |
869 | .set_dac_params = set_cs43xx_params, | |
870 | .set_adc_params = set_cs53x1_params, | |
871 | .update_dac_volume = update_cs43xx_volume, | |
872 | .update_dac_mute = update_cs43xx_mute, | |
c871c4a8 | 873 | .ac97_switch = xonar_line_mic_ac97_switch, |
fe10662c CL |
874 | .dac_tlv = cs4362a_db_scale, |
875 | .model_data_size = sizeof(struct xonar_data), | |
d76596b1 CL |
876 | .device_config = PLAYBACK_0_TO_I2S | |
877 | PLAYBACK_1_TO_SPDIF | | |
878 | CAPTURE_0_FROM_I2S_2, | |
fe10662c CL |
879 | .dac_channels = 8, |
880 | .dac_volume_min = 0, | |
881 | .dac_volume_max = 127, | |
882 | .function_flags = OXYGEN_FUNCTION_2WIRE, | |
883 | .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST, | |
884 | .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, | |
1b8ff22f CL |
885 | }; |
886 | ||
7407a2e4 CL |
887 | static const struct oxygen_model model_xonar_hdav = { |
888 | .longname = "Asus Virtuoso 200", | |
889 | .chip = "AV200", | |
890 | .owner = THIS_MODULE, | |
891 | .probe = xonar_model_probe, | |
892 | .init = xonar_hdav_init, | |
893 | .cleanup = xonar_hdav_cleanup, | |
894 | .suspend = xonar_hdav_suspend, | |
895 | .resume = xonar_hdav_resume, | |
896 | .pcm_hardware_filter = xonar_hdav_pcm_hardware_filter, | |
897 | .set_dac_params = set_hdav_params, | |
898 | .set_adc_params = set_cs53x1_params, | |
899 | .update_dac_volume = update_pcm1796_volume, | |
900 | .update_dac_mute = update_pcm1796_mute, | |
901 | .uart_input = xonar_hdav_uart_input, | |
902 | .ac97_switch = xonar_line_mic_ac97_switch, | |
903 | .dac_tlv = pcm1796_db_scale, | |
904 | .model_data_size = sizeof(struct xonar_data), | |
905 | .device_config = PLAYBACK_0_TO_I2S | | |
906 | PLAYBACK_1_TO_SPDIF | | |
907 | CAPTURE_0_FROM_I2S_2, | |
908 | .dac_channels = 8, | |
909 | .dac_volume_min = 0x0f, | |
910 | .dac_volume_max = 0xff, | |
22c73378 | 911 | .misc_flags = OXYGEN_MISC_MIDI, |
7407a2e4 CL |
912 | .function_flags = OXYGEN_FUNCTION_2WIRE, |
913 | .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST, | |
914 | .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, | |
915 | }; | |
916 | ||
1b8ff22f CL |
917 | static int __devinit xonar_probe(struct pci_dev *pci, |
918 | const struct pci_device_id *pci_id) | |
919 | { | |
fe10662c CL |
920 | static const struct oxygen_model *const models[] = { |
921 | [MODEL_D1] = &model_xonar_d1, | |
922 | [MODEL_DX] = &model_xonar_d1, | |
923 | [MODEL_D2] = &model_xonar_d2, | |
924 | [MODEL_D2X] = &model_xonar_d2, | |
7407a2e4 | 925 | [MODEL_HDAV] = &model_xonar_hdav, |
fe10662c | 926 | }; |
1b8ff22f CL |
927 | static int dev; |
928 | int err; | |
929 | ||
930 | if (dev >= SNDRV_CARDS) | |
931 | return -ENODEV; | |
932 | if (!enable[dev]) { | |
933 | ++dev; | |
934 | return -ENOENT; | |
935 | } | |
fe10662c | 936 | BUG_ON(pci_id->driver_data >= ARRAY_SIZE(models)); |
271ebfca | 937 | err = oxygen_pci_probe(pci, index[dev], id[dev], |
fe10662c CL |
938 | models[pci_id->driver_data], |
939 | pci_id->driver_data); | |
1b8ff22f CL |
940 | if (err >= 0) |
941 | ++dev; | |
942 | return err; | |
943 | } | |
944 | ||
945 | static struct pci_driver xonar_driver = { | |
946 | .name = "AV200", | |
947 | .id_table = xonar_ids, | |
948 | .probe = xonar_probe, | |
949 | .remove = __devexit_p(oxygen_pci_remove), | |
4a4bc53b CL |
950 | #ifdef CONFIG_PM |
951 | .suspend = oxygen_pci_suspend, | |
952 | .resume = oxygen_pci_resume, | |
953 | #endif | |
1b8ff22f CL |
954 | }; |
955 | ||
956 | static int __init alsa_card_xonar_init(void) | |
957 | { | |
958 | return pci_register_driver(&xonar_driver); | |
959 | } | |
960 | ||
961 | static void __exit alsa_card_xonar_exit(void) | |
962 | { | |
963 | pci_unregister_driver(&xonar_driver); | |
964 | } | |
965 | ||
966 | module_init(alsa_card_xonar_init) | |
967 | module_exit(alsa_card_xonar_exit) |