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7614a55e 1// SPDX-License-Identifier: GPL-2.0-only
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2/*
3 * Driver for SiS7019 Audio Accelerator
4 *
5 * Copyright (C) 2004-2007, David Dillow
6 * Written by David Dillow <dave@thedillows.org>
7 * Inspired by the Trident 4D-WaveDX/NX driver.
8 *
9 * All rights reserved.
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10 */
11
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12#include <linux/init.h>
13#include <linux/pci.h>
14#include <linux/time.h>
5a0e3ad6 15#include <linux/slab.h>
65a77217 16#include <linux/module.h>
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17#include <linux/interrupt.h>
18#include <linux/delay.h>
19#include <sound/core.h>
20#include <sound/ac97_codec.h>
21#include <sound/initval.h>
22#include "sis7019.h"
23
24MODULE_AUTHOR("David Dillow <dave@thedillows.org>");
25MODULE_DESCRIPTION("SiS7019");
26MODULE_LICENSE("GPL");
27MODULE_SUPPORTED_DEVICE("{{SiS,SiS7019 Audio Accelerator}}");
28
29static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
30static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
a67ff6a5 31static bool enable = 1;
fc084e0b 32static int codecs = 1;
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33
34module_param(index, int, 0444);
35MODULE_PARM_DESC(index, "Index value for SiS7019 Audio Accelerator.");
36module_param(id, charp, 0444);
37MODULE_PARM_DESC(id, "ID string for SiS7019 Audio Accelerator.");
38module_param(enable, bool, 0444);
39MODULE_PARM_DESC(enable, "Enable SiS7019 Audio Accelerator.");
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40module_param(codecs, int, 0444);
41MODULE_PARM_DESC(codecs, "Set bit to indicate that codec number is expected to be present (default 1)");
175859bf 42
9baa3c34 43static const struct pci_device_id snd_sis7019_ids[] = {
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44 { PCI_DEVICE(PCI_VENDOR_ID_SI, 0x7019) },
45 { 0, }
46};
47
48MODULE_DEVICE_TABLE(pci, snd_sis7019_ids);
49
50/* There are three timing modes for the voices.
51 *
52 * For both playback and capture, when the buffer is one or two periods long,
53 * we use the hardware's built-in Mid-Loop Interrupt and End-Loop Interrupt
54 * to let us know when the periods have ended.
55 *
56 * When performing playback with more than two periods per buffer, we set
57 * the "Stop Sample Offset" and tell the hardware to interrupt us when we
58 * reach it. We then update the offset and continue on until we are
59 * interrupted for the next period.
60 *
61 * Capture channels do not have a SSO, so we allocate a playback channel to
62 * use as a timer for the capture periods. We use the SSO on the playback
63 * channel to clock out virtual periods, and adjust the virtual period length
64 * to maintain synchronization. This algorithm came from the Trident driver.
65 *
66 * FIXME: It'd be nice to make use of some of the synth features in the
67 * hardware, but a woeful lack of documentation is a significant roadblock.
68 */
69struct voice {
70 u16 flags;
71#define VOICE_IN_USE 1
72#define VOICE_CAPTURE 2
73#define VOICE_SSO_TIMING 4
74#define VOICE_SYNC_TIMING 8
75 u16 sync_cso;
76 u16 period_size;
77 u16 buffer_size;
78 u16 sync_period_size;
79 u16 sync_buffer_size;
80 u32 sso;
81 u32 vperiod;
82 struct snd_pcm_substream *substream;
83 struct voice *timing;
84 void __iomem *ctrl_base;
85 void __iomem *wave_base;
86 void __iomem *sync_base;
87 int num;
88};
89
90/* We need four pages to store our wave parameters during a suspend. If
91 * we're not doing power management, we still need to allocate a page
92 * for the silence buffer.
93 */
c7561cd8 94#ifdef CONFIG_PM_SLEEP
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95#define SIS_SUSPEND_PAGES 4
96#else
97#define SIS_SUSPEND_PAGES 1
98#endif
99
100struct sis7019 {
101 unsigned long ioport;
102 void __iomem *ioaddr;
103 int irq;
104 int codecs_present;
105
106 struct pci_dev *pci;
107 struct snd_pcm *pcm;
108 struct snd_card *card;
109 struct snd_ac97 *ac97[3];
110
111 /* Protect against more than one thread hitting the AC97
112 * registers (in a more polite manner than pounding the hardware
113 * semaphore)
114 */
115 struct mutex ac97_mutex;
116
117 /* voice_lock protects allocation/freeing of the voice descriptions
118 */
119 spinlock_t voice_lock;
120
121 struct voice voices[64];
122 struct voice capture_voice;
123
124 /* Allocate pages to store the internal wave state during
125 * suspends. When we're operating, this can be used as a silence
126 * buffer for a timing channel.
127 */
128 void *suspend_state[SIS_SUSPEND_PAGES];
129
130 int silence_users;
131 dma_addr_t silence_dma_addr;
132};
133
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134/* These values are also used by the module param 'codecs' to indicate
135 * which codecs should be present.
136 */
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137#define SIS_PRIMARY_CODEC_PRESENT 0x0001
138#define SIS_SECONDARY_CODEC_PRESENT 0x0002
139#define SIS_TERTIARY_CODEC_PRESENT 0x0004
140
141/* The HW offset parameters (Loop End, Stop Sample, End Sample) have a
142 * documented range of 8-0xfff8 samples. Given that they are 0-based,
143 * that places our period/buffer range at 9-0xfff9 samples. That makes the
144 * max buffer size 0xfff9 samples * 2 channels * 2 bytes per sample, and
145 * max samples / min samples gives us the max periods in a buffer.
146 *
147 * We'll add a constraint upon open that limits the period and buffer sample
148 * size to values that are legal for the hardware.
149 */
dee49895 150static const struct snd_pcm_hardware sis_playback_hw_info = {
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151 .info = (SNDRV_PCM_INFO_MMAP |
152 SNDRV_PCM_INFO_MMAP_VALID |
153 SNDRV_PCM_INFO_INTERLEAVED |
154 SNDRV_PCM_INFO_BLOCK_TRANSFER |
155 SNDRV_PCM_INFO_SYNC_START |
156 SNDRV_PCM_INFO_RESUME),
157 .formats = (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
158 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE),
159 .rates = SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_CONTINUOUS,
160 .rate_min = 4000,
161 .rate_max = 48000,
162 .channels_min = 1,
163 .channels_max = 2,
164 .buffer_bytes_max = (0xfff9 * 4),
165 .period_bytes_min = 9,
166 .period_bytes_max = (0xfff9 * 4),
167 .periods_min = 1,
168 .periods_max = (0xfff9 / 9),
169};
170
dee49895 171static const struct snd_pcm_hardware sis_capture_hw_info = {
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172 .info = (SNDRV_PCM_INFO_MMAP |
173 SNDRV_PCM_INFO_MMAP_VALID |
174 SNDRV_PCM_INFO_INTERLEAVED |
175 SNDRV_PCM_INFO_BLOCK_TRANSFER |
176 SNDRV_PCM_INFO_SYNC_START |
177 SNDRV_PCM_INFO_RESUME),
178 .formats = (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
179 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE),
180 .rates = SNDRV_PCM_RATE_48000,
181 .rate_min = 4000,
182 .rate_max = 48000,
183 .channels_min = 1,
184 .channels_max = 2,
185 .buffer_bytes_max = (0xfff9 * 4),
186 .period_bytes_min = 9,
187 .period_bytes_max = (0xfff9 * 4),
188 .periods_min = 1,
189 .periods_max = (0xfff9 / 9),
190};
191
192static void sis_update_sso(struct voice *voice, u16 period)
193{
194 void __iomem *base = voice->ctrl_base;
195
196 voice->sso += period;
197 if (voice->sso >= voice->buffer_size)
198 voice->sso -= voice->buffer_size;
199
200 /* Enforce the documented hardware minimum offset */
201 if (voice->sso < 8)
202 voice->sso = 8;
203
204 /* The SSO is in the upper 16 bits of the register. */
205 writew(voice->sso & 0xffff, base + SIS_PLAY_DMA_SSO_ESO + 2);
206}
207
208static void sis_update_voice(struct voice *voice)
209{
210 if (voice->flags & VOICE_SSO_TIMING) {
211 sis_update_sso(voice, voice->period_size);
212 } else if (voice->flags & VOICE_SYNC_TIMING) {
213 int sync;
214
215 /* If we've not hit the end of the virtual period, update
216 * our records and keep going.
217 */
218 if (voice->vperiod > voice->period_size) {
219 voice->vperiod -= voice->period_size;
220 if (voice->vperiod < voice->period_size)
221 sis_update_sso(voice, voice->vperiod);
222 else
223 sis_update_sso(voice, voice->period_size);
224 return;
225 }
226
227 /* Calculate our relative offset between the target and
228 * the actual CSO value. Since we're operating in a loop,
229 * if the value is more than half way around, we can
230 * consider ourselves wrapped.
231 */
232 sync = voice->sync_cso;
233 sync -= readw(voice->sync_base + SIS_CAPTURE_DMA_FORMAT_CSO);
234 if (sync > (voice->sync_buffer_size / 2))
235 sync -= voice->sync_buffer_size;
236
237 /* If sync is positive, then we interrupted too early, and
238 * we'll need to come back in a few samples and try again.
239 * There's a minimum wait, as it takes some time for the DMA
240 * engine to startup, etc...
241 */
242 if (sync > 0) {
243 if (sync < 16)
244 sync = 16;
245 sis_update_sso(voice, sync);
246 return;
247 }
248
249 /* Ok, we interrupted right on time, or (hopefully) just
250 * a bit late. We'll adjst our next waiting period based
251 * on how close we got.
252 *
253 * We need to stay just behind the actual channel to ensure
254 * it really is past a period when we get our interrupt --
255 * otherwise we'll fall into the early code above and have
256 * a minimum wait time, which makes us quite late here,
257 * eating into the user's time to refresh the buffer, esp.
258 * if using small periods.
259 *
260 * If we're less than 9 samples behind, we're on target.
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261 * Otherwise, shorten the next vperiod by the amount we've
262 * been delayed.
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263 */
264 if (sync > -9)
265 voice->vperiod = voice->sync_period_size + 1;
266 else
3a3d5fd1 267 voice->vperiod = voice->sync_period_size + sync + 10;
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268
269 if (voice->vperiod < voice->buffer_size) {
270 sis_update_sso(voice, voice->vperiod);
271 voice->vperiod = 0;
272 } else
273 sis_update_sso(voice, voice->period_size);
274
275 sync = voice->sync_cso + voice->sync_period_size;
276 if (sync >= voice->sync_buffer_size)
277 sync -= voice->sync_buffer_size;
278 voice->sync_cso = sync;
279 }
280
281 snd_pcm_period_elapsed(voice->substream);
282}
283
284static void sis_voice_irq(u32 status, struct voice *voice)
285{
286 int bit;
287
288 while (status) {
289 bit = __ffs(status);
290 status >>= bit + 1;
291 voice += bit;
292 sis_update_voice(voice);
293 voice++;
294 }
295}
296
297static irqreturn_t sis_interrupt(int irq, void *dev)
298{
299 struct sis7019 *sis = dev;
300 unsigned long io = sis->ioport;
301 struct voice *voice;
302 u32 intr, status;
303
304 /* We only use the DMA interrupts, and we don't enable any other
25985edc 305 * source of interrupts. But, it is possible to see an interrupt
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306 * status that didn't actually interrupt us, so eliminate anything
307 * we're not expecting to avoid falsely claiming an IRQ, and an
308 * ensuing endless loop.
309 */
310 intr = inl(io + SIS_GISR);
311 intr &= SIS_GISR_AUDIO_PLAY_DMA_IRQ_STATUS |
312 SIS_GISR_AUDIO_RECORD_DMA_IRQ_STATUS;
313 if (!intr)
314 return IRQ_NONE;
315
316 do {
317 status = inl(io + SIS_PISR_A);
318 if (status) {
319 sis_voice_irq(status, sis->voices);
320 outl(status, io + SIS_PISR_A);
321 }
322
323 status = inl(io + SIS_PISR_B);
324 if (status) {
325 sis_voice_irq(status, &sis->voices[32]);
326 outl(status, io + SIS_PISR_B);
327 }
328
329 status = inl(io + SIS_RISR);
330 if (status) {
331 voice = &sis->capture_voice;
332 if (!voice->timing)
333 snd_pcm_period_elapsed(voice->substream);
334
335 outl(status, io + SIS_RISR);
336 }
337
338 outl(intr, io + SIS_GISR);
339 intr = inl(io + SIS_GISR);
340 intr &= SIS_GISR_AUDIO_PLAY_DMA_IRQ_STATUS |
341 SIS_GISR_AUDIO_RECORD_DMA_IRQ_STATUS;
342 } while (intr);
343
344 return IRQ_HANDLED;
345}
346
347static u32 sis_rate_to_delta(unsigned int rate)
348{
349 u32 delta;
350
351 /* This was copied from the trident driver, but it seems its gotten
352 * around a bit... nevertheless, it works well.
353 *
354 * We special case 44100 and 8000 since rounding with the equation
355 * does not give us an accurate enough value. For 11025 and 22050
356 * the equation gives us the best answer. All other frequencies will
357 * also use the equation. JDW
358 */
359 if (rate == 44100)
360 delta = 0xeb3;
361 else if (rate == 8000)
362 delta = 0x2ab;
363 else if (rate == 48000)
364 delta = 0x1000;
365 else
366 delta = (((rate << 12) + 24000) / 48000) & 0x0000ffff;
367 return delta;
368}
369
370static void __sis_map_silence(struct sis7019 *sis)
371{
372 /* Helper function: must hold sis->voice_lock on entry */
373 if (!sis->silence_users)
412b979c 374 sis->silence_dma_addr = dma_map_single(&sis->pci->dev,
175859bf 375 sis->suspend_state[0],
412b979c 376 4096, DMA_TO_DEVICE);
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377 sis->silence_users++;
378}
379
380static void __sis_unmap_silence(struct sis7019 *sis)
381{
382 /* Helper function: must hold sis->voice_lock on entry */
383 sis->silence_users--;
384 if (!sis->silence_users)
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385 dma_unmap_single(&sis->pci->dev, sis->silence_dma_addr, 4096,
386 DMA_TO_DEVICE);
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387}
388
389static void sis_free_voice(struct sis7019 *sis, struct voice *voice)
390{
391 unsigned long flags;
392
393 spin_lock_irqsave(&sis->voice_lock, flags);
394 if (voice->timing) {
395 __sis_unmap_silence(sis);
396 voice->timing->flags &= ~(VOICE_IN_USE | VOICE_SSO_TIMING |
397 VOICE_SYNC_TIMING);
398 voice->timing = NULL;
399 }
400 voice->flags &= ~(VOICE_IN_USE | VOICE_SSO_TIMING | VOICE_SYNC_TIMING);
401 spin_unlock_irqrestore(&sis->voice_lock, flags);
402}
403
404static struct voice *__sis_alloc_playback_voice(struct sis7019 *sis)
405{
406 /* Must hold the voice_lock on entry */
407 struct voice *voice;
408 int i;
409
410 for (i = 0; i < 64; i++) {
411 voice = &sis->voices[i];
412 if (voice->flags & VOICE_IN_USE)
413 continue;
414 voice->flags |= VOICE_IN_USE;
415 goto found_one;
416 }
417 voice = NULL;
418
419found_one:
420 return voice;
421}
422
423static struct voice *sis_alloc_playback_voice(struct sis7019 *sis)
424{
425 struct voice *voice;
426 unsigned long flags;
427
428 spin_lock_irqsave(&sis->voice_lock, flags);
429 voice = __sis_alloc_playback_voice(sis);
430 spin_unlock_irqrestore(&sis->voice_lock, flags);
431
432 return voice;
433}
434
435static int sis_alloc_timing_voice(struct snd_pcm_substream *substream,
436 struct snd_pcm_hw_params *hw_params)
437{
438 struct sis7019 *sis = snd_pcm_substream_chip(substream);
439 struct snd_pcm_runtime *runtime = substream->runtime;
440 struct voice *voice = runtime->private_data;
441 unsigned int period_size, buffer_size;
442 unsigned long flags;
443 int needed;
444
445 /* If there are one or two periods per buffer, we don't need a
446 * timing voice, as we can use the capture channel's interrupts
447 * to clock out the periods.
448 */
449 period_size = params_period_size(hw_params);
450 buffer_size = params_buffer_size(hw_params);
451 needed = (period_size != buffer_size &&
452 period_size != (buffer_size / 2));
453
454 if (needed && !voice->timing) {
455 spin_lock_irqsave(&sis->voice_lock, flags);
456 voice->timing = __sis_alloc_playback_voice(sis);
457 if (voice->timing)
458 __sis_map_silence(sis);
459 spin_unlock_irqrestore(&sis->voice_lock, flags);
460 if (!voice->timing)
461 return -ENOMEM;
462 voice->timing->substream = substream;
463 } else if (!needed && voice->timing) {
464 sis_free_voice(sis, voice);
465 voice->timing = NULL;
466 }
467
468 return 0;
469}
470
471static int sis_playback_open(struct snd_pcm_substream *substream)
472{
473 struct sis7019 *sis = snd_pcm_substream_chip(substream);
474 struct snd_pcm_runtime *runtime = substream->runtime;
475 struct voice *voice;
476
477 voice = sis_alloc_playback_voice(sis);
478 if (!voice)
479 return -EAGAIN;
480
481 voice->substream = substream;
482 runtime->private_data = voice;
483 runtime->hw = sis_playback_hw_info;
484 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
485 9, 0xfff9);
486 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
487 9, 0xfff9);
488 snd_pcm_set_sync(substream);
489 return 0;
490}
491
492static int sis_substream_close(struct snd_pcm_substream *substream)
493{
494 struct sis7019 *sis = snd_pcm_substream_chip(substream);
495 struct snd_pcm_runtime *runtime = substream->runtime;
496 struct voice *voice = runtime->private_data;
497
498 sis_free_voice(sis, voice);
499 return 0;
500}
501
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502static int sis_pcm_playback_prepare(struct snd_pcm_substream *substream)
503{
504 struct snd_pcm_runtime *runtime = substream->runtime;
505 struct voice *voice = runtime->private_data;
506 void __iomem *ctrl_base = voice->ctrl_base;
507 void __iomem *wave_base = voice->wave_base;
508 u32 format, dma_addr, control, sso_eso, delta, reg;
509 u16 leo;
510
511 /* We rely on the PCM core to ensure that the parameters for this
512 * substream do not change on us while we're programming the HW.
513 */
514 format = 0;
515 if (snd_pcm_format_width(runtime->format) == 8)
516 format |= SIS_PLAY_DMA_FORMAT_8BIT;
517 if (!snd_pcm_format_signed(runtime->format))
518 format |= SIS_PLAY_DMA_FORMAT_UNSIGNED;
519 if (runtime->channels == 1)
520 format |= SIS_PLAY_DMA_FORMAT_MONO;
521
522 /* The baseline setup is for a single period per buffer, and
523 * we add bells and whistles as needed from there.
524 */
525 dma_addr = runtime->dma_addr;
526 leo = runtime->buffer_size - 1;
527 control = leo | SIS_PLAY_DMA_LOOP | SIS_PLAY_DMA_INTR_AT_LEO;
528 sso_eso = leo;
529
530 if (runtime->period_size == (runtime->buffer_size / 2)) {
531 control |= SIS_PLAY_DMA_INTR_AT_MLP;
532 } else if (runtime->period_size != runtime->buffer_size) {
533 voice->flags |= VOICE_SSO_TIMING;
534 voice->sso = runtime->period_size - 1;
535 voice->period_size = runtime->period_size;
536 voice->buffer_size = runtime->buffer_size;
537
538 control &= ~SIS_PLAY_DMA_INTR_AT_LEO;
539 control |= SIS_PLAY_DMA_INTR_AT_SSO;
540 sso_eso |= (runtime->period_size - 1) << 16;
541 }
542
543 delta = sis_rate_to_delta(runtime->rate);
544
545 /* Ok, we're ready to go, set up the channel.
546 */
547 writel(format, ctrl_base + SIS_PLAY_DMA_FORMAT_CSO);
548 writel(dma_addr, ctrl_base + SIS_PLAY_DMA_BASE);
549 writel(control, ctrl_base + SIS_PLAY_DMA_CONTROL);
550 writel(sso_eso, ctrl_base + SIS_PLAY_DMA_SSO_ESO);
551
552 for (reg = 0; reg < SIS_WAVE_SIZE; reg += 4)
553 writel(0, wave_base + reg);
554
555 writel(SIS_WAVE_GENERAL_WAVE_VOLUME, wave_base + SIS_WAVE_GENERAL);
556 writel(delta << 16, wave_base + SIS_WAVE_GENERAL_ARTICULATION);
557 writel(SIS_WAVE_CHANNEL_CONTROL_FIRST_SAMPLE |
558 SIS_WAVE_CHANNEL_CONTROL_AMP_ENABLE |
559 SIS_WAVE_CHANNEL_CONTROL_INTERPOLATE_ENABLE,
560 wave_base + SIS_WAVE_CHANNEL_CONTROL);
561
562 /* Force PCI writes to post. */
563 readl(ctrl_base);
564
565 return 0;
566}
567
568static int sis_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
569{
570 struct sis7019 *sis = snd_pcm_substream_chip(substream);
571 unsigned long io = sis->ioport;
572 struct snd_pcm_substream *s;
573 struct voice *voice;
574 void *chip;
575 int starting;
576 u32 record = 0;
577 u32 play[2] = { 0, 0 };
578
579 /* No locks needed, as the PCM core will hold the locks on the
580 * substreams, and the HW will only start/stop the indicated voices
581 * without changing the state of the others.
582 */
583 switch (cmd) {
584 case SNDRV_PCM_TRIGGER_START:
585 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
586 case SNDRV_PCM_TRIGGER_RESUME:
587 starting = 1;
588 break;
589 case SNDRV_PCM_TRIGGER_STOP:
590 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
591 case SNDRV_PCM_TRIGGER_SUSPEND:
592 starting = 0;
593 break;
594 default:
595 return -EINVAL;
596 }
597
598 snd_pcm_group_for_each_entry(s, substream) {
599 /* Make sure it is for us... */
600 chip = snd_pcm_substream_chip(s);
601 if (chip != sis)
602 continue;
603
604 voice = s->runtime->private_data;
605 if (voice->flags & VOICE_CAPTURE) {
606 record |= 1 << voice->num;
607 voice = voice->timing;
608 }
609
610 /* voice could be NULL if this a recording stream, and it
611 * doesn't have an external timing channel.
612 */
613 if (voice)
614 play[voice->num / 32] |= 1 << (voice->num & 0x1f);
615
616 snd_pcm_trigger_done(s, substream);
617 }
618
619 if (starting) {
620 if (record)
621 outl(record, io + SIS_RECORD_START_REG);
622 if (play[0])
623 outl(play[0], io + SIS_PLAY_START_A_REG);
624 if (play[1])
625 outl(play[1], io + SIS_PLAY_START_B_REG);
626 } else {
627 if (record)
628 outl(record, io + SIS_RECORD_STOP_REG);
629 if (play[0])
630 outl(play[0], io + SIS_PLAY_STOP_A_REG);
631 if (play[1])
632 outl(play[1], io + SIS_PLAY_STOP_B_REG);
633 }
634 return 0;
635}
636
637static snd_pcm_uframes_t sis_pcm_pointer(struct snd_pcm_substream *substream)
638{
639 struct snd_pcm_runtime *runtime = substream->runtime;
640 struct voice *voice = runtime->private_data;
641 u32 cso;
642
643 cso = readl(voice->ctrl_base + SIS_PLAY_DMA_FORMAT_CSO);
644 cso &= 0xffff;
645 return cso;
646}
647
648static int sis_capture_open(struct snd_pcm_substream *substream)
649{
650 struct sis7019 *sis = snd_pcm_substream_chip(substream);
651 struct snd_pcm_runtime *runtime = substream->runtime;
652 struct voice *voice = &sis->capture_voice;
653 unsigned long flags;
654
655 /* FIXME: The driver only supports recording from one channel
656 * at the moment, but it could support more.
657 */
658 spin_lock_irqsave(&sis->voice_lock, flags);
659 if (voice->flags & VOICE_IN_USE)
660 voice = NULL;
661 else
662 voice->flags |= VOICE_IN_USE;
663 spin_unlock_irqrestore(&sis->voice_lock, flags);
664
665 if (!voice)
666 return -EAGAIN;
667
668 voice->substream = substream;
669 runtime->private_data = voice;
670 runtime->hw = sis_capture_hw_info;
671 runtime->hw.rates = sis->ac97[0]->rates[AC97_RATES_ADC];
672 snd_pcm_limit_hw_rates(runtime);
673 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
674 9, 0xfff9);
675 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
676 9, 0xfff9);
677 snd_pcm_set_sync(substream);
678 return 0;
679}
680
681static int sis_capture_hw_params(struct snd_pcm_substream *substream,
682 struct snd_pcm_hw_params *hw_params)
683{
684 struct sis7019 *sis = snd_pcm_substream_chip(substream);
685 int rc;
686
687 rc = snd_ac97_set_rate(sis->ac97[0], AC97_PCM_LR_ADC_RATE,
688 params_rate(hw_params));
689 if (rc)
690 goto out;
691
175859bf
DD
692 rc = sis_alloc_timing_voice(substream, hw_params);
693
694out:
695 return rc;
696}
697
698static void sis_prepare_timing_voice(struct voice *voice,
699 struct snd_pcm_substream *substream)
700{
701 struct sis7019 *sis = snd_pcm_substream_chip(substream);
702 struct snd_pcm_runtime *runtime = substream->runtime;
703 struct voice *timing = voice->timing;
704 void __iomem *play_base = timing->ctrl_base;
705 void __iomem *wave_base = timing->wave_base;
706 u16 buffer_size, period_size;
707 u32 format, control, sso_eso, delta;
708 u32 vperiod, sso, reg;
709
710 /* Set our initial buffer and period as large as we can given a
711 * single page of silence.
712 */
713 buffer_size = 4096 / runtime->channels;
714 buffer_size /= snd_pcm_format_size(runtime->format, 1);
715 period_size = buffer_size;
716
717 /* Initially, we want to interrupt just a bit behind the end of
3a3d5fd1 718 * the period we're clocking out. 12 samples seems to give a good
175859bf
DD
719 * delay.
720 *
721 * We want to spread our interrupts throughout the virtual period,
722 * so that we don't end up with two interrupts back to back at the
723 * end -- this helps minimize the effects of any jitter. Adjust our
724 * clocking period size so that the last period is at least a fourth
725 * of a full period.
726 *
727 * This is all moot if we don't need to use virtual periods.
728 */
3a3d5fd1 729 vperiod = runtime->period_size + 12;
175859bf
DD
730 if (vperiod > period_size) {
731 u16 tail = vperiod % period_size;
732 u16 quarter_period = period_size / 4;
733
734 if (tail && tail < quarter_period) {
735 u16 loops = vperiod / period_size;
736
737 tail = quarter_period - tail;
738 tail += loops - 1;
739 tail /= loops;
740 period_size -= tail;
741 }
742
743 sso = period_size - 1;
744 } else {
745 /* The initial period will fit inside the buffer, so we
746 * don't need to use virtual periods -- disable them.
747 */
748 period_size = runtime->period_size;
749 sso = vperiod - 1;
750 vperiod = 0;
751 }
752
25985edc 753 /* The interrupt handler implements the timing synchronization, so
175859bf
DD
754 * setup its state.
755 */
756 timing->flags |= VOICE_SYNC_TIMING;
757 timing->sync_base = voice->ctrl_base;
3a3d5fd1 758 timing->sync_cso = runtime->period_size;
175859bf
DD
759 timing->sync_period_size = runtime->period_size;
760 timing->sync_buffer_size = runtime->buffer_size;
761 timing->period_size = period_size;
762 timing->buffer_size = buffer_size;
763 timing->sso = sso;
764 timing->vperiod = vperiod;
765
766 /* Using unsigned samples with the all-zero silence buffer
767 * forces the output to the lower rail, killing playback.
768 * So ignore unsigned vs signed -- it doesn't change the timing.
769 */
770 format = 0;
771 if (snd_pcm_format_width(runtime->format) == 8)
772 format = SIS_CAPTURE_DMA_FORMAT_8BIT;
773 if (runtime->channels == 1)
774 format |= SIS_CAPTURE_DMA_FORMAT_MONO;
775
776 control = timing->buffer_size - 1;
777 control |= SIS_PLAY_DMA_LOOP | SIS_PLAY_DMA_INTR_AT_SSO;
778 sso_eso = timing->buffer_size - 1;
779 sso_eso |= timing->sso << 16;
780
781 delta = sis_rate_to_delta(runtime->rate);
782
783 /* We've done the math, now configure the channel.
784 */
785 writel(format, play_base + SIS_PLAY_DMA_FORMAT_CSO);
786 writel(sis->silence_dma_addr, play_base + SIS_PLAY_DMA_BASE);
787 writel(control, play_base + SIS_PLAY_DMA_CONTROL);
788 writel(sso_eso, play_base + SIS_PLAY_DMA_SSO_ESO);
789
790 for (reg = 0; reg < SIS_WAVE_SIZE; reg += 4)
791 writel(0, wave_base + reg);
792
793 writel(SIS_WAVE_GENERAL_WAVE_VOLUME, wave_base + SIS_WAVE_GENERAL);
794 writel(delta << 16, wave_base + SIS_WAVE_GENERAL_ARTICULATION);
795 writel(SIS_WAVE_CHANNEL_CONTROL_FIRST_SAMPLE |
796 SIS_WAVE_CHANNEL_CONTROL_AMP_ENABLE |
797 SIS_WAVE_CHANNEL_CONTROL_INTERPOLATE_ENABLE,
798 wave_base + SIS_WAVE_CHANNEL_CONTROL);
799}
800
801static int sis_pcm_capture_prepare(struct snd_pcm_substream *substream)
802{
803 struct snd_pcm_runtime *runtime = substream->runtime;
804 struct voice *voice = runtime->private_data;
805 void __iomem *rec_base = voice->ctrl_base;
806 u32 format, dma_addr, control;
807 u16 leo;
808
809 /* We rely on the PCM core to ensure that the parameters for this
810 * substream do not change on us while we're programming the HW.
811 */
812 format = 0;
813 if (snd_pcm_format_width(runtime->format) == 8)
814 format = SIS_CAPTURE_DMA_FORMAT_8BIT;
815 if (!snd_pcm_format_signed(runtime->format))
816 format |= SIS_CAPTURE_DMA_FORMAT_UNSIGNED;
817 if (runtime->channels == 1)
818 format |= SIS_CAPTURE_DMA_FORMAT_MONO;
819
820 dma_addr = runtime->dma_addr;
821 leo = runtime->buffer_size - 1;
822 control = leo | SIS_CAPTURE_DMA_LOOP;
823
824 /* If we've got more than two periods per buffer, then we have
825 * use a timing voice to clock out the periods. Otherwise, we can
826 * use the capture channel's interrupts.
827 */
828 if (voice->timing) {
829 sis_prepare_timing_voice(voice, substream);
830 } else {
831 control |= SIS_CAPTURE_DMA_INTR_AT_LEO;
832 if (runtime->period_size != runtime->buffer_size)
833 control |= SIS_CAPTURE_DMA_INTR_AT_MLP;
834 }
835
836 writel(format, rec_base + SIS_CAPTURE_DMA_FORMAT_CSO);
837 writel(dma_addr, rec_base + SIS_CAPTURE_DMA_BASE);
838 writel(control, rec_base + SIS_CAPTURE_DMA_CONTROL);
839
840 /* Force the writes to post. */
841 readl(rec_base);
842
843 return 0;
844}
845
2aa0eae9 846static const struct snd_pcm_ops sis_playback_ops = {
175859bf
DD
847 .open = sis_playback_open,
848 .close = sis_substream_close,
175859bf
DD
849 .prepare = sis_pcm_playback_prepare,
850 .trigger = sis_pcm_trigger,
851 .pointer = sis_pcm_pointer,
852};
853
2aa0eae9 854static const struct snd_pcm_ops sis_capture_ops = {
175859bf
DD
855 .open = sis_capture_open,
856 .close = sis_substream_close,
175859bf 857 .hw_params = sis_capture_hw_params,
175859bf
DD
858 .prepare = sis_pcm_capture_prepare,
859 .trigger = sis_pcm_trigger,
860 .pointer = sis_pcm_pointer,
861};
862
e23e7a14 863static int sis_pcm_create(struct sis7019 *sis)
175859bf
DD
864{
865 struct snd_pcm *pcm;
866 int rc;
867
868 /* We have 64 voices, and the driver currently records from
869 * only one channel, though that could change in the future.
870 */
871 rc = snd_pcm_new(sis->card, "SiS7019", 0, 64, 1, &pcm);
872 if (rc)
873 return rc;
874
875 pcm->private_data = sis;
876 strcpy(pcm->name, "SiS7019");
877 sis->pcm = pcm;
878
879 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &sis_playback_ops);
880 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &sis_capture_ops);
881
882 /* Try to preallocate some memory, but it's not the end of the
883 * world if this fails.
884 */
ff3eb3d5
TI
885 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
886 &sis->pci->dev, 64*1024, 128*1024);
175859bf
DD
887
888 return 0;
889}
890
891static unsigned short sis_ac97_rw(struct sis7019 *sis, int codec, u32 cmd)
892{
893 unsigned long io = sis->ioport;
894 unsigned short val = 0xffff;
895 u16 status;
896 u16 rdy;
897 int count;
3f76d984 898 static const u16 codec_ready[3] = {
175859bf
DD
899 SIS_AC97_STATUS_CODEC_READY,
900 SIS_AC97_STATUS_CODEC2_READY,
901 SIS_AC97_STATUS_CODEC3_READY,
902 };
903
904 rdy = codec_ready[codec];
905
906
907 /* Get the AC97 semaphore -- software first, so we don't spin
908 * pounding out IO reads on the hardware semaphore...
909 */
910 mutex_lock(&sis->ac97_mutex);
911
912 count = 0xffff;
913 while ((inw(io + SIS_AC97_SEMA) & SIS_AC97_SEMA_BUSY) && --count)
914 udelay(1);
915
916 if (!count)
917 goto timeout;
918
919 /* ... and wait for any outstanding commands to complete ...
920 */
921 count = 0xffff;
922 do {
923 status = inw(io + SIS_AC97_STATUS);
924 if ((status & rdy) && !(status & SIS_AC97_STATUS_BUSY))
925 break;
926
927 udelay(1);
928 } while (--count);
929
930 if (!count)
931 goto timeout_sema;
932
933 /* ... before sending our command and waiting for it to finish ...
934 */
935 outl(cmd, io + SIS_AC97_CMD);
936 udelay(10);
937
938 count = 0xffff;
939 while ((inw(io + SIS_AC97_STATUS) & SIS_AC97_STATUS_BUSY) && --count)
940 udelay(1);
941
942 /* ... and reading the results (if any).
943 */
944 val = inl(io + SIS_AC97_CMD) >> 16;
945
946timeout_sema:
947 outl(SIS_AC97_SEMA_RELEASE, io + SIS_AC97_SEMA);
948timeout:
949 mutex_unlock(&sis->ac97_mutex);
950
951 if (!count) {
70597851 952 dev_err(&sis->pci->dev, "ac97 codec %d timeout cmd 0x%08x\n",
175859bf
DD
953 codec, cmd);
954 }
955
956 return val;
957}
958
959static void sis_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
960 unsigned short val)
961{
3f76d984 962 static const u32 cmd[3] = {
175859bf
DD
963 SIS_AC97_CMD_CODEC_WRITE,
964 SIS_AC97_CMD_CODEC2_WRITE,
965 SIS_AC97_CMD_CODEC3_WRITE,
966 };
967 sis_ac97_rw(ac97->private_data, ac97->num,
968 (val << 16) | (reg << 8) | cmd[ac97->num]);
969}
970
971static unsigned short sis_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
972{
3f76d984 973 static const u32 cmd[3] = {
175859bf
DD
974 SIS_AC97_CMD_CODEC_READ,
975 SIS_AC97_CMD_CODEC2_READ,
976 SIS_AC97_CMD_CODEC3_READ,
977 };
978 return sis_ac97_rw(ac97->private_data, ac97->num,
979 (reg << 8) | cmd[ac97->num]);
980}
981
e23e7a14 982static int sis_mixer_create(struct sis7019 *sis)
175859bf
DD
983{
984 struct snd_ac97_bus *bus;
985 struct snd_ac97_template ac97;
51055da5 986 static const struct snd_ac97_bus_ops ops = {
175859bf
DD
987 .write = sis_ac97_write,
988 .read = sis_ac97_read,
989 };
990 int rc;
991
992 memset(&ac97, 0, sizeof(ac97));
993 ac97.private_data = sis;
994
995 rc = snd_ac97_bus(sis->card, 0, &ops, NULL, &bus);
996 if (!rc && sis->codecs_present & SIS_PRIMARY_CODEC_PRESENT)
997 rc = snd_ac97_mixer(bus, &ac97, &sis->ac97[0]);
998 ac97.num = 1;
999 if (!rc && (sis->codecs_present & SIS_SECONDARY_CODEC_PRESENT))
1000 rc = snd_ac97_mixer(bus, &ac97, &sis->ac97[1]);
1001 ac97.num = 2;
1002 if (!rc && (sis->codecs_present & SIS_TERTIARY_CODEC_PRESENT))
1003 rc = snd_ac97_mixer(bus, &ac97, &sis->ac97[2]);
1004
1005 /* If we return an error here, then snd_card_free() should
1006 * free up any ac97 codecs that got created, as well as the bus.
1007 */
1008 return rc;
1009}
1010
1011static void sis_free_suspend(struct sis7019 *sis)
1012{
1013 int i;
1014
1015 for (i = 0; i < SIS_SUSPEND_PAGES; i++)
1016 kfree(sis->suspend_state[i]);
1017}
1018
1019static int sis_chip_free(struct sis7019 *sis)
1020{
1021 /* Reset the chip, and disable all interrputs.
1022 */
1023 outl(SIS_GCR_SOFTWARE_RESET, sis->ioport + SIS_GCR);
08b45098 1024 udelay(25);
175859bf
DD
1025 outl(0, sis->ioport + SIS_GCR);
1026 outl(0, sis->ioport + SIS_GIER);
1027
1028 /* Now, free everything we allocated.
1029 */
1030 if (sis->irq >= 0)
1031 free_irq(sis->irq, sis);
1032
ff6defa6 1033 iounmap(sis->ioaddr);
175859bf
DD
1034 pci_release_regions(sis->pci);
1035 pci_disable_device(sis->pci);
175859bf
DD
1036 sis_free_suspend(sis);
1037 return 0;
1038}
1039
1040static int sis_dev_free(struct snd_device *dev)
1041{
1042 struct sis7019 *sis = dev->device_data;
1043 return sis_chip_free(sis);
1044}
1045
1046static int sis_chip_init(struct sis7019 *sis)
1047{
1048 unsigned long io = sis->ioport;
1049 void __iomem *ioaddr = sis->ioaddr;
fc084e0b 1050 unsigned long timeout;
175859bf
DD
1051 u16 status;
1052 int count;
1053 int i;
1054
1055 /* Reset the audio controller
1056 */
1057 outl(SIS_GCR_SOFTWARE_RESET, io + SIS_GCR);
08b45098 1058 udelay(25);
175859bf
DD
1059 outl(0, io + SIS_GCR);
1060
1061 /* Get the AC-link semaphore, and reset the codecs
1062 */
1063 count = 0xffff;
1064 while ((inw(io + SIS_AC97_SEMA) & SIS_AC97_SEMA_BUSY) && --count)
1065 udelay(1);
1066
1067 if (!count)
1068 return -EIO;
1069
1070 outl(SIS_AC97_CMD_CODEC_COLD_RESET, io + SIS_AC97_CMD);
08b45098 1071 udelay(250);
175859bf
DD
1072
1073 count = 0xffff;
1074 while ((inw(io + SIS_AC97_STATUS) & SIS_AC97_STATUS_BUSY) && --count)
1075 udelay(1);
1076
fc084e0b
DD
1077 /* Command complete, we can let go of the semaphore now.
1078 */
1079 outl(SIS_AC97_SEMA_RELEASE, io + SIS_AC97_SEMA);
1080 if (!count)
1081 return -EIO;
1082
175859bf 1083 /* Now that we've finished the reset, find out what's attached.
fc084e0b
DD
1084 * There are some codec/board combinations that take an extremely
1085 * long time to come up. 350+ ms has been observed in the field,
1086 * so we'll give them up to 500ms.
175859bf 1087 */
fc084e0b
DD
1088 sis->codecs_present = 0;
1089 timeout = msecs_to_jiffies(500) + jiffies;
1090 while (time_before_eq(jiffies, timeout)) {
1091 status = inl(io + SIS_AC97_STATUS);
1092 if (status & SIS_AC97_STATUS_CODEC_READY)
1093 sis->codecs_present |= SIS_PRIMARY_CODEC_PRESENT;
1094 if (status & SIS_AC97_STATUS_CODEC2_READY)
1095 sis->codecs_present |= SIS_SECONDARY_CODEC_PRESENT;
1096 if (status & SIS_AC97_STATUS_CODEC3_READY)
1097 sis->codecs_present |= SIS_TERTIARY_CODEC_PRESENT;
1098
1099 if (sis->codecs_present == codecs)
1100 break;
1101
1102 msleep(1);
1103 }
1104
1105 /* All done, check for errors.
175859bf 1106 */
fc084e0b 1107 if (!sis->codecs_present) {
70597851 1108 dev_err(&sis->pci->dev, "could not find any codecs\n");
175859bf 1109 return -EIO;
fc084e0b
DD
1110 }
1111
1112 if (sis->codecs_present != codecs) {
70597851
DD
1113 dev_warn(&sis->pci->dev, "missing codecs, found %0x, expected %0x\n",
1114 sis->codecs_present, codecs);
fc084e0b 1115 }
175859bf
DD
1116
1117 /* Let the hardware know that the audio driver is alive,
1118 * and enable PCM slots on the AC-link for L/R playback (3 & 4) and
1119 * record channels. We're going to want to use Variable Rate Audio
1120 * for recording, to avoid needlessly resampling from 48kHZ.
1121 */
1122 outl(SIS_AC97_CONF_AUDIO_ALIVE, io + SIS_AC97_CONF);
1123 outl(SIS_AC97_CONF_AUDIO_ALIVE | SIS_AC97_CONF_PCM_LR_ENABLE |
1124 SIS_AC97_CONF_PCM_CAP_MIC_ENABLE |
1125 SIS_AC97_CONF_PCM_CAP_LR_ENABLE |
1126 SIS_AC97_CONF_CODEC_VRA_ENABLE, io + SIS_AC97_CONF);
1127
1128 /* All AC97 PCM slots should be sourced from sub-mixer 0.
1129 */
1130 outl(0, io + SIS_AC97_PSR);
1131
1132 /* There is only one valid DMA setup for a PCI environment.
1133 */
1134 outl(SIS_DMA_CSR_PCI_SETTINGS, io + SIS_DMA_CSR);
1135
25985edc 1136 /* Reset the synchronization groups for all of the channels
b3834be5 1137 * to be asynchronous. If we start doing SPDIF or 5.1 sound, etc.
175859bf
DD
1138 * we'll need to change how we handle these. Until then, we just
1139 * assign sub-mixer 0 to all playback channels, and avoid any
1140 * attenuation on the audio.
1141 */
1142 outl(0, io + SIS_PLAY_SYNC_GROUP_A);
1143 outl(0, io + SIS_PLAY_SYNC_GROUP_B);
1144 outl(0, io + SIS_PLAY_SYNC_GROUP_C);
1145 outl(0, io + SIS_PLAY_SYNC_GROUP_D);
1146 outl(0, io + SIS_MIXER_SYNC_GROUP);
1147
1148 for (i = 0; i < 64; i++) {
1149 writel(i, SIS_MIXER_START_ADDR(ioaddr, i));
1150 writel(SIS_MIXER_RIGHT_NO_ATTEN | SIS_MIXER_LEFT_NO_ATTEN |
1151 SIS_MIXER_DEST_0, SIS_MIXER_ADDR(ioaddr, i));
1152 }
1153
1154 /* Don't attenuate any audio set for the wave amplifier.
1155 *
1156 * FIXME: Maximum attenuation is set for the music amp, which will
1157 * need to change if we start using the synth engine.
1158 */
1159 outl(0xffff0000, io + SIS_WEVCR);
1160
1161 /* Ensure that the wave engine is in normal operating mode.
1162 */
1163 outl(0, io + SIS_WECCR);
1164
1165 /* Go ahead and enable the DMA interrupts. They won't go live
1166 * until we start a channel.
1167 */
1168 outl(SIS_GIER_AUDIO_PLAY_DMA_IRQ_ENABLE |
1169 SIS_GIER_AUDIO_RECORD_DMA_IRQ_ENABLE, io + SIS_GIER);
1170
1171 return 0;
1172}
1173
c7561cd8 1174#ifdef CONFIG_PM_SLEEP
68cb2b55 1175static int sis_suspend(struct device *dev)
175859bf 1176{
68cb2b55 1177 struct snd_card *card = dev_get_drvdata(dev);
175859bf
DD
1178 struct sis7019 *sis = card->private_data;
1179 void __iomem *ioaddr = sis->ioaddr;
1180 int i;
1181
1182 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
175859bf
DD
1183 if (sis->codecs_present & SIS_PRIMARY_CODEC_PRESENT)
1184 snd_ac97_suspend(sis->ac97[0]);
1185 if (sis->codecs_present & SIS_SECONDARY_CODEC_PRESENT)
1186 snd_ac97_suspend(sis->ac97[1]);
1187 if (sis->codecs_present & SIS_TERTIARY_CODEC_PRESENT)
1188 snd_ac97_suspend(sis->ac97[2]);
1189
1190 /* snd_pcm_suspend_all() stopped all channels, so we're quiescent.
1191 */
1192 if (sis->irq >= 0) {
175859bf
DD
1193 free_irq(sis->irq, sis);
1194 sis->irq = -1;
1195 }
1196
1197 /* Save the internal state away
1198 */
1199 for (i = 0; i < 4; i++) {
1200 memcpy_fromio(sis->suspend_state[i], ioaddr, 4096);
1201 ioaddr += 4096;
1202 }
1203
175859bf
DD
1204 return 0;
1205}
1206
68cb2b55 1207static int sis_resume(struct device *dev)
175859bf 1208{
68cb2b55
TI
1209 struct pci_dev *pci = to_pci_dev(dev);
1210 struct snd_card *card = dev_get_drvdata(dev);
175859bf
DD
1211 struct sis7019 *sis = card->private_data;
1212 void __iomem *ioaddr = sis->ioaddr;
1213 int i;
1214
175859bf 1215 if (sis_chip_init(sis)) {
70597851 1216 dev_err(&pci->dev, "unable to re-init controller\n");
175859bf
DD
1217 goto error;
1218 }
1219
88e24c3a 1220 if (request_irq(pci->irq, sis_interrupt, IRQF_SHARED,
934c2b6d 1221 KBUILD_MODNAME, sis)) {
70597851 1222 dev_err(&pci->dev, "unable to regain IRQ %d\n", pci->irq);
175859bf
DD
1223 goto error;
1224 }
1225
1226 /* Restore saved state, then clear out the page we use for the
1227 * silence buffer.
1228 */
1229 for (i = 0; i < 4; i++) {
1230 memcpy_toio(ioaddr, sis->suspend_state[i], 4096);
1231 ioaddr += 4096;
1232 }
1233
1234 memset(sis->suspend_state[0], 0, 4096);
1235
1236 sis->irq = pci->irq;
175859bf
DD
1237
1238 if (sis->codecs_present & SIS_PRIMARY_CODEC_PRESENT)
1239 snd_ac97_resume(sis->ac97[0]);
1240 if (sis->codecs_present & SIS_SECONDARY_CODEC_PRESENT)
1241 snd_ac97_resume(sis->ac97[1]);
1242 if (sis->codecs_present & SIS_TERTIARY_CODEC_PRESENT)
1243 snd_ac97_resume(sis->ac97[2]);
1244
1245 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1246 return 0;
1247
1248error:
1249 snd_card_disconnect(card);
1250 return -EIO;
1251}
68cb2b55
TI
1252
1253static SIMPLE_DEV_PM_OPS(sis_pm, sis_suspend, sis_resume);
1254#define SIS_PM_OPS &sis_pm
1255#else
1256#define SIS_PM_OPS NULL
c7561cd8 1257#endif /* CONFIG_PM_SLEEP */
175859bf
DD
1258
1259static int sis_alloc_suspend(struct sis7019 *sis)
1260{
1261 int i;
1262
1263 /* We need 16K to store the internal wave engine state during a
1264 * suspend, but we don't need it to be contiguous, so play nice
1265 * with the memory system. We'll also use this area for a silence
1266 * buffer.
1267 */
1268 for (i = 0; i < SIS_SUSPEND_PAGES; i++) {
1269 sis->suspend_state[i] = kmalloc(4096, GFP_KERNEL);
1270 if (!sis->suspend_state[i])
1271 return -ENOMEM;
1272 }
1273 memset(sis->suspend_state[0], 0, 4096);
1274
1275 return 0;
1276}
1277
e23e7a14
BP
1278static int sis_chip_create(struct snd_card *card,
1279 struct pci_dev *pci)
175859bf
DD
1280{
1281 struct sis7019 *sis = card->private_data;
1282 struct voice *voice;
efb0ad25 1283 static const struct snd_device_ops ops = {
175859bf
DD
1284 .dev_free = sis_dev_free,
1285 };
1286 int rc;
1287 int i;
1288
1289 rc = pci_enable_device(pci);
1290 if (rc)
1291 goto error_out;
1292
412b979c 1293 rc = dma_set_mask(&pci->dev, DMA_BIT_MASK(30));
8b1dacb6 1294 if (rc < 0) {
70597851 1295 dev_err(&pci->dev, "architecture does not support 30-bit PCI busmaster DMA");
175859bf
DD
1296 goto error_out_enabled;
1297 }
1298
1299 memset(sis, 0, sizeof(*sis));
1300 mutex_init(&sis->ac97_mutex);
1301 spin_lock_init(&sis->voice_lock);
1302 sis->card = card;
1303 sis->pci = pci;
1304 sis->irq = -1;
1305 sis->ioport = pci_resource_start(pci, 0);
1306
1307 rc = pci_request_regions(pci, "SiS7019");
1308 if (rc) {
70597851 1309 dev_err(&pci->dev, "unable request regions\n");
175859bf
DD
1310 goto error_out_enabled;
1311 }
1312
1313 rc = -EIO;
4bdc0d67 1314 sis->ioaddr = ioremap(pci_resource_start(pci, 1), 0x4000);
175859bf 1315 if (!sis->ioaddr) {
70597851 1316 dev_err(&pci->dev, "unable to remap MMIO, aborting\n");
175859bf
DD
1317 goto error_out_cleanup;
1318 }
1319
1320 rc = sis_alloc_suspend(sis);
1321 if (rc < 0) {
70597851 1322 dev_err(&pci->dev, "unable to allocate state storage\n");
175859bf
DD
1323 goto error_out_cleanup;
1324 }
1325
1326 rc = sis_chip_init(sis);
1327 if (rc)
1328 goto error_out_cleanup;
1329
ae970eb4
JL
1330 rc = request_irq(pci->irq, sis_interrupt, IRQF_SHARED, KBUILD_MODNAME,
1331 sis);
1332 if (rc) {
70597851 1333 dev_err(&pci->dev, "unable to allocate irq %d\n", sis->irq);
175859bf
DD
1334 goto error_out_cleanup;
1335 }
1336
1337 sis->irq = pci->irq;
39b77268 1338 card->sync_irq = sis->irq;
175859bf
DD
1339 pci_set_master(pci);
1340
1341 for (i = 0; i < 64; i++) {
1342 voice = &sis->voices[i];
1343 voice->num = i;
1344 voice->ctrl_base = SIS_PLAY_DMA_ADDR(sis->ioaddr, i);
1345 voice->wave_base = SIS_WAVE_ADDR(sis->ioaddr, i);
1346 }
1347
1348 voice = &sis->capture_voice;
1349 voice->flags = VOICE_CAPTURE;
1350 voice->num = SIS_CAPTURE_CHAN_AC97_PCM_IN;
1351 voice->ctrl_base = SIS_CAPTURE_DMA_ADDR(sis->ioaddr, voice->num);
1352
1353 rc = snd_device_new(card, SNDRV_DEV_LOWLEVEL, sis, &ops);
1354 if (rc)
1355 goto error_out_cleanup;
1356
175859bf
DD
1357 return 0;
1358
1359error_out_cleanup:
1360 sis_chip_free(sis);
1361
1362error_out_enabled:
1363 pci_disable_device(pci);
1364
1365error_out:
1366 return rc;
1367}
1368
e23e7a14
BP
1369static int snd_sis7019_probe(struct pci_dev *pci,
1370 const struct pci_device_id *pci_id)
175859bf
DD
1371{
1372 struct snd_card *card;
1373 struct sis7019 *sis;
1374 int rc;
1375
1376 rc = -ENOENT;
1377 if (!enable)
1378 goto error_out;
1379
fc084e0b
DD
1380 /* The user can specify which codecs should be present so that we
1381 * can wait for them to show up if they are slow to recover from
1382 * the AC97 cold reset. We default to a single codec, the primary.
1383 *
1384 * We assume that SIS_PRIMARY_*_PRESENT matches bits 0-2.
1385 */
1386 codecs &= SIS_PRIMARY_CODEC_PRESENT | SIS_SECONDARY_CODEC_PRESENT |
1387 SIS_TERTIARY_CODEC_PRESENT;
1388 if (!codecs)
1389 codecs = SIS_PRIMARY_CODEC_PRESENT;
1390
60c5772b
TI
1391 rc = snd_card_new(&pci->dev, index, id, THIS_MODULE,
1392 sizeof(*sis), &card);
e58de7ba 1393 if (rc < 0)
175859bf
DD
1394 goto error_out;
1395
1396 strcpy(card->driver, "SiS7019");
1397 strcpy(card->shortname, "SiS7019");
1398 rc = sis_chip_create(card, pci);
1399 if (rc)
1400 goto card_error_out;
1401
1402 sis = card->private_data;
1403
1404 rc = sis_mixer_create(sis);
1405 if (rc)
1406 goto card_error_out;
1407
1408 rc = sis_pcm_create(sis);
1409 if (rc)
1410 goto card_error_out;
1411
1412 snprintf(card->longname, sizeof(card->longname),
1413 "%s Audio Accelerator with %s at 0x%lx, irq %d",
1414 card->shortname, snd_ac97_get_short_name(sis->ac97[0]),
1415 sis->ioport, sis->irq);
1416
1417 rc = snd_card_register(card);
1418 if (rc)
1419 goto card_error_out;
1420
1421 pci_set_drvdata(pci, card);
1422 return 0;
1423
1424card_error_out:
1425 snd_card_free(card);
1426
1427error_out:
1428 return rc;
1429}
1430
e23e7a14 1431static void snd_sis7019_remove(struct pci_dev *pci)
175859bf
DD
1432{
1433 snd_card_free(pci_get_drvdata(pci));
175859bf
DD
1434}
1435
1436static struct pci_driver sis7019_driver = {
3733e424 1437 .name = KBUILD_MODNAME,
175859bf
DD
1438 .id_table = snd_sis7019_ids,
1439 .probe = snd_sis7019_probe,
e23e7a14 1440 .remove = snd_sis7019_remove,
68cb2b55
TI
1441 .driver = {
1442 .pm = SIS_PM_OPS,
1443 },
175859bf
DD
1444};
1445
e9f66d9b 1446module_pci_driver(sis7019_driver);