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PCI: Remove DEFINE_PCI_DEVICE_TABLE macro use
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1da177e4
LT		 1/*
2 * ALSA driver for VIA VT82xx (South Bridge)
3 *
4 * VT82C686A/B/C, VT8233A/C, VT8235
5 *
c1017a4c 6 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 7 * Tjeerd.Mulder <Tjeerd.Mulder@fujitsu-siemens.com>
8 * 2002 Takashi Iwai <tiwai@suse.de>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26/*
27 * Changes:
28 *
29 * Dec. 19, 2002 Takashi Iwai <tiwai@suse.de>
30 * - use the DSX channels for the first pcm playback.
31 * (on VIA8233, 8233C and 8235 only)
32 * this will allow you play simultaneously up to 4 streams.
33 * multi-channel playback is assigned to the second device
34 * on these chips.
35 * - support the secondary capture (on VIA8233/C,8235)
36 * - SPDIF support
37 * the DSX3 channel can be used for SPDIF output.
38 * on VIA8233A, this channel is assigned to the second pcm
39 * playback.
40 * the card config of alsa-lib will assign the correct
41 * device for applications.
42 * - clean up the code, separate low-level initialization
43 * routines for each chipset.
4f550df5
KW		 44 *
45 * Sep. 26, 2005 Karsten Wiese <annabellesgarden@yahoo.de>
46 * - Optimize position calculation for the 823x chips.
1da177e4
LT		 47 */
48
1da177e4
LT		 49#include <asm/io.h>
50#include <linux/delay.h>
51#include <linux/interrupt.h>
52#include <linux/init.h>
53#include <linux/pci.h>
54#include <linux/slab.h>
55#include <linux/gameport.h>
65a77217 56#include <linux/module.h>
1da177e4
LT		 57#include <sound/core.h>
58#include <sound/pcm.h>
59#include <sound/pcm_params.h>
60#include <sound/info.h>
7058c042 61#include <sound/tlv.h>
1da177e4
LT		 62#include <sound/ac97_codec.h>
63#include <sound/mpu401.h>
64#include <sound/initval.h>
65
66#if 0
67#define POINTER_DEBUG
68#endif
69
c1017a4c 70MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT		 71MODULE_DESCRIPTION("VIA VT82xx audio");
72MODULE_LICENSE("GPL");
73MODULE_SUPPORTED_DEVICE("{{VIA,VT82C686A/B/C,pci},{VIA,VT8233A/C,8235}}");
74
75#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
76#define SUPPORT_JOYSTICK 1
77#endif
78
b7fe4622
CL		 79static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
80static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
81static long mpu_port;
1da177e4 82#ifdef SUPPORT_JOYSTICK
a67ff6a5 83static bool joystick;
1da177e4 84#endif
b7fe4622
CL		 85static int ac97_clock = 48000;
86static char *ac97_quirk;
87static int dxs_support;
395c61d1 88static int dxs_init_volume = 31;
115551d9 89static int nodelay;
1da177e4 90
b7fe4622 91module_param(index, int, 0444);
1da177e4 92MODULE_PARM_DESC(index, "Index value for VIA 82xx bridge.");
b7fe4622 93module_param(id, charp, 0444);
1da177e4 94MODULE_PARM_DESC(id, "ID string for VIA 82xx bridge.");
b7fe4622 95module_param(mpu_port, long, 0444);
1da177e4
LT		 96MODULE_PARM_DESC(mpu_port, "MPU-401 port. (VT82C686x only)");
97#ifdef SUPPORT_JOYSTICK
b7fe4622 98module_param(joystick, bool, 0444);
1da177e4
LT		 99MODULE_PARM_DESC(joystick, "Enable joystick. (VT82C686x only)");
100#endif
b7fe4622 101module_param(ac97_clock, int, 0444);
1da177e4 102MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
b7fe4622 103module_param(ac97_quirk, charp, 0444);
1da177e4 104MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
b7fe4622 105module_param(dxs_support, int, 0444);
2d7eb7cb 106MODULE_PARM_DESC(dxs_support, "Support for DXS channels (0 = auto, 1 = enable, 2 = disable, 3 = 48k only, 4 = no VRA, 5 = enable any sample rate)");
395c61d1
CL		 107module_param(dxs_init_volume, int, 0644);
108MODULE_PARM_DESC(dxs_init_volume, "initial DXS volume (0-31)");
115551d9
SA		 109module_param(nodelay, int, 0444);
110MODULE_PARM_DESC(nodelay, "Disable 500ms init delay");
1da177e4 111
2b3e584b 112/* just for backward compatibility */
a67ff6a5 113static bool enable;
698444f3 114module_param(enable, bool, 0444);
2b3e584b 115
1da177e4 116
1da177e4
LT		 117/* revision numbers for via686 */
118#define VIA_REV_686_A 0x10
119#define VIA_REV_686_B 0x11
120#define VIA_REV_686_C 0x12
121#define VIA_REV_686_D 0x13
122#define VIA_REV_686_E 0x14
123#define VIA_REV_686_H 0x20
124
125/* revision numbers for via8233 */
126#define VIA_REV_PRE_8233 0x10 /* not in market */
127#define VIA_REV_8233C 0x20 /* 2 rec, 4 pb, 1 multi-pb */
128#define VIA_REV_8233 0x30 /* 2 rec, 4 pb, 1 multi-pb, spdif */
129#define VIA_REV_8233A 0x40 /* 1 rec, 1 multi-pb, spdf */
130#define VIA_REV_8235 0x50 /* 2 rec, 4 pb, 1 multi-pb, spdif */
131#define VIA_REV_8237 0x60
8263c65f 132#define VIA_REV_8251 0x70
1da177e4
LT		 133
134/*
135 * Direct registers
136 */
137
138#define VIAREG(via, x) ((via)->port + VIA_REG_##x)
139#define VIADEV_REG(viadev, x) ((viadev)->port + VIA_REG_##x)
140
141/* common offsets */
142#define VIA_REG_OFFSET_STATUS 0x00 /* byte - channel status */
143#define VIA_REG_STAT_ACTIVE 0x80 /* RO */
4f550df5 144#define VIA8233_SHADOW_STAT_ACTIVE 0x08 /* RO */
1da177e4
LT		 145#define VIA_REG_STAT_PAUSED 0x40 /* RO */
146#define VIA_REG_STAT_TRIGGER_QUEUED 0x08 /* RO */
147#define VIA_REG_STAT_STOPPED 0x04 /* RWC */
148#define VIA_REG_STAT_EOL 0x02 /* RWC */
149#define VIA_REG_STAT_FLAG 0x01 /* RWC */
150#define VIA_REG_OFFSET_CONTROL 0x01 /* byte - channel control */
151#define VIA_REG_CTRL_START 0x80 /* WO */
152#define VIA_REG_CTRL_TERMINATE 0x40 /* WO */
153#define VIA_REG_CTRL_AUTOSTART 0x20
154#define VIA_REG_CTRL_PAUSE 0x08 /* RW */
155#define VIA_REG_CTRL_INT_STOP 0x04
156#define VIA_REG_CTRL_INT_EOL 0x02
157#define VIA_REG_CTRL_INT_FLAG 0x01
158#define VIA_REG_CTRL_RESET 0x01 /* RW - probably reset? undocumented */
159#define VIA_REG_CTRL_INT (VIA_REG_CTRL_INT_FLAG | VIA_REG_CTRL_INT_EOL | VIA_REG_CTRL_AUTOSTART)
160#define VIA_REG_OFFSET_TYPE 0x02 /* byte - channel type (686 only) */
161#define VIA_REG_TYPE_AUTOSTART 0x80 /* RW - autostart at EOL */
162#define VIA_REG_TYPE_16BIT 0x20 /* RW */
163#define VIA_REG_TYPE_STEREO 0x10 /* RW */
164#define VIA_REG_TYPE_INT_LLINE 0x00
165#define VIA_REG_TYPE_INT_LSAMPLE 0x04
166#define VIA_REG_TYPE_INT_LESSONE 0x08
167#define VIA_REG_TYPE_INT_MASK 0x0c
168#define VIA_REG_TYPE_INT_EOL 0x02
169#define VIA_REG_TYPE_INT_FLAG 0x01
170#define VIA_REG_OFFSET_TABLE_PTR 0x04 /* dword - channel table pointer */
171#define VIA_REG_OFFSET_CURR_PTR 0x04 /* dword - channel current pointer */
172#define VIA_REG_OFFSET_STOP_IDX 0x08 /* dword - stop index, channel type, sample rate */
173#define VIA8233_REG_TYPE_16BIT 0x00200000 /* RW */
174#define VIA8233_REG_TYPE_STEREO 0x00100000 /* RW */
175#define VIA_REG_OFFSET_CURR_COUNT 0x0c /* dword - channel current count (24 bit) */
176#define VIA_REG_OFFSET_CURR_INDEX 0x0f /* byte - channel current index (for via8233 only) */
177
178#define DEFINE_VIA_REGSET(name,val) \
179enum {\
180 VIA_REG_##name##_STATUS = (val),\
181 VIA_REG_##name##_CONTROL = (val) + 0x01,\
182 VIA_REG_##name##_TYPE = (val) + 0x02,\
183 VIA_REG_##name##_TABLE_PTR = (val) + 0x04,\
184 VIA_REG_##name##_CURR_PTR = (val) + 0x04,\
185 VIA_REG_##name##_STOP_IDX = (val) + 0x08,\
186 VIA_REG_##name##_CURR_COUNT = (val) + 0x0c,\
187}
188
189/* playback block */
190DEFINE_VIA_REGSET(PLAYBACK, 0x00);
191DEFINE_VIA_REGSET(CAPTURE, 0x10);
192DEFINE_VIA_REGSET(FM, 0x20);
193
194/* AC'97 */
195#define VIA_REG_AC97 0x80 /* dword */
196#define VIA_REG_AC97_CODEC_ID_MASK (3<<30)
197#define VIA_REG_AC97_CODEC_ID_SHIFT 30
198#define VIA_REG_AC97_CODEC_ID_PRIMARY 0x00
199#define VIA_REG_AC97_CODEC_ID_SECONDARY 0x01
200#define VIA_REG_AC97_SECONDARY_VALID (1<<27)
201#define VIA_REG_AC97_PRIMARY_VALID (1<<25)
202#define VIA_REG_AC97_BUSY (1<<24)
203#define VIA_REG_AC97_READ (1<<23)
204#define VIA_REG_AC97_CMD_SHIFT 16
205#define VIA_REG_AC97_CMD_MASK 0x7e
206#define VIA_REG_AC97_DATA_SHIFT 0
207#define VIA_REG_AC97_DATA_MASK 0xffff
208
209#define VIA_REG_SGD_SHADOW 0x84 /* dword */
210/* via686 */
211#define VIA_REG_SGD_STAT_PB_FLAG (1<<0)
212#define VIA_REG_SGD_STAT_CP_FLAG (1<<1)
213#define VIA_REG_SGD_STAT_FM_FLAG (1<<2)
214#define VIA_REG_SGD_STAT_PB_EOL (1<<4)
215#define VIA_REG_SGD_STAT_CP_EOL (1<<5)
216#define VIA_REG_SGD_STAT_FM_EOL (1<<6)
217#define VIA_REG_SGD_STAT_PB_STOP (1<<8)
218#define VIA_REG_SGD_STAT_CP_STOP (1<<9)
219#define VIA_REG_SGD_STAT_FM_STOP (1<<10)
220#define VIA_REG_SGD_STAT_PB_ACTIVE (1<<12)
221#define VIA_REG_SGD_STAT_CP_ACTIVE (1<<13)
222#define VIA_REG_SGD_STAT_FM_ACTIVE (1<<14)
223/* via8233 */
224#define VIA8233_REG_SGD_STAT_FLAG (1<<0)
225#define VIA8233_REG_SGD_STAT_EOL (1<<1)
226#define VIA8233_REG_SGD_STAT_STOP (1<<2)
227#define VIA8233_REG_SGD_STAT_ACTIVE (1<<3)
228#define VIA8233_INTR_MASK(chan) ((VIA8233_REG_SGD_STAT_FLAG|VIA8233_REG_SGD_STAT_EOL) << ((chan) * 4))
229#define VIA8233_REG_SGD_CHAN_SDX 0
230#define VIA8233_REG_SGD_CHAN_MULTI 4
231#define VIA8233_REG_SGD_CHAN_REC 6
232#define VIA8233_REG_SGD_CHAN_REC1 7
233
234#define VIA_REG_GPI_STATUS 0x88
235#define VIA_REG_GPI_INTR 0x8c
236
237/* multi-channel and capture registers for via8233 */
238DEFINE_VIA_REGSET(MULTPLAY, 0x40);
239DEFINE_VIA_REGSET(CAPTURE_8233, 0x60);
240
241/* via8233-specific registers */
242#define VIA_REG_OFS_PLAYBACK_VOLUME_L 0x02 /* byte */
243#define VIA_REG_OFS_PLAYBACK_VOLUME_R 0x03 /* byte */
244#define VIA_REG_OFS_MULTPLAY_FORMAT 0x02 /* byte - format and channels */
245#define VIA_REG_MULTPLAY_FMT_8BIT 0x00
246#define VIA_REG_MULTPLAY_FMT_16BIT 0x80
247#define VIA_REG_MULTPLAY_FMT_CH_MASK 0x70 /* # channels << 4 (valid = 1,2,4,6) */
248#define VIA_REG_OFS_CAPTURE_FIFO 0x02 /* byte - bit 6 = fifo enable */
249#define VIA_REG_CAPTURE_FIFO_ENABLE 0x40
250
251#define VIA_DXS_MAX_VOLUME 31 /* max. volume (attenuation) of reg 0x32/33 */
252
253#define VIA_REG_CAPTURE_CHANNEL 0x63 /* byte - input select */
254#define VIA_REG_CAPTURE_CHANNEL_MIC 0x4
255#define VIA_REG_CAPTURE_CHANNEL_LINE 0
256#define VIA_REG_CAPTURE_SELECT_CODEC 0x03 /* recording source codec (0 = primary) */
257
258#define VIA_TBL_BIT_FLAG 0x40000000
259#define VIA_TBL_BIT_EOL 0x80000000
260
261/* pci space */
262#define VIA_ACLINK_STAT 0x40
263#define VIA_ACLINK_C11_READY 0x20
264#define VIA_ACLINK_C10_READY 0x10
265#define VIA_ACLINK_C01_READY 0x04 /* secondary codec ready */
266#define VIA_ACLINK_LOWPOWER 0x02 /* low-power state */
267#define VIA_ACLINK_C00_READY 0x01 /* primary codec ready */
268#define VIA_ACLINK_CTRL 0x41
269#define VIA_ACLINK_CTRL_ENABLE 0x80 /* 0: disable, 1: enable */
270#define VIA_ACLINK_CTRL_RESET 0x40 /* 0: assert, 1: de-assert */
271#define VIA_ACLINK_CTRL_SYNC 0x20 /* 0: release SYNC, 1: force SYNC hi */
272#define VIA_ACLINK_CTRL_SDO 0x10 /* 0: release SDO, 1: force SDO hi */
273#define VIA_ACLINK_CTRL_VRA 0x08 /* 0: disable VRA, 1: enable VRA */
274#define VIA_ACLINK_CTRL_PCM 0x04 /* 0: disable PCM, 1: enable PCM */
275#define VIA_ACLINK_CTRL_FM 0x02 /* via686 only */
276#define VIA_ACLINK_CTRL_SB 0x01 /* via686 only */
277#define VIA_ACLINK_CTRL_INIT (VIA_ACLINK_CTRL_ENABLE|\
278 VIA_ACLINK_CTRL_RESET|\
279 VIA_ACLINK_CTRL_PCM|\
280 VIA_ACLINK_CTRL_VRA)
281#define VIA_FUNC_ENABLE 0x42
282#define VIA_FUNC_MIDI_PNP 0x80 /* FIXME: it's 0x40 in the datasheet! */
283#define VIA_FUNC_MIDI_IRQMASK 0x40 /* FIXME: not documented! */
284#define VIA_FUNC_RX2C_WRITE 0x20
285#define VIA_FUNC_SB_FIFO_EMPTY 0x10
286#define VIA_FUNC_ENABLE_GAME 0x08
287#define VIA_FUNC_ENABLE_FM 0x04
288#define VIA_FUNC_ENABLE_MIDI 0x02
289#define VIA_FUNC_ENABLE_SB 0x01
290#define VIA_PNP_CONTROL 0x43
291#define VIA_FM_NMI_CTRL 0x48
292#define VIA8233_VOLCHG_CTRL 0x48
293#define VIA8233_SPDIF_CTRL 0x49
294#define VIA8233_SPDIF_DX3 0x08
295#define VIA8233_SPDIF_SLOT_MASK 0x03
296#define VIA8233_SPDIF_SLOT_1011 0x00
297#define VIA8233_SPDIF_SLOT_34 0x01
298#define VIA8233_SPDIF_SLOT_78 0x02
299#define VIA8233_SPDIF_SLOT_69 0x03
300
301/*
302 */
303
304#define VIA_DXS_AUTO 0
305#define VIA_DXS_ENABLE 1
306#define VIA_DXS_DISABLE 2
307#define VIA_DXS_48K 3
308#define VIA_DXS_NO_VRA 4
2d7eb7cb 309#define VIA_DXS_SRC 5
1da177e4
LT		 310
311
1da177e4
LT		 312/*
313 * pcm stream
314 */
315
316struct snd_via_sg_table {
317 unsigned int offset;
318 unsigned int size;
319} ;
320
321#define VIA_TABLE_SIZE 255
5503600a 322#define VIA_MAX_BUFSIZE (1<<24)
1da177e4 323
e437e3d7 324struct viadev {
1da177e4
LT		 325 unsigned int reg_offset;
326 unsigned long port;
327 int direction; /* playback = 0, capture = 1 */
e437e3d7 328 struct snd_pcm_substream *substream;
1da177e4
LT		 329 int running;
330 unsigned int tbl_entries; /* # descriptors */
331 struct snd_dma_buffer table;
332 struct snd_via_sg_table *idx_table;
333 /* for recovery from the unexpected pointer */
334 unsigned int lastpos;
335 unsigned int fragsize;
336 unsigned int bufsize;
337 unsigned int bufsize2;
4f550df5
KW		 338 int hwptr_done; /* processed frame position in the buffer */
339 int in_interrupt;
340 int shadow_shift;
1da177e4
LT		 341};
342
343
344enum { TYPE_CARD_VIA686 = 1, TYPE_CARD_VIA8233 };
345enum { TYPE_VIA686, TYPE_VIA8233, TYPE_VIA8233A };
346
347#define VIA_MAX_DEVS 7 /* 4 playback, 1 multi, 2 capture */
348
349struct via_rate_lock {
350 spinlock_t lock;
351 int rate;
352 int used;
353};
354
e437e3d7 355struct via82xx {
1da177e4
LT		 356 int irq;
357
358 unsigned long port;
359 struct resource *mpu_res;
360 int chip_type;
361 unsigned char revision;
362
363 unsigned char old_legacy;
364 unsigned char old_legacy_cfg;
c7561cd8 365#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 366 unsigned char legacy_saved;
367 unsigned char legacy_cfg_saved;
368 unsigned char spdif_ctrl_saved;
369 unsigned char capture_src_saved[2];
370 unsigned int mpu_port_saved;
371#endif
372
00f226d4
HM		 373 unsigned char playback_volume[4][2]; /* for VIA8233/C/8235; default = 0 */
374 unsigned char playback_volume_c[2]; /* for VIA8233/C/8235; default = 0 */
1da177e4
LT		 375
376 unsigned int intr_mask; /* SGD_SHADOW mask to check interrupts */
377
378 struct pci_dev *pci;
e437e3d7 379 struct snd_card *card;
1da177e4
LT		 380
381 unsigned int num_devs;
382 unsigned int playback_devno, multi_devno, capture_devno;
e437e3d7 383 struct viadev devs[VIA_MAX_DEVS];
1da177e4
LT		 384 struct via_rate_lock rates[2]; /* playback and capture */
385 unsigned int dxs_fixed: 1; /* DXS channel accepts only 48kHz */
386 unsigned int no_vra: 1; /* no need to set VRA on DXS channels */
2d7eb7cb 387 unsigned int dxs_src: 1; /* use full SRC capabilities of DXS */
1da177e4
LT		 388 unsigned int spdif_on: 1; /* only spdif rates work to external DACs */
389
e437e3d7
TI		 390 struct snd_pcm *pcms[2];
391 struct snd_rawmidi *rmidi;
3d009413 392 struct snd_kcontrol *dxs_controls[4];
1da177e4 393
e437e3d7
TI		 394 struct snd_ac97_bus *ac97_bus;
395 struct snd_ac97 *ac97;
1da177e4
LT		 396 unsigned int ac97_clock;
397 unsigned int ac97_secondary; /* secondary AC'97 codec is present */
398
399 spinlock_t reg_lock;
e437e3d7 400 struct snd_info_entry *proc_entry;
1da177e4
LT		 401
402#ifdef SUPPORT_JOYSTICK
403 struct gameport *gameport;
404#endif
405};
406
9baa3c34 407static const struct pci_device_id snd_via82xx_ids[] = {
4f550df5 408 /* 0x1106, 0x3058 */
28d27aae 409 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C686_5), TYPE_CARD_VIA686, }, /* 686A */
4f550df5 410 /* 0x1106, 0x3059 */
28d27aae 411 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8233_5), TYPE_CARD_VIA8233, }, /* VT8233 */
1da177e4
LT		 412 { 0, }
413};
414
415MODULE_DEVICE_TABLE(pci, snd_via82xx_ids);
416
417/*
418 */
419
420/*
421 * allocate and initialize the descriptor buffers
422 * periods = number of periods
423 * fragsize = period size in bytes
424 */
e437e3d7 425static int build_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
1da177e4
LT		 426 struct pci_dev *pci,
427 unsigned int periods, unsigned int fragsize)
428{
429 unsigned int i, idx, ofs, rest;
e437e3d7 430 struct via82xx *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 431
432 if (dev->table.area == NULL) {
433 /* the start of each lists must be aligned to 8 bytes,
434 * but the kernel pages are much bigger, so we don't care
435 */
436 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
437 PAGE_ALIGN(VIA_TABLE_SIZE * 2 * 8),
438 &dev->table) < 0)
439 return -ENOMEM;
440 }
441 if (! dev->idx_table) {
442 dev->idx_table = kmalloc(sizeof(*dev->idx_table) * VIA_TABLE_SIZE, GFP_KERNEL);
443 if (! dev->idx_table)
444 return -ENOMEM;
445 }
446
447 /* fill the entries */
448 idx = 0;
449 ofs = 0;
450 for (i = 0; i < periods; i++) {
451 rest = fragsize;
452 /* fill descriptors for a period.
453 * a period can be split to several descriptors if it's
454 * over page boundary.
455 */
456 do {
457 unsigned int r;
458 unsigned int flag;
77a23f26 459 unsigned int addr;
1da177e4
LT		 460
461 if (idx >= VIA_TABLE_SIZE) {
59d3acfa 462 dev_err(&pci->dev, "too much table size!\n");
1da177e4
LT		 463 return -EINVAL;
464 }
77a23f26
TI		 465 addr = snd_pcm_sgbuf_get_addr(substream, ofs);
466 ((u32 *)dev->table.area)[idx << 1] = cpu_to_le32(addr);
5503600a 467 r = snd_pcm_sgbuf_get_chunk_size(substream, ofs, rest);
1da177e4
LT		 468 rest -= r;
469 if (! rest) {
470 if (i == periods - 1)
471 flag = VIA_TBL_BIT_EOL; /* buffer boundary */
472 else
473 flag = VIA_TBL_BIT_FLAG; /* period boundary */
474 } else
475 flag = 0; /* period continues to the next */
ee419653 476 /*
59d3acfa
TI		 477 dev_dbg(&pci->dev,
478 "tbl %d: at %d size %d (rest %d)\n",
479 idx, ofs, r, rest);
ee419653 480 */
1da177e4
LT		 481 ((u32 *)dev->table.area)[(idx<<1) + 1] = cpu_to_le32(r | flag);
482 dev->idx_table[idx].offset = ofs;
483 dev->idx_table[idx].size = r;
484 ofs += r;
485 idx++;
486 } while (rest > 0);
487 }
488 dev->tbl_entries = idx;
489 dev->bufsize = periods * fragsize;
490 dev->bufsize2 = dev->bufsize / 2;
491 dev->fragsize = fragsize;
492 return 0;
493}
494
495
e437e3d7 496static int clean_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
1da177e4
LT		 497 struct pci_dev *pci)
498{
499 if (dev->table.area) {
500 snd_dma_free_pages(&dev->table);
501 dev->table.area = NULL;
502 }
4d572776
JJ		 503 kfree(dev->idx_table);
504 dev->idx_table = NULL;
1da177e4
LT		 505 return 0;
506}
507
508/*
509 * Basic I/O
510 */
511
e437e3d7 512static inline unsigned int snd_via82xx_codec_xread(struct via82xx *chip)
1da177e4
LT		 513{
514 return inl(VIAREG(chip, AC97));
515}
516
e437e3d7 517static inline void snd_via82xx_codec_xwrite(struct via82xx *chip, unsigned int val)
1da177e4
LT		 518{
519 outl(val, VIAREG(chip, AC97));
520}
521
e437e3d7 522static int snd_via82xx_codec_ready(struct via82xx *chip, int secondary)
1da177e4
LT		 523{
524 unsigned int timeout = 1000; /* 1ms */
525 unsigned int val;
526
527 while (timeout-- > 0) {
528 udelay(1);
529 if (!((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY))
530 return val & 0xffff;
531 }
59d3acfa 532 dev_err(chip->card->dev, "codec_ready: codec %i is not ready [0x%x]\n",
e437e3d7 533 secondary, snd_via82xx_codec_xread(chip));
1da177e4
LT		 534 return -EIO;
535}
536
e437e3d7 537static int snd_via82xx_codec_valid(struct via82xx *chip, int secondary)
1da177e4
LT		 538{
539 unsigned int timeout = 1000; /* 1ms */
540 unsigned int val, val1;
541 unsigned int stat = !secondary ? VIA_REG_AC97_PRIMARY_VALID :
542 VIA_REG_AC97_SECONDARY_VALID;
543
544 while (timeout-- > 0) {
545 val = snd_via82xx_codec_xread(chip);
546 val1 = val & (VIA_REG_AC97_BUSY | stat);
547 if (val1 == stat)
548 return val & 0xffff;
549 udelay(1);
550 }
551 return -EIO;
552}
553
e437e3d7 554static void snd_via82xx_codec_wait(struct snd_ac97 *ac97)
1da177e4 555{
e437e3d7 556 struct via82xx *chip = ac97->private_data;
1da177e4
LT		 557 int err;
558 err = snd_via82xx_codec_ready(chip, ac97->num);
559 /* here we need to wait fairly for long time.. */
115551d9
SA		 560 if (!nodelay)
561 msleep(500);
1da177e4
LT		 562}
563
e437e3d7 564static void snd_via82xx_codec_write(struct snd_ac97 *ac97,
1da177e4
LT		 565 unsigned short reg,
566 unsigned short val)
567{
e437e3d7 568 struct via82xx *chip = ac97->private_data;
1da177e4 569 unsigned int xval;
4f550df5 570
1da177e4
LT		 571 xval = !ac97->num ? VIA_REG_AC97_CODEC_ID_PRIMARY : VIA_REG_AC97_CODEC_ID_SECONDARY;
572 xval <<= VIA_REG_AC97_CODEC_ID_SHIFT;
573 xval |= reg << VIA_REG_AC97_CMD_SHIFT;
574 xval |= val << VIA_REG_AC97_DATA_SHIFT;
575 snd_via82xx_codec_xwrite(chip, xval);
576 snd_via82xx_codec_ready(chip, ac97->num);
577}
578
e437e3d7 579static unsigned short snd_via82xx_codec_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 580{
e437e3d7 581 struct via82xx *chip = ac97->private_data;
1da177e4
LT		 582 unsigned int xval, val = 0xffff;
583 int again = 0;
584
585 xval = ac97->num << VIA_REG_AC97_CODEC_ID_SHIFT;
586 xval |= ac97->num ? VIA_REG_AC97_SECONDARY_VALID : VIA_REG_AC97_PRIMARY_VALID;
587 xval |= VIA_REG_AC97_READ;
588 xval |= (reg & 0x7f) << VIA_REG_AC97_CMD_SHIFT;
589 while (1) {
590 if (again++ > 3) {
59d3acfa
TI		 591 dev_err(chip->card->dev,
592 "codec_read: codec %i is not valid [0x%x]\n",
e437e3d7 593 ac97->num, snd_via82xx_codec_xread(chip));
1da177e4
LT		 594 return 0xffff;
595 }
596 snd_via82xx_codec_xwrite(chip, xval);
597 udelay (20);
598 if (snd_via82xx_codec_valid(chip, ac97->num) >= 0) {
599 udelay(25);
600 val = snd_via82xx_codec_xread(chip);
601 break;
602 }
603 }
604 return val & 0xffff;
605}
606
e437e3d7 607static void snd_via82xx_channel_reset(struct via82xx *chip, struct viadev *viadev)
1da177e4
LT		 608{
609 outb(VIA_REG_CTRL_PAUSE | VIA_REG_CTRL_TERMINATE | VIA_REG_CTRL_RESET,
610 VIADEV_REG(viadev, OFFSET_CONTROL));
611 inb(VIADEV_REG(viadev, OFFSET_CONTROL));
612 udelay(50);
613 /* disable interrupts */
614 outb(0x00, VIADEV_REG(viadev, OFFSET_CONTROL));
615 /* clear interrupts */
616 outb(0x03, VIADEV_REG(viadev, OFFSET_STATUS));
617 outb(0x00, VIADEV_REG(viadev, OFFSET_TYPE)); /* for via686 */
618 // outl(0, VIADEV_REG(viadev, OFFSET_CURR_PTR));
619 viadev->lastpos = 0;
4f550df5 620 viadev->hwptr_done = 0;
1da177e4
LT		 621}
622
623
624/*
625 * Interrupt handler
4f550df5 626 * Used for 686 and 8233A
1da177e4 627 */
7d12e780 628static irqreturn_t snd_via686_interrupt(int irq, void *dev_id)
1da177e4 629{
e437e3d7 630 struct via82xx *chip = dev_id;
1da177e4
LT		 631 unsigned int status;
632 unsigned int i;
633
634 status = inl(VIAREG(chip, SGD_SHADOW));
635 if (! (status & chip->intr_mask)) {
636 if (chip->rmidi)
637 /* check mpu401 interrupt */
7d12e780 638 return snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT		 639 return IRQ_NONE;
640 }
641
642 /* check status for each stream */
643 spin_lock(&chip->reg_lock);
644 for (i = 0; i < chip->num_devs; i++) {
e437e3d7 645 struct viadev *viadev = &chip->devs[i];
1da177e4 646 unsigned char c_status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
4f550df5 647 if (! (c_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG|VIA_REG_STAT_STOPPED)))
1da177e4
LT		 648 continue;
649 if (viadev->substream && viadev->running) {
4f550df5
KW		 650 /*
651 * Update hwptr_done based on 'period elapsed'
652 * interrupts. We'll use it, when the chip returns 0
653 * for OFFSET_CURR_COUNT.
654 */
655 if (c_status & VIA_REG_STAT_EOL)
656 viadev->hwptr_done = 0;
657 else
658 viadev->hwptr_done += viadev->fragsize;
659 viadev->in_interrupt = c_status;
1da177e4
LT		 660 spin_unlock(&chip->reg_lock);
661 snd_pcm_period_elapsed(viadev->substream);
662 spin_lock(&chip->reg_lock);
4f550df5 663 viadev->in_interrupt = 0;
1da177e4
LT		 664 }
665 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
666 }
667 spin_unlock(&chip->reg_lock);
668 return IRQ_HANDLED;
669}
670
4f550df5
KW		 671/*
672 * Interrupt handler
673 */
7d12e780 674static irqreturn_t snd_via8233_interrupt(int irq, void *dev_id)
4f550df5 675{
e437e3d7 676 struct via82xx *chip = dev_id;
4f550df5
KW		 677 unsigned int status;
678 unsigned int i;
679 int irqreturn = 0;
680
681 /* check status for each stream */
682 spin_lock(&chip->reg_lock);
683 status = inl(VIAREG(chip, SGD_SHADOW));
684
685 for (i = 0; i < chip->num_devs; i++) {
e437e3d7
TI		 686 struct viadev *viadev = &chip->devs[i];
687 struct snd_pcm_substream *substream;
4f550df5
KW		 688 unsigned char c_status, shadow_status;
689
690 shadow_status = (status >> viadev->shadow_shift) &
691 (VIA8233_SHADOW_STAT_ACTIVE|VIA_REG_STAT_EOL|
692 VIA_REG_STAT_FLAG);
693 c_status = shadow_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG);
694 if (!c_status)
695 continue;
696
697 substream = viadev->substream;
698 if (substream && viadev->running) {
699 /*
700 * Update hwptr_done based on 'period elapsed'
701 * interrupts. We'll use it, when the chip returns 0
702 * for OFFSET_CURR_COUNT.
703 */
704 if (c_status & VIA_REG_STAT_EOL)
705 viadev->hwptr_done = 0;
706 else
707 viadev->hwptr_done += viadev->fragsize;
708 viadev->in_interrupt = c_status;
709 if (shadow_status & VIA8233_SHADOW_STAT_ACTIVE)
710 viadev->in_interrupt |= VIA_REG_STAT_ACTIVE;
711 spin_unlock(&chip->reg_lock);
712
713 snd_pcm_period_elapsed(substream);
714
715 spin_lock(&chip->reg_lock);
716 viadev->in_interrupt = 0;
717 }
718 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
719 irqreturn = 1;
720 }
721 spin_unlock(&chip->reg_lock);
722 return IRQ_RETVAL(irqreturn);
723}
724
1da177e4
LT		 725/*
726 * PCM callbacks
727 */
728
729/*
730 * trigger callback
731 */
e437e3d7 732static int snd_via82xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 733{
e437e3d7
TI		 734 struct via82xx *chip = snd_pcm_substream_chip(substream);
735 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 736 unsigned char val;
737
738 if (chip->chip_type != TYPE_VIA686)
739 val = VIA_REG_CTRL_INT;
740 else
741 val = 0;
742 switch (cmd) {
743 case SNDRV_PCM_TRIGGER_START:
41e4845c 744 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 745 val |= VIA_REG_CTRL_START;
746 viadev->running = 1;
747 break;
748 case SNDRV_PCM_TRIGGER_STOP:
41e4845c 749 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 750 val = VIA_REG_CTRL_TERMINATE;
751 viadev->running = 0;
752 break;
753 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
754 val |= VIA_REG_CTRL_PAUSE;
755 viadev->running = 0;
756 break;
757 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
758 viadev->running = 1;
759 break;
760 default:
761 return -EINVAL;
762 }
763 outb(val, VIADEV_REG(viadev, OFFSET_CONTROL));
764 if (cmd == SNDRV_PCM_TRIGGER_STOP)
765 snd_via82xx_channel_reset(chip, viadev);
766 return 0;
767}
768
769
770/*
771 * pointer callbacks
772 */
773
774/*
775 * calculate the linear position at the given sg-buffer index and the rest count
776 */
777
778#define check_invalid_pos(viadev,pos) \
e437e3d7
TI		 779 ((pos) < viadev->lastpos && ((pos) >= viadev->bufsize2 ||\
780 viadev->lastpos < viadev->bufsize2))
1da177e4 781
59d3acfa
TI		 782static inline unsigned int calc_linear_pos(struct via82xx *chip,
783 struct viadev *viadev,
784 unsigned int idx,
e437e3d7 785 unsigned int count)
1da177e4
LT		 786{
787 unsigned int size, base, res;
788
789 size = viadev->idx_table[idx].size;
790 base = viadev->idx_table[idx].offset;
791 res = base + size - count;
4f550df5
KW		 792 if (res >= viadev->bufsize)
793 res -= viadev->bufsize;
1da177e4
LT		 794
795 /* check the validity of the calculated position */
796 if (size < count) {
59d3acfa
TI		 797 dev_dbg(chip->card->dev,
798 "invalid via82xx_cur_ptr (size = %d, count = %d)\n",
e437e3d7 799 (int)size, (int)count);
1da177e4
LT		 800 res = viadev->lastpos;
801 } else {
802 if (! count) {
803 /* Some mobos report count = 0 on the DMA boundary,
804 * i.e. count = size indeed.
805 * Let's check whether this step is above the expected size.
806 */
807 int delta = res - viadev->lastpos;
808 if (delta < 0)
809 delta += viadev->bufsize;
810 if ((unsigned int)delta > viadev->fragsize)
811 res = base;
812 }
813 if (check_invalid_pos(viadev, res)) {
814#ifdef POINTER_DEBUG
59d3acfa
TI		 815 dev_dbg(chip->card->dev,
816 "fail: idx = %i/%i, lastpos = 0x%x, bufsize2 = 0x%x, offsize = 0x%x, size = 0x%x, count = 0x%x\n",
817 idx, viadev->tbl_entries,
e437e3d7
TI		 818 viadev->lastpos, viadev->bufsize2,
819 viadev->idx_table[idx].offset,
820 viadev->idx_table[idx].size, count);
1da177e4
LT		 821#endif
822 /* count register returns full size when end of buffer is reached */
823 res = base + size;
824 if (check_invalid_pos(viadev, res)) {
59d3acfa
TI		 825 dev_dbg(chip->card->dev,
826 "invalid via82xx_cur_ptr (2), using last valid pointer\n");
1da177e4
LT		 827 res = viadev->lastpos;
828 }
829 }
830 }
1da177e4
LT		 831 return res;
832}
833
834/*
835 * get the current pointer on via686
836 */
e437e3d7 837static snd_pcm_uframes_t snd_via686_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 838{
e437e3d7
TI		 839 struct via82xx *chip = snd_pcm_substream_chip(substream);
840 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 841 unsigned int idx, ptr, count, res;
842
da3cec35
TI		 843 if (snd_BUG_ON(!viadev->tbl_entries))
844 return 0;
1da177e4
LT		 845 if (!(inb(VIADEV_REG(viadev, OFFSET_STATUS)) & VIA_REG_STAT_ACTIVE))
846 return 0;
847
848 spin_lock(&chip->reg_lock);
849 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)) & 0xffffff;
850 /* The via686a does not have the current index register,
851 * so we need to calculate the index from CURR_PTR.
852 */
853 ptr = inl(VIADEV_REG(viadev, OFFSET_CURR_PTR));
854 if (ptr <= (unsigned int)viadev->table.addr)
855 idx = 0;
856 else /* CURR_PTR holds the address + 8 */
857 idx = ((ptr - (unsigned int)viadev->table.addr) / 8 - 1) % viadev->tbl_entries;
59d3acfa 858 res = calc_linear_pos(chip, viadev, idx, count);
4f550df5 859 viadev->lastpos = res; /* remember the last position */
1da177e4
LT		 860 spin_unlock(&chip->reg_lock);
861
862 return bytes_to_frames(substream->runtime, res);
863}
864
865/*
866 * get the current pointer on via823x
867 */
e437e3d7 868static snd_pcm_uframes_t snd_via8233_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 869{
e437e3d7
TI		 870 struct via82xx *chip = snd_pcm_substream_chip(substream);
871 struct viadev *viadev = substream->runtime->private_data;
1da177e4 872 unsigned int idx, count, res;
4f550df5 873 int status;
1da177e4 874
da3cec35
TI		 875 if (snd_BUG_ON(!viadev->tbl_entries))
876 return 0;
4f550df5 877
1da177e4 878 spin_lock(&chip->reg_lock);
4f550df5
KW		 879 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT));
880 status = viadev->in_interrupt;
881 if (!status)
882 status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
883
c6cc0e3b
BJ		 884 /* An apparent bug in the 8251 is worked around by sending a
885 * REG_CTRL_START. */
886 if (chip->revision == VIA_REV_8251 && (status & VIA_REG_STAT_EOL))
887 snd_via82xx_pcm_trigger(substream, SNDRV_PCM_TRIGGER_START);
888
4f550df5 889 if (!(status & VIA_REG_STAT_ACTIVE)) {
c6cc0e3b
BJ		 890 res = 0;
891 goto unlock;
4f550df5
KW		 892 }
893 if (count & 0xffffff) {
894 idx = count >> 24;
895 if (idx >= viadev->tbl_entries) {
1da177e4 896#ifdef POINTER_DEBUG
59d3acfa
TI		 897 dev_dbg(chip->card->dev,
898 "fail: invalid idx = %i/%i\n", idx,
e437e3d7 899 viadev->tbl_entries);
1da177e4 900#endif
4f550df5
KW		 901 res = viadev->lastpos;
902 } else {
903 count &= 0xffffff;
59d3acfa 904 res = calc_linear_pos(chip, viadev, idx, count);
4f550df5 905 }
1da177e4 906 } else {
4f550df5
KW		 907 res = viadev->hwptr_done;
908 if (!viadev->in_interrupt) {
909 if (status & VIA_REG_STAT_EOL) {
910 res = 0;
911 } else
912 if (status & VIA_REG_STAT_FLAG) {
913 res += viadev->fragsize;
914 }
915 }
916 }
917unlock:
918 viadev->lastpos = res;
1da177e4
LT		 919 spin_unlock(&chip->reg_lock);
920
921 return bytes_to_frames(substream->runtime, res);
922}
923
924
925/*
926 * hw_params callback:
927 * allocate the buffer and build up the buffer description table
928 */
e437e3d7
TI		 929static int snd_via82xx_hw_params(struct snd_pcm_substream *substream,
930 struct snd_pcm_hw_params *hw_params)
1da177e4 931{
e437e3d7
TI		 932 struct via82xx *chip = snd_pcm_substream_chip(substream);
933 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 934 int err;
935
936 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
937 if (err < 0)
938 return err;
939 err = build_via_table(viadev, substream, chip->pci,
940 params_periods(hw_params),
941 params_period_bytes(hw_params));
942 if (err < 0)
943 return err;
944
945 return 0;
946}
947
948/*
949 * hw_free callback:
950 * clean up the buffer description table and release the buffer
951 */
e437e3d7 952static int snd_via82xx_hw_free(struct snd_pcm_substream *substream)
1da177e4 953{
e437e3d7
TI		 954 struct via82xx *chip = snd_pcm_substream_chip(substream);
955 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 956
957 clean_via_table(viadev, substream, chip->pci);
958 snd_pcm_lib_free_pages(substream);
959 return 0;
960}
961
962
963/*
964 * set up the table pointer
965 */
e437e3d7 966static void snd_via82xx_set_table_ptr(struct via82xx *chip, struct viadev *viadev)
1da177e4
LT		 967{
968 snd_via82xx_codec_ready(chip, 0);
969 outl((u32)viadev->table.addr, VIADEV_REG(viadev, OFFSET_TABLE_PTR));
970 udelay(20);
971 snd_via82xx_codec_ready(chip, 0);
972}
973
974/*
975 * prepare callback for playback and capture on via686
976 */
e437e3d7
TI		 977static void via686_setup_format(struct via82xx *chip, struct viadev *viadev,
978 struct snd_pcm_runtime *runtime)
1da177e4
LT		 979{
980 snd_via82xx_channel_reset(chip, viadev);
981 /* this must be set after channel_reset */
982 snd_via82xx_set_table_ptr(chip, viadev);
983 outb(VIA_REG_TYPE_AUTOSTART |
984 (runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA_REG_TYPE_16BIT : 0) |
985 (runtime->channels > 1 ? VIA_REG_TYPE_STEREO : 0) |
986 ((viadev->reg_offset & 0x10) == 0 ? VIA_REG_TYPE_INT_LSAMPLE : 0) |
987 VIA_REG_TYPE_INT_EOL |
988 VIA_REG_TYPE_INT_FLAG, VIADEV_REG(viadev, OFFSET_TYPE));
989}
990
e437e3d7 991static int snd_via686_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 992{
e437e3d7
TI		 993 struct via82xx *chip = snd_pcm_substream_chip(substream);
994 struct viadev *viadev = substream->runtime->private_data;
995 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 996
997 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
998 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
999 via686_setup_format(chip, viadev, runtime);
1000 return 0;
1001}
1002
e437e3d7 1003static int snd_via686_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 1004{
e437e3d7
TI		 1005 struct via82xx *chip = snd_pcm_substream_chip(substream);
1006 struct viadev *viadev = substream->runtime->private_data;
1007 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1008
1009 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
1010 via686_setup_format(chip, viadev, runtime);
1011 return 0;
1012}
1013
1014/*
1015 * lock the current rate
1016 */
1017static int via_lock_rate(struct via_rate_lock *rec, int rate)
1018{
1019 int changed = 0;
1020
1021 spin_lock_irq(&rec->lock);
1022 if (rec->rate != rate) {
1023 if (rec->rate && rec->used > 1) /* already set */
1024 changed = -EINVAL;
1025 else {
1026 rec->rate = rate;
1027 changed = 1;
1028 }
1029 }
1030 spin_unlock_irq(&rec->lock);
1031 return changed;
1032}
1033
1034/*
1035 * prepare callback for DSX playback on via823x
1036 */
e437e3d7 1037static int snd_via8233_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 1038{
e437e3d7
TI		 1039 struct via82xx *chip = snd_pcm_substream_chip(substream);
1040 struct viadev *viadev = substream->runtime->private_data;
1041 struct snd_pcm_runtime *runtime = substream->runtime;
2d7eb7cb 1042 int ac97_rate = chip->dxs_src ? 48000 : runtime->rate;
1da177e4
LT		 1043 int rate_changed;
1044 u32 rbits;
1045
2d7eb7cb 1046 if ((rate_changed = via_lock_rate(&chip->rates[0], ac97_rate)) < 0)
1da177e4 1047 return rate_changed;
16d3f140 1048 if (rate_changed)
1da177e4
LT		 1049 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
1050 chip->no_vra ? 48000 : runtime->rate);
16d3f140
TI		 1051 if (chip->spdif_on && viadev->reg_offset == 0x30)
1052 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
1053
1da177e4
LT		 1054 if (runtime->rate == 48000)
1055 rbits = 0xfffff;
1056 else
e437e3d7
TI		 1057 rbits = (0x100000 / 48000) * runtime->rate +
1058 ((0x100000 % 48000) * runtime->rate) / 48000;
da3cec35 1059 snd_BUG_ON(rbits & ~0xfffff);
1da177e4
LT		 1060 snd_via82xx_channel_reset(chip, viadev);
1061 snd_via82xx_set_table_ptr(chip, viadev);
e437e3d7
TI		 1062 outb(chip->playback_volume[viadev->reg_offset / 0x10][0],
1063 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_L));
1064 outb(chip->playback_volume[viadev->reg_offset / 0x10][1],
1065 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_R));
1da177e4
LT		 1066 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | /* format */
1067 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | /* stereo */
1068 rbits | /* rate */
1069 0xff000000, /* STOP index is never reached */
1070 VIADEV_REG(viadev, OFFSET_STOP_IDX));
1071 udelay(20);
1072 snd_via82xx_codec_ready(chip, 0);
1073 return 0;
1074}
1075
1076/*
1077 * prepare callback for multi-channel playback on via823x
1078 */
e437e3d7 1079static int snd_via8233_multi_prepare(struct snd_pcm_substream *substream)
1da177e4 1080{
e437e3d7
TI		 1081 struct via82xx *chip = snd_pcm_substream_chip(substream);
1082 struct viadev *viadev = substream->runtime->private_data;
1083 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1084 unsigned int slots;
1085 int fmt;
1086
1087 if (via_lock_rate(&chip->rates[0], runtime->rate) < 0)
1088 return -EINVAL;
1089 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
1090 snd_ac97_set_rate(chip->ac97, AC97_PCM_SURR_DAC_RATE, runtime->rate);
1091 snd_ac97_set_rate(chip->ac97, AC97_PCM_LFE_DAC_RATE, runtime->rate);
1092 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
1093 snd_via82xx_channel_reset(chip, viadev);
1094 snd_via82xx_set_table_ptr(chip, viadev);
1095
e437e3d7
TI		 1096 fmt = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ?
1097 VIA_REG_MULTPLAY_FMT_16BIT : VIA_REG_MULTPLAY_FMT_8BIT;
1da177e4
LT		 1098 fmt |= runtime->channels << 4;
1099 outb(fmt, VIADEV_REG(viadev, OFS_MULTPLAY_FORMAT));
1100#if 0
1101 if (chip->revision == VIA_REV_8233A)
1102 slots = 0;
1103 else
1104#endif
1105 {
1106 /* set sample number to slot 3, 4, 7, 8, 6, 9 (for VIA8233/C,8235) */
1107 /* corresponding to FL, FR, RL, RR, C, LFE ?? */
1108 switch (runtime->channels) {
1109 case 1: slots = (1<<0) | (1<<4); break;
1110 case 2: slots = (1<<0) | (2<<4); break;
1111 case 3: slots = (1<<0) | (2<<4) | (5<<8); break;
1112 case 4: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12); break;
1113 case 5: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16); break;
1114 case 6: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16) | (6<<20); break;
1115 default: slots = 0; break;
1116 }
1117 }
1118 /* STOP index is never reached */
1119 outl(0xff000000 | slots, VIADEV_REG(viadev, OFFSET_STOP_IDX));
1120 udelay(20);
1121 snd_via82xx_codec_ready(chip, 0);
1122 return 0;
1123}
1124
1125/*
1126 * prepare callback for capture on via823x
1127 */
e437e3d7 1128static int snd_via8233_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 1129{
e437e3d7
TI		 1130 struct via82xx *chip = snd_pcm_substream_chip(substream);
1131 struct viadev *viadev = substream->runtime->private_data;
1132 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1133
1134 if (via_lock_rate(&chip->rates[1], runtime->rate) < 0)
1135 return -EINVAL;
1136 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
1137 snd_via82xx_channel_reset(chip, viadev);
1138 snd_via82xx_set_table_ptr(chip, viadev);
1139 outb(VIA_REG_CAPTURE_FIFO_ENABLE, VIADEV_REG(viadev, OFS_CAPTURE_FIFO));
1140 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) |
1141 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) |
1142 0xff000000, /* STOP index is never reached */
1143 VIADEV_REG(viadev, OFFSET_STOP_IDX));
1144 udelay(20);
1145 snd_via82xx_codec_ready(chip, 0);
1146 return 0;
1147}
1148
1149
1150/*
1151 * pcm hardware definition, identical for both playback and capture
1152 */
e437e3d7 1153static struct snd_pcm_hardware snd_via82xx_hw =
1da177e4
LT		 1154{
1155 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1156 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1157 SNDRV_PCM_INFO_MMAP_VALID |
41e4845c 1158 /* SNDRV_PCM_INFO_RESUME | */
1da177e4
LT		 1159 SNDRV_PCM_INFO_PAUSE),
1160 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
1161 .rates = SNDRV_PCM_RATE_48000,
1162 .rate_min = 48000,
1163 .rate_max = 48000,
1164 .channels_min = 1,
1165 .channels_max = 2,
5503600a 1166 .buffer_bytes_max = VIA_MAX_BUFSIZE,
1da177e4 1167 .period_bytes_min = 32,
5503600a 1168 .period_bytes_max = VIA_MAX_BUFSIZE / 2,
1da177e4
LT		 1169 .periods_min = 2,
1170 .periods_max = VIA_TABLE_SIZE / 2,
1171 .fifo_size = 0,
1172};
1173
1174
1175/*
1176 * open callback skeleton
1177 */
e437e3d7
TI		 1178static int snd_via82xx_pcm_open(struct via82xx *chip, struct viadev *viadev,
1179 struct snd_pcm_substream *substream)
1da177e4 1180{
e437e3d7 1181 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1182 int err;
1183 struct via_rate_lock *ratep;
5495ffbd 1184 bool use_src = false;
1da177e4
LT		 1185
1186 runtime->hw = snd_via82xx_hw;
1187
1188 /* set the hw rate condition */
1189 ratep = &chip->rates[viadev->direction];
1190 spin_lock_irq(&ratep->lock);
1191 ratep->used++;
1192 if (chip->spdif_on && viadev->reg_offset == 0x30) {
1193 /* DXS#3 and spdif is on */
1194 runtime->hw.rates = chip->ac97->rates[AC97_RATES_SPDIF];
1195 snd_pcm_limit_hw_rates(runtime);
1196 } else if (chip->dxs_fixed && viadev->reg_offset < 0x40) {
1197 /* fixed DXS playback rate */
1198 runtime->hw.rates = SNDRV_PCM_RATE_48000;
1199 runtime->hw.rate_min = runtime->hw.rate_max = 48000;
2d7eb7cb
SV		 1200 } else if (chip->dxs_src && viadev->reg_offset < 0x40) {
1201 /* use full SRC capabilities of DXS */
1202 runtime->hw.rates = (SNDRV_PCM_RATE_CONTINUOUS |
1203 SNDRV_PCM_RATE_8000_48000);
1204 runtime->hw.rate_min = 8000;
1205 runtime->hw.rate_max = 48000;
5495ffbd 1206 use_src = true;
1da177e4
LT		 1207 } else if (! ratep->rate) {
1208 int idx = viadev->direction ? AC97_RATES_ADC : AC97_RATES_FRONT_DAC;
1209 runtime->hw.rates = chip->ac97->rates[idx];
1210 snd_pcm_limit_hw_rates(runtime);
1211 } else {
1212 /* a fixed rate */
1213 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
1214 runtime->hw.rate_max = runtime->hw.rate_min = ratep->rate;
1215 }
1216 spin_unlock_irq(&ratep->lock);
1217
1218 /* we may remove following constaint when we modify table entries
1219 in interrupt */
1220 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1221 return err;
1222
5495ffbd
CL		 1223 if (use_src) {
1224 err = snd_pcm_hw_rule_noresample(runtime, 48000);
1225 if (err < 0)
1226 return err;
1227 }
1228
1da177e4
LT		 1229 runtime->private_data = viadev;
1230 viadev->substream = substream;
1231
1232 return 0;
1233}
1234
1235
1236/*
3d009413 1237 * open callback for playback on via686
1da177e4 1238 */
3d009413 1239static int snd_via686_playback_open(struct snd_pcm_substream *substream)
1da177e4 1240{
e437e3d7
TI		 1241 struct via82xx *chip = snd_pcm_substream_chip(substream);
1242 struct viadev *viadev = &chip->devs[chip->playback_devno + substream->number];
1da177e4
LT		 1243 int err;
1244
1245 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1246 return err;
1247 return 0;
1248}
1249
3d009413
CL		 1250/*
1251 * open callback for playback on via823x DXS
1252 */
1253static int snd_via8233_playback_open(struct snd_pcm_substream *substream)
1254{
1255 struct via82xx *chip = snd_pcm_substream_chip(substream);
1256 struct viadev *viadev;
1257 unsigned int stream;
1258 int err;
1259
1260 viadev = &chip->devs[chip->playback_devno + substream->number];
1261 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1262 return err;
1263 stream = viadev->reg_offset / 0x10;
1264 if (chip->dxs_controls[stream]) {
395c61d1
CL		 1265 chip->playback_volume[stream][0] =
1266 VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31);
1267 chip->playback_volume[stream][1] =
1268 VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31);
3d009413
CL		 1269 chip->dxs_controls[stream]->vd[0].access &=
1270 ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1271 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1272 SNDRV_CTL_EVENT_MASK_INFO,
1273 &chip->dxs_controls[stream]->id);
1274 }
1275 return 0;
1276}
1277
1da177e4
LT		 1278/*
1279 * open callback for playback on via823x multi-channel
1280 */
e437e3d7 1281static int snd_via8233_multi_open(struct snd_pcm_substream *substream)
1da177e4 1282{
e437e3d7
TI		 1283 struct via82xx *chip = snd_pcm_substream_chip(substream);
1284 struct viadev *viadev = &chip->devs[chip->multi_devno];
1da177e4
LT		 1285 int err;
1286 /* channels constraint for VIA8233A
1287 * 3 and 5 channels are not supported
1288 */
1289 static unsigned int channels[] = {
1290 1, 2, 4, 6
1291 };
e437e3d7 1292 static struct snd_pcm_hw_constraint_list hw_constraints_channels = {
1da177e4
LT		 1293 .count = ARRAY_SIZE(channels),
1294 .list = channels,
1295 .mask = 0,
1296 };
1297
1298 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1299 return err;
1300 substream->runtime->hw.channels_max = 6;
1301 if (chip->revision == VIA_REV_8233A)
e437e3d7
TI		 1302 snd_pcm_hw_constraint_list(substream->runtime, 0,
1303 SNDRV_PCM_HW_PARAM_CHANNELS,
1304 &hw_constraints_channels);
1da177e4
LT		 1305 return 0;
1306}
1307
1308/*
1309 * open callback for capture on via686 and via823x
1310 */
e437e3d7 1311static int snd_via82xx_capture_open(struct snd_pcm_substream *substream)
1da177e4 1312{
e437e3d7
TI		 1313 struct via82xx *chip = snd_pcm_substream_chip(substream);
1314 struct viadev *viadev = &chip->devs[chip->capture_devno + substream->pcm->device];
1da177e4
LT		 1315
1316 return snd_via82xx_pcm_open(chip, viadev, substream);
1317}
1318
1319/*
1320 * close callback
1321 */
e437e3d7 1322static int snd_via82xx_pcm_close(struct snd_pcm_substream *substream)
1da177e4 1323{
e437e3d7
TI		 1324 struct via82xx *chip = snd_pcm_substream_chip(substream);
1325 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 1326 struct via_rate_lock *ratep;
1327
1328 /* release the rate lock */
1329 ratep = &chip->rates[viadev->direction];
1330 spin_lock_irq(&ratep->lock);
1331 ratep->used--;
1332 if (! ratep->used)
1333 ratep->rate = 0;
1334 spin_unlock_irq(&ratep->lock);
6dbe6628
TI		 1335 if (! ratep->rate) {
1336 if (! viadev->direction) {
1337 snd_ac97_update_power(chip->ac97,
1338 AC97_PCM_FRONT_DAC_RATE, 0);
1339 snd_ac97_update_power(chip->ac97,
1340 AC97_PCM_SURR_DAC_RATE, 0);
1341 snd_ac97_update_power(chip->ac97,
1342 AC97_PCM_LFE_DAC_RATE, 0);
1343 } else
1344 snd_ac97_update_power(chip->ac97,
1345 AC97_PCM_LR_ADC_RATE, 0);
1346 }
1da177e4
LT		 1347 viadev->substream = NULL;
1348 return 0;
1349}
1350
3d009413
CL		 1351static int snd_via8233_playback_close(struct snd_pcm_substream *substream)
1352{
1353 struct via82xx *chip = snd_pcm_substream_chip(substream);
1354 struct viadev *viadev = substream->runtime->private_data;
1355 unsigned int stream;
1356
1357 stream = viadev->reg_offset / 0x10;
1358 if (chip->dxs_controls[stream]) {
1359 chip->dxs_controls[stream]->vd[0].access |=
1360 SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1361 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO,
1362 &chip->dxs_controls[stream]->id);
1363 }
1364 return snd_via82xx_pcm_close(substream);
1365}
1366
1da177e4
LT		 1367
1368/* via686 playback callbacks */
e437e3d7 1369static struct snd_pcm_ops snd_via686_playback_ops = {
3d009413 1370 .open = snd_via686_playback_open,
1da177e4
LT		 1371 .close = snd_via82xx_pcm_close,
1372 .ioctl = snd_pcm_lib_ioctl,
1373 .hw_params = snd_via82xx_hw_params,
1374 .hw_free = snd_via82xx_hw_free,
1375 .prepare = snd_via686_playback_prepare,
1376 .trigger = snd_via82xx_pcm_trigger,
1377 .pointer = snd_via686_pcm_pointer,
1378 .page = snd_pcm_sgbuf_ops_page,
1379};
1380
1381/* via686 capture callbacks */
e437e3d7 1382static struct snd_pcm_ops snd_via686_capture_ops = {
1da177e4
LT		 1383 .open = snd_via82xx_capture_open,
1384 .close = snd_via82xx_pcm_close,
1385 .ioctl = snd_pcm_lib_ioctl,
1386 .hw_params = snd_via82xx_hw_params,
1387 .hw_free = snd_via82xx_hw_free,
1388 .prepare = snd_via686_capture_prepare,
1389 .trigger = snd_via82xx_pcm_trigger,
1390 .pointer = snd_via686_pcm_pointer,
1391 .page = snd_pcm_sgbuf_ops_page,
1392};
1393
1394/* via823x DSX playback callbacks */
e437e3d7 1395static struct snd_pcm_ops snd_via8233_playback_ops = {
3d009413
CL		 1396 .open = snd_via8233_playback_open,
1397 .close = snd_via8233_playback_close,
1da177e4
LT		 1398 .ioctl = snd_pcm_lib_ioctl,
1399 .hw_params = snd_via82xx_hw_params,
1400 .hw_free = snd_via82xx_hw_free,
1401 .prepare = snd_via8233_playback_prepare,
1402 .trigger = snd_via82xx_pcm_trigger,
1403 .pointer = snd_via8233_pcm_pointer,
1404 .page = snd_pcm_sgbuf_ops_page,
1405};
1406
1407/* via823x multi-channel playback callbacks */
e437e3d7 1408static struct snd_pcm_ops snd_via8233_multi_ops = {
1da177e4
LT		 1409 .open = snd_via8233_multi_open,
1410 .close = snd_via82xx_pcm_close,
1411 .ioctl = snd_pcm_lib_ioctl,
1412 .hw_params = snd_via82xx_hw_params,
1413 .hw_free = snd_via82xx_hw_free,
1414 .prepare = snd_via8233_multi_prepare,
1415 .trigger = snd_via82xx_pcm_trigger,
1416 .pointer = snd_via8233_pcm_pointer,
1417 .page = snd_pcm_sgbuf_ops_page,
1418};
1419
1420/* via823x capture callbacks */
e437e3d7 1421static struct snd_pcm_ops snd_via8233_capture_ops = {
1da177e4
LT		 1422 .open = snd_via82xx_capture_open,
1423 .close = snd_via82xx_pcm_close,
1424 .ioctl = snd_pcm_lib_ioctl,
1425 .hw_params = snd_via82xx_hw_params,
1426 .hw_free = snd_via82xx_hw_free,
1427 .prepare = snd_via8233_capture_prepare,
1428 .trigger = snd_via82xx_pcm_trigger,
1429 .pointer = snd_via8233_pcm_pointer,
1430 .page = snd_pcm_sgbuf_ops_page,
1431};
1432
1433
e437e3d7
TI		 1434static void init_viadev(struct via82xx *chip, int idx, unsigned int reg_offset,
1435 int shadow_pos, int direction)
1da177e4
LT		 1436{
1437 chip->devs[idx].reg_offset = reg_offset;
4f550df5 1438 chip->devs[idx].shadow_shift = shadow_pos * 4;
1da177e4
LT		 1439 chip->devs[idx].direction = direction;
1440 chip->devs[idx].port = chip->port + reg_offset;
1441}
1442
1443/*
1444 * create pcm instances for VIA8233, 8233C and 8235 (not 8233A)
1445 */
e23e7a14 1446static int snd_via8233_pcm_new(struct via82xx *chip)
1da177e4 1447{
e437e3d7 1448 struct snd_pcm *pcm;
e36e3b86 1449 struct snd_pcm_chmap *chmap;
1da177e4
LT		 1450 int i, err;
1451
1452 chip->playback_devno = 0; /* x 4 */
1453 chip->multi_devno = 4; /* x 1 */
1454 chip->capture_devno = 5; /* x 2 */
1455 chip->num_devs = 7;
1456 chip->intr_mask = 0x33033333; /* FLAG|EOL for rec0-1, mc, sdx0-3 */
1457
1458 /* PCM #0: 4 DSX playbacks and 1 capture */
1459 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 4, 1, &pcm);
1460 if (err < 0)
1461 return err;
1462 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
1463 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1464 pcm->private_data = chip;
1465 strcpy(pcm->name, chip->card->shortname);
1466 chip->pcms[0] = pcm;
1467 /* set up playbacks */
1468 for (i = 0; i < 4; i++)
4f550df5 1469 init_viadev(chip, i, 0x10 * i, i, 0);
1da177e4 1470 /* capture */
4f550df5 1471 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
1da177e4 1472
a2e3961d
TI		 1473 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1474 snd_dma_pci_data(chip->pci),
5503600a 1475 64*1024, VIA_MAX_BUFSIZE);
1da177e4 1476
e36e3b86
TI		 1477 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1478 snd_pcm_std_chmaps, 2, 0,
1479 &chmap);
1480 if (err < 0)
1481 return err;
1482
1da177e4
LT		 1483 /* PCM #1: multi-channel playback and 2nd capture */
1484 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 1, &pcm);
1485 if (err < 0)
1486 return err;
1487 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
1488 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1489 pcm->private_data = chip;
1490 strcpy(pcm->name, chip->card->shortname);
1491 chip->pcms[1] = pcm;
1492 /* set up playback */
4f550df5 1493 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
1da177e4 1494 /* set up capture */
4f550df5 1495 init_viadev(chip, chip->capture_devno + 1, VIA_REG_CAPTURE_8233_STATUS + 0x10, 7, 1);
1da177e4 1496
a2e3961d
TI		 1497 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1498 snd_dma_pci_data(chip->pci),
5503600a 1499 64*1024, VIA_MAX_BUFSIZE);
e36e3b86
TI		 1500
1501 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1502 snd_pcm_alt_chmaps, 6, 0,
1503 &chmap);
1504 if (err < 0)
1505 return err;
1506 chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
1507
1da177e4
LT		 1508 return 0;
1509}
1510
1511/*
1512 * create pcm instances for VIA8233A
1513 */
e23e7a14 1514static int snd_via8233a_pcm_new(struct via82xx *chip)
1da177e4 1515{
e437e3d7 1516 struct snd_pcm *pcm;
e36e3b86 1517 struct snd_pcm_chmap *chmap;
1da177e4
LT		 1518 int err;
1519
1520 chip->multi_devno = 0;
1521 chip->playback_devno = 1;
1522 chip->capture_devno = 2;
1523 chip->num_devs = 3;
1524 chip->intr_mask = 0x03033000; /* FLAG|EOL for rec0, mc, sdx3 */
1525
1526 /* PCM #0: multi-channel playback and capture */
1527 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
1528 if (err < 0)
1529 return err;
1530 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
1531 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1532 pcm->private_data = chip;
1533 strcpy(pcm->name, chip->card->shortname);
1534 chip->pcms[0] = pcm;
1535 /* set up playback */
4f550df5 1536 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
1da177e4 1537 /* capture */
4f550df5 1538 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
1da177e4 1539
a2e3961d
TI		 1540 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1541 snd_dma_pci_data(chip->pci),
5503600a 1542 64*1024, VIA_MAX_BUFSIZE);
1da177e4 1543
e36e3b86
TI		 1544 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1545 snd_pcm_alt_chmaps, 6, 0,
1546 &chmap);
1547 if (err < 0)
1548 return err;
1549 chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
1550
1da177e4
LT		 1551 /* SPDIF supported? */
1552 if (! ac97_can_spdif(chip->ac97))
1553 return 0;
1554
1555 /* PCM #1: DXS3 playback (for spdif) */
1556 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 0, &pcm);
1557 if (err < 0)
1558 return err;
1559 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
1560 pcm->private_data = chip;
1561 strcpy(pcm->name, chip->card->shortname);
1562 chip->pcms[1] = pcm;
1563 /* set up playback */
4f550df5 1564 init_viadev(chip, chip->playback_devno, 0x30, 3, 0);
1da177e4 1565
a2e3961d
TI		 1566 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1567 snd_dma_pci_data(chip->pci),
5503600a 1568 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1569 return 0;
1570}
1571
1572/*
1573 * create a pcm instance for via686a/b
1574 */
e23e7a14 1575static int snd_via686_pcm_new(struct via82xx *chip)
1da177e4 1576{
e437e3d7 1577 struct snd_pcm *pcm;
1da177e4
LT		 1578 int err;
1579
1580 chip->playback_devno = 0;
1581 chip->capture_devno = 1;
1582 chip->num_devs = 2;
1583 chip->intr_mask = 0x77; /* FLAG | EOL for PB, CP, FM */
1584
1585 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
1586 if (err < 0)
1587 return err;
1588 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via686_playback_ops);
1589 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via686_capture_ops);
1590 pcm->private_data = chip;
1591 strcpy(pcm->name, chip->card->shortname);
1592 chip->pcms[0] = pcm;
4f550df5
KW		 1593 init_viadev(chip, 0, VIA_REG_PLAYBACK_STATUS, 0, 0);
1594 init_viadev(chip, 1, VIA_REG_CAPTURE_STATUS, 0, 1);
1da177e4 1595
a2e3961d
TI		 1596 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1597 snd_dma_pci_data(chip->pci),
5503600a 1598 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1599 return 0;
1600}
1601
1602
1603/*
1604 * Mixer part
1605 */
1606
e437e3d7
TI		 1607static int snd_via8233_capture_source_info(struct snd_kcontrol *kcontrol,
1608 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1609{
1610 /* formerly they were "Line" and "Mic", but it looks like that they
1611 * have nothing to do with the actual physical connections...
1612 */
1613 static char *texts[2] = {
1614 "Input1", "Input2"
1615 };
1616 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1617 uinfo->count = 1;
1618 uinfo->value.enumerated.items = 2;
1619 if (uinfo->value.enumerated.item >= 2)
1620 uinfo->value.enumerated.item = 1;
1621 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1622 return 0;
1623}
1624
e437e3d7
TI		 1625static int snd_via8233_capture_source_get(struct snd_kcontrol *kcontrol,
1626 struct snd_ctl_elem_value *ucontrol)
1da177e4 1627{
e437e3d7 1628 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1629 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
1630 ucontrol->value.enumerated.item[0] = inb(port) & VIA_REG_CAPTURE_CHANNEL_MIC ? 1 : 0;
1631 return 0;
1632}
1633
e437e3d7
TI		 1634static int snd_via8233_capture_source_put(struct snd_kcontrol *kcontrol,
1635 struct snd_ctl_elem_value *ucontrol)
1da177e4 1636{
e437e3d7 1637 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1638 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
1639 u8 val, oval;
1640
1641 spin_lock_irq(&chip->reg_lock);
1642 oval = inb(port);
1643 val = oval & ~VIA_REG_CAPTURE_CHANNEL_MIC;
1644 if (ucontrol->value.enumerated.item[0])
1645 val |= VIA_REG_CAPTURE_CHANNEL_MIC;
1646 if (val != oval)
1647 outb(val, port);
1648 spin_unlock_irq(&chip->reg_lock);
1649 return val != oval;
1650}
1651
e23e7a14 1652static struct snd_kcontrol_new snd_via8233_capture_source = {
1da177e4
LT		 1653 .name = "Input Source Select",
1654 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1655 .info = snd_via8233_capture_source_info,
1656 .get = snd_via8233_capture_source_get,
1657 .put = snd_via8233_capture_source_put,
1658};
1659
a5ce8890 1660#define snd_via8233_dxs3_spdif_info snd_ctl_boolean_mono_info
1da177e4 1661
e437e3d7
TI		 1662static int snd_via8233_dxs3_spdif_get(struct snd_kcontrol *kcontrol,
1663 struct snd_ctl_elem_value *ucontrol)
1da177e4 1664{
e437e3d7 1665 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1666 u8 val;
1667
1668 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
1669 ucontrol->value.integer.value[0] = (val & VIA8233_SPDIF_DX3) ? 1 : 0;
1670 return 0;
1671}
1672
e437e3d7
TI		 1673static int snd_via8233_dxs3_spdif_put(struct snd_kcontrol *kcontrol,
1674 struct snd_ctl_elem_value *ucontrol)
1da177e4 1675{
e437e3d7 1676 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1677 u8 val, oval;
1678
1679 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &oval);
1680 val = oval & ~VIA8233_SPDIF_DX3;
1681 if (ucontrol->value.integer.value[0])
1682 val |= VIA8233_SPDIF_DX3;
1683 /* save the spdif flag for rate filtering */
1684 chip->spdif_on = ucontrol->value.integer.value[0] ? 1 : 0;
1685 if (val != oval) {
1686 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
1687 return 1;
1688 }
1689 return 0;
1690}
1691
e23e7a14 1692static struct snd_kcontrol_new snd_via8233_dxs3_spdif_control = {
10e8d78a 1693 .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
1da177e4
LT		 1694 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1695 .info = snd_via8233_dxs3_spdif_info,
1696 .get = snd_via8233_dxs3_spdif_get,
1697 .put = snd_via8233_dxs3_spdif_put,
1698};
1699
e437e3d7
TI		 1700static int snd_via8233_dxs_volume_info(struct snd_kcontrol *kcontrol,
1701 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1702{
1703 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1704 uinfo->count = 2;
1705 uinfo->value.integer.min = 0;
1706 uinfo->value.integer.max = VIA_DXS_MAX_VOLUME;
1707 return 0;
1708}
1709
e437e3d7
TI		 1710static int snd_via8233_dxs_volume_get(struct snd_kcontrol *kcontrol,
1711 struct snd_ctl_elem_value *ucontrol)
1da177e4 1712{
e437e3d7 1713 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
2fb930b5 1714 unsigned int idx = kcontrol->id.subdevice;
00f226d4
HM		 1715
1716 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][0];
1717 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][1];
1718 return 0;
1719}
1720
e437e3d7
TI		 1721static int snd_via8233_pcmdxs_volume_get(struct snd_kcontrol *kcontrol,
1722 struct snd_ctl_elem_value *ucontrol)
00f226d4 1723{
e437e3d7 1724 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
00f226d4
HM		 1725 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[0];
1726 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[1];
1da177e4
LT		 1727 return 0;
1728}
1729
e437e3d7
TI		 1730static int snd_via8233_dxs_volume_put(struct snd_kcontrol *kcontrol,
1731 struct snd_ctl_elem_value *ucontrol)
00f226d4 1732{
e437e3d7 1733 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
2fb930b5 1734 unsigned int idx = kcontrol->id.subdevice;
00f226d4
HM		 1735 unsigned long port = chip->port + 0x10 * idx;
1736 unsigned char val;
1737 int i, change = 0;
1738
1739 for (i = 0; i < 2; i++) {
1740 val = ucontrol->value.integer.value[i];
1741 if (val > VIA_DXS_MAX_VOLUME)
1742 val = VIA_DXS_MAX_VOLUME;
1743 val = VIA_DXS_MAX_VOLUME - val;
1744 change |= val != chip->playback_volume[idx][i];
1745 if (change) {
1746 chip->playback_volume[idx][i] = val;
1747 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
1748 }
1749 }
1750 return change;
1751}
1752
e437e3d7
TI		 1753static int snd_via8233_pcmdxs_volume_put(struct snd_kcontrol *kcontrol,
1754 struct snd_ctl_elem_value *ucontrol)
1da177e4 1755{
e437e3d7 1756 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1757 unsigned int idx;
1758 unsigned char val;
1759 int i, change = 0;
1760
1761 for (i = 0; i < 2; i++) {
1762 val = ucontrol->value.integer.value[i];
1763 if (val > VIA_DXS_MAX_VOLUME)
1764 val = VIA_DXS_MAX_VOLUME;
1765 val = VIA_DXS_MAX_VOLUME - val;
00f226d4 1766 if (val != chip->playback_volume_c[i]) {
1da177e4 1767 change = 1;
00f226d4 1768 chip->playback_volume_c[i] = val;
1da177e4
LT		 1769 for (idx = 0; idx < 4; idx++) {
1770 unsigned long port = chip->port + 0x10 * idx;
00f226d4 1771 chip->playback_volume[idx][i] = val;
1da177e4
LT		 1772 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
1773 }
1774 }
1775 }
1776 return change;
1777}
1778
b452e08e 1779static const DECLARE_TLV_DB_SCALE(db_scale_dxs, -4650, 150, 1);
7058c042 1780
e23e7a14 1781static struct snd_kcontrol_new snd_via8233_pcmdxs_volume_control = {
1da177e4
LT		 1782 .name = "PCM Playback Volume",
1783 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
7058c042
TI		 1784 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1785 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4 1786 .info = snd_via8233_dxs_volume_info,
00f226d4
HM		 1787 .get = snd_via8233_pcmdxs_volume_get,
1788 .put = snd_via8233_pcmdxs_volume_put,
7058c042 1789 .tlv = { .p = db_scale_dxs }
00f226d4
HM		 1790};
1791
e23e7a14 1792static struct snd_kcontrol_new snd_via8233_dxs_volume_control = {
2fb930b5
CL		 1793 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1794 .device = 0,
1795 /* .subdevice set later */
1796 .name = "PCM Playback Volume",
3d009413
CL		 1797 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1798 SNDRV_CTL_ELEM_ACCESS_TLV_READ |
1799 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
00f226d4 1800 .info = snd_via8233_dxs_volume_info,
1da177e4
LT		 1801 .get = snd_via8233_dxs_volume_get,
1802 .put = snd_via8233_dxs_volume_put,
7058c042 1803 .tlv = { .p = db_scale_dxs }
1da177e4
LT		 1804};
1805
1806/*
1807 */
1808
e437e3d7 1809static void snd_via82xx_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1810{
e437e3d7 1811 struct via82xx *chip = bus->private_data;
1da177e4
LT		 1812 chip->ac97_bus = NULL;
1813}
1814
e437e3d7 1815static void snd_via82xx_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1816{
e437e3d7 1817 struct via82xx *chip = ac97->private_data;
1da177e4
LT		 1818 chip->ac97 = NULL;
1819}
1820
1821static struct ac97_quirk ac97_quirks[] = {
1822 {
69ad07cf
JK		 1823 .subvendor = 0x1106,
1824 .subdevice = 0x4161,
1da177e4
LT		 1825 .codec_id = 0x56494161, /* VT1612A */
1826 .name = "Soltek SL-75DRV5",
1827 .type = AC97_TUNE_NONE
1828 },
1829 { /* FIXME: which codec? */
69ad07cf
JK		 1830 .subvendor = 0x1106,
1831 .subdevice = 0x4161,
1da177e4
LT		 1832 .name = "ASRock K7VT2",
1833 .type = AC97_TUNE_HP_ONLY
1834 },
bf30a430
CL		 1835 {
1836 .subvendor = 0x110a,
1837 .subdevice = 0x0079,
1838 .name = "Fujitsu Siemens D1289",
1839 .type = AC97_TUNE_HP_ONLY
1840 },
1da177e4 1841 {
69ad07cf
JK		 1842 .subvendor = 0x1019,
1843 .subdevice = 0x0a81,
1da177e4
LT		 1844 .name = "ECS K7VTA3",
1845 .type = AC97_TUNE_HP_ONLY
1846 },
1847 {
69ad07cf
JK		 1848 .subvendor = 0x1019,
1849 .subdevice = 0x0a85,
1da177e4
LT		 1850 .name = "ECS L7VMM2",
1851 .type = AC97_TUNE_HP_ONLY
1852 },
942fd1eb
WS		 1853 {
1854 .subvendor = 0x1019,
1855 .subdevice = 0x1841,
1856 .name = "ECS K7VTA3",
1857 .type = AC97_TUNE_HP_ONLY
1858 },
1da177e4 1859 {
69ad07cf
JK		 1860 .subvendor = 0x1849,
1861 .subdevice = 0x3059,
1da177e4
LT		 1862 .name = "ASRock K7VM2",
1863 .type = AC97_TUNE_HP_ONLY /* VT1616 */
1864 },
1865 {
69ad07cf
JK		 1866 .subvendor = 0x14cd,
1867 .subdevice = 0x7002,
1da177e4
LT		 1868 .name = "Unknown",
1869 .type = AC97_TUNE_ALC_JACK
1870 },
1871 {
69ad07cf
JK		 1872 .subvendor = 0x1071,
1873 .subdevice = 0x8590,
1da177e4
LT		 1874 .name = "Mitac Mobo",
1875 .type = AC97_TUNE_ALC_JACK
1876 },
1877 {
69ad07cf
JK		 1878 .subvendor = 0x161f,
1879 .subdevice = 0x202b,
1da177e4
LT		 1880 .name = "Arima Notebook",
1881 .type = AC97_TUNE_HP_ONLY,
1882 },
dac8dddd
TI		 1883 {
1884 .subvendor = 0x161f,
1885 .subdevice = 0x2032,
1886 .name = "Targa Traveller 811",
1887 .type = AC97_TUNE_HP_ONLY,
1888 },
d4199f01
DC		 1889 {
1890 .subvendor = 0x161f,
1891 .subdevice = 0x2032,
1892 .name = "m680x",
1893 .type = AC97_TUNE_HP_ONLY, /* http://launchpad.net/bugs/38546 */
1894 },
9674513d
TI		 1895 {
1896 .subvendor = 0x1297,
1897 .subdevice = 0xa232,
1898 .name = "Shuttle AK32VN",
1899 .type = AC97_TUNE_HP_ONLY
1900 },
1da177e4
LT		 1901 { } /* terminator */
1902};
1903
e23e7a14 1904static int snd_via82xx_mixer_new(struct via82xx *chip, const char *quirk_override)
1da177e4 1905{
e437e3d7 1906 struct snd_ac97_template ac97;
1da177e4 1907 int err;
e437e3d7 1908 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1909 .write = snd_via82xx_codec_write,
1910 .read = snd_via82xx_codec_read,
1911 .wait = snd_via82xx_codec_wait,
1912 };
1913
1914 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1915 return err;
1916 chip->ac97_bus->private_free = snd_via82xx_mixer_free_ac97_bus;
1917 chip->ac97_bus->clock = chip->ac97_clock;
1da177e4
LT		 1918
1919 memset(&ac97, 0, sizeof(ac97));
1920 ac97.private_data = chip;
1921 ac97.private_free = snd_via82xx_mixer_free_ac97;
1922 ac97.pci = chip->pci;
f1a63a38 1923 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
1da177e4
LT		 1924 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1925 return err;
1926
1927 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
1928
1929 if (chip->chip_type != TYPE_VIA686) {
1930 /* use slot 10/11 */
1931 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
1932 }
1933
1934 return 0;
1935}
1936
1937#ifdef SUPPORT_JOYSTICK
1938#define JOYSTICK_ADDR 0x200
e23e7a14 1939static int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
1da177e4
LT		 1940{
1941 struct gameport *gp;
1942 struct resource *r;
1943
b7fe4622 1944 if (!joystick)
1da177e4
LT		 1945 return -ENODEV;
1946
1947 r = request_region(JOYSTICK_ADDR, 8, "VIA686 gameport");
1948 if (!r) {
59d3acfa 1949 dev_warn(chip->card->dev, "cannot reserve joystick port %#x\n",
e437e3d7 1950 JOYSTICK_ADDR);
1da177e4
LT		 1951 return -EBUSY;
1952 }
1953
1954 chip->gameport = gp = gameport_allocate_port();
1955 if (!gp) {
59d3acfa
TI		 1956 dev_err(chip->card->dev,
1957 "cannot allocate memory for gameport\n");
b1d5776d 1958 release_and_free_resource(r);
1da177e4
LT		 1959 return -ENOMEM;
1960 }
1961
1962 gameport_set_name(gp, "VIA686 Gameport");
1963 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1964 gameport_set_dev_parent(gp, &chip->pci->dev);
1965 gp->io = JOYSTICK_ADDR;
1966 gameport_set_port_data(gp, r);
1967
1968 /* Enable legacy joystick port */
1969 *legacy |= VIA_FUNC_ENABLE_GAME;
1970 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, *legacy);
1971
1972 gameport_register_port(chip->gameport);
1973
1974 return 0;
1975}
1976
e437e3d7 1977static void snd_via686_free_gameport(struct via82xx *chip)
1da177e4
LT		 1978{
1979 if (chip->gameport) {
1980 struct resource *r = gameport_get_port_data(chip->gameport);
1981
1982 gameport_unregister_port(chip->gameport);
1983 chip->gameport = NULL;
b1d5776d 1984 release_and_free_resource(r);
1da177e4
LT		 1985 }
1986}
1987#else
e437e3d7 1988static inline int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
1da177e4
LT		 1989{
1990 return -ENOSYS;
1991}
e437e3d7 1992static inline void snd_via686_free_gameport(struct via82xx *chip) { }
1da177e4
LT		 1993#endif
1994
1995
1996/*
1997 *
1998 */
1999
e23e7a14 2000static int snd_via8233_init_misc(struct via82xx *chip)
1da177e4
LT		 2001{
2002 int i, err, caps;
2003 unsigned char val;
2004
2005 caps = chip->chip_type == TYPE_VIA8233A ? 1 : 2;
2006 for (i = 0; i < caps; i++) {
2007 snd_via8233_capture_source.index = i;
2008 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_capture_source, chip));
2009 if (err < 0)
2010 return err;
2011 }
2012 if (ac97_can_spdif(chip->ac97)) {
2013 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs3_spdif_control, chip));
2014 if (err < 0)
2015 return err;
2016 }
2017 if (chip->chip_type != TYPE_VIA8233A) {
2018 /* when no h/w PCM volume control is found, use DXS volume control
2019 * as the PCM vol control
2020 */
e437e3d7 2021 struct snd_ctl_elem_id sid;
1da177e4
LT		 2022 memset(&sid, 0, sizeof(sid));
2023 strcpy(sid.name, "PCM Playback Volume");
2024 sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
2025 if (! snd_ctl_find_id(chip->card, &sid)) {
59d3acfa
TI		 2026 dev_info(chip->card->dev,
2027 "Using DXS as PCM Playback\n");
00f226d4
HM		 2028 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_pcmdxs_volume_control, chip));
2029 if (err < 0)
2030 return err;
2031 }
2032 else /* Using DXS when PCM emulation is enabled is really weird */
2033 {
2fb930b5
CL		 2034 for (i = 0; i < 4; ++i) {
2035 struct snd_kcontrol *kctl;
2036
2037 kctl = snd_ctl_new1(
2038 &snd_via8233_dxs_volume_control, chip);
2039 if (!kctl)
2040 return -ENOMEM;
2041 kctl->id.subdevice = i;
2042 err = snd_ctl_add(chip->card, kctl);
2043 if (err < 0)
2044 return err;
3d009413 2045 chip->dxs_controls[i] = kctl;
2fb930b5 2046 }
1da177e4
LT		 2047 }
2048 }
1da177e4
LT		 2049 /* select spdif data slot 10/11 */
2050 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
2051 val = (val & ~VIA8233_SPDIF_SLOT_MASK) | VIA8233_SPDIF_SLOT_1011;
2052 val &= ~VIA8233_SPDIF_DX3; /* SPDIF off as default */
2053 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
2054
2055 return 0;
2056}
2057
e23e7a14 2058static int snd_via686_init_misc(struct via82xx *chip)
1da177e4
LT		 2059{
2060 unsigned char legacy, legacy_cfg;
2061 int rev_h = 0;
2062
2063 legacy = chip->old_legacy;
2064 legacy_cfg = chip->old_legacy_cfg;
2065 legacy |= VIA_FUNC_MIDI_IRQMASK; /* FIXME: correct? (disable MIDI) */
2066 legacy &= ~VIA_FUNC_ENABLE_GAME; /* disable joystick */
2067 if (chip->revision >= VIA_REV_686_H) {
2068 rev_h = 1;
b7fe4622
CL		 2069 if (mpu_port >= 0x200) { /* force MIDI */
2070 mpu_port &= 0xfffc;
2071 pci_write_config_dword(chip->pci, 0x18, mpu_port | 0x01);
c7561cd8 2072#ifdef CONFIG_PM_SLEEP
b7fe4622 2073 chip->mpu_port_saved = mpu_port;
1da177e4
LT		 2074#endif
2075 } else {
b7fe4622 2076 mpu_port = pci_resource_start(chip->pci, 2);
1da177e4
LT		 2077 }
2078 } else {
b7fe4622 2079 switch (mpu_port) { /* force MIDI */
1da177e4
LT		 2080 case 0x300:
2081 case 0x310:
2082 case 0x320:
2083 case 0x330:
2084 legacy_cfg &= ~(3 << 2);
b7fe4622 2085 legacy_cfg |= (mpu_port & 0x0030) >> 2;
1da177e4
LT		 2086 break;
2087 default: /* no, use BIOS settings */
2088 if (legacy & VIA_FUNC_ENABLE_MIDI)
b7fe4622 2089 mpu_port = 0x300 + ((legacy_cfg & 0x000c) << 2);
1da177e4
LT		 2090 break;
2091 }
2092 }
b7fe4622
CL		 2093 if (mpu_port >= 0x200 &&
2094 (chip->mpu_res = request_region(mpu_port, 2, "VIA82xx MPU401"))
2095 != NULL) {
1da177e4
LT		 2096 if (rev_h)
2097 legacy |= VIA_FUNC_MIDI_PNP; /* enable PCI I/O 2 */
2098 legacy |= VIA_FUNC_ENABLE_MIDI;
2099 } else {
2100 if (rev_h)
2101 legacy &= ~VIA_FUNC_MIDI_PNP; /* disable PCI I/O 2 */
2102 legacy &= ~VIA_FUNC_ENABLE_MIDI;
b7fe4622 2103 mpu_port = 0;
1da177e4
LT		 2104 }
2105
2106 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
2107 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, legacy_cfg);
2108 if (chip->mpu_res) {
2109 if (snd_mpu401_uart_new(chip->card, 0, MPU401_HW_VIA686A,
dba8b469
CL		 2110 mpu_port, MPU401_INFO_INTEGRATED |
2111 MPU401_INFO_IRQ_HOOK, -1,
2112 &chip->rmidi) < 0) {
59d3acfa
TI		 2113 dev_warn(chip->card->dev,
2114 "unable to initialize MPU-401 at 0x%lx, skipping\n",
2115 mpu_port);
1da177e4
LT		 2116 legacy &= ~VIA_FUNC_ENABLE_MIDI;
2117 } else {
2118 legacy &= ~VIA_FUNC_MIDI_IRQMASK; /* enable MIDI interrupt */
2119 }
2120 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
2121 }
2122
b7fe4622 2123 snd_via686_create_gameport(chip, &legacy);
1da177e4 2124
c7561cd8 2125#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 2126 chip->legacy_saved = legacy;
2127 chip->legacy_cfg_saved = legacy_cfg;
2128#endif
2129
2130 return 0;
2131}
2132
2133
2134/*
2135 * proc interface
2136 */
e437e3d7
TI		 2137static void snd_via82xx_proc_read(struct snd_info_entry *entry,
2138 struct snd_info_buffer *buffer)
1da177e4 2139{
e437e3d7 2140 struct via82xx *chip = entry->private_data;
1da177e4
LT		 2141 int i;
2142
2143 snd_iprintf(buffer, "%s\n\n", chip->card->longname);
2144 for (i = 0; i < 0xa0; i += 4) {
2145 snd_iprintf(buffer, "%02x: %08x\n", i, inl(chip->port + i));
2146 }
2147}
2148
e23e7a14 2149static void snd_via82xx_proc_init(struct via82xx *chip)
1da177e4 2150{
e437e3d7 2151 struct snd_info_entry *entry;
1da177e4
LT		 2152
2153 if (! snd_card_proc_new(chip->card, "via82xx", &entry))
bf850204 2154 snd_info_set_text_ops(entry, chip, snd_via82xx_proc_read);
1da177e4
LT		 2155}
2156
2157/*
2158 *
2159 */
2160
e437e3d7 2161static int snd_via82xx_chip_init(struct via82xx *chip)
1da177e4
LT		 2162{
2163 unsigned int val;
ef21ca24 2164 unsigned long end_time;
1da177e4
LT		 2165 unsigned char pval;
2166
2167#if 0 /* broken on K7M? */
2168 if (chip->chip_type == TYPE_VIA686)
2169 /* disable all legacy ports */
2170 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, 0);
2171#endif
2172 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
2173 if (! (pval & VIA_ACLINK_C00_READY)) { /* codec not ready? */
2174 /* deassert ACLink reset, force SYNC */
2175 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
2176 VIA_ACLINK_CTRL_ENABLE |
2177 VIA_ACLINK_CTRL_RESET |
2178 VIA_ACLINK_CTRL_SYNC);
2179 udelay(100);
2180#if 1 /* FIXME: should we do full reset here for all chip models? */
2181 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 0x00);
2182 udelay(100);
2183#else
2184 /* deassert ACLink reset, force SYNC (warm AC'97 reset) */
2185 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
2186 VIA_ACLINK_CTRL_RESET|VIA_ACLINK_CTRL_SYNC);
2187 udelay(2);
2188#endif
2189 /* ACLink on, deassert ACLink reset, VSR, SGD data out */
2190 /* note - FM data out has trouble with non VRA codecs !! */
2191 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
2192 udelay(100);
2193 }
2194
2195 /* Make sure VRA is enabled, in case we didn't do a
2196 * complete codec reset, above */
2197 pci_read_config_byte(chip->pci, VIA_ACLINK_CTRL, &pval);
2198 if ((pval & VIA_ACLINK_CTRL_INIT) != VIA_ACLINK_CTRL_INIT) {
2199 /* ACLink on, deassert ACLink reset, VSR, SGD data out */
2200 /* note - FM data out has trouble with non VRA codecs !! */
2201 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
2202 udelay(100);
2203 }
2204
2205 /* wait until codec ready */
ef21ca24 2206 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT		 2207 do {
2208 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
2209 if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */
2210 break;
d86d0193 2211 schedule_timeout_uninterruptible(1);
ef21ca24 2212 } while (time_before(jiffies, end_time));
1da177e4
LT		 2213
2214 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY)
59d3acfa
TI		 2215 dev_err(chip->card->dev,
2216 "AC'97 codec is not ready [0x%x]\n", val);
1da177e4
LT		 2217
2218#if 0 /* FIXME: we don't support the second codec yet so skip the detection now.. */
2219 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
2220 VIA_REG_AC97_SECONDARY_VALID |
2221 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
ef21ca24 2222 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT		 2223 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
2224 VIA_REG_AC97_SECONDARY_VALID |
2225 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
2226 do {
2227 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_SECONDARY_VALID) {
2228 chip->ac97_secondary = 1;
2229 goto __ac97_ok2;
2230 }
d86d0193 2231 schedule_timeout_uninterruptible(1);
ef21ca24 2232 } while (time_before(jiffies, end_time));
1da177e4
LT		 2233 /* This is ok, the most of motherboards have only one codec */
2234
2235 __ac97_ok2:
2236#endif
2237
2238 if (chip->chip_type == TYPE_VIA686) {
2239 /* route FM trap to IRQ, disable FM trap */
2240 pci_write_config_byte(chip->pci, VIA_FM_NMI_CTRL, 0);
2241 /* disable all GPI interrupts */
2242 outl(0, VIAREG(chip, GPI_INTR));
2243 }
2244
2245 if (chip->chip_type != TYPE_VIA686) {
2246 /* Workaround for Award BIOS bug:
2247 * DXS channels don't work properly with VRA if MC97 is disabled.
2248 */
2249 struct pci_dev *pci;
0dd119f7 2250 pci = pci_get_device(0x1106, 0x3068, NULL); /* MC97 */
1da177e4
LT		 2251 if (pci) {
2252 unsigned char data;
2253 pci_read_config_byte(pci, 0x44, &data);
2254 pci_write_config_byte(pci, 0x44, data | 0x40);
0dd119f7 2255 pci_dev_put(pci);
1da177e4
LT		 2256 }
2257 }
2258
2259 if (chip->chip_type != TYPE_VIA8233A) {
2260 int i, idx;
2261 for (idx = 0; idx < 4; idx++) {
2262 unsigned long port = chip->port + 0x10 * idx;
00f226d4
HM		 2263 for (i = 0; i < 2; i++) {
2264 chip->playback_volume[idx][i]=chip->playback_volume_c[i];
e437e3d7
TI		 2265 outb(chip->playback_volume_c[i],
2266 port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
00f226d4 2267 }
1da177e4
LT		 2268 }
2269 }
2270
2271 return 0;
2272}
2273
c7561cd8 2274#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 2275/*
2276 * power management
2277 */
68cb2b55 2278static int snd_via82xx_suspend(struct device *dev)
1da177e4 2279{
68cb2b55
TI		 2280 struct pci_dev *pci = to_pci_dev(dev);
2281 struct snd_card *card = dev_get_drvdata(dev);
57feb835 2282 struct via82xx *chip = card->private_data;
1da177e4
LT		 2283 int i;
2284
57feb835 2285 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4 2286 for (i = 0; i < 2; i++)
57feb835 2287 snd_pcm_suspend_all(chip->pcms[i]);
1da177e4
LT		 2288 for (i = 0; i < chip->num_devs; i++)
2289 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2290 synchronize_irq(chip->irq);
2291 snd_ac97_suspend(chip->ac97);
2292
2293 /* save misc values */
2294 if (chip->chip_type != TYPE_VIA686) {
2295 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &chip->spdif_ctrl_saved);
2296 chip->capture_src_saved[0] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL);
2297 chip->capture_src_saved[1] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
2298 }
2299
57feb835
TI		 2300 pci_disable_device(pci);
2301 pci_save_state(pci);
68cb2b55 2302 pci_set_power_state(pci, PCI_D3hot);
1da177e4
LT		 2303 return 0;
2304}
2305
68cb2b55 2306static int snd_via82xx_resume(struct device *dev)
1da177e4 2307{
68cb2b55
TI		 2308 struct pci_dev *pci = to_pci_dev(dev);
2309 struct snd_card *card = dev_get_drvdata(dev);
57feb835 2310 struct via82xx *chip = card->private_data;
1da177e4
LT		 2311 int i;
2312
57feb835 2313 pci_set_power_state(pci, PCI_D0);
30b35399
TI		 2314 pci_restore_state(pci);
2315 if (pci_enable_device(pci) < 0) {
59d3acfa 2316 dev_err(dev, "pci_enable_device failed, disabling device\n");
30b35399
TI		 2317 snd_card_disconnect(card);
2318 return -EIO;
2319 }
2320 pci_set_master(pci);
1da177e4
LT		 2321
2322 snd_via82xx_chip_init(chip);
2323
2324 if (chip->chip_type == TYPE_VIA686) {
2325 if (chip->mpu_port_saved)
2326 pci_write_config_dword(chip->pci, 0x18, chip->mpu_port_saved | 0x01);
2327 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->legacy_saved);
2328 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->legacy_cfg_saved);
2329 } else {
2330 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, chip->spdif_ctrl_saved);
2331 outb(chip->capture_src_saved[0], chip->port + VIA_REG_CAPTURE_CHANNEL);
2332 outb(chip->capture_src_saved[1], chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
2333 }
2334
2335 snd_ac97_resume(chip->ac97);
2336
2337 for (i = 0; i < chip->num_devs; i++)
2338 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2339
57feb835 2340 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 2341 return 0;
2342}
68cb2b55
TI		 2343
2344static SIMPLE_DEV_PM_OPS(snd_via82xx_pm, snd_via82xx_suspend, snd_via82xx_resume);
2345#define SND_VIA82XX_PM_OPS &snd_via82xx_pm
2346#else
2347#define SND_VIA82XX_PM_OPS NULL
c7561cd8 2348#endif /* CONFIG_PM_SLEEP */
1da177e4 2349
e437e3d7 2350static int snd_via82xx_free(struct via82xx *chip)
1da177e4
LT		 2351{
2352 unsigned int i;
2353
2354 if (chip->irq < 0)
2355 goto __end_hw;
2356 /* disable interrupts */
2357 for (i = 0; i < chip->num_devs; i++)
2358 snd_via82xx_channel_reset(chip, &chip->devs[i]);
f000fd80 2359
1da177e4 2360 if (chip->irq >= 0)
e437e3d7 2361 free_irq(chip->irq, chip);
757d5a75 2362 __end_hw:
b1d5776d 2363 release_and_free_resource(chip->mpu_res);
1da177e4
LT		 2364 pci_release_regions(chip->pci);
2365
2366 if (chip->chip_type == TYPE_VIA686) {
2367 snd_via686_free_gameport(chip);
2368 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->old_legacy);
2369 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->old_legacy_cfg);
2370 }
2371 pci_disable_device(chip->pci);
2372 kfree(chip);
2373 return 0;
2374}
2375
e437e3d7 2376static int snd_via82xx_dev_free(struct snd_device *device)
1da177e4 2377{
e437e3d7 2378 struct via82xx *chip = device->device_data;
1da177e4
LT		 2379 return snd_via82xx_free(chip);
2380}
2381
e23e7a14
BP		 2382static int snd_via82xx_create(struct snd_card *card,
2383 struct pci_dev *pci,
2384 int chip_type,
2385 int revision,
2386 unsigned int ac97_clock,
2387 struct via82xx **r_via)
1da177e4 2388{
e437e3d7 2389 struct via82xx *chip;
1da177e4 2390 int err;
e437e3d7 2391 static struct snd_device_ops ops = {
1da177e4
LT		 2392 .dev_free = snd_via82xx_dev_free,
2393 };
2394
2395 if ((err = pci_enable_device(pci)) < 0)
2396 return err;
2397
e560d8d8 2398 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
1da177e4
LT		 2399 pci_disable_device(pci);
2400 return -ENOMEM;
2401 }
2402
2403 chip->chip_type = chip_type;
2404 chip->revision = revision;
2405
2406 spin_lock_init(&chip->reg_lock);
2407 spin_lock_init(&chip->rates[0].lock);
2408 spin_lock_init(&chip->rates[1].lock);
2409 chip->card = card;
2410 chip->pci = pci;
2411 chip->irq = -1;
2412
2413 pci_read_config_byte(pci, VIA_FUNC_ENABLE, &chip->old_legacy);
2414 pci_read_config_byte(pci, VIA_PNP_CONTROL, &chip->old_legacy_cfg);
2415 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE,
2416 chip->old_legacy & ~(VIA_FUNC_ENABLE_SB|VIA_FUNC_ENABLE_FM));
2417
2418 if ((err = pci_request_regions(pci, card->driver)) < 0) {
2419 kfree(chip);
2420 pci_disable_device(pci);
2421 return err;
2422 }
2423 chip->port = pci_resource_start(pci, 0);
4f550df5
KW		 2424 if (request_irq(pci->irq,
2425 chip_type == TYPE_VIA8233 ?
2426 snd_via8233_interrupt : snd_via686_interrupt,
437a5a46 2427 IRQF_SHARED,
934c2b6d 2428 KBUILD_MODNAME, chip)) {
59d3acfa 2429 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2430 snd_via82xx_free(chip);
2431 return -EBUSY;
2432 }
2433 chip->irq = pci->irq;
2434 if (ac97_clock >= 8000 && ac97_clock <= 48000)
2435 chip->ac97_clock = ac97_clock;
2436 synchronize_irq(chip->irq);
2437
2438 if ((err = snd_via82xx_chip_init(chip)) < 0) {
2439 snd_via82xx_free(chip);
2440 return err;
2441 }
2442
2443 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2444 snd_via82xx_free(chip);
2445 return err;
2446 }
2447
2448 /* The 8233 ac97 controller does not implement the master bit
2449 * in the pci command register. IMHO this is a violation of the PCI spec.
2450 * We call pci_set_master here because it does not hurt. */
2451 pci_set_master(pci);
2452
1da177e4
LT		 2453 *r_via = chip;
2454 return 0;
2455}
2456
2457struct via823x_info {
2458 int revision;
2459 char *name;
2460 int type;
2461};
e23e7a14 2462static struct via823x_info via823x_cards[] = {
1da177e4
LT		 2463 { VIA_REV_PRE_8233, "VIA 8233-Pre", TYPE_VIA8233 },
2464 { VIA_REV_8233C, "VIA 8233C", TYPE_VIA8233 },
2465 { VIA_REV_8233, "VIA 8233", TYPE_VIA8233 },
2466 { VIA_REV_8233A, "VIA 8233A", TYPE_VIA8233A },
2467 { VIA_REV_8235, "VIA 8235", TYPE_VIA8233 },
2468 { VIA_REV_8237, "VIA 8237", TYPE_VIA8233 },
8263c65f 2469 { VIA_REV_8251, "VIA 8251", TYPE_VIA8233 },
1da177e4
LT		 2470};
2471
2472/*
2473 * auto detection of DXS channel supports.
2474 */
9d74958a 2475
e23e7a14 2476static struct snd_pci_quirk dxs_whitelist[] = {
9d74958a
TI		 2477 SND_PCI_QUIRK(0x1005, 0x4710, "Avance Logic Mobo", VIA_DXS_ENABLE),
2478 SND_PCI_QUIRK(0x1019, 0x0996, "ESC Mobo", VIA_DXS_48K),
2479 SND_PCI_QUIRK(0x1019, 0x0a81, "ECS K7VTA3 v8.0", VIA_DXS_NO_VRA),
2480 SND_PCI_QUIRK(0x1019, 0x0a85, "ECS L7VMM2", VIA_DXS_NO_VRA),
a85165c6 2481 SND_PCI_QUIRK_VENDOR(0x1019, "ESC K8", VIA_DXS_SRC),
9d74958a
TI		 2482 SND_PCI_QUIRK(0x1019, 0xaa01, "ESC K8T890-A", VIA_DXS_SRC),
2483 SND_PCI_QUIRK(0x1025, 0x0033, "Acer Inspire 1353LM", VIA_DXS_NO_VRA),
2484 SND_PCI_QUIRK(0x1025, 0x0046, "Acer Aspire 1524 WLMi", VIA_DXS_SRC),
a85165c6
TI		 2485 SND_PCI_QUIRK_VENDOR(0x1043, "ASUS A7/A8", VIA_DXS_NO_VRA),
2486 SND_PCI_QUIRK_VENDOR(0x1071, "Diverse Notebook", VIA_DXS_NO_VRA),
9d74958a 2487 SND_PCI_QUIRK(0x10cf, 0x118e, "FSC Laptop", VIA_DXS_ENABLE),
a85165c6 2488 SND_PCI_QUIRK_VENDOR(0x1106, "ASRock", VIA_DXS_SRC),
11be265f 2489 SND_PCI_QUIRK(0x1297, 0xa231, "Shuttle AK31v2", VIA_DXS_SRC),
9674513d
TI		 2490 SND_PCI_QUIRK(0x1297, 0xa232, "Shuttle", VIA_DXS_SRC),
2491 SND_PCI_QUIRK(0x1297, 0xc160, "Shuttle Sk41G", VIA_DXS_SRC),
9d74958a
TI		 2492 SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte GA-7VAXP", VIA_DXS_ENABLE),
2493 SND_PCI_QUIRK(0x1462, 0x3800, "MSI KT266", VIA_DXS_ENABLE),
2494 SND_PCI_QUIRK(0x1462, 0x7120, "MSI KT4V", VIA_DXS_ENABLE),
2495 SND_PCI_QUIRK(0x1462, 0x7142, "MSI K8MM-V", VIA_DXS_ENABLE),
a85165c6 2496 SND_PCI_QUIRK_VENDOR(0x1462, "MSI Mobo", VIA_DXS_SRC),
9d74958a
TI		 2497 SND_PCI_QUIRK(0x147b, 0x1401, "ABIT KD7(-RAID)", VIA_DXS_ENABLE),
2498 SND_PCI_QUIRK(0x147b, 0x1411, "ABIT VA-20", VIA_DXS_ENABLE),
2499 SND_PCI_QUIRK(0x147b, 0x1413, "ABIT KV8 Pro", VIA_DXS_ENABLE),
2500 SND_PCI_QUIRK(0x147b, 0x1415, "ABIT AV8", VIA_DXS_NO_VRA),
2501 SND_PCI_QUIRK(0x14ff, 0x0403, "Twinhead mobo", VIA_DXS_ENABLE),
2502 SND_PCI_QUIRK(0x14ff, 0x0408, "Twinhead laptop", VIA_DXS_SRC),
2503 SND_PCI_QUIRK(0x1558, 0x4701, "Clevo D470", VIA_DXS_SRC),
2504 SND_PCI_QUIRK(0x1584, 0x8120, "Diverse Laptop", VIA_DXS_ENABLE),
2505 SND_PCI_QUIRK(0x1584, 0x8123, "Targa/Uniwill", VIA_DXS_NO_VRA),
2506 SND_PCI_QUIRK(0x161f, 0x202b, "Amira Notebook", VIA_DXS_NO_VRA),
2507 SND_PCI_QUIRK(0x161f, 0x2032, "m680x machines", VIA_DXS_48K),
2508 SND_PCI_QUIRK(0x1631, 0xe004, "PB EasyNote 3174", VIA_DXS_ENABLE),
2509 SND_PCI_QUIRK(0x1695, 0x3005, "EPoX EP-8K9A", VIA_DXS_ENABLE),
a85165c6
TI		 2510 SND_PCI_QUIRK_VENDOR(0x1695, "EPoX mobo", VIA_DXS_SRC),
2511 SND_PCI_QUIRK_VENDOR(0x16f3, "Jetway K8", VIA_DXS_SRC),
2512 SND_PCI_QUIRK_VENDOR(0x1734, "FSC Laptop", VIA_DXS_SRC),
9d74958a 2513 SND_PCI_QUIRK(0x1849, 0x3059, "ASRock K7VM2", VIA_DXS_NO_VRA),
a85165c6 2514 SND_PCI_QUIRK_VENDOR(0x1849, "ASRock mobo", VIA_DXS_SRC),
9d74958a
TI		 2515 SND_PCI_QUIRK(0x1919, 0x200a, "Soltek SL-K8", VIA_DXS_NO_VRA),
2516 SND_PCI_QUIRK(0x4005, 0x4710, "MSI K7T266", VIA_DXS_SRC),
2517 { } /* terminator */
1da177e4
LT		 2518};
2519
e23e7a14 2520static int check_dxs_list(struct pci_dev *pci, int revision)
1da177e4 2521{
9d74958a 2522 const struct snd_pci_quirk *w;
1da177e4 2523
9d74958a
TI		 2524 w = snd_pci_quirk_lookup(pci, dxs_whitelist);
2525 if (w) {
59d3acfa 2526 dev_dbg(&pci->dev, "DXS white list for %s found\n",
86b27237 2527 snd_pci_quirk_name(w));
9d74958a 2528 return w->value;
1da177e4
LT		 2529 }
2530
a769577b
TI		 2531 /* for newer revision, default to DXS_SRC */
2532 if (revision >= VIA_REV_8235)
2533 return VIA_DXS_SRC;
2534
1da177e4
LT		 2535 /*
2536 * not detected, try 48k rate only to be sure.
2537 */
59d3acfa
TI		 2538 dev_info(&pci->dev, "Assuming DXS channels with 48k fixed sample rate.\n");
2539 dev_info(&pci->dev, " Please try dxs_support=5 option\n");
2540 dev_info(&pci->dev, " and report if it works on your machine.\n");
2541 dev_info(&pci->dev, " For more details, read ALSA-Configuration.txt.\n");
1da177e4
LT		 2542 return VIA_DXS_48K;
2543};
2544
e23e7a14
BP		 2545static int snd_via82xx_probe(struct pci_dev *pci,
2546 const struct pci_device_id *pci_id)
1da177e4 2547{
e437e3d7
TI		 2548 struct snd_card *card;
2549 struct via82xx *chip;
1da177e4
LT		 2550 int chip_type = 0, card_type;
2551 unsigned int i;
2552 int err;
2553
60c5772b 2554 err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card);
e58de7ba
TI		 2555 if (err < 0)
2556 return err;
1da177e4
LT		 2557
2558 card_type = pci_id->driver_data;
1da177e4
LT		 2559 switch (card_type) {
2560 case TYPE_CARD_VIA686:
2561 strcpy(card->driver, "VIA686A");
44c10138 2562 sprintf(card->shortname, "VIA 82C686A/B rev%x", pci->revision);
1da177e4
LT		 2563 chip_type = TYPE_VIA686;
2564 break;
2565 case TYPE_CARD_VIA8233:
2566 chip_type = TYPE_VIA8233;
44c10138 2567 sprintf(card->shortname, "VIA 823x rev%x", pci->revision);
1da177e4 2568 for (i = 0; i < ARRAY_SIZE(via823x_cards); i++) {
44c10138 2569 if (pci->revision == via823x_cards[i].revision) {
1da177e4
LT		 2570 chip_type = via823x_cards[i].type;
2571 strcpy(card->shortname, via823x_cards[i].name);
2572 break;
2573 }
2574 }
2575 if (chip_type != TYPE_VIA8233A) {
b7fe4622 2576 if (dxs_support == VIA_DXS_AUTO)
44c10138 2577 dxs_support = check_dxs_list(pci, pci->revision);
1da177e4
LT		 2578 /* force to use VIA8233 or 8233A model according to
2579 * dxs_support module option
2580 */
b7fe4622 2581 if (dxs_support == VIA_DXS_DISABLE)
1da177e4
LT		 2582 chip_type = TYPE_VIA8233A;
2583 else
2584 chip_type = TYPE_VIA8233;
2585 }
2586 if (chip_type == TYPE_VIA8233A)
2587 strcpy(card->driver, "VIA8233A");
44c10138 2588 else if (pci->revision >= VIA_REV_8237)
1da177e4
LT		 2589 strcpy(card->driver, "VIA8237"); /* no slog assignment */
2590 else
2591 strcpy(card->driver, "VIA8233");
2592 break;
2593 default:
59d3acfa 2594 dev_err(card->dev, "invalid card type %d\n", card_type);
1da177e4
LT		 2595 err = -EINVAL;
2596 goto __error;
2597 }
2598
44c10138 2599 if ((err = snd_via82xx_create(card, pci, chip_type, pci->revision,
b7fe4622 2600 ac97_clock, &chip)) < 0)
1da177e4 2601 goto __error;
57feb835 2602 card->private_data = chip;
b7fe4622 2603 if ((err = snd_via82xx_mixer_new(chip, ac97_quirk)) < 0)
1da177e4
LT		 2604 goto __error;
2605
2606 if (chip_type == TYPE_VIA686) {
2607 if ((err = snd_via686_pcm_new(chip)) < 0 ||
b7fe4622 2608 (err = snd_via686_init_misc(chip)) < 0)
1da177e4
LT		 2609 goto __error;
2610 } else {
2611 if (chip_type == TYPE_VIA8233A) {
2612 if ((err = snd_via8233a_pcm_new(chip)) < 0)
2613 goto __error;
2614 // chip->dxs_fixed = 1; /* FIXME: use 48k for DXS #3? */
2615 } else {
2616 if ((err = snd_via8233_pcm_new(chip)) < 0)
2617 goto __error;
b7fe4622 2618 if (dxs_support == VIA_DXS_48K)
1da177e4 2619 chip->dxs_fixed = 1;
b7fe4622 2620 else if (dxs_support == VIA_DXS_NO_VRA)
1da177e4 2621 chip->no_vra = 1;
b7fe4622 2622 else if (dxs_support == VIA_DXS_SRC) {
2d7eb7cb
SV		 2623 chip->no_vra = 1;
2624 chip->dxs_src = 1;
2625 }
1da177e4 2626 }
b7fe4622 2627 if ((err = snd_via8233_init_misc(chip)) < 0)
1da177e4
LT		 2628 goto __error;
2629 }
2630
1da177e4
LT		 2631 /* disable interrupts */
2632 for (i = 0; i < chip->num_devs; i++)
2633 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2634
2635 snprintf(card->longname, sizeof(card->longname),
2636 "%s with %s at %#lx, irq %d", card->shortname,
2637 snd_ac97_get_short_name(chip->ac97), chip->port, chip->irq);
2638
2639 snd_via82xx_proc_init(chip);
2640
2641 if ((err = snd_card_register(card)) < 0) {
2642 snd_card_free(card);
2643 return err;
2644 }
2645 pci_set_drvdata(pci, card);
1da177e4
LT		 2646 return 0;
2647
2648 __error:
2649 snd_card_free(card);
2650 return err;
2651}
2652
e23e7a14 2653static void snd_via82xx_remove(struct pci_dev *pci)
1da177e4
LT		 2654{
2655 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT		 2656}
2657
e9f66d9b 2658static struct pci_driver via82xx_driver = {
3733e424 2659 .name = KBUILD_MODNAME,
1da177e4
LT		 2660 .id_table = snd_via82xx_ids,
2661 .probe = snd_via82xx_probe,
e23e7a14 2662 .remove = snd_via82xx_remove,
68cb2b55
TI		 2663 .driver = {
2664 .pm = SND_VIA82XX_PM_OPS,
2665 },
1da177e4
LT		 2666};
2667
e9f66d9b 2668module_pci_driver(via82xx_driver);
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