]>
Commit | Line | Data |
---|---|---|
1a59d1b8 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 LT |
2 | /* |
3 | * ALSA driver for VIA VT82xx (South Bridge) | |
4 | * | |
5 | * VT82C686A/B/C, VT8233A/C, VT8235 | |
6 | * | |
c1017a4c | 7 | * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> |
1da177e4 LT |
8 | * Tjeerd.Mulder <Tjeerd.Mulder@fujitsu-siemens.com> |
9 | * 2002 Takashi Iwai <tiwai@suse.de> | |
1da177e4 LT |
10 | */ |
11 | ||
12 | /* | |
13 | * Changes: | |
14 | * | |
15 | * Dec. 19, 2002 Takashi Iwai <tiwai@suse.de> | |
16 | * - use the DSX channels for the first pcm playback. | |
17 | * (on VIA8233, 8233C and 8235 only) | |
18 | * this will allow you play simultaneously up to 4 streams. | |
19 | * multi-channel playback is assigned to the second device | |
20 | * on these chips. | |
21 | * - support the secondary capture (on VIA8233/C,8235) | |
22 | * - SPDIF support | |
23 | * the DSX3 channel can be used for SPDIF output. | |
24 | * on VIA8233A, this channel is assigned to the second pcm | |
25 | * playback. | |
26 | * the card config of alsa-lib will assign the correct | |
27 | * device for applications. | |
28 | * - clean up the code, separate low-level initialization | |
29 | * routines for each chipset. | |
4f550df5 KW |
30 | * |
31 | * Sep. 26, 2005 Karsten Wiese <annabellesgarden@yahoo.de> | |
32 | * - Optimize position calculation for the 823x chips. | |
1da177e4 LT |
33 | */ |
34 | ||
6cbbfe1c | 35 | #include <linux/io.h> |
1da177e4 LT |
36 | #include <linux/delay.h> |
37 | #include <linux/interrupt.h> | |
38 | #include <linux/init.h> | |
39 | #include <linux/pci.h> | |
40 | #include <linux/slab.h> | |
41 | #include <linux/gameport.h> | |
65a77217 | 42 | #include <linux/module.h> |
1da177e4 LT |
43 | #include <sound/core.h> |
44 | #include <sound/pcm.h> | |
45 | #include <sound/pcm_params.h> | |
46 | #include <sound/info.h> | |
7058c042 | 47 | #include <sound/tlv.h> |
1da177e4 LT |
48 | #include <sound/ac97_codec.h> |
49 | #include <sound/mpu401.h> | |
50 | #include <sound/initval.h> | |
51 | ||
52 | #if 0 | |
53 | #define POINTER_DEBUG | |
54 | #endif | |
55 | ||
c1017a4c | 56 | MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); |
1da177e4 LT |
57 | MODULE_DESCRIPTION("VIA VT82xx audio"); |
58 | MODULE_LICENSE("GPL"); | |
1da177e4 | 59 | |
b2fac073 | 60 | #if IS_REACHABLE(CONFIG_GAMEPORT) |
1da177e4 LT |
61 | #define SUPPORT_JOYSTICK 1 |
62 | #endif | |
63 | ||
b7fe4622 CL |
64 | static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */ |
65 | static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ | |
66 | static long mpu_port; | |
1da177e4 | 67 | #ifdef SUPPORT_JOYSTICK |
a67ff6a5 | 68 | static bool joystick; |
1da177e4 | 69 | #endif |
b7fe4622 CL |
70 | static int ac97_clock = 48000; |
71 | static char *ac97_quirk; | |
72 | static int dxs_support; | |
395c61d1 | 73 | static int dxs_init_volume = 31; |
115551d9 | 74 | static int nodelay; |
1da177e4 | 75 | |
b7fe4622 | 76 | module_param(index, int, 0444); |
1da177e4 | 77 | MODULE_PARM_DESC(index, "Index value for VIA 82xx bridge."); |
b7fe4622 | 78 | module_param(id, charp, 0444); |
1da177e4 | 79 | MODULE_PARM_DESC(id, "ID string for VIA 82xx bridge."); |
6192c41f | 80 | module_param_hw(mpu_port, long, ioport, 0444); |
1da177e4 LT |
81 | MODULE_PARM_DESC(mpu_port, "MPU-401 port. (VT82C686x only)"); |
82 | #ifdef SUPPORT_JOYSTICK | |
b7fe4622 | 83 | module_param(joystick, bool, 0444); |
1da177e4 LT |
84 | MODULE_PARM_DESC(joystick, "Enable joystick. (VT82C686x only)"); |
85 | #endif | |
b7fe4622 | 86 | module_param(ac97_clock, int, 0444); |
1da177e4 | 87 | MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz)."); |
b7fe4622 | 88 | module_param(ac97_quirk, charp, 0444); |
1da177e4 | 89 | MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); |
b7fe4622 | 90 | module_param(dxs_support, int, 0444); |
2d7eb7cb | 91 | MODULE_PARM_DESC(dxs_support, "Support for DXS channels (0 = auto, 1 = enable, 2 = disable, 3 = 48k only, 4 = no VRA, 5 = enable any sample rate)"); |
395c61d1 CL |
92 | module_param(dxs_init_volume, int, 0644); |
93 | MODULE_PARM_DESC(dxs_init_volume, "initial DXS volume (0-31)"); | |
115551d9 SA |
94 | module_param(nodelay, int, 0444); |
95 | MODULE_PARM_DESC(nodelay, "Disable 500ms init delay"); | |
1da177e4 | 96 | |
2b3e584b | 97 | /* just for backward compatibility */ |
a67ff6a5 | 98 | static bool enable; |
698444f3 | 99 | module_param(enable, bool, 0444); |
2b3e584b | 100 | |
1da177e4 | 101 | |
1da177e4 LT |
102 | /* revision numbers for via686 */ |
103 | #define VIA_REV_686_A 0x10 | |
104 | #define VIA_REV_686_B 0x11 | |
105 | #define VIA_REV_686_C 0x12 | |
106 | #define VIA_REV_686_D 0x13 | |
107 | #define VIA_REV_686_E 0x14 | |
108 | #define VIA_REV_686_H 0x20 | |
109 | ||
110 | /* revision numbers for via8233 */ | |
111 | #define VIA_REV_PRE_8233 0x10 /* not in market */ | |
112 | #define VIA_REV_8233C 0x20 /* 2 rec, 4 pb, 1 multi-pb */ | |
113 | #define VIA_REV_8233 0x30 /* 2 rec, 4 pb, 1 multi-pb, spdif */ | |
114 | #define VIA_REV_8233A 0x40 /* 1 rec, 1 multi-pb, spdf */ | |
115 | #define VIA_REV_8235 0x50 /* 2 rec, 4 pb, 1 multi-pb, spdif */ | |
116 | #define VIA_REV_8237 0x60 | |
8263c65f | 117 | #define VIA_REV_8251 0x70 |
1da177e4 LT |
118 | |
119 | /* | |
120 | * Direct registers | |
121 | */ | |
122 | ||
123 | #define VIAREG(via, x) ((via)->port + VIA_REG_##x) | |
124 | #define VIADEV_REG(viadev, x) ((viadev)->port + VIA_REG_##x) | |
125 | ||
126 | /* common offsets */ | |
127 | #define VIA_REG_OFFSET_STATUS 0x00 /* byte - channel status */ | |
128 | #define VIA_REG_STAT_ACTIVE 0x80 /* RO */ | |
4f550df5 | 129 | #define VIA8233_SHADOW_STAT_ACTIVE 0x08 /* RO */ |
1da177e4 LT |
130 | #define VIA_REG_STAT_PAUSED 0x40 /* RO */ |
131 | #define VIA_REG_STAT_TRIGGER_QUEUED 0x08 /* RO */ | |
132 | #define VIA_REG_STAT_STOPPED 0x04 /* RWC */ | |
133 | #define VIA_REG_STAT_EOL 0x02 /* RWC */ | |
134 | #define VIA_REG_STAT_FLAG 0x01 /* RWC */ | |
135 | #define VIA_REG_OFFSET_CONTROL 0x01 /* byte - channel control */ | |
136 | #define VIA_REG_CTRL_START 0x80 /* WO */ | |
137 | #define VIA_REG_CTRL_TERMINATE 0x40 /* WO */ | |
138 | #define VIA_REG_CTRL_AUTOSTART 0x20 | |
139 | #define VIA_REG_CTRL_PAUSE 0x08 /* RW */ | |
140 | #define VIA_REG_CTRL_INT_STOP 0x04 | |
141 | #define VIA_REG_CTRL_INT_EOL 0x02 | |
142 | #define VIA_REG_CTRL_INT_FLAG 0x01 | |
143 | #define VIA_REG_CTRL_RESET 0x01 /* RW - probably reset? undocumented */ | |
144 | #define VIA_REG_CTRL_INT (VIA_REG_CTRL_INT_FLAG | VIA_REG_CTRL_INT_EOL | VIA_REG_CTRL_AUTOSTART) | |
145 | #define VIA_REG_OFFSET_TYPE 0x02 /* byte - channel type (686 only) */ | |
146 | #define VIA_REG_TYPE_AUTOSTART 0x80 /* RW - autostart at EOL */ | |
147 | #define VIA_REG_TYPE_16BIT 0x20 /* RW */ | |
148 | #define VIA_REG_TYPE_STEREO 0x10 /* RW */ | |
149 | #define VIA_REG_TYPE_INT_LLINE 0x00 | |
150 | #define VIA_REG_TYPE_INT_LSAMPLE 0x04 | |
151 | #define VIA_REG_TYPE_INT_LESSONE 0x08 | |
152 | #define VIA_REG_TYPE_INT_MASK 0x0c | |
153 | #define VIA_REG_TYPE_INT_EOL 0x02 | |
154 | #define VIA_REG_TYPE_INT_FLAG 0x01 | |
155 | #define VIA_REG_OFFSET_TABLE_PTR 0x04 /* dword - channel table pointer */ | |
156 | #define VIA_REG_OFFSET_CURR_PTR 0x04 /* dword - channel current pointer */ | |
157 | #define VIA_REG_OFFSET_STOP_IDX 0x08 /* dword - stop index, channel type, sample rate */ | |
158 | #define VIA8233_REG_TYPE_16BIT 0x00200000 /* RW */ | |
159 | #define VIA8233_REG_TYPE_STEREO 0x00100000 /* RW */ | |
160 | #define VIA_REG_OFFSET_CURR_COUNT 0x0c /* dword - channel current count (24 bit) */ | |
161 | #define VIA_REG_OFFSET_CURR_INDEX 0x0f /* byte - channel current index (for via8233 only) */ | |
162 | ||
163 | #define DEFINE_VIA_REGSET(name,val) \ | |
164 | enum {\ | |
165 | VIA_REG_##name##_STATUS = (val),\ | |
166 | VIA_REG_##name##_CONTROL = (val) + 0x01,\ | |
167 | VIA_REG_##name##_TYPE = (val) + 0x02,\ | |
168 | VIA_REG_##name##_TABLE_PTR = (val) + 0x04,\ | |
169 | VIA_REG_##name##_CURR_PTR = (val) + 0x04,\ | |
170 | VIA_REG_##name##_STOP_IDX = (val) + 0x08,\ | |
171 | VIA_REG_##name##_CURR_COUNT = (val) + 0x0c,\ | |
172 | } | |
173 | ||
174 | /* playback block */ | |
175 | DEFINE_VIA_REGSET(PLAYBACK, 0x00); | |
176 | DEFINE_VIA_REGSET(CAPTURE, 0x10); | |
177 | DEFINE_VIA_REGSET(FM, 0x20); | |
178 | ||
179 | /* AC'97 */ | |
180 | #define VIA_REG_AC97 0x80 /* dword */ | |
181 | #define VIA_REG_AC97_CODEC_ID_MASK (3<<30) | |
182 | #define VIA_REG_AC97_CODEC_ID_SHIFT 30 | |
183 | #define VIA_REG_AC97_CODEC_ID_PRIMARY 0x00 | |
184 | #define VIA_REG_AC97_CODEC_ID_SECONDARY 0x01 | |
185 | #define VIA_REG_AC97_SECONDARY_VALID (1<<27) | |
186 | #define VIA_REG_AC97_PRIMARY_VALID (1<<25) | |
187 | #define VIA_REG_AC97_BUSY (1<<24) | |
188 | #define VIA_REG_AC97_READ (1<<23) | |
189 | #define VIA_REG_AC97_CMD_SHIFT 16 | |
190 | #define VIA_REG_AC97_CMD_MASK 0x7e | |
191 | #define VIA_REG_AC97_DATA_SHIFT 0 | |
192 | #define VIA_REG_AC97_DATA_MASK 0xffff | |
193 | ||
194 | #define VIA_REG_SGD_SHADOW 0x84 /* dword */ | |
195 | /* via686 */ | |
196 | #define VIA_REG_SGD_STAT_PB_FLAG (1<<0) | |
197 | #define VIA_REG_SGD_STAT_CP_FLAG (1<<1) | |
198 | #define VIA_REG_SGD_STAT_FM_FLAG (1<<2) | |
199 | #define VIA_REG_SGD_STAT_PB_EOL (1<<4) | |
200 | #define VIA_REG_SGD_STAT_CP_EOL (1<<5) | |
201 | #define VIA_REG_SGD_STAT_FM_EOL (1<<6) | |
202 | #define VIA_REG_SGD_STAT_PB_STOP (1<<8) | |
203 | #define VIA_REG_SGD_STAT_CP_STOP (1<<9) | |
204 | #define VIA_REG_SGD_STAT_FM_STOP (1<<10) | |
205 | #define VIA_REG_SGD_STAT_PB_ACTIVE (1<<12) | |
206 | #define VIA_REG_SGD_STAT_CP_ACTIVE (1<<13) | |
207 | #define VIA_REG_SGD_STAT_FM_ACTIVE (1<<14) | |
208 | /* via8233 */ | |
209 | #define VIA8233_REG_SGD_STAT_FLAG (1<<0) | |
210 | #define VIA8233_REG_SGD_STAT_EOL (1<<1) | |
211 | #define VIA8233_REG_SGD_STAT_STOP (1<<2) | |
212 | #define VIA8233_REG_SGD_STAT_ACTIVE (1<<3) | |
213 | #define VIA8233_INTR_MASK(chan) ((VIA8233_REG_SGD_STAT_FLAG|VIA8233_REG_SGD_STAT_EOL) << ((chan) * 4)) | |
214 | #define VIA8233_REG_SGD_CHAN_SDX 0 | |
215 | #define VIA8233_REG_SGD_CHAN_MULTI 4 | |
216 | #define VIA8233_REG_SGD_CHAN_REC 6 | |
217 | #define VIA8233_REG_SGD_CHAN_REC1 7 | |
218 | ||
219 | #define VIA_REG_GPI_STATUS 0x88 | |
220 | #define VIA_REG_GPI_INTR 0x8c | |
221 | ||
222 | /* multi-channel and capture registers for via8233 */ | |
223 | DEFINE_VIA_REGSET(MULTPLAY, 0x40); | |
224 | DEFINE_VIA_REGSET(CAPTURE_8233, 0x60); | |
225 | ||
226 | /* via8233-specific registers */ | |
227 | #define VIA_REG_OFS_PLAYBACK_VOLUME_L 0x02 /* byte */ | |
228 | #define VIA_REG_OFS_PLAYBACK_VOLUME_R 0x03 /* byte */ | |
229 | #define VIA_REG_OFS_MULTPLAY_FORMAT 0x02 /* byte - format and channels */ | |
230 | #define VIA_REG_MULTPLAY_FMT_8BIT 0x00 | |
231 | #define VIA_REG_MULTPLAY_FMT_16BIT 0x80 | |
232 | #define VIA_REG_MULTPLAY_FMT_CH_MASK 0x70 /* # channels << 4 (valid = 1,2,4,6) */ | |
233 | #define VIA_REG_OFS_CAPTURE_FIFO 0x02 /* byte - bit 6 = fifo enable */ | |
234 | #define VIA_REG_CAPTURE_FIFO_ENABLE 0x40 | |
235 | ||
236 | #define VIA_DXS_MAX_VOLUME 31 /* max. volume (attenuation) of reg 0x32/33 */ | |
237 | ||
238 | #define VIA_REG_CAPTURE_CHANNEL 0x63 /* byte - input select */ | |
239 | #define VIA_REG_CAPTURE_CHANNEL_MIC 0x4 | |
240 | #define VIA_REG_CAPTURE_CHANNEL_LINE 0 | |
241 | #define VIA_REG_CAPTURE_SELECT_CODEC 0x03 /* recording source codec (0 = primary) */ | |
242 | ||
243 | #define VIA_TBL_BIT_FLAG 0x40000000 | |
244 | #define VIA_TBL_BIT_EOL 0x80000000 | |
245 | ||
246 | /* pci space */ | |
247 | #define VIA_ACLINK_STAT 0x40 | |
248 | #define VIA_ACLINK_C11_READY 0x20 | |
249 | #define VIA_ACLINK_C10_READY 0x10 | |
250 | #define VIA_ACLINK_C01_READY 0x04 /* secondary codec ready */ | |
251 | #define VIA_ACLINK_LOWPOWER 0x02 /* low-power state */ | |
252 | #define VIA_ACLINK_C00_READY 0x01 /* primary codec ready */ | |
253 | #define VIA_ACLINK_CTRL 0x41 | |
254 | #define VIA_ACLINK_CTRL_ENABLE 0x80 /* 0: disable, 1: enable */ | |
255 | #define VIA_ACLINK_CTRL_RESET 0x40 /* 0: assert, 1: de-assert */ | |
256 | #define VIA_ACLINK_CTRL_SYNC 0x20 /* 0: release SYNC, 1: force SYNC hi */ | |
257 | #define VIA_ACLINK_CTRL_SDO 0x10 /* 0: release SDO, 1: force SDO hi */ | |
258 | #define VIA_ACLINK_CTRL_VRA 0x08 /* 0: disable VRA, 1: enable VRA */ | |
259 | #define VIA_ACLINK_CTRL_PCM 0x04 /* 0: disable PCM, 1: enable PCM */ | |
260 | #define VIA_ACLINK_CTRL_FM 0x02 /* via686 only */ | |
261 | #define VIA_ACLINK_CTRL_SB 0x01 /* via686 only */ | |
262 | #define VIA_ACLINK_CTRL_INIT (VIA_ACLINK_CTRL_ENABLE|\ | |
263 | VIA_ACLINK_CTRL_RESET|\ | |
264 | VIA_ACLINK_CTRL_PCM|\ | |
265 | VIA_ACLINK_CTRL_VRA) | |
266 | #define VIA_FUNC_ENABLE 0x42 | |
267 | #define VIA_FUNC_MIDI_PNP 0x80 /* FIXME: it's 0x40 in the datasheet! */ | |
268 | #define VIA_FUNC_MIDI_IRQMASK 0x40 /* FIXME: not documented! */ | |
269 | #define VIA_FUNC_RX2C_WRITE 0x20 | |
270 | #define VIA_FUNC_SB_FIFO_EMPTY 0x10 | |
271 | #define VIA_FUNC_ENABLE_GAME 0x08 | |
272 | #define VIA_FUNC_ENABLE_FM 0x04 | |
273 | #define VIA_FUNC_ENABLE_MIDI 0x02 | |
274 | #define VIA_FUNC_ENABLE_SB 0x01 | |
275 | #define VIA_PNP_CONTROL 0x43 | |
276 | #define VIA_FM_NMI_CTRL 0x48 | |
277 | #define VIA8233_VOLCHG_CTRL 0x48 | |
278 | #define VIA8233_SPDIF_CTRL 0x49 | |
279 | #define VIA8233_SPDIF_DX3 0x08 | |
280 | #define VIA8233_SPDIF_SLOT_MASK 0x03 | |
281 | #define VIA8233_SPDIF_SLOT_1011 0x00 | |
282 | #define VIA8233_SPDIF_SLOT_34 0x01 | |
283 | #define VIA8233_SPDIF_SLOT_78 0x02 | |
284 | #define VIA8233_SPDIF_SLOT_69 0x03 | |
285 | ||
286 | /* | |
287 | */ | |
288 | ||
289 | #define VIA_DXS_AUTO 0 | |
290 | #define VIA_DXS_ENABLE 1 | |
291 | #define VIA_DXS_DISABLE 2 | |
292 | #define VIA_DXS_48K 3 | |
293 | #define VIA_DXS_NO_VRA 4 | |
2d7eb7cb | 294 | #define VIA_DXS_SRC 5 |
1da177e4 LT |
295 | |
296 | ||
1da177e4 LT |
297 | /* |
298 | * pcm stream | |
299 | */ | |
300 | ||
301 | struct snd_via_sg_table { | |
302 | unsigned int offset; | |
303 | unsigned int size; | |
304 | } ; | |
305 | ||
306 | #define VIA_TABLE_SIZE 255 | |
5503600a | 307 | #define VIA_MAX_BUFSIZE (1<<24) |
1da177e4 | 308 | |
e437e3d7 | 309 | struct viadev { |
1da177e4 LT |
310 | unsigned int reg_offset; |
311 | unsigned long port; | |
312 | int direction; /* playback = 0, capture = 1 */ | |
e437e3d7 | 313 | struct snd_pcm_substream *substream; |
1da177e4 LT |
314 | int running; |
315 | unsigned int tbl_entries; /* # descriptors */ | |
316 | struct snd_dma_buffer table; | |
317 | struct snd_via_sg_table *idx_table; | |
318 | /* for recovery from the unexpected pointer */ | |
319 | unsigned int lastpos; | |
320 | unsigned int fragsize; | |
321 | unsigned int bufsize; | |
322 | unsigned int bufsize2; | |
4f550df5 KW |
323 | int hwptr_done; /* processed frame position in the buffer */ |
324 | int in_interrupt; | |
325 | int shadow_shift; | |
1da177e4 LT |
326 | }; |
327 | ||
328 | ||
329 | enum { TYPE_CARD_VIA686 = 1, TYPE_CARD_VIA8233 }; | |
330 | enum { TYPE_VIA686, TYPE_VIA8233, TYPE_VIA8233A }; | |
331 | ||
332 | #define VIA_MAX_DEVS 7 /* 4 playback, 1 multi, 2 capture */ | |
333 | ||
334 | struct via_rate_lock { | |
335 | spinlock_t lock; | |
336 | int rate; | |
337 | int used; | |
338 | }; | |
339 | ||
e437e3d7 | 340 | struct via82xx { |
1da177e4 LT |
341 | int irq; |
342 | ||
343 | unsigned long port; | |
344 | struct resource *mpu_res; | |
345 | int chip_type; | |
346 | unsigned char revision; | |
347 | ||
348 | unsigned char old_legacy; | |
349 | unsigned char old_legacy_cfg; | |
c7561cd8 | 350 | #ifdef CONFIG_PM_SLEEP |
1da177e4 LT |
351 | unsigned char legacy_saved; |
352 | unsigned char legacy_cfg_saved; | |
353 | unsigned char spdif_ctrl_saved; | |
354 | unsigned char capture_src_saved[2]; | |
355 | unsigned int mpu_port_saved; | |
356 | #endif | |
357 | ||
00f226d4 HM |
358 | unsigned char playback_volume[4][2]; /* for VIA8233/C/8235; default = 0 */ |
359 | unsigned char playback_volume_c[2]; /* for VIA8233/C/8235; default = 0 */ | |
1da177e4 LT |
360 | |
361 | unsigned int intr_mask; /* SGD_SHADOW mask to check interrupts */ | |
362 | ||
363 | struct pci_dev *pci; | |
e437e3d7 | 364 | struct snd_card *card; |
1da177e4 LT |
365 | |
366 | unsigned int num_devs; | |
367 | unsigned int playback_devno, multi_devno, capture_devno; | |
e437e3d7 | 368 | struct viadev devs[VIA_MAX_DEVS]; |
1da177e4 LT |
369 | struct via_rate_lock rates[2]; /* playback and capture */ |
370 | unsigned int dxs_fixed: 1; /* DXS channel accepts only 48kHz */ | |
371 | unsigned int no_vra: 1; /* no need to set VRA on DXS channels */ | |
2d7eb7cb | 372 | unsigned int dxs_src: 1; /* use full SRC capabilities of DXS */ |
1da177e4 LT |
373 | unsigned int spdif_on: 1; /* only spdif rates work to external DACs */ |
374 | ||
e437e3d7 TI |
375 | struct snd_pcm *pcms[2]; |
376 | struct snd_rawmidi *rmidi; | |
3d009413 | 377 | struct snd_kcontrol *dxs_controls[4]; |
1da177e4 | 378 | |
e437e3d7 TI |
379 | struct snd_ac97_bus *ac97_bus; |
380 | struct snd_ac97 *ac97; | |
1da177e4 LT |
381 | unsigned int ac97_clock; |
382 | unsigned int ac97_secondary; /* secondary AC'97 codec is present */ | |
383 | ||
384 | spinlock_t reg_lock; | |
e437e3d7 | 385 | struct snd_info_entry *proc_entry; |
1da177e4 LT |
386 | |
387 | #ifdef SUPPORT_JOYSTICK | |
388 | struct gameport *gameport; | |
389 | #endif | |
390 | }; | |
391 | ||
9baa3c34 | 392 | static const struct pci_device_id snd_via82xx_ids[] = { |
4f550df5 | 393 | /* 0x1106, 0x3058 */ |
28d27aae | 394 | { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C686_5), TYPE_CARD_VIA686, }, /* 686A */ |
4f550df5 | 395 | /* 0x1106, 0x3059 */ |
28d27aae | 396 | { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8233_5), TYPE_CARD_VIA8233, }, /* VT8233 */ |
1da177e4 LT |
397 | { 0, } |
398 | }; | |
399 | ||
400 | MODULE_DEVICE_TABLE(pci, snd_via82xx_ids); | |
401 | ||
402 | /* | |
403 | */ | |
404 | ||
405 | /* | |
406 | * allocate and initialize the descriptor buffers | |
407 | * periods = number of periods | |
408 | * fragsize = period size in bytes | |
409 | */ | |
e437e3d7 | 410 | static int build_via_table(struct viadev *dev, struct snd_pcm_substream *substream, |
1da177e4 LT |
411 | struct pci_dev *pci, |
412 | unsigned int periods, unsigned int fragsize) | |
413 | { | |
414 | unsigned int i, idx, ofs, rest; | |
e437e3d7 | 415 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
c5bb0867 | 416 | __le32 *pgtbl; |
1da177e4 LT |
417 | |
418 | if (dev->table.area == NULL) { | |
419 | /* the start of each lists must be aligned to 8 bytes, | |
420 | * but the kernel pages are much bigger, so we don't care | |
421 | */ | |
6974f8ad | 422 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev, |
1da177e4 LT |
423 | PAGE_ALIGN(VIA_TABLE_SIZE * 2 * 8), |
424 | &dev->table) < 0) | |
425 | return -ENOMEM; | |
426 | } | |
427 | if (! dev->idx_table) { | |
6da2ec56 KC |
428 | dev->idx_table = kmalloc_array(VIA_TABLE_SIZE, |
429 | sizeof(*dev->idx_table), | |
430 | GFP_KERNEL); | |
1da177e4 LT |
431 | if (! dev->idx_table) |
432 | return -ENOMEM; | |
433 | } | |
434 | ||
435 | /* fill the entries */ | |
436 | idx = 0; | |
437 | ofs = 0; | |
c5bb0867 | 438 | pgtbl = (__le32 *)dev->table.area; |
1da177e4 LT |
439 | for (i = 0; i < periods; i++) { |
440 | rest = fragsize; | |
441 | /* fill descriptors for a period. | |
442 | * a period can be split to several descriptors if it's | |
443 | * over page boundary. | |
444 | */ | |
445 | do { | |
446 | unsigned int r; | |
447 | unsigned int flag; | |
77a23f26 | 448 | unsigned int addr; |
1da177e4 LT |
449 | |
450 | if (idx >= VIA_TABLE_SIZE) { | |
59d3acfa | 451 | dev_err(&pci->dev, "too much table size!\n"); |
1da177e4 LT |
452 | return -EINVAL; |
453 | } | |
77a23f26 | 454 | addr = snd_pcm_sgbuf_get_addr(substream, ofs); |
c5bb0867 | 455 | pgtbl[idx << 1] = cpu_to_le32(addr); |
5503600a | 456 | r = snd_pcm_sgbuf_get_chunk_size(substream, ofs, rest); |
1da177e4 LT |
457 | rest -= r; |
458 | if (! rest) { | |
459 | if (i == periods - 1) | |
460 | flag = VIA_TBL_BIT_EOL; /* buffer boundary */ | |
461 | else | |
462 | flag = VIA_TBL_BIT_FLAG; /* period boundary */ | |
463 | } else | |
464 | flag = 0; /* period continues to the next */ | |
ee419653 | 465 | /* |
59d3acfa TI |
466 | dev_dbg(&pci->dev, |
467 | "tbl %d: at %d size %d (rest %d)\n", | |
468 | idx, ofs, r, rest); | |
ee419653 | 469 | */ |
c5bb0867 | 470 | pgtbl[(idx<<1) + 1] = cpu_to_le32(r | flag); |
1da177e4 LT |
471 | dev->idx_table[idx].offset = ofs; |
472 | dev->idx_table[idx].size = r; | |
473 | ofs += r; | |
474 | idx++; | |
475 | } while (rest > 0); | |
476 | } | |
477 | dev->tbl_entries = idx; | |
478 | dev->bufsize = periods * fragsize; | |
479 | dev->bufsize2 = dev->bufsize / 2; | |
480 | dev->fragsize = fragsize; | |
481 | return 0; | |
482 | } | |
483 | ||
484 | ||
e437e3d7 | 485 | static int clean_via_table(struct viadev *dev, struct snd_pcm_substream *substream, |
1da177e4 LT |
486 | struct pci_dev *pci) |
487 | { | |
488 | if (dev->table.area) { | |
489 | snd_dma_free_pages(&dev->table); | |
490 | dev->table.area = NULL; | |
491 | } | |
4d572776 JJ |
492 | kfree(dev->idx_table); |
493 | dev->idx_table = NULL; | |
1da177e4 LT |
494 | return 0; |
495 | } | |
496 | ||
497 | /* | |
498 | * Basic I/O | |
499 | */ | |
500 | ||
e437e3d7 | 501 | static inline unsigned int snd_via82xx_codec_xread(struct via82xx *chip) |
1da177e4 LT |
502 | { |
503 | return inl(VIAREG(chip, AC97)); | |
504 | } | |
505 | ||
e437e3d7 | 506 | static inline void snd_via82xx_codec_xwrite(struct via82xx *chip, unsigned int val) |
1da177e4 LT |
507 | { |
508 | outl(val, VIAREG(chip, AC97)); | |
509 | } | |
510 | ||
e437e3d7 | 511 | static int snd_via82xx_codec_ready(struct via82xx *chip, int secondary) |
1da177e4 LT |
512 | { |
513 | unsigned int timeout = 1000; /* 1ms */ | |
514 | unsigned int val; | |
515 | ||
516 | while (timeout-- > 0) { | |
517 | udelay(1); | |
afb342f0 TI |
518 | val = snd_via82xx_codec_xread(chip); |
519 | if (!(val & VIA_REG_AC97_BUSY)) | |
1da177e4 LT |
520 | return val & 0xffff; |
521 | } | |
59d3acfa | 522 | dev_err(chip->card->dev, "codec_ready: codec %i is not ready [0x%x]\n", |
e437e3d7 | 523 | secondary, snd_via82xx_codec_xread(chip)); |
1da177e4 LT |
524 | return -EIO; |
525 | } | |
526 | ||
e437e3d7 | 527 | static int snd_via82xx_codec_valid(struct via82xx *chip, int secondary) |
1da177e4 LT |
528 | { |
529 | unsigned int timeout = 1000; /* 1ms */ | |
530 | unsigned int val, val1; | |
531 | unsigned int stat = !secondary ? VIA_REG_AC97_PRIMARY_VALID : | |
532 | VIA_REG_AC97_SECONDARY_VALID; | |
533 | ||
534 | while (timeout-- > 0) { | |
535 | val = snd_via82xx_codec_xread(chip); | |
536 | val1 = val & (VIA_REG_AC97_BUSY | stat); | |
537 | if (val1 == stat) | |
538 | return val & 0xffff; | |
539 | udelay(1); | |
540 | } | |
541 | return -EIO; | |
542 | } | |
543 | ||
e437e3d7 | 544 | static void snd_via82xx_codec_wait(struct snd_ac97 *ac97) |
1da177e4 | 545 | { |
e437e3d7 | 546 | struct via82xx *chip = ac97->private_data; |
86a5d9cf | 547 | __always_unused int err; |
1da177e4 LT |
548 | err = snd_via82xx_codec_ready(chip, ac97->num); |
549 | /* here we need to wait fairly for long time.. */ | |
115551d9 SA |
550 | if (!nodelay) |
551 | msleep(500); | |
1da177e4 LT |
552 | } |
553 | ||
e437e3d7 | 554 | static void snd_via82xx_codec_write(struct snd_ac97 *ac97, |
1da177e4 LT |
555 | unsigned short reg, |
556 | unsigned short val) | |
557 | { | |
e437e3d7 | 558 | struct via82xx *chip = ac97->private_data; |
1da177e4 | 559 | unsigned int xval; |
4f550df5 | 560 | |
1da177e4 LT |
561 | xval = !ac97->num ? VIA_REG_AC97_CODEC_ID_PRIMARY : VIA_REG_AC97_CODEC_ID_SECONDARY; |
562 | xval <<= VIA_REG_AC97_CODEC_ID_SHIFT; | |
563 | xval |= reg << VIA_REG_AC97_CMD_SHIFT; | |
564 | xval |= val << VIA_REG_AC97_DATA_SHIFT; | |
565 | snd_via82xx_codec_xwrite(chip, xval); | |
566 | snd_via82xx_codec_ready(chip, ac97->num); | |
567 | } | |
568 | ||
e437e3d7 | 569 | static unsigned short snd_via82xx_codec_read(struct snd_ac97 *ac97, unsigned short reg) |
1da177e4 | 570 | { |
e437e3d7 | 571 | struct via82xx *chip = ac97->private_data; |
1da177e4 LT |
572 | unsigned int xval, val = 0xffff; |
573 | int again = 0; | |
574 | ||
575 | xval = ac97->num << VIA_REG_AC97_CODEC_ID_SHIFT; | |
576 | xval |= ac97->num ? VIA_REG_AC97_SECONDARY_VALID : VIA_REG_AC97_PRIMARY_VALID; | |
577 | xval |= VIA_REG_AC97_READ; | |
578 | xval |= (reg & 0x7f) << VIA_REG_AC97_CMD_SHIFT; | |
579 | while (1) { | |
580 | if (again++ > 3) { | |
59d3acfa TI |
581 | dev_err(chip->card->dev, |
582 | "codec_read: codec %i is not valid [0x%x]\n", | |
e437e3d7 | 583 | ac97->num, snd_via82xx_codec_xread(chip)); |
1da177e4 LT |
584 | return 0xffff; |
585 | } | |
586 | snd_via82xx_codec_xwrite(chip, xval); | |
587 | udelay (20); | |
588 | if (snd_via82xx_codec_valid(chip, ac97->num) >= 0) { | |
589 | udelay(25); | |
590 | val = snd_via82xx_codec_xread(chip); | |
591 | break; | |
592 | } | |
593 | } | |
594 | return val & 0xffff; | |
595 | } | |
596 | ||
e437e3d7 | 597 | static void snd_via82xx_channel_reset(struct via82xx *chip, struct viadev *viadev) |
1da177e4 LT |
598 | { |
599 | outb(VIA_REG_CTRL_PAUSE | VIA_REG_CTRL_TERMINATE | VIA_REG_CTRL_RESET, | |
600 | VIADEV_REG(viadev, OFFSET_CONTROL)); | |
601 | inb(VIADEV_REG(viadev, OFFSET_CONTROL)); | |
602 | udelay(50); | |
603 | /* disable interrupts */ | |
604 | outb(0x00, VIADEV_REG(viadev, OFFSET_CONTROL)); | |
605 | /* clear interrupts */ | |
606 | outb(0x03, VIADEV_REG(viadev, OFFSET_STATUS)); | |
607 | outb(0x00, VIADEV_REG(viadev, OFFSET_TYPE)); /* for via686 */ | |
608 | // outl(0, VIADEV_REG(viadev, OFFSET_CURR_PTR)); | |
609 | viadev->lastpos = 0; | |
4f550df5 | 610 | viadev->hwptr_done = 0; |
1da177e4 LT |
611 | } |
612 | ||
613 | ||
614 | /* | |
615 | * Interrupt handler | |
4f550df5 | 616 | * Used for 686 and 8233A |
1da177e4 | 617 | */ |
7d12e780 | 618 | static irqreturn_t snd_via686_interrupt(int irq, void *dev_id) |
1da177e4 | 619 | { |
e437e3d7 | 620 | struct via82xx *chip = dev_id; |
1da177e4 LT |
621 | unsigned int status; |
622 | unsigned int i; | |
623 | ||
624 | status = inl(VIAREG(chip, SGD_SHADOW)); | |
625 | if (! (status & chip->intr_mask)) { | |
626 | if (chip->rmidi) | |
627 | /* check mpu401 interrupt */ | |
7d12e780 | 628 | return snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); |
1da177e4 LT |
629 | return IRQ_NONE; |
630 | } | |
631 | ||
632 | /* check status for each stream */ | |
633 | spin_lock(&chip->reg_lock); | |
634 | for (i = 0; i < chip->num_devs; i++) { | |
e437e3d7 | 635 | struct viadev *viadev = &chip->devs[i]; |
1da177e4 | 636 | unsigned char c_status = inb(VIADEV_REG(viadev, OFFSET_STATUS)); |
4f550df5 | 637 | if (! (c_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG|VIA_REG_STAT_STOPPED))) |
1da177e4 LT |
638 | continue; |
639 | if (viadev->substream && viadev->running) { | |
4f550df5 KW |
640 | /* |
641 | * Update hwptr_done based on 'period elapsed' | |
642 | * interrupts. We'll use it, when the chip returns 0 | |
643 | * for OFFSET_CURR_COUNT. | |
644 | */ | |
645 | if (c_status & VIA_REG_STAT_EOL) | |
646 | viadev->hwptr_done = 0; | |
647 | else | |
648 | viadev->hwptr_done += viadev->fragsize; | |
649 | viadev->in_interrupt = c_status; | |
1da177e4 LT |
650 | spin_unlock(&chip->reg_lock); |
651 | snd_pcm_period_elapsed(viadev->substream); | |
652 | spin_lock(&chip->reg_lock); | |
4f550df5 | 653 | viadev->in_interrupt = 0; |
1da177e4 LT |
654 | } |
655 | outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */ | |
656 | } | |
657 | spin_unlock(&chip->reg_lock); | |
658 | return IRQ_HANDLED; | |
659 | } | |
660 | ||
4f550df5 KW |
661 | /* |
662 | * Interrupt handler | |
663 | */ | |
7d12e780 | 664 | static irqreturn_t snd_via8233_interrupt(int irq, void *dev_id) |
4f550df5 | 665 | { |
e437e3d7 | 666 | struct via82xx *chip = dev_id; |
4f550df5 KW |
667 | unsigned int status; |
668 | unsigned int i; | |
669 | int irqreturn = 0; | |
670 | ||
671 | /* check status for each stream */ | |
672 | spin_lock(&chip->reg_lock); | |
673 | status = inl(VIAREG(chip, SGD_SHADOW)); | |
674 | ||
675 | for (i = 0; i < chip->num_devs; i++) { | |
e437e3d7 TI |
676 | struct viadev *viadev = &chip->devs[i]; |
677 | struct snd_pcm_substream *substream; | |
4f550df5 KW |
678 | unsigned char c_status, shadow_status; |
679 | ||
680 | shadow_status = (status >> viadev->shadow_shift) & | |
681 | (VIA8233_SHADOW_STAT_ACTIVE|VIA_REG_STAT_EOL| | |
682 | VIA_REG_STAT_FLAG); | |
683 | c_status = shadow_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG); | |
684 | if (!c_status) | |
685 | continue; | |
686 | ||
687 | substream = viadev->substream; | |
688 | if (substream && viadev->running) { | |
689 | /* | |
690 | * Update hwptr_done based on 'period elapsed' | |
691 | * interrupts. We'll use it, when the chip returns 0 | |
692 | * for OFFSET_CURR_COUNT. | |
693 | */ | |
694 | if (c_status & VIA_REG_STAT_EOL) | |
695 | viadev->hwptr_done = 0; | |
696 | else | |
697 | viadev->hwptr_done += viadev->fragsize; | |
698 | viadev->in_interrupt = c_status; | |
699 | if (shadow_status & VIA8233_SHADOW_STAT_ACTIVE) | |
700 | viadev->in_interrupt |= VIA_REG_STAT_ACTIVE; | |
701 | spin_unlock(&chip->reg_lock); | |
702 | ||
703 | snd_pcm_period_elapsed(substream); | |
704 | ||
705 | spin_lock(&chip->reg_lock); | |
706 | viadev->in_interrupt = 0; | |
707 | } | |
708 | outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */ | |
709 | irqreturn = 1; | |
710 | } | |
711 | spin_unlock(&chip->reg_lock); | |
712 | return IRQ_RETVAL(irqreturn); | |
713 | } | |
714 | ||
1da177e4 LT |
715 | /* |
716 | * PCM callbacks | |
717 | */ | |
718 | ||
719 | /* | |
720 | * trigger callback | |
721 | */ | |
e437e3d7 | 722 | static int snd_via82xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 723 | { |
e437e3d7 TI |
724 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
725 | struct viadev *viadev = substream->runtime->private_data; | |
1da177e4 LT |
726 | unsigned char val; |
727 | ||
728 | if (chip->chip_type != TYPE_VIA686) | |
729 | val = VIA_REG_CTRL_INT; | |
730 | else | |
731 | val = 0; | |
732 | switch (cmd) { | |
733 | case SNDRV_PCM_TRIGGER_START: | |
41e4845c | 734 | case SNDRV_PCM_TRIGGER_RESUME: |
1da177e4 LT |
735 | val |= VIA_REG_CTRL_START; |
736 | viadev->running = 1; | |
737 | break; | |
738 | case SNDRV_PCM_TRIGGER_STOP: | |
41e4845c | 739 | case SNDRV_PCM_TRIGGER_SUSPEND: |
1da177e4 LT |
740 | val = VIA_REG_CTRL_TERMINATE; |
741 | viadev->running = 0; | |
742 | break; | |
743 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
744 | val |= VIA_REG_CTRL_PAUSE; | |
745 | viadev->running = 0; | |
746 | break; | |
747 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
748 | viadev->running = 1; | |
749 | break; | |
750 | default: | |
751 | return -EINVAL; | |
752 | } | |
753 | outb(val, VIADEV_REG(viadev, OFFSET_CONTROL)); | |
754 | if (cmd == SNDRV_PCM_TRIGGER_STOP) | |
755 | snd_via82xx_channel_reset(chip, viadev); | |
756 | return 0; | |
757 | } | |
758 | ||
759 | ||
760 | /* | |
761 | * pointer callbacks | |
762 | */ | |
763 | ||
764 | /* | |
765 | * calculate the linear position at the given sg-buffer index and the rest count | |
766 | */ | |
767 | ||
768 | #define check_invalid_pos(viadev,pos) \ | |
e437e3d7 TI |
769 | ((pos) < viadev->lastpos && ((pos) >= viadev->bufsize2 ||\ |
770 | viadev->lastpos < viadev->bufsize2)) | |
1da177e4 | 771 | |
59d3acfa TI |
772 | static inline unsigned int calc_linear_pos(struct via82xx *chip, |
773 | struct viadev *viadev, | |
774 | unsigned int idx, | |
e437e3d7 | 775 | unsigned int count) |
1da177e4 LT |
776 | { |
777 | unsigned int size, base, res; | |
778 | ||
779 | size = viadev->idx_table[idx].size; | |
780 | base = viadev->idx_table[idx].offset; | |
781 | res = base + size - count; | |
4f550df5 KW |
782 | if (res >= viadev->bufsize) |
783 | res -= viadev->bufsize; | |
1da177e4 LT |
784 | |
785 | /* check the validity of the calculated position */ | |
786 | if (size < count) { | |
59d3acfa TI |
787 | dev_dbg(chip->card->dev, |
788 | "invalid via82xx_cur_ptr (size = %d, count = %d)\n", | |
e437e3d7 | 789 | (int)size, (int)count); |
1da177e4 LT |
790 | res = viadev->lastpos; |
791 | } else { | |
792 | if (! count) { | |
793 | /* Some mobos report count = 0 on the DMA boundary, | |
794 | * i.e. count = size indeed. | |
795 | * Let's check whether this step is above the expected size. | |
796 | */ | |
797 | int delta = res - viadev->lastpos; | |
798 | if (delta < 0) | |
799 | delta += viadev->bufsize; | |
800 | if ((unsigned int)delta > viadev->fragsize) | |
801 | res = base; | |
802 | } | |
803 | if (check_invalid_pos(viadev, res)) { | |
804 | #ifdef POINTER_DEBUG | |
59d3acfa TI |
805 | dev_dbg(chip->card->dev, |
806 | "fail: idx = %i/%i, lastpos = 0x%x, bufsize2 = 0x%x, offsize = 0x%x, size = 0x%x, count = 0x%x\n", | |
807 | idx, viadev->tbl_entries, | |
e437e3d7 TI |
808 | viadev->lastpos, viadev->bufsize2, |
809 | viadev->idx_table[idx].offset, | |
810 | viadev->idx_table[idx].size, count); | |
1da177e4 LT |
811 | #endif |
812 | /* count register returns full size when end of buffer is reached */ | |
813 | res = base + size; | |
814 | if (check_invalid_pos(viadev, res)) { | |
59d3acfa TI |
815 | dev_dbg(chip->card->dev, |
816 | "invalid via82xx_cur_ptr (2), using last valid pointer\n"); | |
1da177e4 LT |
817 | res = viadev->lastpos; |
818 | } | |
819 | } | |
820 | } | |
1da177e4 LT |
821 | return res; |
822 | } | |
823 | ||
824 | /* | |
825 | * get the current pointer on via686 | |
826 | */ | |
e437e3d7 | 827 | static snd_pcm_uframes_t snd_via686_pcm_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 828 | { |
e437e3d7 TI |
829 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
830 | struct viadev *viadev = substream->runtime->private_data; | |
1da177e4 LT |
831 | unsigned int idx, ptr, count, res; |
832 | ||
da3cec35 TI |
833 | if (snd_BUG_ON(!viadev->tbl_entries)) |
834 | return 0; | |
1da177e4 LT |
835 | if (!(inb(VIADEV_REG(viadev, OFFSET_STATUS)) & VIA_REG_STAT_ACTIVE)) |
836 | return 0; | |
837 | ||
838 | spin_lock(&chip->reg_lock); | |
839 | count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)) & 0xffffff; | |
840 | /* The via686a does not have the current index register, | |
841 | * so we need to calculate the index from CURR_PTR. | |
842 | */ | |
843 | ptr = inl(VIADEV_REG(viadev, OFFSET_CURR_PTR)); | |
844 | if (ptr <= (unsigned int)viadev->table.addr) | |
845 | idx = 0; | |
846 | else /* CURR_PTR holds the address + 8 */ | |
847 | idx = ((ptr - (unsigned int)viadev->table.addr) / 8 - 1) % viadev->tbl_entries; | |
59d3acfa | 848 | res = calc_linear_pos(chip, viadev, idx, count); |
4f550df5 | 849 | viadev->lastpos = res; /* remember the last position */ |
1da177e4 LT |
850 | spin_unlock(&chip->reg_lock); |
851 | ||
852 | return bytes_to_frames(substream->runtime, res); | |
853 | } | |
854 | ||
855 | /* | |
856 | * get the current pointer on via823x | |
857 | */ | |
e437e3d7 | 858 | static snd_pcm_uframes_t snd_via8233_pcm_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 859 | { |
e437e3d7 TI |
860 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
861 | struct viadev *viadev = substream->runtime->private_data; | |
1da177e4 | 862 | unsigned int idx, count, res; |
4f550df5 | 863 | int status; |
1da177e4 | 864 | |
da3cec35 TI |
865 | if (snd_BUG_ON(!viadev->tbl_entries)) |
866 | return 0; | |
4f550df5 | 867 | |
1da177e4 | 868 | spin_lock(&chip->reg_lock); |
4f550df5 KW |
869 | count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)); |
870 | status = viadev->in_interrupt; | |
871 | if (!status) | |
872 | status = inb(VIADEV_REG(viadev, OFFSET_STATUS)); | |
873 | ||
c6cc0e3b BJ |
874 | /* An apparent bug in the 8251 is worked around by sending a |
875 | * REG_CTRL_START. */ | |
876 | if (chip->revision == VIA_REV_8251 && (status & VIA_REG_STAT_EOL)) | |
877 | snd_via82xx_pcm_trigger(substream, SNDRV_PCM_TRIGGER_START); | |
878 | ||
4f550df5 | 879 | if (!(status & VIA_REG_STAT_ACTIVE)) { |
c6cc0e3b BJ |
880 | res = 0; |
881 | goto unlock; | |
4f550df5 KW |
882 | } |
883 | if (count & 0xffffff) { | |
884 | idx = count >> 24; | |
885 | if (idx >= viadev->tbl_entries) { | |
1da177e4 | 886 | #ifdef POINTER_DEBUG |
59d3acfa TI |
887 | dev_dbg(chip->card->dev, |
888 | "fail: invalid idx = %i/%i\n", idx, | |
e437e3d7 | 889 | viadev->tbl_entries); |
1da177e4 | 890 | #endif |
4f550df5 KW |
891 | res = viadev->lastpos; |
892 | } else { | |
893 | count &= 0xffffff; | |
59d3acfa | 894 | res = calc_linear_pos(chip, viadev, idx, count); |
4f550df5 | 895 | } |
1da177e4 | 896 | } else { |
4f550df5 KW |
897 | res = viadev->hwptr_done; |
898 | if (!viadev->in_interrupt) { | |
899 | if (status & VIA_REG_STAT_EOL) { | |
900 | res = 0; | |
901 | } else | |
902 | if (status & VIA_REG_STAT_FLAG) { | |
903 | res += viadev->fragsize; | |
904 | } | |
905 | } | |
906 | } | |
907 | unlock: | |
908 | viadev->lastpos = res; | |
1da177e4 LT |
909 | spin_unlock(&chip->reg_lock); |
910 | ||
911 | return bytes_to_frames(substream->runtime, res); | |
912 | } | |
913 | ||
914 | ||
915 | /* | |
916 | * hw_params callback: | |
917 | * allocate the buffer and build up the buffer description table | |
918 | */ | |
e437e3d7 TI |
919 | static int snd_via82xx_hw_params(struct snd_pcm_substream *substream, |
920 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 921 | { |
e437e3d7 TI |
922 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
923 | struct viadev *viadev = substream->runtime->private_data; | |
1da177e4 | 924 | |
8e2c7524 TI |
925 | return build_via_table(viadev, substream, chip->pci, |
926 | params_periods(hw_params), | |
927 | params_period_bytes(hw_params)); | |
1da177e4 LT |
928 | } |
929 | ||
930 | /* | |
931 | * hw_free callback: | |
932 | * clean up the buffer description table and release the buffer | |
933 | */ | |
e437e3d7 | 934 | static int snd_via82xx_hw_free(struct snd_pcm_substream *substream) |
1da177e4 | 935 | { |
e437e3d7 TI |
936 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
937 | struct viadev *viadev = substream->runtime->private_data; | |
1da177e4 LT |
938 | |
939 | clean_via_table(viadev, substream, chip->pci); | |
1da177e4 LT |
940 | return 0; |
941 | } | |
942 | ||
943 | ||
944 | /* | |
945 | * set up the table pointer | |
946 | */ | |
e437e3d7 | 947 | static void snd_via82xx_set_table_ptr(struct via82xx *chip, struct viadev *viadev) |
1da177e4 LT |
948 | { |
949 | snd_via82xx_codec_ready(chip, 0); | |
950 | outl((u32)viadev->table.addr, VIADEV_REG(viadev, OFFSET_TABLE_PTR)); | |
951 | udelay(20); | |
952 | snd_via82xx_codec_ready(chip, 0); | |
953 | } | |
954 | ||
955 | /* | |
956 | * prepare callback for playback and capture on via686 | |
957 | */ | |
e437e3d7 TI |
958 | static void via686_setup_format(struct via82xx *chip, struct viadev *viadev, |
959 | struct snd_pcm_runtime *runtime) | |
1da177e4 LT |
960 | { |
961 | snd_via82xx_channel_reset(chip, viadev); | |
962 | /* this must be set after channel_reset */ | |
963 | snd_via82xx_set_table_ptr(chip, viadev); | |
964 | outb(VIA_REG_TYPE_AUTOSTART | | |
965 | (runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA_REG_TYPE_16BIT : 0) | | |
966 | (runtime->channels > 1 ? VIA_REG_TYPE_STEREO : 0) | | |
967 | ((viadev->reg_offset & 0x10) == 0 ? VIA_REG_TYPE_INT_LSAMPLE : 0) | | |
968 | VIA_REG_TYPE_INT_EOL | | |
969 | VIA_REG_TYPE_INT_FLAG, VIADEV_REG(viadev, OFFSET_TYPE)); | |
970 | } | |
971 | ||
e437e3d7 | 972 | static int snd_via686_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 973 | { |
e437e3d7 TI |
974 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
975 | struct viadev *viadev = substream->runtime->private_data; | |
976 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
977 | |
978 | snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate); | |
979 | snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate); | |
980 | via686_setup_format(chip, viadev, runtime); | |
981 | return 0; | |
982 | } | |
983 | ||
e437e3d7 | 984 | static int snd_via686_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 985 | { |
e437e3d7 TI |
986 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
987 | struct viadev *viadev = substream->runtime->private_data; | |
988 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
989 | |
990 | snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); | |
991 | via686_setup_format(chip, viadev, runtime); | |
992 | return 0; | |
993 | } | |
994 | ||
995 | /* | |
996 | * lock the current rate | |
997 | */ | |
998 | static int via_lock_rate(struct via_rate_lock *rec, int rate) | |
999 | { | |
1000 | int changed = 0; | |
1001 | ||
1002 | spin_lock_irq(&rec->lock); | |
1003 | if (rec->rate != rate) { | |
1004 | if (rec->rate && rec->used > 1) /* already set */ | |
1005 | changed = -EINVAL; | |
1006 | else { | |
1007 | rec->rate = rate; | |
1008 | changed = 1; | |
1009 | } | |
1010 | } | |
1011 | spin_unlock_irq(&rec->lock); | |
1012 | return changed; | |
1013 | } | |
1014 | ||
1015 | /* | |
1016 | * prepare callback for DSX playback on via823x | |
1017 | */ | |
e437e3d7 | 1018 | static int snd_via8233_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 1019 | { |
e437e3d7 TI |
1020 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1021 | struct viadev *viadev = substream->runtime->private_data; | |
1022 | struct snd_pcm_runtime *runtime = substream->runtime; | |
2d7eb7cb | 1023 | int ac97_rate = chip->dxs_src ? 48000 : runtime->rate; |
1da177e4 LT |
1024 | int rate_changed; |
1025 | u32 rbits; | |
1026 | ||
afb342f0 TI |
1027 | rate_changed = via_lock_rate(&chip->rates[0], ac97_rate); |
1028 | if (rate_changed < 0) | |
1da177e4 | 1029 | return rate_changed; |
16d3f140 | 1030 | if (rate_changed) |
1da177e4 LT |
1031 | snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, |
1032 | chip->no_vra ? 48000 : runtime->rate); | |
16d3f140 TI |
1033 | if (chip->spdif_on && viadev->reg_offset == 0x30) |
1034 | snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate); | |
1035 | ||
1da177e4 LT |
1036 | if (runtime->rate == 48000) |
1037 | rbits = 0xfffff; | |
1038 | else | |
e437e3d7 TI |
1039 | rbits = (0x100000 / 48000) * runtime->rate + |
1040 | ((0x100000 % 48000) * runtime->rate) / 48000; | |
da3cec35 | 1041 | snd_BUG_ON(rbits & ~0xfffff); |
1da177e4 LT |
1042 | snd_via82xx_channel_reset(chip, viadev); |
1043 | snd_via82xx_set_table_ptr(chip, viadev); | |
e437e3d7 TI |
1044 | outb(chip->playback_volume[viadev->reg_offset / 0x10][0], |
1045 | VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_L)); | |
1046 | outb(chip->playback_volume[viadev->reg_offset / 0x10][1], | |
1047 | VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_R)); | |
1da177e4 LT |
1048 | outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | /* format */ |
1049 | (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | /* stereo */ | |
1050 | rbits | /* rate */ | |
1051 | 0xff000000, /* STOP index is never reached */ | |
1052 | VIADEV_REG(viadev, OFFSET_STOP_IDX)); | |
1053 | udelay(20); | |
1054 | snd_via82xx_codec_ready(chip, 0); | |
1055 | return 0; | |
1056 | } | |
1057 | ||
1058 | /* | |
1059 | * prepare callback for multi-channel playback on via823x | |
1060 | */ | |
e437e3d7 | 1061 | static int snd_via8233_multi_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 1062 | { |
e437e3d7 TI |
1063 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1064 | struct viadev *viadev = substream->runtime->private_data; | |
1065 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1066 | unsigned int slots; |
1067 | int fmt; | |
1068 | ||
1069 | if (via_lock_rate(&chip->rates[0], runtime->rate) < 0) | |
1070 | return -EINVAL; | |
1071 | snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate); | |
1072 | snd_ac97_set_rate(chip->ac97, AC97_PCM_SURR_DAC_RATE, runtime->rate); | |
1073 | snd_ac97_set_rate(chip->ac97, AC97_PCM_LFE_DAC_RATE, runtime->rate); | |
1074 | snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate); | |
1075 | snd_via82xx_channel_reset(chip, viadev); | |
1076 | snd_via82xx_set_table_ptr(chip, viadev); | |
1077 | ||
e437e3d7 TI |
1078 | fmt = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ? |
1079 | VIA_REG_MULTPLAY_FMT_16BIT : VIA_REG_MULTPLAY_FMT_8BIT; | |
1da177e4 LT |
1080 | fmt |= runtime->channels << 4; |
1081 | outb(fmt, VIADEV_REG(viadev, OFS_MULTPLAY_FORMAT)); | |
1082 | #if 0 | |
1083 | if (chip->revision == VIA_REV_8233A) | |
1084 | slots = 0; | |
1085 | else | |
1086 | #endif | |
1087 | { | |
1088 | /* set sample number to slot 3, 4, 7, 8, 6, 9 (for VIA8233/C,8235) */ | |
1089 | /* corresponding to FL, FR, RL, RR, C, LFE ?? */ | |
1090 | switch (runtime->channels) { | |
1091 | case 1: slots = (1<<0) | (1<<4); break; | |
1092 | case 2: slots = (1<<0) | (2<<4); break; | |
1093 | case 3: slots = (1<<0) | (2<<4) | (5<<8); break; | |
1094 | case 4: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12); break; | |
1095 | case 5: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16); break; | |
1096 | case 6: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16) | (6<<20); break; | |
1097 | default: slots = 0; break; | |
1098 | } | |
1099 | } | |
1100 | /* STOP index is never reached */ | |
1101 | outl(0xff000000 | slots, VIADEV_REG(viadev, OFFSET_STOP_IDX)); | |
1102 | udelay(20); | |
1103 | snd_via82xx_codec_ready(chip, 0); | |
1104 | return 0; | |
1105 | } | |
1106 | ||
1107 | /* | |
1108 | * prepare callback for capture on via823x | |
1109 | */ | |
e437e3d7 | 1110 | static int snd_via8233_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 1111 | { |
e437e3d7 TI |
1112 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1113 | struct viadev *viadev = substream->runtime->private_data; | |
1114 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1115 | |
1116 | if (via_lock_rate(&chip->rates[1], runtime->rate) < 0) | |
1117 | return -EINVAL; | |
1118 | snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); | |
1119 | snd_via82xx_channel_reset(chip, viadev); | |
1120 | snd_via82xx_set_table_ptr(chip, viadev); | |
1121 | outb(VIA_REG_CAPTURE_FIFO_ENABLE, VIADEV_REG(viadev, OFS_CAPTURE_FIFO)); | |
1122 | outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | | |
1123 | (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | | |
1124 | 0xff000000, /* STOP index is never reached */ | |
1125 | VIADEV_REG(viadev, OFFSET_STOP_IDX)); | |
1126 | udelay(20); | |
1127 | snd_via82xx_codec_ready(chip, 0); | |
1128 | return 0; | |
1129 | } | |
1130 | ||
1131 | ||
1132 | /* | |
1133 | * pcm hardware definition, identical for both playback and capture | |
1134 | */ | |
dee49895 | 1135 | static const struct snd_pcm_hardware snd_via82xx_hw = |
1da177e4 LT |
1136 | { |
1137 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
1138 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
1139 | SNDRV_PCM_INFO_MMAP_VALID | | |
41e4845c | 1140 | /* SNDRV_PCM_INFO_RESUME | */ |
1da177e4 LT |
1141 | SNDRV_PCM_INFO_PAUSE), |
1142 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, | |
1143 | .rates = SNDRV_PCM_RATE_48000, | |
1144 | .rate_min = 48000, | |
1145 | .rate_max = 48000, | |
1146 | .channels_min = 1, | |
1147 | .channels_max = 2, | |
5503600a | 1148 | .buffer_bytes_max = VIA_MAX_BUFSIZE, |
1da177e4 | 1149 | .period_bytes_min = 32, |
5503600a | 1150 | .period_bytes_max = VIA_MAX_BUFSIZE / 2, |
1da177e4 LT |
1151 | .periods_min = 2, |
1152 | .periods_max = VIA_TABLE_SIZE / 2, | |
1153 | .fifo_size = 0, | |
1154 | }; | |
1155 | ||
1156 | ||
1157 | /* | |
1158 | * open callback skeleton | |
1159 | */ | |
e437e3d7 TI |
1160 | static int snd_via82xx_pcm_open(struct via82xx *chip, struct viadev *viadev, |
1161 | struct snd_pcm_substream *substream) | |
1da177e4 | 1162 | { |
e437e3d7 | 1163 | struct snd_pcm_runtime *runtime = substream->runtime; |
1da177e4 LT |
1164 | int err; |
1165 | struct via_rate_lock *ratep; | |
5495ffbd | 1166 | bool use_src = false; |
1da177e4 LT |
1167 | |
1168 | runtime->hw = snd_via82xx_hw; | |
1169 | ||
1170 | /* set the hw rate condition */ | |
1171 | ratep = &chip->rates[viadev->direction]; | |
1172 | spin_lock_irq(&ratep->lock); | |
1173 | ratep->used++; | |
1174 | if (chip->spdif_on && viadev->reg_offset == 0x30) { | |
1175 | /* DXS#3 and spdif is on */ | |
1176 | runtime->hw.rates = chip->ac97->rates[AC97_RATES_SPDIF]; | |
1177 | snd_pcm_limit_hw_rates(runtime); | |
1178 | } else if (chip->dxs_fixed && viadev->reg_offset < 0x40) { | |
1179 | /* fixed DXS playback rate */ | |
1180 | runtime->hw.rates = SNDRV_PCM_RATE_48000; | |
1181 | runtime->hw.rate_min = runtime->hw.rate_max = 48000; | |
2d7eb7cb SV |
1182 | } else if (chip->dxs_src && viadev->reg_offset < 0x40) { |
1183 | /* use full SRC capabilities of DXS */ | |
1184 | runtime->hw.rates = (SNDRV_PCM_RATE_CONTINUOUS | | |
1185 | SNDRV_PCM_RATE_8000_48000); | |
1186 | runtime->hw.rate_min = 8000; | |
1187 | runtime->hw.rate_max = 48000; | |
5495ffbd | 1188 | use_src = true; |
1da177e4 LT |
1189 | } else if (! ratep->rate) { |
1190 | int idx = viadev->direction ? AC97_RATES_ADC : AC97_RATES_FRONT_DAC; | |
1191 | runtime->hw.rates = chip->ac97->rates[idx]; | |
1192 | snd_pcm_limit_hw_rates(runtime); | |
1193 | } else { | |
1194 | /* a fixed rate */ | |
1195 | runtime->hw.rates = SNDRV_PCM_RATE_KNOT; | |
1196 | runtime->hw.rate_max = runtime->hw.rate_min = ratep->rate; | |
1197 | } | |
1198 | spin_unlock_irq(&ratep->lock); | |
1199 | ||
1200 | /* we may remove following constaint when we modify table entries | |
1201 | in interrupt */ | |
afb342f0 TI |
1202 | err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); |
1203 | if (err < 0) | |
1da177e4 LT |
1204 | return err; |
1205 | ||
5495ffbd CL |
1206 | if (use_src) { |
1207 | err = snd_pcm_hw_rule_noresample(runtime, 48000); | |
1208 | if (err < 0) | |
1209 | return err; | |
1210 | } | |
1211 | ||
1da177e4 LT |
1212 | runtime->private_data = viadev; |
1213 | viadev->substream = substream; | |
1214 | ||
1215 | return 0; | |
1216 | } | |
1217 | ||
1218 | ||
1219 | /* | |
3d009413 | 1220 | * open callback for playback on via686 |
1da177e4 | 1221 | */ |
3d009413 | 1222 | static int snd_via686_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 1223 | { |
e437e3d7 TI |
1224 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1225 | struct viadev *viadev = &chip->devs[chip->playback_devno + substream->number]; | |
1da177e4 LT |
1226 | int err; |
1227 | ||
afb342f0 TI |
1228 | err = snd_via82xx_pcm_open(chip, viadev, substream); |
1229 | if (err < 0) | |
1da177e4 LT |
1230 | return err; |
1231 | return 0; | |
1232 | } | |
1233 | ||
3d009413 CL |
1234 | /* |
1235 | * open callback for playback on via823x DXS | |
1236 | */ | |
1237 | static int snd_via8233_playback_open(struct snd_pcm_substream *substream) | |
1238 | { | |
1239 | struct via82xx *chip = snd_pcm_substream_chip(substream); | |
1240 | struct viadev *viadev; | |
1241 | unsigned int stream; | |
1242 | int err; | |
1243 | ||
1244 | viadev = &chip->devs[chip->playback_devno + substream->number]; | |
afb342f0 TI |
1245 | err = snd_via82xx_pcm_open(chip, viadev, substream); |
1246 | if (err < 0) | |
3d009413 CL |
1247 | return err; |
1248 | stream = viadev->reg_offset / 0x10; | |
1249 | if (chip->dxs_controls[stream]) { | |
395c61d1 CL |
1250 | chip->playback_volume[stream][0] = |
1251 | VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31); | |
1252 | chip->playback_volume[stream][1] = | |
1253 | VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31); | |
3d009413 CL |
1254 | chip->dxs_controls[stream]->vd[0].access &= |
1255 | ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; | |
1256 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | | |
1257 | SNDRV_CTL_EVENT_MASK_INFO, | |
1258 | &chip->dxs_controls[stream]->id); | |
1259 | } | |
1260 | return 0; | |
1261 | } | |
1262 | ||
1da177e4 LT |
1263 | /* |
1264 | * open callback for playback on via823x multi-channel | |
1265 | */ | |
e437e3d7 | 1266 | static int snd_via8233_multi_open(struct snd_pcm_substream *substream) |
1da177e4 | 1267 | { |
e437e3d7 TI |
1268 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1269 | struct viadev *viadev = &chip->devs[chip->multi_devno]; | |
1da177e4 LT |
1270 | int err; |
1271 | /* channels constraint for VIA8233A | |
1272 | * 3 and 5 channels are not supported | |
1273 | */ | |
fbc57b2a | 1274 | static const unsigned int channels[] = { |
1da177e4 LT |
1275 | 1, 2, 4, 6 |
1276 | }; | |
fbc57b2a | 1277 | static const struct snd_pcm_hw_constraint_list hw_constraints_channels = { |
1da177e4 LT |
1278 | .count = ARRAY_SIZE(channels), |
1279 | .list = channels, | |
1280 | .mask = 0, | |
1281 | }; | |
1282 | ||
afb342f0 TI |
1283 | err = snd_via82xx_pcm_open(chip, viadev, substream); |
1284 | if (err < 0) | |
1da177e4 LT |
1285 | return err; |
1286 | substream->runtime->hw.channels_max = 6; | |
1287 | if (chip->revision == VIA_REV_8233A) | |
e437e3d7 TI |
1288 | snd_pcm_hw_constraint_list(substream->runtime, 0, |
1289 | SNDRV_PCM_HW_PARAM_CHANNELS, | |
1290 | &hw_constraints_channels); | |
1da177e4 LT |
1291 | return 0; |
1292 | } | |
1293 | ||
1294 | /* | |
1295 | * open callback for capture on via686 and via823x | |
1296 | */ | |
e437e3d7 | 1297 | static int snd_via82xx_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 1298 | { |
e437e3d7 TI |
1299 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1300 | struct viadev *viadev = &chip->devs[chip->capture_devno + substream->pcm->device]; | |
1da177e4 LT |
1301 | |
1302 | return snd_via82xx_pcm_open(chip, viadev, substream); | |
1303 | } | |
1304 | ||
1305 | /* | |
1306 | * close callback | |
1307 | */ | |
e437e3d7 | 1308 | static int snd_via82xx_pcm_close(struct snd_pcm_substream *substream) |
1da177e4 | 1309 | { |
e437e3d7 TI |
1310 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1311 | struct viadev *viadev = substream->runtime->private_data; | |
1da177e4 LT |
1312 | struct via_rate_lock *ratep; |
1313 | ||
1314 | /* release the rate lock */ | |
1315 | ratep = &chip->rates[viadev->direction]; | |
1316 | spin_lock_irq(&ratep->lock); | |
1317 | ratep->used--; | |
1318 | if (! ratep->used) | |
1319 | ratep->rate = 0; | |
1320 | spin_unlock_irq(&ratep->lock); | |
6dbe6628 TI |
1321 | if (! ratep->rate) { |
1322 | if (! viadev->direction) { | |
1323 | snd_ac97_update_power(chip->ac97, | |
1324 | AC97_PCM_FRONT_DAC_RATE, 0); | |
1325 | snd_ac97_update_power(chip->ac97, | |
1326 | AC97_PCM_SURR_DAC_RATE, 0); | |
1327 | snd_ac97_update_power(chip->ac97, | |
1328 | AC97_PCM_LFE_DAC_RATE, 0); | |
1329 | } else | |
1330 | snd_ac97_update_power(chip->ac97, | |
1331 | AC97_PCM_LR_ADC_RATE, 0); | |
1332 | } | |
1da177e4 LT |
1333 | viadev->substream = NULL; |
1334 | return 0; | |
1335 | } | |
1336 | ||
3d009413 CL |
1337 | static int snd_via8233_playback_close(struct snd_pcm_substream *substream) |
1338 | { | |
1339 | struct via82xx *chip = snd_pcm_substream_chip(substream); | |
1340 | struct viadev *viadev = substream->runtime->private_data; | |
1341 | unsigned int stream; | |
1342 | ||
1343 | stream = viadev->reg_offset / 0x10; | |
1344 | if (chip->dxs_controls[stream]) { | |
1345 | chip->dxs_controls[stream]->vd[0].access |= | |
1346 | SNDRV_CTL_ELEM_ACCESS_INACTIVE; | |
1347 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, | |
1348 | &chip->dxs_controls[stream]->id); | |
1349 | } | |
1350 | return snd_via82xx_pcm_close(substream); | |
1351 | } | |
1352 | ||
1da177e4 LT |
1353 | |
1354 | /* via686 playback callbacks */ | |
6769e988 | 1355 | static const struct snd_pcm_ops snd_via686_playback_ops = { |
3d009413 | 1356 | .open = snd_via686_playback_open, |
1da177e4 | 1357 | .close = snd_via82xx_pcm_close, |
1da177e4 LT |
1358 | .hw_params = snd_via82xx_hw_params, |
1359 | .hw_free = snd_via82xx_hw_free, | |
1360 | .prepare = snd_via686_playback_prepare, | |
1361 | .trigger = snd_via82xx_pcm_trigger, | |
1362 | .pointer = snd_via686_pcm_pointer, | |
1da177e4 LT |
1363 | }; |
1364 | ||
1365 | /* via686 capture callbacks */ | |
6769e988 | 1366 | static const struct snd_pcm_ops snd_via686_capture_ops = { |
1da177e4 LT |
1367 | .open = snd_via82xx_capture_open, |
1368 | .close = snd_via82xx_pcm_close, | |
1da177e4 LT |
1369 | .hw_params = snd_via82xx_hw_params, |
1370 | .hw_free = snd_via82xx_hw_free, | |
1371 | .prepare = snd_via686_capture_prepare, | |
1372 | .trigger = snd_via82xx_pcm_trigger, | |
1373 | .pointer = snd_via686_pcm_pointer, | |
1da177e4 LT |
1374 | }; |
1375 | ||
1376 | /* via823x DSX playback callbacks */ | |
6769e988 | 1377 | static const struct snd_pcm_ops snd_via8233_playback_ops = { |
3d009413 CL |
1378 | .open = snd_via8233_playback_open, |
1379 | .close = snd_via8233_playback_close, | |
1da177e4 LT |
1380 | .hw_params = snd_via82xx_hw_params, |
1381 | .hw_free = snd_via82xx_hw_free, | |
1382 | .prepare = snd_via8233_playback_prepare, | |
1383 | .trigger = snd_via82xx_pcm_trigger, | |
1384 | .pointer = snd_via8233_pcm_pointer, | |
1da177e4 LT |
1385 | }; |
1386 | ||
1387 | /* via823x multi-channel playback callbacks */ | |
6769e988 | 1388 | static const struct snd_pcm_ops snd_via8233_multi_ops = { |
1da177e4 LT |
1389 | .open = snd_via8233_multi_open, |
1390 | .close = snd_via82xx_pcm_close, | |
1da177e4 LT |
1391 | .hw_params = snd_via82xx_hw_params, |
1392 | .hw_free = snd_via82xx_hw_free, | |
1393 | .prepare = snd_via8233_multi_prepare, | |
1394 | .trigger = snd_via82xx_pcm_trigger, | |
1395 | .pointer = snd_via8233_pcm_pointer, | |
1da177e4 LT |
1396 | }; |
1397 | ||
1398 | /* via823x capture callbacks */ | |
6769e988 | 1399 | static const struct snd_pcm_ops snd_via8233_capture_ops = { |
1da177e4 LT |
1400 | .open = snd_via82xx_capture_open, |
1401 | .close = snd_via82xx_pcm_close, | |
1da177e4 LT |
1402 | .hw_params = snd_via82xx_hw_params, |
1403 | .hw_free = snd_via82xx_hw_free, | |
1404 | .prepare = snd_via8233_capture_prepare, | |
1405 | .trigger = snd_via82xx_pcm_trigger, | |
1406 | .pointer = snd_via8233_pcm_pointer, | |
1da177e4 LT |
1407 | }; |
1408 | ||
1409 | ||
e437e3d7 TI |
1410 | static void init_viadev(struct via82xx *chip, int idx, unsigned int reg_offset, |
1411 | int shadow_pos, int direction) | |
1da177e4 LT |
1412 | { |
1413 | chip->devs[idx].reg_offset = reg_offset; | |
4f550df5 | 1414 | chip->devs[idx].shadow_shift = shadow_pos * 4; |
1da177e4 LT |
1415 | chip->devs[idx].direction = direction; |
1416 | chip->devs[idx].port = chip->port + reg_offset; | |
1417 | } | |
1418 | ||
1419 | /* | |
1420 | * create pcm instances for VIA8233, 8233C and 8235 (not 8233A) | |
1421 | */ | |
e23e7a14 | 1422 | static int snd_via8233_pcm_new(struct via82xx *chip) |
1da177e4 | 1423 | { |
e437e3d7 | 1424 | struct snd_pcm *pcm; |
e36e3b86 | 1425 | struct snd_pcm_chmap *chmap; |
1da177e4 LT |
1426 | int i, err; |
1427 | ||
1428 | chip->playback_devno = 0; /* x 4 */ | |
1429 | chip->multi_devno = 4; /* x 1 */ | |
1430 | chip->capture_devno = 5; /* x 2 */ | |
1431 | chip->num_devs = 7; | |
1432 | chip->intr_mask = 0x33033333; /* FLAG|EOL for rec0-1, mc, sdx0-3 */ | |
1433 | ||
1434 | /* PCM #0: 4 DSX playbacks and 1 capture */ | |
1435 | err = snd_pcm_new(chip->card, chip->card->shortname, 0, 4, 1, &pcm); | |
1436 | if (err < 0) | |
1437 | return err; | |
1438 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops); | |
1439 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops); | |
1440 | pcm->private_data = chip; | |
1441 | strcpy(pcm->name, chip->card->shortname); | |
1442 | chip->pcms[0] = pcm; | |
1443 | /* set up playbacks */ | |
1444 | for (i = 0; i < 4; i++) | |
4f550df5 | 1445 | init_viadev(chip, i, 0x10 * i, i, 0); |
1da177e4 | 1446 | /* capture */ |
4f550df5 | 1447 | init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1); |
1da177e4 | 1448 | |
8e2c7524 TI |
1449 | snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG, |
1450 | &chip->pci->dev, | |
1451 | 64*1024, VIA_MAX_BUFSIZE); | |
1da177e4 | 1452 | |
e36e3b86 TI |
1453 | err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, |
1454 | snd_pcm_std_chmaps, 2, 0, | |
1455 | &chmap); | |
1456 | if (err < 0) | |
1457 | return err; | |
1458 | ||
1da177e4 LT |
1459 | /* PCM #1: multi-channel playback and 2nd capture */ |
1460 | err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 1, &pcm); | |
1461 | if (err < 0) | |
1462 | return err; | |
1463 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops); | |
1464 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops); | |
1465 | pcm->private_data = chip; | |
1466 | strcpy(pcm->name, chip->card->shortname); | |
1467 | chip->pcms[1] = pcm; | |
1468 | /* set up playback */ | |
4f550df5 | 1469 | init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0); |
1da177e4 | 1470 | /* set up capture */ |
4f550df5 | 1471 | init_viadev(chip, chip->capture_devno + 1, VIA_REG_CAPTURE_8233_STATUS + 0x10, 7, 1); |
1da177e4 | 1472 | |
8e2c7524 TI |
1473 | snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG, |
1474 | &chip->pci->dev, | |
1475 | 64*1024, VIA_MAX_BUFSIZE); | |
e36e3b86 TI |
1476 | |
1477 | err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, | |
1478 | snd_pcm_alt_chmaps, 6, 0, | |
1479 | &chmap); | |
1480 | if (err < 0) | |
1481 | return err; | |
1482 | chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap; | |
1483 | ||
1da177e4 LT |
1484 | return 0; |
1485 | } | |
1486 | ||
1487 | /* | |
1488 | * create pcm instances for VIA8233A | |
1489 | */ | |
e23e7a14 | 1490 | static int snd_via8233a_pcm_new(struct via82xx *chip) |
1da177e4 | 1491 | { |
e437e3d7 | 1492 | struct snd_pcm *pcm; |
e36e3b86 | 1493 | struct snd_pcm_chmap *chmap; |
1da177e4 LT |
1494 | int err; |
1495 | ||
1496 | chip->multi_devno = 0; | |
1497 | chip->playback_devno = 1; | |
1498 | chip->capture_devno = 2; | |
1499 | chip->num_devs = 3; | |
1500 | chip->intr_mask = 0x03033000; /* FLAG|EOL for rec0, mc, sdx3 */ | |
1501 | ||
1502 | /* PCM #0: multi-channel playback and capture */ | |
1503 | err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm); | |
1504 | if (err < 0) | |
1505 | return err; | |
1506 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops); | |
1507 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops); | |
1508 | pcm->private_data = chip; | |
1509 | strcpy(pcm->name, chip->card->shortname); | |
1510 | chip->pcms[0] = pcm; | |
1511 | /* set up playback */ | |
4f550df5 | 1512 | init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0); |
1da177e4 | 1513 | /* capture */ |
4f550df5 | 1514 | init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1); |
1da177e4 | 1515 | |
8e2c7524 TI |
1516 | snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG, |
1517 | &chip->pci->dev, | |
1518 | 64*1024, VIA_MAX_BUFSIZE); | |
1da177e4 | 1519 | |
e36e3b86 TI |
1520 | err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, |
1521 | snd_pcm_alt_chmaps, 6, 0, | |
1522 | &chmap); | |
1523 | if (err < 0) | |
1524 | return err; | |
1525 | chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap; | |
1526 | ||
1da177e4 LT |
1527 | /* SPDIF supported? */ |
1528 | if (! ac97_can_spdif(chip->ac97)) | |
1529 | return 0; | |
1530 | ||
1531 | /* PCM #1: DXS3 playback (for spdif) */ | |
1532 | err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 0, &pcm); | |
1533 | if (err < 0) | |
1534 | return err; | |
1535 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops); | |
1536 | pcm->private_data = chip; | |
1537 | strcpy(pcm->name, chip->card->shortname); | |
1538 | chip->pcms[1] = pcm; | |
1539 | /* set up playback */ | |
4f550df5 | 1540 | init_viadev(chip, chip->playback_devno, 0x30, 3, 0); |
1da177e4 | 1541 | |
8e2c7524 TI |
1542 | snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG, |
1543 | &chip->pci->dev, | |
1544 | 64*1024, VIA_MAX_BUFSIZE); | |
1da177e4 LT |
1545 | return 0; |
1546 | } | |
1547 | ||
1548 | /* | |
1549 | * create a pcm instance for via686a/b | |
1550 | */ | |
e23e7a14 | 1551 | static int snd_via686_pcm_new(struct via82xx *chip) |
1da177e4 | 1552 | { |
e437e3d7 | 1553 | struct snd_pcm *pcm; |
1da177e4 LT |
1554 | int err; |
1555 | ||
1556 | chip->playback_devno = 0; | |
1557 | chip->capture_devno = 1; | |
1558 | chip->num_devs = 2; | |
1559 | chip->intr_mask = 0x77; /* FLAG | EOL for PB, CP, FM */ | |
1560 | ||
1561 | err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm); | |
1562 | if (err < 0) | |
1563 | return err; | |
1564 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via686_playback_ops); | |
1565 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via686_capture_ops); | |
1566 | pcm->private_data = chip; | |
1567 | strcpy(pcm->name, chip->card->shortname); | |
1568 | chip->pcms[0] = pcm; | |
4f550df5 KW |
1569 | init_viadev(chip, 0, VIA_REG_PLAYBACK_STATUS, 0, 0); |
1570 | init_viadev(chip, 1, VIA_REG_CAPTURE_STATUS, 0, 1); | |
1da177e4 | 1571 | |
8e2c7524 TI |
1572 | snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG, |
1573 | &chip->pci->dev, | |
1574 | 64*1024, VIA_MAX_BUFSIZE); | |
1da177e4 LT |
1575 | return 0; |
1576 | } | |
1577 | ||
1578 | ||
1579 | /* | |
1580 | * Mixer part | |
1581 | */ | |
1582 | ||
e437e3d7 TI |
1583 | static int snd_via8233_capture_source_info(struct snd_kcontrol *kcontrol, |
1584 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1585 | { |
1586 | /* formerly they were "Line" and "Mic", but it looks like that they | |
1587 | * have nothing to do with the actual physical connections... | |
1588 | */ | |
9883ab91 | 1589 | static const char * const texts[2] = { |
1da177e4 LT |
1590 | "Input1", "Input2" |
1591 | }; | |
9883ab91 | 1592 | return snd_ctl_enum_info(uinfo, 1, 2, texts); |
1da177e4 LT |
1593 | } |
1594 | ||
e437e3d7 TI |
1595 | static int snd_via8233_capture_source_get(struct snd_kcontrol *kcontrol, |
1596 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1597 | { |
e437e3d7 | 1598 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1599 | unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL); |
1600 | ucontrol->value.enumerated.item[0] = inb(port) & VIA_REG_CAPTURE_CHANNEL_MIC ? 1 : 0; | |
1601 | return 0; | |
1602 | } | |
1603 | ||
e437e3d7 TI |
1604 | static int snd_via8233_capture_source_put(struct snd_kcontrol *kcontrol, |
1605 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1606 | { |
e437e3d7 | 1607 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1608 | unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL); |
1609 | u8 val, oval; | |
1610 | ||
1611 | spin_lock_irq(&chip->reg_lock); | |
1612 | oval = inb(port); | |
1613 | val = oval & ~VIA_REG_CAPTURE_CHANNEL_MIC; | |
1614 | if (ucontrol->value.enumerated.item[0]) | |
1615 | val |= VIA_REG_CAPTURE_CHANNEL_MIC; | |
1616 | if (val != oval) | |
1617 | outb(val, port); | |
1618 | spin_unlock_irq(&chip->reg_lock); | |
1619 | return val != oval; | |
1620 | } | |
1621 | ||
e23e7a14 | 1622 | static struct snd_kcontrol_new snd_via8233_capture_source = { |
1da177e4 LT |
1623 | .name = "Input Source Select", |
1624 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1625 | .info = snd_via8233_capture_source_info, | |
1626 | .get = snd_via8233_capture_source_get, | |
1627 | .put = snd_via8233_capture_source_put, | |
1628 | }; | |
1629 | ||
a5ce8890 | 1630 | #define snd_via8233_dxs3_spdif_info snd_ctl_boolean_mono_info |
1da177e4 | 1631 | |
e437e3d7 TI |
1632 | static int snd_via8233_dxs3_spdif_get(struct snd_kcontrol *kcontrol, |
1633 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1634 | { |
e437e3d7 | 1635 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1636 | u8 val; |
1637 | ||
1638 | pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val); | |
1639 | ucontrol->value.integer.value[0] = (val & VIA8233_SPDIF_DX3) ? 1 : 0; | |
1640 | return 0; | |
1641 | } | |
1642 | ||
e437e3d7 TI |
1643 | static int snd_via8233_dxs3_spdif_put(struct snd_kcontrol *kcontrol, |
1644 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1645 | { |
e437e3d7 | 1646 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1647 | u8 val, oval; |
1648 | ||
1649 | pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &oval); | |
1650 | val = oval & ~VIA8233_SPDIF_DX3; | |
1651 | if (ucontrol->value.integer.value[0]) | |
1652 | val |= VIA8233_SPDIF_DX3; | |
1653 | /* save the spdif flag for rate filtering */ | |
1654 | chip->spdif_on = ucontrol->value.integer.value[0] ? 1 : 0; | |
1655 | if (val != oval) { | |
1656 | pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val); | |
1657 | return 1; | |
1658 | } | |
1659 | return 0; | |
1660 | } | |
1661 | ||
f3b827e0 | 1662 | static const struct snd_kcontrol_new snd_via8233_dxs3_spdif_control = { |
10e8d78a | 1663 | .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH), |
1da177e4 LT |
1664 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
1665 | .info = snd_via8233_dxs3_spdif_info, | |
1666 | .get = snd_via8233_dxs3_spdif_get, | |
1667 | .put = snd_via8233_dxs3_spdif_put, | |
1668 | }; | |
1669 | ||
e437e3d7 TI |
1670 | static int snd_via8233_dxs_volume_info(struct snd_kcontrol *kcontrol, |
1671 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1672 | { |
1673 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1674 | uinfo->count = 2; | |
1675 | uinfo->value.integer.min = 0; | |
1676 | uinfo->value.integer.max = VIA_DXS_MAX_VOLUME; | |
1677 | return 0; | |
1678 | } | |
1679 | ||
e437e3d7 TI |
1680 | static int snd_via8233_dxs_volume_get(struct snd_kcontrol *kcontrol, |
1681 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1682 | { |
e437e3d7 | 1683 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
2fb930b5 | 1684 | unsigned int idx = kcontrol->id.subdevice; |
00f226d4 HM |
1685 | |
1686 | ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][0]; | |
1687 | ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][1]; | |
1688 | return 0; | |
1689 | } | |
1690 | ||
e437e3d7 TI |
1691 | static int snd_via8233_pcmdxs_volume_get(struct snd_kcontrol *kcontrol, |
1692 | struct snd_ctl_elem_value *ucontrol) | |
00f226d4 | 1693 | { |
e437e3d7 | 1694 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
00f226d4 HM |
1695 | ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[0]; |
1696 | ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[1]; | |
1da177e4 LT |
1697 | return 0; |
1698 | } | |
1699 | ||
e437e3d7 TI |
1700 | static int snd_via8233_dxs_volume_put(struct snd_kcontrol *kcontrol, |
1701 | struct snd_ctl_elem_value *ucontrol) | |
00f226d4 | 1702 | { |
e437e3d7 | 1703 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
2fb930b5 | 1704 | unsigned int idx = kcontrol->id.subdevice; |
00f226d4 HM |
1705 | unsigned long port = chip->port + 0x10 * idx; |
1706 | unsigned char val; | |
1707 | int i, change = 0; | |
1708 | ||
1709 | for (i = 0; i < 2; i++) { | |
1710 | val = ucontrol->value.integer.value[i]; | |
1711 | if (val > VIA_DXS_MAX_VOLUME) | |
1712 | val = VIA_DXS_MAX_VOLUME; | |
1713 | val = VIA_DXS_MAX_VOLUME - val; | |
1714 | change |= val != chip->playback_volume[idx][i]; | |
1715 | if (change) { | |
1716 | chip->playback_volume[idx][i] = val; | |
1717 | outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i); | |
1718 | } | |
1719 | } | |
1720 | return change; | |
1721 | } | |
1722 | ||
e437e3d7 TI |
1723 | static int snd_via8233_pcmdxs_volume_put(struct snd_kcontrol *kcontrol, |
1724 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1725 | { |
e437e3d7 | 1726 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1727 | unsigned int idx; |
1728 | unsigned char val; | |
1729 | int i, change = 0; | |
1730 | ||
1731 | for (i = 0; i < 2; i++) { | |
1732 | val = ucontrol->value.integer.value[i]; | |
1733 | if (val > VIA_DXS_MAX_VOLUME) | |
1734 | val = VIA_DXS_MAX_VOLUME; | |
1735 | val = VIA_DXS_MAX_VOLUME - val; | |
00f226d4 | 1736 | if (val != chip->playback_volume_c[i]) { |
1da177e4 | 1737 | change = 1; |
00f226d4 | 1738 | chip->playback_volume_c[i] = val; |
1da177e4 LT |
1739 | for (idx = 0; idx < 4; idx++) { |
1740 | unsigned long port = chip->port + 0x10 * idx; | |
00f226d4 | 1741 | chip->playback_volume[idx][i] = val; |
1da177e4 LT |
1742 | outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i); |
1743 | } | |
1744 | } | |
1745 | } | |
1746 | return change; | |
1747 | } | |
1748 | ||
b452e08e | 1749 | static const DECLARE_TLV_DB_SCALE(db_scale_dxs, -4650, 150, 1); |
7058c042 | 1750 | |
f3b827e0 | 1751 | static const struct snd_kcontrol_new snd_via8233_pcmdxs_volume_control = { |
1da177e4 LT |
1752 | .name = "PCM Playback Volume", |
1753 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
7058c042 TI |
1754 | .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | |
1755 | SNDRV_CTL_ELEM_ACCESS_TLV_READ), | |
1da177e4 | 1756 | .info = snd_via8233_dxs_volume_info, |
00f226d4 HM |
1757 | .get = snd_via8233_pcmdxs_volume_get, |
1758 | .put = snd_via8233_pcmdxs_volume_put, | |
7058c042 | 1759 | .tlv = { .p = db_scale_dxs } |
00f226d4 HM |
1760 | }; |
1761 | ||
f3b827e0 | 1762 | static const struct snd_kcontrol_new snd_via8233_dxs_volume_control = { |
2fb930b5 CL |
1763 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1764 | .device = 0, | |
1765 | /* .subdevice set later */ | |
1766 | .name = "PCM Playback Volume", | |
3d009413 CL |
1767 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | |
1768 | SNDRV_CTL_ELEM_ACCESS_TLV_READ | | |
1769 | SNDRV_CTL_ELEM_ACCESS_INACTIVE, | |
00f226d4 | 1770 | .info = snd_via8233_dxs_volume_info, |
1da177e4 LT |
1771 | .get = snd_via8233_dxs_volume_get, |
1772 | .put = snd_via8233_dxs_volume_put, | |
7058c042 | 1773 | .tlv = { .p = db_scale_dxs } |
1da177e4 LT |
1774 | }; |
1775 | ||
1776 | /* | |
1777 | */ | |
1778 | ||
e437e3d7 | 1779 | static void snd_via82xx_mixer_free_ac97_bus(struct snd_ac97_bus *bus) |
1da177e4 | 1780 | { |
e437e3d7 | 1781 | struct via82xx *chip = bus->private_data; |
1da177e4 LT |
1782 | chip->ac97_bus = NULL; |
1783 | } | |
1784 | ||
e437e3d7 | 1785 | static void snd_via82xx_mixer_free_ac97(struct snd_ac97 *ac97) |
1da177e4 | 1786 | { |
e437e3d7 | 1787 | struct via82xx *chip = ac97->private_data; |
1da177e4 LT |
1788 | chip->ac97 = NULL; |
1789 | } | |
1790 | ||
eab0fbfa | 1791 | static const struct ac97_quirk ac97_quirks[] = { |
1da177e4 | 1792 | { |
69ad07cf JK |
1793 | .subvendor = 0x1106, |
1794 | .subdevice = 0x4161, | |
1da177e4 LT |
1795 | .codec_id = 0x56494161, /* VT1612A */ |
1796 | .name = "Soltek SL-75DRV5", | |
1797 | .type = AC97_TUNE_NONE | |
1798 | }, | |
1799 | { /* FIXME: which codec? */ | |
69ad07cf JK |
1800 | .subvendor = 0x1106, |
1801 | .subdevice = 0x4161, | |
1da177e4 LT |
1802 | .name = "ASRock K7VT2", |
1803 | .type = AC97_TUNE_HP_ONLY | |
1804 | }, | |
bf30a430 CL |
1805 | { |
1806 | .subvendor = 0x110a, | |
1807 | .subdevice = 0x0079, | |
1808 | .name = "Fujitsu Siemens D1289", | |
1809 | .type = AC97_TUNE_HP_ONLY | |
1810 | }, | |
1da177e4 | 1811 | { |
69ad07cf JK |
1812 | .subvendor = 0x1019, |
1813 | .subdevice = 0x0a81, | |
1da177e4 LT |
1814 | .name = "ECS K7VTA3", |
1815 | .type = AC97_TUNE_HP_ONLY | |
1816 | }, | |
1817 | { | |
69ad07cf JK |
1818 | .subvendor = 0x1019, |
1819 | .subdevice = 0x0a85, | |
1da177e4 LT |
1820 | .name = "ECS L7VMM2", |
1821 | .type = AC97_TUNE_HP_ONLY | |
1822 | }, | |
942fd1eb WS |
1823 | { |
1824 | .subvendor = 0x1019, | |
1825 | .subdevice = 0x1841, | |
1826 | .name = "ECS K7VTA3", | |
1827 | .type = AC97_TUNE_HP_ONLY | |
1828 | }, | |
1da177e4 | 1829 | { |
69ad07cf JK |
1830 | .subvendor = 0x1849, |
1831 | .subdevice = 0x3059, | |
1da177e4 LT |
1832 | .name = "ASRock K7VM2", |
1833 | .type = AC97_TUNE_HP_ONLY /* VT1616 */ | |
1834 | }, | |
1835 | { | |
69ad07cf JK |
1836 | .subvendor = 0x14cd, |
1837 | .subdevice = 0x7002, | |
1da177e4 LT |
1838 | .name = "Unknown", |
1839 | .type = AC97_TUNE_ALC_JACK | |
1840 | }, | |
1841 | { | |
69ad07cf JK |
1842 | .subvendor = 0x1071, |
1843 | .subdevice = 0x8590, | |
1da177e4 LT |
1844 | .name = "Mitac Mobo", |
1845 | .type = AC97_TUNE_ALC_JACK | |
1846 | }, | |
1847 | { | |
69ad07cf JK |
1848 | .subvendor = 0x161f, |
1849 | .subdevice = 0x202b, | |
1da177e4 LT |
1850 | .name = "Arima Notebook", |
1851 | .type = AC97_TUNE_HP_ONLY, | |
1852 | }, | |
dac8dddd TI |
1853 | { |
1854 | .subvendor = 0x161f, | |
1855 | .subdevice = 0x2032, | |
1856 | .name = "Targa Traveller 811", | |
1857 | .type = AC97_TUNE_HP_ONLY, | |
1858 | }, | |
d4199f01 DC |
1859 | { |
1860 | .subvendor = 0x161f, | |
1861 | .subdevice = 0x2032, | |
1862 | .name = "m680x", | |
1863 | .type = AC97_TUNE_HP_ONLY, /* http://launchpad.net/bugs/38546 */ | |
1864 | }, | |
9674513d TI |
1865 | { |
1866 | .subvendor = 0x1297, | |
1867 | .subdevice = 0xa232, | |
1868 | .name = "Shuttle AK32VN", | |
1869 | .type = AC97_TUNE_HP_ONLY | |
1870 | }, | |
1da177e4 LT |
1871 | { } /* terminator */ |
1872 | }; | |
1873 | ||
e23e7a14 | 1874 | static int snd_via82xx_mixer_new(struct via82xx *chip, const char *quirk_override) |
1da177e4 | 1875 | { |
e437e3d7 | 1876 | struct snd_ac97_template ac97; |
1da177e4 | 1877 | int err; |
51055da5 | 1878 | static const struct snd_ac97_bus_ops ops = { |
1da177e4 LT |
1879 | .write = snd_via82xx_codec_write, |
1880 | .read = snd_via82xx_codec_read, | |
1881 | .wait = snd_via82xx_codec_wait, | |
1882 | }; | |
1883 | ||
afb342f0 TI |
1884 | err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus); |
1885 | if (err < 0) | |
1da177e4 LT |
1886 | return err; |
1887 | chip->ac97_bus->private_free = snd_via82xx_mixer_free_ac97_bus; | |
1888 | chip->ac97_bus->clock = chip->ac97_clock; | |
1da177e4 LT |
1889 | |
1890 | memset(&ac97, 0, sizeof(ac97)); | |
1891 | ac97.private_data = chip; | |
1892 | ac97.private_free = snd_via82xx_mixer_free_ac97; | |
1893 | ac97.pci = chip->pci; | |
f1a63a38 | 1894 | ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE; |
afb342f0 TI |
1895 | err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97); |
1896 | if (err < 0) | |
1da177e4 LT |
1897 | return err; |
1898 | ||
1899 | snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override); | |
1900 | ||
1901 | if (chip->chip_type != TYPE_VIA686) { | |
1902 | /* use slot 10/11 */ | |
1903 | snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4); | |
1904 | } | |
1905 | ||
1906 | return 0; | |
1907 | } | |
1908 | ||
1909 | #ifdef SUPPORT_JOYSTICK | |
1910 | #define JOYSTICK_ADDR 0x200 | |
e23e7a14 | 1911 | static int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy) |
1da177e4 LT |
1912 | { |
1913 | struct gameport *gp; | |
1da177e4 | 1914 | |
b7fe4622 | 1915 | if (!joystick) |
1da177e4 LT |
1916 | return -ENODEV; |
1917 | ||
afaf9975 TI |
1918 | if (!devm_request_region(chip->card->dev, JOYSTICK_ADDR, 8, |
1919 | "VIA686 gameport")) { | |
59d3acfa | 1920 | dev_warn(chip->card->dev, "cannot reserve joystick port %#x\n", |
e437e3d7 | 1921 | JOYSTICK_ADDR); |
1da177e4 LT |
1922 | return -EBUSY; |
1923 | } | |
1924 | ||
1925 | chip->gameport = gp = gameport_allocate_port(); | |
1926 | if (!gp) { | |
59d3acfa TI |
1927 | dev_err(chip->card->dev, |
1928 | "cannot allocate memory for gameport\n"); | |
1da177e4 LT |
1929 | return -ENOMEM; |
1930 | } | |
1931 | ||
1932 | gameport_set_name(gp, "VIA686 Gameport"); | |
1933 | gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); | |
1934 | gameport_set_dev_parent(gp, &chip->pci->dev); | |
1935 | gp->io = JOYSTICK_ADDR; | |
1da177e4 LT |
1936 | |
1937 | /* Enable legacy joystick port */ | |
1938 | *legacy |= VIA_FUNC_ENABLE_GAME; | |
1939 | pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, *legacy); | |
1940 | ||
1941 | gameport_register_port(chip->gameport); | |
1942 | ||
1943 | return 0; | |
1944 | } | |
1945 | ||
e437e3d7 | 1946 | static void snd_via686_free_gameport(struct via82xx *chip) |
1da177e4 LT |
1947 | { |
1948 | if (chip->gameport) { | |
1da177e4 LT |
1949 | gameport_unregister_port(chip->gameport); |
1950 | chip->gameport = NULL; | |
1da177e4 LT |
1951 | } |
1952 | } | |
1953 | #else | |
e437e3d7 | 1954 | static inline int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy) |
1da177e4 LT |
1955 | { |
1956 | return -ENOSYS; | |
1957 | } | |
e437e3d7 | 1958 | static inline void snd_via686_free_gameport(struct via82xx *chip) { } |
1da177e4 LT |
1959 | #endif |
1960 | ||
1961 | ||
1962 | /* | |
1963 | * | |
1964 | */ | |
1965 | ||
e23e7a14 | 1966 | static int snd_via8233_init_misc(struct via82xx *chip) |
1da177e4 LT |
1967 | { |
1968 | int i, err, caps; | |
1969 | unsigned char val; | |
1970 | ||
1971 | caps = chip->chip_type == TYPE_VIA8233A ? 1 : 2; | |
1972 | for (i = 0; i < caps; i++) { | |
1973 | snd_via8233_capture_source.index = i; | |
1974 | err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_capture_source, chip)); | |
1975 | if (err < 0) | |
1976 | return err; | |
1977 | } | |
1978 | if (ac97_can_spdif(chip->ac97)) { | |
1979 | err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs3_spdif_control, chip)); | |
1980 | if (err < 0) | |
1981 | return err; | |
1982 | } | |
1983 | if (chip->chip_type != TYPE_VIA8233A) { | |
1984 | /* when no h/w PCM volume control is found, use DXS volume control | |
1985 | * as the PCM vol control | |
1986 | */ | |
e437e3d7 | 1987 | struct snd_ctl_elem_id sid; |
1da177e4 LT |
1988 | memset(&sid, 0, sizeof(sid)); |
1989 | strcpy(sid.name, "PCM Playback Volume"); | |
1990 | sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER; | |
1991 | if (! snd_ctl_find_id(chip->card, &sid)) { | |
59d3acfa TI |
1992 | dev_info(chip->card->dev, |
1993 | "Using DXS as PCM Playback\n"); | |
00f226d4 HM |
1994 | err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_pcmdxs_volume_control, chip)); |
1995 | if (err < 0) | |
1996 | return err; | |
1997 | } | |
1998 | else /* Using DXS when PCM emulation is enabled is really weird */ | |
1999 | { | |
2fb930b5 CL |
2000 | for (i = 0; i < 4; ++i) { |
2001 | struct snd_kcontrol *kctl; | |
2002 | ||
2003 | kctl = snd_ctl_new1( | |
2004 | &snd_via8233_dxs_volume_control, chip); | |
2005 | if (!kctl) | |
2006 | return -ENOMEM; | |
2007 | kctl->id.subdevice = i; | |
2008 | err = snd_ctl_add(chip->card, kctl); | |
2009 | if (err < 0) | |
2010 | return err; | |
3d009413 | 2011 | chip->dxs_controls[i] = kctl; |
2fb930b5 | 2012 | } |
1da177e4 LT |
2013 | } |
2014 | } | |
1da177e4 LT |
2015 | /* select spdif data slot 10/11 */ |
2016 | pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val); | |
2017 | val = (val & ~VIA8233_SPDIF_SLOT_MASK) | VIA8233_SPDIF_SLOT_1011; | |
2018 | val &= ~VIA8233_SPDIF_DX3; /* SPDIF off as default */ | |
2019 | pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val); | |
2020 | ||
2021 | return 0; | |
2022 | } | |
2023 | ||
e23e7a14 | 2024 | static int snd_via686_init_misc(struct via82xx *chip) |
1da177e4 LT |
2025 | { |
2026 | unsigned char legacy, legacy_cfg; | |
2027 | int rev_h = 0; | |
2028 | ||
2029 | legacy = chip->old_legacy; | |
2030 | legacy_cfg = chip->old_legacy_cfg; | |
2031 | legacy |= VIA_FUNC_MIDI_IRQMASK; /* FIXME: correct? (disable MIDI) */ | |
2032 | legacy &= ~VIA_FUNC_ENABLE_GAME; /* disable joystick */ | |
2033 | if (chip->revision >= VIA_REV_686_H) { | |
2034 | rev_h = 1; | |
b7fe4622 CL |
2035 | if (mpu_port >= 0x200) { /* force MIDI */ |
2036 | mpu_port &= 0xfffc; | |
2037 | pci_write_config_dword(chip->pci, 0x18, mpu_port | 0x01); | |
c7561cd8 | 2038 | #ifdef CONFIG_PM_SLEEP |
b7fe4622 | 2039 | chip->mpu_port_saved = mpu_port; |
1da177e4 LT |
2040 | #endif |
2041 | } else { | |
b7fe4622 | 2042 | mpu_port = pci_resource_start(chip->pci, 2); |
1da177e4 LT |
2043 | } |
2044 | } else { | |
b7fe4622 | 2045 | switch (mpu_port) { /* force MIDI */ |
1da177e4 LT |
2046 | case 0x300: |
2047 | case 0x310: | |
2048 | case 0x320: | |
2049 | case 0x330: | |
2050 | legacy_cfg &= ~(3 << 2); | |
b7fe4622 | 2051 | legacy_cfg |= (mpu_port & 0x0030) >> 2; |
1da177e4 LT |
2052 | break; |
2053 | default: /* no, use BIOS settings */ | |
2054 | if (legacy & VIA_FUNC_ENABLE_MIDI) | |
b7fe4622 | 2055 | mpu_port = 0x300 + ((legacy_cfg & 0x000c) << 2); |
1da177e4 LT |
2056 | break; |
2057 | } | |
2058 | } | |
afb342f0 | 2059 | if (mpu_port >= 0x200) |
afaf9975 TI |
2060 | chip->mpu_res = devm_request_region(&chip->pci->dev, mpu_port, |
2061 | 2, "VIA82xx MPU401"); | |
afb342f0 | 2062 | if (chip->mpu_res) { |
1da177e4 LT |
2063 | if (rev_h) |
2064 | legacy |= VIA_FUNC_MIDI_PNP; /* enable PCI I/O 2 */ | |
2065 | legacy |= VIA_FUNC_ENABLE_MIDI; | |
2066 | } else { | |
2067 | if (rev_h) | |
2068 | legacy &= ~VIA_FUNC_MIDI_PNP; /* disable PCI I/O 2 */ | |
2069 | legacy &= ~VIA_FUNC_ENABLE_MIDI; | |
b7fe4622 | 2070 | mpu_port = 0; |
1da177e4 LT |
2071 | } |
2072 | ||
2073 | pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy); | |
2074 | pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, legacy_cfg); | |
2075 | if (chip->mpu_res) { | |
2076 | if (snd_mpu401_uart_new(chip->card, 0, MPU401_HW_VIA686A, | |
dba8b469 CL |
2077 | mpu_port, MPU401_INFO_INTEGRATED | |
2078 | MPU401_INFO_IRQ_HOOK, -1, | |
2079 | &chip->rmidi) < 0) { | |
59d3acfa TI |
2080 | dev_warn(chip->card->dev, |
2081 | "unable to initialize MPU-401 at 0x%lx, skipping\n", | |
2082 | mpu_port); | |
1da177e4 LT |
2083 | legacy &= ~VIA_FUNC_ENABLE_MIDI; |
2084 | } else { | |
2085 | legacy &= ~VIA_FUNC_MIDI_IRQMASK; /* enable MIDI interrupt */ | |
2086 | } | |
2087 | pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy); | |
2088 | } | |
2089 | ||
b7fe4622 | 2090 | snd_via686_create_gameport(chip, &legacy); |
1da177e4 | 2091 | |
c7561cd8 | 2092 | #ifdef CONFIG_PM_SLEEP |
1da177e4 LT |
2093 | chip->legacy_saved = legacy; |
2094 | chip->legacy_cfg_saved = legacy_cfg; | |
2095 | #endif | |
2096 | ||
2097 | return 0; | |
2098 | } | |
2099 | ||
2100 | ||
2101 | /* | |
2102 | * proc interface | |
2103 | */ | |
e437e3d7 TI |
2104 | static void snd_via82xx_proc_read(struct snd_info_entry *entry, |
2105 | struct snd_info_buffer *buffer) | |
1da177e4 | 2106 | { |
e437e3d7 | 2107 | struct via82xx *chip = entry->private_data; |
1da177e4 LT |
2108 | int i; |
2109 | ||
2110 | snd_iprintf(buffer, "%s\n\n", chip->card->longname); | |
2111 | for (i = 0; i < 0xa0; i += 4) { | |
2112 | snd_iprintf(buffer, "%02x: %08x\n", i, inl(chip->port + i)); | |
2113 | } | |
2114 | } | |
2115 | ||
e23e7a14 | 2116 | static void snd_via82xx_proc_init(struct via82xx *chip) |
1da177e4 | 2117 | { |
47f2769b TI |
2118 | snd_card_ro_proc_new(chip->card, "via82xx", chip, |
2119 | snd_via82xx_proc_read); | |
1da177e4 LT |
2120 | } |
2121 | ||
2122 | /* | |
2123 | * | |
2124 | */ | |
2125 | ||
e437e3d7 | 2126 | static int snd_via82xx_chip_init(struct via82xx *chip) |
1da177e4 LT |
2127 | { |
2128 | unsigned int val; | |
ef21ca24 | 2129 | unsigned long end_time; |
1da177e4 LT |
2130 | unsigned char pval; |
2131 | ||
2132 | #if 0 /* broken on K7M? */ | |
2133 | if (chip->chip_type == TYPE_VIA686) | |
2134 | /* disable all legacy ports */ | |
2135 | pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, 0); | |
2136 | #endif | |
2137 | pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval); | |
2138 | if (! (pval & VIA_ACLINK_C00_READY)) { /* codec not ready? */ | |
2139 | /* deassert ACLink reset, force SYNC */ | |
2140 | pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, | |
2141 | VIA_ACLINK_CTRL_ENABLE | | |
2142 | VIA_ACLINK_CTRL_RESET | | |
2143 | VIA_ACLINK_CTRL_SYNC); | |
2144 | udelay(100); | |
2145 | #if 1 /* FIXME: should we do full reset here for all chip models? */ | |
2146 | pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 0x00); | |
2147 | udelay(100); | |
2148 | #else | |
2149 | /* deassert ACLink reset, force SYNC (warm AC'97 reset) */ | |
2150 | pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, | |
2151 | VIA_ACLINK_CTRL_RESET|VIA_ACLINK_CTRL_SYNC); | |
2152 | udelay(2); | |
2153 | #endif | |
2154 | /* ACLink on, deassert ACLink reset, VSR, SGD data out */ | |
2155 | /* note - FM data out has trouble with non VRA codecs !! */ | |
2156 | pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT); | |
2157 | udelay(100); | |
2158 | } | |
2159 | ||
2160 | /* Make sure VRA is enabled, in case we didn't do a | |
2161 | * complete codec reset, above */ | |
2162 | pci_read_config_byte(chip->pci, VIA_ACLINK_CTRL, &pval); | |
2163 | if ((pval & VIA_ACLINK_CTRL_INIT) != VIA_ACLINK_CTRL_INIT) { | |
2164 | /* ACLink on, deassert ACLink reset, VSR, SGD data out */ | |
2165 | /* note - FM data out has trouble with non VRA codecs !! */ | |
2166 | pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT); | |
2167 | udelay(100); | |
2168 | } | |
2169 | ||
2170 | /* wait until codec ready */ | |
ef21ca24 | 2171 | end_time = jiffies + msecs_to_jiffies(750); |
1da177e4 LT |
2172 | do { |
2173 | pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval); | |
2174 | if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */ | |
2175 | break; | |
d86d0193 | 2176 | schedule_timeout_uninterruptible(1); |
ef21ca24 | 2177 | } while (time_before(jiffies, end_time)); |
1da177e4 | 2178 | |
afb342f0 TI |
2179 | val = snd_via82xx_codec_xread(chip); |
2180 | if (val & VIA_REG_AC97_BUSY) | |
59d3acfa TI |
2181 | dev_err(chip->card->dev, |
2182 | "AC'97 codec is not ready [0x%x]\n", val); | |
1da177e4 LT |
2183 | |
2184 | #if 0 /* FIXME: we don't support the second codec yet so skip the detection now.. */ | |
2185 | snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | | |
2186 | VIA_REG_AC97_SECONDARY_VALID | | |
2187 | (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); | |
ef21ca24 | 2188 | end_time = jiffies + msecs_to_jiffies(750); |
1da177e4 LT |
2189 | snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | |
2190 | VIA_REG_AC97_SECONDARY_VALID | | |
2191 | (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); | |
2192 | do { | |
afb342f0 TI |
2193 | val = snd_via82xx_codec_xread(chip); |
2194 | if (val & VIA_REG_AC97_SECONDARY_VALID) { | |
1da177e4 LT |
2195 | chip->ac97_secondary = 1; |
2196 | goto __ac97_ok2; | |
2197 | } | |
d86d0193 | 2198 | schedule_timeout_uninterruptible(1); |
ef21ca24 | 2199 | } while (time_before(jiffies, end_time)); |
1da177e4 LT |
2200 | /* This is ok, the most of motherboards have only one codec */ |
2201 | ||
2202 | __ac97_ok2: | |
2203 | #endif | |
2204 | ||
2205 | if (chip->chip_type == TYPE_VIA686) { | |
2206 | /* route FM trap to IRQ, disable FM trap */ | |
2207 | pci_write_config_byte(chip->pci, VIA_FM_NMI_CTRL, 0); | |
2208 | /* disable all GPI interrupts */ | |
2209 | outl(0, VIAREG(chip, GPI_INTR)); | |
2210 | } | |
2211 | ||
2212 | if (chip->chip_type != TYPE_VIA686) { | |
2213 | /* Workaround for Award BIOS bug: | |
2214 | * DXS channels don't work properly with VRA if MC97 is disabled. | |
2215 | */ | |
2216 | struct pci_dev *pci; | |
0dd119f7 | 2217 | pci = pci_get_device(0x1106, 0x3068, NULL); /* MC97 */ |
1da177e4 LT |
2218 | if (pci) { |
2219 | unsigned char data; | |
2220 | pci_read_config_byte(pci, 0x44, &data); | |
2221 | pci_write_config_byte(pci, 0x44, data | 0x40); | |
0dd119f7 | 2222 | pci_dev_put(pci); |
1da177e4 LT |
2223 | } |
2224 | } | |
2225 | ||
2226 | if (chip->chip_type != TYPE_VIA8233A) { | |
2227 | int i, idx; | |
2228 | for (idx = 0; idx < 4; idx++) { | |
2229 | unsigned long port = chip->port + 0x10 * idx; | |
00f226d4 HM |
2230 | for (i = 0; i < 2; i++) { |
2231 | chip->playback_volume[idx][i]=chip->playback_volume_c[i]; | |
e437e3d7 TI |
2232 | outb(chip->playback_volume_c[i], |
2233 | port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i); | |
00f226d4 | 2234 | } |
1da177e4 LT |
2235 | } |
2236 | } | |
2237 | ||
2238 | return 0; | |
2239 | } | |
2240 | ||
c7561cd8 | 2241 | #ifdef CONFIG_PM_SLEEP |
1da177e4 LT |
2242 | /* |
2243 | * power management | |
2244 | */ | |
68cb2b55 | 2245 | static int snd_via82xx_suspend(struct device *dev) |
1da177e4 | 2246 | { |
68cb2b55 | 2247 | struct snd_card *card = dev_get_drvdata(dev); |
57feb835 | 2248 | struct via82xx *chip = card->private_data; |
1da177e4 LT |
2249 | int i; |
2250 | ||
57feb835 | 2251 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); |
1da177e4 LT |
2252 | for (i = 0; i < chip->num_devs; i++) |
2253 | snd_via82xx_channel_reset(chip, &chip->devs[i]); | |
1da177e4 LT |
2254 | snd_ac97_suspend(chip->ac97); |
2255 | ||
2256 | /* save misc values */ | |
2257 | if (chip->chip_type != TYPE_VIA686) { | |
2258 | pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &chip->spdif_ctrl_saved); | |
2259 | chip->capture_src_saved[0] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL); | |
2260 | chip->capture_src_saved[1] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10); | |
2261 | } | |
2262 | ||
1da177e4 LT |
2263 | return 0; |
2264 | } | |
2265 | ||
68cb2b55 | 2266 | static int snd_via82xx_resume(struct device *dev) |
1da177e4 | 2267 | { |
68cb2b55 | 2268 | struct snd_card *card = dev_get_drvdata(dev); |
57feb835 | 2269 | struct via82xx *chip = card->private_data; |
1da177e4 LT |
2270 | int i; |
2271 | ||
1da177e4 LT |
2272 | snd_via82xx_chip_init(chip); |
2273 | ||
2274 | if (chip->chip_type == TYPE_VIA686) { | |
2275 | if (chip->mpu_port_saved) | |
2276 | pci_write_config_dword(chip->pci, 0x18, chip->mpu_port_saved | 0x01); | |
2277 | pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->legacy_saved); | |
2278 | pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->legacy_cfg_saved); | |
2279 | } else { | |
2280 | pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, chip->spdif_ctrl_saved); | |
2281 | outb(chip->capture_src_saved[0], chip->port + VIA_REG_CAPTURE_CHANNEL); | |
2282 | outb(chip->capture_src_saved[1], chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10); | |
2283 | } | |
2284 | ||
2285 | snd_ac97_resume(chip->ac97); | |
2286 | ||
2287 | for (i = 0; i < chip->num_devs; i++) | |
2288 | snd_via82xx_channel_reset(chip, &chip->devs[i]); | |
2289 | ||
57feb835 | 2290 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
1da177e4 LT |
2291 | return 0; |
2292 | } | |
68cb2b55 TI |
2293 | |
2294 | static SIMPLE_DEV_PM_OPS(snd_via82xx_pm, snd_via82xx_suspend, snd_via82xx_resume); | |
2295 | #define SND_VIA82XX_PM_OPS &snd_via82xx_pm | |
2296 | #else | |
2297 | #define SND_VIA82XX_PM_OPS NULL | |
c7561cd8 | 2298 | #endif /* CONFIG_PM_SLEEP */ |
1da177e4 | 2299 | |
afaf9975 | 2300 | static void snd_via82xx_free(struct snd_card *card) |
1da177e4 | 2301 | { |
afaf9975 | 2302 | struct via82xx *chip = card->private_data; |
1da177e4 LT |
2303 | unsigned int i; |
2304 | ||
1da177e4 LT |
2305 | /* disable interrupts */ |
2306 | for (i = 0; i < chip->num_devs; i++) | |
2307 | snd_via82xx_channel_reset(chip, &chip->devs[i]); | |
f000fd80 | 2308 | |
1da177e4 LT |
2309 | if (chip->chip_type == TYPE_VIA686) { |
2310 | snd_via686_free_gameport(chip); | |
2311 | pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->old_legacy); | |
2312 | pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->old_legacy_cfg); | |
2313 | } | |
1da177e4 LT |
2314 | } |
2315 | ||
e23e7a14 BP |
2316 | static int snd_via82xx_create(struct snd_card *card, |
2317 | struct pci_dev *pci, | |
2318 | int chip_type, | |
2319 | int revision, | |
afaf9975 | 2320 | unsigned int ac97_clock) |
1da177e4 | 2321 | { |
afaf9975 | 2322 | struct via82xx *chip = card->private_data; |
1da177e4 | 2323 | int err; |
1da177e4 | 2324 | |
afaf9975 | 2325 | err = pcim_enable_device(pci); |
afb342f0 | 2326 | if (err < 0) |
1da177e4 LT |
2327 | return err; |
2328 | ||
1da177e4 LT |
2329 | chip->chip_type = chip_type; |
2330 | chip->revision = revision; | |
2331 | ||
2332 | spin_lock_init(&chip->reg_lock); | |
2333 | spin_lock_init(&chip->rates[0].lock); | |
2334 | spin_lock_init(&chip->rates[1].lock); | |
2335 | chip->card = card; | |
2336 | chip->pci = pci; | |
2337 | chip->irq = -1; | |
2338 | ||
2339 | pci_read_config_byte(pci, VIA_FUNC_ENABLE, &chip->old_legacy); | |
2340 | pci_read_config_byte(pci, VIA_PNP_CONTROL, &chip->old_legacy_cfg); | |
2341 | pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, | |
2342 | chip->old_legacy & ~(VIA_FUNC_ENABLE_SB|VIA_FUNC_ENABLE_FM)); | |
2343 | ||
afb342f0 | 2344 | err = pci_request_regions(pci, card->driver); |
afaf9975 | 2345 | if (err < 0) |
1da177e4 | 2346 | return err; |
1da177e4 | 2347 | chip->port = pci_resource_start(pci, 0); |
afaf9975 TI |
2348 | if (devm_request_irq(&pci->dev, pci->irq, |
2349 | chip_type == TYPE_VIA8233 ? | |
2350 | snd_via8233_interrupt : snd_via686_interrupt, | |
2351 | IRQF_SHARED, | |
2352 | KBUILD_MODNAME, chip)) { | |
59d3acfa | 2353 | dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); |
1da177e4 LT |
2354 | return -EBUSY; |
2355 | } | |
2356 | chip->irq = pci->irq; | |
c47583b0 | 2357 | card->sync_irq = chip->irq; |
afaf9975 | 2358 | card->private_free = snd_via82xx_free; |
1da177e4 LT |
2359 | if (ac97_clock >= 8000 && ac97_clock <= 48000) |
2360 | chip->ac97_clock = ac97_clock; | |
1da177e4 | 2361 | |
afb342f0 | 2362 | err = snd_via82xx_chip_init(chip); |
afaf9975 | 2363 | if (err < 0) |
1da177e4 | 2364 | return err; |
1da177e4 LT |
2365 | |
2366 | /* The 8233 ac97 controller does not implement the master bit | |
2367 | * in the pci command register. IMHO this is a violation of the PCI spec. | |
2368 | * We call pci_set_master here because it does not hurt. */ | |
2369 | pci_set_master(pci); | |
1da177e4 LT |
2370 | return 0; |
2371 | } | |
2372 | ||
2373 | struct via823x_info { | |
2374 | int revision; | |
2375 | char *name; | |
2376 | int type; | |
2377 | }; | |
a05c0737 | 2378 | static const struct via823x_info via823x_cards[] = { |
1da177e4 LT |
2379 | { VIA_REV_PRE_8233, "VIA 8233-Pre", TYPE_VIA8233 }, |
2380 | { VIA_REV_8233C, "VIA 8233C", TYPE_VIA8233 }, | |
2381 | { VIA_REV_8233, "VIA 8233", TYPE_VIA8233 }, | |
2382 | { VIA_REV_8233A, "VIA 8233A", TYPE_VIA8233A }, | |
2383 | { VIA_REV_8235, "VIA 8235", TYPE_VIA8233 }, | |
2384 | { VIA_REV_8237, "VIA 8237", TYPE_VIA8233 }, | |
8263c65f | 2385 | { VIA_REV_8251, "VIA 8251", TYPE_VIA8233 }, |
1da177e4 LT |
2386 | }; |
2387 | ||
2388 | /* | |
2389 | * auto detection of DXS channel supports. | |
2390 | */ | |
9d74958a | 2391 | |
21641672 | 2392 | static const struct snd_pci_quirk dxs_allowlist[] = { |
9d74958a TI |
2393 | SND_PCI_QUIRK(0x1005, 0x4710, "Avance Logic Mobo", VIA_DXS_ENABLE), |
2394 | SND_PCI_QUIRK(0x1019, 0x0996, "ESC Mobo", VIA_DXS_48K), | |
2395 | SND_PCI_QUIRK(0x1019, 0x0a81, "ECS K7VTA3 v8.0", VIA_DXS_NO_VRA), | |
2396 | SND_PCI_QUIRK(0x1019, 0x0a85, "ECS L7VMM2", VIA_DXS_NO_VRA), | |
a85165c6 | 2397 | SND_PCI_QUIRK_VENDOR(0x1019, "ESC K8", VIA_DXS_SRC), |
9d74958a TI |
2398 | SND_PCI_QUIRK(0x1019, 0xaa01, "ESC K8T890-A", VIA_DXS_SRC), |
2399 | SND_PCI_QUIRK(0x1025, 0x0033, "Acer Inspire 1353LM", VIA_DXS_NO_VRA), | |
2400 | SND_PCI_QUIRK(0x1025, 0x0046, "Acer Aspire 1524 WLMi", VIA_DXS_SRC), | |
a85165c6 TI |
2401 | SND_PCI_QUIRK_VENDOR(0x1043, "ASUS A7/A8", VIA_DXS_NO_VRA), |
2402 | SND_PCI_QUIRK_VENDOR(0x1071, "Diverse Notebook", VIA_DXS_NO_VRA), | |
9d74958a | 2403 | SND_PCI_QUIRK(0x10cf, 0x118e, "FSC Laptop", VIA_DXS_ENABLE), |
a85165c6 | 2404 | SND_PCI_QUIRK_VENDOR(0x1106, "ASRock", VIA_DXS_SRC), |
11be265f | 2405 | SND_PCI_QUIRK(0x1297, 0xa231, "Shuttle AK31v2", VIA_DXS_SRC), |
9674513d TI |
2406 | SND_PCI_QUIRK(0x1297, 0xa232, "Shuttle", VIA_DXS_SRC), |
2407 | SND_PCI_QUIRK(0x1297, 0xc160, "Shuttle Sk41G", VIA_DXS_SRC), | |
9d74958a TI |
2408 | SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte GA-7VAXP", VIA_DXS_ENABLE), |
2409 | SND_PCI_QUIRK(0x1462, 0x3800, "MSI KT266", VIA_DXS_ENABLE), | |
2410 | SND_PCI_QUIRK(0x1462, 0x7120, "MSI KT4V", VIA_DXS_ENABLE), | |
2411 | SND_PCI_QUIRK(0x1462, 0x7142, "MSI K8MM-V", VIA_DXS_ENABLE), | |
a85165c6 | 2412 | SND_PCI_QUIRK_VENDOR(0x1462, "MSI Mobo", VIA_DXS_SRC), |
9d74958a TI |
2413 | SND_PCI_QUIRK(0x147b, 0x1401, "ABIT KD7(-RAID)", VIA_DXS_ENABLE), |
2414 | SND_PCI_QUIRK(0x147b, 0x1411, "ABIT VA-20", VIA_DXS_ENABLE), | |
2415 | SND_PCI_QUIRK(0x147b, 0x1413, "ABIT KV8 Pro", VIA_DXS_ENABLE), | |
2416 | SND_PCI_QUIRK(0x147b, 0x1415, "ABIT AV8", VIA_DXS_NO_VRA), | |
2417 | SND_PCI_QUIRK(0x14ff, 0x0403, "Twinhead mobo", VIA_DXS_ENABLE), | |
2418 | SND_PCI_QUIRK(0x14ff, 0x0408, "Twinhead laptop", VIA_DXS_SRC), | |
2419 | SND_PCI_QUIRK(0x1558, 0x4701, "Clevo D470", VIA_DXS_SRC), | |
2420 | SND_PCI_QUIRK(0x1584, 0x8120, "Diverse Laptop", VIA_DXS_ENABLE), | |
2421 | SND_PCI_QUIRK(0x1584, 0x8123, "Targa/Uniwill", VIA_DXS_NO_VRA), | |
2422 | SND_PCI_QUIRK(0x161f, 0x202b, "Amira Notebook", VIA_DXS_NO_VRA), | |
2423 | SND_PCI_QUIRK(0x161f, 0x2032, "m680x machines", VIA_DXS_48K), | |
2424 | SND_PCI_QUIRK(0x1631, 0xe004, "PB EasyNote 3174", VIA_DXS_ENABLE), | |
2425 | SND_PCI_QUIRK(0x1695, 0x3005, "EPoX EP-8K9A", VIA_DXS_ENABLE), | |
a85165c6 TI |
2426 | SND_PCI_QUIRK_VENDOR(0x1695, "EPoX mobo", VIA_DXS_SRC), |
2427 | SND_PCI_QUIRK_VENDOR(0x16f3, "Jetway K8", VIA_DXS_SRC), | |
2428 | SND_PCI_QUIRK_VENDOR(0x1734, "FSC Laptop", VIA_DXS_SRC), | |
9d74958a | 2429 | SND_PCI_QUIRK(0x1849, 0x3059, "ASRock K7VM2", VIA_DXS_NO_VRA), |
a85165c6 | 2430 | SND_PCI_QUIRK_VENDOR(0x1849, "ASRock mobo", VIA_DXS_SRC), |
9d74958a TI |
2431 | SND_PCI_QUIRK(0x1919, 0x200a, "Soltek SL-K8", VIA_DXS_NO_VRA), |
2432 | SND_PCI_QUIRK(0x4005, 0x4710, "MSI K7T266", VIA_DXS_SRC), | |
2433 | { } /* terminator */ | |
1da177e4 LT |
2434 | }; |
2435 | ||
e23e7a14 | 2436 | static int check_dxs_list(struct pci_dev *pci, int revision) |
1da177e4 | 2437 | { |
9d74958a | 2438 | const struct snd_pci_quirk *w; |
1da177e4 | 2439 | |
21641672 | 2440 | w = snd_pci_quirk_lookup(pci, dxs_allowlist); |
9d74958a | 2441 | if (w) { |
21641672 | 2442 | dev_dbg(&pci->dev, "DXS allow list for %s found\n", |
86b27237 | 2443 | snd_pci_quirk_name(w)); |
9d74958a | 2444 | return w->value; |
1da177e4 LT |
2445 | } |
2446 | ||
a769577b TI |
2447 | /* for newer revision, default to DXS_SRC */ |
2448 | if (revision >= VIA_REV_8235) | |
2449 | return VIA_DXS_SRC; | |
2450 | ||
1da177e4 LT |
2451 | /* |
2452 | * not detected, try 48k rate only to be sure. | |
2453 | */ | |
59d3acfa TI |
2454 | dev_info(&pci->dev, "Assuming DXS channels with 48k fixed sample rate.\n"); |
2455 | dev_info(&pci->dev, " Please try dxs_support=5 option\n"); | |
2456 | dev_info(&pci->dev, " and report if it works on your machine.\n"); | |
2457 | dev_info(&pci->dev, " For more details, read ALSA-Configuration.txt.\n"); | |
1da177e4 LT |
2458 | return VIA_DXS_48K; |
2459 | }; | |
2460 | ||
83693253 TI |
2461 | static int __snd_via82xx_probe(struct pci_dev *pci, |
2462 | const struct pci_device_id *pci_id) | |
1da177e4 | 2463 | { |
e437e3d7 TI |
2464 | struct snd_card *card; |
2465 | struct via82xx *chip; | |
1da177e4 LT |
2466 | int chip_type = 0, card_type; |
2467 | unsigned int i; | |
2468 | int err; | |
2469 | ||
afaf9975 TI |
2470 | err = snd_devm_card_new(&pci->dev, index, id, THIS_MODULE, |
2471 | sizeof(*chip), &card); | |
e58de7ba TI |
2472 | if (err < 0) |
2473 | return err; | |
afaf9975 | 2474 | chip = card->private_data; |
1da177e4 LT |
2475 | |
2476 | card_type = pci_id->driver_data; | |
1da177e4 LT |
2477 | switch (card_type) { |
2478 | case TYPE_CARD_VIA686: | |
2479 | strcpy(card->driver, "VIA686A"); | |
44c10138 | 2480 | sprintf(card->shortname, "VIA 82C686A/B rev%x", pci->revision); |
1da177e4 LT |
2481 | chip_type = TYPE_VIA686; |
2482 | break; | |
2483 | case TYPE_CARD_VIA8233: | |
2484 | chip_type = TYPE_VIA8233; | |
44c10138 | 2485 | sprintf(card->shortname, "VIA 823x rev%x", pci->revision); |
1da177e4 | 2486 | for (i = 0; i < ARRAY_SIZE(via823x_cards); i++) { |
44c10138 | 2487 | if (pci->revision == via823x_cards[i].revision) { |
1da177e4 LT |
2488 | chip_type = via823x_cards[i].type; |
2489 | strcpy(card->shortname, via823x_cards[i].name); | |
2490 | break; | |
2491 | } | |
2492 | } | |
2493 | if (chip_type != TYPE_VIA8233A) { | |
b7fe4622 | 2494 | if (dxs_support == VIA_DXS_AUTO) |
44c10138 | 2495 | dxs_support = check_dxs_list(pci, pci->revision); |
1da177e4 LT |
2496 | /* force to use VIA8233 or 8233A model according to |
2497 | * dxs_support module option | |
2498 | */ | |
b7fe4622 | 2499 | if (dxs_support == VIA_DXS_DISABLE) |
1da177e4 LT |
2500 | chip_type = TYPE_VIA8233A; |
2501 | else | |
2502 | chip_type = TYPE_VIA8233; | |
2503 | } | |
2504 | if (chip_type == TYPE_VIA8233A) | |
2505 | strcpy(card->driver, "VIA8233A"); | |
44c10138 | 2506 | else if (pci->revision >= VIA_REV_8237) |
1da177e4 LT |
2507 | strcpy(card->driver, "VIA8237"); /* no slog assignment */ |
2508 | else | |
2509 | strcpy(card->driver, "VIA8233"); | |
2510 | break; | |
2511 | default: | |
59d3acfa | 2512 | dev_err(card->dev, "invalid card type %d\n", card_type); |
afaf9975 | 2513 | return -EINVAL; |
1da177e4 LT |
2514 | } |
2515 | ||
afb342f0 | 2516 | err = snd_via82xx_create(card, pci, chip_type, pci->revision, |
afaf9975 | 2517 | ac97_clock); |
afb342f0 | 2518 | if (err < 0) |
afaf9975 | 2519 | return err; |
afb342f0 TI |
2520 | err = snd_via82xx_mixer_new(chip, ac97_quirk); |
2521 | if (err < 0) | |
afaf9975 | 2522 | return err; |
1da177e4 LT |
2523 | |
2524 | if (chip_type == TYPE_VIA686) { | |
afb342f0 TI |
2525 | err = snd_via686_pcm_new(chip); |
2526 | if (err < 0) | |
afaf9975 | 2527 | return err; |
afb342f0 TI |
2528 | err = snd_via686_init_misc(chip); |
2529 | if (err < 0) | |
afaf9975 | 2530 | return err; |
1da177e4 LT |
2531 | } else { |
2532 | if (chip_type == TYPE_VIA8233A) { | |
afb342f0 TI |
2533 | err = snd_via8233a_pcm_new(chip); |
2534 | if (err < 0) | |
afaf9975 | 2535 | return err; |
1da177e4 LT |
2536 | // chip->dxs_fixed = 1; /* FIXME: use 48k for DXS #3? */ |
2537 | } else { | |
afb342f0 TI |
2538 | err = snd_via8233_pcm_new(chip); |
2539 | if (err < 0) | |
afaf9975 | 2540 | return err; |
b7fe4622 | 2541 | if (dxs_support == VIA_DXS_48K) |
1da177e4 | 2542 | chip->dxs_fixed = 1; |
b7fe4622 | 2543 | else if (dxs_support == VIA_DXS_NO_VRA) |
1da177e4 | 2544 | chip->no_vra = 1; |
b7fe4622 | 2545 | else if (dxs_support == VIA_DXS_SRC) { |
2d7eb7cb SV |
2546 | chip->no_vra = 1; |
2547 | chip->dxs_src = 1; | |
2548 | } | |
1da177e4 | 2549 | } |
afb342f0 TI |
2550 | err = snd_via8233_init_misc(chip); |
2551 | if (err < 0) | |
afaf9975 | 2552 | return err; |
1da177e4 LT |
2553 | } |
2554 | ||
1da177e4 LT |
2555 | /* disable interrupts */ |
2556 | for (i = 0; i < chip->num_devs; i++) | |
2557 | snd_via82xx_channel_reset(chip, &chip->devs[i]); | |
2558 | ||
2559 | snprintf(card->longname, sizeof(card->longname), | |
2560 | "%s with %s at %#lx, irq %d", card->shortname, | |
2561 | snd_ac97_get_short_name(chip->ac97), chip->port, chip->irq); | |
2562 | ||
2563 | snd_via82xx_proc_init(chip); | |
2564 | ||
afb342f0 | 2565 | err = snd_card_register(card); |
afaf9975 | 2566 | if (err < 0) |
1da177e4 | 2567 | return err; |
1da177e4 | 2568 | pci_set_drvdata(pci, card); |
1da177e4 | 2569 | return 0; |
1da177e4 LT |
2570 | } |
2571 | ||
83693253 TI |
2572 | static int snd_via82xx_probe(struct pci_dev *pci, |
2573 | const struct pci_device_id *pci_id) | |
2574 | { | |
2575 | return snd_card_free_on_error(&pci->dev, __snd_via82xx_probe(pci, pci_id)); | |
2576 | } | |
2577 | ||
e9f66d9b | 2578 | static struct pci_driver via82xx_driver = { |
3733e424 | 2579 | .name = KBUILD_MODNAME, |
1da177e4 LT |
2580 | .id_table = snd_via82xx_ids, |
2581 | .probe = snd_via82xx_probe, | |
68cb2b55 TI |
2582 | .driver = { |
2583 | .pm = SND_VIA82XX_PM_OPS, | |
2584 | }, | |
1da177e4 LT |
2585 | }; |
2586 | ||
e9f66d9b | 2587 | module_pci_driver(via82xx_driver); |