]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - sound/pci/ymfpci/ymfpci_main.c
projects / mirror_ubuntu-artful-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[ALSA] semaphore -> mutex (Archs, misc buses)
[mirror_ubuntu-artful-kernel.git] / sound / pci / ymfpci / ymfpci_main.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Routines for control of YMF724/740/744/754 chips
4 *
5 * BUGS:
6 * --
7 *
8 * TODO:
9 * --
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 */
26
27#include <sound/driver.h>
28#include <linux/delay.h>
29#include <linux/init.h>
30#include <linux/interrupt.h>
31#include <linux/pci.h>
32#include <linux/sched.h>
33#include <linux/slab.h>
34#include <linux/vmalloc.h>
35
36#include <sound/core.h>
37#include <sound/control.h>
38#include <sound/info.h>
39#include <sound/ymfpci.h>
40#include <sound/asoundef.h>
41#include <sound/mpu401.h>
42
43#include <asm/io.h>
44
45/*
46 * constants
47 */
48
49/*
50 * common I/O routines
51 */
52
208a1b4c 53static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
1da177e4 54
208a1b4c 55static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT		 56{
57 return readb(chip->reg_area_virt + offset);
58}
59
208a1b4c 60static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
1da177e4
LT		 61{
62 writeb(val, chip->reg_area_virt + offset);
63}
64
208a1b4c 65static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT		 66{
67 return readw(chip->reg_area_virt + offset);
68}
69
208a1b4c 70static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
1da177e4
LT		 71{
72 writew(val, chip->reg_area_virt + offset);
73}
74
208a1b4c 75static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT		 76{
77 return readl(chip->reg_area_virt + offset);
78}
79
208a1b4c 80static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
1da177e4
LT		 81{
82 writel(val, chip->reg_area_virt + offset);
83}
84
208a1b4c 85static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
1da177e4 86{
ef21ca24 87 unsigned long end_time;
1da177e4
LT		 88 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
89
ef21ca24 90 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT		 91 do {
92 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
93 return 0;
94 set_current_state(TASK_UNINTERRUPTIBLE);
8433a509 95 schedule_timeout_uninterruptible(1);
ef21ca24 96 } while (time_before(jiffies, end_time));
99b359ba 97 snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
1da177e4
LT		 98 return -EBUSY;
99}
100
208a1b4c 101static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
1da177e4 102{
208a1b4c 103 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT		 104 u32 cmd;
105
106 snd_ymfpci_codec_ready(chip, 0);
107 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
108 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
109}
110
208a1b4c 111static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
1da177e4 112{
208a1b4c 113 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT		 114
115 if (snd_ymfpci_codec_ready(chip, 0))
116 return ~0;
117 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
118 if (snd_ymfpci_codec_ready(chip, 0))
119 return ~0;
120 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
121 int i;
122 for (i = 0; i < 600; i++)
123 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
124 }
125 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
126}
127
128/*
129 * Misc routines
130 */
131
132static u32 snd_ymfpci_calc_delta(u32 rate)
133{
134 switch (rate) {
135 case 8000: return 0x02aaab00;
136 case 11025: return 0x03accd00;
137 case 16000: return 0x05555500;
138 case 22050: return 0x07599a00;
139 case 32000: return 0x0aaaab00;
140 case 44100: return 0x0eb33300;
141 default: return ((rate << 16) / 375) << 5;
142 }
143}
144
145static u32 def_rate[8] = {
146 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
147};
148
149static u32 snd_ymfpci_calc_lpfK(u32 rate)
150{
151 u32 i;
152 static u32 val[8] = {
153 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
154 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
155 };
156
157 if (rate == 44100)
158 return 0x40000000; /* FIXME: What's the right value? */
159 for (i = 0; i < 8; i++)
160 if (rate <= def_rate[i])
161 return val[i];
162 return val[0];
163}
164
165static u32 snd_ymfpci_calc_lpfQ(u32 rate)
166{
167 u32 i;
168 static u32 val[8] = {
169 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
170 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
171 };
172
173 if (rate == 44100)
174 return 0x370A0000;
175 for (i = 0; i < 8; i++)
176 if (rate <= def_rate[i])
177 return val[i];
178 return val[0];
179}
180
181/*
182 * Hardware start management
183 */
184
208a1b4c 185static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
1da177e4
LT		 186{
187 unsigned long flags;
188
189 spin_lock_irqsave(&chip->reg_lock, flags);
190 if (chip->start_count++ > 0)
191 goto __end;
192 snd_ymfpci_writel(chip, YDSXGR_MODE,
193 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
194 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
195 __end:
196 spin_unlock_irqrestore(&chip->reg_lock, flags);
197}
198
208a1b4c 199static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
1da177e4
LT		 200{
201 unsigned long flags;
202 long timeout = 1000;
203
204 spin_lock_irqsave(&chip->reg_lock, flags);
205 if (--chip->start_count > 0)
206 goto __end;
207 snd_ymfpci_writel(chip, YDSXGR_MODE,
208 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
209 while (timeout-- > 0) {
210 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
211 break;
212 }
213 if (atomic_read(&chip->interrupt_sleep_count)) {
214 atomic_set(&chip->interrupt_sleep_count, 0);
215 wake_up(&chip->interrupt_sleep);
216 }
217 __end:
218 spin_unlock_irqrestore(&chip->reg_lock, flags);
219}
220
221/*
222 * Playback voice management
223 */
224
208a1b4c
TI		 225static int voice_alloc(struct snd_ymfpci *chip,
226 enum snd_ymfpci_voice_type type, int pair,
227 struct snd_ymfpci_voice **rvoice)
1da177e4 228{
208a1b4c 229 struct snd_ymfpci_voice *voice, *voice2;
1da177e4
LT		 230 int idx;
231
232 *rvoice = NULL;
233 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
234 voice = &chip->voices[idx];
235 voice2 = pair ? &chip->voices[idx+1] : NULL;
236 if (voice->use || (voice2 && voice2->use))
237 continue;
238 voice->use = 1;
239 if (voice2)
240 voice2->use = 1;
241 switch (type) {
242 case YMFPCI_PCM:
243 voice->pcm = 1;
244 if (voice2)
245 voice2->pcm = 1;
246 break;
247 case YMFPCI_SYNTH:
248 voice->synth = 1;
249 break;
250 case YMFPCI_MIDI:
251 voice->midi = 1;
252 break;
253 }
254 snd_ymfpci_hw_start(chip);
255 if (voice2)
256 snd_ymfpci_hw_start(chip);
257 *rvoice = voice;
258 return 0;
259 }
260 return -ENOMEM;
261}
262
208a1b4c
TI		 263static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
264 enum snd_ymfpci_voice_type type, int pair,
265 struct snd_ymfpci_voice **rvoice)
1da177e4
LT		 266{
267 unsigned long flags;
268 int result;
269
270 snd_assert(rvoice != NULL, return -EINVAL);
271 snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL);
272
273 spin_lock_irqsave(&chip->voice_lock, flags);
274 for (;;) {
275 result = voice_alloc(chip, type, pair, rvoice);
276 if (result == 0 || type != YMFPCI_PCM)
277 break;
278 /* TODO: synth/midi voice deallocation */
279 break;
280 }
281 spin_unlock_irqrestore(&chip->voice_lock, flags);
282 return result;
283}
284
208a1b4c 285static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
1da177e4
LT		 286{
287 unsigned long flags;
288
289 snd_assert(pvoice != NULL, return -EINVAL);
290 snd_ymfpci_hw_stop(chip);
291 spin_lock_irqsave(&chip->voice_lock, flags);
292 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
293 pvoice->ypcm = NULL;
294 pvoice->interrupt = NULL;
295 spin_unlock_irqrestore(&chip->voice_lock, flags);
296 return 0;
297}
298
299/*
300 * PCM part
301 */
302
208a1b4c 303static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
1da177e4 304{
208a1b4c 305 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 306 u32 pos, delta;
307
308 if ((ypcm = voice->ypcm) == NULL)
309 return;
310 if (ypcm->substream == NULL)
311 return;
312 spin_lock(&chip->reg_lock);
313 if (ypcm->running) {
314 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
315 if (pos < ypcm->last_pos)
316 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
317 else
318 delta = pos - ypcm->last_pos;
319 ypcm->period_pos += delta;
320 ypcm->last_pos = pos;
321 if (ypcm->period_pos >= ypcm->period_size) {
322 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
323 ypcm->period_pos %= ypcm->period_size;
324 spin_unlock(&chip->reg_lock);
325 snd_pcm_period_elapsed(ypcm->substream);
326 spin_lock(&chip->reg_lock);
327 }
9bcf6551
CL		 328
329 if (unlikely(ypcm->update_pcm_vol)) {
330 unsigned int subs = ypcm->substream->number;
331 unsigned int next_bank = 1 - chip->active_bank;
208a1b4c 332 struct snd_ymfpci_playback_bank *bank;
9bcf6551
CL		 333 u32 volume;
334
335 bank = &voice->bank[next_bank];
336 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
337 bank->left_gain_end = volume;
338 if (ypcm->output_rear)
339 bank->eff2_gain_end = volume;
340 if (ypcm->voices[1])
341 bank = &ypcm->voices[1]->bank[next_bank];
342 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
343 bank->right_gain_end = volume;
344 if (ypcm->output_rear)
345 bank->eff3_gain_end = volume;
346 ypcm->update_pcm_vol--;
347 }
1da177e4
LT		 348 }
349 spin_unlock(&chip->reg_lock);
350}
351
208a1b4c 352static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
1da177e4 353{
208a1b4c
TI		 354 struct snd_pcm_runtime *runtime = substream->runtime;
355 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
356 struct snd_ymfpci *chip = ypcm->chip;
1da177e4
LT		 357 u32 pos, delta;
358
359 spin_lock(&chip->reg_lock);
360 if (ypcm->running) {
361 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
362 if (pos < ypcm->last_pos)
363 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
364 else
365 delta = pos - ypcm->last_pos;
366 ypcm->period_pos += delta;
367 ypcm->last_pos = pos;
368 if (ypcm->period_pos >= ypcm->period_size) {
369 ypcm->period_pos %= ypcm->period_size;
370 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
371 spin_unlock(&chip->reg_lock);
372 snd_pcm_period_elapsed(substream);
373 spin_lock(&chip->reg_lock);
374 }
375 }
376 spin_unlock(&chip->reg_lock);
377}
378
208a1b4c 379static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 380 int cmd)
381{
208a1b4c
TI		 382 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
383 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1da177e4
LT		 384 int result = 0;
385
386 spin_lock(&chip->reg_lock);
387 if (ypcm->voices[0] == NULL) {
388 result = -EINVAL;
389 goto __unlock;
390 }
391 switch (cmd) {
392 case SNDRV_PCM_TRIGGER_START:
393 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
394 case SNDRV_PCM_TRIGGER_RESUME:
395 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
396 if (ypcm->voices[1] != NULL)
397 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
398 ypcm->running = 1;
399 break;
400 case SNDRV_PCM_TRIGGER_STOP:
401 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
402 case SNDRV_PCM_TRIGGER_SUSPEND:
403 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
404 if (ypcm->voices[1] != NULL)
405 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
406 ypcm->running = 0;
407 break;
408 default:
409 result = -EINVAL;
410 break;
411 }
412 __unlock:
413 spin_unlock(&chip->reg_lock);
414 return result;
415}
208a1b4c 416static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 417 int cmd)
418{
208a1b4c
TI		 419 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
420 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1da177e4
LT		 421 int result = 0;
422 u32 tmp;
423
424 spin_lock(&chip->reg_lock);
425 switch (cmd) {
426 case SNDRV_PCM_TRIGGER_START:
427 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
428 case SNDRV_PCM_TRIGGER_RESUME:
429 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
430 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
431 ypcm->running = 1;
432 break;
433 case SNDRV_PCM_TRIGGER_STOP:
434 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
435 case SNDRV_PCM_TRIGGER_SUSPEND:
436 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
437 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
438 ypcm->running = 0;
439 break;
440 default:
441 result = -EINVAL;
442 break;
443 }
444 spin_unlock(&chip->reg_lock);
445 return result;
446}
447
208a1b4c 448static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
1da177e4
LT		 449{
450 int err;
451
452 if (ypcm->voices[1] != NULL && voices < 2) {
453 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
454 ypcm->voices[1] = NULL;
455 }
456 if (voices == 1 && ypcm->voices[0] != NULL)
457 return 0; /* already allocated */
458 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
459 return 0; /* already allocated */
460 if (voices > 1) {
461 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
462 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
463 ypcm->voices[0] = NULL;
464 }
465 }
466 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
467 if (err < 0)
468 return err;
469 ypcm->voices[0]->ypcm = ypcm;
470 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
471 if (voices > 1) {
472 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
473 ypcm->voices[1]->ypcm = ypcm;
474 }
475 return 0;
476}
477
208a1b4c
TI		 478static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
479 struct snd_pcm_runtime *runtime,
9bcf6551 480 int has_pcm_volume)
1da177e4 481{
208a1b4c 482 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
1da177e4 483 u32 format;
9bcf6551
CL		 484 u32 delta = snd_ymfpci_calc_delta(runtime->rate);
485 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
486 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
208a1b4c 487 struct snd_ymfpci_playback_bank *bank;
1da177e4 488 unsigned int nbank;
9bcf6551
CL		 489 u32 vol_left, vol_right;
490 u8 use_left, use_right;
1da177e4
LT		 491
492 snd_assert(voice != NULL, return);
9bcf6551
CL		 493 if (runtime->channels == 1) {
494 use_left = 1;
495 use_right = 1;
496 } else {
497 use_left = (voiceidx & 1) == 0;
498 use_right = !use_left;
499 }
500 if (has_pcm_volume) {
501 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
502 [ypcm->substream->number].left << 15);
503 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
504 [ypcm->substream->number].right << 15);
505 } else {
506 vol_left = cpu_to_le32(0x40000000);
507 vol_right = cpu_to_le32(0x40000000);
508 }
509 format = runtime->channels == 2 ? 0x00010000 : 0;
510 if (snd_pcm_format_width(runtime->format) == 8)
511 format |= 0x80000000;
512 if (runtime->channels == 2 && (voiceidx & 1) != 0)
513 format |= 1;
1da177e4
LT		 514 for (nbank = 0; nbank < 2; nbank++) {
515 bank = &voice->bank[nbank];
9bcf6551 516 memset(bank, 0, sizeof(*bank));
1da177e4 517 bank->format = cpu_to_le32(format);
9bcf6551
CL		 518 bank->base = cpu_to_le32(runtime->dma_addr);
519 bank->loop_end = cpu_to_le32(ypcm->buffer_size);
1da177e4 520 bank->lpfQ = cpu_to_le32(lpfQ);
1da177e4
LT		 521 bank->delta =
522 bank->delta_end = cpu_to_le32(delta);
523 bank->lpfK =
524 bank->lpfK_end = cpu_to_le32(lpfK);
9bcf6551
CL		 525 bank->eg_gain =
526 bank->eg_gain_end = cpu_to_le32(0x40000000);
527
528 if (ypcm->output_front) {
529 if (use_left) {
530 bank->left_gain =
531 bank->left_gain_end = vol_left;
532 }
533 if (use_right) {
1da177e4 534 bank->right_gain =
9bcf6551 535 bank->right_gain_end = vol_right;
1da177e4 536 }
9bcf6551
CL		 537 }
538 if (ypcm->output_rear) {
153abaa4
CL		 539 /* The SPDIF out channels seem to be swapped, so we have
540 * to swap them here, too. The rear analog out channels
541 * will be wrong, but otherwise AC3 would not work.
542 */
9bcf6551 543 if (use_left) {
153abaa4
CL		 544 bank->eff3_gain =
545 bank->eff3_gain_end = vol_left;
1da177e4 546 }
9bcf6551 547 if (use_right) {
153abaa4
CL		 548 bank->eff2_gain =
549 bank->eff2_gain_end = vol_right;
1da177e4
LT		 550 }
551 }
552 }
553}
554
208a1b4c 555static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
1da177e4
LT		 556{
557 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
558 4096, &chip->ac3_tmp_base) < 0)
559 return -ENOMEM;
560
561 chip->bank_effect[3][0]->base =
562 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
563 chip->bank_effect[3][0]->loop_end =
564 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
565 chip->bank_effect[4][0]->base =
566 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
567 chip->bank_effect[4][0]->loop_end =
568 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
569
570 spin_lock_irq(&chip->reg_lock);
571 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
572 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
573 spin_unlock_irq(&chip->reg_lock);
574 return 0;
575}
576
208a1b4c 577static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
1da177e4
LT		 578{
579 spin_lock_irq(&chip->reg_lock);
580 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
581 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
582 spin_unlock_irq(&chip->reg_lock);
583 // snd_ymfpci_irq_wait(chip);
584 if (chip->ac3_tmp_base.area) {
585 snd_dma_free_pages(&chip->ac3_tmp_base);
586 chip->ac3_tmp_base.area = NULL;
587 }
588 return 0;
589}
590
208a1b4c
TI		 591static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
592 struct snd_pcm_hw_params *hw_params)
1da177e4 593{
208a1b4c
TI		 594 struct snd_pcm_runtime *runtime = substream->runtime;
595 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT		 596 int err;
597
598 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
599 return err;
600 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
601 return err;
602 return 0;
603}
604
208a1b4c 605static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
1da177e4 606{
208a1b4c
TI		 607 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
608 struct snd_pcm_runtime *runtime = substream->runtime;
609 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 610
611 if (runtime->private_data == NULL)
612 return 0;
613 ypcm = runtime->private_data;
614
615 /* wait, until the PCI operations are not finished */
616 snd_ymfpci_irq_wait(chip);
617 snd_pcm_lib_free_pages(substream);
618 if (ypcm->voices[1]) {
619 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
620 ypcm->voices[1] = NULL;
621 }
622 if (ypcm->voices[0]) {
623 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
624 ypcm->voices[0] = NULL;
625 }
626 return 0;
627}
628
208a1b4c 629static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 630{
208a1b4c
TI		 631 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
632 struct snd_pcm_runtime *runtime = substream->runtime;
633 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT		 634 unsigned int nvoice;
635
636 ypcm->period_size = runtime->period_size;
637 ypcm->buffer_size = runtime->buffer_size;
638 ypcm->period_pos = 0;
639 ypcm->last_pos = 0;
640 for (nvoice = 0; nvoice < runtime->channels; nvoice++)
9bcf6551
CL		 641 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
642 substream->pcm == chip->pcm);
1da177e4
LT		 643 return 0;
644}
645
208a1b4c
TI		 646static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
647 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 648{
649 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
650}
651
208a1b4c 652static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
1da177e4 653{
208a1b4c 654 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 655
656 /* wait, until the PCI operations are not finished */
657 snd_ymfpci_irq_wait(chip);
658 return snd_pcm_lib_free_pages(substream);
659}
660
208a1b4c 661static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 662{
208a1b4c
TI		 663 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
664 struct snd_pcm_runtime *runtime = substream->runtime;
665 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
666 struct snd_ymfpci_capture_bank * bank;
1da177e4
LT		 667 int nbank;
668 u32 rate, format;
669
670 ypcm->period_size = runtime->period_size;
671 ypcm->buffer_size = runtime->buffer_size;
672 ypcm->period_pos = 0;
673 ypcm->last_pos = 0;
674 ypcm->shift = 0;
675 rate = ((48000 * 4096) / runtime->rate) - 1;
676 format = 0;
677 if (runtime->channels == 2) {
678 format |= 2;
679 ypcm->shift++;
680 }
681 if (snd_pcm_format_width(runtime->format) == 8)
682 format |= 1;
683 else
684 ypcm->shift++;
685 switch (ypcm->capture_bank_number) {
686 case 0:
687 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
688 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
689 break;
690 case 1:
691 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
692 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
693 break;
694 }
695 for (nbank = 0; nbank < 2; nbank++) {
696 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
697 bank->base = cpu_to_le32(runtime->dma_addr);
698 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
699 bank->start = 0;
700 bank->num_of_loops = 0;
701 }
702 return 0;
703}
704
208a1b4c 705static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 706{
208a1b4c
TI		 707 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
708 struct snd_pcm_runtime *runtime = substream->runtime;
709 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
710 struct snd_ymfpci_voice *voice = ypcm->voices[0];
1da177e4
LT		 711
712 if (!(ypcm->running && voice))
713 return 0;
714 return le32_to_cpu(voice->bank[chip->active_bank].start);
715}
716
208a1b4c 717static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 718{
208a1b4c
TI		 719 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
720 struct snd_pcm_runtime *runtime = substream->runtime;
721 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT		 722
723 if (!ypcm->running)
724 return 0;
725 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
726}
727
208a1b4c 728static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
1da177e4
LT		 729{
730 wait_queue_t wait;
731 int loops = 4;
732
733 while (loops-- > 0) {
734 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
735 continue;
736 init_waitqueue_entry(&wait, current);
737 add_wait_queue(&chip->interrupt_sleep, &wait);
738 atomic_inc(&chip->interrupt_sleep_count);
8433a509 739 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
1da177e4
LT		 740 remove_wait_queue(&chip->interrupt_sleep, &wait);
741 }
742}
743
744static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id, struct pt_regs *regs)
745{
208a1b4c 746 struct snd_ymfpci *chip = dev_id;
1da177e4 747 u32 status, nvoice, mode;
208a1b4c 748 struct snd_ymfpci_voice *voice;
1da177e4
LT		 749
750 status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
751 if (status & 0x80000000) {
752 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
753 spin_lock(&chip->voice_lock);
754 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
755 voice = &chip->voices[nvoice];
756 if (voice->interrupt)
757 voice->interrupt(chip, voice);
758 }
759 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
760 if (chip->capture_substream[nvoice])
761 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
762 }
763#if 0
764 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
765 if (chip->effect_substream[nvoice])
766 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
767 }
768#endif
769 spin_unlock(&chip->voice_lock);
770 spin_lock(&chip->reg_lock);
771 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
772 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
773 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
774 spin_unlock(&chip->reg_lock);
775
776 if (atomic_read(&chip->interrupt_sleep_count)) {
777 atomic_set(&chip->interrupt_sleep_count, 0);
778 wake_up(&chip->interrupt_sleep);
779 }
780 }
781
782 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
783 if (status & 1) {
784 if (chip->timer)
785 snd_timer_interrupt(chip->timer, chip->timer->sticks);
786 }
787 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
788
789 if (chip->rawmidi)
790 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data, regs);
791 return IRQ_HANDLED;
792}
793
208a1b4c 794static struct snd_pcm_hardware snd_ymfpci_playback =
1da177e4
LT		 795{
796 .info = (SNDRV_PCM_INFO_MMAP |
797 SNDRV_PCM_INFO_MMAP_VALID |
798 SNDRV_PCM_INFO_INTERLEAVED |
799 SNDRV_PCM_INFO_BLOCK_TRANSFER |
800 SNDRV_PCM_INFO_PAUSE |
801 SNDRV_PCM_INFO_RESUME),
802 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
803 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
804 .rate_min = 8000,
805 .rate_max = 48000,
806 .channels_min = 1,
807 .channels_max = 2,
808 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
809 .period_bytes_min = 64,
810 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
811 .periods_min = 3,
812 .periods_max = 1024,
813 .fifo_size = 0,
814};
815
208a1b4c 816static struct snd_pcm_hardware snd_ymfpci_capture =
1da177e4
LT		 817{
818 .info = (SNDRV_PCM_INFO_MMAP |
819 SNDRV_PCM_INFO_MMAP_VALID |
820 SNDRV_PCM_INFO_INTERLEAVED |
821 SNDRV_PCM_INFO_BLOCK_TRANSFER |
822 SNDRV_PCM_INFO_PAUSE |
823 SNDRV_PCM_INFO_RESUME),
824 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
825 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
826 .rate_min = 8000,
827 .rate_max = 48000,
828 .channels_min = 1,
829 .channels_max = 2,
830 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
831 .period_bytes_min = 64,
832 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
833 .periods_min = 3,
834 .periods_max = 1024,
835 .fifo_size = 0,
836};
837
208a1b4c 838static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
1da177e4 839{
4d572776 840 kfree(runtime->private_data);
1da177e4
LT		 841}
842
208a1b4c 843static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
1da177e4 844{
208a1b4c
TI		 845 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
846 struct snd_pcm_runtime *runtime = substream->runtime;
847 struct snd_ymfpci_pcm *ypcm;
1da177e4 848
e560d8d8 849 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1da177e4
LT		 850 if (ypcm == NULL)
851 return -ENOMEM;
852 ypcm->chip = chip;
853 ypcm->type = PLAYBACK_VOICE;
854 ypcm->substream = substream;
855 runtime->hw = snd_ymfpci_playback;
856 runtime->private_data = ypcm;
857 runtime->private_free = snd_ymfpci_pcm_free_substream;
858 /* FIXME? True value is 256/48 = 5.33333 ms */
859 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
860 return 0;
861}
862
863/* call with spinlock held */
208a1b4c 864static void ymfpci_open_extension(struct snd_ymfpci *chip)
1da177e4
LT		 865{
866 if (! chip->rear_opened) {
867 if (! chip->spdif_opened) /* set AC3 */
868 snd_ymfpci_writel(chip, YDSXGR_MODE,
869 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
870 /* enable second codec (4CHEN) */
871 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
872 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
873 }
874}
875
876/* call with spinlock held */
208a1b4c 877static void ymfpci_close_extension(struct snd_ymfpci *chip)
1da177e4
LT		 878{
879 if (! chip->rear_opened) {
880 if (! chip->spdif_opened)
881 snd_ymfpci_writel(chip, YDSXGR_MODE,
882 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
883 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
884 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
885 }
886}
887
208a1b4c 888static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
1da177e4 889{
208a1b4c
TI		 890 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
891 struct snd_pcm_runtime *runtime = substream->runtime;
892 struct snd_ymfpci_pcm *ypcm;
893 struct snd_kcontrol *kctl;
1da177e4
LT		 894 int err;
895
896 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
897 return err;
898 ypcm = runtime->private_data;
899 ypcm->output_front = 1;
900 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
901 spin_lock_irq(&chip->reg_lock);
902 if (ypcm->output_rear) {
903 ymfpci_open_extension(chip);
904 chip->rear_opened++;
905 }
906 spin_unlock_irq(&chip->reg_lock);
9bcf6551
CL		 907
908 kctl = chip->pcm_mixer[substream->number].ctl;
909 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
910 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
1da177e4
LT		 911 return 0;
912}
913
208a1b4c 914static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
1da177e4 915{
208a1b4c
TI		 916 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
917 struct snd_pcm_runtime *runtime = substream->runtime;
918 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 919 int err;
920
921 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
922 return err;
923 ypcm = runtime->private_data;
924 ypcm->output_front = 0;
925 ypcm->output_rear = 1;
926 spin_lock_irq(&chip->reg_lock);
927 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
928 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
929 ymfpci_open_extension(chip);
930 chip->spdif_pcm_bits = chip->spdif_bits;
931 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
932 chip->spdif_opened++;
933 spin_unlock_irq(&chip->reg_lock);
934
935 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
936 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
937 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
938 return 0;
939}
940
208a1b4c 941static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
1da177e4 942{
208a1b4c
TI		 943 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
944 struct snd_pcm_runtime *runtime = substream->runtime;
945 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 946 int err;
947
948 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
949 return err;
950 ypcm = runtime->private_data;
951 ypcm->output_front = 0;
952 ypcm->output_rear = 1;
953 spin_lock_irq(&chip->reg_lock);
954 ymfpci_open_extension(chip);
955 chip->rear_opened++;
956 spin_unlock_irq(&chip->reg_lock);
957 return 0;
958}
959
208a1b4c 960static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
1da177e4
LT		 961 u32 capture_bank_number)
962{
208a1b4c
TI		 963 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
964 struct snd_pcm_runtime *runtime = substream->runtime;
965 struct snd_ymfpci_pcm *ypcm;
1da177e4 966
e560d8d8 967 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1da177e4
LT		 968 if (ypcm == NULL)
969 return -ENOMEM;
970 ypcm->chip = chip;
971 ypcm->type = capture_bank_number + CAPTURE_REC;
972 ypcm->substream = substream;
973 ypcm->capture_bank_number = capture_bank_number;
974 chip->capture_substream[capture_bank_number] = substream;
975 runtime->hw = snd_ymfpci_capture;
976 /* FIXME? True value is 256/48 = 5.33333 ms */
977 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
978 runtime->private_data = ypcm;
979 runtime->private_free = snd_ymfpci_pcm_free_substream;
980 snd_ymfpci_hw_start(chip);
981 return 0;
982}
983
208a1b4c 984static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
1da177e4
LT		 985{
986 return snd_ymfpci_capture_open(substream, 0);
987}
988
208a1b4c 989static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
1da177e4
LT		 990{
991 return snd_ymfpci_capture_open(substream, 1);
992}
993
208a1b4c 994static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
1da177e4
LT		 995{
996 return 0;
997}
998
208a1b4c 999static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
1da177e4 1000{
208a1b4c
TI		 1001 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1002 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1003 struct snd_kcontrol *kctl;
1da177e4
LT		 1004
1005 spin_lock_irq(&chip->reg_lock);
1006 if (ypcm->output_rear && chip->rear_opened > 0) {
1007 chip->rear_opened--;
1008 ymfpci_close_extension(chip);
1009 }
1010 spin_unlock_irq(&chip->reg_lock);
9bcf6551
CL		 1011 kctl = chip->pcm_mixer[substream->number].ctl;
1012 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1013 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
1da177e4
LT		 1014 return snd_ymfpci_playback_close_1(substream);
1015}
1016
208a1b4c 1017static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1018{
208a1b4c 1019 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 1020
1021 spin_lock_irq(&chip->reg_lock);
1022 chip->spdif_opened = 0;
1023 ymfpci_close_extension(chip);
1024 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1025 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1026 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1027 spin_unlock_irq(&chip->reg_lock);
1028 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1029 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1030 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1031 return snd_ymfpci_playback_close_1(substream);
1032}
1033
208a1b4c 1034static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
1da177e4 1035{
208a1b4c 1036 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 1037
1038 spin_lock_irq(&chip->reg_lock);
1039 if (chip->rear_opened > 0) {
1040 chip->rear_opened--;
1041 ymfpci_close_extension(chip);
1042 }
1043 spin_unlock_irq(&chip->reg_lock);
1044 return snd_ymfpci_playback_close_1(substream);
1045}
1046
208a1b4c 1047static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
1da177e4 1048{
208a1b4c
TI		 1049 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1050 struct snd_pcm_runtime *runtime = substream->runtime;
1051 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT		 1052
1053 if (ypcm != NULL) {
1054 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1055 snd_ymfpci_hw_stop(chip);
1056 }
1057 return 0;
1058}
1059
208a1b4c 1060static struct snd_pcm_ops snd_ymfpci_playback_ops = {
1da177e4
LT		 1061 .open = snd_ymfpci_playback_open,
1062 .close = snd_ymfpci_playback_close,
1063 .ioctl = snd_pcm_lib_ioctl,
1064 .hw_params = snd_ymfpci_playback_hw_params,
1065 .hw_free = snd_ymfpci_playback_hw_free,
1066 .prepare = snd_ymfpci_playback_prepare,
1067 .trigger = snd_ymfpci_playback_trigger,
1068 .pointer = snd_ymfpci_playback_pointer,
1069};
1070
208a1b4c 1071static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
1da177e4
LT		 1072 .open = snd_ymfpci_capture_rec_open,
1073 .close = snd_ymfpci_capture_close,
1074 .ioctl = snd_pcm_lib_ioctl,
1075 .hw_params = snd_ymfpci_capture_hw_params,
1076 .hw_free = snd_ymfpci_capture_hw_free,
1077 .prepare = snd_ymfpci_capture_prepare,
1078 .trigger = snd_ymfpci_capture_trigger,
1079 .pointer = snd_ymfpci_capture_pointer,
1080};
1081
208a1b4c 1082int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1083{
208a1b4c 1084 struct snd_pcm *pcm;
1da177e4
LT		 1085 int err;
1086
1087 if (rpcm)
1088 *rpcm = NULL;
1089 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1090 return err;
1091 pcm->private_data = chip;
1da177e4
LT		 1092
1093 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1094 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1095
1096 /* global setup */
1097 pcm->info_flags = 0;
1098 strcpy(pcm->name, "YMFPCI");
1099 chip->pcm = pcm;
1100
1101 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1102 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1103
1104 if (rpcm)
1105 *rpcm = pcm;
1106 return 0;
1107}
1108
208a1b4c 1109static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
1da177e4
LT		 1110 .open = snd_ymfpci_capture_ac97_open,
1111 .close = snd_ymfpci_capture_close,
1112 .ioctl = snd_pcm_lib_ioctl,
1113 .hw_params = snd_ymfpci_capture_hw_params,
1114 .hw_free = snd_ymfpci_capture_hw_free,
1115 .prepare = snd_ymfpci_capture_prepare,
1116 .trigger = snd_ymfpci_capture_trigger,
1117 .pointer = snd_ymfpci_capture_pointer,
1118};
1119
208a1b4c 1120int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1121{
208a1b4c 1122 struct snd_pcm *pcm;
1da177e4
LT		 1123 int err;
1124
1125 if (rpcm)
1126 *rpcm = NULL;
1127 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1128 return err;
1129 pcm->private_data = chip;
1da177e4
LT		 1130
1131 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1132
1133 /* global setup */
1134 pcm->info_flags = 0;
1135 sprintf(pcm->name, "YMFPCI - %s",
1136 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1137 chip->pcm2 = pcm;
1138
1139 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1140 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1141
1142 if (rpcm)
1143 *rpcm = pcm;
1144 return 0;
1145}
1146
208a1b4c 1147static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
1da177e4
LT		 1148 .open = snd_ymfpci_playback_spdif_open,
1149 .close = snd_ymfpci_playback_spdif_close,
1150 .ioctl = snd_pcm_lib_ioctl,
1151 .hw_params = snd_ymfpci_playback_hw_params,
1152 .hw_free = snd_ymfpci_playback_hw_free,
1153 .prepare = snd_ymfpci_playback_prepare,
1154 .trigger = snd_ymfpci_playback_trigger,
1155 .pointer = snd_ymfpci_playback_pointer,
1156};
1157
208a1b4c 1158int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1159{
208a1b4c 1160 struct snd_pcm *pcm;
1da177e4
LT		 1161 int err;
1162
1163 if (rpcm)
1164 *rpcm = NULL;
1165 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1166 return err;
1167 pcm->private_data = chip;
1da177e4
LT		 1168
1169 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1170
1171 /* global setup */
1172 pcm->info_flags = 0;
1173 strcpy(pcm->name, "YMFPCI - IEC958");
1174 chip->pcm_spdif = pcm;
1175
1176 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1177 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1178
1179 if (rpcm)
1180 *rpcm = pcm;
1181 return 0;
1182}
1183
208a1b4c 1184static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
1da177e4
LT		 1185 .open = snd_ymfpci_playback_4ch_open,
1186 .close = snd_ymfpci_playback_4ch_close,
1187 .ioctl = snd_pcm_lib_ioctl,
1188 .hw_params = snd_ymfpci_playback_hw_params,
1189 .hw_free = snd_ymfpci_playback_hw_free,
1190 .prepare = snd_ymfpci_playback_prepare,
1191 .trigger = snd_ymfpci_playback_trigger,
1192 .pointer = snd_ymfpci_playback_pointer,
1193};
1194
208a1b4c 1195int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1196{
208a1b4c 1197 struct snd_pcm *pcm;
1da177e4
LT		 1198 int err;
1199
1200 if (rpcm)
1201 *rpcm = NULL;
1202 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1203 return err;
1204 pcm->private_data = chip;
1da177e4
LT		 1205
1206 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1207
1208 /* global setup */
1209 pcm->info_flags = 0;
1210 strcpy(pcm->name, "YMFPCI - Rear PCM");
1211 chip->pcm_4ch = pcm;
1212
1213 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1214 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1215
1216 if (rpcm)
1217 *rpcm = pcm;
1218 return 0;
1219}
1220
208a1b4c 1221static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1222{
1223 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1224 uinfo->count = 1;
1225 return 0;
1226}
1227
208a1b4c
TI		 1228static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
1229 struct snd_ctl_elem_value *ucontrol)
1da177e4 1230{
208a1b4c 1231 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1232
1233 spin_lock_irq(&chip->reg_lock);
1234 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1235 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
fc80a202 1236 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1da177e4
LT		 1237 spin_unlock_irq(&chip->reg_lock);
1238 return 0;
1239}
1240
208a1b4c
TI		 1241static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
1242 struct snd_ctl_elem_value *ucontrol)
1da177e4 1243{
208a1b4c 1244 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1245 unsigned int val;
1246 int change;
1247
1248 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1249 (ucontrol->value.iec958.status[1] << 8);
1250 spin_lock_irq(&chip->reg_lock);
1251 change = chip->spdif_bits != val;
1252 chip->spdif_bits = val;
1253 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1254 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1255 spin_unlock_irq(&chip->reg_lock);
1256 return change;
1257}
1258
208a1b4c 1259static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata =
1da177e4
LT		 1260{
1261 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1262 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1263 .info = snd_ymfpci_spdif_default_info,
1264 .get = snd_ymfpci_spdif_default_get,
1265 .put = snd_ymfpci_spdif_default_put
1266};
1267
208a1b4c 1268static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1269{
1270 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1271 uinfo->count = 1;
1272 return 0;
1273}
1274
208a1b4c
TI		 1275static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
1276 struct snd_ctl_elem_value *ucontrol)
1da177e4 1277{
208a1b4c 1278 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1279
1280 spin_lock_irq(&chip->reg_lock);
1281 ucontrol->value.iec958.status[0] = 0x3e;
1282 ucontrol->value.iec958.status[1] = 0xff;
1283 spin_unlock_irq(&chip->reg_lock);
1284 return 0;
1285}
1286
208a1b4c 1287static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata =
1da177e4
LT		 1288{
1289 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1290 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1291 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1292 .info = snd_ymfpci_spdif_mask_info,
1293 .get = snd_ymfpci_spdif_mask_get,
1294};
1295
208a1b4c 1296static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1297{
1298 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1299 uinfo->count = 1;
1300 return 0;
1301}
1302
208a1b4c
TI		 1303static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
1304 struct snd_ctl_elem_value *ucontrol)
1da177e4 1305{
208a1b4c 1306 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1307
1308 spin_lock_irq(&chip->reg_lock);
1309 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1310 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
fc80a202 1311 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1da177e4
LT		 1312 spin_unlock_irq(&chip->reg_lock);
1313 return 0;
1314}
1315
208a1b4c
TI		 1316static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
1317 struct snd_ctl_elem_value *ucontrol)
1da177e4 1318{
208a1b4c 1319 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1320 unsigned int val;
1321 int change;
1322
1323 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1324 (ucontrol->value.iec958.status[1] << 8);
1325 spin_lock_irq(&chip->reg_lock);
1326 change = chip->spdif_pcm_bits != val;
1327 chip->spdif_pcm_bits = val;
1328 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1329 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1330 spin_unlock_irq(&chip->reg_lock);
1331 return change;
1332}
1333
208a1b4c 1334static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata =
1da177e4
LT		 1335{
1336 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1337 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1338 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1339 .info = snd_ymfpci_spdif_stream_info,
1340 .get = snd_ymfpci_spdif_stream_get,
1341 .put = snd_ymfpci_spdif_stream_put
1342};
1343
208a1b4c 1344static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
1da177e4
LT		 1345{
1346 static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
1347
1348 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1349 info->count = 1;
1350 info->value.enumerated.items = 3;
1351 if (info->value.enumerated.item > 2)
1352 info->value.enumerated.item = 2;
1353 strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
1354 return 0;
1355}
1356
208a1b4c 1357static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1da177e4 1358{
208a1b4c 1359 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1360 u16 reg;
1361
1362 spin_lock_irq(&chip->reg_lock);
1363 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1364 spin_unlock_irq(&chip->reg_lock);
1365 if (!(reg & 0x100))
1366 value->value.enumerated.item[0] = 0;
1367 else
1368 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1369 return 0;
1370}
1371
208a1b4c 1372static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1da177e4 1373{
208a1b4c 1374 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1375 u16 reg, old_reg;
1376
1377 spin_lock_irq(&chip->reg_lock);
1378 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1379 if (value->value.enumerated.item[0] == 0)
1380 reg = old_reg & ~0x100;
1381 else
1382 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1383 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1384 spin_unlock_irq(&chip->reg_lock);
1385 return reg != old_reg;
1386}
1387
208a1b4c 1388static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = {
1da177e4
LT		 1389 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1390 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1391 .name = "Direct Recording Source",
1392 .info = snd_ymfpci_drec_source_info,
1393 .get = snd_ymfpci_drec_source_get,
1394 .put = snd_ymfpci_drec_source_put
1395};
1396
1397/*
1398 * Mixer controls
1399 */
1400
d602c885 1401#define YMFPCI_SINGLE(xname, xindex, reg, shift) \
1da177e4
LT		 1402{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1403 .info = snd_ymfpci_info_single, \
1404 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
d602c885 1405 .private_value = ((reg) | ((shift) << 16)) }
1da177e4 1406
208a1b4c
TI		 1407static int snd_ymfpci_info_single(struct snd_kcontrol *kcontrol,
1408 struct snd_ctl_elem_info *uinfo)
1da177e4 1409{
d602c885
GM		 1410 int reg = kcontrol->private_value & 0xffff;
1411
1412 switch (reg) {
1da177e4
LT		 1413 case YDSXGR_SPDIFOUTCTRL: break;
1414 case YDSXGR_SPDIFINCTRL: break;
1415 default: return -EINVAL;
1416 }
467a8c2f 1417 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1da177e4
LT		 1418 uinfo->count = 1;
1419 uinfo->value.integer.min = 0;
467a8c2f 1420 uinfo->value.integer.max = 1;
1da177e4
LT		 1421 return 0;
1422}
1423
208a1b4c
TI		 1424static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
1425 struct snd_ctl_elem_value *ucontrol)
1da177e4 1426{
208a1b4c 1427 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
d602c885
GM		 1428 int reg = kcontrol->private_value & 0xffff;
1429 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1430 unsigned int mask = 1;
1da177e4 1431
d602c885 1432 switch (reg) {
1da177e4
LT		 1433 case YDSXGR_SPDIFOUTCTRL: break;
1434 case YDSXGR_SPDIFINCTRL: break;
1435 default: return -EINVAL;
1436 }
d602c885
GM		 1437 ucontrol->value.integer.value[0] =
1438 (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1da177e4
LT		 1439 return 0;
1440}
1441
208a1b4c
TI		 1442static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
1443 struct snd_ctl_elem_value *ucontrol)
1da177e4 1444{
208a1b4c 1445 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
d602c885
GM		 1446 int reg = kcontrol->private_value & 0xffff;
1447 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1448 unsigned int mask = 1;
1da177e4
LT		 1449 int change;
1450 unsigned int val, oval;
1451
d602c885 1452 switch (reg) {
1da177e4
LT		 1453 case YDSXGR_SPDIFOUTCTRL: break;
1454 case YDSXGR_SPDIFINCTRL: break;
1455 default: return -EINVAL;
1456 }
1457 val = (ucontrol->value.integer.value[0] & mask);
1da177e4
LT		 1458 val <<= shift;
1459 spin_lock_irq(&chip->reg_lock);
1460 oval = snd_ymfpci_readl(chip, reg);
1461 val = (oval & ~(mask << shift)) | val;
1462 change = val != oval;
1463 snd_ymfpci_writel(chip, reg, val);
1464 spin_unlock_irq(&chip->reg_lock);
1465 return change;
1466}
1467
1468#define YMFPCI_DOUBLE(xname, xindex, reg) \
1469{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1470 .info = snd_ymfpci_info_double, \
1471 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
1472 .private_value = reg }
1473
208a1b4c 1474static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1475{
1476 unsigned int reg = kcontrol->private_value;
1da177e4
LT		 1477
1478 if (reg < 0x80 || reg >= 0xc0)
1479 return -EINVAL;
467a8c2f 1480 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1da177e4
LT		 1481 uinfo->count = 2;
1482 uinfo->value.integer.min = 0;
467a8c2f 1483 uinfo->value.integer.max = 16383;
1da177e4
LT		 1484 return 0;
1485}
1486
208a1b4c 1487static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1488{
208a1b4c 1489 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4 1490 unsigned int reg = kcontrol->private_value;
467a8c2f 1491 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1da177e4
LT		 1492 unsigned int val;
1493
1494 if (reg < 0x80 || reg >= 0xc0)
1495 return -EINVAL;
1496 spin_lock_irq(&chip->reg_lock);
1497 val = snd_ymfpci_readl(chip, reg);
1498 spin_unlock_irq(&chip->reg_lock);
1499 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1500 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1da177e4
LT		 1501 return 0;
1502}
1503
208a1b4c 1504static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1505{
208a1b4c 1506 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4 1507 unsigned int reg = kcontrol->private_value;
467a8c2f 1508 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1da177e4
LT		 1509 int change;
1510 unsigned int val1, val2, oval;
1511
1512 if (reg < 0x80 || reg >= 0xc0)
1513 return -EINVAL;
1514 val1 = ucontrol->value.integer.value[0] & mask;
1515 val2 = ucontrol->value.integer.value[1] & mask;
1da177e4
LT		 1516 val1 <<= shift_left;
1517 val2 <<= shift_right;
1518 spin_lock_irq(&chip->reg_lock);
1519 oval = snd_ymfpci_readl(chip, reg);
1520 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1521 change = val1 != oval;
1522 snd_ymfpci_writel(chip, reg, val1);
1523 spin_unlock_irq(&chip->reg_lock);
1524 return change;
1525}
1526
1527/*
1528 * 4ch duplication
1529 */
208a1b4c 1530static int snd_ymfpci_info_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1531{
1532 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1533 uinfo->count = 1;
1534 uinfo->value.integer.min = 0;
1535 uinfo->value.integer.max = 1;
1536 return 0;
1537}
1538
208a1b4c 1539static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1540{
208a1b4c 1541 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1542 ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1543 return 0;
1544}
1545
208a1b4c 1546static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1547{
208a1b4c 1548 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1549 int change;
1550 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1551 if (change)
1552 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1553 return change;
1554}
1555
1556
208a1b4c 1557static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = {
1da177e4
LT		 1558YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL),
1559YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1560YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1561YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1562YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1563YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1564YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1565YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1566YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
1567YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1568YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1569YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1570YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
d602c885
GM		 1571YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
1572YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
1573YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
1da177e4
LT		 1574{
1575 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1576 .name = "4ch Duplication",
1577 .info = snd_ymfpci_info_dup4ch,
1578 .get = snd_ymfpci_get_dup4ch,
1579 .put = snd_ymfpci_put_dup4ch,
1580},
1581};
1582
1583
1584/*
1585 * GPIO
1586 */
1587
208a1b4c 1588static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
1da177e4
LT		 1589{
1590 u16 reg, mode;
1591 unsigned long flags;
1592
1593 spin_lock_irqsave(&chip->reg_lock, flags);
1594 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1595 reg &= ~(1 << (pin + 8));
1596 reg |= (1 << pin);
1597 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1598 /* set the level mode for input line */
1599 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1600 mode &= ~(3 << (pin * 2));
1601 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1602 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1603 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1604 spin_unlock_irqrestore(&chip->reg_lock, flags);
1605 return (mode >> pin) & 1;
1606}
1607
208a1b4c 1608static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
1da177e4
LT		 1609{
1610 u16 reg;
1611 unsigned long flags;
1612
1613 spin_lock_irqsave(&chip->reg_lock, flags);
1614 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1615 reg &= ~(1 << pin);
1616 reg &= ~(1 << (pin + 8));
1617 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1618 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1619 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1620 spin_unlock_irqrestore(&chip->reg_lock, flags);
1621
1622 return 0;
1623}
1624
208a1b4c 1625static int snd_ymfpci_gpio_sw_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1626{
1627 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1628 uinfo->count = 1;
1629 uinfo->value.integer.min = 0;
1630 uinfo->value.integer.max = 1;
1631 return 0;
1632}
1633
208a1b4c 1634static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1635{
208a1b4c 1636 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1637 int pin = (int)kcontrol->private_value;
1638 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1639 return 0;
1640}
1641
208a1b4c 1642static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1643{
208a1b4c 1644 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1645 int pin = (int)kcontrol->private_value;
1646
1647 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1648 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1649 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1650 return 1;
1651 }
1652 return 0;
1653}
1654
208a1b4c 1655static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = {
1da177e4
LT		 1656 .name = "Shared Rear/Line-In Switch",
1657 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1658 .info = snd_ymfpci_gpio_sw_info,
1659 .get = snd_ymfpci_gpio_sw_get,
1660 .put = snd_ymfpci_gpio_sw_put,
1661 .private_value = 2,
1662};
1663
9bcf6551
CL		 1664/*
1665 * PCM voice volume
1666 */
1667
208a1b4c
TI		 1668static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
1669 struct snd_ctl_elem_info *uinfo)
9bcf6551
CL		 1670{
1671 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1672 uinfo->count = 2;
1673 uinfo->value.integer.min = 0;
1674 uinfo->value.integer.max = 0x8000;
1675 return 0;
1676}
1677
208a1b4c
TI		 1678static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
1679 struct snd_ctl_elem_value *ucontrol)
9bcf6551 1680{
208a1b4c 1681 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
9bcf6551
CL		 1682 unsigned int subs = kcontrol->id.subdevice;
1683
1684 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
1685 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
1686 return 0;
1687}
1688
208a1b4c
TI		 1689static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
1690 struct snd_ctl_elem_value *ucontrol)
9bcf6551 1691{
208a1b4c 1692 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
9bcf6551 1693 unsigned int subs = kcontrol->id.subdevice;
208a1b4c 1694 struct snd_pcm_substream *substream;
9bcf6551
CL		 1695 unsigned long flags;
1696
1697 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
1698 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
1699 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
1700 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
1701
208a1b4c 1702 substream = (struct snd_pcm_substream *)kcontrol->private_value;
9bcf6551
CL		 1703 spin_lock_irqsave(&chip->voice_lock, flags);
1704 if (substream->runtime && substream->runtime->private_data) {
208a1b4c 1705 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
9bcf6551
CL		 1706 ypcm->update_pcm_vol = 2;
1707 }
1708 spin_unlock_irqrestore(&chip->voice_lock, flags);
1709 return 1;
1710 }
1711 return 0;
1712}
1713
208a1b4c 1714static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = {
9bcf6551
CL		 1715 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1716 .name = "PCM Playback Volume",
1717 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1718 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1719 .info = snd_ymfpci_pcm_vol_info,
1720 .get = snd_ymfpci_pcm_vol_get,
1721 .put = snd_ymfpci_pcm_vol_put,
1722};
1723
1da177e4
LT		 1724
1725/*
1726 * Mixer routines
1727 */
1728
208a1b4c 1729static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1730{
208a1b4c 1731 struct snd_ymfpci *chip = bus->private_data;
1da177e4
LT		 1732 chip->ac97_bus = NULL;
1733}
1734
208a1b4c 1735static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1736{
208a1b4c 1737 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT		 1738 chip->ac97 = NULL;
1739}
1740
208a1b4c 1741int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
1da177e4 1742{
208a1b4c
TI		 1743 struct snd_ac97_template ac97;
1744 struct snd_kcontrol *kctl;
1745 struct snd_pcm_substream *substream;
1da177e4
LT		 1746 unsigned int idx;
1747 int err;
208a1b4c 1748 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1749 .write = snd_ymfpci_codec_write,
1750 .read = snd_ymfpci_codec_read,
1751 };
1752
1753 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1754 return err;
1755 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1756 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1757
1758 memset(&ac97, 0, sizeof(ac97));
1759 ac97.private_data = chip;
1760 ac97.private_free = snd_ymfpci_mixer_free_ac97;
1761 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1762 return err;
1763
1764 /* to be sure */
1765 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1766 AC97_EA_VRA|AC97_EA_VRM, 0);
1767
1768 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1769 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1770 return err;
1771 }
1772
1773 /* add S/PDIF control */
1774 snd_assert(chip->pcm_spdif != NULL, return -EIO);
1775 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1776 return err;
1777 kctl->id.device = chip->pcm_spdif->device;
1778 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1779 return err;
1780 kctl->id.device = chip->pcm_spdif->device;
1781 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1782 return err;
1783 kctl->id.device = chip->pcm_spdif->device;
1784 chip->spdif_pcm_ctl = kctl;
1785
1786 /* direct recording source */
1787 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1788 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1789 return err;
1790
1791 /*
1792 * shared rear/line-in
1793 */
1794 if (rear_switch) {
1795 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1796 return err;
1797 }
1798
9bcf6551
CL		 1799 /* per-voice volume */
1800 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1801 for (idx = 0; idx < 32; ++idx) {
1802 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
1803 if (!kctl)
1804 return -ENOMEM;
1805 kctl->id.device = chip->pcm->device;
1806 kctl->id.subdevice = idx;
1807 kctl->private_value = (unsigned long)substream;
1808 if ((err = snd_ctl_add(chip->card, kctl)) < 0)
1809 return err;
1810 chip->pcm_mixer[idx].left = 0x8000;
1811 chip->pcm_mixer[idx].right = 0x8000;
1812 chip->pcm_mixer[idx].ctl = kctl;
1813 substream = substream->next;
1814 }
1815
1da177e4
LT		 1816 return 0;
1817}
1818
1819
1820/*
1821 * timer
1822 */
1823
208a1b4c 1824static int snd_ymfpci_timer_start(struct snd_timer *timer)
1da177e4 1825{
208a1b4c 1826 struct snd_ymfpci *chip;
1da177e4
LT		 1827 unsigned long flags;
1828 unsigned int count;
1829
1830 chip = snd_timer_chip(timer);
d44c39ac 1831 count = (timer->sticks << 1) - 1;
1da177e4
LT		 1832 spin_lock_irqsave(&chip->reg_lock, flags);
1833 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1834 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1835 spin_unlock_irqrestore(&chip->reg_lock, flags);
1836 return 0;
1837}
1838
208a1b4c 1839static int snd_ymfpci_timer_stop(struct snd_timer *timer)
1da177e4 1840{
208a1b4c 1841 struct snd_ymfpci *chip;
1da177e4
LT		 1842 unsigned long flags;
1843
1844 chip = snd_timer_chip(timer);
1845 spin_lock_irqsave(&chip->reg_lock, flags);
1846 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1847 spin_unlock_irqrestore(&chip->reg_lock, flags);
1848 return 0;
1849}
1850
208a1b4c 1851static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
1da177e4
LT		 1852 unsigned long *num, unsigned long *den)
1853{
1854 *num = 1;
d44c39ac 1855 *den = 48000;
1da177e4
LT		 1856 return 0;
1857}
1858
208a1b4c 1859static struct snd_timer_hardware snd_ymfpci_timer_hw = {
1da177e4 1860 .flags = SNDRV_TIMER_HW_AUTO,
d44c39ac
CL		 1861 .resolution = 20833, /* 1/fs = 20.8333...us */
1862 .ticks = 0x8000,
1da177e4
LT		 1863 .start = snd_ymfpci_timer_start,
1864 .stop = snd_ymfpci_timer_stop,
1865 .precise_resolution = snd_ymfpci_timer_precise_resolution,
1866};
1867
208a1b4c 1868int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
1da177e4 1869{
208a1b4c
TI		 1870 struct snd_timer *timer = NULL;
1871 struct snd_timer_id tid;
1da177e4
LT		 1872 int err;
1873
1874 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1875 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1876 tid.card = chip->card->number;
1877 tid.device = device;
1878 tid.subdevice = 0;
1879 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1880 strcpy(timer->name, "YMFPCI timer");
1881 timer->private_data = chip;
1882 timer->hw = snd_ymfpci_timer_hw;
1883 }
1884 chip->timer = timer;
1885 return err;
1886}
1887
1888
1889/*
1890 * proc interface
1891 */
1892
208a1b4c
TI		 1893static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
1894 struct snd_info_buffer *buffer)
1da177e4 1895{
208a1b4c 1896 struct snd_ymfpci *chip = entry->private_data;
1da177e4
LT		 1897 int i;
1898
1899 snd_iprintf(buffer, "YMFPCI\n\n");
1900 for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1901 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1902}
1903
208a1b4c 1904static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
1da177e4 1905{
208a1b4c 1906 struct snd_info_entry *entry;
1da177e4
LT		 1907
1908 if (! snd_card_proc_new(card, "ymfpci", &entry))
1909 snd_info_set_text_ops(entry, chip, 1024, snd_ymfpci_proc_read);
1910 return 0;
1911}
1912
1913/*
1914 * initialization routines
1915 */
1916
1917static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
1918{
1919 u8 cmd;
1920
1921 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
1922#if 0 // force to reset
1923 if (cmd & 0x03) {
1924#endif
1925 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1926 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
1927 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1928 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
1929 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
1930#if 0
1931 }
1932#endif
1933}
1934
208a1b4c 1935static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
1da177e4
LT		 1936{
1937 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
1938}
1939
208a1b4c 1940static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
1da177e4
LT		 1941{
1942 u32 val;
1943 int timeout = 1000;
1944
1945 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
1946 if (val)
1947 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
1948 while (timeout-- > 0) {
1949 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
1950 if ((val & 0x00000002) == 0)
1951 break;
1952 }
1953}
1954
1955#include "ymfpci_image.h"
1956
208a1b4c 1957static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
1da177e4
LT		 1958{
1959 int i;
1960 u16 ctrl;
1961 unsigned long *inst;
1962
1963 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
1964 snd_ymfpci_disable_dsp(chip);
1965 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
1966 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
1967 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
1968 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
1969 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
1970 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
1971 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
1972 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1973 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
1974
1975 /* setup DSP instruction code */
1976 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
1977 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), DspInst[i]);
1978
1979 /* setup control instruction code */
1980 switch (chip->device_id) {
1981 case PCI_DEVICE_ID_YAMAHA_724F:
1982 case PCI_DEVICE_ID_YAMAHA_740C:
1983 case PCI_DEVICE_ID_YAMAHA_744:
1984 case PCI_DEVICE_ID_YAMAHA_754:
1985 inst = CntrlInst1E;
1986 break;
1987 default:
1988 inst = CntrlInst;
1989 break;
1990 }
1991 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
1992 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]);
1993
1994 snd_ymfpci_enable_dsp(chip);
1995}
1996
208a1b4c 1997static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip)
1da177e4
LT		 1998{
1999 long size, playback_ctrl_size;
2000 int voice, bank, reg;
2001 u8 *ptr;
2002 dma_addr_t ptr_addr;
2003
2004 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
2005 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
2006 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
2007 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
2008 chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
2009
2010 size = ((playback_ctrl_size + 0x00ff) & ~0x00ff) +
2011 ((chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES + 0x00ff) & ~0x00ff) +
2012 ((chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES + 0x00ff) & ~0x00ff) +
2013 ((chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES + 0x00ff) & ~0x00ff) +
2014 chip->work_size;
2015 /* work_ptr must be aligned to 256 bytes, but it's already
2016 covered with the kernel page allocation mechanism */
2017 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
2018 size, &chip->work_ptr) < 0)
2019 return -ENOMEM;
2020 ptr = chip->work_ptr.area;
2021 ptr_addr = chip->work_ptr.addr;
2022 memset(ptr, 0, size); /* for sure */
2023
2024 chip->bank_base_playback = ptr;
2025 chip->bank_base_playback_addr = ptr_addr;
2026 chip->ctrl_playback = (u32 *)ptr;
2027 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
2028 ptr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
2029 ptr_addr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
2030 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
2031 chip->voices[voice].number = voice;
208a1b4c 2032 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
1da177e4
LT		 2033 chip->voices[voice].bank_addr = ptr_addr;
2034 for (bank = 0; bank < 2; bank++) {
208a1b4c 2035 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
1da177e4
LT		 2036 ptr += chip->bank_size_playback;
2037 ptr_addr += chip->bank_size_playback;
2038 }
2039 }
2040 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2041 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2042 chip->bank_base_capture = ptr;
2043 chip->bank_base_capture_addr = ptr_addr;
2044 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2045 for (bank = 0; bank < 2; bank++) {
208a1b4c 2046 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
1da177e4
LT		 2047 ptr += chip->bank_size_capture;
2048 ptr_addr += chip->bank_size_capture;
2049 }
2050 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2051 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2052 chip->bank_base_effect = ptr;
2053 chip->bank_base_effect_addr = ptr_addr;
2054 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2055 for (bank = 0; bank < 2; bank++) {
208a1b4c 2056 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
1da177e4
LT		 2057 ptr += chip->bank_size_effect;
2058 ptr_addr += chip->bank_size_effect;
2059 }
2060 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2061 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2062 chip->work_base = ptr;
2063 chip->work_base_addr = ptr_addr;
2064
2065 snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, );
2066
2067 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2068 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2069 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2070 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2071 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2072
2073 /* S/PDIF output initialization */
2074 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2075 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2076 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2077
2078 /* S/PDIF input initialization */
2079 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2080
2081 /* digital mixer setup */
2082 for (reg = 0x80; reg < 0xc0; reg += 4)
2083 snd_ymfpci_writel(chip, reg, 0);
2084 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2085 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2086 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2087 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2088 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2089 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2090 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2091
2092 return 0;
2093}
2094
208a1b4c 2095static int snd_ymfpci_free(struct snd_ymfpci *chip)
1da177e4
LT		 2096{
2097 u16 ctrl;
2098
2099 snd_assert(chip != NULL, return -EINVAL);
2100
2101 if (chip->res_reg_area) { /* don't touch busy hardware */
2102 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2103 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2104 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2105 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2106 snd_ymfpci_disable_dsp(chip);
2107 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2108 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2109 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2110 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2111 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2112 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2113 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2114 }
2115
2116 snd_ymfpci_ac3_done(chip);
2117
2118 /* Set PCI device to D3 state */
2119#if 0
2120 /* FIXME: temporarily disabled, otherwise we cannot fire up
2121 * the chip again unless reboot. ACPI bug?
2122 */
2123 pci_set_power_state(chip->pci, 3);
2124#endif
2125
2126#ifdef CONFIG_PM
2127 vfree(chip->saved_regs);
2128#endif
b1d5776d
TI		 2129 release_and_free_resource(chip->mpu_res);
2130 release_and_free_resource(chip->fm_res);
1da177e4
LT		 2131 snd_ymfpci_free_gameport(chip);
2132 if (chip->reg_area_virt)
2133 iounmap(chip->reg_area_virt);
2134 if (chip->work_ptr.area)
2135 snd_dma_free_pages(&chip->work_ptr);
2136
2137 if (chip->irq >= 0)
2138 free_irq(chip->irq, (void *)chip);
b1d5776d 2139 release_and_free_resource(chip->res_reg_area);
1da177e4
LT		 2140
2141 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2142
2143 pci_disable_device(chip->pci);
2144 kfree(chip);
2145 return 0;
2146}
2147
208a1b4c 2148static int snd_ymfpci_dev_free(struct snd_device *device)
1da177e4 2149{
208a1b4c 2150 struct snd_ymfpci *chip = device->device_data;
1da177e4
LT		 2151 return snd_ymfpci_free(chip);
2152}
2153
2154#ifdef CONFIG_PM
2155static int saved_regs_index[] = {
2156 /* spdif */
2157 YDSXGR_SPDIFOUTCTRL,
2158 YDSXGR_SPDIFOUTSTATUS,
2159 YDSXGR_SPDIFINCTRL,
2160 /* volumes */
2161 YDSXGR_PRIADCLOOPVOL,
2162 YDSXGR_NATIVEDACINVOL,
2163 YDSXGR_NATIVEDACOUTVOL,
2164 // YDSXGR_BUF441OUTVOL,
2165 YDSXGR_NATIVEADCINVOL,
2166 YDSXGR_SPDIFLOOPVOL,
2167 YDSXGR_SPDIFOUTVOL,
2168 YDSXGR_ZVOUTVOL,
2169 YDSXGR_LEGACYOUTVOL,
2170 /* address bases */
2171 YDSXGR_PLAYCTRLBASE,
2172 YDSXGR_RECCTRLBASE,
2173 YDSXGR_EFFCTRLBASE,
2174 YDSXGR_WORKBASE,
2175 /* capture set up */
2176 YDSXGR_MAPOFREC,
2177 YDSXGR_RECFORMAT,
2178 YDSXGR_RECSLOTSR,
2179 YDSXGR_ADCFORMAT,
2180 YDSXGR_ADCSLOTSR,
2181};
2182#define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
2183
ded46235 2184int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state)
1da177e4 2185{
ded46235
TI		 2186 struct snd_card *card = pci_get_drvdata(pci);
2187 struct snd_ymfpci *chip = card->private_data;
1da177e4
LT		 2188 unsigned int i;
2189
ded46235 2190 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT		 2191 snd_pcm_suspend_all(chip->pcm);
2192 snd_pcm_suspend_all(chip->pcm2);
2193 snd_pcm_suspend_all(chip->pcm_spdif);
2194 snd_pcm_suspend_all(chip->pcm_4ch);
2195 snd_ac97_suspend(chip->ac97);
2196 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2197 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2198 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2199 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2200 snd_ymfpci_disable_dsp(chip);
ded46235
TI		 2201 pci_disable_device(pci);
2202 pci_save_state(pci);
1da177e4
LT		 2203 return 0;
2204}
2205
ded46235 2206int snd_ymfpci_resume(struct pci_dev *pci)
1da177e4 2207{
ded46235
TI		 2208 struct snd_card *card = pci_get_drvdata(pci);
2209 struct snd_ymfpci *chip = card->private_data;
1da177e4
LT		 2210 unsigned int i;
2211
ded46235
TI		 2212 pci_restore_state(pci);
2213 pci_enable_device(pci);
2214 pci_set_master(pci);
2215 snd_ymfpci_aclink_reset(pci);
1da177e4
LT		 2216 snd_ymfpci_codec_ready(chip, 0);
2217 snd_ymfpci_download_image(chip);
2218 udelay(100);
2219
2220 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2221 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2222
2223 snd_ac97_resume(chip->ac97);
2224
2225 /* start hw again */
2226 if (chip->start_count > 0) {
2227 spin_lock_irq(&chip->reg_lock);
2228 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2229 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2230 spin_unlock_irq(&chip->reg_lock);
2231 }
ded46235 2232 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 2233 return 0;
2234}
2235#endif /* CONFIG_PM */
2236
208a1b4c 2237int __devinit snd_ymfpci_create(struct snd_card *card,
1da177e4
LT		 2238 struct pci_dev * pci,
2239 unsigned short old_legacy_ctrl,
208a1b4c 2240 struct snd_ymfpci ** rchip)
1da177e4 2241{
208a1b4c 2242 struct snd_ymfpci *chip;
1da177e4 2243 int err;
208a1b4c 2244 static struct snd_device_ops ops = {
1da177e4
LT		 2245 .dev_free = snd_ymfpci_dev_free,
2246 };
2247
2248 *rchip = NULL;
2249
2250 /* enable PCI device */
2251 if ((err = pci_enable_device(pci)) < 0)
2252 return err;
2253
e560d8d8 2254 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 2255 if (chip == NULL) {
2256 pci_disable_device(pci);
2257 return -ENOMEM;
2258 }
2259 chip->old_legacy_ctrl = old_legacy_ctrl;
2260 spin_lock_init(&chip->reg_lock);
2261 spin_lock_init(&chip->voice_lock);
2262 init_waitqueue_head(&chip->interrupt_sleep);
2263 atomic_set(&chip->interrupt_sleep_count, 0);
2264 chip->card = card;
2265 chip->pci = pci;
2266 chip->irq = -1;
2267 chip->device_id = pci->device;
2268 pci_read_config_byte(pci, PCI_REVISION_ID, (u8 *)&chip->rev);
2269 chip->reg_area_phys = pci_resource_start(pci, 0);
2270 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
2271 pci_set_master(pci);
2272
2273 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
99b359ba 2274 snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
1da177e4
LT		 2275 snd_ymfpci_free(chip);
2276 return -EBUSY;
2277 }
2278 if (request_irq(pci->irq, snd_ymfpci_interrupt, SA_INTERRUPT|SA_SHIRQ, "YMFPCI", (void *) chip)) {
99b359ba 2279 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2280 snd_ymfpci_free(chip);
2281 return -EBUSY;
2282 }
2283 chip->irq = pci->irq;
2284
2285 snd_ymfpci_aclink_reset(pci);
2286 if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2287 snd_ymfpci_free(chip);
2288 return -EIO;
2289 }
2290
2291 snd_ymfpci_download_image(chip);
2292
2293 udelay(100); /* seems we need a delay after downloading image.. */
2294
2295 if (snd_ymfpci_memalloc(chip) < 0) {
2296 snd_ymfpci_free(chip);
2297 return -EIO;
2298 }
2299
2300 if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
2301 snd_ymfpci_free(chip);
2302 return err;
2303 }
2304
2305#ifdef CONFIG_PM
2306 chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
2307 if (chip->saved_regs == NULL) {
2308 snd_ymfpci_free(chip);
2309 return -ENOMEM;
2310 }
1da177e4
LT		 2311#endif
2312
2313 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2314 snd_ymfpci_free(chip);
2315 return err;
2316 }
2317
2318 snd_ymfpci_proc_init(card, chip);
2319
2320 snd_card_set_dev(card, &pci->dev);
2321
2322 *rchip = chip;
2323 return 0;
2324}
Ubuntu Artful kernel mirror