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[mirror_ubuntu-focal-kernel.git] / sound / pci / ymfpci / ymfpci_main.c
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1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4 2/*
c1017a4c 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4 4 * Routines for control of YMF724/740/744/754 chips
1da177e4
LT		 5 */
6
1da177e4 7#include <linux/delay.h>
102fa906 8#include <linux/firmware.h>
1da177e4
LT		 9#include <linux/init.h>
10#include <linux/interrupt.h>
11#include <linux/pci.h>
12#include <linux/sched.h>
13#include <linux/slab.h>
b82a82d0 14#include <linux/mutex.h>
da155d5b 15#include <linux/module.h>
6cbbfe1c 16#include <linux/io.h>
1da177e4
LT		 17
18#include <sound/core.h>
19#include <sound/control.h>
20#include <sound/info.h>
33925186 21#include <sound/tlv.h>
81fcb170 22#include "ymfpci.h"
1da177e4
LT		 23#include <sound/asoundef.h>
24#include <sound/mpu401.h>
25
102fa906 26#include <asm/byteorder.h>
1da177e4
LT		 27
28/*
29 * common I/O routines
30 */
31
208a1b4c 32static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
1da177e4 33
208a1b4c 34static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT		 35{
36 return readb(chip->reg_area_virt + offset);
37}
38
208a1b4c 39static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
1da177e4
LT		 40{
41 writeb(val, chip->reg_area_virt + offset);
42}
43
208a1b4c 44static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT		 45{
46 return readw(chip->reg_area_virt + offset);
47}
48
208a1b4c 49static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
1da177e4
LT		 50{
51 writew(val, chip->reg_area_virt + offset);
52}
53
208a1b4c 54static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT		 55{
56 return readl(chip->reg_area_virt + offset);
57}
58
208a1b4c 59static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
1da177e4
LT		 60{
61 writel(val, chip->reg_area_virt + offset);
62}
63
208a1b4c 64static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
1da177e4 65{
ef21ca24 66 unsigned long end_time;
1da177e4
LT		 67 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
68
ef21ca24 69 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT		 70 do {
71 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
72 return 0;
8433a509 73 schedule_timeout_uninterruptible(1);
ef21ca24 74 } while (time_before(jiffies, end_time));
6436bcf6
TI		 75 dev_err(chip->card->dev,
76 "codec_ready: codec %i is not ready [0x%x]\n",
77 secondary, snd_ymfpci_readw(chip, reg));
1da177e4
LT		 78 return -EBUSY;
79}
80
208a1b4c 81static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
1da177e4 82{
208a1b4c 83 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT		 84 u32 cmd;
85
86 snd_ymfpci_codec_ready(chip, 0);
87 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
88 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
89}
90
208a1b4c 91static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
1da177e4 92{
208a1b4c 93 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT		 94
95 if (snd_ymfpci_codec_ready(chip, 0))
96 return ~0;
97 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
98 if (snd_ymfpci_codec_ready(chip, 0))
99 return ~0;
100 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
101 int i;
102 for (i = 0; i < 600; i++)
103 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
104 }
105 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
106}
107
108/*
109 * Misc routines
110 */
111
112static u32 snd_ymfpci_calc_delta(u32 rate)
113{
114 switch (rate) {
115 case 8000: return 0x02aaab00;
116 case 11025: return 0x03accd00;
117 case 16000: return 0x05555500;
118 case 22050: return 0x07599a00;
119 case 32000: return 0x0aaaab00;
120 case 44100: return 0x0eb33300;
121 default: return ((rate << 16) / 375) << 5;
122 }
123}
124
125static u32 def_rate[8] = {
126 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
127};
128
129static u32 snd_ymfpci_calc_lpfK(u32 rate)
130{
131 u32 i;
132 static u32 val[8] = {
133 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
134 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
135 };
136
137 if (rate == 44100)
138 return 0x40000000; /* FIXME: What's the right value? */
139 for (i = 0; i < 8; i++)
140 if (rate <= def_rate[i])
141 return val[i];
142 return val[0];
143}
144
145static u32 snd_ymfpci_calc_lpfQ(u32 rate)
146{
147 u32 i;
148 static u32 val[8] = {
149 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
150 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
151 };
152
153 if (rate == 44100)
154 return 0x370A0000;
155 for (i = 0; i < 8; i++)
156 if (rate <= def_rate[i])
157 return val[i];
158 return val[0];
159}
160
161/*
162 * Hardware start management
163 */
164
208a1b4c 165static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
1da177e4
LT		 166{
167 unsigned long flags;
168
169 spin_lock_irqsave(&chip->reg_lock, flags);
170 if (chip->start_count++ > 0)
171 goto __end;
172 snd_ymfpci_writel(chip, YDSXGR_MODE,
173 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
174 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
175 __end:
176 spin_unlock_irqrestore(&chip->reg_lock, flags);
177}
178
208a1b4c 179static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
1da177e4
LT		 180{
181 unsigned long flags;
182 long timeout = 1000;
183
184 spin_lock_irqsave(&chip->reg_lock, flags);
185 if (--chip->start_count > 0)
186 goto __end;
187 snd_ymfpci_writel(chip, YDSXGR_MODE,
188 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
189 while (timeout-- > 0) {
190 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
191 break;
192 }
193 if (atomic_read(&chip->interrupt_sleep_count)) {
194 atomic_set(&chip->interrupt_sleep_count, 0);
195 wake_up(&chip->interrupt_sleep);
196 }
197 __end:
198 spin_unlock_irqrestore(&chip->reg_lock, flags);
199}
200
201/*
202 * Playback voice management
203 */
204
208a1b4c
TI		 205static int voice_alloc(struct snd_ymfpci *chip,
206 enum snd_ymfpci_voice_type type, int pair,
207 struct snd_ymfpci_voice **rvoice)
1da177e4 208{
208a1b4c 209 struct snd_ymfpci_voice *voice, *voice2;
1da177e4
LT		 210 int idx;
211
212 *rvoice = NULL;
213 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
214 voice = &chip->voices[idx];
215 voice2 = pair ? &chip->voices[idx+1] : NULL;
216 if (voice->use || (voice2 && voice2->use))
217 continue;
218 voice->use = 1;
219 if (voice2)
220 voice2->use = 1;
221 switch (type) {
222 case YMFPCI_PCM:
223 voice->pcm = 1;
224 if (voice2)
225 voice2->pcm = 1;
226 break;
227 case YMFPCI_SYNTH:
228 voice->synth = 1;
229 break;
230 case YMFPCI_MIDI:
231 voice->midi = 1;
232 break;
233 }
234 snd_ymfpci_hw_start(chip);
235 if (voice2)
236 snd_ymfpci_hw_start(chip);
237 *rvoice = voice;
238 return 0;
239 }
240 return -ENOMEM;
241}
242
208a1b4c
TI		 243static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
244 enum snd_ymfpci_voice_type type, int pair,
245 struct snd_ymfpci_voice **rvoice)
1da177e4
LT		 246{
247 unsigned long flags;
248 int result;
249
da3cec35
TI		 250 if (snd_BUG_ON(!rvoice))
251 return -EINVAL;
252 if (snd_BUG_ON(pair && type != YMFPCI_PCM))
253 return -EINVAL;
1da177e4
LT		 254
255 spin_lock_irqsave(&chip->voice_lock, flags);
256 for (;;) {
257 result = voice_alloc(chip, type, pair, rvoice);
258 if (result == 0 || type != YMFPCI_PCM)
259 break;
260 /* TODO: synth/midi voice deallocation */
261 break;
262 }
263 spin_unlock_irqrestore(&chip->voice_lock, flags);
264 return result;
265}
266
208a1b4c 267static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
1da177e4
LT		 268{
269 unsigned long flags;
270
da3cec35
TI		 271 if (snd_BUG_ON(!pvoice))
272 return -EINVAL;
1da177e4
LT		 273 snd_ymfpci_hw_stop(chip);
274 spin_lock_irqsave(&chip->voice_lock, flags);
9ed1261e
TK		 275 if (pvoice->number == chip->src441_used) {
276 chip->src441_used = -1;
277 pvoice->ypcm->use_441_slot = 0;
278 }
1da177e4
LT		 279 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
280 pvoice->ypcm = NULL;
281 pvoice->interrupt = NULL;
282 spin_unlock_irqrestore(&chip->voice_lock, flags);
283 return 0;
284}
285
286/*
287 * PCM part
288 */
289
208a1b4c 290static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
1da177e4 291{
208a1b4c 292 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 293 u32 pos, delta;
294
295 if ((ypcm = voice->ypcm) == NULL)
296 return;
297 if (ypcm->substream == NULL)
298 return;
299 spin_lock(&chip->reg_lock);
300 if (ypcm->running) {
301 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
302 if (pos < ypcm->last_pos)
303 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
304 else
305 delta = pos - ypcm->last_pos;
306 ypcm->period_pos += delta;
307 ypcm->last_pos = pos;
308 if (ypcm->period_pos >= ypcm->period_size) {
ee419653 309 /*
6436bcf6 310 dev_dbg(chip->card->dev,
ee419653
TI		 311 "done - active_bank = 0x%x, start = 0x%x\n",
312 chip->active_bank,
313 voice->bank[chip->active_bank].start);
314 */
1da177e4
LT		 315 ypcm->period_pos %= ypcm->period_size;
316 spin_unlock(&chip->reg_lock);
317 snd_pcm_period_elapsed(ypcm->substream);
318 spin_lock(&chip->reg_lock);
319 }
9bcf6551
CL		 320
321 if (unlikely(ypcm->update_pcm_vol)) {
322 unsigned int subs = ypcm->substream->number;
323 unsigned int next_bank = 1 - chip->active_bank;
208a1b4c 324 struct snd_ymfpci_playback_bank *bank;
d3c63763 325 __le32 volume;
9bcf6551
CL		 326
327 bank = &voice->bank[next_bank];
328 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
329 bank->left_gain_end = volume;
330 if (ypcm->output_rear)
331 bank->eff2_gain_end = volume;
332 if (ypcm->voices[1])
333 bank = &ypcm->voices[1]->bank[next_bank];
334 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
335 bank->right_gain_end = volume;
336 if (ypcm->output_rear)
337 bank->eff3_gain_end = volume;
338 ypcm->update_pcm_vol--;
339 }
1da177e4
LT		 340 }
341 spin_unlock(&chip->reg_lock);
342}
343
208a1b4c 344static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
1da177e4 345{
208a1b4c
TI		 346 struct snd_pcm_runtime *runtime = substream->runtime;
347 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
348 struct snd_ymfpci *chip = ypcm->chip;
1da177e4
LT		 349 u32 pos, delta;
350
351 spin_lock(&chip->reg_lock);
352 if (ypcm->running) {
353 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
354 if (pos < ypcm->last_pos)
355 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
356 else
357 delta = pos - ypcm->last_pos;
358 ypcm->period_pos += delta;
359 ypcm->last_pos = pos;
360 if (ypcm->period_pos >= ypcm->period_size) {
361 ypcm->period_pos %= ypcm->period_size;
ee419653 362 /*
6436bcf6 363 dev_dbg(chip->card->dev,
ee419653
TI		 364 "done - active_bank = 0x%x, start = 0x%x\n",
365 chip->active_bank,
366 voice->bank[chip->active_bank].start);
367 */
1da177e4
LT		 368 spin_unlock(&chip->reg_lock);
369 snd_pcm_period_elapsed(substream);
370 spin_lock(&chip->reg_lock);
371 }
372 }
373 spin_unlock(&chip->reg_lock);
374}
375
208a1b4c 376static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 377 int cmd)
378{
208a1b4c
TI		 379 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
380 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
177a7cdb 381 struct snd_kcontrol *kctl = NULL;
1da177e4
LT		 382 int result = 0;
383
384 spin_lock(&chip->reg_lock);
385 if (ypcm->voices[0] == NULL) {
386 result = -EINVAL;
387 goto __unlock;
388 }
389 switch (cmd) {
390 case SNDRV_PCM_TRIGGER_START:
391 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
392 case SNDRV_PCM_TRIGGER_RESUME:
393 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
9ed1261e 394 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
1da177e4
LT		 395 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
396 ypcm->running = 1;
397 break;
398 case SNDRV_PCM_TRIGGER_STOP:
177a7cdb
CL		 399 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
400 kctl = chip->pcm_mixer[substream->number].ctl;
401 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
402 }
403 /* fall through */
1da177e4
LT		 404 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
405 case SNDRV_PCM_TRIGGER_SUSPEND:
406 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
9ed1261e 407 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
1da177e4
LT		 408 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
409 ypcm->running = 0;
410 break;
411 default:
412 result = -EINVAL;
413 break;
414 }
415 __unlock:
416 spin_unlock(&chip->reg_lock);
177a7cdb
CL		 417 if (kctl)
418 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
1da177e4
LT		 419 return result;
420}
208a1b4c 421static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 422 int cmd)
423{
208a1b4c
TI		 424 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
425 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1da177e4
LT		 426 int result = 0;
427 u32 tmp;
428
429 spin_lock(&chip->reg_lock);
430 switch (cmd) {
431 case SNDRV_PCM_TRIGGER_START:
432 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
433 case SNDRV_PCM_TRIGGER_RESUME:
434 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
435 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
436 ypcm->running = 1;
437 break;
438 case SNDRV_PCM_TRIGGER_STOP:
439 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
440 case SNDRV_PCM_TRIGGER_SUSPEND:
441 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
442 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
443 ypcm->running = 0;
444 break;
445 default:
446 result = -EINVAL;
447 break;
448 }
449 spin_unlock(&chip->reg_lock);
450 return result;
451}
452
208a1b4c 453static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
1da177e4
LT		 454{
455 int err;
456
457 if (ypcm->voices[1] != NULL && voices < 2) {
458 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
459 ypcm->voices[1] = NULL;
460 }
461 if (voices == 1 && ypcm->voices[0] != NULL)
462 return 0; /* already allocated */
463 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
464 return 0; /* already allocated */
465 if (voices > 1) {
466 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
467 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
468 ypcm->voices[0] = NULL;
469 }
470 }
471 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
472 if (err < 0)
473 return err;
474 ypcm->voices[0]->ypcm = ypcm;
475 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
476 if (voices > 1) {
477 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
478 ypcm->voices[1]->ypcm = ypcm;
479 }
480 return 0;
481}
482
208a1b4c
TI		 483static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
484 struct snd_pcm_runtime *runtime,
9bcf6551 485 int has_pcm_volume)
1da177e4 486{
208a1b4c 487 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
1da177e4 488 u32 format;
9bcf6551
CL		 489 u32 delta = snd_ymfpci_calc_delta(runtime->rate);
490 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
491 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
208a1b4c 492 struct snd_ymfpci_playback_bank *bank;
1da177e4 493 unsigned int nbank;
d3c63763 494 __le32 vol_left, vol_right;
9bcf6551 495 u8 use_left, use_right;
9ed1261e 496 unsigned long flags;
1da177e4 497
da3cec35
TI		 498 if (snd_BUG_ON(!voice))
499 return;
9bcf6551
CL		 500 if (runtime->channels == 1) {
501 use_left = 1;
502 use_right = 1;
503 } else {
504 use_left = (voiceidx & 1) == 0;
505 use_right = !use_left;
506 }
507 if (has_pcm_volume) {
508 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
509 [ypcm->substream->number].left << 15);
510 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
511 [ypcm->substream->number].right << 15);
512 } else {
513 vol_left = cpu_to_le32(0x40000000);
514 vol_right = cpu_to_le32(0x40000000);
515 }
9ed1261e 516 spin_lock_irqsave(&ypcm->chip->voice_lock, flags);
9bcf6551
CL		 517 format = runtime->channels == 2 ? 0x00010000 : 0;
518 if (snd_pcm_format_width(runtime->format) == 8)
519 format |= 0x80000000;
9ed1261e
TK		 520 else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
521 runtime->rate == 44100 && runtime->channels == 2 &&
522 voiceidx == 0 && (ypcm->chip->src441_used == -1 ||
523 ypcm->chip->src441_used == voice->number)) {
524 ypcm->chip->src441_used = voice->number;
525 ypcm->use_441_slot = 1;
526 format |= 0x10000000;
9ed1261e
TK		 527 }
528 if (ypcm->chip->src441_used == voice->number &&
529 (format & 0x10000000) == 0) {
530 ypcm->chip->src441_used = -1;
531 ypcm->use_441_slot = 0;
532 }
9bcf6551
CL		 533 if (runtime->channels == 2 && (voiceidx & 1) != 0)
534 format |= 1;
9ed1261e 535 spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags);
1da177e4
LT		 536 for (nbank = 0; nbank < 2; nbank++) {
537 bank = &voice->bank[nbank];
9bcf6551 538 memset(bank, 0, sizeof(*bank));
1da177e4 539 bank->format = cpu_to_le32(format);
9bcf6551
CL		 540 bank->base = cpu_to_le32(runtime->dma_addr);
541 bank->loop_end = cpu_to_le32(ypcm->buffer_size);
1da177e4 542 bank->lpfQ = cpu_to_le32(lpfQ);
1da177e4
LT		 543 bank->delta =
544 bank->delta_end = cpu_to_le32(delta);
545 bank->lpfK =
546 bank->lpfK_end = cpu_to_le32(lpfK);
9bcf6551
CL		 547 bank->eg_gain =
548 bank->eg_gain_end = cpu_to_le32(0x40000000);
549
550 if (ypcm->output_front) {
551 if (use_left) {
552 bank->left_gain =
553 bank->left_gain_end = vol_left;
554 }
555 if (use_right) {
1da177e4 556 bank->right_gain =
9bcf6551 557 bank->right_gain_end = vol_right;
1da177e4 558 }
9bcf6551
CL		 559 }
560 if (ypcm->output_rear) {
5a25c5cf
JK		 561 if (!ypcm->swap_rear) {
562 if (use_left) {
563 bank->eff2_gain =
564 bank->eff2_gain_end = vol_left;
565 }
566 if (use_right) {
567 bank->eff3_gain =
568 bank->eff3_gain_end = vol_right;
569 }
570 } else {
571 /* The SPDIF out channels seem to be swapped, so we have
572 * to swap them here, too. The rear analog out channels
573 * will be wrong, but otherwise AC3 would not work.
574 */
575 if (use_left) {
576 bank->eff3_gain =
577 bank->eff3_gain_end = vol_left;
578 }
579 if (use_right) {
580 bank->eff2_gain =
581 bank->eff2_gain_end = vol_right;
582 }
583 }
584 }
1da177e4
LT		 585 }
586}
587
e23e7a14 588static int snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
1da177e4
LT		 589{
590 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
591 4096, &chip->ac3_tmp_base) < 0)
592 return -ENOMEM;
593
594 chip->bank_effect[3][0]->base =
595 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
596 chip->bank_effect[3][0]->loop_end =
597 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
598 chip->bank_effect[4][0]->base =
599 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
600 chip->bank_effect[4][0]->loop_end =
601 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
602
603 spin_lock_irq(&chip->reg_lock);
604 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
605 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
606 spin_unlock_irq(&chip->reg_lock);
607 return 0;
608}
609
208a1b4c 610static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
1da177e4
LT		 611{
612 spin_lock_irq(&chip->reg_lock);
613 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
614 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
615 spin_unlock_irq(&chip->reg_lock);
616 // snd_ymfpci_irq_wait(chip);
617 if (chip->ac3_tmp_base.area) {
618 snd_dma_free_pages(&chip->ac3_tmp_base);
619 chip->ac3_tmp_base.area = NULL;
620 }
621 return 0;
622}
623
208a1b4c
TI		 624static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
625 struct snd_pcm_hw_params *hw_params)
1da177e4 626{
208a1b4c
TI		 627 struct snd_pcm_runtime *runtime = substream->runtime;
628 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT		 629 int err;
630
631 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
632 return err;
633 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
634 return err;
635 return 0;
636}
637
208a1b4c 638static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
1da177e4 639{
208a1b4c
TI		 640 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
641 struct snd_pcm_runtime *runtime = substream->runtime;
642 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 643
644 if (runtime->private_data == NULL)
645 return 0;
646 ypcm = runtime->private_data;
647
648 /* wait, until the PCI operations are not finished */
649 snd_ymfpci_irq_wait(chip);
650 snd_pcm_lib_free_pages(substream);
651 if (ypcm->voices[1]) {
652 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
653 ypcm->voices[1] = NULL;
654 }
655 if (ypcm->voices[0]) {
656 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
657 ypcm->voices[0] = NULL;
658 }
659 return 0;
660}
661
208a1b4c 662static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 663{
208a1b4c
TI		 664 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
665 struct snd_pcm_runtime *runtime = substream->runtime;
666 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
177a7cdb 667 struct snd_kcontrol *kctl;
1da177e4
LT		 668 unsigned int nvoice;
669
670 ypcm->period_size = runtime->period_size;
671 ypcm->buffer_size = runtime->buffer_size;
672 ypcm->period_pos = 0;
673 ypcm->last_pos = 0;
674 for (nvoice = 0; nvoice < runtime->channels; nvoice++)
9bcf6551
CL		 675 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
676 substream->pcm == chip->pcm);
177a7cdb
CL		 677
678 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
679 kctl = chip->pcm_mixer[substream->number].ctl;
680 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
681 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
682 }
1da177e4
LT		 683 return 0;
684}
685
208a1b4c
TI		 686static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
687 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 688{
689 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
690}
691
208a1b4c 692static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
1da177e4 693{
208a1b4c 694 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 695
696 /* wait, until the PCI operations are not finished */
697 snd_ymfpci_irq_wait(chip);
698 return snd_pcm_lib_free_pages(substream);
699}
700
208a1b4c 701static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 702{
208a1b4c
TI		 703 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
704 struct snd_pcm_runtime *runtime = substream->runtime;
705 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
706 struct snd_ymfpci_capture_bank * bank;
1da177e4
LT		 707 int nbank;
708 u32 rate, format;
709
710 ypcm->period_size = runtime->period_size;
711 ypcm->buffer_size = runtime->buffer_size;
712 ypcm->period_pos = 0;
713 ypcm->last_pos = 0;
714 ypcm->shift = 0;
715 rate = ((48000 * 4096) / runtime->rate) - 1;
716 format = 0;
717 if (runtime->channels == 2) {
718 format |= 2;
719 ypcm->shift++;
720 }
721 if (snd_pcm_format_width(runtime->format) == 8)
722 format |= 1;
723 else
724 ypcm->shift++;
725 switch (ypcm->capture_bank_number) {
726 case 0:
727 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
728 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
729 break;
730 case 1:
731 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
732 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
733 break;
734 }
735 for (nbank = 0; nbank < 2; nbank++) {
736 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
737 bank->base = cpu_to_le32(runtime->dma_addr);
738 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
739 bank->start = 0;
740 bank->num_of_loops = 0;
741 }
742 return 0;
743}
744
208a1b4c 745static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 746{
208a1b4c
TI		 747 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
748 struct snd_pcm_runtime *runtime = substream->runtime;
749 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
750 struct snd_ymfpci_voice *voice = ypcm->voices[0];
1da177e4
LT		 751
752 if (!(ypcm->running && voice))
753 return 0;
754 return le32_to_cpu(voice->bank[chip->active_bank].start);
755}
756
208a1b4c 757static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 758{
208a1b4c
TI		 759 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
760 struct snd_pcm_runtime *runtime = substream->runtime;
761 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT		 762
763 if (!ypcm->running)
764 return 0;
765 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
766}
767
208a1b4c 768static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
1da177e4 769{
ac6424b9 770 wait_queue_entry_t wait;
1da177e4
LT		 771 int loops = 4;
772
773 while (loops-- > 0) {
774 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
775 continue;
776 init_waitqueue_entry(&wait, current);
777 add_wait_queue(&chip->interrupt_sleep, &wait);
778 atomic_inc(&chip->interrupt_sleep_count);
8433a509 779 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
1da177e4
LT		 780 remove_wait_queue(&chip->interrupt_sleep, &wait);
781 }
782}
783
7d12e780 784static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
1da177e4 785{
208a1b4c 786 struct snd_ymfpci *chip = dev_id;
1da177e4 787 u32 status, nvoice, mode;
208a1b4c 788 struct snd_ymfpci_voice *voice;
1da177e4
LT		 789
790 status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
791 if (status & 0x80000000) {
792 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
793 spin_lock(&chip->voice_lock);
794 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
795 voice = &chip->voices[nvoice];
796 if (voice->interrupt)
797 voice->interrupt(chip, voice);
798 }
799 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
800 if (chip->capture_substream[nvoice])
801 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
802 }
803#if 0
804 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
805 if (chip->effect_substream[nvoice])
806 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
807 }
808#endif
809 spin_unlock(&chip->voice_lock);
810 spin_lock(&chip->reg_lock);
811 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
812 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
813 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
814 spin_unlock(&chip->reg_lock);
815
816 if (atomic_read(&chip->interrupt_sleep_count)) {
817 atomic_set(&chip->interrupt_sleep_count, 0);
818 wake_up(&chip->interrupt_sleep);
819 }
820 }
821
822 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
823 if (status & 1) {
824 if (chip->timer)
6e2efaac 825 snd_timer_interrupt(chip->timer, chip->timer_ticks);
1da177e4
LT		 826 }
827 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
828
829 if (chip->rawmidi)
7d12e780 830 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
1da177e4
LT		 831 return IRQ_HANDLED;
832}
833
420b0c1b 834static const struct snd_pcm_hardware snd_ymfpci_playback =
1da177e4
LT		 835{
836 .info = (SNDRV_PCM_INFO_MMAP |
837 SNDRV_PCM_INFO_MMAP_VALID |
838 SNDRV_PCM_INFO_INTERLEAVED |
839 SNDRV_PCM_INFO_BLOCK_TRANSFER |
840 SNDRV_PCM_INFO_PAUSE |
841 SNDRV_PCM_INFO_RESUME),
842 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
843 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
844 .rate_min = 8000,
845 .rate_max = 48000,
846 .channels_min = 1,
847 .channels_max = 2,
848 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
849 .period_bytes_min = 64,
850 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
851 .periods_min = 3,
852 .periods_max = 1024,
853 .fifo_size = 0,
854};
855
420b0c1b 856static const struct snd_pcm_hardware snd_ymfpci_capture =
1da177e4
LT		 857{
858 .info = (SNDRV_PCM_INFO_MMAP |
859 SNDRV_PCM_INFO_MMAP_VALID |
860 SNDRV_PCM_INFO_INTERLEAVED |
861 SNDRV_PCM_INFO_BLOCK_TRANSFER |
862 SNDRV_PCM_INFO_PAUSE |
863 SNDRV_PCM_INFO_RESUME),
864 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
865 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
866 .rate_min = 8000,
867 .rate_max = 48000,
868 .channels_min = 1,
869 .channels_max = 2,
870 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
871 .period_bytes_min = 64,
872 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
873 .periods_min = 3,
874 .periods_max = 1024,
875 .fifo_size = 0,
876};
877
208a1b4c 878static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
1da177e4 879{
4d572776 880 kfree(runtime->private_data);
1da177e4
LT		 881}
882
208a1b4c 883static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
1da177e4 884{
208a1b4c
TI		 885 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
886 struct snd_pcm_runtime *runtime = substream->runtime;
887 struct snd_ymfpci_pcm *ypcm;
84f9df15
CL		 888 int err;
889
890 runtime->hw = snd_ymfpci_playback;
891 /* FIXME? True value is 256/48 = 5.33333 ms */
892 err = snd_pcm_hw_constraint_minmax(runtime,
893 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
894 5334, UINT_MAX);
895 if (err < 0)
896 return err;
5b0416a3
CL		 897 err = snd_pcm_hw_rule_noresample(runtime, 48000);
898 if (err < 0)
899 return err;
1da177e4 900
e560d8d8 901 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1da177e4
LT		 902 if (ypcm == NULL)
903 return -ENOMEM;
904 ypcm->chip = chip;
905 ypcm->type = PLAYBACK_VOICE;
906 ypcm->substream = substream;
1da177e4
LT		 907 runtime->private_data = ypcm;
908 runtime->private_free = snd_ymfpci_pcm_free_substream;
1da177e4
LT		 909 return 0;
910}
911
912/* call with spinlock held */
208a1b4c 913static void ymfpci_open_extension(struct snd_ymfpci *chip)
1da177e4
LT		 914{
915 if (! chip->rear_opened) {
916 if (! chip->spdif_opened) /* set AC3 */
917 snd_ymfpci_writel(chip, YDSXGR_MODE,
918 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
919 /* enable second codec (4CHEN) */
920 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
921 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
922 }
923}
924
925/* call with spinlock held */
208a1b4c 926static void ymfpci_close_extension(struct snd_ymfpci *chip)
1da177e4
LT		 927{
928 if (! chip->rear_opened) {
929 if (! chip->spdif_opened)
930 snd_ymfpci_writel(chip, YDSXGR_MODE,
931 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
932 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
933 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
934 }
935}
936
208a1b4c 937static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
1da177e4 938{
208a1b4c
TI		 939 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
940 struct snd_pcm_runtime *runtime = substream->runtime;
941 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 942 int err;
943
944 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
945 return err;
946 ypcm = runtime->private_data;
947 ypcm->output_front = 1;
948 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
d9301263 949 ypcm->swap_rear = 0;
1da177e4
LT		 950 spin_lock_irq(&chip->reg_lock);
951 if (ypcm->output_rear) {
952 ymfpci_open_extension(chip);
953 chip->rear_opened++;
954 }
955 spin_unlock_irq(&chip->reg_lock);
956 return 0;
957}
958
208a1b4c 959static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
1da177e4 960{
208a1b4c
TI		 961 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
962 struct snd_pcm_runtime *runtime = substream->runtime;
963 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 964 int err;
965
966 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
967 return err;
968 ypcm = runtime->private_data;
969 ypcm->output_front = 0;
970 ypcm->output_rear = 1;
d9301263 971 ypcm->swap_rear = 1;
1da177e4
LT		 972 spin_lock_irq(&chip->reg_lock);
973 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
974 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
975 ymfpci_open_extension(chip);
976 chip->spdif_pcm_bits = chip->spdif_bits;
977 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
978 chip->spdif_opened++;
979 spin_unlock_irq(&chip->reg_lock);
980
981 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
982 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
983 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
984 return 0;
985}
986
208a1b4c 987static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
1da177e4 988{
208a1b4c
TI		 989 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
990 struct snd_pcm_runtime *runtime = substream->runtime;
991 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 992 int err;
993
994 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
995 return err;
996 ypcm = runtime->private_data;
997 ypcm->output_front = 0;
998 ypcm->output_rear = 1;
d9301263 999 ypcm->swap_rear = 0;
1da177e4
LT		 1000 spin_lock_irq(&chip->reg_lock);
1001 ymfpci_open_extension(chip);
1002 chip->rear_opened++;
1003 spin_unlock_irq(&chip->reg_lock);
1004 return 0;
1005}
1006
208a1b4c 1007static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
1da177e4
LT		 1008 u32 capture_bank_number)
1009{
208a1b4c
TI		 1010 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1011 struct snd_pcm_runtime *runtime = substream->runtime;
1012 struct snd_ymfpci_pcm *ypcm;
84f9df15
CL		 1013 int err;
1014
1015 runtime->hw = snd_ymfpci_capture;
1016 /* FIXME? True value is 256/48 = 5.33333 ms */
1017 err = snd_pcm_hw_constraint_minmax(runtime,
1018 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
1019 5334, UINT_MAX);
1020 if (err < 0)
1021 return err;
5b0416a3
CL		 1022 err = snd_pcm_hw_rule_noresample(runtime, 48000);
1023 if (err < 0)
1024 return err;
1da177e4 1025
e560d8d8 1026 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1da177e4
LT		 1027 if (ypcm == NULL)
1028 return -ENOMEM;
1029 ypcm->chip = chip;
1030 ypcm->type = capture_bank_number + CAPTURE_REC;
1031 ypcm->substream = substream;
1032 ypcm->capture_bank_number = capture_bank_number;
1033 chip->capture_substream[capture_bank_number] = substream;
1da177e4
LT		 1034 runtime->private_data = ypcm;
1035 runtime->private_free = snd_ymfpci_pcm_free_substream;
1036 snd_ymfpci_hw_start(chip);
1037 return 0;
1038}
1039
208a1b4c 1040static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
1da177e4
LT		 1041{
1042 return snd_ymfpci_capture_open(substream, 0);
1043}
1044
208a1b4c 1045static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
1da177e4
LT		 1046{
1047 return snd_ymfpci_capture_open(substream, 1);
1048}
1049
208a1b4c 1050static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
1da177e4
LT		 1051{
1052 return 0;
1053}
1054
208a1b4c 1055static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
1da177e4 1056{
208a1b4c
TI		 1057 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1058 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1da177e4
LT		 1059
1060 spin_lock_irq(&chip->reg_lock);
1061 if (ypcm->output_rear && chip->rear_opened > 0) {
1062 chip->rear_opened--;
1063 ymfpci_close_extension(chip);
1064 }
1065 spin_unlock_irq(&chip->reg_lock);
1066 return snd_ymfpci_playback_close_1(substream);
1067}
1068
208a1b4c 1069static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1070{
208a1b4c 1071 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 1072
1073 spin_lock_irq(&chip->reg_lock);
1074 chip->spdif_opened = 0;
1075 ymfpci_close_extension(chip);
1076 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1077 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1078 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1079 spin_unlock_irq(&chip->reg_lock);
1080 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1081 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1082 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1083 return snd_ymfpci_playback_close_1(substream);
1084}
1085
208a1b4c 1086static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
1da177e4 1087{
208a1b4c 1088 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 1089
1090 spin_lock_irq(&chip->reg_lock);
1091 if (chip->rear_opened > 0) {
1092 chip->rear_opened--;
1093 ymfpci_close_extension(chip);
1094 }
1095 spin_unlock_irq(&chip->reg_lock);
1096 return snd_ymfpci_playback_close_1(substream);
1097}
1098
208a1b4c 1099static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
1da177e4 1100{
208a1b4c
TI		 1101 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1102 struct snd_pcm_runtime *runtime = substream->runtime;
1103 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT		 1104
1105 if (ypcm != NULL) {
1106 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1107 snd_ymfpci_hw_stop(chip);
1108 }
1109 return 0;
1110}
1111
6769e988 1112static const struct snd_pcm_ops snd_ymfpci_playback_ops = {
1da177e4
LT		 1113 .open = snd_ymfpci_playback_open,
1114 .close = snd_ymfpci_playback_close,
1115 .ioctl = snd_pcm_lib_ioctl,
1116 .hw_params = snd_ymfpci_playback_hw_params,
1117 .hw_free = snd_ymfpci_playback_hw_free,
1118 .prepare = snd_ymfpci_playback_prepare,
1119 .trigger = snd_ymfpci_playback_trigger,
1120 .pointer = snd_ymfpci_playback_pointer,
1121};
1122
6769e988 1123static const struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
1da177e4
LT		 1124 .open = snd_ymfpci_capture_rec_open,
1125 .close = snd_ymfpci_capture_close,
1126 .ioctl = snd_pcm_lib_ioctl,
1127 .hw_params = snd_ymfpci_capture_hw_params,
1128 .hw_free = snd_ymfpci_capture_hw_free,
1129 .prepare = snd_ymfpci_capture_prepare,
1130 .trigger = snd_ymfpci_capture_trigger,
1131 .pointer = snd_ymfpci_capture_pointer,
1132};
1133
38c47181 1134int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device)
1da177e4 1135{
208a1b4c 1136 struct snd_pcm *pcm;
1da177e4
LT		 1137 int err;
1138
1da177e4
LT		 1139 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1140 return err;
1141 pcm->private_data = chip;
1da177e4
LT		 1142
1143 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1144 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1145
1146 /* global setup */
1147 pcm->info_flags = 0;
1148 strcpy(pcm->name, "YMFPCI");
1149 chip->pcm = pcm;
1150
1151 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1152 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1153
38c47181 1154 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
0afdb8f2 1155 snd_pcm_std_chmaps, 2, 0, NULL);
1da177e4
LT		 1156}
1157
6769e988 1158static const struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
1da177e4
LT		 1159 .open = snd_ymfpci_capture_ac97_open,
1160 .close = snd_ymfpci_capture_close,
1161 .ioctl = snd_pcm_lib_ioctl,
1162 .hw_params = snd_ymfpci_capture_hw_params,
1163 .hw_free = snd_ymfpci_capture_hw_free,
1164 .prepare = snd_ymfpci_capture_prepare,
1165 .trigger = snd_ymfpci_capture_trigger,
1166 .pointer = snd_ymfpci_capture_pointer,
1167};
1168
38c47181 1169int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device)
1da177e4 1170{
208a1b4c 1171 struct snd_pcm *pcm;
1da177e4
LT		 1172 int err;
1173
1da177e4
LT		 1174 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1175 return err;
1176 pcm->private_data = chip;
1da177e4
LT		 1177
1178 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1179
1180 /* global setup */
1181 pcm->info_flags = 0;
1182 sprintf(pcm->name, "YMFPCI - %s",
1183 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1184 chip->pcm2 = pcm;
1185
1186 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1187 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1188
1da177e4
LT		 1189 return 0;
1190}
1191
6769e988 1192static const struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
1da177e4
LT		 1193 .open = snd_ymfpci_playback_spdif_open,
1194 .close = snd_ymfpci_playback_spdif_close,
1195 .ioctl = snd_pcm_lib_ioctl,
1196 .hw_params = snd_ymfpci_playback_hw_params,
1197 .hw_free = snd_ymfpci_playback_hw_free,
1198 .prepare = snd_ymfpci_playback_prepare,
1199 .trigger = snd_ymfpci_playback_trigger,
1200 .pointer = snd_ymfpci_playback_pointer,
1201};
1202
38c47181 1203int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device)
1da177e4 1204{
208a1b4c 1205 struct snd_pcm *pcm;
1da177e4
LT		 1206 int err;
1207
1da177e4
LT		 1208 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1209 return err;
1210 pcm->private_data = chip;
1da177e4
LT		 1211
1212 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1213
1214 /* global setup */
1215 pcm->info_flags = 0;
1216 strcpy(pcm->name, "YMFPCI - IEC958");
1217 chip->pcm_spdif = pcm;
1218
1219 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1220 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1221
1da177e4
LT		 1222 return 0;
1223}
1224
6769e988 1225static const struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
1da177e4
LT		 1226 .open = snd_ymfpci_playback_4ch_open,
1227 .close = snd_ymfpci_playback_4ch_close,
1228 .ioctl = snd_pcm_lib_ioctl,
1229 .hw_params = snd_ymfpci_playback_hw_params,
1230 .hw_free = snd_ymfpci_playback_hw_free,
1231 .prepare = snd_ymfpci_playback_prepare,
1232 .trigger = snd_ymfpci_playback_trigger,
1233 .pointer = snd_ymfpci_playback_pointer,
1234};
1235
0afdb8f2
TI		 1236static const struct snd_pcm_chmap_elem surround_map[] = {
1237 { .channels = 1,
5efbc261 1238 .map = { SNDRV_CHMAP_MONO } },
0afdb8f2
TI		 1239 { .channels = 2,
1240 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
1241 { }
1242};
1243
38c47181 1244int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device)
1da177e4 1245{
208a1b4c 1246 struct snd_pcm *pcm;
1da177e4
LT		 1247 int err;
1248
1da177e4
LT		 1249 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1250 return err;
1251 pcm->private_data = chip;
1da177e4
LT		 1252
1253 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1254
1255 /* global setup */
1256 pcm->info_flags = 0;
1257 strcpy(pcm->name, "YMFPCI - Rear PCM");
1258 chip->pcm_4ch = pcm;
1259
1260 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1261 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1262
38c47181 1263 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
0afdb8f2 1264 surround_map, 2, 0, NULL);
1da177e4
LT		 1265}
1266
208a1b4c 1267static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1268{
1269 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1270 uinfo->count = 1;
1271 return 0;
1272}
1273
208a1b4c
TI		 1274static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
1275 struct snd_ctl_elem_value *ucontrol)
1da177e4 1276{
208a1b4c 1277 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1278
1279 spin_lock_irq(&chip->reg_lock);
1280 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1281 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
fc80a202 1282 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1da177e4
LT		 1283 spin_unlock_irq(&chip->reg_lock);
1284 return 0;
1285}
1286
208a1b4c
TI		 1287static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
1288 struct snd_ctl_elem_value *ucontrol)
1da177e4 1289{
208a1b4c 1290 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1291 unsigned int val;
1292 int change;
1293
1294 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1295 (ucontrol->value.iec958.status[1] << 8);
1296 spin_lock_irq(&chip->reg_lock);
1297 change = chip->spdif_bits != val;
1298 chip->spdif_bits = val;
1299 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1300 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1301 spin_unlock_irq(&chip->reg_lock);
1302 return change;
1303}
1304
f3b827e0 1305static const struct snd_kcontrol_new snd_ymfpci_spdif_default =
1da177e4
LT		 1306{
1307 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1308 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1309 .info = snd_ymfpci_spdif_default_info,
1310 .get = snd_ymfpci_spdif_default_get,
1311 .put = snd_ymfpci_spdif_default_put
1312};
1313
208a1b4c 1314static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1315{
1316 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1317 uinfo->count = 1;
1318 return 0;
1319}
1320
208a1b4c
TI		 1321static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
1322 struct snd_ctl_elem_value *ucontrol)
1da177e4 1323{
208a1b4c 1324 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1325
1326 spin_lock_irq(&chip->reg_lock);
1327 ucontrol->value.iec958.status[0] = 0x3e;
1328 ucontrol->value.iec958.status[1] = 0xff;
1329 spin_unlock_irq(&chip->reg_lock);
1330 return 0;
1331}
1332
f3b827e0 1333static const struct snd_kcontrol_new snd_ymfpci_spdif_mask =
1da177e4
LT		 1334{
1335 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1336 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1337 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1338 .info = snd_ymfpci_spdif_mask_info,
1339 .get = snd_ymfpci_spdif_mask_get,
1340};
1341
208a1b4c 1342static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1343{
1344 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1345 uinfo->count = 1;
1346 return 0;
1347}
1348
208a1b4c
TI		 1349static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
1350 struct snd_ctl_elem_value *ucontrol)
1da177e4 1351{
208a1b4c 1352 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1353
1354 spin_lock_irq(&chip->reg_lock);
1355 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1356 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
fc80a202 1357 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1da177e4
LT		 1358 spin_unlock_irq(&chip->reg_lock);
1359 return 0;
1360}
1361
208a1b4c
TI		 1362static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
1363 struct snd_ctl_elem_value *ucontrol)
1da177e4 1364{
208a1b4c 1365 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1366 unsigned int val;
1367 int change;
1368
1369 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1370 (ucontrol->value.iec958.status[1] << 8);
1371 spin_lock_irq(&chip->reg_lock);
1372 change = chip->spdif_pcm_bits != val;
1373 chip->spdif_pcm_bits = val;
1374 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1375 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1376 spin_unlock_irq(&chip->reg_lock);
1377 return change;
1378}
1379
f3b827e0 1380static const struct snd_kcontrol_new snd_ymfpci_spdif_stream =
1da177e4
LT		 1381{
1382 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1383 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1384 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1385 .info = snd_ymfpci_spdif_stream_info,
1386 .get = snd_ymfpci_spdif_stream_get,
1387 .put = snd_ymfpci_spdif_stream_put
1388};
1389
208a1b4c 1390static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
1da177e4 1391{
bed6896d
CL		 1392 static const char *const texts[3] = {"AC'97", "IEC958", "ZV Port"};
1393
1394 return snd_ctl_enum_info(info, 1, 3, texts);
1da177e4
LT		 1395}
1396
208a1b4c 1397static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1da177e4 1398{
208a1b4c 1399 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1400 u16 reg;
1401
1402 spin_lock_irq(&chip->reg_lock);
1403 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1404 spin_unlock_irq(&chip->reg_lock);
1405 if (!(reg & 0x100))
1406 value->value.enumerated.item[0] = 0;
1407 else
1408 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1409 return 0;
1410}
1411
208a1b4c 1412static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1da177e4 1413{
208a1b4c 1414 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1415 u16 reg, old_reg;
1416
1417 spin_lock_irq(&chip->reg_lock);
1418 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1419 if (value->value.enumerated.item[0] == 0)
1420 reg = old_reg & ~0x100;
1421 else
1422 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1423 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1424 spin_unlock_irq(&chip->reg_lock);
1425 return reg != old_reg;
1426}
1427
f3b827e0 1428static const struct snd_kcontrol_new snd_ymfpci_drec_source = {
1da177e4
LT		 1429 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1430 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1431 .name = "Direct Recording Source",
1432 .info = snd_ymfpci_drec_source_info,
1433 .get = snd_ymfpci_drec_source_get,
1434 .put = snd_ymfpci_drec_source_put
1435};
1436
1437/*
1438 * Mixer controls
1439 */
1440
d602c885 1441#define YMFPCI_SINGLE(xname, xindex, reg, shift) \
1da177e4
LT		 1442{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1443 .info = snd_ymfpci_info_single, \
1444 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
d602c885 1445 .private_value = ((reg) | ((shift) << 16)) }
1da177e4 1446
a5ce8890 1447#define snd_ymfpci_info_single snd_ctl_boolean_mono_info
1da177e4 1448
208a1b4c
TI		 1449static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
1450 struct snd_ctl_elem_value *ucontrol)
1da177e4 1451{
208a1b4c 1452 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
d602c885
GM		 1453 int reg = kcontrol->private_value & 0xffff;
1454 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1455 unsigned int mask = 1;
1da177e4 1456
d602c885 1457 switch (reg) {
1da177e4
LT		 1458 case YDSXGR_SPDIFOUTCTRL: break;
1459 case YDSXGR_SPDIFINCTRL: break;
1460 default: return -EINVAL;
1461 }
d602c885
GM		 1462 ucontrol->value.integer.value[0] =
1463 (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1da177e4
LT		 1464 return 0;
1465}
1466
208a1b4c
TI		 1467static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
1468 struct snd_ctl_elem_value *ucontrol)
1da177e4 1469{
208a1b4c 1470 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
d602c885
GM		 1471 int reg = kcontrol->private_value & 0xffff;
1472 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1473 unsigned int mask = 1;
1da177e4
LT		 1474 int change;
1475 unsigned int val, oval;
1476
d602c885 1477 switch (reg) {
1da177e4
LT		 1478 case YDSXGR_SPDIFOUTCTRL: break;
1479 case YDSXGR_SPDIFINCTRL: break;
1480 default: return -EINVAL;
1481 }
1482 val = (ucontrol->value.integer.value[0] & mask);
1da177e4
LT		 1483 val <<= shift;
1484 spin_lock_irq(&chip->reg_lock);
1485 oval = snd_ymfpci_readl(chip, reg);
1486 val = (oval & ~(mask << shift)) | val;
1487 change = val != oval;
1488 snd_ymfpci_writel(chip, reg, val);
1489 spin_unlock_irq(&chip->reg_lock);
1490 return change;
1491}
1492
0cb29ea0 1493static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
33925186 1494
1da177e4
LT		 1495#define YMFPCI_DOUBLE(xname, xindex, reg) \
1496{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
33925186 1497 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
1da177e4
LT		 1498 .info = snd_ymfpci_info_double, \
1499 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
33925186
TI		 1500 .private_value = reg, \
1501 .tlv = { .p = db_scale_native } }
1da177e4 1502
208a1b4c 1503static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1504{
1505 unsigned int reg = kcontrol->private_value;
1da177e4
LT		 1506
1507 if (reg < 0x80 || reg >= 0xc0)
1508 return -EINVAL;
467a8c2f 1509 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1da177e4
LT		 1510 uinfo->count = 2;
1511 uinfo->value.integer.min = 0;
467a8c2f 1512 uinfo->value.integer.max = 16383;
1da177e4
LT		 1513 return 0;
1514}
1515
208a1b4c 1516static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1517{
208a1b4c 1518 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4 1519 unsigned int reg = kcontrol->private_value;
467a8c2f 1520 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1da177e4
LT		 1521 unsigned int val;
1522
1523 if (reg < 0x80 || reg >= 0xc0)
1524 return -EINVAL;
1525 spin_lock_irq(&chip->reg_lock);
1526 val = snd_ymfpci_readl(chip, reg);
1527 spin_unlock_irq(&chip->reg_lock);
1528 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1529 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1da177e4
LT		 1530 return 0;
1531}
1532
208a1b4c 1533static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1534{
208a1b4c 1535 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4 1536 unsigned int reg = kcontrol->private_value;
467a8c2f 1537 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1da177e4
LT		 1538 int change;
1539 unsigned int val1, val2, oval;
1540
1541 if (reg < 0x80 || reg >= 0xc0)
1542 return -EINVAL;
1543 val1 = ucontrol->value.integer.value[0] & mask;
1544 val2 = ucontrol->value.integer.value[1] & mask;
1da177e4
LT		 1545 val1 <<= shift_left;
1546 val2 <<= shift_right;
1547 spin_lock_irq(&chip->reg_lock);
1548 oval = snd_ymfpci_readl(chip, reg);
1549 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1550 change = val1 != oval;
1551 snd_ymfpci_writel(chip, reg, val1);
1552 spin_unlock_irq(&chip->reg_lock);
1553 return change;
1554}
1555
177a7cdb
CL		 1556static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol,
1557 struct snd_ctl_elem_value *ucontrol)
1558{
1559 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1560 unsigned int reg = YDSXGR_NATIVEDACOUTVOL;
1561 unsigned int reg2 = YDSXGR_BUF441OUTVOL;
1562 int change;
1563 unsigned int value, oval;
1564
1565 value = ucontrol->value.integer.value[0] & 0x3fff;
1566 value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16;
1567 spin_lock_irq(&chip->reg_lock);
1568 oval = snd_ymfpci_readl(chip, reg);
1569 change = value != oval;
1570 snd_ymfpci_writel(chip, reg, value);
1571 snd_ymfpci_writel(chip, reg2, value);
1572 spin_unlock_irq(&chip->reg_lock);
1573 return change;
1574}
1575
1da177e4
LT		 1576/*
1577 * 4ch duplication
1578 */
a5ce8890 1579#define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info
1da177e4 1580
208a1b4c 1581static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1582{
208a1b4c 1583 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1584 ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1585 return 0;
1586}
1587
208a1b4c 1588static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1589{
208a1b4c 1590 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1591 int change;
1592 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1593 if (change)
1594 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1595 return change;
1596}
1597
f3b827e0 1598static const struct snd_kcontrol_new snd_ymfpci_dup4ch = {
4d20bb1d
RY		 1599 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1600 .name = "4ch Duplication",
1601 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1602 .info = snd_ymfpci_info_dup4ch,
1603 .get = snd_ymfpci_get_dup4ch,
1604 .put = snd_ymfpci_put_dup4ch,
1605};
1da177e4 1606
e23e7a14 1607static struct snd_kcontrol_new snd_ymfpci_controls[] = {
177a7cdb
CL		 1608{
1609 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1610 .name = "Wave Playback Volume",
1611 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1612 SNDRV_CTL_ELEM_ACCESS_TLV_READ,
1613 .info = snd_ymfpci_info_double,
1614 .get = snd_ymfpci_get_double,
1615 .put = snd_ymfpci_put_nativedacvol,
1616 .private_value = YDSXGR_NATIVEDACOUTVOL,
1617 .tlv = { .p = db_scale_native },
1618},
1da177e4
LT		 1619YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1620YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1621YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1622YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1623YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1624YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1625YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
89f3325a 1626YMFPCI_DOUBLE("FM Legacy Playback Volume", 0, YDSXGR_LEGACYOUTVOL),
1da177e4
LT		 1627YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1628YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1629YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1630YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
d602c885
GM		 1631YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
1632YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
1633YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
1da177e4
LT		 1634};
1635
1636
1637/*
1638 * GPIO
1639 */
1640
208a1b4c 1641static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
1da177e4
LT		 1642{
1643 u16 reg, mode;
1644 unsigned long flags;
1645
1646 spin_lock_irqsave(&chip->reg_lock, flags);
1647 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1648 reg &= ~(1 << (pin + 8));
1649 reg |= (1 << pin);
1650 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1651 /* set the level mode for input line */
1652 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1653 mode &= ~(3 << (pin * 2));
1654 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1655 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1656 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1657 spin_unlock_irqrestore(&chip->reg_lock, flags);
1658 return (mode >> pin) & 1;
1659}
1660
208a1b4c 1661static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
1da177e4
LT		 1662{
1663 u16 reg;
1664 unsigned long flags;
1665
1666 spin_lock_irqsave(&chip->reg_lock, flags);
1667 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1668 reg &= ~(1 << pin);
1669 reg &= ~(1 << (pin + 8));
1670 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1671 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1672 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1673 spin_unlock_irqrestore(&chip->reg_lock, flags);
1674
1675 return 0;
1676}
1677
a5ce8890 1678#define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info
1da177e4 1679
208a1b4c 1680static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1681{
208a1b4c 1682 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1683 int pin = (int)kcontrol->private_value;
1684 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1685 return 0;
1686}
1687
208a1b4c 1688static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1689{
208a1b4c 1690 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1691 int pin = (int)kcontrol->private_value;
1692
1693 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1694 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1695 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1696 return 1;
1697 }
1698 return 0;
1699}
1700
f3b827e0 1701static const struct snd_kcontrol_new snd_ymfpci_rear_shared = {
1da177e4
LT		 1702 .name = "Shared Rear/Line-In Switch",
1703 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1704 .info = snd_ymfpci_gpio_sw_info,
1705 .get = snd_ymfpci_gpio_sw_get,
1706 .put = snd_ymfpci_gpio_sw_put,
1707 .private_value = 2,
1708};
1709
9bcf6551
CL		 1710/*
1711 * PCM voice volume
1712 */
1713
208a1b4c
TI		 1714static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
1715 struct snd_ctl_elem_info *uinfo)
9bcf6551
CL		 1716{
1717 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1718 uinfo->count = 2;
1719 uinfo->value.integer.min = 0;
1720 uinfo->value.integer.max = 0x8000;
1721 return 0;
1722}
1723
208a1b4c
TI		 1724static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
1725 struct snd_ctl_elem_value *ucontrol)
9bcf6551 1726{
208a1b4c 1727 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
9bcf6551
CL		 1728 unsigned int subs = kcontrol->id.subdevice;
1729
1730 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
1731 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
1732 return 0;
1733}
1734
208a1b4c
TI		 1735static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
1736 struct snd_ctl_elem_value *ucontrol)
9bcf6551 1737{
208a1b4c 1738 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
9bcf6551 1739 unsigned int subs = kcontrol->id.subdevice;
208a1b4c 1740 struct snd_pcm_substream *substream;
9bcf6551
CL		 1741 unsigned long flags;
1742
1743 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
1744 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
1745 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
1746 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
4e98d6a7
TI		 1747 if (chip->pcm_mixer[subs].left > 0x8000)
1748 chip->pcm_mixer[subs].left = 0x8000;
1749 if (chip->pcm_mixer[subs].right > 0x8000)
1750 chip->pcm_mixer[subs].right = 0x8000;
9bcf6551 1751
208a1b4c 1752 substream = (struct snd_pcm_substream *)kcontrol->private_value;
9bcf6551
CL		 1753 spin_lock_irqsave(&chip->voice_lock, flags);
1754 if (substream->runtime && substream->runtime->private_data) {
208a1b4c 1755 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
9ed1261e
TK		 1756 if (!ypcm->use_441_slot)
1757 ypcm->update_pcm_vol = 2;
9bcf6551
CL		 1758 }
1759 spin_unlock_irqrestore(&chip->voice_lock, flags);
1760 return 1;
1761 }
1762 return 0;
1763}
1764
f3b827e0 1765static const struct snd_kcontrol_new snd_ymfpci_pcm_volume = {
9bcf6551
CL		 1766 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1767 .name = "PCM Playback Volume",
1768 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1769 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1770 .info = snd_ymfpci_pcm_vol_info,
1771 .get = snd_ymfpci_pcm_vol_get,
1772 .put = snd_ymfpci_pcm_vol_put,
1773};
1774
1da177e4
LT		 1775
1776/*
1777 * Mixer routines
1778 */
1779
208a1b4c 1780static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1781{
208a1b4c 1782 struct snd_ymfpci *chip = bus->private_data;
1da177e4
LT		 1783 chip->ac97_bus = NULL;
1784}
1785
208a1b4c 1786static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1787{
208a1b4c 1788 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT		 1789 chip->ac97 = NULL;
1790}
1791
e23e7a14 1792int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
1da177e4 1793{
208a1b4c
TI		 1794 struct snd_ac97_template ac97;
1795 struct snd_kcontrol *kctl;
1796 struct snd_pcm_substream *substream;
1da177e4
LT		 1797 unsigned int idx;
1798 int err;
208a1b4c 1799 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1800 .write = snd_ymfpci_codec_write,
1801 .read = snd_ymfpci_codec_read,
1802 };
1803
1804 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1805 return err;
1806 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1807 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1808
1809 memset(&ac97, 0, sizeof(ac97));
1810 ac97.private_data = chip;
1811 ac97.private_free = snd_ymfpci_mixer_free_ac97;
1812 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1813 return err;
1814
1815 /* to be sure */
1816 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1817 AC97_EA_VRA|AC97_EA_VRM, 0);
1818
1819 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1820 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1821 return err;
1822 }
4d20bb1d
RY		 1823 if (chip->ac97->ext_id & AC97_EI_SDAC) {
1824 kctl = snd_ctl_new1(&snd_ymfpci_dup4ch, chip);
1825 err = snd_ctl_add(chip->card, kctl);
1826 if (err < 0)
1827 return err;
1828 }
1da177e4
LT		 1829
1830 /* add S/PDIF control */
da3cec35
TI		 1831 if (snd_BUG_ON(!chip->pcm_spdif))
1832 return -ENXIO;
1da177e4
LT		 1833 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1834 return err;
1835 kctl->id.device = chip->pcm_spdif->device;
1836 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1837 return err;
1838 kctl->id.device = chip->pcm_spdif->device;
1839 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1840 return err;
1841 kctl->id.device = chip->pcm_spdif->device;
1842 chip->spdif_pcm_ctl = kctl;
1843
1844 /* direct recording source */
1845 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1846 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1847 return err;
1848
1849 /*
1850 * shared rear/line-in
1851 */
1852 if (rear_switch) {
1853 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1854 return err;
1855 }
1856
9bcf6551
CL		 1857 /* per-voice volume */
1858 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1859 for (idx = 0; idx < 32; ++idx) {
1860 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
1861 if (!kctl)
1862 return -ENOMEM;
1863 kctl->id.device = chip->pcm->device;
1864 kctl->id.subdevice = idx;
1865 kctl->private_value = (unsigned long)substream;
1866 if ((err = snd_ctl_add(chip->card, kctl)) < 0)
1867 return err;
1868 chip->pcm_mixer[idx].left = 0x8000;
1869 chip->pcm_mixer[idx].right = 0x8000;
1870 chip->pcm_mixer[idx].ctl = kctl;
1871 substream = substream->next;
1872 }
1873
1da177e4
LT		 1874 return 0;
1875}
1876
1877
1878/*
1879 * timer
1880 */
1881
208a1b4c 1882static int snd_ymfpci_timer_start(struct snd_timer *timer)
1da177e4 1883{
208a1b4c 1884 struct snd_ymfpci *chip;
1da177e4
LT		 1885 unsigned long flags;
1886 unsigned int count;
1887
1888 chip = snd_timer_chip(timer);
1da177e4 1889 spin_lock_irqsave(&chip->reg_lock, flags);
6e2efaac
CL		 1890 if (timer->sticks > 1) {
1891 chip->timer_ticks = timer->sticks;
1892 count = timer->sticks - 1;
1893 } else {
1894 /*
1895 * Divisor 1 is not allowed; fake it by using divisor 2 and
1896 * counting two ticks for each interrupt.
1897 */
1898 chip->timer_ticks = 2;
1899 count = 2 - 1;
1900 }
1da177e4
LT		 1901 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1902 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1903 spin_unlock_irqrestore(&chip->reg_lock, flags);
1904 return 0;
1905}
1906
208a1b4c 1907static int snd_ymfpci_timer_stop(struct snd_timer *timer)
1da177e4 1908{
208a1b4c 1909 struct snd_ymfpci *chip;
1da177e4
LT		 1910 unsigned long flags;
1911
1912 chip = snd_timer_chip(timer);
1913 spin_lock_irqsave(&chip->reg_lock, flags);
1914 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1915 spin_unlock_irqrestore(&chip->reg_lock, flags);
1916 return 0;
1917}
1918
208a1b4c 1919static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
1da177e4
LT		 1920 unsigned long *num, unsigned long *den)
1921{
1922 *num = 1;
6e2efaac 1923 *den = 96000;
1da177e4
LT		 1924 return 0;
1925}
1926
208a1b4c 1927static struct snd_timer_hardware snd_ymfpci_timer_hw = {
1da177e4 1928 .flags = SNDRV_TIMER_HW_AUTO,
6e2efaac
CL		 1929 .resolution = 10417, /* 1 / 96 kHz = 10.41666...us */
1930 .ticks = 0x10000,
1da177e4
LT		 1931 .start = snd_ymfpci_timer_start,
1932 .stop = snd_ymfpci_timer_stop,
1933 .precise_resolution = snd_ymfpci_timer_precise_resolution,
1934};
1935
e23e7a14 1936int snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
1da177e4 1937{
208a1b4c
TI		 1938 struct snd_timer *timer = NULL;
1939 struct snd_timer_id tid;
1da177e4
LT		 1940 int err;
1941
1942 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1943 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1944 tid.card = chip->card->number;
1945 tid.device = device;
1946 tid.subdevice = 0;
1947 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1948 strcpy(timer->name, "YMFPCI timer");
1949 timer->private_data = chip;
1950 timer->hw = snd_ymfpci_timer_hw;
1951 }
1952 chip->timer = timer;
1953 return err;
1954}
1955
1956
1957/*
1958 * proc interface
1959 */
1960
208a1b4c
TI		 1961static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
1962 struct snd_info_buffer *buffer)
1da177e4 1963{
208a1b4c 1964 struct snd_ymfpci *chip = entry->private_data;
1da177e4
LT		 1965 int i;
1966
1967 snd_iprintf(buffer, "YMFPCI\n\n");
1968 for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1969 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1970}
1971
e23e7a14 1972static int snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
1da177e4 1973{
47f2769b 1974 return snd_card_ro_proc_new(card, "ymfpci", chip, snd_ymfpci_proc_read);
1da177e4
LT		 1975}
1976
1977/*
1978 * initialization routines
1979 */
1980
1981static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
1982{
1983 u8 cmd;
1984
1985 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
1986#if 0 // force to reset
1987 if (cmd & 0x03) {
1988#endif
1989 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1990 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
1991 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1992 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
1993 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
1994#if 0
1995 }
1996#endif
1997}
1998
208a1b4c 1999static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
1da177e4
LT		 2000{
2001 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
2002}
2003
208a1b4c 2004static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
1da177e4
LT		 2005{
2006 u32 val;
2007 int timeout = 1000;
2008
2009 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
2010 if (val)
2011 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
2012 while (timeout-- > 0) {
2013 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
2014 if ((val & 0x00000002) == 0)
2015 break;
2016 }
2017}
2018
102fa906
CL		 2019static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
2020{
2021 int err, is_1e;
2022 const char *name;
2023
2024 err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
2025 &chip->pci->dev);
2026 if (err >= 0) {
b82a82d0 2027 if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) {
6436bcf6
TI		 2028 dev_err(chip->card->dev,
2029 "DSP microcode has wrong size\n");
102fa906
CL		 2030 err = -EINVAL;
2031 }
2032 }
b7dd2b34 2033 if (err < 0)
102fa906 2034 return err;
102fa906
CL		 2035 is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
2036 chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
2037 chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
2038 chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
2039 name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
2040 err = request_firmware(&chip->controller_microcode, name,
2041 &chip->pci->dev);
2042 if (err >= 0) {
b82a82d0 2043 if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) {
6436bcf6
TI		 2044 dev_err(chip->card->dev,
2045 "controller microcode has wrong size\n");
102fa906
CL		 2046 err = -EINVAL;
2047 }
2048 }
b7dd2b34 2049 if (err < 0)
102fa906 2050 return err;
102fa906
CL		 2051 return 0;
2052}
7e0af29d
CL		 2053
2054MODULE_FIRMWARE("yamaha/ds1_dsp.fw");
2055MODULE_FIRMWARE("yamaha/ds1_ctrl.fw");
2056MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw");
2057
208a1b4c 2058static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
1da177e4
LT		 2059{
2060 int i;
2061 u16 ctrl;
b82a82d0 2062 const __le32 *inst;
1da177e4
LT		 2063
2064 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
2065 snd_ymfpci_disable_dsp(chip);
2066 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
2067 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
2068 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
2069 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
2070 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
2071 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
2072 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
2073 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2074 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2075
2076 /* setup DSP instruction code */
b82a82d0 2077 inst = (const __le32 *)chip->dsp_microcode->data;
1da177e4 2078 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
b82a82d0
DW		 2079 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2),
2080 le32_to_cpu(inst[i]));
1da177e4
LT		 2081
2082 /* setup control instruction code */
b82a82d0 2083 inst = (const __le32 *)chip->controller_microcode->data;
1da177e4 2084 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
b82a82d0
DW		 2085 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2),
2086 le32_to_cpu(inst[i]));
1da177e4
LT		 2087
2088 snd_ymfpci_enable_dsp(chip);
2089}
2090
e23e7a14 2091static int snd_ymfpci_memalloc(struct snd_ymfpci *chip)
1da177e4
LT		 2092{
2093 long size, playback_ctrl_size;
2094 int voice, bank, reg;
2095 u8 *ptr;
2096 dma_addr_t ptr_addr;
2097
2098 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
2099 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
2100 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
2101 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
2102 chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
2103
7ab39926
CL		 2104 size = ALIGN(playback_ctrl_size, 0x100) +
2105 ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
2106 ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
2107 ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
1da177e4
LT		 2108 chip->work_size;
2109 /* work_ptr must be aligned to 256 bytes, but it's already
2110 covered with the kernel page allocation mechanism */
2111 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
2112 size, &chip->work_ptr) < 0)
2113 return -ENOMEM;
2114 ptr = chip->work_ptr.area;
2115 ptr_addr = chip->work_ptr.addr;
2116 memset(ptr, 0, size); /* for sure */
2117
2118 chip->bank_base_playback = ptr;
2119 chip->bank_base_playback_addr = ptr_addr;
d3c63763 2120 chip->ctrl_playback = (__le32 *)ptr;
1da177e4 2121 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
7ab39926
CL		 2122 ptr += ALIGN(playback_ctrl_size, 0x100);
2123 ptr_addr += ALIGN(playback_ctrl_size, 0x100);
1da177e4
LT		 2124 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
2125 chip->voices[voice].number = voice;
208a1b4c 2126 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
1da177e4
LT		 2127 chip->voices[voice].bank_addr = ptr_addr;
2128 for (bank = 0; bank < 2; bank++) {
208a1b4c 2129 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
1da177e4
LT		 2130 ptr += chip->bank_size_playback;
2131 ptr_addr += chip->bank_size_playback;
2132 }
2133 }
7ab39926
CL		 2134 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2135 ptr_addr = ALIGN(ptr_addr, 0x100);
1da177e4
LT		 2136 chip->bank_base_capture = ptr;
2137 chip->bank_base_capture_addr = ptr_addr;
2138 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2139 for (bank = 0; bank < 2; bank++) {
208a1b4c 2140 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
1da177e4
LT		 2141 ptr += chip->bank_size_capture;
2142 ptr_addr += chip->bank_size_capture;
2143 }
7ab39926
CL		 2144 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2145 ptr_addr = ALIGN(ptr_addr, 0x100);
1da177e4
LT		 2146 chip->bank_base_effect = ptr;
2147 chip->bank_base_effect_addr = ptr_addr;
2148 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2149 for (bank = 0; bank < 2; bank++) {
208a1b4c 2150 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
1da177e4
LT		 2151 ptr += chip->bank_size_effect;
2152 ptr_addr += chip->bank_size_effect;
2153 }
7ab39926
CL		 2154 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2155 ptr_addr = ALIGN(ptr_addr, 0x100);
1da177e4
LT		 2156 chip->work_base = ptr;
2157 chip->work_base_addr = ptr_addr;
2158
da3cec35
TI		 2159 snd_BUG_ON(ptr + chip->work_size !=
2160 chip->work_ptr.area + chip->work_ptr.bytes);
1da177e4
LT		 2161
2162 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2163 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2164 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2165 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2166 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2167
2168 /* S/PDIF output initialization */
2169 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2170 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2171 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2172
2173 /* S/PDIF input initialization */
2174 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2175
2176 /* digital mixer setup */
2177 for (reg = 0x80; reg < 0xc0; reg += 4)
2178 snd_ymfpci_writel(chip, reg, 0);
2179 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
4a3b6983 2180 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff);
1da177e4
LT		 2181 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2182 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2183 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2184 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2185 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2186 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2187
2188 return 0;
2189}
2190
208a1b4c 2191static int snd_ymfpci_free(struct snd_ymfpci *chip)
1da177e4
LT		 2192{
2193 u16 ctrl;
2194
da3cec35
TI		 2195 if (snd_BUG_ON(!chip))
2196 return -EINVAL;
1da177e4
LT		 2197
2198 if (chip->res_reg_area) { /* don't touch busy hardware */
2199 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2200 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2201 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2202 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2203 snd_ymfpci_disable_dsp(chip);
2204 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2205 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2206 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2207 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2208 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2209 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2210 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2211 }
2212
2213 snd_ymfpci_ac3_done(chip);
2214
2215 /* Set PCI device to D3 state */
2216#if 0
2217 /* FIXME: temporarily disabled, otherwise we cannot fire up
2218 * the chip again unless reboot. ACPI bug?
2219 */
db10e7fb 2220 pci_set_power_state(chip->pci, PCI_D3hot);
1da177e4
LT		 2221#endif
2222
c7561cd8 2223#ifdef CONFIG_PM_SLEEP
7009fa56 2224 kfree(chip->saved_regs);
1da177e4 2225#endif
95866d38
TI		 2226 if (chip->irq >= 0)
2227 free_irq(chip->irq, chip);
b1d5776d
TI		 2228 release_and_free_resource(chip->mpu_res);
2229 release_and_free_resource(chip->fm_res);
1da177e4 2230 snd_ymfpci_free_gameport(chip);
ff6defa6 2231 iounmap(chip->reg_area_virt);
1da177e4
LT		 2232 if (chip->work_ptr.area)
2233 snd_dma_free_pages(&chip->work_ptr);
2234
b1d5776d 2235 release_and_free_resource(chip->res_reg_area);
1da177e4
LT		 2236
2237 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2238
2239 pci_disable_device(chip->pci);
b7dd2b34
TI		 2240 release_firmware(chip->dsp_microcode);
2241 release_firmware(chip->controller_microcode);
1da177e4
LT		 2242 kfree(chip);
2243 return 0;
2244}
2245
208a1b4c 2246static int snd_ymfpci_dev_free(struct snd_device *device)
1da177e4 2247{
208a1b4c 2248 struct snd_ymfpci *chip = device->device_data;
1da177e4
LT		 2249 return snd_ymfpci_free(chip);
2250}
2251
c7561cd8 2252#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 2253static int saved_regs_index[] = {
2254 /* spdif */
2255 YDSXGR_SPDIFOUTCTRL,
2256 YDSXGR_SPDIFOUTSTATUS,
2257 YDSXGR_SPDIFINCTRL,
2258 /* volumes */
2259 YDSXGR_PRIADCLOOPVOL,
2260 YDSXGR_NATIVEDACINVOL,
2261 YDSXGR_NATIVEDACOUTVOL,
9ed1261e 2262 YDSXGR_BUF441OUTVOL,
1da177e4
LT		 2263 YDSXGR_NATIVEADCINVOL,
2264 YDSXGR_SPDIFLOOPVOL,
2265 YDSXGR_SPDIFOUTVOL,
2266 YDSXGR_ZVOUTVOL,
2267 YDSXGR_LEGACYOUTVOL,
2268 /* address bases */
2269 YDSXGR_PLAYCTRLBASE,
2270 YDSXGR_RECCTRLBASE,
2271 YDSXGR_EFFCTRLBASE,
2272 YDSXGR_WORKBASE,
2273 /* capture set up */
2274 YDSXGR_MAPOFREC,
2275 YDSXGR_RECFORMAT,
2276 YDSXGR_RECSLOTSR,
2277 YDSXGR_ADCFORMAT,
2278 YDSXGR_ADCSLOTSR,
2279};
2280#define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
2281
68cb2b55 2282static int snd_ymfpci_suspend(struct device *dev)
1da177e4 2283{
68cb2b55 2284 struct snd_card *card = dev_get_drvdata(dev);
ded46235 2285 struct snd_ymfpci *chip = card->private_data;
1da177e4
LT		 2286 unsigned int i;
2287
ded46235 2288 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT		 2289 snd_ac97_suspend(chip->ac97);
2290 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2291 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2292 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
28aa165c
TI		 2293 pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY,
2294 &chip->saved_dsxg_legacy);
2295 pci_read_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2296 &chip->saved_dsxg_elegacy);
1da177e4 2297 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
4a3b6983 2298 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
1da177e4 2299 snd_ymfpci_disable_dsp(chip);
1da177e4
LT		 2300 return 0;
2301}
2302
68cb2b55 2303static int snd_ymfpci_resume(struct device *dev)
1da177e4 2304{
68cb2b55
TI		 2305 struct pci_dev *pci = to_pci_dev(dev);
2306 struct snd_card *card = dev_get_drvdata(dev);
ded46235 2307 struct snd_ymfpci *chip = card->private_data;
1da177e4
LT		 2308 unsigned int i;
2309
ded46235 2310 snd_ymfpci_aclink_reset(pci);
1da177e4
LT		 2311 snd_ymfpci_codec_ready(chip, 0);
2312 snd_ymfpci_download_image(chip);
2313 udelay(100);
2314
2315 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2316 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2317
2318 snd_ac97_resume(chip->ac97);
2319
28aa165c
TI		 2320 pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY,
2321 chip->saved_dsxg_legacy);
2322 pci_write_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2323 chip->saved_dsxg_elegacy);
2324
1da177e4
LT		 2325 /* start hw again */
2326 if (chip->start_count > 0) {
2327 spin_lock_irq(&chip->reg_lock);
2328 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2329 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2330 spin_unlock_irq(&chip->reg_lock);
2331 }
ded46235 2332 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 2333 return 0;
2334}
68cb2b55
TI		 2335
2336SIMPLE_DEV_PM_OPS(snd_ymfpci_pm, snd_ymfpci_suspend, snd_ymfpci_resume);
c7561cd8 2337#endif /* CONFIG_PM_SLEEP */
1da177e4 2338
e23e7a14
BP		 2339int snd_ymfpci_create(struct snd_card *card,
2340 struct pci_dev *pci,
2341 unsigned short old_legacy_ctrl,
2342 struct snd_ymfpci **rchip)
1da177e4 2343{
208a1b4c 2344 struct snd_ymfpci *chip;
1da177e4 2345 int err;
208a1b4c 2346 static struct snd_device_ops ops = {
1da177e4
LT		 2347 .dev_free = snd_ymfpci_dev_free,
2348 };
2349
2350 *rchip = NULL;
2351
2352 /* enable PCI device */
2353 if ((err = pci_enable_device(pci)) < 0)
2354 return err;
2355
e560d8d8 2356 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 2357 if (chip == NULL) {
2358 pci_disable_device(pci);
2359 return -ENOMEM;
2360 }
2361 chip->old_legacy_ctrl = old_legacy_ctrl;
2362 spin_lock_init(&chip->reg_lock);
2363 spin_lock_init(&chip->voice_lock);
2364 init_waitqueue_head(&chip->interrupt_sleep);
2365 atomic_set(&chip->interrupt_sleep_count, 0);
2366 chip->card = card;
2367 chip->pci = pci;
2368 chip->irq = -1;
2369 chip->device_id = pci->device;
44c10138 2370 chip->rev = pci->revision;
1da177e4
LT		 2371 chip->reg_area_phys = pci_resource_start(pci, 0);
2372 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
2373 pci_set_master(pci);
9ed1261e 2374 chip->src441_used = -1;
1da177e4
LT		 2375
2376 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
6436bcf6
TI		 2377 dev_err(chip->card->dev,
2378 "unable to grab memory region 0x%lx-0x%lx\n",
2379 chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
ba2186e4
ME		 2380 err = -EBUSY;
2381 goto free_chip;
1da177e4 2382 }
437a5a46 2383 if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
934c2b6d 2384 KBUILD_MODNAME, chip)) {
6436bcf6 2385 dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq);
ba2186e4
ME		 2386 err = -EBUSY;
2387 goto free_chip;
1da177e4
LT		 2388 }
2389 chip->irq = pci->irq;
2390
2391 snd_ymfpci_aclink_reset(pci);
2392 if (snd_ymfpci_codec_ready(chip, 0) < 0) {
ba2186e4
ME		 2393 err = -EIO;
2394 goto free_chip;
1da177e4
LT		 2395 }
2396
102fa906
CL		 2397 err = snd_ymfpci_request_firmware(chip);
2398 if (err < 0) {
6436bcf6 2399 dev_err(chip->card->dev, "firmware request failed: %d\n", err);
ba2186e4 2400 goto free_chip;
102fa906 2401 }
1da177e4
LT		 2402 snd_ymfpci_download_image(chip);
2403
2404 udelay(100); /* seems we need a delay after downloading image.. */
2405
2406 if (snd_ymfpci_memalloc(chip) < 0) {
ba2186e4
ME		 2407 err = -EIO;
2408 goto free_chip;
1da177e4
LT		 2409 }
2410
ba2186e4
ME		 2411 err = snd_ymfpci_ac3_init(chip);
2412 if (err < 0)
2413 goto free_chip;
1da177e4 2414
c7561cd8 2415#ifdef CONFIG_PM_SLEEP
6da2ec56
KC		 2416 chip->saved_regs = kmalloc_array(YDSXGR_NUM_SAVED_REGS, sizeof(u32),
2417 GFP_KERNEL);
1da177e4 2418 if (chip->saved_regs == NULL) {
ba2186e4
ME		 2419 err = -ENOMEM;
2420 goto free_chip;
1da177e4 2421 }
1da177e4
LT		 2422#endif
2423
ba2186e4
ME		 2424 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
2425 if (err < 0)
2426 goto free_chip;
1da177e4
LT		 2427
2428 snd_ymfpci_proc_init(card, chip);
2429
1da177e4
LT		 2430 *rchip = chip;
2431 return 0;
ba2186e4
ME		 2432
2433free_chip:
2434 snd_ymfpci_free(chip);
2435 return err;
1da177e4 2436}
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