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CommitLineData
1da177e4
LT
1/*
2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Routines for control of YMF724/740/744/754 chips
4 *
1da177e4
LT
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 *
19 */
20
21#include <sound/driver.h>
22#include <linux/delay.h>
102fa906 23#include <linux/firmware.h>
1da177e4
LT
24#include <linux/init.h>
25#include <linux/interrupt.h>
26#include <linux/pci.h>
27#include <linux/sched.h>
28#include <linux/slab.h>
29#include <linux/vmalloc.h>
30
31#include <sound/core.h>
32#include <sound/control.h>
33#include <sound/info.h>
33925186 34#include <sound/tlv.h>
1da177e4
LT
35#include <sound/ymfpci.h>
36#include <sound/asoundef.h>
37#include <sound/mpu401.h>
38
39#include <asm/io.h>
102fa906 40#include <asm/byteorder.h>
1da177e4
LT
41
42/*
43 * common I/O routines
44 */
45
208a1b4c 46static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
1da177e4 47
208a1b4c 48static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT
49{
50 return readb(chip->reg_area_virt + offset);
51}
52
208a1b4c 53static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
1da177e4
LT
54{
55 writeb(val, chip->reg_area_virt + offset);
56}
57
208a1b4c 58static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT
59{
60 return readw(chip->reg_area_virt + offset);
61}
62
208a1b4c 63static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
1da177e4
LT
64{
65 writew(val, chip->reg_area_virt + offset);
66}
67
208a1b4c 68static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT
69{
70 return readl(chip->reg_area_virt + offset);
71}
72
208a1b4c 73static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
1da177e4
LT
74{
75 writel(val, chip->reg_area_virt + offset);
76}
77
208a1b4c 78static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
1da177e4 79{
ef21ca24 80 unsigned long end_time;
1da177e4
LT
81 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
82
ef21ca24 83 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT
84 do {
85 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
86 return 0;
87 set_current_state(TASK_UNINTERRUPTIBLE);
8433a509 88 schedule_timeout_uninterruptible(1);
ef21ca24 89 } while (time_before(jiffies, end_time));
99b359ba 90 snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
1da177e4
LT
91 return -EBUSY;
92}
93
208a1b4c 94static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
1da177e4 95{
208a1b4c 96 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT
97 u32 cmd;
98
99 snd_ymfpci_codec_ready(chip, 0);
100 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
101 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
102}
103
208a1b4c 104static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
1da177e4 105{
208a1b4c 106 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT
107
108 if (snd_ymfpci_codec_ready(chip, 0))
109 return ~0;
110 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
111 if (snd_ymfpci_codec_ready(chip, 0))
112 return ~0;
113 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
114 int i;
115 for (i = 0; i < 600; i++)
116 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
117 }
118 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
119}
120
121/*
122 * Misc routines
123 */
124
125static u32 snd_ymfpci_calc_delta(u32 rate)
126{
127 switch (rate) {
128 case 8000: return 0x02aaab00;
129 case 11025: return 0x03accd00;
130 case 16000: return 0x05555500;
131 case 22050: return 0x07599a00;
132 case 32000: return 0x0aaaab00;
133 case 44100: return 0x0eb33300;
134 default: return ((rate << 16) / 375) << 5;
135 }
136}
137
138static u32 def_rate[8] = {
139 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
140};
141
142static u32 snd_ymfpci_calc_lpfK(u32 rate)
143{
144 u32 i;
145 static u32 val[8] = {
146 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
147 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
148 };
149
150 if (rate == 44100)
151 return 0x40000000; /* FIXME: What's the right value? */
152 for (i = 0; i < 8; i++)
153 if (rate <= def_rate[i])
154 return val[i];
155 return val[0];
156}
157
158static u32 snd_ymfpci_calc_lpfQ(u32 rate)
159{
160 u32 i;
161 static u32 val[8] = {
162 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
163 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
164 };
165
166 if (rate == 44100)
167 return 0x370A0000;
168 for (i = 0; i < 8; i++)
169 if (rate <= def_rate[i])
170 return val[i];
171 return val[0];
172}
173
9ed1261e
TK
174static void snd_ymfpci_pcm_441_volume_set(struct snd_ymfpci_pcm *ypcm)
175{
176 unsigned int value;
177 struct snd_ymfpci_pcm_mixer *mixer;
178
179 mixer = &ypcm->chip->pcm_mixer[ypcm->substream->number];
180 value = min_t(unsigned int, mixer->left, 0x7fff) >> 1;
181 value |= (min_t(unsigned int, mixer->right, 0x7fff) >> 1) << 16;
182 snd_ymfpci_writel(ypcm->chip, YDSXGR_BUF441OUTVOL, value);
183}
184
1da177e4
LT
185/*
186 * Hardware start management
187 */
188
208a1b4c 189static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
1da177e4
LT
190{
191 unsigned long flags;
192
193 spin_lock_irqsave(&chip->reg_lock, flags);
194 if (chip->start_count++ > 0)
195 goto __end;
196 snd_ymfpci_writel(chip, YDSXGR_MODE,
197 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
198 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
199 __end:
200 spin_unlock_irqrestore(&chip->reg_lock, flags);
201}
202
208a1b4c 203static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
1da177e4
LT
204{
205 unsigned long flags;
206 long timeout = 1000;
207
208 spin_lock_irqsave(&chip->reg_lock, flags);
209 if (--chip->start_count > 0)
210 goto __end;
211 snd_ymfpci_writel(chip, YDSXGR_MODE,
212 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
213 while (timeout-- > 0) {
214 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
215 break;
216 }
217 if (atomic_read(&chip->interrupt_sleep_count)) {
218 atomic_set(&chip->interrupt_sleep_count, 0);
219 wake_up(&chip->interrupt_sleep);
220 }
221 __end:
222 spin_unlock_irqrestore(&chip->reg_lock, flags);
223}
224
225/*
226 * Playback voice management
227 */
228
208a1b4c
TI
229static int voice_alloc(struct snd_ymfpci *chip,
230 enum snd_ymfpci_voice_type type, int pair,
231 struct snd_ymfpci_voice **rvoice)
1da177e4 232{
208a1b4c 233 struct snd_ymfpci_voice *voice, *voice2;
1da177e4
LT
234 int idx;
235
236 *rvoice = NULL;
237 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
238 voice = &chip->voices[idx];
239 voice2 = pair ? &chip->voices[idx+1] : NULL;
240 if (voice->use || (voice2 && voice2->use))
241 continue;
242 voice->use = 1;
243 if (voice2)
244 voice2->use = 1;
245 switch (type) {
246 case YMFPCI_PCM:
247 voice->pcm = 1;
248 if (voice2)
249 voice2->pcm = 1;
250 break;
251 case YMFPCI_SYNTH:
252 voice->synth = 1;
253 break;
254 case YMFPCI_MIDI:
255 voice->midi = 1;
256 break;
257 }
258 snd_ymfpci_hw_start(chip);
259 if (voice2)
260 snd_ymfpci_hw_start(chip);
261 *rvoice = voice;
262 return 0;
263 }
264 return -ENOMEM;
265}
266
208a1b4c
TI
267static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
268 enum snd_ymfpci_voice_type type, int pair,
269 struct snd_ymfpci_voice **rvoice)
1da177e4
LT
270{
271 unsigned long flags;
272 int result;
273
274 snd_assert(rvoice != NULL, return -EINVAL);
275 snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL);
276
277 spin_lock_irqsave(&chip->voice_lock, flags);
278 for (;;) {
279 result = voice_alloc(chip, type, pair, rvoice);
280 if (result == 0 || type != YMFPCI_PCM)
281 break;
282 /* TODO: synth/midi voice deallocation */
283 break;
284 }
285 spin_unlock_irqrestore(&chip->voice_lock, flags);
286 return result;
287}
288
208a1b4c 289static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
1da177e4
LT
290{
291 unsigned long flags;
292
293 snd_assert(pvoice != NULL, return -EINVAL);
294 snd_ymfpci_hw_stop(chip);
295 spin_lock_irqsave(&chip->voice_lock, flags);
9ed1261e
TK
296 if (pvoice->number == chip->src441_used) {
297 chip->src441_used = -1;
298 pvoice->ypcm->use_441_slot = 0;
299 }
1da177e4
LT
300 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
301 pvoice->ypcm = NULL;
302 pvoice->interrupt = NULL;
303 spin_unlock_irqrestore(&chip->voice_lock, flags);
304 return 0;
305}
306
307/*
308 * PCM part
309 */
310
208a1b4c 311static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
1da177e4 312{
208a1b4c 313 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT
314 u32 pos, delta;
315
316 if ((ypcm = voice->ypcm) == NULL)
317 return;
318 if (ypcm->substream == NULL)
319 return;
320 spin_lock(&chip->reg_lock);
321 if (ypcm->running) {
322 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
323 if (pos < ypcm->last_pos)
324 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
325 else
326 delta = pos - ypcm->last_pos;
327 ypcm->period_pos += delta;
328 ypcm->last_pos = pos;
329 if (ypcm->period_pos >= ypcm->period_size) {
330 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
331 ypcm->period_pos %= ypcm->period_size;
332 spin_unlock(&chip->reg_lock);
333 snd_pcm_period_elapsed(ypcm->substream);
334 spin_lock(&chip->reg_lock);
335 }
9bcf6551
CL
336
337 if (unlikely(ypcm->update_pcm_vol)) {
338 unsigned int subs = ypcm->substream->number;
339 unsigned int next_bank = 1 - chip->active_bank;
208a1b4c 340 struct snd_ymfpci_playback_bank *bank;
9bcf6551
CL
341 u32 volume;
342
343 bank = &voice->bank[next_bank];
344 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
345 bank->left_gain_end = volume;
346 if (ypcm->output_rear)
347 bank->eff2_gain_end = volume;
348 if (ypcm->voices[1])
349 bank = &ypcm->voices[1]->bank[next_bank];
350 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
351 bank->right_gain_end = volume;
352 if (ypcm->output_rear)
353 bank->eff3_gain_end = volume;
354 ypcm->update_pcm_vol--;
355 }
1da177e4
LT
356 }
357 spin_unlock(&chip->reg_lock);
358}
359
208a1b4c 360static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
1da177e4 361{
208a1b4c
TI
362 struct snd_pcm_runtime *runtime = substream->runtime;
363 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
364 struct snd_ymfpci *chip = ypcm->chip;
1da177e4
LT
365 u32 pos, delta;
366
367 spin_lock(&chip->reg_lock);
368 if (ypcm->running) {
369 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
370 if (pos < ypcm->last_pos)
371 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
372 else
373 delta = pos - ypcm->last_pos;
374 ypcm->period_pos += delta;
375 ypcm->last_pos = pos;
376 if (ypcm->period_pos >= ypcm->period_size) {
377 ypcm->period_pos %= ypcm->period_size;
378 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
379 spin_unlock(&chip->reg_lock);
380 snd_pcm_period_elapsed(substream);
381 spin_lock(&chip->reg_lock);
382 }
383 }
384 spin_unlock(&chip->reg_lock);
385}
386
208a1b4c 387static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
388 int cmd)
389{
208a1b4c
TI
390 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
391 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1da177e4
LT
392 int result = 0;
393
394 spin_lock(&chip->reg_lock);
395 if (ypcm->voices[0] == NULL) {
396 result = -EINVAL;
397 goto __unlock;
398 }
399 switch (cmd) {
400 case SNDRV_PCM_TRIGGER_START:
401 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
402 case SNDRV_PCM_TRIGGER_RESUME:
403 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
9ed1261e 404 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
1da177e4
LT
405 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
406 ypcm->running = 1;
407 break;
408 case SNDRV_PCM_TRIGGER_STOP:
409 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
410 case SNDRV_PCM_TRIGGER_SUSPEND:
411 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
9ed1261e 412 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
1da177e4
LT
413 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
414 ypcm->running = 0;
415 break;
416 default:
417 result = -EINVAL;
418 break;
419 }
420 __unlock:
421 spin_unlock(&chip->reg_lock);
422 return result;
423}
208a1b4c 424static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
425 int cmd)
426{
208a1b4c
TI
427 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
428 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1da177e4
LT
429 int result = 0;
430 u32 tmp;
431
432 spin_lock(&chip->reg_lock);
433 switch (cmd) {
434 case SNDRV_PCM_TRIGGER_START:
435 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
436 case SNDRV_PCM_TRIGGER_RESUME:
437 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
438 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
439 ypcm->running = 1;
440 break;
441 case SNDRV_PCM_TRIGGER_STOP:
442 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
443 case SNDRV_PCM_TRIGGER_SUSPEND:
444 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
445 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
446 ypcm->running = 0;
447 break;
448 default:
449 result = -EINVAL;
450 break;
451 }
452 spin_unlock(&chip->reg_lock);
453 return result;
454}
455
208a1b4c 456static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
1da177e4
LT
457{
458 int err;
459
460 if (ypcm->voices[1] != NULL && voices < 2) {
461 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
462 ypcm->voices[1] = NULL;
463 }
464 if (voices == 1 && ypcm->voices[0] != NULL)
465 return 0; /* already allocated */
466 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
467 return 0; /* already allocated */
468 if (voices > 1) {
469 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
470 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
471 ypcm->voices[0] = NULL;
472 }
473 }
474 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
475 if (err < 0)
476 return err;
477 ypcm->voices[0]->ypcm = ypcm;
478 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
479 if (voices > 1) {
480 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
481 ypcm->voices[1]->ypcm = ypcm;
482 }
483 return 0;
484}
485
208a1b4c
TI
486static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
487 struct snd_pcm_runtime *runtime,
9bcf6551 488 int has_pcm_volume)
1da177e4 489{
208a1b4c 490 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
1da177e4 491 u32 format;
9bcf6551
CL
492 u32 delta = snd_ymfpci_calc_delta(runtime->rate);
493 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
494 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
208a1b4c 495 struct snd_ymfpci_playback_bank *bank;
1da177e4 496 unsigned int nbank;
9bcf6551
CL
497 u32 vol_left, vol_right;
498 u8 use_left, use_right;
9ed1261e 499 unsigned long flags;
1da177e4
LT
500
501 snd_assert(voice != NULL, return);
9bcf6551
CL
502 if (runtime->channels == 1) {
503 use_left = 1;
504 use_right = 1;
505 } else {
506 use_left = (voiceidx & 1) == 0;
507 use_right = !use_left;
508 }
509 if (has_pcm_volume) {
510 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
511 [ypcm->substream->number].left << 15);
512 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
513 [ypcm->substream->number].right << 15);
514 } else {
515 vol_left = cpu_to_le32(0x40000000);
516 vol_right = cpu_to_le32(0x40000000);
517 }
9ed1261e 518 spin_lock_irqsave(&ypcm->chip->voice_lock, flags);
9bcf6551
CL
519 format = runtime->channels == 2 ? 0x00010000 : 0;
520 if (snd_pcm_format_width(runtime->format) == 8)
521 format |= 0x80000000;
9ed1261e
TK
522 else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
523 runtime->rate == 44100 && runtime->channels == 2 &&
524 voiceidx == 0 && (ypcm->chip->src441_used == -1 ||
525 ypcm->chip->src441_used == voice->number)) {
526 ypcm->chip->src441_used = voice->number;
527 ypcm->use_441_slot = 1;
528 format |= 0x10000000;
529 snd_ymfpci_pcm_441_volume_set(ypcm);
530 }
531 if (ypcm->chip->src441_used == voice->number &&
532 (format & 0x10000000) == 0) {
533 ypcm->chip->src441_used = -1;
534 ypcm->use_441_slot = 0;
535 }
9bcf6551
CL
536 if (runtime->channels == 2 && (voiceidx & 1) != 0)
537 format |= 1;
9ed1261e 538 spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags);
1da177e4
LT
539 for (nbank = 0; nbank < 2; nbank++) {
540 bank = &voice->bank[nbank];
9bcf6551 541 memset(bank, 0, sizeof(*bank));
1da177e4 542 bank->format = cpu_to_le32(format);
9bcf6551
CL
543 bank->base = cpu_to_le32(runtime->dma_addr);
544 bank->loop_end = cpu_to_le32(ypcm->buffer_size);
1da177e4 545 bank->lpfQ = cpu_to_le32(lpfQ);
1da177e4
LT
546 bank->delta =
547 bank->delta_end = cpu_to_le32(delta);
548 bank->lpfK =
549 bank->lpfK_end = cpu_to_le32(lpfK);
9bcf6551
CL
550 bank->eg_gain =
551 bank->eg_gain_end = cpu_to_le32(0x40000000);
552
553 if (ypcm->output_front) {
554 if (use_left) {
555 bank->left_gain =
556 bank->left_gain_end = vol_left;
557 }
558 if (use_right) {
1da177e4 559 bank->right_gain =
9bcf6551 560 bank->right_gain_end = vol_right;
1da177e4 561 }
9bcf6551
CL
562 }
563 if (ypcm->output_rear) {
5a25c5cf
JK
564 if (!ypcm->swap_rear) {
565 if (use_left) {
566 bank->eff2_gain =
567 bank->eff2_gain_end = vol_left;
568 }
569 if (use_right) {
570 bank->eff3_gain =
571 bank->eff3_gain_end = vol_right;
572 }
573 } else {
574 /* The SPDIF out channels seem to be swapped, so we have
575 * to swap them here, too. The rear analog out channels
576 * will be wrong, but otherwise AC3 would not work.
577 */
578 if (use_left) {
579 bank->eff3_gain =
580 bank->eff3_gain_end = vol_left;
581 }
582 if (use_right) {
583 bank->eff2_gain =
584 bank->eff2_gain_end = vol_right;
585 }
586 }
587 }
1da177e4
LT
588 }
589}
590
208a1b4c 591static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
1da177e4
LT
592{
593 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
594 4096, &chip->ac3_tmp_base) < 0)
595 return -ENOMEM;
596
597 chip->bank_effect[3][0]->base =
598 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
599 chip->bank_effect[3][0]->loop_end =
600 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
601 chip->bank_effect[4][0]->base =
602 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
603 chip->bank_effect[4][0]->loop_end =
604 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
605
606 spin_lock_irq(&chip->reg_lock);
607 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
608 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
609 spin_unlock_irq(&chip->reg_lock);
610 return 0;
611}
612
208a1b4c 613static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
1da177e4
LT
614{
615 spin_lock_irq(&chip->reg_lock);
616 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
617 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
618 spin_unlock_irq(&chip->reg_lock);
619 // snd_ymfpci_irq_wait(chip);
620 if (chip->ac3_tmp_base.area) {
621 snd_dma_free_pages(&chip->ac3_tmp_base);
622 chip->ac3_tmp_base.area = NULL;
623 }
624 return 0;
625}
626
208a1b4c
TI
627static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
628 struct snd_pcm_hw_params *hw_params)
1da177e4 629{
208a1b4c
TI
630 struct snd_pcm_runtime *runtime = substream->runtime;
631 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT
632 int err;
633
634 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
635 return err;
636 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
637 return err;
638 return 0;
639}
640
208a1b4c 641static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
1da177e4 642{
208a1b4c
TI
643 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
644 struct snd_pcm_runtime *runtime = substream->runtime;
645 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT
646
647 if (runtime->private_data == NULL)
648 return 0;
649 ypcm = runtime->private_data;
650
651 /* wait, until the PCI operations are not finished */
652 snd_ymfpci_irq_wait(chip);
653 snd_pcm_lib_free_pages(substream);
654 if (ypcm->voices[1]) {
655 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
656 ypcm->voices[1] = NULL;
657 }
658 if (ypcm->voices[0]) {
659 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
660 ypcm->voices[0] = NULL;
661 }
662 return 0;
663}
664
208a1b4c 665static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 666{
208a1b4c
TI
667 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
668 struct snd_pcm_runtime *runtime = substream->runtime;
669 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT
670 unsigned int nvoice;
671
672 ypcm->period_size = runtime->period_size;
673 ypcm->buffer_size = runtime->buffer_size;
674 ypcm->period_pos = 0;
675 ypcm->last_pos = 0;
676 for (nvoice = 0; nvoice < runtime->channels; nvoice++)
9bcf6551
CL
677 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
678 substream->pcm == chip->pcm);
1da177e4
LT
679 return 0;
680}
681
208a1b4c
TI
682static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
683 struct snd_pcm_hw_params *hw_params)
1da177e4
LT
684{
685 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
686}
687
208a1b4c 688static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
1da177e4 689{
208a1b4c 690 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
691
692 /* wait, until the PCI operations are not finished */
693 snd_ymfpci_irq_wait(chip);
694 return snd_pcm_lib_free_pages(substream);
695}
696
208a1b4c 697static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 698{
208a1b4c
TI
699 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
700 struct snd_pcm_runtime *runtime = substream->runtime;
701 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
702 struct snd_ymfpci_capture_bank * bank;
1da177e4
LT
703 int nbank;
704 u32 rate, format;
705
706 ypcm->period_size = runtime->period_size;
707 ypcm->buffer_size = runtime->buffer_size;
708 ypcm->period_pos = 0;
709 ypcm->last_pos = 0;
710 ypcm->shift = 0;
711 rate = ((48000 * 4096) / runtime->rate) - 1;
712 format = 0;
713 if (runtime->channels == 2) {
714 format |= 2;
715 ypcm->shift++;
716 }
717 if (snd_pcm_format_width(runtime->format) == 8)
718 format |= 1;
719 else
720 ypcm->shift++;
721 switch (ypcm->capture_bank_number) {
722 case 0:
723 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
724 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
725 break;
726 case 1:
727 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
728 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
729 break;
730 }
731 for (nbank = 0; nbank < 2; nbank++) {
732 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
733 bank->base = cpu_to_le32(runtime->dma_addr);
734 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
735 bank->start = 0;
736 bank->num_of_loops = 0;
737 }
738 return 0;
739}
740
208a1b4c 741static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 742{
208a1b4c
TI
743 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
744 struct snd_pcm_runtime *runtime = substream->runtime;
745 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
746 struct snd_ymfpci_voice *voice = ypcm->voices[0];
1da177e4
LT
747
748 if (!(ypcm->running && voice))
749 return 0;
750 return le32_to_cpu(voice->bank[chip->active_bank].start);
751}
752
208a1b4c 753static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 754{
208a1b4c
TI
755 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
756 struct snd_pcm_runtime *runtime = substream->runtime;
757 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT
758
759 if (!ypcm->running)
760 return 0;
761 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
762}
763
208a1b4c 764static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
1da177e4
LT
765{
766 wait_queue_t wait;
767 int loops = 4;
768
769 while (loops-- > 0) {
770 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
771 continue;
772 init_waitqueue_entry(&wait, current);
773 add_wait_queue(&chip->interrupt_sleep, &wait);
774 atomic_inc(&chip->interrupt_sleep_count);
8433a509 775 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
1da177e4
LT
776 remove_wait_queue(&chip->interrupt_sleep, &wait);
777 }
778}
779
7d12e780 780static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
1da177e4 781{
208a1b4c 782 struct snd_ymfpci *chip = dev_id;
1da177e4 783 u32 status, nvoice, mode;
208a1b4c 784 struct snd_ymfpci_voice *voice;
1da177e4
LT
785
786 status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
787 if (status & 0x80000000) {
788 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
789 spin_lock(&chip->voice_lock);
790 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
791 voice = &chip->voices[nvoice];
792 if (voice->interrupt)
793 voice->interrupt(chip, voice);
794 }
795 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
796 if (chip->capture_substream[nvoice])
797 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
798 }
799#if 0
800 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
801 if (chip->effect_substream[nvoice])
802 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
803 }
804#endif
805 spin_unlock(&chip->voice_lock);
806 spin_lock(&chip->reg_lock);
807 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
808 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
809 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
810 spin_unlock(&chip->reg_lock);
811
812 if (atomic_read(&chip->interrupt_sleep_count)) {
813 atomic_set(&chip->interrupt_sleep_count, 0);
814 wake_up(&chip->interrupt_sleep);
815 }
816 }
817
818 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
819 if (status & 1) {
820 if (chip->timer)
821 snd_timer_interrupt(chip->timer, chip->timer->sticks);
822 }
823 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
824
825 if (chip->rawmidi)
7d12e780 826 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
1da177e4
LT
827 return IRQ_HANDLED;
828}
829
208a1b4c 830static struct snd_pcm_hardware snd_ymfpci_playback =
1da177e4
LT
831{
832 .info = (SNDRV_PCM_INFO_MMAP |
833 SNDRV_PCM_INFO_MMAP_VALID |
834 SNDRV_PCM_INFO_INTERLEAVED |
835 SNDRV_PCM_INFO_BLOCK_TRANSFER |
836 SNDRV_PCM_INFO_PAUSE |
837 SNDRV_PCM_INFO_RESUME),
838 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
839 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
840 .rate_min = 8000,
841 .rate_max = 48000,
842 .channels_min = 1,
843 .channels_max = 2,
844 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
845 .period_bytes_min = 64,
846 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
847 .periods_min = 3,
848 .periods_max = 1024,
849 .fifo_size = 0,
850};
851
208a1b4c 852static struct snd_pcm_hardware snd_ymfpci_capture =
1da177e4
LT
853{
854 .info = (SNDRV_PCM_INFO_MMAP |
855 SNDRV_PCM_INFO_MMAP_VALID |
856 SNDRV_PCM_INFO_INTERLEAVED |
857 SNDRV_PCM_INFO_BLOCK_TRANSFER |
858 SNDRV_PCM_INFO_PAUSE |
859 SNDRV_PCM_INFO_RESUME),
860 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
861 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
862 .rate_min = 8000,
863 .rate_max = 48000,
864 .channels_min = 1,
865 .channels_max = 2,
866 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
867 .period_bytes_min = 64,
868 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
869 .periods_min = 3,
870 .periods_max = 1024,
871 .fifo_size = 0,
872};
873
208a1b4c 874static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
1da177e4 875{
4d572776 876 kfree(runtime->private_data);
1da177e4
LT
877}
878
208a1b4c 879static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
1da177e4 880{
208a1b4c
TI
881 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
882 struct snd_pcm_runtime *runtime = substream->runtime;
883 struct snd_ymfpci_pcm *ypcm;
1da177e4 884
e560d8d8 885 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1da177e4
LT
886 if (ypcm == NULL)
887 return -ENOMEM;
888 ypcm->chip = chip;
889 ypcm->type = PLAYBACK_VOICE;
890 ypcm->substream = substream;
891 runtime->hw = snd_ymfpci_playback;
892 runtime->private_data = ypcm;
893 runtime->private_free = snd_ymfpci_pcm_free_substream;
894 /* FIXME? True value is 256/48 = 5.33333 ms */
895 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
896 return 0;
897}
898
899/* call with spinlock held */
208a1b4c 900static void ymfpci_open_extension(struct snd_ymfpci *chip)
1da177e4
LT
901{
902 if (! chip->rear_opened) {
903 if (! chip->spdif_opened) /* set AC3 */
904 snd_ymfpci_writel(chip, YDSXGR_MODE,
905 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
906 /* enable second codec (4CHEN) */
907 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
908 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
909 }
910}
911
912/* call with spinlock held */
208a1b4c 913static void ymfpci_close_extension(struct snd_ymfpci *chip)
1da177e4
LT
914{
915 if (! chip->rear_opened) {
916 if (! chip->spdif_opened)
917 snd_ymfpci_writel(chip, YDSXGR_MODE,
918 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
919 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
920 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
921 }
922}
923
208a1b4c 924static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
1da177e4 925{
208a1b4c
TI
926 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
927 struct snd_pcm_runtime *runtime = substream->runtime;
928 struct snd_ymfpci_pcm *ypcm;
929 struct snd_kcontrol *kctl;
1da177e4
LT
930 int err;
931
932 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
933 return err;
934 ypcm = runtime->private_data;
935 ypcm->output_front = 1;
936 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
d9301263 937 ypcm->swap_rear = 0;
1da177e4
LT
938 spin_lock_irq(&chip->reg_lock);
939 if (ypcm->output_rear) {
940 ymfpci_open_extension(chip);
941 chip->rear_opened++;
942 }
943 spin_unlock_irq(&chip->reg_lock);
9bcf6551
CL
944
945 kctl = chip->pcm_mixer[substream->number].ctl;
946 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
947 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
1da177e4
LT
948 return 0;
949}
950
208a1b4c 951static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
1da177e4 952{
208a1b4c
TI
953 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
954 struct snd_pcm_runtime *runtime = substream->runtime;
955 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT
956 int err;
957
958 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
959 return err;
960 ypcm = runtime->private_data;
961 ypcm->output_front = 0;
962 ypcm->output_rear = 1;
d9301263 963 ypcm->swap_rear = 1;
1da177e4
LT
964 spin_lock_irq(&chip->reg_lock);
965 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
966 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
967 ymfpci_open_extension(chip);
968 chip->spdif_pcm_bits = chip->spdif_bits;
969 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
970 chip->spdif_opened++;
971 spin_unlock_irq(&chip->reg_lock);
972
973 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
974 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
975 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
976 return 0;
977}
978
208a1b4c 979static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
1da177e4 980{
208a1b4c
TI
981 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
982 struct snd_pcm_runtime *runtime = substream->runtime;
983 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT
984 int err;
985
986 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
987 return err;
988 ypcm = runtime->private_data;
989 ypcm->output_front = 0;
990 ypcm->output_rear = 1;
d9301263 991 ypcm->swap_rear = 0;
1da177e4
LT
992 spin_lock_irq(&chip->reg_lock);
993 ymfpci_open_extension(chip);
994 chip->rear_opened++;
995 spin_unlock_irq(&chip->reg_lock);
996 return 0;
997}
998
208a1b4c 999static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
1da177e4
LT
1000 u32 capture_bank_number)
1001{
208a1b4c
TI
1002 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1003 struct snd_pcm_runtime *runtime = substream->runtime;
1004 struct snd_ymfpci_pcm *ypcm;
1da177e4 1005
e560d8d8 1006 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1da177e4
LT
1007 if (ypcm == NULL)
1008 return -ENOMEM;
1009 ypcm->chip = chip;
1010 ypcm->type = capture_bank_number + CAPTURE_REC;
1011 ypcm->substream = substream;
1012 ypcm->capture_bank_number = capture_bank_number;
1013 chip->capture_substream[capture_bank_number] = substream;
1014 runtime->hw = snd_ymfpci_capture;
1015 /* FIXME? True value is 256/48 = 5.33333 ms */
1016 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
1017 runtime->private_data = ypcm;
1018 runtime->private_free = snd_ymfpci_pcm_free_substream;
1019 snd_ymfpci_hw_start(chip);
1020 return 0;
1021}
1022
208a1b4c 1023static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
1da177e4
LT
1024{
1025 return snd_ymfpci_capture_open(substream, 0);
1026}
1027
208a1b4c 1028static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
1da177e4
LT
1029{
1030 return snd_ymfpci_capture_open(substream, 1);
1031}
1032
208a1b4c 1033static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
1da177e4
LT
1034{
1035 return 0;
1036}
1037
208a1b4c 1038static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
1da177e4 1039{
208a1b4c
TI
1040 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1041 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1042 struct snd_kcontrol *kctl;
1da177e4
LT
1043
1044 spin_lock_irq(&chip->reg_lock);
1045 if (ypcm->output_rear && chip->rear_opened > 0) {
1046 chip->rear_opened--;
1047 ymfpci_close_extension(chip);
1048 }
1049 spin_unlock_irq(&chip->reg_lock);
9bcf6551
CL
1050 kctl = chip->pcm_mixer[substream->number].ctl;
1051 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1052 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
1da177e4
LT
1053 return snd_ymfpci_playback_close_1(substream);
1054}
1055
208a1b4c 1056static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1057{
208a1b4c 1058 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
1059
1060 spin_lock_irq(&chip->reg_lock);
1061 chip->spdif_opened = 0;
1062 ymfpci_close_extension(chip);
1063 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1064 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1065 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1066 spin_unlock_irq(&chip->reg_lock);
1067 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1068 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1069 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1070 return snd_ymfpci_playback_close_1(substream);
1071}
1072
208a1b4c 1073static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
1da177e4 1074{
208a1b4c 1075 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
1076
1077 spin_lock_irq(&chip->reg_lock);
1078 if (chip->rear_opened > 0) {
1079 chip->rear_opened--;
1080 ymfpci_close_extension(chip);
1081 }
1082 spin_unlock_irq(&chip->reg_lock);
1083 return snd_ymfpci_playback_close_1(substream);
1084}
1085
208a1b4c 1086static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
1da177e4 1087{
208a1b4c
TI
1088 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1089 struct snd_pcm_runtime *runtime = substream->runtime;
1090 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT
1091
1092 if (ypcm != NULL) {
1093 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1094 snd_ymfpci_hw_stop(chip);
1095 }
1096 return 0;
1097}
1098
208a1b4c 1099static struct snd_pcm_ops snd_ymfpci_playback_ops = {
1da177e4
LT
1100 .open = snd_ymfpci_playback_open,
1101 .close = snd_ymfpci_playback_close,
1102 .ioctl = snd_pcm_lib_ioctl,
1103 .hw_params = snd_ymfpci_playback_hw_params,
1104 .hw_free = snd_ymfpci_playback_hw_free,
1105 .prepare = snd_ymfpci_playback_prepare,
1106 .trigger = snd_ymfpci_playback_trigger,
1107 .pointer = snd_ymfpci_playback_pointer,
1108};
1109
208a1b4c 1110static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
1da177e4
LT
1111 .open = snd_ymfpci_capture_rec_open,
1112 .close = snd_ymfpci_capture_close,
1113 .ioctl = snd_pcm_lib_ioctl,
1114 .hw_params = snd_ymfpci_capture_hw_params,
1115 .hw_free = snd_ymfpci_capture_hw_free,
1116 .prepare = snd_ymfpci_capture_prepare,
1117 .trigger = snd_ymfpci_capture_trigger,
1118 .pointer = snd_ymfpci_capture_pointer,
1119};
1120
208a1b4c 1121int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1122{
208a1b4c 1123 struct snd_pcm *pcm;
1da177e4
LT
1124 int err;
1125
1126 if (rpcm)
1127 *rpcm = NULL;
1128 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1129 return err;
1130 pcm->private_data = chip;
1da177e4
LT
1131
1132 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1133 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1134
1135 /* global setup */
1136 pcm->info_flags = 0;
1137 strcpy(pcm->name, "YMFPCI");
1138 chip->pcm = pcm;
1139
1140 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1141 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1142
1143 if (rpcm)
1144 *rpcm = pcm;
1145 return 0;
1146}
1147
208a1b4c 1148static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
1da177e4
LT
1149 .open = snd_ymfpci_capture_ac97_open,
1150 .close = snd_ymfpci_capture_close,
1151 .ioctl = snd_pcm_lib_ioctl,
1152 .hw_params = snd_ymfpci_capture_hw_params,
1153 .hw_free = snd_ymfpci_capture_hw_free,
1154 .prepare = snd_ymfpci_capture_prepare,
1155 .trigger = snd_ymfpci_capture_trigger,
1156 .pointer = snd_ymfpci_capture_pointer,
1157};
1158
208a1b4c 1159int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1160{
208a1b4c 1161 struct snd_pcm *pcm;
1da177e4
LT
1162 int err;
1163
1164 if (rpcm)
1165 *rpcm = NULL;
1166 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1167 return err;
1168 pcm->private_data = chip;
1da177e4
LT
1169
1170 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1171
1172 /* global setup */
1173 pcm->info_flags = 0;
1174 sprintf(pcm->name, "YMFPCI - %s",
1175 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1176 chip->pcm2 = pcm;
1177
1178 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1179 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1180
1181 if (rpcm)
1182 *rpcm = pcm;
1183 return 0;
1184}
1185
208a1b4c 1186static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
1da177e4
LT
1187 .open = snd_ymfpci_playback_spdif_open,
1188 .close = snd_ymfpci_playback_spdif_close,
1189 .ioctl = snd_pcm_lib_ioctl,
1190 .hw_params = snd_ymfpci_playback_hw_params,
1191 .hw_free = snd_ymfpci_playback_hw_free,
1192 .prepare = snd_ymfpci_playback_prepare,
1193 .trigger = snd_ymfpci_playback_trigger,
1194 .pointer = snd_ymfpci_playback_pointer,
1195};
1196
208a1b4c 1197int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1198{
208a1b4c 1199 struct snd_pcm *pcm;
1da177e4
LT
1200 int err;
1201
1202 if (rpcm)
1203 *rpcm = NULL;
1204 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1205 return err;
1206 pcm->private_data = chip;
1da177e4
LT
1207
1208 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1209
1210 /* global setup */
1211 pcm->info_flags = 0;
1212 strcpy(pcm->name, "YMFPCI - IEC958");
1213 chip->pcm_spdif = pcm;
1214
1215 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1216 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1217
1218 if (rpcm)
1219 *rpcm = pcm;
1220 return 0;
1221}
1222
208a1b4c 1223static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
1da177e4
LT
1224 .open = snd_ymfpci_playback_4ch_open,
1225 .close = snd_ymfpci_playback_4ch_close,
1226 .ioctl = snd_pcm_lib_ioctl,
1227 .hw_params = snd_ymfpci_playback_hw_params,
1228 .hw_free = snd_ymfpci_playback_hw_free,
1229 .prepare = snd_ymfpci_playback_prepare,
1230 .trigger = snd_ymfpci_playback_trigger,
1231 .pointer = snd_ymfpci_playback_pointer,
1232};
1233
208a1b4c 1234int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1da177e4 1235{
208a1b4c 1236 struct snd_pcm *pcm;
1da177e4
LT
1237 int err;
1238
1239 if (rpcm)
1240 *rpcm = NULL;
1241 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1242 return err;
1243 pcm->private_data = chip;
1da177e4
LT
1244
1245 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1246
1247 /* global setup */
1248 pcm->info_flags = 0;
1249 strcpy(pcm->name, "YMFPCI - Rear PCM");
1250 chip->pcm_4ch = pcm;
1251
1252 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1253 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1254
1255 if (rpcm)
1256 *rpcm = pcm;
1257 return 0;
1258}
1259
208a1b4c 1260static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1261{
1262 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1263 uinfo->count = 1;
1264 return 0;
1265}
1266
208a1b4c
TI
1267static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
1268 struct snd_ctl_elem_value *ucontrol)
1da177e4 1269{
208a1b4c 1270 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1271
1272 spin_lock_irq(&chip->reg_lock);
1273 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1274 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
fc80a202 1275 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1da177e4
LT
1276 spin_unlock_irq(&chip->reg_lock);
1277 return 0;
1278}
1279
208a1b4c
TI
1280static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
1281 struct snd_ctl_elem_value *ucontrol)
1da177e4 1282{
208a1b4c 1283 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1284 unsigned int val;
1285 int change;
1286
1287 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1288 (ucontrol->value.iec958.status[1] << 8);
1289 spin_lock_irq(&chip->reg_lock);
1290 change = chip->spdif_bits != val;
1291 chip->spdif_bits = val;
1292 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1293 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1294 spin_unlock_irq(&chip->reg_lock);
1295 return change;
1296}
1297
208a1b4c 1298static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata =
1da177e4
LT
1299{
1300 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1301 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1302 .info = snd_ymfpci_spdif_default_info,
1303 .get = snd_ymfpci_spdif_default_get,
1304 .put = snd_ymfpci_spdif_default_put
1305};
1306
208a1b4c 1307static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1308{
1309 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1310 uinfo->count = 1;
1311 return 0;
1312}
1313
208a1b4c
TI
1314static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
1315 struct snd_ctl_elem_value *ucontrol)
1da177e4 1316{
208a1b4c 1317 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1318
1319 spin_lock_irq(&chip->reg_lock);
1320 ucontrol->value.iec958.status[0] = 0x3e;
1321 ucontrol->value.iec958.status[1] = 0xff;
1322 spin_unlock_irq(&chip->reg_lock);
1323 return 0;
1324}
1325
208a1b4c 1326static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata =
1da177e4
LT
1327{
1328 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1329 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1330 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1331 .info = snd_ymfpci_spdif_mask_info,
1332 .get = snd_ymfpci_spdif_mask_get,
1333};
1334
208a1b4c 1335static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1336{
1337 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1338 uinfo->count = 1;
1339 return 0;
1340}
1341
208a1b4c
TI
1342static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
1343 struct snd_ctl_elem_value *ucontrol)
1da177e4 1344{
208a1b4c 1345 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1346
1347 spin_lock_irq(&chip->reg_lock);
1348 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1349 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
fc80a202 1350 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1da177e4
LT
1351 spin_unlock_irq(&chip->reg_lock);
1352 return 0;
1353}
1354
208a1b4c
TI
1355static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
1356 struct snd_ctl_elem_value *ucontrol)
1da177e4 1357{
208a1b4c 1358 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1359 unsigned int val;
1360 int change;
1361
1362 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1363 (ucontrol->value.iec958.status[1] << 8);
1364 spin_lock_irq(&chip->reg_lock);
1365 change = chip->spdif_pcm_bits != val;
1366 chip->spdif_pcm_bits = val;
1367 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1368 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1369 spin_unlock_irq(&chip->reg_lock);
1370 return change;
1371}
1372
208a1b4c 1373static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata =
1da177e4
LT
1374{
1375 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1376 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1377 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1378 .info = snd_ymfpci_spdif_stream_info,
1379 .get = snd_ymfpci_spdif_stream_get,
1380 .put = snd_ymfpci_spdif_stream_put
1381};
1382
208a1b4c 1383static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
1da177e4
LT
1384{
1385 static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
1386
1387 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1388 info->count = 1;
1389 info->value.enumerated.items = 3;
1390 if (info->value.enumerated.item > 2)
1391 info->value.enumerated.item = 2;
1392 strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
1393 return 0;
1394}
1395
208a1b4c 1396static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1da177e4 1397{
208a1b4c 1398 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1399 u16 reg;
1400
1401 spin_lock_irq(&chip->reg_lock);
1402 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1403 spin_unlock_irq(&chip->reg_lock);
1404 if (!(reg & 0x100))
1405 value->value.enumerated.item[0] = 0;
1406 else
1407 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1408 return 0;
1409}
1410
208a1b4c 1411static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1da177e4 1412{
208a1b4c 1413 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1414 u16 reg, old_reg;
1415
1416 spin_lock_irq(&chip->reg_lock);
1417 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1418 if (value->value.enumerated.item[0] == 0)
1419 reg = old_reg & ~0x100;
1420 else
1421 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1422 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1423 spin_unlock_irq(&chip->reg_lock);
1424 return reg != old_reg;
1425}
1426
208a1b4c 1427static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = {
1da177e4
LT
1428 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1429 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1430 .name = "Direct Recording Source",
1431 .info = snd_ymfpci_drec_source_info,
1432 .get = snd_ymfpci_drec_source_get,
1433 .put = snd_ymfpci_drec_source_put
1434};
1435
1436/*
1437 * Mixer controls
1438 */
1439
d602c885 1440#define YMFPCI_SINGLE(xname, xindex, reg, shift) \
1da177e4
LT
1441{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1442 .info = snd_ymfpci_info_single, \
1443 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
d602c885 1444 .private_value = ((reg) | ((shift) << 16)) }
1da177e4 1445
208a1b4c
TI
1446static int snd_ymfpci_info_single(struct snd_kcontrol *kcontrol,
1447 struct snd_ctl_elem_info *uinfo)
1da177e4 1448{
d602c885
GM
1449 int reg = kcontrol->private_value & 0xffff;
1450
1451 switch (reg) {
1da177e4
LT
1452 case YDSXGR_SPDIFOUTCTRL: break;
1453 case YDSXGR_SPDIFINCTRL: break;
1454 default: return -EINVAL;
1455 }
467a8c2f 1456 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1da177e4
LT
1457 uinfo->count = 1;
1458 uinfo->value.integer.min = 0;
467a8c2f 1459 uinfo->value.integer.max = 1;
1da177e4
LT
1460 return 0;
1461}
1462
208a1b4c
TI
1463static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
1464 struct snd_ctl_elem_value *ucontrol)
1da177e4 1465{
208a1b4c 1466 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
d602c885
GM
1467 int reg = kcontrol->private_value & 0xffff;
1468 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1469 unsigned int mask = 1;
1da177e4 1470
d602c885 1471 switch (reg) {
1da177e4
LT
1472 case YDSXGR_SPDIFOUTCTRL: break;
1473 case YDSXGR_SPDIFINCTRL: break;
1474 default: return -EINVAL;
1475 }
d602c885
GM
1476 ucontrol->value.integer.value[0] =
1477 (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1da177e4
LT
1478 return 0;
1479}
1480
208a1b4c
TI
1481static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
1482 struct snd_ctl_elem_value *ucontrol)
1da177e4 1483{
208a1b4c 1484 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
d602c885
GM
1485 int reg = kcontrol->private_value & 0xffff;
1486 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1487 unsigned int mask = 1;
1da177e4
LT
1488 int change;
1489 unsigned int val, oval;
1490
d602c885 1491 switch (reg) {
1da177e4
LT
1492 case YDSXGR_SPDIFOUTCTRL: break;
1493 case YDSXGR_SPDIFINCTRL: break;
1494 default: return -EINVAL;
1495 }
1496 val = (ucontrol->value.integer.value[0] & mask);
1da177e4
LT
1497 val <<= shift;
1498 spin_lock_irq(&chip->reg_lock);
1499 oval = snd_ymfpci_readl(chip, reg);
1500 val = (oval & ~(mask << shift)) | val;
1501 change = val != oval;
1502 snd_ymfpci_writel(chip, reg, val);
1503 spin_unlock_irq(&chip->reg_lock);
1504 return change;
1505}
1506
0cb29ea0 1507static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
33925186 1508
1da177e4
LT
1509#define YMFPCI_DOUBLE(xname, xindex, reg) \
1510{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
33925186 1511 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
1da177e4
LT
1512 .info = snd_ymfpci_info_double, \
1513 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
33925186
TI
1514 .private_value = reg, \
1515 .tlv = { .p = db_scale_native } }
1da177e4 1516
208a1b4c 1517static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1518{
1519 unsigned int reg = kcontrol->private_value;
1da177e4
LT
1520
1521 if (reg < 0x80 || reg >= 0xc0)
1522 return -EINVAL;
467a8c2f 1523 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1da177e4
LT
1524 uinfo->count = 2;
1525 uinfo->value.integer.min = 0;
467a8c2f 1526 uinfo->value.integer.max = 16383;
1da177e4
LT
1527 return 0;
1528}
1529
208a1b4c 1530static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1531{
208a1b4c 1532 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4 1533 unsigned int reg = kcontrol->private_value;
467a8c2f 1534 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1da177e4
LT
1535 unsigned int val;
1536
1537 if (reg < 0x80 || reg >= 0xc0)
1538 return -EINVAL;
1539 spin_lock_irq(&chip->reg_lock);
1540 val = snd_ymfpci_readl(chip, reg);
1541 spin_unlock_irq(&chip->reg_lock);
1542 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1543 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1da177e4
LT
1544 return 0;
1545}
1546
208a1b4c 1547static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1548{
208a1b4c 1549 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4 1550 unsigned int reg = kcontrol->private_value;
467a8c2f 1551 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1da177e4
LT
1552 int change;
1553 unsigned int val1, val2, oval;
1554
1555 if (reg < 0x80 || reg >= 0xc0)
1556 return -EINVAL;
1557 val1 = ucontrol->value.integer.value[0] & mask;
1558 val2 = ucontrol->value.integer.value[1] & mask;
1da177e4
LT
1559 val1 <<= shift_left;
1560 val2 <<= shift_right;
1561 spin_lock_irq(&chip->reg_lock);
1562 oval = snd_ymfpci_readl(chip, reg);
1563 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1564 change = val1 != oval;
1565 snd_ymfpci_writel(chip, reg, val1);
1566 spin_unlock_irq(&chip->reg_lock);
1567 return change;
1568}
1569
1570/*
1571 * 4ch duplication
1572 */
208a1b4c 1573static int snd_ymfpci_info_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1574{
1575 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1576 uinfo->count = 1;
1577 uinfo->value.integer.min = 0;
1578 uinfo->value.integer.max = 1;
1579 return 0;
1580}
1581
208a1b4c 1582static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1583{
208a1b4c 1584 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1585 ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1586 return 0;
1587}
1588
208a1b4c 1589static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1590{
208a1b4c 1591 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1592 int change;
1593 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1594 if (change)
1595 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1596 return change;
1597}
1598
1599
208a1b4c 1600static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = {
1da177e4
LT
1601YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL),
1602YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1603YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1604YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1605YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1606YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1607YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1608YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1609YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
1610YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1611YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1612YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1613YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
d602c885
GM
1614YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
1615YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
1616YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
1da177e4
LT
1617{
1618 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1619 .name = "4ch Duplication",
1620 .info = snd_ymfpci_info_dup4ch,
1621 .get = snd_ymfpci_get_dup4ch,
1622 .put = snd_ymfpci_put_dup4ch,
1623},
1624};
1625
1626
1627/*
1628 * GPIO
1629 */
1630
208a1b4c 1631static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
1da177e4
LT
1632{
1633 u16 reg, mode;
1634 unsigned long flags;
1635
1636 spin_lock_irqsave(&chip->reg_lock, flags);
1637 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1638 reg &= ~(1 << (pin + 8));
1639 reg |= (1 << pin);
1640 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1641 /* set the level mode for input line */
1642 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1643 mode &= ~(3 << (pin * 2));
1644 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1645 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1646 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1647 spin_unlock_irqrestore(&chip->reg_lock, flags);
1648 return (mode >> pin) & 1;
1649}
1650
208a1b4c 1651static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
1da177e4
LT
1652{
1653 u16 reg;
1654 unsigned long flags;
1655
1656 spin_lock_irqsave(&chip->reg_lock, flags);
1657 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1658 reg &= ~(1 << pin);
1659 reg &= ~(1 << (pin + 8));
1660 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1661 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1662 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1663 spin_unlock_irqrestore(&chip->reg_lock, flags);
1664
1665 return 0;
1666}
1667
208a1b4c 1668static int snd_ymfpci_gpio_sw_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1669{
1670 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1671 uinfo->count = 1;
1672 uinfo->value.integer.min = 0;
1673 uinfo->value.integer.max = 1;
1674 return 0;
1675}
1676
208a1b4c 1677static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1678{
208a1b4c 1679 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1680 int pin = (int)kcontrol->private_value;
1681 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1682 return 0;
1683}
1684
208a1b4c 1685static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1686{
208a1b4c 1687 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1688 int pin = (int)kcontrol->private_value;
1689
1690 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1691 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1692 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1693 return 1;
1694 }
1695 return 0;
1696}
1697
208a1b4c 1698static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = {
1da177e4
LT
1699 .name = "Shared Rear/Line-In Switch",
1700 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1701 .info = snd_ymfpci_gpio_sw_info,
1702 .get = snd_ymfpci_gpio_sw_get,
1703 .put = snd_ymfpci_gpio_sw_put,
1704 .private_value = 2,
1705};
1706
9bcf6551
CL
1707/*
1708 * PCM voice volume
1709 */
1710
208a1b4c
TI
1711static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
1712 struct snd_ctl_elem_info *uinfo)
9bcf6551
CL
1713{
1714 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1715 uinfo->count = 2;
1716 uinfo->value.integer.min = 0;
1717 uinfo->value.integer.max = 0x8000;
1718 return 0;
1719}
1720
208a1b4c
TI
1721static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
1722 struct snd_ctl_elem_value *ucontrol)
9bcf6551 1723{
208a1b4c 1724 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
9bcf6551
CL
1725 unsigned int subs = kcontrol->id.subdevice;
1726
1727 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
1728 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
1729 return 0;
1730}
1731
208a1b4c
TI
1732static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
1733 struct snd_ctl_elem_value *ucontrol)
9bcf6551 1734{
208a1b4c 1735 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
9bcf6551 1736 unsigned int subs = kcontrol->id.subdevice;
208a1b4c 1737 struct snd_pcm_substream *substream;
9bcf6551
CL
1738 unsigned long flags;
1739
1740 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
1741 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
1742 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
1743 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
1744
208a1b4c 1745 substream = (struct snd_pcm_substream *)kcontrol->private_value;
9bcf6551
CL
1746 spin_lock_irqsave(&chip->voice_lock, flags);
1747 if (substream->runtime && substream->runtime->private_data) {
208a1b4c 1748 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
9ed1261e
TK
1749 if (!ypcm->use_441_slot)
1750 ypcm->update_pcm_vol = 2;
1751 else
1752 snd_ymfpci_pcm_441_volume_set(ypcm);
9bcf6551
CL
1753 }
1754 spin_unlock_irqrestore(&chip->voice_lock, flags);
1755 return 1;
1756 }
1757 return 0;
1758}
1759
208a1b4c 1760static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = {
9bcf6551
CL
1761 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1762 .name = "PCM Playback Volume",
1763 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1764 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1765 .info = snd_ymfpci_pcm_vol_info,
1766 .get = snd_ymfpci_pcm_vol_get,
1767 .put = snd_ymfpci_pcm_vol_put,
1768};
1769
1da177e4
LT
1770
1771/*
1772 * Mixer routines
1773 */
1774
208a1b4c 1775static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1776{
208a1b4c 1777 struct snd_ymfpci *chip = bus->private_data;
1da177e4
LT
1778 chip->ac97_bus = NULL;
1779}
1780
208a1b4c 1781static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1782{
208a1b4c 1783 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT
1784 chip->ac97 = NULL;
1785}
1786
d9301263 1787int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
1da177e4 1788{
208a1b4c
TI
1789 struct snd_ac97_template ac97;
1790 struct snd_kcontrol *kctl;
1791 struct snd_pcm_substream *substream;
1da177e4
LT
1792 unsigned int idx;
1793 int err;
208a1b4c 1794 static struct snd_ac97_bus_ops ops = {
1da177e4
LT
1795 .write = snd_ymfpci_codec_write,
1796 .read = snd_ymfpci_codec_read,
1797 };
1798
1799 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1800 return err;
1801 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1802 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1803
1804 memset(&ac97, 0, sizeof(ac97));
1805 ac97.private_data = chip;
1806 ac97.private_free = snd_ymfpci_mixer_free_ac97;
1807 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1808 return err;
1809
1810 /* to be sure */
1811 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1812 AC97_EA_VRA|AC97_EA_VRM, 0);
1813
1814 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1815 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1816 return err;
1817 }
1818
1819 /* add S/PDIF control */
1820 snd_assert(chip->pcm_spdif != NULL, return -EIO);
1821 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1822 return err;
1823 kctl->id.device = chip->pcm_spdif->device;
1824 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1825 return err;
1826 kctl->id.device = chip->pcm_spdif->device;
1827 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1828 return err;
1829 kctl->id.device = chip->pcm_spdif->device;
1830 chip->spdif_pcm_ctl = kctl;
1831
1832 /* direct recording source */
1833 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1834 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1835 return err;
1836
1837 /*
1838 * shared rear/line-in
1839 */
1840 if (rear_switch) {
1841 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1842 return err;
1843 }
1844
9bcf6551
CL
1845 /* per-voice volume */
1846 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1847 for (idx = 0; idx < 32; ++idx) {
1848 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
1849 if (!kctl)
1850 return -ENOMEM;
1851 kctl->id.device = chip->pcm->device;
1852 kctl->id.subdevice = idx;
1853 kctl->private_value = (unsigned long)substream;
1854 if ((err = snd_ctl_add(chip->card, kctl)) < 0)
1855 return err;
1856 chip->pcm_mixer[idx].left = 0x8000;
1857 chip->pcm_mixer[idx].right = 0x8000;
1858 chip->pcm_mixer[idx].ctl = kctl;
1859 substream = substream->next;
1860 }
1861
1da177e4
LT
1862 return 0;
1863}
1864
1865
1866/*
1867 * timer
1868 */
1869
208a1b4c 1870static int snd_ymfpci_timer_start(struct snd_timer *timer)
1da177e4 1871{
208a1b4c 1872 struct snd_ymfpci *chip;
1da177e4
LT
1873 unsigned long flags;
1874 unsigned int count;
1875
1876 chip = snd_timer_chip(timer);
d44c39ac 1877 count = (timer->sticks << 1) - 1;
1da177e4
LT
1878 spin_lock_irqsave(&chip->reg_lock, flags);
1879 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1880 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1881 spin_unlock_irqrestore(&chip->reg_lock, flags);
1882 return 0;
1883}
1884
208a1b4c 1885static int snd_ymfpci_timer_stop(struct snd_timer *timer)
1da177e4 1886{
208a1b4c 1887 struct snd_ymfpci *chip;
1da177e4
LT
1888 unsigned long flags;
1889
1890 chip = snd_timer_chip(timer);
1891 spin_lock_irqsave(&chip->reg_lock, flags);
1892 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1893 spin_unlock_irqrestore(&chip->reg_lock, flags);
1894 return 0;
1895}
1896
208a1b4c 1897static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
1da177e4
LT
1898 unsigned long *num, unsigned long *den)
1899{
1900 *num = 1;
d44c39ac 1901 *den = 48000;
1da177e4
LT
1902 return 0;
1903}
1904
208a1b4c 1905static struct snd_timer_hardware snd_ymfpci_timer_hw = {
1da177e4 1906 .flags = SNDRV_TIMER_HW_AUTO,
d44c39ac
CL
1907 .resolution = 20833, /* 1/fs = 20.8333...us */
1908 .ticks = 0x8000,
1da177e4
LT
1909 .start = snd_ymfpci_timer_start,
1910 .stop = snd_ymfpci_timer_stop,
1911 .precise_resolution = snd_ymfpci_timer_precise_resolution,
1912};
1913
208a1b4c 1914int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
1da177e4 1915{
208a1b4c
TI
1916 struct snd_timer *timer = NULL;
1917 struct snd_timer_id tid;
1da177e4
LT
1918 int err;
1919
1920 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1921 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1922 tid.card = chip->card->number;
1923 tid.device = device;
1924 tid.subdevice = 0;
1925 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1926 strcpy(timer->name, "YMFPCI timer");
1927 timer->private_data = chip;
1928 timer->hw = snd_ymfpci_timer_hw;
1929 }
1930 chip->timer = timer;
1931 return err;
1932}
1933
1934
1935/*
1936 * proc interface
1937 */
1938
208a1b4c
TI
1939static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
1940 struct snd_info_buffer *buffer)
1da177e4 1941{
208a1b4c 1942 struct snd_ymfpci *chip = entry->private_data;
1da177e4
LT
1943 int i;
1944
1945 snd_iprintf(buffer, "YMFPCI\n\n");
1946 for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1947 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1948}
1949
208a1b4c 1950static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
1da177e4 1951{
208a1b4c 1952 struct snd_info_entry *entry;
1da177e4
LT
1953
1954 if (! snd_card_proc_new(card, "ymfpci", &entry))
bf850204 1955 snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read);
1da177e4
LT
1956 return 0;
1957}
1958
1959/*
1960 * initialization routines
1961 */
1962
1963static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
1964{
1965 u8 cmd;
1966
1967 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
1968#if 0 // force to reset
1969 if (cmd & 0x03) {
1970#endif
1971 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1972 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
1973 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1974 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
1975 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
1976#if 0
1977 }
1978#endif
1979}
1980
208a1b4c 1981static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
1da177e4
LT
1982{
1983 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
1984}
1985
208a1b4c 1986static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
1da177e4
LT
1987{
1988 u32 val;
1989 int timeout = 1000;
1990
1991 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
1992 if (val)
1993 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
1994 while (timeout-- > 0) {
1995 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
1996 if ((val & 0x00000002) == 0)
1997 break;
1998 }
1999}
2000
8ad2da19 2001#ifdef CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL
102fa906 2002
1da177e4
LT
2003#include "ymfpci_image.h"
2004
102fa906
CL
2005static struct firmware snd_ymfpci_dsp_microcode = {
2006 .size = YDSXG_DSPLENGTH,
2007 .data = (u8 *)DspInst,
2008};
2009static struct firmware snd_ymfpci_controller_microcode = {
2010 .size = YDSXG_CTRLLENGTH,
2011 .data = (u8 *)CntrlInst,
2012};
2013static struct firmware snd_ymfpci_controller_1e_microcode = {
2014 .size = YDSXG_CTRLLENGTH,
2015 .data = (u8 *)CntrlInst1E,
2016};
2017#endif
2018
b7dd2b34
TI
2019#ifdef CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL
2020static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
2021{
2022 chip->dsp_microcode = &snd_ymfpci_dsp_microcode;
2023 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
2024 chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
2025 chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
2026 chip->device_id == PCI_DEVICE_ID_YAMAHA_754)
2027 chip->controller_microcode =
2028 &snd_ymfpci_controller_1e_microcode;
2029 else
2030 chip->controller_microcode =
2031 &snd_ymfpci_controller_microcode;
2032 return 0;
2033}
2034
2035#else /* use fw_loader */
2036
102fa906
CL
2037#ifdef __LITTLE_ENDIAN
2038static inline void snd_ymfpci_convert_from_le(const struct firmware *fw) { }
2039#else
2040static void snd_ymfpci_convert_from_le(const struct firmware *fw)
2041{
2042 int i;
2043 u32 *data = (u32 *)fw->data;
2044
2045 for (i = 0; i < fw->size / 4; ++i)
2046 le32_to_cpus(&data[i]);
2047}
2048#endif
2049
2050static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
2051{
2052 int err, is_1e;
2053 const char *name;
2054
2055 err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
2056 &chip->pci->dev);
2057 if (err >= 0) {
2058 if (chip->dsp_microcode->size == YDSXG_DSPLENGTH)
2059 snd_ymfpci_convert_from_le(chip->dsp_microcode);
2060 else {
2061 snd_printk(KERN_ERR "DSP microcode has wrong size\n");
2062 err = -EINVAL;
2063 }
2064 }
b7dd2b34 2065 if (err < 0)
102fa906 2066 return err;
102fa906
CL
2067 is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
2068 chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
2069 chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
2070 chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
2071 name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
2072 err = request_firmware(&chip->controller_microcode, name,
2073 &chip->pci->dev);
2074 if (err >= 0) {
2075 if (chip->controller_microcode->size == YDSXG_CTRLLENGTH)
2076 snd_ymfpci_convert_from_le(chip->controller_microcode);
2077 else {
2078 snd_printk(KERN_ERR "controller microcode"
2079 " has wrong size\n");
2080 err = -EINVAL;
2081 }
2082 }
b7dd2b34 2083 if (err < 0)
102fa906 2084 return err;
102fa906
CL
2085 return 0;
2086}
7e0af29d
CL
2087
2088MODULE_FIRMWARE("yamaha/ds1_dsp.fw");
2089MODULE_FIRMWARE("yamaha/ds1_ctrl.fw");
2090MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw");
2091
b7dd2b34 2092#endif
102fa906 2093
208a1b4c 2094static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
1da177e4
LT
2095{
2096 int i;
2097 u16 ctrl;
102fa906 2098 u32 *inst;
1da177e4
LT
2099
2100 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
2101 snd_ymfpci_disable_dsp(chip);
2102 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
2103 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
2104 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
2105 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
2106 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
2107 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
2108 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
2109 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2110 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2111
2112 /* setup DSP instruction code */
102fa906 2113 inst = (u32 *)chip->dsp_microcode->data;
1da177e4 2114 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
102fa906 2115 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), inst[i]);
1da177e4
LT
2116
2117 /* setup control instruction code */
102fa906 2118 inst = (u32 *)chip->controller_microcode->data;
1da177e4
LT
2119 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
2120 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]);
2121
2122 snd_ymfpci_enable_dsp(chip);
2123}
2124
208a1b4c 2125static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip)
1da177e4
LT
2126{
2127 long size, playback_ctrl_size;
2128 int voice, bank, reg;
2129 u8 *ptr;
2130 dma_addr_t ptr_addr;
2131
2132 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
2133 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
2134 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
2135 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
2136 chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
2137
7ab39926
CL
2138 size = ALIGN(playback_ctrl_size, 0x100) +
2139 ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
2140 ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
2141 ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
1da177e4
LT
2142 chip->work_size;
2143 /* work_ptr must be aligned to 256 bytes, but it's already
2144 covered with the kernel page allocation mechanism */
2145 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
2146 size, &chip->work_ptr) < 0)
2147 return -ENOMEM;
2148 ptr = chip->work_ptr.area;
2149 ptr_addr = chip->work_ptr.addr;
2150 memset(ptr, 0, size); /* for sure */
2151
2152 chip->bank_base_playback = ptr;
2153 chip->bank_base_playback_addr = ptr_addr;
2154 chip->ctrl_playback = (u32 *)ptr;
2155 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
7ab39926
CL
2156 ptr += ALIGN(playback_ctrl_size, 0x100);
2157 ptr_addr += ALIGN(playback_ctrl_size, 0x100);
1da177e4
LT
2158 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
2159 chip->voices[voice].number = voice;
208a1b4c 2160 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
1da177e4
LT
2161 chip->voices[voice].bank_addr = ptr_addr;
2162 for (bank = 0; bank < 2; bank++) {
208a1b4c 2163 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
1da177e4
LT
2164 ptr += chip->bank_size_playback;
2165 ptr_addr += chip->bank_size_playback;
2166 }
2167 }
7ab39926
CL
2168 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2169 ptr_addr = ALIGN(ptr_addr, 0x100);
1da177e4
LT
2170 chip->bank_base_capture = ptr;
2171 chip->bank_base_capture_addr = ptr_addr;
2172 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2173 for (bank = 0; bank < 2; bank++) {
208a1b4c 2174 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
1da177e4
LT
2175 ptr += chip->bank_size_capture;
2176 ptr_addr += chip->bank_size_capture;
2177 }
7ab39926
CL
2178 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2179 ptr_addr = ALIGN(ptr_addr, 0x100);
1da177e4
LT
2180 chip->bank_base_effect = ptr;
2181 chip->bank_base_effect_addr = ptr_addr;
2182 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2183 for (bank = 0; bank < 2; bank++) {
208a1b4c 2184 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
1da177e4
LT
2185 ptr += chip->bank_size_effect;
2186 ptr_addr += chip->bank_size_effect;
2187 }
7ab39926
CL
2188 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2189 ptr_addr = ALIGN(ptr_addr, 0x100);
1da177e4
LT
2190 chip->work_base = ptr;
2191 chip->work_base_addr = ptr_addr;
2192
2193 snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, );
2194
2195 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2196 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2197 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2198 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2199 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2200
2201 /* S/PDIF output initialization */
2202 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2203 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2204 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2205
2206 /* S/PDIF input initialization */
2207 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2208
2209 /* digital mixer setup */
2210 for (reg = 0x80; reg < 0xc0; reg += 4)
2211 snd_ymfpci_writel(chip, reg, 0);
2212 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2213 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2214 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2215 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2216 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2217 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2218 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2219
2220 return 0;
2221}
2222
208a1b4c 2223static int snd_ymfpci_free(struct snd_ymfpci *chip)
1da177e4
LT
2224{
2225 u16 ctrl;
2226
2227 snd_assert(chip != NULL, return -EINVAL);
2228
2229 if (chip->res_reg_area) { /* don't touch busy hardware */
2230 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2231 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2232 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2233 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2234 snd_ymfpci_disable_dsp(chip);
2235 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2236 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2237 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2238 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2239 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2240 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2241 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2242 }
2243
2244 snd_ymfpci_ac3_done(chip);
2245
2246 /* Set PCI device to D3 state */
2247#if 0
2248 /* FIXME: temporarily disabled, otherwise we cannot fire up
2249 * the chip again unless reboot. ACPI bug?
2250 */
2251 pci_set_power_state(chip->pci, 3);
2252#endif
2253
2254#ifdef CONFIG_PM
2255 vfree(chip->saved_regs);
2256#endif
b1d5776d
TI
2257 release_and_free_resource(chip->mpu_res);
2258 release_and_free_resource(chip->fm_res);
1da177e4
LT
2259 snd_ymfpci_free_gameport(chip);
2260 if (chip->reg_area_virt)
2261 iounmap(chip->reg_area_virt);
2262 if (chip->work_ptr.area)
2263 snd_dma_free_pages(&chip->work_ptr);
2264
2265 if (chip->irq >= 0)
437a5a46 2266 free_irq(chip->irq, chip);
b1d5776d 2267 release_and_free_resource(chip->res_reg_area);
1da177e4
LT
2268
2269 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2270
2271 pci_disable_device(chip->pci);
b7dd2b34
TI
2272#ifndef CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL
2273 release_firmware(chip->dsp_microcode);
2274 release_firmware(chip->controller_microcode);
102fa906 2275#endif
1da177e4
LT
2276 kfree(chip);
2277 return 0;
2278}
2279
208a1b4c 2280static int snd_ymfpci_dev_free(struct snd_device *device)
1da177e4 2281{
208a1b4c 2282 struct snd_ymfpci *chip = device->device_data;
1da177e4
LT
2283 return snd_ymfpci_free(chip);
2284}
2285
2286#ifdef CONFIG_PM
2287static int saved_regs_index[] = {
2288 /* spdif */
2289 YDSXGR_SPDIFOUTCTRL,
2290 YDSXGR_SPDIFOUTSTATUS,
2291 YDSXGR_SPDIFINCTRL,
2292 /* volumes */
2293 YDSXGR_PRIADCLOOPVOL,
2294 YDSXGR_NATIVEDACINVOL,
2295 YDSXGR_NATIVEDACOUTVOL,
9ed1261e 2296 YDSXGR_BUF441OUTVOL,
1da177e4
LT
2297 YDSXGR_NATIVEADCINVOL,
2298 YDSXGR_SPDIFLOOPVOL,
2299 YDSXGR_SPDIFOUTVOL,
2300 YDSXGR_ZVOUTVOL,
2301 YDSXGR_LEGACYOUTVOL,
2302 /* address bases */
2303 YDSXGR_PLAYCTRLBASE,
2304 YDSXGR_RECCTRLBASE,
2305 YDSXGR_EFFCTRLBASE,
2306 YDSXGR_WORKBASE,
2307 /* capture set up */
2308 YDSXGR_MAPOFREC,
2309 YDSXGR_RECFORMAT,
2310 YDSXGR_RECSLOTSR,
2311 YDSXGR_ADCFORMAT,
2312 YDSXGR_ADCSLOTSR,
2313};
2314#define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
2315
ded46235 2316int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state)
1da177e4 2317{
ded46235
TI
2318 struct snd_card *card = pci_get_drvdata(pci);
2319 struct snd_ymfpci *chip = card->private_data;
1da177e4
LT
2320 unsigned int i;
2321
ded46235 2322 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT
2323 snd_pcm_suspend_all(chip->pcm);
2324 snd_pcm_suspend_all(chip->pcm2);
2325 snd_pcm_suspend_all(chip->pcm_spdif);
2326 snd_pcm_suspend_all(chip->pcm_4ch);
2327 snd_ac97_suspend(chip->ac97);
2328 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2329 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2330 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2331 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2332 snd_ymfpci_disable_dsp(chip);
ded46235
TI
2333 pci_disable_device(pci);
2334 pci_save_state(pci);
30b35399 2335 pci_set_power_state(pci, pci_choose_state(pci, state));
1da177e4
LT
2336 return 0;
2337}
2338
ded46235 2339int snd_ymfpci_resume(struct pci_dev *pci)
1da177e4 2340{
ded46235
TI
2341 struct snd_card *card = pci_get_drvdata(pci);
2342 struct snd_ymfpci *chip = card->private_data;
1da177e4
LT
2343 unsigned int i;
2344
30b35399 2345 pci_set_power_state(pci, PCI_D0);
ded46235 2346 pci_restore_state(pci);
30b35399
TI
2347 if (pci_enable_device(pci) < 0) {
2348 printk(KERN_ERR "ymfpci: pci_enable_device failed, "
2349 "disabling device\n");
2350 snd_card_disconnect(card);
2351 return -EIO;
2352 }
ded46235
TI
2353 pci_set_master(pci);
2354 snd_ymfpci_aclink_reset(pci);
1da177e4
LT
2355 snd_ymfpci_codec_ready(chip, 0);
2356 snd_ymfpci_download_image(chip);
2357 udelay(100);
2358
2359 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2360 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2361
2362 snd_ac97_resume(chip->ac97);
2363
2364 /* start hw again */
2365 if (chip->start_count > 0) {
2366 spin_lock_irq(&chip->reg_lock);
2367 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2368 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2369 spin_unlock_irq(&chip->reg_lock);
2370 }
ded46235 2371 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT
2372 return 0;
2373}
2374#endif /* CONFIG_PM */
2375
208a1b4c 2376int __devinit snd_ymfpci_create(struct snd_card *card,
1da177e4
LT
2377 struct pci_dev * pci,
2378 unsigned short old_legacy_ctrl,
208a1b4c 2379 struct snd_ymfpci ** rchip)
1da177e4 2380{
208a1b4c 2381 struct snd_ymfpci *chip;
1da177e4 2382 int err;
208a1b4c 2383 static struct snd_device_ops ops = {
1da177e4
LT
2384 .dev_free = snd_ymfpci_dev_free,
2385 };
2386
2387 *rchip = NULL;
2388
2389 /* enable PCI device */
2390 if ((err = pci_enable_device(pci)) < 0)
2391 return err;
2392
e560d8d8 2393 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT
2394 if (chip == NULL) {
2395 pci_disable_device(pci);
2396 return -ENOMEM;
2397 }
2398 chip->old_legacy_ctrl = old_legacy_ctrl;
2399 spin_lock_init(&chip->reg_lock);
2400 spin_lock_init(&chip->voice_lock);
2401 init_waitqueue_head(&chip->interrupt_sleep);
2402 atomic_set(&chip->interrupt_sleep_count, 0);
2403 chip->card = card;
2404 chip->pci = pci;
2405 chip->irq = -1;
2406 chip->device_id = pci->device;
44c10138 2407 chip->rev = pci->revision;
1da177e4
LT
2408 chip->reg_area_phys = pci_resource_start(pci, 0);
2409 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
2410 pci_set_master(pci);
9ed1261e 2411 chip->src441_used = -1;
1da177e4
LT
2412
2413 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
99b359ba 2414 snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
1da177e4
LT
2415 snd_ymfpci_free(chip);
2416 return -EBUSY;
2417 }
437a5a46
TI
2418 if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
2419 "YMFPCI", chip)) {
99b359ba 2420 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT
2421 snd_ymfpci_free(chip);
2422 return -EBUSY;
2423 }
2424 chip->irq = pci->irq;
2425
2426 snd_ymfpci_aclink_reset(pci);
2427 if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2428 snd_ymfpci_free(chip);
2429 return -EIO;
2430 }
2431
102fa906
CL
2432 err = snd_ymfpci_request_firmware(chip);
2433 if (err < 0) {
2434 snd_printk(KERN_ERR "firmware request failed: %d\n", err);
2435 snd_ymfpci_free(chip);
2436 return err;
2437 }
1da177e4
LT
2438 snd_ymfpci_download_image(chip);
2439
2440 udelay(100); /* seems we need a delay after downloading image.. */
2441
2442 if (snd_ymfpci_memalloc(chip) < 0) {
2443 snd_ymfpci_free(chip);
2444 return -EIO;
2445 }
2446
2447 if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
2448 snd_ymfpci_free(chip);
2449 return err;
2450 }
2451
2452#ifdef CONFIG_PM
2453 chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
2454 if (chip->saved_regs == NULL) {
2455 snd_ymfpci_free(chip);
2456 return -ENOMEM;
2457 }
1da177e4
LT
2458#endif
2459
2460 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2461 snd_ymfpci_free(chip);
2462 return err;
2463 }
2464
2465 snd_ymfpci_proc_init(card, chip);
2466
2467 snd_card_set_dev(card, &pci->dev);
2468
2469 *rchip = chip;
2470 return 0;
2471}