[mirror_ubuntu-artful-kernel.git] / sound / pcmcia / pdaudiocf / pdaudiocf.h

/*
 * Driver for Sound Cors PDAudioCF soundcard
 *
 * Copyright (c) 2003 by Jaroslav Kysela <perex@perex.cz>
 *
 *   This program is free software; you can redistribute it and/or modify
 *   it under the terms of the GNU General Public License as published by
 *   the Free Software Foundation; either version 2 of the License, or
 *   (at your option) any later version.
 *
 *   This program is distributed in the hope that it will be useful,
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *   GNU General Public License for more details.
 *
 *   You should have received a copy of the GNU General Public License
 *   along with this program; if not, write to the Free Software
 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */

#ifndef __PDAUDIOCF_H
#define __PDAUDIOCF_H

#include <sound/pcm.h>
#include <asm/io.h>
#include <linux/interrupt.h>
#include <pcmcia/cs_types.h>
#include <pcmcia/cs.h>
#include <pcmcia/cistpl.h>
#include <pcmcia/ds.h>

#include <sound/ak4117.h>

/* PDAUDIOCF registers */
#define PDAUDIOCF_REG_MD	0x00	/* music data, R/O */
#define PDAUDIOCF_REG_WDP	0x02	/* write data pointer / 2, R/O */
#define PDAUDIOCF_REG_RDP	0x04	/* read data pointer / 2, R/O */
#define PDAUDIOCF_REG_TCR	0x06	/* test control register W/O */
#define PDAUDIOCF_REG_SCR	0x08	/* status and control, R/W (see bit description) */
#define PDAUDIOCF_REG_ISR	0x0a	/* interrupt status, R/O */
#define PDAUDIOCF_REG_IER	0x0c	/* interrupt enable, R/W */
#define PDAUDIOCF_REG_AK_IFR	0x0e	/* AK interface register, R/W */

/* PDAUDIOCF_REG_TCR */
#define PDAUDIOCF_ELIMAKMBIT	(1<<0)	/* simulate AKM music data */
#define PDAUDIOCF_TESTDATASEL	(1<<1)	/* test data selection, 0 = 0x55, 1 = pseudo-random */

/* PDAUDIOCF_REG_SCR */
#define PDAUDIOCF_AK_SBP	(1<<0)	/* serial port busy flag */
#define PDAUDIOCF_RST		(1<<2)	/* FPGA, AKM + SRAM buffer reset */
#define PDAUDIOCF_PDN		(1<<3)	/* power down bit */
#define PDAUDIOCF_CLKDIV0	(1<<4)	/* choose 24.576Mhz clock divided by 1,2,3 or 4 */
#define PDAUDIOCF_CLKDIV1	(1<<5)
#define PDAUDIOCF_RECORD	(1<<6)	/* start capturing to SRAM */
#define PDAUDIOCF_AK_SDD	(1<<7)	/* music data detected */
#define PDAUDIOCF_RED_LED_OFF	(1<<8)	/* red LED off override */
#define PDAUDIOCF_BLUE_LED_OFF	(1<<9)	/* blue LED off override */
#define PDAUDIOCF_DATAFMT0	(1<<10)	/* data format bits: 00 = 16-bit, 01 = 18-bit */
#define PDAUDIOCF_DATAFMT1	(1<<11)	/* 10 = 20-bit, 11 = 24-bit, all right justified */
#define PDAUDIOCF_FPGAREV(x)	((x>>12)&0x0f) /* FPGA revision */

/* PDAUDIOCF_REG_ISR */
#define PDAUDIOCF_IRQLVL	(1<<0)	/* Buffer level IRQ */
#define PDAUDIOCF_IRQOVR	(1<<1)	/* Overrun IRQ */
#define PDAUDIOCF_IRQAKM	(1<<2)	/* AKM IRQ */

/* PDAUDIOCF_REG_IER */
#define PDAUDIOCF_IRQLVLEN0	(1<<0)	/* fill threshold levels; 00 = none, 01 = 1/8th of buffer */
#define PDAUDIOCF_IRQLVLEN1	(1<<1)	/* 10 = 1/4th of buffer, 11 = 1/2th of buffer */
#define PDAUDIOCF_IRQOVREN	(1<<2)	/* enable overrun IRQ */
#define PDAUDIOCF_IRQAKMEN	(1<<3)	/* enable AKM IRQ */
#define PDAUDIOCF_BLUEDUTY0	(1<<8)	/* blue LED duty cycle; 00 = 100%, 01 = 50% */
#define PDAUDIOCF_BLUEDUTY1	(1<<9)	/* 02 = 25%, 11 = 12% */
#define PDAUDIOCF_REDDUTY0	(1<<10)	/* red LED duty cycle; 00 = 100%, 01 = 50% */
#define PDAUDIOCF_REDDUTY1	(1<<11)	/* 02 = 25%, 11 = 12% */
#define PDAUDIOCF_BLUESDD	(1<<12)	/* blue LED against SDD bit */
#define PDAUDIOCF_BLUEMODULATE	(1<<13)	/* save power when 100% duty cycle selected */
#define PDAUDIOCF_REDMODULATE	(1<<14)	/* save power when 100% duty cycle selected */
#define PDAUDIOCF_HALFRATE	(1<<15)	/* slow both LED blinks by half (also spdif detect rate) */

/* chip status */
#define PDAUDIOCF_STAT_IS_STALE	(1<<0)
#define PDAUDIOCF_STAT_IS_CONFIGURED (1<<1)
#define PDAUDIOCF_STAT_IS_SUSPENDED (1<<2)

struct snd_pdacf {
	struct snd_card *card;
	int index;

	unsigned long port;
	int irq;

	spinlock_t reg_lock;
	unsigned short regmap[8];
	unsigned short suspend_reg_scr;
	struct tasklet_struct tq;

	spinlock_t ak4117_lock;
	struct ak4117 *ak4117;

	unsigned int chip_status;

	struct snd_pcm *pcm;
	struct snd_pcm_substream *pcm_substream;
	unsigned int pcm_running: 1;
	unsigned int pcm_channels;
	unsigned int pcm_swab;
	unsigned int pcm_little;
	unsigned int pcm_frame;
	unsigned int pcm_sample;
	unsigned int pcm_xor;
	unsigned int pcm_size;
	unsigned int pcm_period;
	unsigned int pcm_tdone;
	unsigned int pcm_hwptr;
	void *pcm_area;
	
	/* pcmcia stuff */
	struct pcmcia_device	*p_dev;
	dev_node_t node;
};

static inline void pdacf_reg_write(struct snd_pdacf *chip, unsigned char reg, unsigned short val)
{
	outw(chip->regmap[reg>>1] = val, chip->port + reg);
}

static inline unsigned short pdacf_reg_read(struct snd_pdacf *chip, unsigned char reg)
{
	return inw(chip->port + reg);
}

struct snd_pdacf *snd_pdacf_create(struct snd_card *card);
int snd_pdacf_ak4117_create(struct snd_pdacf *pdacf);
void snd_pdacf_powerdown(struct snd_pdacf *chip);
#ifdef CONFIG_PM
int snd_pdacf_suspend(struct snd_pdacf *chip, pm_message_t state);
int snd_pdacf_resume(struct snd_pdacf *chip);
#endif
int snd_pdacf_pcm_new(struct snd_pdacf *chip);
irqreturn_t pdacf_interrupt(int irq, void *dev);
void pdacf_tasklet(unsigned long private_data);
void pdacf_reinit(struct snd_pdacf *chip, int resume);

#endif /* __PDAUDIOCF_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Driver for Sound Cors PDAudioCF soundcard
	3	*
c1017a4c	4	* Copyright (c) 2003 by Jaroslav Kysela <perex@perex.cz>
1da177e4 LT	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*/
	20
	21	#ifndef __PDAUDIOCF_H
	22	#define __PDAUDIOCF_H
	23
	24	#include <sound/pcm.h>
	25	#include <asm/io.h>
	26	#include <linux/interrupt.h>
	27	#include <pcmcia/cs_types.h>
	28	#include <pcmcia/cs.h>
	29	#include <pcmcia/cistpl.h>
	30	#include <pcmcia/ds.h>
	31
	32	#include <sound/ak4117.h>
	33
	34	/* PDAUDIOCF registers */
	35	#define PDAUDIOCF_REG_MD 0x00 /* music data, R/O */
	36	#define PDAUDIOCF_REG_WDP 0x02 /* write data pointer / 2, R/O */
	37	#define PDAUDIOCF_REG_RDP 0x04 /* read data pointer / 2, R/O */
	38	#define PDAUDIOCF_REG_TCR 0x06 /* test control register W/O */
	39	#define PDAUDIOCF_REG_SCR 0x08 /* status and control, R/W (see bit description) */
	40	#define PDAUDIOCF_REG_ISR 0x0a /* interrupt status, R/O */
	41	#define PDAUDIOCF_REG_IER 0x0c /* interrupt enable, R/W */
	42	#define PDAUDIOCF_REG_AK_IFR 0x0e /* AK interface register, R/W */
	43
	44	/* PDAUDIOCF_REG_TCR */
	45	#define PDAUDIOCF_ELIMAKMBIT (1<<0) /* simulate AKM music data */
	46	#define PDAUDIOCF_TESTDATASEL (1<<1) /* test data selection, 0 = 0x55, 1 = pseudo-random */
	47
	48	/* PDAUDIOCF_REG_SCR */
	49	#define PDAUDIOCF_AK_SBP (1<<0) /* serial port busy flag */
	50	#define PDAUDIOCF_RST (1<<2) /* FPGA, AKM + SRAM buffer reset */
	51	#define PDAUDIOCF_PDN (1<<3) /* power down bit */
	52	#define PDAUDIOCF_CLKDIV0 (1<<4) /* choose 24.576Mhz clock divided by 1,2,3 or 4 */
	53	#define PDAUDIOCF_CLKDIV1 (1<<5)
	54	#define PDAUDIOCF_RECORD (1<<6) /* start capturing to SRAM */
	55	#define PDAUDIOCF_AK_SDD (1<<7) /* music data detected */
	56	#define PDAUDIOCF_RED_LED_OFF (1<<8) /* red LED off override */
	57	#define PDAUDIOCF_BLUE_LED_OFF (1<<9) /* blue LED off override */
	58	#define PDAUDIOCF_DATAFMT0 (1<<10) /* data format bits: 00 = 16-bit, 01 = 18-bit */
	59	#define PDAUDIOCF_DATAFMT1 (1<<11) /* 10 = 20-bit, 11 = 24-bit, all right justified */
	60	#define PDAUDIOCF_FPGAREV(x) ((x>>12)&0x0f) /* FPGA revision */
	61
	62	/* PDAUDIOCF_REG_ISR */
	63	#define PDAUDIOCF_IRQLVL (1<<0) /* Buffer level IRQ */
	64	#define PDAUDIOCF_IRQOVR (1<<1) /* Overrun IRQ */
	65	#define PDAUDIOCF_IRQAKM (1<<2) /* AKM IRQ */
	66
	67	/* PDAUDIOCF_REG_IER */
	68	#define PDAUDIOCF_IRQLVLEN0 (1<<0) /* fill threshold levels; 00 = none, 01 = 1/8th of buffer */
69	#define PDAUDIOCF_IRQLVLEN1 (1<<1) /* 10 = 1/4th of buffer, 11 = 1/2th of buffer */
70	#define PDAUDIOCF_IRQOVREN (1<<2) /* enable overrun IRQ */
71	#define PDAUDIOCF_IRQAKMEN (1<<3) /* enable AKM IRQ */
72	#define PDAUDIOCF_BLUEDUTY0 (1<<8) /* blue LED duty cycle; 00 = 100%, 01 = 50% */
73	#define PDAUDIOCF_BLUEDUTY1 (1<<9) /* 02 = 25%, 11 = 12% */
74	#define PDAUDIOCF_REDDUTY0 (1<<10) /* red LED duty cycle; 00 = 100%, 01 = 50% */
75	#define PDAUDIOCF_REDDUTY1 (1<<11) /* 02 = 25%, 11 = 12% */
76	#define PDAUDIOCF_BLUESDD (1<<12) /* blue LED against SDD bit */
77	#define PDAUDIOCF_BLUEMODULATE (1<<13) /* save power when 100% duty cycle selected */
78	#define PDAUDIOCF_REDMODULATE (1<<14) /* save power when 100% duty cycle selected */
79	#define PDAUDIOCF_HALFRATE (1<<15) /* slow both LED blinks by half (also spdif detect rate) */
80
81	/* chip status */
82	#define PDAUDIOCF_STAT_IS_STALE (1<<0)
83	#define PDAUDIOCF_STAT_IS_CONFIGURED (1<<1)
84	#define PDAUDIOCF_STAT_IS_SUSPENDED (1<<2)
85
db131548 TI	86	struct snd_pdacf {
db131548 TI	87	struct snd_card *card;
1da177e4 LT	88	int index;
	89
	90	unsigned long port;
	91	int irq;
	92
	93	spinlock_t reg_lock;
	94	unsigned short regmap[8];
	95	unsigned short suspend_reg_scr;
	96	struct tasklet_struct tq;
	97
	98	spinlock_t ak4117_lock;
db131548	99	struct ak4117 *ak4117;
1da177e4 LT	100
	101	unsigned int chip_status;
	102
db131548 TI	103	struct snd_pcm *pcm;
db131548 TI	104	struct snd_pcm_substream *pcm_substream;
1da177e4 LT	105	unsigned int pcm_running: 1;
	106	unsigned int pcm_channels;
	107	unsigned int pcm_swab;
	108	unsigned int pcm_little;
	109	unsigned int pcm_frame;
	110	unsigned int pcm_sample;
	111	unsigned int pcm_xor;
	112	unsigned int pcm_size;
	113	unsigned int pcm_period;
	114	unsigned int pcm_tdone;
	115	unsigned int pcm_hwptr;
	116	void *pcm_area;
	117
	118	/* pcmcia stuff */
fd238232	119	struct pcmcia_device *p_dev;
1da177e4	120	dev_node_t node;
db131548	121	};
1da177e4	122
db131548	123	static inline void pdacf_reg_write(struct snd_pdacf *chip, unsigned char reg, unsigned short val)
1da177e4 LT	124	{
	125	outw(chip->regmap[reg>>1] = val, chip->port + reg);
	126	}
	127
db131548	128	static inline unsigned short pdacf_reg_read(struct snd_pdacf *chip, unsigned char reg)
1da177e4 LT	129	{
	130	return inw(chip->port + reg);
	131	}
	132
db131548 TI	133	struct snd_pdacf snd_pdacf_create(struct snd_card card);
	134	int snd_pdacf_ak4117_create(struct snd_pdacf *pdacf);
	135	void snd_pdacf_powerdown(struct snd_pdacf *chip);
1da177e4	136	#ifdef CONFIG_PM
e4f163d9 TI	137	int snd_pdacf_suspend(struct snd_pdacf *chip, pm_message_t state);
e4f163d9 TI	138	int snd_pdacf_resume(struct snd_pdacf *chip);
1da177e4	139	#endif
db131548	140	int snd_pdacf_pcm_new(struct snd_pdacf *chip);
7d12e780	141	irqreturn_t pdacf_interrupt(int irq, void *dev);
1da177e4	142	void pdacf_tasklet(unsigned long private_data);
db131548	143	void pdacf_reinit(struct snd_pdacf *chip, int resume);
1da177e4 LT	144
1da177e4 LT	145	#endif /* __PDAUDIOCF_H */